1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #ifndef _CORE_H_ 19 #define _CORE_H_ 20 21 #include <linux/completion.h> 22 #include <linux/if_ether.h> 23 #include <linux/types.h> 24 #include <linux/pci.h> 25 #include <linux/uuid.h> 26 #include <linux/time.h> 27 28 #include "htt.h" 29 #include "htc.h" 30 #include "hw.h" 31 #include "targaddrs.h" 32 #include "wmi.h" 33 #include "../ath.h" 34 #include "../regd.h" 35 #include "../dfs_pattern_detector.h" 36 #include "spectral.h" 37 #include "thermal.h" 38 #include "wow.h" 39 #include "swap.h" 40 41 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB) 42 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 43 #define WO(_f) ((_f##_OFFSET) >> 2) 44 45 #define ATH10K_SCAN_ID 0 46 #define WMI_READY_TIMEOUT (5 * HZ) 47 #define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ) 48 #define ATH10K_CONNECTION_LOSS_HZ (3*HZ) 49 #define ATH10K_NUM_CHANS 39 50 51 /* Antenna noise floor */ 52 #define ATH10K_DEFAULT_NOISE_FLOOR -95 53 54 #define ATH10K_MAX_NUM_MGMT_PENDING 128 55 56 /* number of failed packets (20 packets with 16 sw reties each) */ 57 #define ATH10K_KICKOUT_THRESHOLD (20 * 16) 58 59 /* 60 * Use insanely high numbers to make sure that the firmware implementation 61 * won't start, we have the same functionality already in hostapd. Unit 62 * is seconds. 63 */ 64 #define ATH10K_KEEPALIVE_MIN_IDLE 3747 65 #define ATH10K_KEEPALIVE_MAX_IDLE 3895 66 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900 67 68 struct ath10k; 69 70 enum ath10k_bus { 71 ATH10K_BUS_PCI, 72 }; 73 74 static inline const char *ath10k_bus_str(enum ath10k_bus bus) 75 { 76 switch (bus) { 77 case ATH10K_BUS_PCI: 78 return "pci"; 79 } 80 81 return "unknown"; 82 } 83 84 enum ath10k_skb_flags { 85 ATH10K_SKB_F_NO_HWCRYPT = BIT(0), 86 ATH10K_SKB_F_DTIM_ZERO = BIT(1), 87 ATH10K_SKB_F_DELIVER_CAB = BIT(2), 88 ATH10K_SKB_F_MGMT = BIT(3), 89 ATH10K_SKB_F_QOS = BIT(4), 90 }; 91 92 struct ath10k_skb_cb { 93 dma_addr_t paddr; 94 u8 flags; 95 u8 eid; 96 u16 msdu_id; 97 struct ieee80211_vif *vif; 98 } __packed; 99 100 struct ath10k_skb_rxcb { 101 dma_addr_t paddr; 102 struct hlist_node hlist; 103 }; 104 105 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb) 106 { 107 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) > 108 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 109 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 110 } 111 112 static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb) 113 { 114 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb)); 115 return (struct ath10k_skb_rxcb *)skb->cb; 116 } 117 118 #define ATH10K_RXCB_SKB(rxcb) \ 119 container_of((void *)rxcb, struct sk_buff, cb) 120 121 static inline u32 host_interest_item_address(u32 item_offset) 122 { 123 return QCA988X_HOST_INTEREST_ADDRESS + item_offset; 124 } 125 126 struct ath10k_bmi { 127 bool done_sent; 128 }; 129 130 struct ath10k_mem_chunk { 131 void *vaddr; 132 dma_addr_t paddr; 133 u32 len; 134 u32 req_id; 135 }; 136 137 struct ath10k_wmi { 138 enum ath10k_fw_wmi_op_version op_version; 139 enum ath10k_htc_ep_id eid; 140 struct completion service_ready; 141 struct completion unified_ready; 142 wait_queue_head_t tx_credits_wq; 143 DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX); 144 struct wmi_cmd_map *cmd; 145 struct wmi_vdev_param_map *vdev_param; 146 struct wmi_pdev_param_map *pdev_param; 147 const struct wmi_ops *ops; 148 const struct wmi_peer_flags_map *peer_flags; 149 150 u32 num_mem_chunks; 151 u32 rx_decap_mode; 152 struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS]; 153 }; 154 155 struct ath10k_fw_stats_peer { 156 struct list_head list; 157 158 u8 peer_macaddr[ETH_ALEN]; 159 u32 peer_rssi; 160 u32 peer_tx_rate; 161 u32 peer_rx_rate; /* 10x only */ 162 }; 163 164 struct ath10k_fw_stats_vdev { 165 struct list_head list; 166 167 u32 vdev_id; 168 u32 beacon_snr; 169 u32 data_snr; 170 u32 num_tx_frames[4]; 171 u32 num_rx_frames; 172 u32 num_tx_frames_retries[4]; 173 u32 num_tx_frames_failures[4]; 174 u32 num_rts_fail; 175 u32 num_rts_success; 176 u32 num_rx_err; 177 u32 num_rx_discard; 178 u32 num_tx_not_acked; 179 u32 tx_rate_history[10]; 180 u32 beacon_rssi_history[10]; 181 }; 182 183 struct ath10k_fw_stats_pdev { 184 struct list_head list; 185 186 /* PDEV stats */ 187 s32 ch_noise_floor; 188 u32 tx_frame_count; 189 u32 rx_frame_count; 190 u32 rx_clear_count; 191 u32 cycle_count; 192 u32 phy_err_count; 193 u32 chan_tx_power; 194 u32 ack_rx_bad; 195 u32 rts_bad; 196 u32 rts_good; 197 u32 fcs_bad; 198 u32 no_beacons; 199 u32 mib_int_count; 200 201 /* PDEV TX stats */ 202 s32 comp_queued; 203 s32 comp_delivered; 204 s32 msdu_enqued; 205 s32 mpdu_enqued; 206 s32 wmm_drop; 207 s32 local_enqued; 208 s32 local_freed; 209 s32 hw_queued; 210 s32 hw_reaped; 211 s32 underrun; 212 u32 hw_paused; 213 s32 tx_abort; 214 s32 mpdus_requed; 215 u32 tx_ko; 216 u32 data_rc; 217 u32 self_triggers; 218 u32 sw_retry_failure; 219 u32 illgl_rate_phy_err; 220 u32 pdev_cont_xretry; 221 u32 pdev_tx_timeout; 222 u32 pdev_resets; 223 u32 phy_underrun; 224 u32 txop_ovf; 225 u32 seq_posted; 226 u32 seq_failed_queueing; 227 u32 seq_completed; 228 u32 seq_restarted; 229 u32 mu_seq_posted; 230 u32 mpdus_sw_flush; 231 u32 mpdus_hw_filter; 232 u32 mpdus_truncated; 233 u32 mpdus_ack_failed; 234 u32 mpdus_expired; 235 236 /* PDEV RX stats */ 237 s32 mid_ppdu_route_change; 238 s32 status_rcvd; 239 s32 r0_frags; 240 s32 r1_frags; 241 s32 r2_frags; 242 s32 r3_frags; 243 s32 htt_msdus; 244 s32 htt_mpdus; 245 s32 loc_msdus; 246 s32 loc_mpdus; 247 s32 oversize_amsdu; 248 s32 phy_errs; 249 s32 phy_err_drop; 250 s32 mpdu_errs; 251 s32 rx_ovfl_errs; 252 }; 253 254 struct ath10k_fw_stats { 255 struct list_head pdevs; 256 struct list_head vdevs; 257 struct list_head peers; 258 }; 259 260 #define ATH10K_TPC_TABLE_TYPE_FLAG 1 261 #define ATH10K_TPC_PREAM_TABLE_END 0xFFFF 262 263 struct ath10k_tpc_table { 264 u32 pream_idx[WMI_TPC_RATE_MAX]; 265 u8 rate_code[WMI_TPC_RATE_MAX]; 266 char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; 267 }; 268 269 struct ath10k_tpc_stats { 270 u32 reg_domain; 271 u32 chan_freq; 272 u32 phy_mode; 273 u32 twice_antenna_reduction; 274 u32 twice_max_rd_power; 275 s32 twice_antenna_gain; 276 u32 power_limit; 277 u32 num_tx_chain; 278 u32 ctl; 279 u32 rate_max; 280 u8 flag[WMI_TPC_FLAG]; 281 struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG]; 282 }; 283 284 struct ath10k_dfs_stats { 285 u32 phy_errors; 286 u32 pulses_total; 287 u32 pulses_detected; 288 u32 pulses_discarded; 289 u32 radar_detected; 290 }; 291 292 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */ 293 294 struct ath10k_peer { 295 struct list_head list; 296 int vdev_id; 297 u8 addr[ETH_ALEN]; 298 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS); 299 300 /* protected by ar->data_lock */ 301 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1]; 302 }; 303 304 struct ath10k_sta { 305 struct ath10k_vif *arvif; 306 307 /* the following are protected by ar->data_lock */ 308 u32 changed; /* IEEE80211_RC_* */ 309 u32 bw; 310 u32 nss; 311 u32 smps; 312 313 struct work_struct update_wk; 314 315 #ifdef CONFIG_MAC80211_DEBUGFS 316 /* protected by conf_mutex */ 317 bool aggr_mode; 318 #endif 319 }; 320 321 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ) 322 323 enum ath10k_beacon_state { 324 ATH10K_BEACON_SCHEDULED = 0, 325 ATH10K_BEACON_SENDING, 326 ATH10K_BEACON_SENT, 327 }; 328 329 struct ath10k_vif { 330 struct list_head list; 331 332 u32 vdev_id; 333 enum wmi_vdev_type vdev_type; 334 enum wmi_vdev_subtype vdev_subtype; 335 u32 beacon_interval; 336 u32 dtim_period; 337 struct sk_buff *beacon; 338 /* protected by data_lock */ 339 enum ath10k_beacon_state beacon_state; 340 void *beacon_buf; 341 dma_addr_t beacon_paddr; 342 unsigned long tx_paused; /* arbitrary values defined by target */ 343 344 struct ath10k *ar; 345 struct ieee80211_vif *vif; 346 347 bool is_started; 348 bool is_up; 349 bool spectral_enabled; 350 bool ps; 351 u32 aid; 352 u8 bssid[ETH_ALEN]; 353 354 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1]; 355 s8 def_wep_key_idx; 356 357 u16 tx_seq_no; 358 359 union { 360 struct { 361 u32 uapsd; 362 } sta; 363 struct { 364 /* 512 stations */ 365 u8 tim_bitmap[64]; 366 u8 tim_len; 367 u32 ssid_len; 368 u8 ssid[IEEE80211_MAX_SSID_LEN]; 369 bool hidden_ssid; 370 /* P2P_IE with NoA attribute for P2P_GO case */ 371 u32 noa_len; 372 u8 *noa_data; 373 } ap; 374 } u; 375 376 bool use_cts_prot; 377 bool nohwcrypt; 378 int num_legacy_stations; 379 int txpower; 380 struct wmi_wmm_params_all_arg wmm_params; 381 struct work_struct ap_csa_work; 382 struct delayed_work connection_loss_work; 383 struct cfg80211_bitrate_mask bitrate_mask; 384 }; 385 386 struct ath10k_vif_iter { 387 u32 vdev_id; 388 struct ath10k_vif *arvif; 389 }; 390 391 /* used for crash-dump storage, protected by data-lock */ 392 struct ath10k_fw_crash_data { 393 bool crashed_since_read; 394 395 uuid_le uuid; 396 struct timespec timestamp; 397 __le32 registers[REG_DUMP_COUNT_QCA988X]; 398 }; 399 400 struct ath10k_debug { 401 struct dentry *debugfs_phy; 402 403 struct ath10k_fw_stats fw_stats; 404 struct completion fw_stats_complete; 405 bool fw_stats_done; 406 407 unsigned long htt_stats_mask; 408 struct delayed_work htt_stats_dwork; 409 struct ath10k_dfs_stats dfs_stats; 410 struct ath_dfs_pool_stats dfs_pool_stats; 411 412 /* used for tpc-dump storage, protected by data-lock */ 413 struct ath10k_tpc_stats *tpc_stats; 414 415 struct completion tpc_complete; 416 417 /* protected by conf_mutex */ 418 u32 fw_dbglog_mask; 419 u32 fw_dbglog_level; 420 u32 pktlog_filter; 421 u32 reg_addr; 422 u32 nf_cal_period; 423 424 struct ath10k_fw_crash_data *fw_crash_data; 425 }; 426 427 enum ath10k_state { 428 ATH10K_STATE_OFF = 0, 429 ATH10K_STATE_ON, 430 431 /* When doing firmware recovery the device is first powered down. 432 * mac80211 is supposed to call in to start() hook later on. It is 433 * however possible that driver unloading and firmware crash overlap. 434 * mac80211 can wait on conf_mutex in stop() while the device is 435 * stopped in ath10k_core_restart() work holding conf_mutex. The state 436 * RESTARTED means that the device is up and mac80211 has started hw 437 * reconfiguration. Once mac80211 is done with the reconfiguration we 438 * set the state to STATE_ON in reconfig_complete(). */ 439 ATH10K_STATE_RESTARTING, 440 ATH10K_STATE_RESTARTED, 441 442 /* The device has crashed while restarting hw. This state is like ON 443 * but commands are blocked in HTC and -ECOMM response is given. This 444 * prevents completion timeouts and makes the driver more responsive to 445 * userspace commands. This is also prevents recursive recovery. */ 446 ATH10K_STATE_WEDGED, 447 448 /* factory tests */ 449 ATH10K_STATE_UTF, 450 }; 451 452 enum ath10k_firmware_mode { 453 /* the default mode, standard 802.11 functionality */ 454 ATH10K_FIRMWARE_MODE_NORMAL, 455 456 /* factory tests etc */ 457 ATH10K_FIRMWARE_MODE_UTF, 458 }; 459 460 enum ath10k_fw_features { 461 /* wmi_mgmt_rx_hdr contains extra RSSI information */ 462 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0, 463 464 /* Firmware from 10X branch. Deprecated, don't use in new code. */ 465 ATH10K_FW_FEATURE_WMI_10X = 1, 466 467 /* firmware support tx frame management over WMI, otherwise it's HTT */ 468 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2, 469 470 /* Firmware does not support P2P */ 471 ATH10K_FW_FEATURE_NO_P2P = 3, 472 473 /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature 474 * bit is required to be set as well. Deprecated, don't use in new 475 * code. 476 */ 477 ATH10K_FW_FEATURE_WMI_10_2 = 4, 478 479 /* Some firmware revisions lack proper multi-interface client powersave 480 * implementation. Enabling PS could result in connection drops, 481 * traffic stalls, etc. 482 */ 483 ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5, 484 485 /* Some firmware revisions have an incomplete WoWLAN implementation 486 * despite WMI service bit being advertised. This feature flag is used 487 * to distinguish whether WoWLAN is really supported or not. 488 */ 489 ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6, 490 491 /* Don't trust error code from otp.bin */ 492 ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7, 493 494 /* Some firmware revisions pad 4th hw address to 4 byte boundary making 495 * it 8 bytes long in Native Wifi Rx decap. 496 */ 497 ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8, 498 499 /* Firmware supports bypassing PLL setting on init. */ 500 ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9, 501 502 /* Raw mode support. If supported, FW supports receiving and trasmitting 503 * frames in raw mode. 504 */ 505 ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10, 506 507 /* Firmware Supports Adaptive CCA*/ 508 ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11, 509 510 /* Firmware supports management frame protection */ 511 ATH10K_FW_FEATURE_MFP_SUPPORT = 12, 512 513 /* keep last */ 514 ATH10K_FW_FEATURE_COUNT, 515 }; 516 517 enum ath10k_dev_flags { 518 /* Indicates that ath10k device is during CAC phase of DFS */ 519 ATH10K_CAC_RUNNING, 520 ATH10K_FLAG_CORE_REGISTERED, 521 522 /* Device has crashed and needs to restart. This indicates any pending 523 * waiters should immediately cancel instead of waiting for a time out. 524 */ 525 ATH10K_FLAG_CRASH_FLUSH, 526 527 /* Use Raw mode instead of native WiFi Tx/Rx encap mode. 528 * Raw mode supports both hardware and software crypto. Native WiFi only 529 * supports hardware crypto. 530 */ 531 ATH10K_FLAG_RAW_MODE, 532 533 /* Disable HW crypto engine */ 534 ATH10K_FLAG_HW_CRYPTO_DISABLED, 535 536 /* Bluetooth coexistance enabled */ 537 ATH10K_FLAG_BTCOEX, 538 }; 539 540 enum ath10k_cal_mode { 541 ATH10K_CAL_MODE_FILE, 542 ATH10K_CAL_MODE_OTP, 543 ATH10K_CAL_MODE_DT, 544 }; 545 546 enum ath10k_crypt_mode { 547 /* Only use hardware crypto engine */ 548 ATH10K_CRYPT_MODE_HW, 549 /* Only use software crypto engine */ 550 ATH10K_CRYPT_MODE_SW, 551 }; 552 553 static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode) 554 { 555 switch (mode) { 556 case ATH10K_CAL_MODE_FILE: 557 return "file"; 558 case ATH10K_CAL_MODE_OTP: 559 return "otp"; 560 case ATH10K_CAL_MODE_DT: 561 return "dt"; 562 } 563 564 return "unknown"; 565 } 566 567 enum ath10k_scan_state { 568 ATH10K_SCAN_IDLE, 569 ATH10K_SCAN_STARTING, 570 ATH10K_SCAN_RUNNING, 571 ATH10K_SCAN_ABORTING, 572 }; 573 574 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state) 575 { 576 switch (state) { 577 case ATH10K_SCAN_IDLE: 578 return "idle"; 579 case ATH10K_SCAN_STARTING: 580 return "starting"; 581 case ATH10K_SCAN_RUNNING: 582 return "running"; 583 case ATH10K_SCAN_ABORTING: 584 return "aborting"; 585 } 586 587 return "unknown"; 588 } 589 590 enum ath10k_tx_pause_reason { 591 ATH10K_TX_PAUSE_Q_FULL, 592 ATH10K_TX_PAUSE_MAX, 593 }; 594 595 struct ath10k { 596 struct ath_common ath_common; 597 struct ieee80211_hw *hw; 598 struct device *dev; 599 u8 mac_addr[ETH_ALEN]; 600 601 enum ath10k_hw_rev hw_rev; 602 u16 dev_id; 603 u32 chip_id; 604 u32 target_version; 605 u8 fw_version_major; 606 u32 fw_version_minor; 607 u16 fw_version_release; 608 u16 fw_version_build; 609 u32 fw_stats_req_mask; 610 u32 phy_capability; 611 u32 hw_min_tx_power; 612 u32 hw_max_tx_power; 613 u32 ht_cap_info; 614 u32 vht_cap_info; 615 u32 num_rf_chains; 616 u32 max_spatial_stream; 617 /* protected by conf_mutex */ 618 bool ani_enabled; 619 620 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT); 621 622 bool p2p; 623 624 struct { 625 enum ath10k_bus bus; 626 const struct ath10k_hif_ops *ops; 627 } hif; 628 629 struct completion target_suspend; 630 631 const struct ath10k_hw_regs *regs; 632 const struct ath10k_hw_values *hw_values; 633 struct ath10k_bmi bmi; 634 struct ath10k_wmi wmi; 635 struct ath10k_htc htc; 636 struct ath10k_htt htt; 637 638 struct ath10k_hw_params { 639 u32 id; 640 u16 dev_id; 641 const char *name; 642 u32 patch_load_addr; 643 int uart_pin; 644 u32 otp_exe_param; 645 646 /* This is true if given HW chip has a quirky Cycle Counter 647 * wraparound which resets to 0x7fffffff instead of 0. All 648 * other CC related counters (e.g. Rx Clear Count) are divided 649 * by 2 so they never wraparound themselves. 650 */ 651 bool has_shifted_cc_wraparound; 652 653 /* Some of chip expects fragment descriptor to be continuous 654 * memory for any TX operation. Set continuous_frag_desc flag 655 * for the hardware which have such requirement. 656 */ 657 bool continuous_frag_desc; 658 659 u32 channel_counters_freq_hz; 660 661 /* Mgmt tx descriptors threshold for limiting probe response 662 * frames. 663 */ 664 u32 max_probe_resp_desc_thres; 665 666 /* The padding bytes's location is different on various chips */ 667 enum ath10k_hw_4addr_pad hw_4addr_pad; 668 669 struct ath10k_hw_params_fw { 670 const char *dir; 671 const char *fw; 672 const char *otp; 673 const char *board; 674 size_t board_size; 675 size_t board_ext_size; 676 } fw; 677 } hw_params; 678 679 const struct firmware *board; 680 const void *board_data; 681 size_t board_len; 682 683 const struct firmware *otp; 684 const void *otp_data; 685 size_t otp_len; 686 687 const struct firmware *firmware; 688 const void *firmware_data; 689 size_t firmware_len; 690 691 const struct firmware *cal_file; 692 693 struct { 694 const void *firmware_codeswap_data; 695 size_t firmware_codeswap_len; 696 struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info; 697 } swap; 698 699 struct { 700 u32 vendor; 701 u32 device; 702 u32 subsystem_vendor; 703 u32 subsystem_device; 704 705 bool bmi_ids_valid; 706 u8 bmi_board_id; 707 u8 bmi_chip_id; 708 } id; 709 710 int fw_api; 711 int bd_api; 712 enum ath10k_cal_mode cal_mode; 713 714 struct { 715 struct completion started; 716 struct completion completed; 717 struct completion on_channel; 718 struct delayed_work timeout; 719 enum ath10k_scan_state state; 720 bool is_roc; 721 int vdev_id; 722 int roc_freq; 723 bool roc_notify; 724 } scan; 725 726 struct { 727 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; 728 } mac; 729 730 /* should never be NULL; needed for regular htt rx */ 731 struct ieee80211_channel *rx_channel; 732 733 /* valid during scan; needed for mgmt rx during scan */ 734 struct ieee80211_channel *scan_channel; 735 736 /* current operating channel definition */ 737 struct cfg80211_chan_def chandef; 738 739 unsigned long long free_vdev_map; 740 struct ath10k_vif *monitor_arvif; 741 bool monitor; 742 int monitor_vdev_id; 743 bool monitor_started; 744 unsigned int filter_flags; 745 unsigned long dev_flags; 746 bool dfs_block_radar_events; 747 748 /* protected by conf_mutex */ 749 bool radar_enabled; 750 int num_started_vdevs; 751 752 /* Protected by conf-mutex */ 753 u8 cfg_tx_chainmask; 754 u8 cfg_rx_chainmask; 755 756 struct completion install_key_done; 757 758 struct completion vdev_setup_done; 759 760 struct workqueue_struct *workqueue; 761 /* Auxiliary workqueue */ 762 struct workqueue_struct *workqueue_aux; 763 764 /* prevents concurrent FW reconfiguration */ 765 struct mutex conf_mutex; 766 767 /* protects shared structure data */ 768 spinlock_t data_lock; 769 770 struct list_head arvifs; 771 struct list_head peers; 772 wait_queue_head_t peer_mapping_wq; 773 774 /* protected by conf_mutex */ 775 int num_peers; 776 int num_stations; 777 778 int max_num_peers; 779 int max_num_stations; 780 int max_num_vdevs; 781 int max_num_tdls_vdevs; 782 int num_active_peers; 783 int num_tids; 784 785 struct work_struct svc_rdy_work; 786 struct sk_buff *svc_rdy_skb; 787 788 struct work_struct offchan_tx_work; 789 struct sk_buff_head offchan_tx_queue; 790 struct completion offchan_tx_completed; 791 struct sk_buff *offchan_tx_skb; 792 793 struct work_struct wmi_mgmt_tx_work; 794 struct sk_buff_head wmi_mgmt_tx_queue; 795 796 enum ath10k_state state; 797 798 struct work_struct register_work; 799 struct work_struct restart_work; 800 801 /* cycle count is reported twice for each visited channel during scan. 802 * access protected by data_lock */ 803 u32 survey_last_rx_clear_count; 804 u32 survey_last_cycle_count; 805 struct survey_info survey[ATH10K_NUM_CHANS]; 806 807 /* Channel info events are expected to come in pairs without and with 808 * COMPLETE flag set respectively for each channel visit during scan. 809 * 810 * However there are deviations from this rule. This flag is used to 811 * avoid reporting garbage data. 812 */ 813 bool ch_info_can_report_survey; 814 815 struct dfs_pattern_detector *dfs_detector; 816 817 unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */ 818 819 #ifdef CONFIG_ATH10K_DEBUGFS 820 struct ath10k_debug debug; 821 #endif 822 823 struct { 824 /* relay(fs) channel for spectral scan */ 825 struct rchan *rfs_chan_spec_scan; 826 827 /* spectral_mode and spec_config are protected by conf_mutex */ 828 enum ath10k_spectral_mode mode; 829 struct ath10k_spec_scan config; 830 } spectral; 831 832 struct { 833 /* protected by conf_mutex */ 834 const struct firmware *utf; 835 char utf_version[32]; 836 const void *utf_firmware_data; 837 size_t utf_firmware_len; 838 DECLARE_BITMAP(orig_fw_features, ATH10K_FW_FEATURE_COUNT); 839 enum ath10k_fw_wmi_op_version orig_wmi_op_version; 840 enum ath10k_fw_wmi_op_version op_version; 841 /* protected by data_lock */ 842 bool utf_monitor; 843 } testmode; 844 845 struct { 846 /* protected by data_lock */ 847 u32 fw_crash_counter; 848 u32 fw_warm_reset_counter; 849 u32 fw_cold_reset_counter; 850 } stats; 851 852 struct ath10k_thermal thermal; 853 struct ath10k_wow wow; 854 855 /* must be last */ 856 u8 drv_priv[0] __aligned(sizeof(void *)); 857 }; 858 859 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 860 enum ath10k_bus bus, 861 enum ath10k_hw_rev hw_rev, 862 const struct ath10k_hif_ops *hif_ops); 863 void ath10k_core_destroy(struct ath10k *ar); 864 void ath10k_core_get_fw_features_str(struct ath10k *ar, 865 char *buf, 866 size_t max_len); 867 868 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode); 869 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt); 870 void ath10k_core_stop(struct ath10k *ar); 871 int ath10k_core_register(struct ath10k *ar, u32 chip_id); 872 void ath10k_core_unregister(struct ath10k *ar); 873 874 #endif /* _CORE_H_ */ 875