1 /* SPDX-License-Identifier: ISC */ 2 /* 3 * Copyright (c) 2005-2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. 6 */ 7 8 #ifndef _CORE_H_ 9 #define _CORE_H_ 10 11 #include <linux/completion.h> 12 #include <linux/if_ether.h> 13 #include <linux/types.h> 14 #include <linux/pci.h> 15 #include <linux/uuid.h> 16 #include <linux/time.h> 17 18 #include "htt.h" 19 #include "htc.h" 20 #include "hw.h" 21 #include "targaddrs.h" 22 #include "wmi.h" 23 #include "../ath.h" 24 #include "../regd.h" 25 #include "../dfs_pattern_detector.h" 26 #include "spectral.h" 27 #include "thermal.h" 28 #include "wow.h" 29 #include "swap.h" 30 31 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB) 32 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 33 #define WO(_f) ((_f##_OFFSET) >> 2) 34 35 #define ATH10K_SCAN_ID 0 36 #define ATH10K_SCAN_CHANNEL_SWITCH_WMI_EVT_OVERHEAD 10 /* msec */ 37 #define WMI_READY_TIMEOUT (5 * HZ) 38 #define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ) 39 #define ATH10K_CONNECTION_LOSS_HZ (3 * HZ) 40 #define ATH10K_NUM_CHANS 41 41 #define ATH10K_MAX_5G_CHAN 173 42 43 /* Antenna noise floor */ 44 #define ATH10K_DEFAULT_NOISE_FLOOR -95 45 46 #define ATH10K_INVALID_RSSI 128 47 48 #define ATH10K_MAX_NUM_MGMT_PENDING 128 49 50 /* number of failed packets (20 packets with 16 sw reties each) */ 51 #define ATH10K_KICKOUT_THRESHOLD (20 * 16) 52 53 /* 54 * Use insanely high numbers to make sure that the firmware implementation 55 * won't start, we have the same functionality already in hostapd. Unit 56 * is seconds. 57 */ 58 #define ATH10K_KEEPALIVE_MIN_IDLE 3747 59 #define ATH10K_KEEPALIVE_MAX_IDLE 3895 60 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900 61 62 /* NAPI poll budget */ 63 #define ATH10K_NAPI_BUDGET 64 64 65 /* SMBIOS type containing Board Data File Name Extension */ 66 #define ATH10K_SMBIOS_BDF_EXT_TYPE 0xF8 67 68 /* SMBIOS type structure length (excluding strings-set) */ 69 #define ATH10K_SMBIOS_BDF_EXT_LENGTH 0x9 70 71 /* Offset pointing to Board Data File Name Extension */ 72 #define ATH10K_SMBIOS_BDF_EXT_OFFSET 0x8 73 74 /* Board Data File Name Extension string length. 75 * String format: BDF_<Customer ID>_<Extension>\0 76 */ 77 #define ATH10K_SMBIOS_BDF_EXT_STR_LENGTH 0x20 78 79 /* The magic used by QCA spec */ 80 #define ATH10K_SMBIOS_BDF_EXT_MAGIC "BDF_" 81 82 /* Default Airtime weight multipler (Tuned for multiclient performance) */ 83 #define ATH10K_AIRTIME_WEIGHT_MULTIPLIER 4 84 85 #define ATH10K_MAX_RETRY_COUNT 30 86 87 struct ath10k; 88 89 static inline const char *ath10k_bus_str(enum ath10k_bus bus) 90 { 91 switch (bus) { 92 case ATH10K_BUS_PCI: 93 return "pci"; 94 case ATH10K_BUS_AHB: 95 return "ahb"; 96 case ATH10K_BUS_SDIO: 97 return "sdio"; 98 case ATH10K_BUS_USB: 99 return "usb"; 100 case ATH10K_BUS_SNOC: 101 return "snoc"; 102 } 103 104 return "unknown"; 105 } 106 107 enum ath10k_skb_flags { 108 ATH10K_SKB_F_NO_HWCRYPT = BIT(0), 109 ATH10K_SKB_F_DTIM_ZERO = BIT(1), 110 ATH10K_SKB_F_DELIVER_CAB = BIT(2), 111 ATH10K_SKB_F_MGMT = BIT(3), 112 ATH10K_SKB_F_QOS = BIT(4), 113 ATH10K_SKB_F_RAW_TX = BIT(5), 114 ATH10K_SKB_F_NOACK_TID = BIT(6), 115 }; 116 117 struct ath10k_skb_cb { 118 dma_addr_t paddr; 119 u8 flags; 120 u8 eid; 121 u16 msdu_id; 122 u16 airtime_est; 123 struct ieee80211_vif *vif; 124 struct ieee80211_txq *txq; 125 u32 ucast_cipher; 126 } __packed; 127 128 struct ath10k_skb_rxcb { 129 dma_addr_t paddr; 130 struct hlist_node hlist; 131 u8 eid; 132 }; 133 134 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb) 135 { 136 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) > 137 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 138 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 139 } 140 141 static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb) 142 { 143 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb)); 144 return (struct ath10k_skb_rxcb *)skb->cb; 145 } 146 147 #define ATH10K_RXCB_SKB(rxcb) \ 148 container_of((void *)rxcb, struct sk_buff, cb) 149 150 static inline u32 host_interest_item_address(u32 item_offset) 151 { 152 return QCA988X_HOST_INTEREST_ADDRESS + item_offset; 153 } 154 155 enum ath10k_phy_mode { 156 ATH10K_PHY_MODE_LEGACY = 0, 157 ATH10K_PHY_MODE_HT = 1, 158 ATH10K_PHY_MODE_VHT = 2, 159 }; 160 161 /* Data rate 100KBPS based on IE Index */ 162 struct ath10k_index_ht_data_rate_type { 163 u8 beacon_rate_index; 164 u16 supported_rate[4]; 165 }; 166 167 /* Data rate 100KBPS based on IE Index */ 168 struct ath10k_index_vht_data_rate_type { 169 u8 beacon_rate_index; 170 u16 supported_VHT80_rate[2]; 171 u16 supported_VHT40_rate[2]; 172 u16 supported_VHT20_rate[2]; 173 }; 174 175 struct ath10k_bmi { 176 bool done_sent; 177 }; 178 179 struct ath10k_mem_chunk { 180 void *vaddr; 181 dma_addr_t paddr; 182 u32 len; 183 u32 req_id; 184 }; 185 186 struct ath10k_wmi { 187 enum ath10k_htc_ep_id eid; 188 struct completion service_ready; 189 struct completion unified_ready; 190 struct completion barrier; 191 struct completion radar_confirm; 192 wait_queue_head_t tx_credits_wq; 193 DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX); 194 struct wmi_cmd_map *cmd; 195 struct wmi_vdev_param_map *vdev_param; 196 struct wmi_pdev_param_map *pdev_param; 197 struct wmi_peer_param_map *peer_param; 198 const struct wmi_ops *ops; 199 const struct wmi_peer_flags_map *peer_flags; 200 201 u32 mgmt_max_num_pending_tx; 202 203 /* Protected by data_lock */ 204 struct idr mgmt_pending_tx; 205 206 u32 num_mem_chunks; 207 u32 rx_decap_mode; 208 struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS]; 209 }; 210 211 struct ath10k_fw_stats_peer { 212 struct list_head list; 213 214 u8 peer_macaddr[ETH_ALEN]; 215 u32 peer_rssi; 216 u32 peer_tx_rate; 217 u32 peer_rx_rate; /* 10x only */ 218 u64 rx_duration; 219 }; 220 221 struct ath10k_fw_extd_stats_peer { 222 struct list_head list; 223 224 u8 peer_macaddr[ETH_ALEN]; 225 u64 rx_duration; 226 }; 227 228 struct ath10k_fw_stats_vdev { 229 struct list_head list; 230 231 u32 vdev_id; 232 u32 beacon_snr; 233 u32 data_snr; 234 u32 num_tx_frames[4]; 235 u32 num_rx_frames; 236 u32 num_tx_frames_retries[4]; 237 u32 num_tx_frames_failures[4]; 238 u32 num_rts_fail; 239 u32 num_rts_success; 240 u32 num_rx_err; 241 u32 num_rx_discard; 242 u32 num_tx_not_acked; 243 u32 tx_rate_history[10]; 244 u32 beacon_rssi_history[10]; 245 }; 246 247 struct ath10k_fw_stats_vdev_extd { 248 struct list_head list; 249 250 u32 vdev_id; 251 u32 ppdu_aggr_cnt; 252 u32 ppdu_noack; 253 u32 mpdu_queued; 254 u32 ppdu_nonaggr_cnt; 255 u32 mpdu_sw_requeued; 256 u32 mpdu_suc_retry; 257 u32 mpdu_suc_multitry; 258 u32 mpdu_fail_retry; 259 u32 tx_ftm_suc; 260 u32 tx_ftm_suc_retry; 261 u32 tx_ftm_fail; 262 u32 rx_ftmr_cnt; 263 u32 rx_ftmr_dup_cnt; 264 u32 rx_iftmr_cnt; 265 u32 rx_iftmr_dup_cnt; 266 }; 267 268 struct ath10k_fw_stats_pdev { 269 struct list_head list; 270 271 /* PDEV stats */ 272 s32 ch_noise_floor; 273 u32 tx_frame_count; /* Cycles spent transmitting frames */ 274 u32 rx_frame_count; /* Cycles spent receiving frames */ 275 u32 rx_clear_count; /* Total channel busy time, evidently */ 276 u32 cycle_count; /* Total on-channel time */ 277 u32 phy_err_count; 278 u32 chan_tx_power; 279 u32 ack_rx_bad; 280 u32 rts_bad; 281 u32 rts_good; 282 u32 fcs_bad; 283 u32 no_beacons; 284 u32 mib_int_count; 285 286 /* PDEV TX stats */ 287 s32 comp_queued; 288 s32 comp_delivered; 289 s32 msdu_enqued; 290 s32 mpdu_enqued; 291 s32 wmm_drop; 292 s32 local_enqued; 293 s32 local_freed; 294 s32 hw_queued; 295 s32 hw_reaped; 296 s32 underrun; 297 u32 hw_paused; 298 s32 tx_abort; 299 s32 mpdus_requed; 300 u32 tx_ko; 301 u32 data_rc; 302 u32 self_triggers; 303 u32 sw_retry_failure; 304 u32 illgl_rate_phy_err; 305 u32 pdev_cont_xretry; 306 u32 pdev_tx_timeout; 307 u32 pdev_resets; 308 u32 phy_underrun; 309 u32 txop_ovf; 310 u32 seq_posted; 311 u32 seq_failed_queueing; 312 u32 seq_completed; 313 u32 seq_restarted; 314 u32 mu_seq_posted; 315 u32 mpdus_sw_flush; 316 u32 mpdus_hw_filter; 317 u32 mpdus_truncated; 318 u32 mpdus_ack_failed; 319 u32 mpdus_expired; 320 321 /* PDEV RX stats */ 322 s32 mid_ppdu_route_change; 323 s32 status_rcvd; 324 s32 r0_frags; 325 s32 r1_frags; 326 s32 r2_frags; 327 s32 r3_frags; 328 s32 htt_msdus; 329 s32 htt_mpdus; 330 s32 loc_msdus; 331 s32 loc_mpdus; 332 s32 oversize_amsdu; 333 s32 phy_errs; 334 s32 phy_err_drop; 335 s32 mpdu_errs; 336 s32 rx_ovfl_errs; 337 }; 338 339 struct ath10k_fw_stats { 340 bool extended; 341 struct list_head pdevs; 342 struct list_head vdevs; 343 struct list_head peers; 344 struct list_head peers_extd; 345 }; 346 347 #define ATH10K_TPC_TABLE_TYPE_FLAG 1 348 #define ATH10K_TPC_PREAM_TABLE_END 0xFFFF 349 350 struct ath10k_tpc_table { 351 u32 pream_idx[WMI_TPC_RATE_MAX]; 352 u8 rate_code[WMI_TPC_RATE_MAX]; 353 char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; 354 }; 355 356 struct ath10k_tpc_stats { 357 u32 reg_domain; 358 u32 chan_freq; 359 u32 phy_mode; 360 u32 twice_antenna_reduction; 361 u32 twice_max_rd_power; 362 s32 twice_antenna_gain; 363 u32 power_limit; 364 u32 num_tx_chain; 365 u32 ctl; 366 u32 rate_max; 367 u8 flag[WMI_TPC_FLAG]; 368 struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG]; 369 }; 370 371 struct ath10k_tpc_table_final { 372 u32 pream_idx[WMI_TPC_FINAL_RATE_MAX]; 373 u8 rate_code[WMI_TPC_FINAL_RATE_MAX]; 374 char tpc_value[WMI_TPC_FINAL_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; 375 }; 376 377 struct ath10k_tpc_stats_final { 378 u32 reg_domain; 379 u32 chan_freq; 380 u32 phy_mode; 381 u32 twice_antenna_reduction; 382 u32 twice_max_rd_power; 383 s32 twice_antenna_gain; 384 u32 power_limit; 385 u32 num_tx_chain; 386 u32 ctl; 387 u32 rate_max; 388 u8 flag[WMI_TPC_FLAG]; 389 struct ath10k_tpc_table_final tpc_table_final[WMI_TPC_FLAG]; 390 }; 391 392 struct ath10k_dfs_stats { 393 u32 phy_errors; 394 u32 pulses_total; 395 u32 pulses_detected; 396 u32 pulses_discarded; 397 u32 radar_detected; 398 }; 399 400 enum ath10k_radar_confirmation_state { 401 ATH10K_RADAR_CONFIRMATION_IDLE = 0, 402 ATH10K_RADAR_CONFIRMATION_INPROGRESS, 403 ATH10K_RADAR_CONFIRMATION_STOPPED, 404 }; 405 406 struct ath10k_radar_found_info { 407 u32 pri_min; 408 u32 pri_max; 409 u32 width_min; 410 u32 width_max; 411 u32 sidx_min; 412 u32 sidx_max; 413 }; 414 415 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */ 416 417 struct ath10k_peer { 418 struct list_head list; 419 struct ieee80211_vif *vif; 420 struct ieee80211_sta *sta; 421 422 bool removed; 423 int vdev_id; 424 u8 addr[ETH_ALEN]; 425 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS); 426 427 /* protected by ar->data_lock */ 428 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1]; 429 union htt_rx_pn_t tids_last_pn[ATH10K_TXRX_NUM_EXT_TIDS]; 430 bool tids_last_pn_valid[ATH10K_TXRX_NUM_EXT_TIDS]; 431 union htt_rx_pn_t frag_tids_last_pn[ATH10K_TXRX_NUM_EXT_TIDS]; 432 u32 frag_tids_seq[ATH10K_TXRX_NUM_EXT_TIDS]; 433 struct { 434 enum htt_security_types sec_type; 435 int pn_len; 436 } rx_pn[ATH10K_HTT_TXRX_PEER_SECURITY_MAX]; 437 }; 438 439 struct ath10k_txq { 440 struct list_head list; 441 unsigned long num_fw_queued; 442 unsigned long num_push_allowed; 443 }; 444 445 enum ath10k_pkt_rx_err { 446 ATH10K_PKT_RX_ERR_FCS, 447 ATH10K_PKT_RX_ERR_TKIP, 448 ATH10K_PKT_RX_ERR_CRYPT, 449 ATH10K_PKT_RX_ERR_PEER_IDX_INVAL, 450 ATH10K_PKT_RX_ERR_MAX, 451 }; 452 453 enum ath10k_ampdu_subfrm_num { 454 ATH10K_AMPDU_SUBFRM_NUM_10, 455 ATH10K_AMPDU_SUBFRM_NUM_20, 456 ATH10K_AMPDU_SUBFRM_NUM_30, 457 ATH10K_AMPDU_SUBFRM_NUM_40, 458 ATH10K_AMPDU_SUBFRM_NUM_50, 459 ATH10K_AMPDU_SUBFRM_NUM_60, 460 ATH10K_AMPDU_SUBFRM_NUM_MORE, 461 ATH10K_AMPDU_SUBFRM_NUM_MAX, 462 }; 463 464 enum ath10k_amsdu_subfrm_num { 465 ATH10K_AMSDU_SUBFRM_NUM_1, 466 ATH10K_AMSDU_SUBFRM_NUM_2, 467 ATH10K_AMSDU_SUBFRM_NUM_3, 468 ATH10K_AMSDU_SUBFRM_NUM_4, 469 ATH10K_AMSDU_SUBFRM_NUM_MORE, 470 ATH10K_AMSDU_SUBFRM_NUM_MAX, 471 }; 472 473 struct ath10k_sta_tid_stats { 474 unsigned long rx_pkt_from_fw; 475 unsigned long rx_pkt_unchained; 476 unsigned long rx_pkt_drop_chained; 477 unsigned long rx_pkt_drop_filter; 478 unsigned long rx_pkt_err[ATH10K_PKT_RX_ERR_MAX]; 479 unsigned long rx_pkt_queued_for_mac; 480 unsigned long rx_pkt_ampdu[ATH10K_AMPDU_SUBFRM_NUM_MAX]; 481 unsigned long rx_pkt_amsdu[ATH10K_AMSDU_SUBFRM_NUM_MAX]; 482 }; 483 484 enum ath10k_counter_type { 485 ATH10K_COUNTER_TYPE_BYTES, 486 ATH10K_COUNTER_TYPE_PKTS, 487 ATH10K_COUNTER_TYPE_MAX, 488 }; 489 490 enum ath10k_stats_type { 491 ATH10K_STATS_TYPE_SUCC, 492 ATH10K_STATS_TYPE_FAIL, 493 ATH10K_STATS_TYPE_RETRY, 494 ATH10K_STATS_TYPE_AMPDU, 495 ATH10K_STATS_TYPE_MAX, 496 }; 497 498 struct ath10k_htt_data_stats { 499 u64 legacy[ATH10K_COUNTER_TYPE_MAX][ATH10K_LEGACY_NUM]; 500 u64 ht[ATH10K_COUNTER_TYPE_MAX][ATH10K_HT_MCS_NUM]; 501 u64 vht[ATH10K_COUNTER_TYPE_MAX][ATH10K_VHT_MCS_NUM]; 502 u64 bw[ATH10K_COUNTER_TYPE_MAX][ATH10K_BW_NUM]; 503 u64 nss[ATH10K_COUNTER_TYPE_MAX][ATH10K_NSS_NUM]; 504 u64 gi[ATH10K_COUNTER_TYPE_MAX][ATH10K_GI_NUM]; 505 u64 rate_table[ATH10K_COUNTER_TYPE_MAX][ATH10K_RATE_TABLE_NUM]; 506 }; 507 508 struct ath10k_htt_tx_stats { 509 struct ath10k_htt_data_stats stats[ATH10K_STATS_TYPE_MAX]; 510 u64 tx_duration; 511 u64 ba_fails; 512 u64 ack_fails; 513 }; 514 515 #define ATH10K_TID_MAX 8 516 517 struct ath10k_sta { 518 struct ath10k_vif *arvif; 519 520 /* the following are protected by ar->data_lock */ 521 u32 changed; /* IEEE80211_RC_* */ 522 u32 bw; 523 u32 nss; 524 u32 smps; 525 u16 peer_id; 526 struct rate_info txrate; 527 struct ieee80211_tx_info tx_info; 528 u32 tx_retries; 529 u32 tx_failed; 530 u32 last_tx_bitrate; 531 532 u32 rx_rate_code; 533 u32 rx_bitrate_kbps; 534 u32 tx_rate_code; 535 u32 tx_bitrate_kbps; 536 struct work_struct update_wk; 537 u64 rx_duration; 538 struct ath10k_htt_tx_stats *tx_stats; 539 u32 ucast_cipher; 540 541 #ifdef CONFIG_MAC80211_DEBUGFS 542 /* protected by conf_mutex */ 543 bool aggr_mode; 544 545 /* Protected with ar->data_lock */ 546 struct ath10k_sta_tid_stats tid_stats[IEEE80211_NUM_TIDS + 1]; 547 #endif 548 /* Protected with ar->data_lock */ 549 u32 peer_ps_state; 550 struct work_struct tid_config_wk; 551 int noack[ATH10K_TID_MAX]; 552 int retry_long[ATH10K_TID_MAX]; 553 int ampdu[ATH10K_TID_MAX]; 554 u8 rate_ctrl[ATH10K_TID_MAX]; 555 u32 rate_code[ATH10K_TID_MAX]; 556 int rtscts[ATH10K_TID_MAX]; 557 }; 558 559 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ) 560 #define ATH10K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ) 561 562 enum ath10k_beacon_state { 563 ATH10K_BEACON_SCHEDULED = 0, 564 ATH10K_BEACON_SENDING, 565 ATH10K_BEACON_SENT, 566 }; 567 568 struct ath10k_vif { 569 struct list_head list; 570 571 u32 vdev_id; 572 u16 peer_id; 573 enum wmi_vdev_type vdev_type; 574 enum wmi_vdev_subtype vdev_subtype; 575 u32 beacon_interval; 576 u32 dtim_period; 577 struct sk_buff *beacon; 578 /* protected by data_lock */ 579 enum ath10k_beacon_state beacon_state; 580 void *beacon_buf; 581 dma_addr_t beacon_paddr; 582 unsigned long tx_paused; /* arbitrary values defined by target */ 583 584 struct ath10k *ar; 585 struct ieee80211_vif *vif; 586 587 bool is_started; 588 bool is_up; 589 bool spectral_enabled; 590 bool ps; 591 u32 aid; 592 u8 bssid[ETH_ALEN]; 593 594 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1]; 595 s8 def_wep_key_idx; 596 597 u16 tx_seq_no; 598 599 union { 600 struct { 601 u32 uapsd; 602 } sta; 603 struct { 604 /* 512 stations */ 605 u8 tim_bitmap[64]; 606 u8 tim_len; 607 u32 ssid_len; 608 u8 ssid[IEEE80211_MAX_SSID_LEN]; 609 bool hidden_ssid; 610 /* P2P_IE with NoA attribute for P2P_GO case */ 611 u32 noa_len; 612 u8 *noa_data; 613 } ap; 614 } u; 615 616 bool use_cts_prot; 617 bool nohwcrypt; 618 int num_legacy_stations; 619 int txpower; 620 bool ftm_responder; 621 struct wmi_wmm_params_all_arg wmm_params; 622 struct work_struct ap_csa_work; 623 struct delayed_work connection_loss_work; 624 struct cfg80211_bitrate_mask bitrate_mask; 625 626 /* For setting VHT peer fixed rate, protected by conf_mutex */ 627 int vht_num_rates; 628 u8 vht_pfr; 629 u32 tid_conf_changed[ATH10K_TID_MAX]; 630 int noack[ATH10K_TID_MAX]; 631 int retry_long[ATH10K_TID_MAX]; 632 int ampdu[ATH10K_TID_MAX]; 633 u8 rate_ctrl[ATH10K_TID_MAX]; 634 u32 rate_code[ATH10K_TID_MAX]; 635 int rtscts[ATH10K_TID_MAX]; 636 u32 tids_rst; 637 }; 638 639 struct ath10k_vif_iter { 640 u32 vdev_id; 641 struct ath10k_vif *arvif; 642 }; 643 644 /* Copy Engine register dump, protected by ce-lock */ 645 struct ath10k_ce_crash_data { 646 __le32 base_addr; 647 __le32 src_wr_idx; 648 __le32 src_r_idx; 649 __le32 dst_wr_idx; 650 __le32 dst_r_idx; 651 }; 652 653 struct ath10k_ce_crash_hdr { 654 __le32 ce_count; 655 __le32 reserved[3]; /* for future use */ 656 struct ath10k_ce_crash_data entries[]; 657 }; 658 659 #define MAX_MEM_DUMP_TYPE 5 660 661 /* used for crash-dump storage, protected by data-lock */ 662 struct ath10k_fw_crash_data { 663 guid_t guid; 664 struct timespec64 timestamp; 665 __le32 registers[REG_DUMP_COUNT_QCA988X]; 666 struct ath10k_ce_crash_data ce_crash_data[CE_COUNT_MAX]; 667 668 u8 *ramdump_buf; 669 size_t ramdump_buf_len; 670 }; 671 672 struct ath10k_debug { 673 struct dentry *debugfs_phy; 674 675 struct ath10k_fw_stats fw_stats; 676 struct completion fw_stats_complete; 677 bool fw_stats_done; 678 679 unsigned long htt_stats_mask; 680 unsigned long reset_htt_stats; 681 struct delayed_work htt_stats_dwork; 682 struct ath10k_dfs_stats dfs_stats; 683 struct ath_dfs_pool_stats dfs_pool_stats; 684 685 /* used for tpc-dump storage, protected by data-lock */ 686 struct ath10k_tpc_stats *tpc_stats; 687 struct ath10k_tpc_stats_final *tpc_stats_final; 688 689 struct completion tpc_complete; 690 691 /* protected by conf_mutex */ 692 u64 fw_dbglog_mask; 693 u32 fw_dbglog_level; 694 u32 reg_addr; 695 u32 nf_cal_period; 696 void *cal_data; 697 u32 enable_extd_tx_stats; 698 u8 fw_dbglog_mode; 699 }; 700 701 enum ath10k_state { 702 ATH10K_STATE_OFF = 0, 703 ATH10K_STATE_ON, 704 705 /* When doing firmware recovery the device is first powered down. 706 * mac80211 is supposed to call in to start() hook later on. It is 707 * however possible that driver unloading and firmware crash overlap. 708 * mac80211 can wait on conf_mutex in stop() while the device is 709 * stopped in ath10k_core_restart() work holding conf_mutex. The state 710 * RESTARTED means that the device is up and mac80211 has started hw 711 * reconfiguration. Once mac80211 is done with the reconfiguration we 712 * set the state to STATE_ON in reconfig_complete(). 713 */ 714 ATH10K_STATE_RESTARTING, 715 ATH10K_STATE_RESTARTED, 716 717 /* The device has crashed while restarting hw. This state is like ON 718 * but commands are blocked in HTC and -ECOMM response is given. This 719 * prevents completion timeouts and makes the driver more responsive to 720 * userspace commands. This is also prevents recursive recovery. 721 */ 722 ATH10K_STATE_WEDGED, 723 724 /* factory tests */ 725 ATH10K_STATE_UTF, 726 }; 727 728 enum ath10k_firmware_mode { 729 /* the default mode, standard 802.11 functionality */ 730 ATH10K_FIRMWARE_MODE_NORMAL, 731 732 /* factory tests etc */ 733 ATH10K_FIRMWARE_MODE_UTF, 734 }; 735 736 enum ath10k_fw_features { 737 /* wmi_mgmt_rx_hdr contains extra RSSI information */ 738 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0, 739 740 /* Firmware from 10X branch. Deprecated, don't use in new code. */ 741 ATH10K_FW_FEATURE_WMI_10X = 1, 742 743 /* firmware support tx frame management over WMI, otherwise it's HTT */ 744 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2, 745 746 /* Firmware does not support P2P */ 747 ATH10K_FW_FEATURE_NO_P2P = 3, 748 749 /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature 750 * bit is required to be set as well. Deprecated, don't use in new 751 * code. 752 */ 753 ATH10K_FW_FEATURE_WMI_10_2 = 4, 754 755 /* Some firmware revisions lack proper multi-interface client powersave 756 * implementation. Enabling PS could result in connection drops, 757 * traffic stalls, etc. 758 */ 759 ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5, 760 761 /* Some firmware revisions have an incomplete WoWLAN implementation 762 * despite WMI service bit being advertised. This feature flag is used 763 * to distinguish whether WoWLAN is really supported or not. 764 */ 765 ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6, 766 767 /* Don't trust error code from otp.bin */ 768 ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7, 769 770 /* Some firmware revisions pad 4th hw address to 4 byte boundary making 771 * it 8 bytes long in Native Wifi Rx decap. 772 */ 773 ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8, 774 775 /* Firmware supports bypassing PLL setting on init. */ 776 ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9, 777 778 /* Raw mode support. If supported, FW supports receiving and trasmitting 779 * frames in raw mode. 780 */ 781 ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10, 782 783 /* Firmware Supports Adaptive CCA*/ 784 ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11, 785 786 /* Firmware supports management frame protection */ 787 ATH10K_FW_FEATURE_MFP_SUPPORT = 12, 788 789 /* Firmware supports pull-push model where host shares it's software 790 * queue state with firmware and firmware generates fetch requests 791 * telling host which queues to dequeue tx from. 792 * 793 * Primary function of this is improved MU-MIMO performance with 794 * multiple clients. 795 */ 796 ATH10K_FW_FEATURE_PEER_FLOW_CONTROL = 13, 797 798 /* Firmware supports BT-Coex without reloading firmware via pdev param. 799 * To support Bluetooth coexistence pdev param, WMI_COEX_GPIO_SUPPORT of 800 * extended resource config should be enabled always. This firmware IE 801 * is used to configure WMI_COEX_GPIO_SUPPORT. 802 */ 803 ATH10K_FW_FEATURE_BTCOEX_PARAM = 14, 804 805 /* Unused flag and proven to be not working, enable this if you want 806 * to experiment sending NULL func data frames in HTT TX 807 */ 808 ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR = 15, 809 810 /* Firmware allow other BSS mesh broadcast/multicast frames without 811 * creating monitor interface. Appropriate rxfilters are programmed for 812 * mesh vdev by firmware itself. This feature flags will be used for 813 * not creating monitor vdev while configuring mesh node. 814 */ 815 ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST = 16, 816 817 /* Firmware does not support power save in station mode. */ 818 ATH10K_FW_FEATURE_NO_PS = 17, 819 820 /* Firmware allows management tx by reference instead of by value. */ 821 ATH10K_FW_FEATURE_MGMT_TX_BY_REF = 18, 822 823 /* Firmware load is done externally, not by bmi */ 824 ATH10K_FW_FEATURE_NON_BMI = 19, 825 826 /* Firmware sends only one chan_info event per channel */ 827 ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL = 20, 828 829 /* Firmware allows setting peer fixed rate */ 830 ATH10K_FW_FEATURE_PEER_FIXED_RATE = 21, 831 832 /* keep last */ 833 ATH10K_FW_FEATURE_COUNT, 834 }; 835 836 enum ath10k_dev_flags { 837 /* Indicates that ath10k device is during CAC phase of DFS */ 838 ATH10K_CAC_RUNNING, 839 ATH10K_FLAG_CORE_REGISTERED, 840 841 /* Device has crashed and needs to restart. This indicates any pending 842 * waiters should immediately cancel instead of waiting for a time out. 843 */ 844 ATH10K_FLAG_CRASH_FLUSH, 845 846 /* Use Raw mode instead of native WiFi Tx/Rx encap mode. 847 * Raw mode supports both hardware and software crypto. Native WiFi only 848 * supports hardware crypto. 849 */ 850 ATH10K_FLAG_RAW_MODE, 851 852 /* Disable HW crypto engine */ 853 ATH10K_FLAG_HW_CRYPTO_DISABLED, 854 855 /* Bluetooth coexistance enabled */ 856 ATH10K_FLAG_BTCOEX, 857 858 /* Per Station statistics service */ 859 ATH10K_FLAG_PEER_STATS, 860 }; 861 862 enum ath10k_cal_mode { 863 ATH10K_CAL_MODE_FILE, 864 ATH10K_CAL_MODE_OTP, 865 ATH10K_CAL_MODE_DT, 866 ATH10K_PRE_CAL_MODE_FILE, 867 ATH10K_PRE_CAL_MODE_DT, 868 ATH10K_CAL_MODE_EEPROM, 869 }; 870 871 enum ath10k_crypt_mode { 872 /* Only use hardware crypto engine */ 873 ATH10K_CRYPT_MODE_HW, 874 /* Only use software crypto engine */ 875 ATH10K_CRYPT_MODE_SW, 876 }; 877 878 static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode) 879 { 880 switch (mode) { 881 case ATH10K_CAL_MODE_FILE: 882 return "file"; 883 case ATH10K_CAL_MODE_OTP: 884 return "otp"; 885 case ATH10K_CAL_MODE_DT: 886 return "dt"; 887 case ATH10K_PRE_CAL_MODE_FILE: 888 return "pre-cal-file"; 889 case ATH10K_PRE_CAL_MODE_DT: 890 return "pre-cal-dt"; 891 case ATH10K_CAL_MODE_EEPROM: 892 return "eeprom"; 893 } 894 895 return "unknown"; 896 } 897 898 enum ath10k_scan_state { 899 ATH10K_SCAN_IDLE, 900 ATH10K_SCAN_STARTING, 901 ATH10K_SCAN_RUNNING, 902 ATH10K_SCAN_ABORTING, 903 }; 904 905 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state) 906 { 907 switch (state) { 908 case ATH10K_SCAN_IDLE: 909 return "idle"; 910 case ATH10K_SCAN_STARTING: 911 return "starting"; 912 case ATH10K_SCAN_RUNNING: 913 return "running"; 914 case ATH10K_SCAN_ABORTING: 915 return "aborting"; 916 } 917 918 return "unknown"; 919 } 920 921 enum ath10k_tx_pause_reason { 922 ATH10K_TX_PAUSE_Q_FULL, 923 ATH10K_TX_PAUSE_MAX, 924 }; 925 926 struct ath10k_fw_file { 927 const struct firmware *firmware; 928 929 char fw_version[ETHTOOL_FWVERS_LEN]; 930 931 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT); 932 933 enum ath10k_fw_wmi_op_version wmi_op_version; 934 enum ath10k_fw_htt_op_version htt_op_version; 935 936 const void *firmware_data; 937 size_t firmware_len; 938 939 const void *otp_data; 940 size_t otp_len; 941 942 const void *codeswap_data; 943 size_t codeswap_len; 944 945 /* The original idea of struct ath10k_fw_file was that it only 946 * contains struct firmware and pointers to various parts (actual 947 * firmware binary, otp, metadata etc) of the file. This seg_info 948 * is actually created separate but as this is used similarly as 949 * the other firmware components it's more convenient to have it 950 * here. 951 */ 952 struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info; 953 }; 954 955 struct ath10k_fw_components { 956 const struct firmware *board; 957 const void *board_data; 958 size_t board_len; 959 const struct firmware *ext_board; 960 const void *ext_board_data; 961 size_t ext_board_len; 962 963 struct ath10k_fw_file fw_file; 964 }; 965 966 struct ath10k_per_peer_tx_stats { 967 u32 succ_bytes; 968 u32 retry_bytes; 969 u32 failed_bytes; 970 u8 ratecode; 971 u8 flags; 972 u16 peer_id; 973 u16 succ_pkts; 974 u16 retry_pkts; 975 u16 failed_pkts; 976 u16 duration; 977 u32 reserved1; 978 u32 reserved2; 979 }; 980 981 enum ath10k_dev_type { 982 ATH10K_DEV_TYPE_LL, 983 ATH10K_DEV_TYPE_HL, 984 }; 985 986 struct ath10k_bus_params { 987 u32 chip_id; 988 enum ath10k_dev_type dev_type; 989 bool link_can_suspend; 990 bool hl_msdu_ids; 991 }; 992 993 struct ath10k { 994 struct ath_common ath_common; 995 struct ieee80211_hw *hw; 996 struct ieee80211_ops *ops; 997 struct device *dev; 998 struct msa_region { 999 dma_addr_t paddr; 1000 u32 mem_size; 1001 void *vaddr; 1002 } msa; 1003 u8 mac_addr[ETH_ALEN]; 1004 1005 enum ath10k_hw_rev hw_rev; 1006 u16 dev_id; 1007 u32 chip_id; 1008 enum ath10k_dev_type dev_type; 1009 u32 target_version; 1010 u8 fw_version_major; 1011 u32 fw_version_minor; 1012 u16 fw_version_release; 1013 u16 fw_version_build; 1014 u32 fw_stats_req_mask; 1015 u32 phy_capability; 1016 u32 hw_min_tx_power; 1017 u32 hw_max_tx_power; 1018 u32 hw_eeprom_rd; 1019 u32 ht_cap_info; 1020 u32 vht_cap_info; 1021 u32 vht_supp_mcs; 1022 u32 num_rf_chains; 1023 u32 max_spatial_stream; 1024 /* protected by conf_mutex */ 1025 u32 low_2ghz_chan; 1026 u32 high_2ghz_chan; 1027 u32 low_5ghz_chan; 1028 u32 high_5ghz_chan; 1029 bool ani_enabled; 1030 u32 sys_cap_info; 1031 1032 /* protected by data_lock */ 1033 bool hw_rfkill_on; 1034 1035 /* protected by conf_mutex */ 1036 u8 ps_state_enable; 1037 1038 bool nlo_enabled; 1039 bool p2p; 1040 1041 struct { 1042 enum ath10k_bus bus; 1043 const struct ath10k_hif_ops *ops; 1044 } hif; 1045 1046 struct completion target_suspend; 1047 struct completion driver_recovery; 1048 1049 const struct ath10k_hw_regs *regs; 1050 const struct ath10k_hw_ce_regs *hw_ce_regs; 1051 const struct ath10k_hw_values *hw_values; 1052 struct ath10k_bmi bmi; 1053 struct ath10k_wmi wmi; 1054 struct ath10k_htc htc; 1055 struct ath10k_htt htt; 1056 1057 struct ath10k_hw_params hw_params; 1058 1059 /* contains the firmware images used with ATH10K_FIRMWARE_MODE_NORMAL */ 1060 struct ath10k_fw_components normal_mode_fw; 1061 1062 /* READ-ONLY images of the running firmware, which can be either 1063 * normal or UTF. Do not modify, release etc! 1064 */ 1065 const struct ath10k_fw_components *running_fw; 1066 1067 const struct firmware *pre_cal_file; 1068 const struct firmware *cal_file; 1069 1070 struct { 1071 u32 vendor; 1072 u32 device; 1073 u32 subsystem_vendor; 1074 u32 subsystem_device; 1075 1076 bool bmi_ids_valid; 1077 bool qmi_ids_valid; 1078 u32 qmi_board_id; 1079 u32 qmi_chip_id; 1080 u8 bmi_board_id; 1081 u8 bmi_eboard_id; 1082 u8 bmi_chip_id; 1083 bool ext_bid_supported; 1084 1085 char bdf_ext[ATH10K_SMBIOS_BDF_EXT_STR_LENGTH]; 1086 } id; 1087 1088 int fw_api; 1089 int bd_api; 1090 enum ath10k_cal_mode cal_mode; 1091 1092 struct { 1093 struct completion started; 1094 struct completion completed; 1095 struct completion on_channel; 1096 struct delayed_work timeout; 1097 enum ath10k_scan_state state; 1098 bool is_roc; 1099 int vdev_id; 1100 int roc_freq; 1101 bool roc_notify; 1102 } scan; 1103 1104 struct { 1105 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 1106 } mac; 1107 1108 /* should never be NULL; needed for regular htt rx */ 1109 struct ieee80211_channel *rx_channel; 1110 1111 /* valid during scan; needed for mgmt rx during scan */ 1112 struct ieee80211_channel *scan_channel; 1113 1114 /* current operating channel definition */ 1115 struct cfg80211_chan_def chandef; 1116 1117 /* currently configured operating channel in firmware */ 1118 struct ieee80211_channel *tgt_oper_chan; 1119 1120 unsigned long long free_vdev_map; 1121 struct ath10k_vif *monitor_arvif; 1122 bool monitor; 1123 int monitor_vdev_id; 1124 bool monitor_started; 1125 unsigned int filter_flags; 1126 unsigned long dev_flags; 1127 bool dfs_block_radar_events; 1128 1129 /* protected by conf_mutex */ 1130 bool radar_enabled; 1131 int num_started_vdevs; 1132 1133 /* Protected by conf-mutex */ 1134 u8 cfg_tx_chainmask; 1135 u8 cfg_rx_chainmask; 1136 1137 struct completion install_key_done; 1138 1139 int last_wmi_vdev_start_status; 1140 struct completion vdev_setup_done; 1141 struct completion vdev_delete_done; 1142 struct completion peer_stats_info_complete; 1143 1144 struct workqueue_struct *workqueue; 1145 /* Auxiliary workqueue */ 1146 struct workqueue_struct *workqueue_aux; 1147 struct workqueue_struct *workqueue_tx_complete; 1148 /* prevents concurrent FW reconfiguration */ 1149 struct mutex conf_mutex; 1150 1151 /* protects coredump data */ 1152 struct mutex dump_mutex; 1153 1154 /* protects shared structure data */ 1155 spinlock_t data_lock; 1156 1157 struct list_head arvifs; 1158 struct list_head peers; 1159 struct ath10k_peer *peer_map[ATH10K_MAX_NUM_PEER_IDS]; 1160 wait_queue_head_t peer_mapping_wq; 1161 1162 /* protected by conf_mutex */ 1163 int num_peers; 1164 int num_stations; 1165 1166 int max_num_peers; 1167 int max_num_stations; 1168 int max_num_vdevs; 1169 int max_num_tdls_vdevs; 1170 int num_active_peers; 1171 int num_tids; 1172 1173 struct work_struct svc_rdy_work; 1174 struct sk_buff *svc_rdy_skb; 1175 1176 struct work_struct offchan_tx_work; 1177 struct sk_buff_head offchan_tx_queue; 1178 struct completion offchan_tx_completed; 1179 struct sk_buff *offchan_tx_skb; 1180 1181 struct work_struct wmi_mgmt_tx_work; 1182 struct sk_buff_head wmi_mgmt_tx_queue; 1183 1184 enum ath10k_state state; 1185 1186 struct work_struct register_work; 1187 struct work_struct restart_work; 1188 struct work_struct bundle_tx_work; 1189 struct work_struct tx_complete_work; 1190 1191 /* cycle count is reported twice for each visited channel during scan. 1192 * access protected by data_lock 1193 */ 1194 u32 survey_last_rx_clear_count; 1195 u32 survey_last_cycle_count; 1196 struct survey_info survey[ATH10K_NUM_CHANS]; 1197 1198 /* Channel info events are expected to come in pairs without and with 1199 * COMPLETE flag set respectively for each channel visit during scan. 1200 * 1201 * However there are deviations from this rule. This flag is used to 1202 * avoid reporting garbage data. 1203 */ 1204 bool ch_info_can_report_survey; 1205 struct completion bss_survey_done; 1206 1207 struct dfs_pattern_detector *dfs_detector; 1208 1209 unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */ 1210 1211 #ifdef CONFIG_ATH10K_DEBUGFS 1212 struct ath10k_debug debug; 1213 struct { 1214 /* relay(fs) channel for spectral scan */ 1215 struct rchan *rfs_chan_spec_scan; 1216 1217 /* spectral_mode and spec_config are protected by conf_mutex */ 1218 enum ath10k_spectral_mode mode; 1219 struct ath10k_spec_scan config; 1220 } spectral; 1221 #endif 1222 1223 u32 pktlog_filter; 1224 1225 #ifdef CONFIG_DEV_COREDUMP 1226 struct { 1227 struct ath10k_fw_crash_data *fw_crash_data; 1228 } coredump; 1229 #endif 1230 1231 struct { 1232 /* protected by conf_mutex */ 1233 struct ath10k_fw_components utf_mode_fw; 1234 1235 /* protected by data_lock */ 1236 bool utf_monitor; 1237 } testmode; 1238 1239 struct { 1240 /* protected by data_lock */ 1241 u32 rx_crc_err_drop; 1242 u32 fw_crash_counter; 1243 u32 fw_warm_reset_counter; 1244 u32 fw_cold_reset_counter; 1245 } stats; 1246 1247 struct ath10k_thermal thermal; 1248 struct ath10k_wow wow; 1249 struct ath10k_per_peer_tx_stats peer_tx_stats; 1250 1251 /* NAPI */ 1252 struct net_device napi_dev; 1253 struct napi_struct napi; 1254 1255 struct work_struct set_coverage_class_work; 1256 /* protected by conf_mutex */ 1257 struct { 1258 /* writing also protected by data_lock */ 1259 s16 coverage_class; 1260 1261 u32 reg_phyclk; 1262 u32 reg_slottime_conf; 1263 u32 reg_slottime_orig; 1264 u32 reg_ack_cts_timeout_conf; 1265 u32 reg_ack_cts_timeout_orig; 1266 } fw_coverage; 1267 1268 u32 ampdu_reference; 1269 1270 const u8 *wmi_key_cipher; 1271 void *ce_priv; 1272 1273 u32 sta_tid_stats_mask; 1274 1275 /* protected by data_lock */ 1276 enum ath10k_radar_confirmation_state radar_conf_state; 1277 struct ath10k_radar_found_info last_radar_info; 1278 struct work_struct radar_confirmation_work; 1279 struct ath10k_bus_params bus_param; 1280 struct completion peer_delete_done; 1281 1282 bool coex_support; 1283 int coex_gpio_pin; 1284 1285 /* must be last */ 1286 u8 drv_priv[] __aligned(sizeof(void *)); 1287 }; 1288 1289 static inline bool ath10k_peer_stats_enabled(struct ath10k *ar) 1290 { 1291 if (test_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags) && 1292 test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map)) 1293 return true; 1294 1295 return false; 1296 } 1297 1298 extern unsigned long ath10k_coredump_mask; 1299 1300 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 1301 enum ath10k_bus bus, 1302 enum ath10k_hw_rev hw_rev, 1303 const struct ath10k_hif_ops *hif_ops); 1304 void ath10k_core_destroy(struct ath10k *ar); 1305 void ath10k_core_get_fw_features_str(struct ath10k *ar, 1306 char *buf, 1307 size_t max_len); 1308 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1309 struct ath10k_fw_file *fw_file); 1310 1311 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 1312 const struct ath10k_fw_components *fw_components); 1313 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt); 1314 void ath10k_core_stop(struct ath10k *ar); 1315 int ath10k_core_register(struct ath10k *ar, 1316 const struct ath10k_bus_params *bus_params); 1317 void ath10k_core_unregister(struct ath10k *ar); 1318 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type); 1319 int ath10k_core_check_dt(struct ath10k *ar); 1320 void ath10k_core_free_board_files(struct ath10k *ar); 1321 1322 #endif /* _CORE_H_ */ 1323