1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #ifndef _CORE_H_ 19 #define _CORE_H_ 20 21 #include <linux/completion.h> 22 #include <linux/if_ether.h> 23 #include <linux/types.h> 24 #include <linux/pci.h> 25 #include <linux/uuid.h> 26 #include <linux/time.h> 27 28 #include "htt.h" 29 #include "htc.h" 30 #include "hw.h" 31 #include "targaddrs.h" 32 #include "wmi.h" 33 #include "../ath.h" 34 #include "../regd.h" 35 #include "../dfs_pattern_detector.h" 36 #include "spectral.h" 37 38 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB) 39 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 40 #define WO(_f) ((_f##_OFFSET) >> 2) 41 42 #define ATH10K_SCAN_ID 0 43 #define WMI_READY_TIMEOUT (5 * HZ) 44 #define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ) 45 #define ATH10K_NUM_CHANS 38 46 47 /* Antenna noise floor */ 48 #define ATH10K_DEFAULT_NOISE_FLOOR -95 49 50 #define ATH10K_MAX_NUM_MGMT_PENDING 128 51 52 /* number of failed packets */ 53 #define ATH10K_KICKOUT_THRESHOLD 50 54 55 /* 56 * Use insanely high numbers to make sure that the firmware implementation 57 * won't start, we have the same functionality already in hostapd. Unit 58 * is seconds. 59 */ 60 #define ATH10K_KEEPALIVE_MIN_IDLE 3747 61 #define ATH10K_KEEPALIVE_MAX_IDLE 3895 62 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900 63 64 struct ath10k; 65 66 struct ath10k_skb_cb { 67 dma_addr_t paddr; 68 u8 vdev_id; 69 70 struct { 71 u8 tid; 72 bool is_offchan; 73 struct ath10k_htt_txbuf *txbuf; 74 u32 txbuf_paddr; 75 } __packed htt; 76 77 struct { 78 bool dtim_zero; 79 bool deliver_cab; 80 } bcn; 81 } __packed; 82 83 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb) 84 { 85 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) > 86 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 87 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 88 } 89 90 static inline u32 host_interest_item_address(u32 item_offset) 91 { 92 return QCA988X_HOST_INTEREST_ADDRESS + item_offset; 93 } 94 95 struct ath10k_bmi { 96 bool done_sent; 97 }; 98 99 #define ATH10K_MAX_MEM_REQS 16 100 101 struct ath10k_mem_chunk { 102 void *vaddr; 103 dma_addr_t paddr; 104 u32 len; 105 u32 req_id; 106 }; 107 108 struct ath10k_wmi { 109 enum ath10k_htc_ep_id eid; 110 struct completion service_ready; 111 struct completion unified_ready; 112 wait_queue_head_t tx_credits_wq; 113 struct wmi_cmd_map *cmd; 114 struct wmi_vdev_param_map *vdev_param; 115 struct wmi_pdev_param_map *pdev_param; 116 117 u32 num_mem_chunks; 118 struct ath10k_mem_chunk mem_chunks[ATH10K_MAX_MEM_REQS]; 119 }; 120 121 struct ath10k_peer_stat { 122 u8 peer_macaddr[ETH_ALEN]; 123 u32 peer_rssi; 124 u32 peer_tx_rate; 125 u32 peer_rx_rate; /* 10x only */ 126 }; 127 128 struct ath10k_target_stats { 129 /* PDEV stats */ 130 s32 ch_noise_floor; 131 u32 tx_frame_count; 132 u32 rx_frame_count; 133 u32 rx_clear_count; 134 u32 cycle_count; 135 u32 phy_err_count; 136 u32 chan_tx_power; 137 u32 ack_rx_bad; 138 u32 rts_bad; 139 u32 rts_good; 140 u32 fcs_bad; 141 u32 no_beacons; 142 u32 mib_int_count; 143 144 /* PDEV TX stats */ 145 s32 comp_queued; 146 s32 comp_delivered; 147 s32 msdu_enqued; 148 s32 mpdu_enqued; 149 s32 wmm_drop; 150 s32 local_enqued; 151 s32 local_freed; 152 s32 hw_queued; 153 s32 hw_reaped; 154 s32 underrun; 155 s32 tx_abort; 156 s32 mpdus_requed; 157 u32 tx_ko; 158 u32 data_rc; 159 u32 self_triggers; 160 u32 sw_retry_failure; 161 u32 illgl_rate_phy_err; 162 u32 pdev_cont_xretry; 163 u32 pdev_tx_timeout; 164 u32 pdev_resets; 165 u32 phy_underrun; 166 u32 txop_ovf; 167 168 /* PDEV RX stats */ 169 s32 mid_ppdu_route_change; 170 s32 status_rcvd; 171 s32 r0_frags; 172 s32 r1_frags; 173 s32 r2_frags; 174 s32 r3_frags; 175 s32 htt_msdus; 176 s32 htt_mpdus; 177 s32 loc_msdus; 178 s32 loc_mpdus; 179 s32 oversize_amsdu; 180 s32 phy_errs; 181 s32 phy_err_drop; 182 s32 mpdu_errs; 183 184 /* VDEV STATS */ 185 186 /* PEER STATS */ 187 u8 peers; 188 struct ath10k_peer_stat peer_stat[TARGET_NUM_PEERS]; 189 190 /* TODO: Beacon filter stats */ 191 192 }; 193 194 struct ath10k_dfs_stats { 195 u32 phy_errors; 196 u32 pulses_total; 197 u32 pulses_detected; 198 u32 pulses_discarded; 199 u32 radar_detected; 200 }; 201 202 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */ 203 204 struct ath10k_peer { 205 struct list_head list; 206 int vdev_id; 207 u8 addr[ETH_ALEN]; 208 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS); 209 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1]; 210 }; 211 212 struct ath10k_sta { 213 struct ath10k_vif *arvif; 214 215 /* the following are protected by ar->data_lock */ 216 u32 changed; /* IEEE80211_RC_* */ 217 u32 bw; 218 u32 nss; 219 u32 smps; 220 221 struct work_struct update_wk; 222 }; 223 224 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ) 225 226 struct ath10k_vif { 227 struct list_head list; 228 229 u32 vdev_id; 230 enum wmi_vdev_type vdev_type; 231 enum wmi_vdev_subtype vdev_subtype; 232 u32 beacon_interval; 233 u32 dtim_period; 234 struct sk_buff *beacon; 235 /* protected by data_lock */ 236 bool beacon_sent; 237 238 struct ath10k *ar; 239 struct ieee80211_vif *vif; 240 241 bool is_started; 242 bool is_up; 243 bool spectral_enabled; 244 u32 aid; 245 u8 bssid[ETH_ALEN]; 246 247 struct work_struct wep_key_work; 248 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1]; 249 u8 def_wep_key_idx; 250 u8 def_wep_key_newidx; 251 252 u16 tx_seq_no; 253 254 union { 255 struct { 256 u32 uapsd; 257 } sta; 258 struct { 259 /* 127 stations; wmi limit */ 260 u8 tim_bitmap[16]; 261 u8 tim_len; 262 u32 ssid_len; 263 u8 ssid[IEEE80211_MAX_SSID_LEN]; 264 bool hidden_ssid; 265 /* P2P_IE with NoA attribute for P2P_GO case */ 266 u32 noa_len; 267 u8 *noa_data; 268 } ap; 269 } u; 270 271 u8 fixed_rate; 272 u8 fixed_nss; 273 u8 force_sgi; 274 bool use_cts_prot; 275 int num_legacy_stations; 276 }; 277 278 struct ath10k_vif_iter { 279 u32 vdev_id; 280 struct ath10k_vif *arvif; 281 }; 282 283 /* used for crash-dump storage, protected by data-lock */ 284 struct ath10k_fw_crash_data { 285 bool crashed_since_read; 286 287 uuid_le uuid; 288 struct timespec timestamp; 289 __le32 registers[REG_DUMP_COUNT_QCA988X]; 290 }; 291 292 struct ath10k_debug { 293 struct dentry *debugfs_phy; 294 295 struct ath10k_target_stats target_stats; 296 DECLARE_BITMAP(wmi_service_bitmap, WMI_SERVICE_MAX); 297 298 struct completion event_stats_compl; 299 300 unsigned long htt_stats_mask; 301 struct delayed_work htt_stats_dwork; 302 struct ath10k_dfs_stats dfs_stats; 303 struct ath_dfs_pool_stats dfs_pool_stats; 304 305 u32 fw_dbglog_mask; 306 307 u8 htt_max_amsdu; 308 u8 htt_max_ampdu; 309 310 struct ath10k_fw_crash_data *fw_crash_data; 311 }; 312 313 enum ath10k_state { 314 ATH10K_STATE_OFF = 0, 315 ATH10K_STATE_ON, 316 317 /* When doing firmware recovery the device is first powered down. 318 * mac80211 is supposed to call in to start() hook later on. It is 319 * however possible that driver unloading and firmware crash overlap. 320 * mac80211 can wait on conf_mutex in stop() while the device is 321 * stopped in ath10k_core_restart() work holding conf_mutex. The state 322 * RESTARTED means that the device is up and mac80211 has started hw 323 * reconfiguration. Once mac80211 is done with the reconfiguration we 324 * set the state to STATE_ON in restart_complete(). */ 325 ATH10K_STATE_RESTARTING, 326 ATH10K_STATE_RESTARTED, 327 328 /* The device has crashed while restarting hw. This state is like ON 329 * but commands are blocked in HTC and -ECOMM response is given. This 330 * prevents completion timeouts and makes the driver more responsive to 331 * userspace commands. This is also prevents recursive recovery. */ 332 ATH10K_STATE_WEDGED, 333 334 /* factory tests */ 335 ATH10K_STATE_UTF, 336 }; 337 338 enum ath10k_firmware_mode { 339 /* the default mode, standard 802.11 functionality */ 340 ATH10K_FIRMWARE_MODE_NORMAL, 341 342 /* factory tests etc */ 343 ATH10K_FIRMWARE_MODE_UTF, 344 }; 345 346 enum ath10k_fw_features { 347 /* wmi_mgmt_rx_hdr contains extra RSSI information */ 348 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0, 349 350 /* firmware from 10X branch */ 351 ATH10K_FW_FEATURE_WMI_10X = 1, 352 353 /* firmware support tx frame management over WMI, otherwise it's HTT */ 354 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2, 355 356 /* Firmware does not support P2P */ 357 ATH10K_FW_FEATURE_NO_P2P = 3, 358 359 /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature bit 360 * is required to be set as well. 361 */ 362 ATH10K_FW_FEATURE_WMI_10_2 = 4, 363 364 /* keep last */ 365 ATH10K_FW_FEATURE_COUNT, 366 }; 367 368 enum ath10k_dev_flags { 369 /* Indicates that ath10k device is during CAC phase of DFS */ 370 ATH10K_CAC_RUNNING, 371 ATH10K_FLAG_CORE_REGISTERED, 372 }; 373 374 enum ath10k_scan_state { 375 ATH10K_SCAN_IDLE, 376 ATH10K_SCAN_STARTING, 377 ATH10K_SCAN_RUNNING, 378 ATH10K_SCAN_ABORTING, 379 }; 380 381 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state) 382 { 383 switch (state) { 384 case ATH10K_SCAN_IDLE: 385 return "idle"; 386 case ATH10K_SCAN_STARTING: 387 return "starting"; 388 case ATH10K_SCAN_RUNNING: 389 return "running"; 390 case ATH10K_SCAN_ABORTING: 391 return "aborting"; 392 } 393 394 return "unknown"; 395 } 396 397 struct ath10k { 398 struct ath_common ath_common; 399 struct ieee80211_hw *hw; 400 struct device *dev; 401 u8 mac_addr[ETH_ALEN]; 402 403 u32 chip_id; 404 u32 target_version; 405 u8 fw_version_major; 406 u32 fw_version_minor; 407 u16 fw_version_release; 408 u16 fw_version_build; 409 u32 phy_capability; 410 u32 hw_min_tx_power; 411 u32 hw_max_tx_power; 412 u32 ht_cap_info; 413 u32 vht_cap_info; 414 u32 num_rf_chains; 415 416 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT); 417 418 struct targetdef *targetdef; 419 struct hostdef *hostdef; 420 421 bool p2p; 422 423 struct { 424 const struct ath10k_hif_ops *ops; 425 } hif; 426 427 struct completion target_suspend; 428 429 struct ath10k_bmi bmi; 430 struct ath10k_wmi wmi; 431 struct ath10k_htc htc; 432 struct ath10k_htt htt; 433 434 struct ath10k_hw_params { 435 u32 id; 436 const char *name; 437 u32 patch_load_addr; 438 439 struct ath10k_hw_params_fw { 440 const char *dir; 441 const char *fw; 442 const char *otp; 443 const char *board; 444 } fw; 445 } hw_params; 446 447 const struct firmware *board; 448 const void *board_data; 449 size_t board_len; 450 451 const struct firmware *otp; 452 const void *otp_data; 453 size_t otp_len; 454 455 const struct firmware *firmware; 456 const void *firmware_data; 457 size_t firmware_len; 458 459 int fw_api; 460 461 struct { 462 struct completion started; 463 struct completion completed; 464 struct completion on_channel; 465 struct delayed_work timeout; 466 enum ath10k_scan_state state; 467 bool is_roc; 468 int vdev_id; 469 int roc_freq; 470 } scan; 471 472 struct { 473 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; 474 } mac; 475 476 /* should never be NULL; needed for regular htt rx */ 477 struct ieee80211_channel *rx_channel; 478 479 /* valid during scan; needed for mgmt rx during scan */ 480 struct ieee80211_channel *scan_channel; 481 482 /* current operating channel definition */ 483 struct cfg80211_chan_def chandef; 484 485 int free_vdev_map; 486 bool monitor; 487 int monitor_vdev_id; 488 bool monitor_started; 489 unsigned int filter_flags; 490 unsigned long dev_flags; 491 u32 dfs_block_radar_events; 492 493 /* protected by conf_mutex */ 494 bool radar_enabled; 495 int num_started_vdevs; 496 497 /* Protected by conf-mutex */ 498 u8 supp_tx_chainmask; 499 u8 supp_rx_chainmask; 500 u8 cfg_tx_chainmask; 501 u8 cfg_rx_chainmask; 502 503 struct wmi_pdev_set_wmm_params_arg wmm_params; 504 struct completion install_key_done; 505 506 struct completion vdev_setup_done; 507 508 struct workqueue_struct *workqueue; 509 510 /* prevents concurrent FW reconfiguration */ 511 struct mutex conf_mutex; 512 513 /* protects shared structure data */ 514 spinlock_t data_lock; 515 516 struct list_head arvifs; 517 struct list_head peers; 518 wait_queue_head_t peer_mapping_wq; 519 520 /* number of created peers; protected by data_lock */ 521 int num_peers; 522 523 struct work_struct offchan_tx_work; 524 struct sk_buff_head offchan_tx_queue; 525 struct completion offchan_tx_completed; 526 struct sk_buff *offchan_tx_skb; 527 528 struct work_struct wmi_mgmt_tx_work; 529 struct sk_buff_head wmi_mgmt_tx_queue; 530 531 enum ath10k_state state; 532 533 struct work_struct register_work; 534 struct work_struct restart_work; 535 536 /* cycle count is reported twice for each visited channel during scan. 537 * access protected by data_lock */ 538 u32 survey_last_rx_clear_count; 539 u32 survey_last_cycle_count; 540 struct survey_info survey[ATH10K_NUM_CHANS]; 541 542 struct dfs_pattern_detector *dfs_detector; 543 544 #ifdef CONFIG_ATH10K_DEBUGFS 545 struct ath10k_debug debug; 546 #endif 547 548 struct { 549 /* relay(fs) channel for spectral scan */ 550 struct rchan *rfs_chan_spec_scan; 551 552 /* spectral_mode and spec_config are protected by conf_mutex */ 553 enum ath10k_spectral_mode mode; 554 struct ath10k_spec_scan config; 555 } spectral; 556 557 struct { 558 /* protected by conf_mutex */ 559 const struct firmware *utf; 560 DECLARE_BITMAP(orig_fw_features, ATH10K_FW_FEATURE_COUNT); 561 562 /* protected by data_lock */ 563 bool utf_monitor; 564 } testmode; 565 566 /* must be last */ 567 u8 drv_priv[0] __aligned(sizeof(void *)); 568 }; 569 570 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 571 const struct ath10k_hif_ops *hif_ops); 572 void ath10k_core_destroy(struct ath10k *ar); 573 574 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode); 575 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt); 576 void ath10k_core_stop(struct ath10k *ar); 577 int ath10k_core_register(struct ath10k *ar, u32 chip_id); 578 void ath10k_core_unregister(struct ath10k *ar); 579 580 #endif /* _CORE_H_ */ 581