1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #ifndef _CORE_H_ 19 #define _CORE_H_ 20 21 #include <linux/completion.h> 22 #include <linux/if_ether.h> 23 #include <linux/types.h> 24 #include <linux/pci.h> 25 #include <linux/uuid.h> 26 #include <linux/time.h> 27 28 #include "htt.h" 29 #include "htc.h" 30 #include "hw.h" 31 #include "targaddrs.h" 32 #include "wmi.h" 33 #include "../ath.h" 34 #include "../regd.h" 35 #include "../dfs_pattern_detector.h" 36 #include "spectral.h" 37 #include "thermal.h" 38 #include "wow.h" 39 #include "swap.h" 40 41 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB) 42 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 43 #define WO(_f) ((_f##_OFFSET) >> 2) 44 45 #define ATH10K_SCAN_ID 0 46 #define WMI_READY_TIMEOUT (5 * HZ) 47 #define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ) 48 #define ATH10K_CONNECTION_LOSS_HZ (3*HZ) 49 #define ATH10K_NUM_CHANS 39 50 51 /* Antenna noise floor */ 52 #define ATH10K_DEFAULT_NOISE_FLOOR -95 53 54 #define ATH10K_MAX_NUM_MGMT_PENDING 128 55 56 /* number of failed packets (20 packets with 16 sw reties each) */ 57 #define ATH10K_KICKOUT_THRESHOLD (20 * 16) 58 59 /* 60 * Use insanely high numbers to make sure that the firmware implementation 61 * won't start, we have the same functionality already in hostapd. Unit 62 * is seconds. 63 */ 64 #define ATH10K_KEEPALIVE_MIN_IDLE 3747 65 #define ATH10K_KEEPALIVE_MAX_IDLE 3895 66 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900 67 68 struct ath10k; 69 70 enum ath10k_bus { 71 ATH10K_BUS_PCI, 72 ATH10K_BUS_AHB, 73 }; 74 75 static inline const char *ath10k_bus_str(enum ath10k_bus bus) 76 { 77 switch (bus) { 78 case ATH10K_BUS_PCI: 79 return "pci"; 80 case ATH10K_BUS_AHB: 81 return "ahb"; 82 } 83 84 return "unknown"; 85 } 86 87 enum ath10k_skb_flags { 88 ATH10K_SKB_F_NO_HWCRYPT = BIT(0), 89 ATH10K_SKB_F_DTIM_ZERO = BIT(1), 90 ATH10K_SKB_F_DELIVER_CAB = BIT(2), 91 ATH10K_SKB_F_MGMT = BIT(3), 92 ATH10K_SKB_F_QOS = BIT(4), 93 }; 94 95 struct ath10k_skb_cb { 96 dma_addr_t paddr; 97 u8 flags; 98 u8 eid; 99 u16 msdu_id; 100 struct ieee80211_vif *vif; 101 } __packed; 102 103 struct ath10k_skb_rxcb { 104 dma_addr_t paddr; 105 struct hlist_node hlist; 106 }; 107 108 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb) 109 { 110 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) > 111 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 112 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 113 } 114 115 static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb) 116 { 117 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb)); 118 return (struct ath10k_skb_rxcb *)skb->cb; 119 } 120 121 #define ATH10K_RXCB_SKB(rxcb) \ 122 container_of((void *)rxcb, struct sk_buff, cb) 123 124 static inline u32 host_interest_item_address(u32 item_offset) 125 { 126 return QCA988X_HOST_INTEREST_ADDRESS + item_offset; 127 } 128 129 struct ath10k_bmi { 130 bool done_sent; 131 }; 132 133 struct ath10k_mem_chunk { 134 void *vaddr; 135 dma_addr_t paddr; 136 u32 len; 137 u32 req_id; 138 }; 139 140 struct ath10k_wmi { 141 enum ath10k_fw_wmi_op_version op_version; 142 enum ath10k_htc_ep_id eid; 143 struct completion service_ready; 144 struct completion unified_ready; 145 wait_queue_head_t tx_credits_wq; 146 DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX); 147 struct wmi_cmd_map *cmd; 148 struct wmi_vdev_param_map *vdev_param; 149 struct wmi_pdev_param_map *pdev_param; 150 const struct wmi_ops *ops; 151 const struct wmi_peer_flags_map *peer_flags; 152 153 u32 num_mem_chunks; 154 u32 rx_decap_mode; 155 struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS]; 156 }; 157 158 struct ath10k_fw_stats_peer { 159 struct list_head list; 160 161 u8 peer_macaddr[ETH_ALEN]; 162 u32 peer_rssi; 163 u32 peer_tx_rate; 164 u32 peer_rx_rate; /* 10x only */ 165 u32 rx_duration; 166 }; 167 168 struct ath10k_fw_stats_vdev { 169 struct list_head list; 170 171 u32 vdev_id; 172 u32 beacon_snr; 173 u32 data_snr; 174 u32 num_tx_frames[4]; 175 u32 num_rx_frames; 176 u32 num_tx_frames_retries[4]; 177 u32 num_tx_frames_failures[4]; 178 u32 num_rts_fail; 179 u32 num_rts_success; 180 u32 num_rx_err; 181 u32 num_rx_discard; 182 u32 num_tx_not_acked; 183 u32 tx_rate_history[10]; 184 u32 beacon_rssi_history[10]; 185 }; 186 187 struct ath10k_fw_stats_pdev { 188 struct list_head list; 189 190 /* PDEV stats */ 191 s32 ch_noise_floor; 192 u32 tx_frame_count; 193 u32 rx_frame_count; 194 u32 rx_clear_count; 195 u32 cycle_count; 196 u32 phy_err_count; 197 u32 chan_tx_power; 198 u32 ack_rx_bad; 199 u32 rts_bad; 200 u32 rts_good; 201 u32 fcs_bad; 202 u32 no_beacons; 203 u32 mib_int_count; 204 205 /* PDEV TX stats */ 206 s32 comp_queued; 207 s32 comp_delivered; 208 s32 msdu_enqued; 209 s32 mpdu_enqued; 210 s32 wmm_drop; 211 s32 local_enqued; 212 s32 local_freed; 213 s32 hw_queued; 214 s32 hw_reaped; 215 s32 underrun; 216 u32 hw_paused; 217 s32 tx_abort; 218 s32 mpdus_requed; 219 u32 tx_ko; 220 u32 data_rc; 221 u32 self_triggers; 222 u32 sw_retry_failure; 223 u32 illgl_rate_phy_err; 224 u32 pdev_cont_xretry; 225 u32 pdev_tx_timeout; 226 u32 pdev_resets; 227 u32 phy_underrun; 228 u32 txop_ovf; 229 u32 seq_posted; 230 u32 seq_failed_queueing; 231 u32 seq_completed; 232 u32 seq_restarted; 233 u32 mu_seq_posted; 234 u32 mpdus_sw_flush; 235 u32 mpdus_hw_filter; 236 u32 mpdus_truncated; 237 u32 mpdus_ack_failed; 238 u32 mpdus_expired; 239 240 /* PDEV RX stats */ 241 s32 mid_ppdu_route_change; 242 s32 status_rcvd; 243 s32 r0_frags; 244 s32 r1_frags; 245 s32 r2_frags; 246 s32 r3_frags; 247 s32 htt_msdus; 248 s32 htt_mpdus; 249 s32 loc_msdus; 250 s32 loc_mpdus; 251 s32 oversize_amsdu; 252 s32 phy_errs; 253 s32 phy_err_drop; 254 s32 mpdu_errs; 255 s32 rx_ovfl_errs; 256 }; 257 258 struct ath10k_fw_stats { 259 struct list_head pdevs; 260 struct list_head vdevs; 261 struct list_head peers; 262 }; 263 264 #define ATH10K_TPC_TABLE_TYPE_FLAG 1 265 #define ATH10K_TPC_PREAM_TABLE_END 0xFFFF 266 267 struct ath10k_tpc_table { 268 u32 pream_idx[WMI_TPC_RATE_MAX]; 269 u8 rate_code[WMI_TPC_RATE_MAX]; 270 char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; 271 }; 272 273 struct ath10k_tpc_stats { 274 u32 reg_domain; 275 u32 chan_freq; 276 u32 phy_mode; 277 u32 twice_antenna_reduction; 278 u32 twice_max_rd_power; 279 s32 twice_antenna_gain; 280 u32 power_limit; 281 u32 num_tx_chain; 282 u32 ctl; 283 u32 rate_max; 284 u8 flag[WMI_TPC_FLAG]; 285 struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG]; 286 }; 287 288 struct ath10k_dfs_stats { 289 u32 phy_errors; 290 u32 pulses_total; 291 u32 pulses_detected; 292 u32 pulses_discarded; 293 u32 radar_detected; 294 }; 295 296 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */ 297 298 struct ath10k_peer { 299 struct list_head list; 300 int vdev_id; 301 u8 addr[ETH_ALEN]; 302 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS); 303 304 /* protected by ar->data_lock */ 305 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1]; 306 }; 307 308 struct ath10k_sta { 309 struct ath10k_vif *arvif; 310 311 /* the following are protected by ar->data_lock */ 312 u32 changed; /* IEEE80211_RC_* */ 313 u32 bw; 314 u32 nss; 315 u32 smps; 316 317 struct work_struct update_wk; 318 319 #ifdef CONFIG_MAC80211_DEBUGFS 320 /* protected by conf_mutex */ 321 bool aggr_mode; 322 u64 rx_duration; 323 #endif 324 }; 325 326 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ) 327 328 enum ath10k_beacon_state { 329 ATH10K_BEACON_SCHEDULED = 0, 330 ATH10K_BEACON_SENDING, 331 ATH10K_BEACON_SENT, 332 }; 333 334 struct ath10k_vif { 335 struct list_head list; 336 337 u32 vdev_id; 338 enum wmi_vdev_type vdev_type; 339 enum wmi_vdev_subtype vdev_subtype; 340 u32 beacon_interval; 341 u32 dtim_period; 342 struct sk_buff *beacon; 343 /* protected by data_lock */ 344 enum ath10k_beacon_state beacon_state; 345 void *beacon_buf; 346 dma_addr_t beacon_paddr; 347 unsigned long tx_paused; /* arbitrary values defined by target */ 348 349 struct ath10k *ar; 350 struct ieee80211_vif *vif; 351 352 bool is_started; 353 bool is_up; 354 bool spectral_enabled; 355 bool ps; 356 u32 aid; 357 u8 bssid[ETH_ALEN]; 358 359 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1]; 360 s8 def_wep_key_idx; 361 362 u16 tx_seq_no; 363 364 union { 365 struct { 366 u32 uapsd; 367 } sta; 368 struct { 369 /* 512 stations */ 370 u8 tim_bitmap[64]; 371 u8 tim_len; 372 u32 ssid_len; 373 u8 ssid[IEEE80211_MAX_SSID_LEN]; 374 bool hidden_ssid; 375 /* P2P_IE with NoA attribute for P2P_GO case */ 376 u32 noa_len; 377 u8 *noa_data; 378 } ap; 379 } u; 380 381 bool use_cts_prot; 382 bool nohwcrypt; 383 int num_legacy_stations; 384 int txpower; 385 struct wmi_wmm_params_all_arg wmm_params; 386 struct work_struct ap_csa_work; 387 struct delayed_work connection_loss_work; 388 struct cfg80211_bitrate_mask bitrate_mask; 389 }; 390 391 struct ath10k_vif_iter { 392 u32 vdev_id; 393 struct ath10k_vif *arvif; 394 }; 395 396 /* used for crash-dump storage, protected by data-lock */ 397 struct ath10k_fw_crash_data { 398 bool crashed_since_read; 399 400 uuid_le uuid; 401 struct timespec timestamp; 402 __le32 registers[REG_DUMP_COUNT_QCA988X]; 403 }; 404 405 struct ath10k_debug { 406 struct dentry *debugfs_phy; 407 408 struct ath10k_fw_stats fw_stats; 409 struct completion fw_stats_complete; 410 bool fw_stats_done; 411 412 unsigned long htt_stats_mask; 413 struct delayed_work htt_stats_dwork; 414 struct ath10k_dfs_stats dfs_stats; 415 struct ath_dfs_pool_stats dfs_pool_stats; 416 417 /* used for tpc-dump storage, protected by data-lock */ 418 struct ath10k_tpc_stats *tpc_stats; 419 420 struct completion tpc_complete; 421 422 /* protected by conf_mutex */ 423 u32 fw_dbglog_mask; 424 u32 fw_dbglog_level; 425 u32 pktlog_filter; 426 u32 reg_addr; 427 u32 nf_cal_period; 428 429 struct ath10k_fw_crash_data *fw_crash_data; 430 }; 431 432 enum ath10k_state { 433 ATH10K_STATE_OFF = 0, 434 ATH10K_STATE_ON, 435 436 /* When doing firmware recovery the device is first powered down. 437 * mac80211 is supposed to call in to start() hook later on. It is 438 * however possible that driver unloading and firmware crash overlap. 439 * mac80211 can wait on conf_mutex in stop() while the device is 440 * stopped in ath10k_core_restart() work holding conf_mutex. The state 441 * RESTARTED means that the device is up and mac80211 has started hw 442 * reconfiguration. Once mac80211 is done with the reconfiguration we 443 * set the state to STATE_ON in reconfig_complete(). */ 444 ATH10K_STATE_RESTARTING, 445 ATH10K_STATE_RESTARTED, 446 447 /* The device has crashed while restarting hw. This state is like ON 448 * but commands are blocked in HTC and -ECOMM response is given. This 449 * prevents completion timeouts and makes the driver more responsive to 450 * userspace commands. This is also prevents recursive recovery. */ 451 ATH10K_STATE_WEDGED, 452 453 /* factory tests */ 454 ATH10K_STATE_UTF, 455 }; 456 457 enum ath10k_firmware_mode { 458 /* the default mode, standard 802.11 functionality */ 459 ATH10K_FIRMWARE_MODE_NORMAL, 460 461 /* factory tests etc */ 462 ATH10K_FIRMWARE_MODE_UTF, 463 }; 464 465 enum ath10k_fw_features { 466 /* wmi_mgmt_rx_hdr contains extra RSSI information */ 467 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0, 468 469 /* Firmware from 10X branch. Deprecated, don't use in new code. */ 470 ATH10K_FW_FEATURE_WMI_10X = 1, 471 472 /* firmware support tx frame management over WMI, otherwise it's HTT */ 473 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2, 474 475 /* Firmware does not support P2P */ 476 ATH10K_FW_FEATURE_NO_P2P = 3, 477 478 /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature 479 * bit is required to be set as well. Deprecated, don't use in new 480 * code. 481 */ 482 ATH10K_FW_FEATURE_WMI_10_2 = 4, 483 484 /* Some firmware revisions lack proper multi-interface client powersave 485 * implementation. Enabling PS could result in connection drops, 486 * traffic stalls, etc. 487 */ 488 ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5, 489 490 /* Some firmware revisions have an incomplete WoWLAN implementation 491 * despite WMI service bit being advertised. This feature flag is used 492 * to distinguish whether WoWLAN is really supported or not. 493 */ 494 ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6, 495 496 /* Don't trust error code from otp.bin */ 497 ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7, 498 499 /* Some firmware revisions pad 4th hw address to 4 byte boundary making 500 * it 8 bytes long in Native Wifi Rx decap. 501 */ 502 ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8, 503 504 /* Firmware supports bypassing PLL setting on init. */ 505 ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9, 506 507 /* Raw mode support. If supported, FW supports receiving and trasmitting 508 * frames in raw mode. 509 */ 510 ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10, 511 512 /* Firmware Supports Adaptive CCA*/ 513 ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11, 514 515 /* Firmware supports management frame protection */ 516 ATH10K_FW_FEATURE_MFP_SUPPORT = 12, 517 518 /* Firmware supports pull-push model where host shares it's software 519 * queue state with firmware and firmware generates fetch requests 520 * telling host which queues to dequeue tx from. 521 * 522 * Primary function of this is improved MU-MIMO performance with 523 * multiple clients. 524 */ 525 ATH10K_FW_FEATURE_PEER_FLOW_CONTROL = 13, 526 527 /* keep last */ 528 ATH10K_FW_FEATURE_COUNT, 529 }; 530 531 enum ath10k_dev_flags { 532 /* Indicates that ath10k device is during CAC phase of DFS */ 533 ATH10K_CAC_RUNNING, 534 ATH10K_FLAG_CORE_REGISTERED, 535 536 /* Device has crashed and needs to restart. This indicates any pending 537 * waiters should immediately cancel instead of waiting for a time out. 538 */ 539 ATH10K_FLAG_CRASH_FLUSH, 540 541 /* Use Raw mode instead of native WiFi Tx/Rx encap mode. 542 * Raw mode supports both hardware and software crypto. Native WiFi only 543 * supports hardware crypto. 544 */ 545 ATH10K_FLAG_RAW_MODE, 546 547 /* Disable HW crypto engine */ 548 ATH10K_FLAG_HW_CRYPTO_DISABLED, 549 550 /* Bluetooth coexistance enabled */ 551 ATH10K_FLAG_BTCOEX, 552 }; 553 554 enum ath10k_cal_mode { 555 ATH10K_CAL_MODE_FILE, 556 ATH10K_CAL_MODE_OTP, 557 ATH10K_CAL_MODE_DT, 558 }; 559 560 enum ath10k_crypt_mode { 561 /* Only use hardware crypto engine */ 562 ATH10K_CRYPT_MODE_HW, 563 /* Only use software crypto engine */ 564 ATH10K_CRYPT_MODE_SW, 565 }; 566 567 static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode) 568 { 569 switch (mode) { 570 case ATH10K_CAL_MODE_FILE: 571 return "file"; 572 case ATH10K_CAL_MODE_OTP: 573 return "otp"; 574 case ATH10K_CAL_MODE_DT: 575 return "dt"; 576 } 577 578 return "unknown"; 579 } 580 581 enum ath10k_scan_state { 582 ATH10K_SCAN_IDLE, 583 ATH10K_SCAN_STARTING, 584 ATH10K_SCAN_RUNNING, 585 ATH10K_SCAN_ABORTING, 586 }; 587 588 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state) 589 { 590 switch (state) { 591 case ATH10K_SCAN_IDLE: 592 return "idle"; 593 case ATH10K_SCAN_STARTING: 594 return "starting"; 595 case ATH10K_SCAN_RUNNING: 596 return "running"; 597 case ATH10K_SCAN_ABORTING: 598 return "aborting"; 599 } 600 601 return "unknown"; 602 } 603 604 enum ath10k_tx_pause_reason { 605 ATH10K_TX_PAUSE_Q_FULL, 606 ATH10K_TX_PAUSE_MAX, 607 }; 608 609 struct ath10k { 610 struct ath_common ath_common; 611 struct ieee80211_hw *hw; 612 struct device *dev; 613 u8 mac_addr[ETH_ALEN]; 614 615 enum ath10k_hw_rev hw_rev; 616 u16 dev_id; 617 u32 chip_id; 618 u32 target_version; 619 u8 fw_version_major; 620 u32 fw_version_minor; 621 u16 fw_version_release; 622 u16 fw_version_build; 623 u32 fw_stats_req_mask; 624 u32 phy_capability; 625 u32 hw_min_tx_power; 626 u32 hw_max_tx_power; 627 u32 ht_cap_info; 628 u32 vht_cap_info; 629 u32 num_rf_chains; 630 u32 max_spatial_stream; 631 /* protected by conf_mutex */ 632 bool ani_enabled; 633 634 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT); 635 636 bool p2p; 637 638 struct { 639 enum ath10k_bus bus; 640 const struct ath10k_hif_ops *ops; 641 } hif; 642 643 struct completion target_suspend; 644 645 const struct ath10k_hw_regs *regs; 646 const struct ath10k_hw_values *hw_values; 647 struct ath10k_bmi bmi; 648 struct ath10k_wmi wmi; 649 struct ath10k_htc htc; 650 struct ath10k_htt htt; 651 652 struct ath10k_hw_params { 653 u32 id; 654 u16 dev_id; 655 const char *name; 656 u32 patch_load_addr; 657 int uart_pin; 658 u32 otp_exe_param; 659 660 /* This is true if given HW chip has a quirky Cycle Counter 661 * wraparound which resets to 0x7fffffff instead of 0. All 662 * other CC related counters (e.g. Rx Clear Count) are divided 663 * by 2 so they never wraparound themselves. 664 */ 665 bool has_shifted_cc_wraparound; 666 667 /* Some of chip expects fragment descriptor to be continuous 668 * memory for any TX operation. Set continuous_frag_desc flag 669 * for the hardware which have such requirement. 670 */ 671 bool continuous_frag_desc; 672 673 u32 channel_counters_freq_hz; 674 675 /* Mgmt tx descriptors threshold for limiting probe response 676 * frames. 677 */ 678 u32 max_probe_resp_desc_thres; 679 680 /* The padding bytes's location is different on various chips */ 681 enum ath10k_hw_4addr_pad hw_4addr_pad; 682 683 u32 num_msdu_desc; 684 u32 qcache_active_peers; 685 u32 tx_chain_mask; 686 u32 rx_chain_mask; 687 u32 max_spatial_stream; 688 689 struct ath10k_hw_params_fw { 690 const char *dir; 691 const char *fw; 692 const char *otp; 693 const char *board; 694 size_t board_size; 695 size_t board_ext_size; 696 } fw; 697 } hw_params; 698 699 const struct firmware *board; 700 const void *board_data; 701 size_t board_len; 702 703 const struct firmware *otp; 704 const void *otp_data; 705 size_t otp_len; 706 707 const struct firmware *firmware; 708 const void *firmware_data; 709 size_t firmware_len; 710 711 const struct firmware *cal_file; 712 713 struct { 714 const void *firmware_codeswap_data; 715 size_t firmware_codeswap_len; 716 struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info; 717 } swap; 718 719 struct { 720 u32 vendor; 721 u32 device; 722 u32 subsystem_vendor; 723 u32 subsystem_device; 724 725 bool bmi_ids_valid; 726 u8 bmi_board_id; 727 u8 bmi_chip_id; 728 } id; 729 730 int fw_api; 731 int bd_api; 732 enum ath10k_cal_mode cal_mode; 733 734 struct { 735 struct completion started; 736 struct completion completed; 737 struct completion on_channel; 738 struct delayed_work timeout; 739 enum ath10k_scan_state state; 740 bool is_roc; 741 int vdev_id; 742 int roc_freq; 743 bool roc_notify; 744 } scan; 745 746 struct { 747 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; 748 } mac; 749 750 /* should never be NULL; needed for regular htt rx */ 751 struct ieee80211_channel *rx_channel; 752 753 /* valid during scan; needed for mgmt rx during scan */ 754 struct ieee80211_channel *scan_channel; 755 756 /* current operating channel definition */ 757 struct cfg80211_chan_def chandef; 758 759 unsigned long long free_vdev_map; 760 struct ath10k_vif *monitor_arvif; 761 bool monitor; 762 int monitor_vdev_id; 763 bool monitor_started; 764 unsigned int filter_flags; 765 unsigned long dev_flags; 766 bool dfs_block_radar_events; 767 768 /* protected by conf_mutex */ 769 bool radar_enabled; 770 int num_started_vdevs; 771 772 /* Protected by conf-mutex */ 773 u8 cfg_tx_chainmask; 774 u8 cfg_rx_chainmask; 775 776 struct completion install_key_done; 777 778 struct completion vdev_setup_done; 779 780 struct workqueue_struct *workqueue; 781 /* Auxiliary workqueue */ 782 struct workqueue_struct *workqueue_aux; 783 784 /* prevents concurrent FW reconfiguration */ 785 struct mutex conf_mutex; 786 787 /* protects shared structure data */ 788 spinlock_t data_lock; 789 790 struct list_head arvifs; 791 struct list_head peers; 792 wait_queue_head_t peer_mapping_wq; 793 794 /* protected by conf_mutex */ 795 int num_peers; 796 int num_stations; 797 798 int max_num_peers; 799 int max_num_stations; 800 int max_num_vdevs; 801 int max_num_tdls_vdevs; 802 int num_active_peers; 803 int num_tids; 804 805 struct work_struct svc_rdy_work; 806 struct sk_buff *svc_rdy_skb; 807 808 struct work_struct offchan_tx_work; 809 struct sk_buff_head offchan_tx_queue; 810 struct completion offchan_tx_completed; 811 struct sk_buff *offchan_tx_skb; 812 813 struct work_struct wmi_mgmt_tx_work; 814 struct sk_buff_head wmi_mgmt_tx_queue; 815 816 enum ath10k_state state; 817 818 struct work_struct register_work; 819 struct work_struct restart_work; 820 821 /* cycle count is reported twice for each visited channel during scan. 822 * access protected by data_lock */ 823 u32 survey_last_rx_clear_count; 824 u32 survey_last_cycle_count; 825 struct survey_info survey[ATH10K_NUM_CHANS]; 826 827 /* Channel info events are expected to come in pairs without and with 828 * COMPLETE flag set respectively for each channel visit during scan. 829 * 830 * However there are deviations from this rule. This flag is used to 831 * avoid reporting garbage data. 832 */ 833 bool ch_info_can_report_survey; 834 835 struct dfs_pattern_detector *dfs_detector; 836 837 unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */ 838 839 #ifdef CONFIG_ATH10K_DEBUGFS 840 struct ath10k_debug debug; 841 #endif 842 843 struct { 844 /* relay(fs) channel for spectral scan */ 845 struct rchan *rfs_chan_spec_scan; 846 847 /* spectral_mode and spec_config are protected by conf_mutex */ 848 enum ath10k_spectral_mode mode; 849 struct ath10k_spec_scan config; 850 } spectral; 851 852 struct { 853 /* protected by conf_mutex */ 854 const struct firmware *utf; 855 char utf_version[32]; 856 const void *utf_firmware_data; 857 size_t utf_firmware_len; 858 DECLARE_BITMAP(orig_fw_features, ATH10K_FW_FEATURE_COUNT); 859 enum ath10k_fw_wmi_op_version orig_wmi_op_version; 860 enum ath10k_fw_wmi_op_version op_version; 861 /* protected by data_lock */ 862 bool utf_monitor; 863 } testmode; 864 865 struct { 866 /* protected by data_lock */ 867 u32 fw_crash_counter; 868 u32 fw_warm_reset_counter; 869 u32 fw_cold_reset_counter; 870 } stats; 871 872 struct ath10k_thermal thermal; 873 struct ath10k_wow wow; 874 875 /* must be last */ 876 u8 drv_priv[0] __aligned(sizeof(void *)); 877 }; 878 879 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 880 enum ath10k_bus bus, 881 enum ath10k_hw_rev hw_rev, 882 const struct ath10k_hif_ops *hif_ops); 883 void ath10k_core_destroy(struct ath10k *ar); 884 void ath10k_core_get_fw_features_str(struct ath10k *ar, 885 char *buf, 886 size_t max_len); 887 888 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode); 889 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt); 890 void ath10k_core_stop(struct ath10k *ar); 891 int ath10k_core_register(struct ath10k *ar, u32 chip_id); 892 void ath10k_core_unregister(struct ath10k *ar); 893 894 #endif /* _CORE_H_ */ 895