1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #ifndef _CORE_H_ 19 #define _CORE_H_ 20 21 #include <linux/completion.h> 22 #include <linux/if_ether.h> 23 #include <linux/types.h> 24 #include <linux/pci.h> 25 26 #include "htt.h" 27 #include "htc.h" 28 #include "hw.h" 29 #include "targaddrs.h" 30 #include "wmi.h" 31 #include "../ath.h" 32 #include "../regd.h" 33 #include "../dfs_pattern_detector.h" 34 35 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB) 36 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 37 #define WO(_f) ((_f##_OFFSET) >> 2) 38 39 #define ATH10K_SCAN_ID 0 40 #define WMI_READY_TIMEOUT (5 * HZ) 41 #define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ) 42 #define ATH10K_NUM_CHANS 38 43 44 /* Antenna noise floor */ 45 #define ATH10K_DEFAULT_NOISE_FLOOR -95 46 47 #define ATH10K_MAX_NUM_MGMT_PENDING 128 48 49 struct ath10k; 50 51 struct ath10k_skb_cb { 52 dma_addr_t paddr; 53 bool is_mapped; 54 bool is_aborted; 55 u8 vdev_id; 56 57 struct { 58 u8 tid; 59 bool is_offchan; 60 61 u8 frag_len; 62 u8 pad_len; 63 } __packed htt; 64 } __packed; 65 66 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb) 67 { 68 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) > 69 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 70 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 71 } 72 73 static inline int ath10k_skb_map(struct device *dev, struct sk_buff *skb) 74 { 75 if (ATH10K_SKB_CB(skb)->is_mapped) 76 return -EINVAL; 77 78 ATH10K_SKB_CB(skb)->paddr = dma_map_single(dev, skb->data, skb->len, 79 DMA_TO_DEVICE); 80 81 if (unlikely(dma_mapping_error(dev, ATH10K_SKB_CB(skb)->paddr))) 82 return -EIO; 83 84 ATH10K_SKB_CB(skb)->is_mapped = true; 85 return 0; 86 } 87 88 static inline int ath10k_skb_unmap(struct device *dev, struct sk_buff *skb) 89 { 90 if (!ATH10K_SKB_CB(skb)->is_mapped) 91 return -EINVAL; 92 93 dma_unmap_single(dev, ATH10K_SKB_CB(skb)->paddr, skb->len, 94 DMA_TO_DEVICE); 95 ATH10K_SKB_CB(skb)->is_mapped = false; 96 return 0; 97 } 98 99 static inline u32 host_interest_item_address(u32 item_offset) 100 { 101 return QCA988X_HOST_INTEREST_ADDRESS + item_offset; 102 } 103 104 struct ath10k_bmi { 105 bool done_sent; 106 }; 107 108 #define ATH10K_MAX_MEM_REQS 16 109 110 struct ath10k_mem_chunk { 111 void *vaddr; 112 dma_addr_t paddr; 113 u32 len; 114 u32 req_id; 115 }; 116 117 struct ath10k_wmi { 118 enum ath10k_htc_ep_id eid; 119 struct completion service_ready; 120 struct completion unified_ready; 121 wait_queue_head_t tx_credits_wq; 122 struct wmi_cmd_map *cmd; 123 struct wmi_vdev_param_map *vdev_param; 124 struct wmi_pdev_param_map *pdev_param; 125 126 u32 num_mem_chunks; 127 struct ath10k_mem_chunk mem_chunks[ATH10K_MAX_MEM_REQS]; 128 }; 129 130 struct ath10k_peer_stat { 131 u8 peer_macaddr[ETH_ALEN]; 132 u32 peer_rssi; 133 u32 peer_tx_rate; 134 }; 135 136 struct ath10k_target_stats { 137 /* PDEV stats */ 138 s32 ch_noise_floor; 139 u32 tx_frame_count; 140 u32 rx_frame_count; 141 u32 rx_clear_count; 142 u32 cycle_count; 143 u32 phy_err_count; 144 u32 chan_tx_power; 145 146 /* PDEV TX stats */ 147 s32 comp_queued; 148 s32 comp_delivered; 149 s32 msdu_enqued; 150 s32 mpdu_enqued; 151 s32 wmm_drop; 152 s32 local_enqued; 153 s32 local_freed; 154 s32 hw_queued; 155 s32 hw_reaped; 156 s32 underrun; 157 s32 tx_abort; 158 s32 mpdus_requed; 159 u32 tx_ko; 160 u32 data_rc; 161 u32 self_triggers; 162 u32 sw_retry_failure; 163 u32 illgl_rate_phy_err; 164 u32 pdev_cont_xretry; 165 u32 pdev_tx_timeout; 166 u32 pdev_resets; 167 u32 phy_underrun; 168 u32 txop_ovf; 169 170 /* PDEV RX stats */ 171 s32 mid_ppdu_route_change; 172 s32 status_rcvd; 173 s32 r0_frags; 174 s32 r1_frags; 175 s32 r2_frags; 176 s32 r3_frags; 177 s32 htt_msdus; 178 s32 htt_mpdus; 179 s32 loc_msdus; 180 s32 loc_mpdus; 181 s32 oversize_amsdu; 182 s32 phy_errs; 183 s32 phy_err_drop; 184 s32 mpdu_errs; 185 186 /* VDEV STATS */ 187 188 /* PEER STATS */ 189 u8 peers; 190 struct ath10k_peer_stat peer_stat[TARGET_NUM_PEERS]; 191 192 /* TODO: Beacon filter stats */ 193 194 }; 195 196 struct ath10k_dfs_stats { 197 u32 phy_errors; 198 u32 pulses_total; 199 u32 pulses_detected; 200 u32 pulses_discarded; 201 u32 radar_detected; 202 }; 203 204 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */ 205 206 struct ath10k_peer { 207 struct list_head list; 208 int vdev_id; 209 u8 addr[ETH_ALEN]; 210 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS); 211 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1]; 212 }; 213 214 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ) 215 216 struct ath10k_vif { 217 struct list_head list; 218 219 u32 vdev_id; 220 enum wmi_vdev_type vdev_type; 221 enum wmi_vdev_subtype vdev_subtype; 222 u32 beacon_interval; 223 u32 dtim_period; 224 struct sk_buff *beacon; 225 226 struct ath10k *ar; 227 struct ieee80211_vif *vif; 228 229 struct work_struct wep_key_work; 230 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1]; 231 u8 def_wep_key_idx; 232 u8 def_wep_key_newidx; 233 234 u16 tx_seq_no; 235 236 union { 237 struct { 238 u8 bssid[ETH_ALEN]; 239 u32 uapsd; 240 } sta; 241 struct { 242 /* 127 stations; wmi limit */ 243 u8 tim_bitmap[16]; 244 u8 tim_len; 245 u32 ssid_len; 246 u8 ssid[IEEE80211_MAX_SSID_LEN]; 247 bool hidden_ssid; 248 /* P2P_IE with NoA attribute for P2P_GO case */ 249 u32 noa_len; 250 u8 *noa_data; 251 } ap; 252 struct { 253 u8 bssid[ETH_ALEN]; 254 } ibss; 255 } u; 256 257 u8 fixed_rate; 258 u8 fixed_nss; 259 }; 260 261 struct ath10k_vif_iter { 262 u32 vdev_id; 263 struct ath10k_vif *arvif; 264 }; 265 266 struct ath10k_debug { 267 struct dentry *debugfs_phy; 268 269 struct ath10k_target_stats target_stats; 270 u32 wmi_service_bitmap[WMI_SERVICE_BM_SIZE]; 271 272 struct completion event_stats_compl; 273 274 unsigned long htt_stats_mask; 275 struct delayed_work htt_stats_dwork; 276 struct ath10k_dfs_stats dfs_stats; 277 struct ath_dfs_pool_stats dfs_pool_stats; 278 279 u32 fw_dbglog_mask; 280 }; 281 282 enum ath10k_state { 283 ATH10K_STATE_OFF = 0, 284 ATH10K_STATE_ON, 285 286 /* When doing firmware recovery the device is first powered down. 287 * mac80211 is supposed to call in to start() hook later on. It is 288 * however possible that driver unloading and firmware crash overlap. 289 * mac80211 can wait on conf_mutex in stop() while the device is 290 * stopped in ath10k_core_restart() work holding conf_mutex. The state 291 * RESTARTED means that the device is up and mac80211 has started hw 292 * reconfiguration. Once mac80211 is done with the reconfiguration we 293 * set the state to STATE_ON in restart_complete(). */ 294 ATH10K_STATE_RESTARTING, 295 ATH10K_STATE_RESTARTED, 296 297 /* The device has crashed while restarting hw. This state is like ON 298 * but commands are blocked in HTC and -ECOMM response is given. This 299 * prevents completion timeouts and makes the driver more responsive to 300 * userspace commands. This is also prevents recursive recovery. */ 301 ATH10K_STATE_WEDGED, 302 }; 303 304 enum ath10k_fw_features { 305 /* wmi_mgmt_rx_hdr contains extra RSSI information */ 306 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0, 307 308 /* firmware from 10X branch */ 309 ATH10K_FW_FEATURE_WMI_10X = 1, 310 311 /* firmware support tx frame management over WMI, otherwise it's HTT */ 312 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2, 313 314 /* Firmware does not support P2P */ 315 ATH10K_FW_FEATURE_NO_P2P = 3, 316 317 /* keep last */ 318 ATH10K_FW_FEATURE_COUNT, 319 }; 320 321 enum ath10k_dev_flags { 322 /* Indicates that ath10k device is during CAC phase of DFS */ 323 ATH10K_CAC_RUNNING, 324 ATH10K_FLAG_FIRST_BOOT_DONE, 325 }; 326 327 struct ath10k { 328 struct ath_common ath_common; 329 struct ieee80211_hw *hw; 330 struct device *dev; 331 u8 mac_addr[ETH_ALEN]; 332 333 u32 chip_id; 334 u32 target_version; 335 u8 fw_version_major; 336 u32 fw_version_minor; 337 u16 fw_version_release; 338 u16 fw_version_build; 339 u32 phy_capability; 340 u32 hw_min_tx_power; 341 u32 hw_max_tx_power; 342 u32 ht_cap_info; 343 u32 vht_cap_info; 344 u32 num_rf_chains; 345 346 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT); 347 348 struct targetdef *targetdef; 349 struct hostdef *hostdef; 350 351 bool p2p; 352 353 struct { 354 void *priv; 355 const struct ath10k_hif_ops *ops; 356 } hif; 357 358 wait_queue_head_t event_queue; 359 bool is_target_paused; 360 361 struct ath10k_bmi bmi; 362 struct ath10k_wmi wmi; 363 struct ath10k_htc htc; 364 struct ath10k_htt htt; 365 366 struct ath10k_hw_params { 367 u32 id; 368 const char *name; 369 u32 patch_load_addr; 370 371 struct ath10k_hw_params_fw { 372 const char *dir; 373 const char *fw; 374 const char *otp; 375 const char *board; 376 } fw; 377 } hw_params; 378 379 const struct firmware *board; 380 const void *board_data; 381 size_t board_len; 382 383 const struct firmware *otp; 384 const void *otp_data; 385 size_t otp_len; 386 387 const struct firmware *firmware; 388 const void *firmware_data; 389 size_t firmware_len; 390 391 int fw_api; 392 393 struct { 394 struct completion started; 395 struct completion completed; 396 struct completion on_channel; 397 struct timer_list timeout; 398 bool is_roc; 399 bool in_progress; 400 bool aborting; 401 int vdev_id; 402 int roc_freq; 403 } scan; 404 405 struct { 406 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; 407 } mac; 408 409 /* should never be NULL; needed for regular htt rx */ 410 struct ieee80211_channel *rx_channel; 411 412 /* valid during scan; needed for mgmt rx during scan */ 413 struct ieee80211_channel *scan_channel; 414 415 int free_vdev_map; 416 int monitor_vdev_id; 417 bool monitor_enabled; 418 bool monitor_present; 419 unsigned int filter_flags; 420 unsigned long dev_flags; 421 u32 dfs_block_radar_events; 422 423 struct wmi_pdev_set_wmm_params_arg wmm_params; 424 struct completion install_key_done; 425 426 struct completion vdev_setup_done; 427 428 struct workqueue_struct *workqueue; 429 430 /* prevents concurrent FW reconfiguration */ 431 struct mutex conf_mutex; 432 433 /* protects shared structure data */ 434 spinlock_t data_lock; 435 436 struct list_head arvifs; 437 struct list_head peers; 438 wait_queue_head_t peer_mapping_wq; 439 440 /* number of created peers; protected by data_lock */ 441 int num_peers; 442 443 struct work_struct offchan_tx_work; 444 struct sk_buff_head offchan_tx_queue; 445 struct completion offchan_tx_completed; 446 struct sk_buff *offchan_tx_skb; 447 448 struct work_struct wmi_mgmt_tx_work; 449 struct sk_buff_head wmi_mgmt_tx_queue; 450 451 enum ath10k_state state; 452 453 struct work_struct restart_work; 454 455 /* cycle count is reported twice for each visited channel during scan. 456 * access protected by data_lock */ 457 u32 survey_last_rx_clear_count; 458 u32 survey_last_cycle_count; 459 struct survey_info survey[ATH10K_NUM_CHANS]; 460 461 struct dfs_pattern_detector *dfs_detector; 462 463 #ifdef CONFIG_ATH10K_DEBUGFS 464 struct ath10k_debug debug; 465 #endif 466 }; 467 468 struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev, 469 const struct ath10k_hif_ops *hif_ops); 470 void ath10k_core_destroy(struct ath10k *ar); 471 472 int ath10k_core_start(struct ath10k *ar); 473 void ath10k_core_stop(struct ath10k *ar); 474 int ath10k_core_register(struct ath10k *ar, u32 chip_id); 475 void ath10k_core_unregister(struct ath10k *ar); 476 477 #endif /* _CORE_H_ */ 478