1 /* SPDX-License-Identifier: ISC */ 2 /* 3 * Copyright (c) 2005-2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. 6 */ 7 8 #ifndef _CORE_H_ 9 #define _CORE_H_ 10 11 #include <linux/completion.h> 12 #include <linux/if_ether.h> 13 #include <linux/types.h> 14 #include <linux/pci.h> 15 #include <linux/uuid.h> 16 #include <linux/time.h> 17 18 #include "htt.h" 19 #include "htc.h" 20 #include "hw.h" 21 #include "targaddrs.h" 22 #include "wmi.h" 23 #include "../ath.h" 24 #include "../regd.h" 25 #include "../dfs_pattern_detector.h" 26 #include "spectral.h" 27 #include "thermal.h" 28 #include "wow.h" 29 #include "swap.h" 30 31 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB) 32 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 33 #define WO(_f) ((_f##_OFFSET) >> 2) 34 35 #define ATH10K_SCAN_ID 0 36 #define ATH10K_SCAN_CHANNEL_SWITCH_WMI_EVT_OVERHEAD 10 /* msec */ 37 #define WMI_READY_TIMEOUT (5 * HZ) 38 #define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ) 39 #define ATH10K_CONNECTION_LOSS_HZ (3 * HZ) 40 #define ATH10K_NUM_CHANS 41 41 #define ATH10K_MAX_5G_CHAN 173 42 43 /* Antenna noise floor */ 44 #define ATH10K_DEFAULT_NOISE_FLOOR -95 45 46 #define ATH10K_INVALID_RSSI 128 47 48 #define ATH10K_MAX_NUM_MGMT_PENDING 128 49 50 /* number of failed packets (20 packets with 16 sw reties each) */ 51 #define ATH10K_KICKOUT_THRESHOLD (20 * 16) 52 53 /* 54 * Use insanely high numbers to make sure that the firmware implementation 55 * won't start, we have the same functionality already in hostapd. Unit 56 * is seconds. 57 */ 58 #define ATH10K_KEEPALIVE_MIN_IDLE 3747 59 #define ATH10K_KEEPALIVE_MAX_IDLE 3895 60 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900 61 62 /* NAPI poll budget */ 63 #define ATH10K_NAPI_BUDGET 64 64 65 /* SMBIOS type containing Board Data File Name Extension */ 66 #define ATH10K_SMBIOS_BDF_EXT_TYPE 0xF8 67 68 /* SMBIOS type structure length (excluding strings-set) */ 69 #define ATH10K_SMBIOS_BDF_EXT_LENGTH 0x9 70 71 /* Offset pointing to Board Data File Name Extension */ 72 #define ATH10K_SMBIOS_BDF_EXT_OFFSET 0x8 73 74 /* Board Data File Name Extension string length. 75 * String format: BDF_<Customer ID>_<Extension>\0 76 */ 77 #define ATH10K_SMBIOS_BDF_EXT_STR_LENGTH 0x20 78 79 /* The magic used by QCA spec */ 80 #define ATH10K_SMBIOS_BDF_EXT_MAGIC "BDF_" 81 82 /* Default Airtime weight multipler (Tuned for multiclient performance) */ 83 #define ATH10K_AIRTIME_WEIGHT_MULTIPLIER 4 84 85 #define ATH10K_MAX_RETRY_COUNT 30 86 87 #define ATH10K_ITER_NORMAL_FLAGS (IEEE80211_IFACE_ITER_NORMAL | \ 88 IEEE80211_IFACE_SKIP_SDATA_NOT_IN_DRIVER) 89 #define ATH10K_ITER_RESUME_FLAGS (IEEE80211_IFACE_ITER_RESUME_ALL |\ 90 IEEE80211_IFACE_SKIP_SDATA_NOT_IN_DRIVER) 91 92 struct ath10k; 93 94 static inline const char *ath10k_bus_str(enum ath10k_bus bus) 95 { 96 switch (bus) { 97 case ATH10K_BUS_PCI: 98 return "pci"; 99 case ATH10K_BUS_AHB: 100 return "ahb"; 101 case ATH10K_BUS_SDIO: 102 return "sdio"; 103 case ATH10K_BUS_USB: 104 return "usb"; 105 case ATH10K_BUS_SNOC: 106 return "snoc"; 107 } 108 109 return "unknown"; 110 } 111 112 enum ath10k_skb_flags { 113 ATH10K_SKB_F_NO_HWCRYPT = BIT(0), 114 ATH10K_SKB_F_DTIM_ZERO = BIT(1), 115 ATH10K_SKB_F_DELIVER_CAB = BIT(2), 116 ATH10K_SKB_F_MGMT = BIT(3), 117 ATH10K_SKB_F_QOS = BIT(4), 118 ATH10K_SKB_F_RAW_TX = BIT(5), 119 ATH10K_SKB_F_NOACK_TID = BIT(6), 120 }; 121 122 struct ath10k_skb_cb { 123 dma_addr_t paddr; 124 u8 flags; 125 u8 eid; 126 u16 msdu_id; 127 u16 airtime_est; 128 struct ieee80211_vif *vif; 129 struct ieee80211_txq *txq; 130 u32 ucast_cipher; 131 } __packed; 132 133 struct ath10k_skb_rxcb { 134 dma_addr_t paddr; 135 struct hlist_node hlist; 136 u8 eid; 137 }; 138 139 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb) 140 { 141 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) > 142 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 143 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 144 } 145 146 static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb) 147 { 148 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb)); 149 return (struct ath10k_skb_rxcb *)skb->cb; 150 } 151 152 #define ATH10K_RXCB_SKB(rxcb) \ 153 container_of((void *)rxcb, struct sk_buff, cb) 154 155 static inline u32 host_interest_item_address(u32 item_offset) 156 { 157 return QCA988X_HOST_INTEREST_ADDRESS + item_offset; 158 } 159 160 enum ath10k_phy_mode { 161 ATH10K_PHY_MODE_LEGACY = 0, 162 ATH10K_PHY_MODE_HT = 1, 163 ATH10K_PHY_MODE_VHT = 2, 164 }; 165 166 /* Data rate 100KBPS based on IE Index */ 167 struct ath10k_index_ht_data_rate_type { 168 u8 beacon_rate_index; 169 u16 supported_rate[4]; 170 }; 171 172 /* Data rate 100KBPS based on IE Index */ 173 struct ath10k_index_vht_data_rate_type { 174 u8 beacon_rate_index; 175 u16 supported_VHT80_rate[2]; 176 u16 supported_VHT40_rate[2]; 177 u16 supported_VHT20_rate[2]; 178 }; 179 180 struct ath10k_bmi { 181 bool done_sent; 182 }; 183 184 struct ath10k_mem_chunk { 185 void *vaddr; 186 dma_addr_t paddr; 187 u32 len; 188 u32 req_id; 189 }; 190 191 struct ath10k_wmi { 192 enum ath10k_htc_ep_id eid; 193 struct completion service_ready; 194 struct completion unified_ready; 195 struct completion barrier; 196 struct completion radar_confirm; 197 wait_queue_head_t tx_credits_wq; 198 DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX); 199 struct wmi_cmd_map *cmd; 200 struct wmi_vdev_param_map *vdev_param; 201 struct wmi_pdev_param_map *pdev_param; 202 struct wmi_peer_param_map *peer_param; 203 const struct wmi_ops *ops; 204 const struct wmi_peer_flags_map *peer_flags; 205 206 u32 mgmt_max_num_pending_tx; 207 208 /* Protected by data_lock */ 209 struct idr mgmt_pending_tx; 210 211 u32 num_mem_chunks; 212 u32 rx_decap_mode; 213 struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS]; 214 }; 215 216 struct ath10k_fw_stats_peer { 217 struct list_head list; 218 219 u8 peer_macaddr[ETH_ALEN]; 220 u32 peer_rssi; 221 u32 peer_tx_rate; 222 u32 peer_rx_rate; /* 10x only */ 223 u64 rx_duration; 224 }; 225 226 struct ath10k_fw_extd_stats_peer { 227 struct list_head list; 228 229 u8 peer_macaddr[ETH_ALEN]; 230 u64 rx_duration; 231 }; 232 233 struct ath10k_fw_stats_vdev { 234 struct list_head list; 235 236 u32 vdev_id; 237 u32 beacon_snr; 238 u32 data_snr; 239 u32 num_tx_frames[4]; 240 u32 num_rx_frames; 241 u32 num_tx_frames_retries[4]; 242 u32 num_tx_frames_failures[4]; 243 u32 num_rts_fail; 244 u32 num_rts_success; 245 u32 num_rx_err; 246 u32 num_rx_discard; 247 u32 num_tx_not_acked; 248 u32 tx_rate_history[10]; 249 u32 beacon_rssi_history[10]; 250 }; 251 252 struct ath10k_fw_stats_vdev_extd { 253 struct list_head list; 254 255 u32 vdev_id; 256 u32 ppdu_aggr_cnt; 257 u32 ppdu_noack; 258 u32 mpdu_queued; 259 u32 ppdu_nonaggr_cnt; 260 u32 mpdu_sw_requeued; 261 u32 mpdu_suc_retry; 262 u32 mpdu_suc_multitry; 263 u32 mpdu_fail_retry; 264 u32 tx_ftm_suc; 265 u32 tx_ftm_suc_retry; 266 u32 tx_ftm_fail; 267 u32 rx_ftmr_cnt; 268 u32 rx_ftmr_dup_cnt; 269 u32 rx_iftmr_cnt; 270 u32 rx_iftmr_dup_cnt; 271 }; 272 273 struct ath10k_fw_stats_pdev { 274 struct list_head list; 275 276 /* PDEV stats */ 277 s32 ch_noise_floor; 278 u32 tx_frame_count; /* Cycles spent transmitting frames */ 279 u32 rx_frame_count; /* Cycles spent receiving frames */ 280 u32 rx_clear_count; /* Total channel busy time, evidently */ 281 u32 cycle_count; /* Total on-channel time */ 282 u32 phy_err_count; 283 u32 chan_tx_power; 284 u32 ack_rx_bad; 285 u32 rts_bad; 286 u32 rts_good; 287 u32 fcs_bad; 288 u32 no_beacons; 289 u32 mib_int_count; 290 291 /* PDEV TX stats */ 292 s32 comp_queued; 293 s32 comp_delivered; 294 s32 msdu_enqued; 295 s32 mpdu_enqued; 296 s32 wmm_drop; 297 s32 local_enqued; 298 s32 local_freed; 299 s32 hw_queued; 300 s32 hw_reaped; 301 s32 underrun; 302 u32 hw_paused; 303 s32 tx_abort; 304 s32 mpdus_requeued; 305 u32 tx_ko; 306 u32 data_rc; 307 u32 self_triggers; 308 u32 sw_retry_failure; 309 u32 illgl_rate_phy_err; 310 u32 pdev_cont_xretry; 311 u32 pdev_tx_timeout; 312 u32 pdev_resets; 313 u32 phy_underrun; 314 u32 txop_ovf; 315 u32 seq_posted; 316 u32 seq_failed_queueing; 317 u32 seq_completed; 318 u32 seq_restarted; 319 u32 mu_seq_posted; 320 u32 mpdus_sw_flush; 321 u32 mpdus_hw_filter; 322 u32 mpdus_truncated; 323 u32 mpdus_ack_failed; 324 u32 mpdus_expired; 325 326 /* PDEV RX stats */ 327 s32 mid_ppdu_route_change; 328 s32 status_rcvd; 329 s32 r0_frags; 330 s32 r1_frags; 331 s32 r2_frags; 332 s32 r3_frags; 333 s32 htt_msdus; 334 s32 htt_mpdus; 335 s32 loc_msdus; 336 s32 loc_mpdus; 337 s32 oversize_amsdu; 338 s32 phy_errs; 339 s32 phy_err_drop; 340 s32 mpdu_errs; 341 s32 rx_ovfl_errs; 342 }; 343 344 struct ath10k_fw_stats { 345 bool extended; 346 struct list_head pdevs; 347 struct list_head vdevs; 348 struct list_head peers; 349 struct list_head peers_extd; 350 }; 351 352 #define ATH10K_TPC_TABLE_TYPE_FLAG 1 353 #define ATH10K_TPC_PREAM_TABLE_END 0xFFFF 354 355 struct ath10k_tpc_table { 356 u32 pream_idx[WMI_TPC_RATE_MAX]; 357 u8 rate_code[WMI_TPC_RATE_MAX]; 358 char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; 359 }; 360 361 struct ath10k_tpc_stats { 362 u32 reg_domain; 363 u32 chan_freq; 364 u32 phy_mode; 365 u32 twice_antenna_reduction; 366 u32 twice_max_rd_power; 367 s32 twice_antenna_gain; 368 u32 power_limit; 369 u32 num_tx_chain; 370 u32 ctl; 371 u32 rate_max; 372 u8 flag[WMI_TPC_FLAG]; 373 struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG]; 374 }; 375 376 struct ath10k_tpc_table_final { 377 u32 pream_idx[WMI_TPC_FINAL_RATE_MAX]; 378 u8 rate_code[WMI_TPC_FINAL_RATE_MAX]; 379 char tpc_value[WMI_TPC_FINAL_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; 380 }; 381 382 struct ath10k_tpc_stats_final { 383 u32 reg_domain; 384 u32 chan_freq; 385 u32 phy_mode; 386 u32 twice_antenna_reduction; 387 u32 twice_max_rd_power; 388 s32 twice_antenna_gain; 389 u32 power_limit; 390 u32 num_tx_chain; 391 u32 ctl; 392 u32 rate_max; 393 u8 flag[WMI_TPC_FLAG]; 394 struct ath10k_tpc_table_final tpc_table_final[WMI_TPC_FLAG]; 395 }; 396 397 struct ath10k_dfs_stats { 398 u32 phy_errors; 399 u32 pulses_total; 400 u32 pulses_detected; 401 u32 pulses_discarded; 402 u32 radar_detected; 403 }; 404 405 enum ath10k_radar_confirmation_state { 406 ATH10K_RADAR_CONFIRMATION_IDLE = 0, 407 ATH10K_RADAR_CONFIRMATION_INPROGRESS, 408 ATH10K_RADAR_CONFIRMATION_STOPPED, 409 }; 410 411 struct ath10k_radar_found_info { 412 u32 pri_min; 413 u32 pri_max; 414 u32 width_min; 415 u32 width_max; 416 u32 sidx_min; 417 u32 sidx_max; 418 }; 419 420 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */ 421 422 struct ath10k_peer { 423 struct list_head list; 424 struct ieee80211_vif *vif; 425 struct ieee80211_sta *sta; 426 427 bool removed; 428 int vdev_id; 429 u8 addr[ETH_ALEN]; 430 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS); 431 432 /* protected by ar->data_lock */ 433 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1]; 434 union htt_rx_pn_t tids_last_pn[ATH10K_TXRX_NUM_EXT_TIDS]; 435 bool tids_last_pn_valid[ATH10K_TXRX_NUM_EXT_TIDS]; 436 union htt_rx_pn_t frag_tids_last_pn[ATH10K_TXRX_NUM_EXT_TIDS]; 437 u32 frag_tids_seq[ATH10K_TXRX_NUM_EXT_TIDS]; 438 struct { 439 enum htt_security_types sec_type; 440 int pn_len; 441 } rx_pn[ATH10K_HTT_TXRX_PEER_SECURITY_MAX]; 442 }; 443 444 struct ath10k_txq { 445 struct list_head list; 446 unsigned long num_fw_queued; 447 unsigned long num_push_allowed; 448 }; 449 450 enum ath10k_pkt_rx_err { 451 ATH10K_PKT_RX_ERR_FCS, 452 ATH10K_PKT_RX_ERR_TKIP, 453 ATH10K_PKT_RX_ERR_CRYPT, 454 ATH10K_PKT_RX_ERR_PEER_IDX_INVAL, 455 ATH10K_PKT_RX_ERR_MAX, 456 }; 457 458 enum ath10k_ampdu_subfrm_num { 459 ATH10K_AMPDU_SUBFRM_NUM_10, 460 ATH10K_AMPDU_SUBFRM_NUM_20, 461 ATH10K_AMPDU_SUBFRM_NUM_30, 462 ATH10K_AMPDU_SUBFRM_NUM_40, 463 ATH10K_AMPDU_SUBFRM_NUM_50, 464 ATH10K_AMPDU_SUBFRM_NUM_60, 465 ATH10K_AMPDU_SUBFRM_NUM_MORE, 466 ATH10K_AMPDU_SUBFRM_NUM_MAX, 467 }; 468 469 enum ath10k_amsdu_subfrm_num { 470 ATH10K_AMSDU_SUBFRM_NUM_1, 471 ATH10K_AMSDU_SUBFRM_NUM_2, 472 ATH10K_AMSDU_SUBFRM_NUM_3, 473 ATH10K_AMSDU_SUBFRM_NUM_4, 474 ATH10K_AMSDU_SUBFRM_NUM_MORE, 475 ATH10K_AMSDU_SUBFRM_NUM_MAX, 476 }; 477 478 struct ath10k_sta_tid_stats { 479 unsigned long rx_pkt_from_fw; 480 unsigned long rx_pkt_unchained; 481 unsigned long rx_pkt_drop_chained; 482 unsigned long rx_pkt_drop_filter; 483 unsigned long rx_pkt_err[ATH10K_PKT_RX_ERR_MAX]; 484 unsigned long rx_pkt_queued_for_mac; 485 unsigned long rx_pkt_ampdu[ATH10K_AMPDU_SUBFRM_NUM_MAX]; 486 unsigned long rx_pkt_amsdu[ATH10K_AMSDU_SUBFRM_NUM_MAX]; 487 }; 488 489 enum ath10k_counter_type { 490 ATH10K_COUNTER_TYPE_BYTES, 491 ATH10K_COUNTER_TYPE_PKTS, 492 ATH10K_COUNTER_TYPE_MAX, 493 }; 494 495 enum ath10k_stats_type { 496 ATH10K_STATS_TYPE_SUCC, 497 ATH10K_STATS_TYPE_FAIL, 498 ATH10K_STATS_TYPE_RETRY, 499 ATH10K_STATS_TYPE_AMPDU, 500 ATH10K_STATS_TYPE_MAX, 501 }; 502 503 struct ath10k_htt_data_stats { 504 u64 legacy[ATH10K_COUNTER_TYPE_MAX][ATH10K_LEGACY_NUM]; 505 u64 ht[ATH10K_COUNTER_TYPE_MAX][ATH10K_HT_MCS_NUM]; 506 u64 vht[ATH10K_COUNTER_TYPE_MAX][ATH10K_VHT_MCS_NUM]; 507 u64 bw[ATH10K_COUNTER_TYPE_MAX][ATH10K_BW_NUM]; 508 u64 nss[ATH10K_COUNTER_TYPE_MAX][ATH10K_NSS_NUM]; 509 u64 gi[ATH10K_COUNTER_TYPE_MAX][ATH10K_GI_NUM]; 510 u64 rate_table[ATH10K_COUNTER_TYPE_MAX][ATH10K_RATE_TABLE_NUM]; 511 }; 512 513 struct ath10k_htt_tx_stats { 514 struct ath10k_htt_data_stats stats[ATH10K_STATS_TYPE_MAX]; 515 u64 tx_duration; 516 u64 ba_fails; 517 u64 ack_fails; 518 }; 519 520 #define ATH10K_TID_MAX 8 521 522 struct ath10k_sta { 523 struct ath10k_vif *arvif; 524 525 /* the following are protected by ar->data_lock */ 526 u32 changed; /* IEEE80211_RC_* */ 527 u32 bw; 528 u32 nss; 529 u32 smps; 530 u16 peer_id; 531 struct rate_info txrate; 532 struct ieee80211_tx_info tx_info; 533 u32 tx_retries; 534 u32 tx_failed; 535 u32 last_tx_bitrate; 536 537 u32 rx_rate_code; 538 u32 rx_bitrate_kbps; 539 u32 tx_rate_code; 540 u32 tx_bitrate_kbps; 541 struct work_struct update_wk; 542 u64 rx_duration; 543 struct ath10k_htt_tx_stats *tx_stats; 544 u32 ucast_cipher; 545 546 #ifdef CONFIG_MAC80211_DEBUGFS 547 /* protected by conf_mutex */ 548 bool aggr_mode; 549 550 /* Protected with ar->data_lock */ 551 struct ath10k_sta_tid_stats tid_stats[IEEE80211_NUM_TIDS + 1]; 552 #endif 553 /* Protected with ar->data_lock */ 554 u32 peer_ps_state; 555 struct work_struct tid_config_wk; 556 int noack[ATH10K_TID_MAX]; 557 int retry_long[ATH10K_TID_MAX]; 558 int ampdu[ATH10K_TID_MAX]; 559 u8 rate_ctrl[ATH10K_TID_MAX]; 560 u32 rate_code[ATH10K_TID_MAX]; 561 int rtscts[ATH10K_TID_MAX]; 562 }; 563 564 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ) 565 #define ATH10K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ) 566 567 enum ath10k_beacon_state { 568 ATH10K_BEACON_SCHEDULED = 0, 569 ATH10K_BEACON_SENDING, 570 ATH10K_BEACON_SENT, 571 }; 572 573 struct ath10k_vif { 574 struct list_head list; 575 576 u32 vdev_id; 577 u16 peer_id; 578 enum wmi_vdev_type vdev_type; 579 enum wmi_vdev_subtype vdev_subtype; 580 u32 beacon_interval; 581 u32 dtim_period; 582 struct sk_buff *beacon; 583 /* protected by data_lock */ 584 enum ath10k_beacon_state beacon_state; 585 void *beacon_buf; 586 dma_addr_t beacon_paddr; 587 unsigned long tx_paused; /* arbitrary values defined by target */ 588 589 struct ath10k *ar; 590 struct ieee80211_vif *vif; 591 592 bool is_started; 593 bool is_up; 594 bool spectral_enabled; 595 bool ps; 596 u32 aid; 597 u8 bssid[ETH_ALEN]; 598 599 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1]; 600 s8 def_wep_key_idx; 601 602 u16 tx_seq_no; 603 604 union { 605 struct { 606 u32 uapsd; 607 } sta; 608 struct { 609 /* 512 stations */ 610 u8 tim_bitmap[64]; 611 u8 tim_len; 612 u32 ssid_len; 613 u8 ssid[IEEE80211_MAX_SSID_LEN]; 614 bool hidden_ssid; 615 /* P2P_IE with NoA attribute for P2P_GO case */ 616 u32 noa_len; 617 u8 *noa_data; 618 } ap; 619 } u; 620 621 bool use_cts_prot; 622 bool nohwcrypt; 623 int num_legacy_stations; 624 int txpower; 625 bool ftm_responder; 626 struct wmi_wmm_params_all_arg wmm_params; 627 struct work_struct ap_csa_work; 628 struct delayed_work connection_loss_work; 629 struct cfg80211_bitrate_mask bitrate_mask; 630 631 /* For setting VHT peer fixed rate, protected by conf_mutex */ 632 int vht_num_rates; 633 u8 vht_pfr; 634 u32 tid_conf_changed[ATH10K_TID_MAX]; 635 int noack[ATH10K_TID_MAX]; 636 int retry_long[ATH10K_TID_MAX]; 637 int ampdu[ATH10K_TID_MAX]; 638 u8 rate_ctrl[ATH10K_TID_MAX]; 639 u32 rate_code[ATH10K_TID_MAX]; 640 int rtscts[ATH10K_TID_MAX]; 641 u32 tids_rst; 642 }; 643 644 struct ath10k_vif_iter { 645 u32 vdev_id; 646 struct ath10k_vif *arvif; 647 }; 648 649 /* Copy Engine register dump, protected by ce-lock */ 650 struct ath10k_ce_crash_data { 651 __le32 base_addr; 652 __le32 src_wr_idx; 653 __le32 src_r_idx; 654 __le32 dst_wr_idx; 655 __le32 dst_r_idx; 656 }; 657 658 struct ath10k_ce_crash_hdr { 659 __le32 ce_count; 660 __le32 reserved[3]; /* for future use */ 661 struct ath10k_ce_crash_data entries[]; 662 }; 663 664 #define MAX_MEM_DUMP_TYPE 5 665 666 /* used for crash-dump storage, protected by data-lock */ 667 struct ath10k_fw_crash_data { 668 guid_t guid; 669 struct timespec64 timestamp; 670 __le32 registers[REG_DUMP_COUNT_QCA988X]; 671 struct ath10k_ce_crash_data ce_crash_data[CE_COUNT_MAX]; 672 673 u8 *ramdump_buf; 674 size_t ramdump_buf_len; 675 }; 676 677 struct ath10k_debug { 678 struct dentry *debugfs_phy; 679 680 struct ath10k_fw_stats fw_stats; 681 struct completion fw_stats_complete; 682 bool fw_stats_done; 683 684 unsigned long htt_stats_mask; 685 unsigned long reset_htt_stats; 686 struct delayed_work htt_stats_dwork; 687 struct ath10k_dfs_stats dfs_stats; 688 struct ath_dfs_pool_stats dfs_pool_stats; 689 690 /* used for tpc-dump storage, protected by data-lock */ 691 struct ath10k_tpc_stats *tpc_stats; 692 struct ath10k_tpc_stats_final *tpc_stats_final; 693 694 struct completion tpc_complete; 695 696 /* protected by conf_mutex */ 697 u64 fw_dbglog_mask; 698 u32 fw_dbglog_level; 699 u32 reg_addr; 700 u32 nf_cal_period; 701 void *cal_data; 702 u32 enable_extd_tx_stats; 703 u8 fw_dbglog_mode; 704 }; 705 706 enum ath10k_state { 707 ATH10K_STATE_OFF = 0, 708 ATH10K_STATE_ON, 709 710 /* When doing firmware recovery the device is first powered down. 711 * mac80211 is supposed to call in to start() hook later on. It is 712 * however possible that driver unloading and firmware crash overlap. 713 * mac80211 can wait on conf_mutex in stop() while the device is 714 * stopped in ath10k_core_restart() work holding conf_mutex. The state 715 * RESTARTED means that the device is up and mac80211 has started hw 716 * reconfiguration. Once mac80211 is done with the reconfiguration we 717 * set the state to STATE_ON in reconfig_complete(). 718 */ 719 ATH10K_STATE_RESTARTING, 720 ATH10K_STATE_RESTARTED, 721 722 /* The device has crashed while restarting hw. This state is like ON 723 * but commands are blocked in HTC and -ECOMM response is given. This 724 * prevents completion timeouts and makes the driver more responsive to 725 * userspace commands. This is also prevents recursive recovery. 726 */ 727 ATH10K_STATE_WEDGED, 728 729 /* factory tests */ 730 ATH10K_STATE_UTF, 731 }; 732 733 enum ath10k_firmware_mode { 734 /* the default mode, standard 802.11 functionality */ 735 ATH10K_FIRMWARE_MODE_NORMAL, 736 737 /* factory tests etc */ 738 ATH10K_FIRMWARE_MODE_UTF, 739 }; 740 741 enum ath10k_fw_features { 742 /* wmi_mgmt_rx_hdr contains extra RSSI information */ 743 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0, 744 745 /* Firmware from 10X branch. Deprecated, don't use in new code. */ 746 ATH10K_FW_FEATURE_WMI_10X = 1, 747 748 /* firmware support tx frame management over WMI, otherwise it's HTT */ 749 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2, 750 751 /* Firmware does not support P2P */ 752 ATH10K_FW_FEATURE_NO_P2P = 3, 753 754 /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature 755 * bit is required to be set as well. Deprecated, don't use in new 756 * code. 757 */ 758 ATH10K_FW_FEATURE_WMI_10_2 = 4, 759 760 /* Some firmware revisions lack proper multi-interface client powersave 761 * implementation. Enabling PS could result in connection drops, 762 * traffic stalls, etc. 763 */ 764 ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5, 765 766 /* Some firmware revisions have an incomplete WoWLAN implementation 767 * despite WMI service bit being advertised. This feature flag is used 768 * to distinguish whether WoWLAN is really supported or not. 769 */ 770 ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6, 771 772 /* Don't trust error code from otp.bin */ 773 ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7, 774 775 /* Some firmware revisions pad 4th hw address to 4 byte boundary making 776 * it 8 bytes long in Native Wifi Rx decap. 777 */ 778 ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8, 779 780 /* Firmware supports bypassing PLL setting on init. */ 781 ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9, 782 783 /* Raw mode support. If supported, FW supports receiving and trasmitting 784 * frames in raw mode. 785 */ 786 ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10, 787 788 /* Firmware Supports Adaptive CCA*/ 789 ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11, 790 791 /* Firmware supports management frame protection */ 792 ATH10K_FW_FEATURE_MFP_SUPPORT = 12, 793 794 /* Firmware supports pull-push model where host shares it's software 795 * queue state with firmware and firmware generates fetch requests 796 * telling host which queues to dequeue tx from. 797 * 798 * Primary function of this is improved MU-MIMO performance with 799 * multiple clients. 800 */ 801 ATH10K_FW_FEATURE_PEER_FLOW_CONTROL = 13, 802 803 /* Firmware supports BT-Coex without reloading firmware via pdev param. 804 * To support Bluetooth coexistence pdev param, WMI_COEX_GPIO_SUPPORT of 805 * extended resource config should be enabled always. This firmware IE 806 * is used to configure WMI_COEX_GPIO_SUPPORT. 807 */ 808 ATH10K_FW_FEATURE_BTCOEX_PARAM = 14, 809 810 /* Unused flag and proven to be not working, enable this if you want 811 * to experiment sending NULL func data frames in HTT TX 812 */ 813 ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR = 15, 814 815 /* Firmware allow other BSS mesh broadcast/multicast frames without 816 * creating monitor interface. Appropriate rxfilters are programmed for 817 * mesh vdev by firmware itself. This feature flags will be used for 818 * not creating monitor vdev while configuring mesh node. 819 */ 820 ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST = 16, 821 822 /* Firmware does not support power save in station mode. */ 823 ATH10K_FW_FEATURE_NO_PS = 17, 824 825 /* Firmware allows management tx by reference instead of by value. */ 826 ATH10K_FW_FEATURE_MGMT_TX_BY_REF = 18, 827 828 /* Firmware load is done externally, not by bmi */ 829 ATH10K_FW_FEATURE_NON_BMI = 19, 830 831 /* Firmware sends only one chan_info event per channel */ 832 ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL = 20, 833 834 /* Firmware allows setting peer fixed rate */ 835 ATH10K_FW_FEATURE_PEER_FIXED_RATE = 21, 836 837 /* Firmware support IRAM recovery */ 838 ATH10K_FW_FEATURE_IRAM_RECOVERY = 22, 839 840 /* keep last */ 841 ATH10K_FW_FEATURE_COUNT, 842 }; 843 844 enum ath10k_dev_flags { 845 /* Indicates that ath10k device is during CAC phase of DFS */ 846 ATH10K_CAC_RUNNING, 847 ATH10K_FLAG_CORE_REGISTERED, 848 849 /* Device has crashed and needs to restart. This indicates any pending 850 * waiters should immediately cancel instead of waiting for a time out. 851 */ 852 ATH10K_FLAG_CRASH_FLUSH, 853 854 /* Use Raw mode instead of native WiFi Tx/Rx encap mode. 855 * Raw mode supports both hardware and software crypto. Native WiFi only 856 * supports hardware crypto. 857 */ 858 ATH10K_FLAG_RAW_MODE, 859 860 /* Disable HW crypto engine */ 861 ATH10K_FLAG_HW_CRYPTO_DISABLED, 862 863 /* Bluetooth coexistance enabled */ 864 ATH10K_FLAG_BTCOEX, 865 866 /* Per Station statistics service */ 867 ATH10K_FLAG_PEER_STATS, 868 869 /* Indicates that ath10k device is during recovery process and not complete */ 870 ATH10K_FLAG_RESTARTING, 871 872 /* protected by conf_mutex */ 873 ATH10K_FLAG_NAPI_ENABLED, 874 }; 875 876 enum ath10k_cal_mode { 877 ATH10K_CAL_MODE_FILE, 878 ATH10K_CAL_MODE_OTP, 879 ATH10K_CAL_MODE_DT, 880 ATH10K_CAL_MODE_NVMEM, 881 ATH10K_PRE_CAL_MODE_FILE, 882 ATH10K_PRE_CAL_MODE_DT, 883 ATH10K_PRE_CAL_MODE_NVMEM, 884 ATH10K_CAL_MODE_EEPROM, 885 }; 886 887 enum ath10k_crypt_mode { 888 /* Only use hardware crypto engine */ 889 ATH10K_CRYPT_MODE_HW, 890 /* Only use software crypto engine */ 891 ATH10K_CRYPT_MODE_SW, 892 }; 893 894 static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode) 895 { 896 switch (mode) { 897 case ATH10K_CAL_MODE_FILE: 898 return "file"; 899 case ATH10K_CAL_MODE_OTP: 900 return "otp"; 901 case ATH10K_CAL_MODE_DT: 902 return "dt"; 903 case ATH10K_CAL_MODE_NVMEM: 904 return "nvmem"; 905 case ATH10K_PRE_CAL_MODE_FILE: 906 return "pre-cal-file"; 907 case ATH10K_PRE_CAL_MODE_DT: 908 return "pre-cal-dt"; 909 case ATH10K_PRE_CAL_MODE_NVMEM: 910 return "pre-cal-nvmem"; 911 case ATH10K_CAL_MODE_EEPROM: 912 return "eeprom"; 913 } 914 915 return "unknown"; 916 } 917 918 enum ath10k_scan_state { 919 ATH10K_SCAN_IDLE, 920 ATH10K_SCAN_STARTING, 921 ATH10K_SCAN_RUNNING, 922 ATH10K_SCAN_ABORTING, 923 }; 924 925 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state) 926 { 927 switch (state) { 928 case ATH10K_SCAN_IDLE: 929 return "idle"; 930 case ATH10K_SCAN_STARTING: 931 return "starting"; 932 case ATH10K_SCAN_RUNNING: 933 return "running"; 934 case ATH10K_SCAN_ABORTING: 935 return "aborting"; 936 } 937 938 return "unknown"; 939 } 940 941 enum ath10k_tx_pause_reason { 942 ATH10K_TX_PAUSE_Q_FULL, 943 ATH10K_TX_PAUSE_MAX, 944 }; 945 946 struct ath10k_fw_file { 947 const struct firmware *firmware; 948 949 char fw_version[ETHTOOL_FWVERS_LEN]; 950 951 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT); 952 953 enum ath10k_fw_wmi_op_version wmi_op_version; 954 enum ath10k_fw_htt_op_version htt_op_version; 955 956 const void *firmware_data; 957 size_t firmware_len; 958 959 const void *otp_data; 960 size_t otp_len; 961 962 const void *codeswap_data; 963 size_t codeswap_len; 964 965 /* The original idea of struct ath10k_fw_file was that it only 966 * contains struct firmware and pointers to various parts (actual 967 * firmware binary, otp, metadata etc) of the file. This seg_info 968 * is actually created separate but as this is used similarly as 969 * the other firmware components it's more convenient to have it 970 * here. 971 */ 972 struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info; 973 }; 974 975 struct ath10k_fw_components { 976 const struct firmware *board; 977 const void *board_data; 978 size_t board_len; 979 const struct firmware *ext_board; 980 const void *ext_board_data; 981 size_t ext_board_len; 982 983 struct ath10k_fw_file fw_file; 984 }; 985 986 struct ath10k_per_peer_tx_stats { 987 u32 succ_bytes; 988 u32 retry_bytes; 989 u32 failed_bytes; 990 u8 ratecode; 991 u8 flags; 992 u16 peer_id; 993 u16 succ_pkts; 994 u16 retry_pkts; 995 u16 failed_pkts; 996 u16 duration; 997 u32 reserved1; 998 u32 reserved2; 999 }; 1000 1001 enum ath10k_dev_type { 1002 ATH10K_DEV_TYPE_LL, 1003 ATH10K_DEV_TYPE_HL, 1004 }; 1005 1006 struct ath10k_bus_params { 1007 u32 chip_id; 1008 enum ath10k_dev_type dev_type; 1009 bool link_can_suspend; 1010 bool hl_msdu_ids; 1011 }; 1012 1013 struct ath10k { 1014 struct ath_common ath_common; 1015 struct ieee80211_hw *hw; 1016 struct ieee80211_ops *ops; 1017 struct device *dev; 1018 struct msa_region { 1019 dma_addr_t paddr; 1020 u32 mem_size; 1021 void *vaddr; 1022 } msa; 1023 u8 mac_addr[ETH_ALEN]; 1024 1025 enum ath10k_hw_rev hw_rev; 1026 u16 dev_id; 1027 u32 chip_id; 1028 u32 target_version; 1029 u8 fw_version_major; 1030 u32 fw_version_minor; 1031 u16 fw_version_release; 1032 u16 fw_version_build; 1033 u32 fw_stats_req_mask; 1034 u32 phy_capability; 1035 u32 hw_min_tx_power; 1036 u32 hw_max_tx_power; 1037 u32 hw_eeprom_rd; 1038 u32 ht_cap_info; 1039 u32 vht_cap_info; 1040 u32 vht_supp_mcs; 1041 u32 num_rf_chains; 1042 u32 max_spatial_stream; 1043 /* protected by conf_mutex */ 1044 u32 low_2ghz_chan; 1045 u32 high_2ghz_chan; 1046 u32 low_5ghz_chan; 1047 u32 high_5ghz_chan; 1048 bool ani_enabled; 1049 u32 sys_cap_info; 1050 1051 /* protected by data_lock */ 1052 bool hw_rfkill_on; 1053 1054 /* protected by conf_mutex */ 1055 u8 ps_state_enable; 1056 1057 bool nlo_enabled; 1058 bool p2p; 1059 1060 struct { 1061 enum ath10k_bus bus; 1062 const struct ath10k_hif_ops *ops; 1063 } hif; 1064 1065 struct completion target_suspend; 1066 struct completion driver_recovery; 1067 1068 const struct ath10k_hw_regs *regs; 1069 const struct ath10k_hw_ce_regs *hw_ce_regs; 1070 const struct ath10k_hw_values *hw_values; 1071 struct ath10k_bmi bmi; 1072 struct ath10k_wmi wmi; 1073 struct ath10k_htc htc; 1074 struct ath10k_htt htt; 1075 1076 struct ath10k_hw_params hw_params; 1077 1078 /* contains the firmware images used with ATH10K_FIRMWARE_MODE_NORMAL */ 1079 struct ath10k_fw_components normal_mode_fw; 1080 1081 /* READ-ONLY images of the running firmware, which can be either 1082 * normal or UTF. Do not modify, release etc! 1083 */ 1084 const struct ath10k_fw_components *running_fw; 1085 1086 const struct firmware *pre_cal_file; 1087 const struct firmware *cal_file; 1088 1089 struct { 1090 u32 vendor; 1091 u32 device; 1092 u32 subsystem_vendor; 1093 u32 subsystem_device; 1094 1095 bool bmi_ids_valid; 1096 bool qmi_ids_valid; 1097 u32 qmi_board_id; 1098 u32 qmi_chip_id; 1099 u8 bmi_board_id; 1100 u8 bmi_eboard_id; 1101 u8 bmi_chip_id; 1102 bool ext_bid_supported; 1103 1104 char bdf_ext[ATH10K_SMBIOS_BDF_EXT_STR_LENGTH]; 1105 } id; 1106 1107 int fw_api; 1108 int bd_api; 1109 enum ath10k_cal_mode cal_mode; 1110 1111 struct { 1112 struct completion started; 1113 struct completion completed; 1114 struct completion on_channel; 1115 struct delayed_work timeout; 1116 enum ath10k_scan_state state; 1117 bool is_roc; 1118 int vdev_id; 1119 int roc_freq; 1120 bool roc_notify; 1121 } scan; 1122 1123 struct { 1124 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 1125 } mac; 1126 1127 /* should never be NULL; needed for regular htt rx */ 1128 struct ieee80211_channel *rx_channel; 1129 1130 /* valid during scan; needed for mgmt rx during scan */ 1131 struct ieee80211_channel *scan_channel; 1132 1133 /* current operating channel definition */ 1134 struct cfg80211_chan_def chandef; 1135 1136 /* currently configured operating channel in firmware */ 1137 struct ieee80211_channel *tgt_oper_chan; 1138 1139 unsigned long long free_vdev_map; 1140 struct ath10k_vif *monitor_arvif; 1141 bool monitor; 1142 int monitor_vdev_id; 1143 bool monitor_started; 1144 unsigned int filter_flags; 1145 unsigned long dev_flags; 1146 bool dfs_block_radar_events; 1147 1148 /* protected by conf_mutex */ 1149 bool radar_enabled; 1150 int num_started_vdevs; 1151 1152 /* Protected by conf-mutex */ 1153 u8 cfg_tx_chainmask; 1154 u8 cfg_rx_chainmask; 1155 1156 struct completion install_key_done; 1157 1158 int last_wmi_vdev_start_status; 1159 struct completion vdev_setup_done; 1160 struct completion vdev_delete_done; 1161 struct completion peer_stats_info_complete; 1162 1163 struct workqueue_struct *workqueue; 1164 /* Auxiliary workqueue */ 1165 struct workqueue_struct *workqueue_aux; 1166 struct workqueue_struct *workqueue_tx_complete; 1167 /* prevents concurrent FW reconfiguration */ 1168 struct mutex conf_mutex; 1169 1170 /* protects coredump data */ 1171 struct mutex dump_mutex; 1172 1173 /* protects shared structure data */ 1174 spinlock_t data_lock; 1175 1176 struct list_head arvifs; 1177 struct list_head peers; 1178 struct ath10k_peer *peer_map[ATH10K_MAX_NUM_PEER_IDS]; 1179 wait_queue_head_t peer_mapping_wq; 1180 1181 /* protected by conf_mutex */ 1182 int num_peers; 1183 int num_stations; 1184 1185 int max_num_peers; 1186 int max_num_stations; 1187 int max_num_vdevs; 1188 int max_num_tdls_vdevs; 1189 int num_active_peers; 1190 int num_tids; 1191 1192 struct work_struct svc_rdy_work; 1193 struct sk_buff *svc_rdy_skb; 1194 1195 struct work_struct offchan_tx_work; 1196 struct sk_buff_head offchan_tx_queue; 1197 struct completion offchan_tx_completed; 1198 struct sk_buff *offchan_tx_skb; 1199 1200 struct work_struct wmi_mgmt_tx_work; 1201 struct sk_buff_head wmi_mgmt_tx_queue; 1202 1203 enum ath10k_state state; 1204 1205 struct work_struct register_work; 1206 struct work_struct restart_work; 1207 struct work_struct bundle_tx_work; 1208 struct work_struct tx_complete_work; 1209 1210 /* cycle count is reported twice for each visited channel during scan. 1211 * access protected by data_lock 1212 */ 1213 u32 survey_last_rx_clear_count; 1214 u32 survey_last_cycle_count; 1215 struct survey_info survey[ATH10K_NUM_CHANS]; 1216 1217 /* Channel info events are expected to come in pairs without and with 1218 * COMPLETE flag set respectively for each channel visit during scan. 1219 * 1220 * However there are deviations from this rule. This flag is used to 1221 * avoid reporting garbage data. 1222 */ 1223 bool ch_info_can_report_survey; 1224 struct completion bss_survey_done; 1225 1226 struct dfs_pattern_detector *dfs_detector; 1227 1228 unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */ 1229 1230 #ifdef CONFIG_ATH10K_DEBUGFS 1231 struct ath10k_debug debug; 1232 struct { 1233 /* relay(fs) channel for spectral scan */ 1234 struct rchan *rfs_chan_spec_scan; 1235 1236 /* spectral_mode and spec_config are protected by conf_mutex */ 1237 enum ath10k_spectral_mode mode; 1238 struct ath10k_spec_scan config; 1239 } spectral; 1240 #endif 1241 1242 u32 pktlog_filter; 1243 1244 #ifdef CONFIG_DEV_COREDUMP 1245 struct { 1246 struct ath10k_fw_crash_data *fw_crash_data; 1247 } coredump; 1248 #endif 1249 1250 struct { 1251 /* protected by conf_mutex */ 1252 struct ath10k_fw_components utf_mode_fw; 1253 1254 /* protected by data_lock */ 1255 bool utf_monitor; 1256 } testmode; 1257 1258 struct { 1259 /* protected by data_lock */ 1260 u32 rx_crc_err_drop; 1261 u32 fw_crash_counter; 1262 u32 fw_warm_reset_counter; 1263 u32 fw_cold_reset_counter; 1264 } stats; 1265 1266 struct ath10k_thermal thermal; 1267 struct ath10k_wow wow; 1268 struct ath10k_per_peer_tx_stats peer_tx_stats; 1269 1270 /* NAPI */ 1271 struct net_device napi_dev; 1272 struct napi_struct napi; 1273 1274 struct work_struct set_coverage_class_work; 1275 /* protected by conf_mutex */ 1276 struct { 1277 /* writing also protected by data_lock */ 1278 s16 coverage_class; 1279 1280 u32 reg_phyclk; 1281 u32 reg_slottime_conf; 1282 u32 reg_slottime_orig; 1283 u32 reg_ack_cts_timeout_conf; 1284 u32 reg_ack_cts_timeout_orig; 1285 } fw_coverage; 1286 1287 u32 ampdu_reference; 1288 1289 const u8 *wmi_key_cipher; 1290 void *ce_priv; 1291 1292 u32 sta_tid_stats_mask; 1293 1294 /* protected by data_lock */ 1295 enum ath10k_radar_confirmation_state radar_conf_state; 1296 struct ath10k_radar_found_info last_radar_info; 1297 struct work_struct radar_confirmation_work; 1298 struct ath10k_bus_params bus_param; 1299 struct completion peer_delete_done; 1300 1301 bool coex_support; 1302 int coex_gpio_pin; 1303 1304 s32 tx_power_2g_limit; 1305 s32 tx_power_5g_limit; 1306 1307 /* must be last */ 1308 u8 drv_priv[] __aligned(sizeof(void *)); 1309 }; 1310 1311 static inline bool ath10k_peer_stats_enabled(struct ath10k *ar) 1312 { 1313 if (test_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags) && 1314 test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map)) 1315 return true; 1316 1317 return false; 1318 } 1319 1320 extern unsigned long ath10k_coredump_mask; 1321 1322 void ath10k_core_napi_sync_disable(struct ath10k *ar); 1323 void ath10k_core_napi_enable(struct ath10k *ar); 1324 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 1325 enum ath10k_bus bus, 1326 enum ath10k_hw_rev hw_rev, 1327 const struct ath10k_hif_ops *hif_ops); 1328 void ath10k_core_destroy(struct ath10k *ar); 1329 void ath10k_core_get_fw_features_str(struct ath10k *ar, 1330 char *buf, 1331 size_t max_len); 1332 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1333 struct ath10k_fw_file *fw_file); 1334 1335 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 1336 const struct ath10k_fw_components *fw_components); 1337 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt); 1338 void ath10k_core_stop(struct ath10k *ar); 1339 void ath10k_core_start_recovery(struct ath10k *ar); 1340 int ath10k_core_register(struct ath10k *ar, 1341 const struct ath10k_bus_params *bus_params); 1342 void ath10k_core_unregister(struct ath10k *ar); 1343 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type); 1344 int ath10k_core_check_dt(struct ath10k *ar); 1345 void ath10k_core_free_board_files(struct ath10k *ar); 1346 1347 #endif /* _CORE_H_ */ 1348