1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 4 * Copyright (c) 2018, The Linux Foundation. All rights reserved. 5 * 6 * Permission to use, copy, modify, and/or distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #ifndef _CORE_H_ 20 #define _CORE_H_ 21 22 #include <linux/completion.h> 23 #include <linux/if_ether.h> 24 #include <linux/types.h> 25 #include <linux/pci.h> 26 #include <linux/uuid.h> 27 #include <linux/time.h> 28 29 #include "htt.h" 30 #include "htc.h" 31 #include "hw.h" 32 #include "targaddrs.h" 33 #include "wmi.h" 34 #include "../ath.h" 35 #include "../regd.h" 36 #include "../dfs_pattern_detector.h" 37 #include "spectral.h" 38 #include "thermal.h" 39 #include "wow.h" 40 #include "swap.h" 41 42 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB) 43 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 44 #define WO(_f) ((_f##_OFFSET) >> 2) 45 46 #define ATH10K_SCAN_ID 0 47 #define ATH10K_SCAN_CHANNEL_SWITCH_WMI_EVT_OVERHEAD 10 /* msec */ 48 #define WMI_READY_TIMEOUT (5 * HZ) 49 #define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ) 50 #define ATH10K_CONNECTION_LOSS_HZ (3 * HZ) 51 #define ATH10K_NUM_CHANS 41 52 #define ATH10K_MAX_5G_CHAN 173 53 54 /* Antenna noise floor */ 55 #define ATH10K_DEFAULT_NOISE_FLOOR -95 56 57 #define ATH10K_INVALID_RSSI 128 58 59 #define ATH10K_MAX_NUM_MGMT_PENDING 128 60 61 /* number of failed packets (20 packets with 16 sw reties each) */ 62 #define ATH10K_KICKOUT_THRESHOLD (20 * 16) 63 64 /* 65 * Use insanely high numbers to make sure that the firmware implementation 66 * won't start, we have the same functionality already in hostapd. Unit 67 * is seconds. 68 */ 69 #define ATH10K_KEEPALIVE_MIN_IDLE 3747 70 #define ATH10K_KEEPALIVE_MAX_IDLE 3895 71 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900 72 73 /* NAPI poll budget */ 74 #define ATH10K_NAPI_BUDGET 64 75 76 /* SMBIOS type containing Board Data File Name Extension */ 77 #define ATH10K_SMBIOS_BDF_EXT_TYPE 0xF8 78 79 /* SMBIOS type structure length (excluding strings-set) */ 80 #define ATH10K_SMBIOS_BDF_EXT_LENGTH 0x9 81 82 /* Offset pointing to Board Data File Name Extension */ 83 #define ATH10K_SMBIOS_BDF_EXT_OFFSET 0x8 84 85 /* Board Data File Name Extension string length. 86 * String format: BDF_<Customer ID>_<Extension>\0 87 */ 88 #define ATH10K_SMBIOS_BDF_EXT_STR_LENGTH 0x20 89 90 /* The magic used by QCA spec */ 91 #define ATH10K_SMBIOS_BDF_EXT_MAGIC "BDF_" 92 93 struct ath10k; 94 95 static inline const char *ath10k_bus_str(enum ath10k_bus bus) 96 { 97 switch (bus) { 98 case ATH10K_BUS_PCI: 99 return "pci"; 100 case ATH10K_BUS_AHB: 101 return "ahb"; 102 case ATH10K_BUS_SDIO: 103 return "sdio"; 104 case ATH10K_BUS_USB: 105 return "usb"; 106 case ATH10K_BUS_SNOC: 107 return "snoc"; 108 } 109 110 return "unknown"; 111 } 112 113 enum ath10k_skb_flags { 114 ATH10K_SKB_F_NO_HWCRYPT = BIT(0), 115 ATH10K_SKB_F_DTIM_ZERO = BIT(1), 116 ATH10K_SKB_F_DELIVER_CAB = BIT(2), 117 ATH10K_SKB_F_MGMT = BIT(3), 118 ATH10K_SKB_F_QOS = BIT(4), 119 }; 120 121 struct ath10k_skb_cb { 122 dma_addr_t paddr; 123 u8 flags; 124 u8 eid; 125 u16 msdu_id; 126 struct ieee80211_vif *vif; 127 struct ieee80211_txq *txq; 128 } __packed; 129 130 struct ath10k_skb_rxcb { 131 dma_addr_t paddr; 132 struct hlist_node hlist; 133 }; 134 135 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb) 136 { 137 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) > 138 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 139 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 140 } 141 142 static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb) 143 { 144 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb)); 145 return (struct ath10k_skb_rxcb *)skb->cb; 146 } 147 148 #define ATH10K_RXCB_SKB(rxcb) \ 149 container_of((void *)rxcb, struct sk_buff, cb) 150 151 static inline u32 host_interest_item_address(u32 item_offset) 152 { 153 return QCA988X_HOST_INTEREST_ADDRESS + item_offset; 154 } 155 156 struct ath10k_bmi { 157 bool done_sent; 158 }; 159 160 struct ath10k_mem_chunk { 161 void *vaddr; 162 dma_addr_t paddr; 163 u32 len; 164 u32 req_id; 165 }; 166 167 struct ath10k_wmi { 168 enum ath10k_htc_ep_id eid; 169 struct completion service_ready; 170 struct completion unified_ready; 171 struct completion barrier; 172 struct completion radar_confirm; 173 wait_queue_head_t tx_credits_wq; 174 DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX); 175 struct wmi_cmd_map *cmd; 176 struct wmi_vdev_param_map *vdev_param; 177 struct wmi_pdev_param_map *pdev_param; 178 const struct wmi_ops *ops; 179 const struct wmi_peer_flags_map *peer_flags; 180 181 u32 mgmt_max_num_pending_tx; 182 183 /* Protected by data_lock */ 184 struct idr mgmt_pending_tx; 185 186 u32 num_mem_chunks; 187 u32 rx_decap_mode; 188 struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS]; 189 }; 190 191 struct ath10k_fw_stats_peer { 192 struct list_head list; 193 194 u8 peer_macaddr[ETH_ALEN]; 195 u32 peer_rssi; 196 u32 peer_tx_rate; 197 u32 peer_rx_rate; /* 10x only */ 198 u32 rx_duration; 199 }; 200 201 struct ath10k_fw_extd_stats_peer { 202 struct list_head list; 203 204 u8 peer_macaddr[ETH_ALEN]; 205 u32 rx_duration; 206 }; 207 208 struct ath10k_fw_stats_vdev { 209 struct list_head list; 210 211 u32 vdev_id; 212 u32 beacon_snr; 213 u32 data_snr; 214 u32 num_tx_frames[4]; 215 u32 num_rx_frames; 216 u32 num_tx_frames_retries[4]; 217 u32 num_tx_frames_failures[4]; 218 u32 num_rts_fail; 219 u32 num_rts_success; 220 u32 num_rx_err; 221 u32 num_rx_discard; 222 u32 num_tx_not_acked; 223 u32 tx_rate_history[10]; 224 u32 beacon_rssi_history[10]; 225 }; 226 227 struct ath10k_fw_stats_vdev_extd { 228 struct list_head list; 229 230 u32 vdev_id; 231 u32 ppdu_aggr_cnt; 232 u32 ppdu_noack; 233 u32 mpdu_queued; 234 u32 ppdu_nonaggr_cnt; 235 u32 mpdu_sw_requeued; 236 u32 mpdu_suc_retry; 237 u32 mpdu_suc_multitry; 238 u32 mpdu_fail_retry; 239 u32 tx_ftm_suc; 240 u32 tx_ftm_suc_retry; 241 u32 tx_ftm_fail; 242 u32 rx_ftmr_cnt; 243 u32 rx_ftmr_dup_cnt; 244 u32 rx_iftmr_cnt; 245 u32 rx_iftmr_dup_cnt; 246 }; 247 248 struct ath10k_fw_stats_pdev { 249 struct list_head list; 250 251 /* PDEV stats */ 252 s32 ch_noise_floor; 253 u32 tx_frame_count; /* Cycles spent transmitting frames */ 254 u32 rx_frame_count; /* Cycles spent receiving frames */ 255 u32 rx_clear_count; /* Total channel busy time, evidently */ 256 u32 cycle_count; /* Total on-channel time */ 257 u32 phy_err_count; 258 u32 chan_tx_power; 259 u32 ack_rx_bad; 260 u32 rts_bad; 261 u32 rts_good; 262 u32 fcs_bad; 263 u32 no_beacons; 264 u32 mib_int_count; 265 266 /* PDEV TX stats */ 267 s32 comp_queued; 268 s32 comp_delivered; 269 s32 msdu_enqued; 270 s32 mpdu_enqued; 271 s32 wmm_drop; 272 s32 local_enqued; 273 s32 local_freed; 274 s32 hw_queued; 275 s32 hw_reaped; 276 s32 underrun; 277 u32 hw_paused; 278 s32 tx_abort; 279 s32 mpdus_requed; 280 u32 tx_ko; 281 u32 data_rc; 282 u32 self_triggers; 283 u32 sw_retry_failure; 284 u32 illgl_rate_phy_err; 285 u32 pdev_cont_xretry; 286 u32 pdev_tx_timeout; 287 u32 pdev_resets; 288 u32 phy_underrun; 289 u32 txop_ovf; 290 u32 seq_posted; 291 u32 seq_failed_queueing; 292 u32 seq_completed; 293 u32 seq_restarted; 294 u32 mu_seq_posted; 295 u32 mpdus_sw_flush; 296 u32 mpdus_hw_filter; 297 u32 mpdus_truncated; 298 u32 mpdus_ack_failed; 299 u32 mpdus_expired; 300 301 /* PDEV RX stats */ 302 s32 mid_ppdu_route_change; 303 s32 status_rcvd; 304 s32 r0_frags; 305 s32 r1_frags; 306 s32 r2_frags; 307 s32 r3_frags; 308 s32 htt_msdus; 309 s32 htt_mpdus; 310 s32 loc_msdus; 311 s32 loc_mpdus; 312 s32 oversize_amsdu; 313 s32 phy_errs; 314 s32 phy_err_drop; 315 s32 mpdu_errs; 316 s32 rx_ovfl_errs; 317 }; 318 319 struct ath10k_fw_stats { 320 bool extended; 321 struct list_head pdevs; 322 struct list_head vdevs; 323 struct list_head peers; 324 struct list_head peers_extd; 325 }; 326 327 #define ATH10K_TPC_TABLE_TYPE_FLAG 1 328 #define ATH10K_TPC_PREAM_TABLE_END 0xFFFF 329 330 struct ath10k_tpc_table { 331 u32 pream_idx[WMI_TPC_RATE_MAX]; 332 u8 rate_code[WMI_TPC_RATE_MAX]; 333 char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; 334 }; 335 336 struct ath10k_tpc_stats { 337 u32 reg_domain; 338 u32 chan_freq; 339 u32 phy_mode; 340 u32 twice_antenna_reduction; 341 u32 twice_max_rd_power; 342 s32 twice_antenna_gain; 343 u32 power_limit; 344 u32 num_tx_chain; 345 u32 ctl; 346 u32 rate_max; 347 u8 flag[WMI_TPC_FLAG]; 348 struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG]; 349 }; 350 351 struct ath10k_tpc_table_final { 352 u32 pream_idx[WMI_TPC_FINAL_RATE_MAX]; 353 u8 rate_code[WMI_TPC_FINAL_RATE_MAX]; 354 char tpc_value[WMI_TPC_FINAL_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; 355 }; 356 357 struct ath10k_tpc_stats_final { 358 u32 reg_domain; 359 u32 chan_freq; 360 u32 phy_mode; 361 u32 twice_antenna_reduction; 362 u32 twice_max_rd_power; 363 s32 twice_antenna_gain; 364 u32 power_limit; 365 u32 num_tx_chain; 366 u32 ctl; 367 u32 rate_max; 368 u8 flag[WMI_TPC_FLAG]; 369 struct ath10k_tpc_table_final tpc_table_final[WMI_TPC_FLAG]; 370 }; 371 372 struct ath10k_dfs_stats { 373 u32 phy_errors; 374 u32 pulses_total; 375 u32 pulses_detected; 376 u32 pulses_discarded; 377 u32 radar_detected; 378 }; 379 380 enum ath10k_radar_confirmation_state { 381 ATH10K_RADAR_CONFIRMATION_IDLE = 0, 382 ATH10K_RADAR_CONFIRMATION_INPROGRESS, 383 ATH10K_RADAR_CONFIRMATION_STOPPED, 384 }; 385 386 struct ath10k_radar_found_info { 387 u32 pri_min; 388 u32 pri_max; 389 u32 width_min; 390 u32 width_max; 391 u32 sidx_min; 392 u32 sidx_max; 393 }; 394 395 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */ 396 397 struct ath10k_peer { 398 struct list_head list; 399 struct ieee80211_vif *vif; 400 struct ieee80211_sta *sta; 401 402 bool removed; 403 int vdev_id; 404 u8 addr[ETH_ALEN]; 405 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS); 406 407 /* protected by ar->data_lock */ 408 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1]; 409 }; 410 411 struct ath10k_txq { 412 struct list_head list; 413 unsigned long num_fw_queued; 414 unsigned long num_push_allowed; 415 }; 416 417 enum ath10k_pkt_rx_err { 418 ATH10K_PKT_RX_ERR_FCS, 419 ATH10K_PKT_RX_ERR_TKIP, 420 ATH10K_PKT_RX_ERR_CRYPT, 421 ATH10K_PKT_RX_ERR_PEER_IDX_INVAL, 422 ATH10K_PKT_RX_ERR_MAX, 423 }; 424 425 enum ath10k_ampdu_subfrm_num { 426 ATH10K_AMPDU_SUBFRM_NUM_10, 427 ATH10K_AMPDU_SUBFRM_NUM_20, 428 ATH10K_AMPDU_SUBFRM_NUM_30, 429 ATH10K_AMPDU_SUBFRM_NUM_40, 430 ATH10K_AMPDU_SUBFRM_NUM_50, 431 ATH10K_AMPDU_SUBFRM_NUM_60, 432 ATH10K_AMPDU_SUBFRM_NUM_MORE, 433 ATH10K_AMPDU_SUBFRM_NUM_MAX, 434 }; 435 436 enum ath10k_amsdu_subfrm_num { 437 ATH10K_AMSDU_SUBFRM_NUM_1, 438 ATH10K_AMSDU_SUBFRM_NUM_2, 439 ATH10K_AMSDU_SUBFRM_NUM_3, 440 ATH10K_AMSDU_SUBFRM_NUM_4, 441 ATH10K_AMSDU_SUBFRM_NUM_MORE, 442 ATH10K_AMSDU_SUBFRM_NUM_MAX, 443 }; 444 445 struct ath10k_sta_tid_stats { 446 unsigned long int rx_pkt_from_fw; 447 unsigned long int rx_pkt_unchained; 448 unsigned long int rx_pkt_drop_chained; 449 unsigned long int rx_pkt_drop_filter; 450 unsigned long int rx_pkt_err[ATH10K_PKT_RX_ERR_MAX]; 451 unsigned long int rx_pkt_queued_for_mac; 452 unsigned long int rx_pkt_ampdu[ATH10K_AMPDU_SUBFRM_NUM_MAX]; 453 unsigned long int rx_pkt_amsdu[ATH10K_AMSDU_SUBFRM_NUM_MAX]; 454 }; 455 456 enum ath10k_counter_type { 457 ATH10K_COUNTER_TYPE_BYTES, 458 ATH10K_COUNTER_TYPE_PKTS, 459 ATH10K_COUNTER_TYPE_MAX, 460 }; 461 462 enum ath10k_stats_type { 463 ATH10K_STATS_TYPE_SUCC, 464 ATH10K_STATS_TYPE_FAIL, 465 ATH10K_STATS_TYPE_RETRY, 466 ATH10K_STATS_TYPE_AMPDU, 467 ATH10K_STATS_TYPE_MAX, 468 }; 469 470 struct ath10k_htt_data_stats { 471 u64 legacy[ATH10K_COUNTER_TYPE_MAX][ATH10K_LEGACY_NUM]; 472 u64 ht[ATH10K_COUNTER_TYPE_MAX][ATH10K_HT_MCS_NUM]; 473 u64 vht[ATH10K_COUNTER_TYPE_MAX][ATH10K_VHT_MCS_NUM]; 474 u64 bw[ATH10K_COUNTER_TYPE_MAX][ATH10K_BW_NUM]; 475 u64 nss[ATH10K_COUNTER_TYPE_MAX][ATH10K_NSS_NUM]; 476 u64 gi[ATH10K_COUNTER_TYPE_MAX][ATH10K_GI_NUM]; 477 u64 rate_table[ATH10K_COUNTER_TYPE_MAX][ATH10K_RATE_TABLE_NUM]; 478 }; 479 480 struct ath10k_htt_tx_stats { 481 struct ath10k_htt_data_stats stats[ATH10K_STATS_TYPE_MAX]; 482 u64 tx_duration; 483 u64 ba_fails; 484 u64 ack_fails; 485 }; 486 487 struct ath10k_sta { 488 struct ath10k_vif *arvif; 489 490 /* the following are protected by ar->data_lock */ 491 u32 changed; /* IEEE80211_RC_* */ 492 u32 bw; 493 u32 nss; 494 u32 smps; 495 u16 peer_id; 496 struct rate_info txrate; 497 498 struct work_struct update_wk; 499 u64 rx_duration; 500 struct ath10k_htt_tx_stats *tx_stats; 501 502 #ifdef CONFIG_MAC80211_DEBUGFS 503 /* protected by conf_mutex */ 504 bool aggr_mode; 505 506 /* Protected with ar->data_lock */ 507 struct ath10k_sta_tid_stats tid_stats[IEEE80211_NUM_TIDS + 1]; 508 #endif 509 /* Protected with ar->data_lock */ 510 u32 peer_ps_state; 511 }; 512 513 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ) 514 515 enum ath10k_beacon_state { 516 ATH10K_BEACON_SCHEDULED = 0, 517 ATH10K_BEACON_SENDING, 518 ATH10K_BEACON_SENT, 519 }; 520 521 struct ath10k_vif { 522 struct list_head list; 523 524 u32 vdev_id; 525 u16 peer_id; 526 enum wmi_vdev_type vdev_type; 527 enum wmi_vdev_subtype vdev_subtype; 528 u32 beacon_interval; 529 u32 dtim_period; 530 struct sk_buff *beacon; 531 /* protected by data_lock */ 532 enum ath10k_beacon_state beacon_state; 533 void *beacon_buf; 534 dma_addr_t beacon_paddr; 535 unsigned long tx_paused; /* arbitrary values defined by target */ 536 537 struct ath10k *ar; 538 struct ieee80211_vif *vif; 539 540 bool is_started; 541 bool is_up; 542 bool spectral_enabled; 543 bool ps; 544 u32 aid; 545 u8 bssid[ETH_ALEN]; 546 547 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1]; 548 s8 def_wep_key_idx; 549 550 u16 tx_seq_no; 551 552 union { 553 struct { 554 u32 uapsd; 555 } sta; 556 struct { 557 /* 512 stations */ 558 u8 tim_bitmap[64]; 559 u8 tim_len; 560 u32 ssid_len; 561 u8 ssid[IEEE80211_MAX_SSID_LEN]; 562 bool hidden_ssid; 563 /* P2P_IE with NoA attribute for P2P_GO case */ 564 u32 noa_len; 565 u8 *noa_data; 566 } ap; 567 } u; 568 569 bool use_cts_prot; 570 bool nohwcrypt; 571 int num_legacy_stations; 572 int txpower; 573 struct wmi_wmm_params_all_arg wmm_params; 574 struct work_struct ap_csa_work; 575 struct delayed_work connection_loss_work; 576 struct cfg80211_bitrate_mask bitrate_mask; 577 }; 578 579 struct ath10k_vif_iter { 580 u32 vdev_id; 581 struct ath10k_vif *arvif; 582 }; 583 584 /* Copy Engine register dump, protected by ce-lock */ 585 struct ath10k_ce_crash_data { 586 __le32 base_addr; 587 __le32 src_wr_idx; 588 __le32 src_r_idx; 589 __le32 dst_wr_idx; 590 __le32 dst_r_idx; 591 }; 592 593 struct ath10k_ce_crash_hdr { 594 __le32 ce_count; 595 __le32 reserved[3]; /* for future use */ 596 struct ath10k_ce_crash_data entries[]; 597 }; 598 599 #define MAX_MEM_DUMP_TYPE 5 600 601 /* used for crash-dump storage, protected by data-lock */ 602 struct ath10k_fw_crash_data { 603 guid_t guid; 604 struct timespec64 timestamp; 605 __le32 registers[REG_DUMP_COUNT_QCA988X]; 606 struct ath10k_ce_crash_data ce_crash_data[CE_COUNT_MAX]; 607 608 u8 *ramdump_buf; 609 size_t ramdump_buf_len; 610 }; 611 612 struct ath10k_debug { 613 struct dentry *debugfs_phy; 614 615 struct ath10k_fw_stats fw_stats; 616 struct completion fw_stats_complete; 617 bool fw_stats_done; 618 619 unsigned long htt_stats_mask; 620 struct delayed_work htt_stats_dwork; 621 struct ath10k_dfs_stats dfs_stats; 622 struct ath_dfs_pool_stats dfs_pool_stats; 623 624 /* used for tpc-dump storage, protected by data-lock */ 625 struct ath10k_tpc_stats *tpc_stats; 626 struct ath10k_tpc_stats_final *tpc_stats_final; 627 628 struct completion tpc_complete; 629 630 /* protected by conf_mutex */ 631 u64 fw_dbglog_mask; 632 u32 fw_dbglog_level; 633 u32 reg_addr; 634 u32 nf_cal_period; 635 void *cal_data; 636 u32 enable_extd_tx_stats; 637 }; 638 639 enum ath10k_state { 640 ATH10K_STATE_OFF = 0, 641 ATH10K_STATE_ON, 642 643 /* When doing firmware recovery the device is first powered down. 644 * mac80211 is supposed to call in to start() hook later on. It is 645 * however possible that driver unloading and firmware crash overlap. 646 * mac80211 can wait on conf_mutex in stop() while the device is 647 * stopped in ath10k_core_restart() work holding conf_mutex. The state 648 * RESTARTED means that the device is up and mac80211 has started hw 649 * reconfiguration. Once mac80211 is done with the reconfiguration we 650 * set the state to STATE_ON in reconfig_complete(). 651 */ 652 ATH10K_STATE_RESTARTING, 653 ATH10K_STATE_RESTARTED, 654 655 /* The device has crashed while restarting hw. This state is like ON 656 * but commands are blocked in HTC and -ECOMM response is given. This 657 * prevents completion timeouts and makes the driver more responsive to 658 * userspace commands. This is also prevents recursive recovery. 659 */ 660 ATH10K_STATE_WEDGED, 661 662 /* factory tests */ 663 ATH10K_STATE_UTF, 664 }; 665 666 enum ath10k_firmware_mode { 667 /* the default mode, standard 802.11 functionality */ 668 ATH10K_FIRMWARE_MODE_NORMAL, 669 670 /* factory tests etc */ 671 ATH10K_FIRMWARE_MODE_UTF, 672 }; 673 674 enum ath10k_fw_features { 675 /* wmi_mgmt_rx_hdr contains extra RSSI information */ 676 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0, 677 678 /* Firmware from 10X branch. Deprecated, don't use in new code. */ 679 ATH10K_FW_FEATURE_WMI_10X = 1, 680 681 /* firmware support tx frame management over WMI, otherwise it's HTT */ 682 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2, 683 684 /* Firmware does not support P2P */ 685 ATH10K_FW_FEATURE_NO_P2P = 3, 686 687 /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature 688 * bit is required to be set as well. Deprecated, don't use in new 689 * code. 690 */ 691 ATH10K_FW_FEATURE_WMI_10_2 = 4, 692 693 /* Some firmware revisions lack proper multi-interface client powersave 694 * implementation. Enabling PS could result in connection drops, 695 * traffic stalls, etc. 696 */ 697 ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5, 698 699 /* Some firmware revisions have an incomplete WoWLAN implementation 700 * despite WMI service bit being advertised. This feature flag is used 701 * to distinguish whether WoWLAN is really supported or not. 702 */ 703 ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6, 704 705 /* Don't trust error code from otp.bin */ 706 ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7, 707 708 /* Some firmware revisions pad 4th hw address to 4 byte boundary making 709 * it 8 bytes long in Native Wifi Rx decap. 710 */ 711 ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8, 712 713 /* Firmware supports bypassing PLL setting on init. */ 714 ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9, 715 716 /* Raw mode support. If supported, FW supports receiving and trasmitting 717 * frames in raw mode. 718 */ 719 ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10, 720 721 /* Firmware Supports Adaptive CCA*/ 722 ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11, 723 724 /* Firmware supports management frame protection */ 725 ATH10K_FW_FEATURE_MFP_SUPPORT = 12, 726 727 /* Firmware supports pull-push model where host shares it's software 728 * queue state with firmware and firmware generates fetch requests 729 * telling host which queues to dequeue tx from. 730 * 731 * Primary function of this is improved MU-MIMO performance with 732 * multiple clients. 733 */ 734 ATH10K_FW_FEATURE_PEER_FLOW_CONTROL = 13, 735 736 /* Firmware supports BT-Coex without reloading firmware via pdev param. 737 * To support Bluetooth coexistence pdev param, WMI_COEX_GPIO_SUPPORT of 738 * extended resource config should be enabled always. This firmware IE 739 * is used to configure WMI_COEX_GPIO_SUPPORT. 740 */ 741 ATH10K_FW_FEATURE_BTCOEX_PARAM = 14, 742 743 /* Unused flag and proven to be not working, enable this if you want 744 * to experiment sending NULL func data frames in HTT TX 745 */ 746 ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR = 15, 747 748 /* Firmware allow other BSS mesh broadcast/multicast frames without 749 * creating monitor interface. Appropriate rxfilters are programmed for 750 * mesh vdev by firmware itself. This feature flags will be used for 751 * not creating monitor vdev while configuring mesh node. 752 */ 753 ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST = 16, 754 755 /* Firmware does not support power save in station mode. */ 756 ATH10K_FW_FEATURE_NO_PS = 17, 757 758 /* Firmware allows management tx by reference instead of by value. */ 759 ATH10K_FW_FEATURE_MGMT_TX_BY_REF = 18, 760 761 /* Firmware load is done externally, not by bmi */ 762 ATH10K_FW_FEATURE_NON_BMI = 19, 763 764 /* Firmware sends only one chan_info event per channel */ 765 ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL = 20, 766 767 /* keep last */ 768 ATH10K_FW_FEATURE_COUNT, 769 }; 770 771 enum ath10k_dev_flags { 772 /* Indicates that ath10k device is during CAC phase of DFS */ 773 ATH10K_CAC_RUNNING, 774 ATH10K_FLAG_CORE_REGISTERED, 775 776 /* Device has crashed and needs to restart. This indicates any pending 777 * waiters should immediately cancel instead of waiting for a time out. 778 */ 779 ATH10K_FLAG_CRASH_FLUSH, 780 781 /* Use Raw mode instead of native WiFi Tx/Rx encap mode. 782 * Raw mode supports both hardware and software crypto. Native WiFi only 783 * supports hardware crypto. 784 */ 785 ATH10K_FLAG_RAW_MODE, 786 787 /* Disable HW crypto engine */ 788 ATH10K_FLAG_HW_CRYPTO_DISABLED, 789 790 /* Bluetooth coexistance enabled */ 791 ATH10K_FLAG_BTCOEX, 792 793 /* Per Station statistics service */ 794 ATH10K_FLAG_PEER_STATS, 795 }; 796 797 enum ath10k_cal_mode { 798 ATH10K_CAL_MODE_FILE, 799 ATH10K_CAL_MODE_OTP, 800 ATH10K_CAL_MODE_DT, 801 ATH10K_PRE_CAL_MODE_FILE, 802 ATH10K_PRE_CAL_MODE_DT, 803 ATH10K_CAL_MODE_EEPROM, 804 }; 805 806 enum ath10k_crypt_mode { 807 /* Only use hardware crypto engine */ 808 ATH10K_CRYPT_MODE_HW, 809 /* Only use software crypto engine */ 810 ATH10K_CRYPT_MODE_SW, 811 }; 812 813 static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode) 814 { 815 switch (mode) { 816 case ATH10K_CAL_MODE_FILE: 817 return "file"; 818 case ATH10K_CAL_MODE_OTP: 819 return "otp"; 820 case ATH10K_CAL_MODE_DT: 821 return "dt"; 822 case ATH10K_PRE_CAL_MODE_FILE: 823 return "pre-cal-file"; 824 case ATH10K_PRE_CAL_MODE_DT: 825 return "pre-cal-dt"; 826 case ATH10K_CAL_MODE_EEPROM: 827 return "eeprom"; 828 } 829 830 return "unknown"; 831 } 832 833 enum ath10k_scan_state { 834 ATH10K_SCAN_IDLE, 835 ATH10K_SCAN_STARTING, 836 ATH10K_SCAN_RUNNING, 837 ATH10K_SCAN_ABORTING, 838 }; 839 840 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state) 841 { 842 switch (state) { 843 case ATH10K_SCAN_IDLE: 844 return "idle"; 845 case ATH10K_SCAN_STARTING: 846 return "starting"; 847 case ATH10K_SCAN_RUNNING: 848 return "running"; 849 case ATH10K_SCAN_ABORTING: 850 return "aborting"; 851 } 852 853 return "unknown"; 854 } 855 856 enum ath10k_tx_pause_reason { 857 ATH10K_TX_PAUSE_Q_FULL, 858 ATH10K_TX_PAUSE_MAX, 859 }; 860 861 struct ath10k_fw_file { 862 const struct firmware *firmware; 863 864 char fw_version[ETHTOOL_FWVERS_LEN]; 865 866 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT); 867 868 enum ath10k_fw_wmi_op_version wmi_op_version; 869 enum ath10k_fw_htt_op_version htt_op_version; 870 871 const void *firmware_data; 872 size_t firmware_len; 873 874 const void *otp_data; 875 size_t otp_len; 876 877 const void *codeswap_data; 878 size_t codeswap_len; 879 880 /* The original idea of struct ath10k_fw_file was that it only 881 * contains struct firmware and pointers to various parts (actual 882 * firmware binary, otp, metadata etc) of the file. This seg_info 883 * is actually created separate but as this is used similarly as 884 * the other firmware components it's more convenient to have it 885 * here. 886 */ 887 struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info; 888 }; 889 890 struct ath10k_fw_components { 891 const struct firmware *board; 892 const void *board_data; 893 size_t board_len; 894 const struct firmware *ext_board; 895 const void *ext_board_data; 896 size_t ext_board_len; 897 898 struct ath10k_fw_file fw_file; 899 }; 900 901 struct ath10k_per_peer_tx_stats { 902 u32 succ_bytes; 903 u32 retry_bytes; 904 u32 failed_bytes; 905 u8 ratecode; 906 u8 flags; 907 u16 peer_id; 908 u16 succ_pkts; 909 u16 retry_pkts; 910 u16 failed_pkts; 911 u16 duration; 912 u32 reserved1; 913 u32 reserved2; 914 }; 915 916 enum ath10k_dev_type { 917 ATH10K_DEV_TYPE_LL, 918 ATH10K_DEV_TYPE_HL, 919 }; 920 921 struct ath10k_bus_params { 922 u32 chip_id; 923 enum ath10k_dev_type dev_type; 924 }; 925 926 struct ath10k { 927 struct ath_common ath_common; 928 struct ieee80211_hw *hw; 929 struct ieee80211_ops *ops; 930 struct device *dev; 931 u8 mac_addr[ETH_ALEN]; 932 933 enum ath10k_hw_rev hw_rev; 934 u16 dev_id; 935 u32 chip_id; 936 enum ath10k_dev_type dev_type; 937 u32 target_version; 938 u8 fw_version_major; 939 u32 fw_version_minor; 940 u16 fw_version_release; 941 u16 fw_version_build; 942 u32 fw_stats_req_mask; 943 u32 phy_capability; 944 u32 hw_min_tx_power; 945 u32 hw_max_tx_power; 946 u32 hw_eeprom_rd; 947 u32 ht_cap_info; 948 u32 vht_cap_info; 949 u32 num_rf_chains; 950 u32 max_spatial_stream; 951 /* protected by conf_mutex */ 952 u32 low_5ghz_chan; 953 u32 high_5ghz_chan; 954 bool ani_enabled; 955 /* protected by conf_mutex */ 956 u8 ps_state_enable; 957 958 bool nlo_enabled; 959 bool p2p; 960 961 struct { 962 enum ath10k_bus bus; 963 const struct ath10k_hif_ops *ops; 964 } hif; 965 966 struct completion target_suspend; 967 struct completion driver_recovery; 968 969 const struct ath10k_hw_regs *regs; 970 const struct ath10k_hw_ce_regs *hw_ce_regs; 971 const struct ath10k_hw_values *hw_values; 972 struct ath10k_bmi bmi; 973 struct ath10k_wmi wmi; 974 struct ath10k_htc htc; 975 struct ath10k_htt htt; 976 977 struct ath10k_hw_params hw_params; 978 979 /* contains the firmware images used with ATH10K_FIRMWARE_MODE_NORMAL */ 980 struct ath10k_fw_components normal_mode_fw; 981 982 /* READ-ONLY images of the running firmware, which can be either 983 * normal or UTF. Do not modify, release etc! 984 */ 985 const struct ath10k_fw_components *running_fw; 986 987 const struct firmware *pre_cal_file; 988 const struct firmware *cal_file; 989 990 struct { 991 u32 vendor; 992 u32 device; 993 u32 subsystem_vendor; 994 u32 subsystem_device; 995 996 bool bmi_ids_valid; 997 bool qmi_ids_valid; 998 u32 qmi_board_id; 999 u8 bmi_board_id; 1000 u8 bmi_eboard_id; 1001 u8 bmi_chip_id; 1002 bool ext_bid_supported; 1003 1004 char bdf_ext[ATH10K_SMBIOS_BDF_EXT_STR_LENGTH]; 1005 } id; 1006 1007 int fw_api; 1008 int bd_api; 1009 enum ath10k_cal_mode cal_mode; 1010 1011 struct { 1012 struct completion started; 1013 struct completion completed; 1014 struct completion on_channel; 1015 struct delayed_work timeout; 1016 enum ath10k_scan_state state; 1017 bool is_roc; 1018 int vdev_id; 1019 int roc_freq; 1020 bool roc_notify; 1021 } scan; 1022 1023 struct { 1024 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 1025 } mac; 1026 1027 /* should never be NULL; needed for regular htt rx */ 1028 struct ieee80211_channel *rx_channel; 1029 1030 /* valid during scan; needed for mgmt rx during scan */ 1031 struct ieee80211_channel *scan_channel; 1032 1033 /* current operating channel definition */ 1034 struct cfg80211_chan_def chandef; 1035 1036 /* currently configured operating channel in firmware */ 1037 struct ieee80211_channel *tgt_oper_chan; 1038 1039 unsigned long long free_vdev_map; 1040 struct ath10k_vif *monitor_arvif; 1041 bool monitor; 1042 int monitor_vdev_id; 1043 bool monitor_started; 1044 unsigned int filter_flags; 1045 unsigned long dev_flags; 1046 bool dfs_block_radar_events; 1047 1048 /* protected by conf_mutex */ 1049 bool radar_enabled; 1050 int num_started_vdevs; 1051 1052 /* Protected by conf-mutex */ 1053 u8 cfg_tx_chainmask; 1054 u8 cfg_rx_chainmask; 1055 1056 struct completion install_key_done; 1057 1058 int last_wmi_vdev_start_status; 1059 struct completion vdev_setup_done; 1060 1061 struct workqueue_struct *workqueue; 1062 /* Auxiliary workqueue */ 1063 struct workqueue_struct *workqueue_aux; 1064 1065 /* prevents concurrent FW reconfiguration */ 1066 struct mutex conf_mutex; 1067 1068 /* protects shared structure data */ 1069 spinlock_t data_lock; 1070 /* protects: ar->txqs, artxq->list */ 1071 spinlock_t txqs_lock; 1072 1073 struct list_head txqs; 1074 struct list_head arvifs; 1075 struct list_head peers; 1076 struct ath10k_peer *peer_map[ATH10K_MAX_NUM_PEER_IDS]; 1077 wait_queue_head_t peer_mapping_wq; 1078 1079 /* protected by conf_mutex */ 1080 int num_peers; 1081 int num_stations; 1082 1083 int max_num_peers; 1084 int max_num_stations; 1085 int max_num_vdevs; 1086 int max_num_tdls_vdevs; 1087 int num_active_peers; 1088 int num_tids; 1089 1090 struct work_struct svc_rdy_work; 1091 struct sk_buff *svc_rdy_skb; 1092 1093 struct work_struct offchan_tx_work; 1094 struct sk_buff_head offchan_tx_queue; 1095 struct completion offchan_tx_completed; 1096 struct sk_buff *offchan_tx_skb; 1097 1098 struct work_struct wmi_mgmt_tx_work; 1099 struct sk_buff_head wmi_mgmt_tx_queue; 1100 1101 enum ath10k_state state; 1102 1103 struct work_struct register_work; 1104 struct work_struct restart_work; 1105 1106 /* cycle count is reported twice for each visited channel during scan. 1107 * access protected by data_lock 1108 */ 1109 u32 survey_last_rx_clear_count; 1110 u32 survey_last_cycle_count; 1111 struct survey_info survey[ATH10K_NUM_CHANS]; 1112 1113 /* Channel info events are expected to come in pairs without and with 1114 * COMPLETE flag set respectively for each channel visit during scan. 1115 * 1116 * However there are deviations from this rule. This flag is used to 1117 * avoid reporting garbage data. 1118 */ 1119 bool ch_info_can_report_survey; 1120 struct completion bss_survey_done; 1121 1122 struct dfs_pattern_detector *dfs_detector; 1123 1124 unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */ 1125 1126 #ifdef CONFIG_ATH10K_DEBUGFS 1127 struct ath10k_debug debug; 1128 struct { 1129 /* relay(fs) channel for spectral scan */ 1130 struct rchan *rfs_chan_spec_scan; 1131 1132 /* spectral_mode and spec_config are protected by conf_mutex */ 1133 enum ath10k_spectral_mode mode; 1134 struct ath10k_spec_scan config; 1135 } spectral; 1136 #endif 1137 1138 u32 pktlog_filter; 1139 1140 #ifdef CONFIG_DEV_COREDUMP 1141 struct { 1142 struct ath10k_fw_crash_data *fw_crash_data; 1143 } coredump; 1144 #endif 1145 1146 struct { 1147 /* protected by conf_mutex */ 1148 struct ath10k_fw_components utf_mode_fw; 1149 1150 /* protected by data_lock */ 1151 bool utf_monitor; 1152 } testmode; 1153 1154 struct { 1155 /* protected by data_lock */ 1156 u32 fw_crash_counter; 1157 u32 fw_warm_reset_counter; 1158 u32 fw_cold_reset_counter; 1159 } stats; 1160 1161 struct ath10k_thermal thermal; 1162 struct ath10k_wow wow; 1163 struct ath10k_per_peer_tx_stats peer_tx_stats; 1164 1165 /* NAPI */ 1166 struct net_device napi_dev; 1167 struct napi_struct napi; 1168 1169 struct work_struct set_coverage_class_work; 1170 /* protected by conf_mutex */ 1171 struct { 1172 /* writing also protected by data_lock */ 1173 s16 coverage_class; 1174 1175 u32 reg_phyclk; 1176 u32 reg_slottime_conf; 1177 u32 reg_slottime_orig; 1178 u32 reg_ack_cts_timeout_conf; 1179 u32 reg_ack_cts_timeout_orig; 1180 } fw_coverage; 1181 1182 u32 ampdu_reference; 1183 1184 void *ce_priv; 1185 1186 u32 sta_tid_stats_mask; 1187 1188 /* protected by data_lock */ 1189 enum ath10k_radar_confirmation_state radar_conf_state; 1190 struct ath10k_radar_found_info last_radar_info; 1191 struct work_struct radar_confirmation_work; 1192 1193 /* must be last */ 1194 u8 drv_priv[0] __aligned(sizeof(void *)); 1195 }; 1196 1197 static inline bool ath10k_peer_stats_enabled(struct ath10k *ar) 1198 { 1199 if (test_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags) && 1200 test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map)) 1201 return true; 1202 1203 return false; 1204 } 1205 1206 extern unsigned long ath10k_coredump_mask; 1207 1208 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 1209 enum ath10k_bus bus, 1210 enum ath10k_hw_rev hw_rev, 1211 const struct ath10k_hif_ops *hif_ops); 1212 void ath10k_core_destroy(struct ath10k *ar); 1213 void ath10k_core_get_fw_features_str(struct ath10k *ar, 1214 char *buf, 1215 size_t max_len); 1216 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1217 struct ath10k_fw_file *fw_file); 1218 1219 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 1220 const struct ath10k_fw_components *fw_components); 1221 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt); 1222 void ath10k_core_stop(struct ath10k *ar); 1223 int ath10k_core_register(struct ath10k *ar, 1224 const struct ath10k_bus_params *bus_params); 1225 void ath10k_core_unregister(struct ath10k *ar); 1226 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type); 1227 void ath10k_core_free_board_files(struct ath10k *ar); 1228 1229 #endif /* _CORE_H_ */ 1230