1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include <linux/module.h> 19 #include <linux/firmware.h> 20 #include <linux/of.h> 21 #include <asm/byteorder.h> 22 23 #include "core.h" 24 #include "mac.h" 25 #include "htc.h" 26 #include "hif.h" 27 #include "wmi.h" 28 #include "bmi.h" 29 #include "debug.h" 30 #include "htt.h" 31 #include "testmode.h" 32 #include "wmi-ops.h" 33 34 unsigned int ath10k_debug_mask; 35 static unsigned int ath10k_cryptmode_param; 36 static bool uart_print; 37 static bool skip_otp; 38 static bool rawmode; 39 40 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 41 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 42 module_param(uart_print, bool, 0644); 43 module_param(skip_otp, bool, 0644); 44 module_param(rawmode, bool, 0644); 45 46 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 47 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 48 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 49 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 50 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); 51 52 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 53 { 54 .id = QCA988X_HW_2_0_VERSION, 55 .dev_id = QCA988X_2_0_DEVICE_ID, 56 .name = "qca988x hw2.0", 57 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 58 .uart_pin = 7, 59 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 60 .otp_exe_param = 0, 61 .channel_counters_freq_hz = 88000, 62 .max_probe_resp_desc_thres = 0, 63 .cal_data_len = 2116, 64 .fw = { 65 .dir = QCA988X_HW_2_0_FW_DIR, 66 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 67 .board_size = QCA988X_BOARD_DATA_SZ, 68 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 69 }, 70 .hw_ops = &qca988x_ops, 71 .decap_align_bytes = 4, 72 }, 73 { 74 .id = QCA9887_HW_1_0_VERSION, 75 .dev_id = QCA9887_1_0_DEVICE_ID, 76 .name = "qca9887 hw1.0", 77 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR, 78 .uart_pin = 7, 79 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 80 .otp_exe_param = 0, 81 .channel_counters_freq_hz = 88000, 82 .max_probe_resp_desc_thres = 0, 83 .cal_data_len = 2116, 84 .fw = { 85 .dir = QCA9887_HW_1_0_FW_DIR, 86 .board = QCA9887_HW_1_0_BOARD_DATA_FILE, 87 .board_size = QCA9887_BOARD_DATA_SZ, 88 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ, 89 }, 90 .hw_ops = &qca988x_ops, 91 .decap_align_bytes = 4, 92 }, 93 { 94 .id = QCA6174_HW_2_1_VERSION, 95 .dev_id = QCA6164_2_1_DEVICE_ID, 96 .name = "qca6164 hw2.1", 97 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 98 .uart_pin = 6, 99 .otp_exe_param = 0, 100 .channel_counters_freq_hz = 88000, 101 .max_probe_resp_desc_thres = 0, 102 .cal_data_len = 8124, 103 .fw = { 104 .dir = QCA6174_HW_2_1_FW_DIR, 105 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 106 .board_size = QCA6174_BOARD_DATA_SZ, 107 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 108 }, 109 .hw_ops = &qca988x_ops, 110 .decap_align_bytes = 4, 111 }, 112 { 113 .id = QCA6174_HW_2_1_VERSION, 114 .dev_id = QCA6174_2_1_DEVICE_ID, 115 .name = "qca6174 hw2.1", 116 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 117 .uart_pin = 6, 118 .otp_exe_param = 0, 119 .channel_counters_freq_hz = 88000, 120 .max_probe_resp_desc_thres = 0, 121 .cal_data_len = 8124, 122 .fw = { 123 .dir = QCA6174_HW_2_1_FW_DIR, 124 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 125 .board_size = QCA6174_BOARD_DATA_SZ, 126 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 127 }, 128 .hw_ops = &qca988x_ops, 129 .decap_align_bytes = 4, 130 }, 131 { 132 .id = QCA6174_HW_3_0_VERSION, 133 .dev_id = QCA6174_2_1_DEVICE_ID, 134 .name = "qca6174 hw3.0", 135 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 136 .uart_pin = 6, 137 .otp_exe_param = 0, 138 .channel_counters_freq_hz = 88000, 139 .max_probe_resp_desc_thres = 0, 140 .cal_data_len = 8124, 141 .fw = { 142 .dir = QCA6174_HW_3_0_FW_DIR, 143 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 144 .board_size = QCA6174_BOARD_DATA_SZ, 145 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 146 }, 147 .hw_ops = &qca988x_ops, 148 .decap_align_bytes = 4, 149 }, 150 { 151 .id = QCA6174_HW_3_2_VERSION, 152 .dev_id = QCA6174_2_1_DEVICE_ID, 153 .name = "qca6174 hw3.2", 154 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 155 .uart_pin = 6, 156 .otp_exe_param = 0, 157 .channel_counters_freq_hz = 88000, 158 .max_probe_resp_desc_thres = 0, 159 .cal_data_len = 8124, 160 .fw = { 161 /* uses same binaries as hw3.0 */ 162 .dir = QCA6174_HW_3_0_FW_DIR, 163 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 164 .board_size = QCA6174_BOARD_DATA_SZ, 165 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 166 }, 167 .hw_ops = &qca988x_ops, 168 .decap_align_bytes = 4, 169 }, 170 { 171 .id = QCA99X0_HW_2_0_DEV_VERSION, 172 .dev_id = QCA99X0_2_0_DEVICE_ID, 173 .name = "qca99x0 hw2.0", 174 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 175 .uart_pin = 7, 176 .otp_exe_param = 0x00000700, 177 .continuous_frag_desc = true, 178 .cck_rate_map_rev2 = true, 179 .channel_counters_freq_hz = 150000, 180 .max_probe_resp_desc_thres = 24, 181 .tx_chain_mask = 0xf, 182 .rx_chain_mask = 0xf, 183 .max_spatial_stream = 4, 184 .cal_data_len = 12064, 185 .fw = { 186 .dir = QCA99X0_HW_2_0_FW_DIR, 187 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 188 .board_size = QCA99X0_BOARD_DATA_SZ, 189 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 190 }, 191 .sw_decrypt_mcast_mgmt = true, 192 .hw_ops = &qca99x0_ops, 193 .decap_align_bytes = 1, 194 }, 195 { 196 .id = QCA9984_HW_1_0_DEV_VERSION, 197 .dev_id = QCA9984_1_0_DEVICE_ID, 198 .name = "qca9984/qca9994 hw1.0", 199 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR, 200 .uart_pin = 7, 201 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 202 .otp_exe_param = 0x00000700, 203 .continuous_frag_desc = true, 204 .cck_rate_map_rev2 = true, 205 .channel_counters_freq_hz = 150000, 206 .max_probe_resp_desc_thres = 24, 207 .tx_chain_mask = 0xf, 208 .rx_chain_mask = 0xf, 209 .max_spatial_stream = 4, 210 .cal_data_len = 12064, 211 .fw = { 212 .dir = QCA9984_HW_1_0_FW_DIR, 213 .board = QCA9984_HW_1_0_BOARD_DATA_FILE, 214 .board_size = QCA99X0_BOARD_DATA_SZ, 215 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 216 }, 217 .sw_decrypt_mcast_mgmt = true, 218 .hw_ops = &qca99x0_ops, 219 .decap_align_bytes = 1, 220 }, 221 { 222 .id = QCA9888_HW_2_0_DEV_VERSION, 223 .dev_id = QCA9888_2_0_DEVICE_ID, 224 .name = "qca9888 hw2.0", 225 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR, 226 .uart_pin = 7, 227 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 228 .otp_exe_param = 0x00000700, 229 .continuous_frag_desc = true, 230 .channel_counters_freq_hz = 150000, 231 .max_probe_resp_desc_thres = 24, 232 .tx_chain_mask = 3, 233 .rx_chain_mask = 3, 234 .max_spatial_stream = 2, 235 .cal_data_len = 12064, 236 .fw = { 237 .dir = QCA9888_HW_2_0_FW_DIR, 238 .board = QCA9888_HW_2_0_BOARD_DATA_FILE, 239 .board_size = QCA99X0_BOARD_DATA_SZ, 240 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 241 }, 242 .sw_decrypt_mcast_mgmt = true, 243 .hw_ops = &qca99x0_ops, 244 .decap_align_bytes = 1, 245 }, 246 { 247 .id = QCA9377_HW_1_0_DEV_VERSION, 248 .dev_id = QCA9377_1_0_DEVICE_ID, 249 .name = "qca9377 hw1.0", 250 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 251 .uart_pin = 6, 252 .otp_exe_param = 0, 253 .channel_counters_freq_hz = 88000, 254 .max_probe_resp_desc_thres = 0, 255 .cal_data_len = 8124, 256 .fw = { 257 .dir = QCA9377_HW_1_0_FW_DIR, 258 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 259 .board_size = QCA9377_BOARD_DATA_SZ, 260 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 261 }, 262 .hw_ops = &qca988x_ops, 263 .decap_align_bytes = 4, 264 }, 265 { 266 .id = QCA9377_HW_1_1_DEV_VERSION, 267 .dev_id = QCA9377_1_0_DEVICE_ID, 268 .name = "qca9377 hw1.1", 269 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 270 .uart_pin = 6, 271 .otp_exe_param = 0, 272 .channel_counters_freq_hz = 88000, 273 .max_probe_resp_desc_thres = 0, 274 .cal_data_len = 8124, 275 .fw = { 276 .dir = QCA9377_HW_1_0_FW_DIR, 277 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 278 .board_size = QCA9377_BOARD_DATA_SZ, 279 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 280 }, 281 .hw_ops = &qca988x_ops, 282 .decap_align_bytes = 4, 283 }, 284 { 285 .id = QCA4019_HW_1_0_DEV_VERSION, 286 .dev_id = 0, 287 .name = "qca4019 hw1.0", 288 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR, 289 .uart_pin = 7, 290 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 291 .otp_exe_param = 0x0010000, 292 .continuous_frag_desc = true, 293 .cck_rate_map_rev2 = true, 294 .channel_counters_freq_hz = 125000, 295 .max_probe_resp_desc_thres = 24, 296 .tx_chain_mask = 0x3, 297 .rx_chain_mask = 0x3, 298 .max_spatial_stream = 2, 299 .cal_data_len = 12064, 300 .fw = { 301 .dir = QCA4019_HW_1_0_FW_DIR, 302 .board = QCA4019_HW_1_0_BOARD_DATA_FILE, 303 .board_size = QCA4019_BOARD_DATA_SZ, 304 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, 305 }, 306 .sw_decrypt_mcast_mgmt = true, 307 .hw_ops = &qca99x0_ops, 308 .decap_align_bytes = 1, 309 }, 310 }; 311 312 static const char *const ath10k_core_fw_feature_str[] = { 313 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 314 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 315 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 316 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 317 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 318 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 319 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 320 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 321 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 322 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 323 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 324 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 325 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", 326 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl", 327 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param", 328 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war", 329 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast", 330 }; 331 332 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 333 size_t buf_len, 334 enum ath10k_fw_features feat) 335 { 336 /* make sure that ath10k_core_fw_feature_str[] gets updated */ 337 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != 338 ATH10K_FW_FEATURE_COUNT); 339 340 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 341 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 342 return scnprintf(buf, buf_len, "bit%d", feat); 343 } 344 345 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 346 } 347 348 void ath10k_core_get_fw_features_str(struct ath10k *ar, 349 char *buf, 350 size_t buf_len) 351 { 352 unsigned int len = 0; 353 int i; 354 355 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 356 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) { 357 if (len > 0) 358 len += scnprintf(buf + len, buf_len - len, ","); 359 360 len += ath10k_core_get_fw_feature_str(buf + len, 361 buf_len - len, 362 i); 363 } 364 } 365 } 366 367 static void ath10k_send_suspend_complete(struct ath10k *ar) 368 { 369 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 370 371 complete(&ar->target_suspend); 372 } 373 374 static int ath10k_init_configure_target(struct ath10k *ar) 375 { 376 u32 param_host; 377 int ret; 378 379 /* tell target which HTC version it is used*/ 380 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 381 HTC_PROTOCOL_VERSION); 382 if (ret) { 383 ath10k_err(ar, "settings HTC version failed\n"); 384 return ret; 385 } 386 387 /* set the firmware mode to STA/IBSS/AP */ 388 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 389 if (ret) { 390 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 391 return ret; 392 } 393 394 /* TODO following parameters need to be re-visited. */ 395 /* num_device */ 396 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 397 /* Firmware mode */ 398 /* FIXME: Why FW_MODE_AP ??.*/ 399 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 400 /* mac_addr_method */ 401 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 402 /* firmware_bridge */ 403 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 404 /* fwsubmode */ 405 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 406 407 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 408 if (ret) { 409 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 410 return ret; 411 } 412 413 /* We do all byte-swapping on the host */ 414 ret = ath10k_bmi_write32(ar, hi_be, 0); 415 if (ret) { 416 ath10k_err(ar, "setting host CPU BE mode failed\n"); 417 return ret; 418 } 419 420 /* FW descriptor/Data swap flags */ 421 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 422 423 if (ret) { 424 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 425 return ret; 426 } 427 428 /* Some devices have a special sanity check that verifies the PCI 429 * Device ID is written to this host interest var. It is known to be 430 * required to boot QCA6164. 431 */ 432 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 433 ar->dev_id); 434 if (ret) { 435 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 436 return ret; 437 } 438 439 return 0; 440 } 441 442 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 443 const char *dir, 444 const char *file) 445 { 446 char filename[100]; 447 const struct firmware *fw; 448 int ret; 449 450 if (file == NULL) 451 return ERR_PTR(-ENOENT); 452 453 if (dir == NULL) 454 dir = "."; 455 456 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 457 ret = request_firmware(&fw, filename, ar->dev); 458 if (ret) 459 return ERR_PTR(ret); 460 461 return fw; 462 } 463 464 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 465 size_t data_len) 466 { 467 u32 board_data_size = ar->hw_params.fw.board_size; 468 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 469 u32 board_ext_data_addr; 470 int ret; 471 472 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 473 if (ret) { 474 ath10k_err(ar, "could not read board ext data addr (%d)\n", 475 ret); 476 return ret; 477 } 478 479 ath10k_dbg(ar, ATH10K_DBG_BOOT, 480 "boot push board extended data addr 0x%x\n", 481 board_ext_data_addr); 482 483 if (board_ext_data_addr == 0) 484 return 0; 485 486 if (data_len != (board_data_size + board_ext_data_size)) { 487 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 488 data_len, board_data_size, board_ext_data_size); 489 return -EINVAL; 490 } 491 492 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 493 data + board_data_size, 494 board_ext_data_size); 495 if (ret) { 496 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 497 return ret; 498 } 499 500 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 501 (board_ext_data_size << 16) | 1); 502 if (ret) { 503 ath10k_err(ar, "could not write board ext data bit (%d)\n", 504 ret); 505 return ret; 506 } 507 508 return 0; 509 } 510 511 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 512 size_t data_len) 513 { 514 u32 board_data_size = ar->hw_params.fw.board_size; 515 u32 address; 516 int ret; 517 518 ret = ath10k_push_board_ext_data(ar, data, data_len); 519 if (ret) { 520 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 521 goto exit; 522 } 523 524 ret = ath10k_bmi_read32(ar, hi_board_data, &address); 525 if (ret) { 526 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 527 goto exit; 528 } 529 530 ret = ath10k_bmi_write_memory(ar, address, data, 531 min_t(u32, board_data_size, 532 data_len)); 533 if (ret) { 534 ath10k_err(ar, "could not write board data (%d)\n", ret); 535 goto exit; 536 } 537 538 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 539 if (ret) { 540 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 541 goto exit; 542 } 543 544 exit: 545 return ret; 546 } 547 548 static int ath10k_download_cal_file(struct ath10k *ar, 549 const struct firmware *file) 550 { 551 int ret; 552 553 if (!file) 554 return -ENOENT; 555 556 if (IS_ERR(file)) 557 return PTR_ERR(file); 558 559 ret = ath10k_download_board_data(ar, file->data, file->size); 560 if (ret) { 561 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 562 return ret; 563 } 564 565 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 566 567 return 0; 568 } 569 570 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name) 571 { 572 struct device_node *node; 573 int data_len; 574 void *data; 575 int ret; 576 577 node = ar->dev->of_node; 578 if (!node) 579 /* Device Tree is optional, don't print any warnings if 580 * there's no node for ath10k. 581 */ 582 return -ENOENT; 583 584 if (!of_get_property(node, dt_name, &data_len)) { 585 /* The calibration data node is optional */ 586 return -ENOENT; 587 } 588 589 if (data_len != ar->hw_params.cal_data_len) { 590 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 591 data_len); 592 ret = -EMSGSIZE; 593 goto out; 594 } 595 596 data = kmalloc(data_len, GFP_KERNEL); 597 if (!data) { 598 ret = -ENOMEM; 599 goto out; 600 } 601 602 ret = of_property_read_u8_array(node, dt_name, data, data_len); 603 if (ret) { 604 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 605 ret); 606 goto out_free; 607 } 608 609 ret = ath10k_download_board_data(ar, data, data_len); 610 if (ret) { 611 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 612 ret); 613 goto out_free; 614 } 615 616 ret = 0; 617 618 out_free: 619 kfree(data); 620 621 out: 622 return ret; 623 } 624 625 static int ath10k_download_cal_eeprom(struct ath10k *ar) 626 { 627 size_t data_len; 628 void *data = NULL; 629 int ret; 630 631 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len); 632 if (ret) { 633 if (ret != -EOPNOTSUPP) 634 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n", 635 ret); 636 goto out_free; 637 } 638 639 ret = ath10k_download_board_data(ar, data, data_len); 640 if (ret) { 641 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n", 642 ret); 643 goto out_free; 644 } 645 646 ret = 0; 647 648 out_free: 649 kfree(data); 650 651 return ret; 652 } 653 654 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) 655 { 656 u32 result, address; 657 u8 board_id, chip_id; 658 int ret; 659 660 address = ar->hw_params.patch_load_addr; 661 662 if (!ar->normal_mode_fw.fw_file.otp_data || 663 !ar->normal_mode_fw.fw_file.otp_len) { 664 ath10k_warn(ar, 665 "failed to retrieve board id because of invalid otp\n"); 666 return -ENODATA; 667 } 668 669 ath10k_dbg(ar, ATH10K_DBG_BOOT, 670 "boot upload otp to 0x%x len %zd for board id\n", 671 address, ar->normal_mode_fw.fw_file.otp_len); 672 673 ret = ath10k_bmi_fast_download(ar, address, 674 ar->normal_mode_fw.fw_file.otp_data, 675 ar->normal_mode_fw.fw_file.otp_len); 676 if (ret) { 677 ath10k_err(ar, "could not write otp for board id check: %d\n", 678 ret); 679 return ret; 680 } 681 682 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EEPROM_BOARD_ID, 683 &result); 684 if (ret) { 685 ath10k_err(ar, "could not execute otp for board id check: %d\n", 686 ret); 687 return ret; 688 } 689 690 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); 691 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); 692 693 ath10k_dbg(ar, ATH10K_DBG_BOOT, 694 "boot get otp board id result 0x%08x board_id %d chip_id %d\n", 695 result, board_id, chip_id); 696 697 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 || 698 (board_id == 0)) { 699 ath10k_warn(ar, "board id is not exist in otp, ignore it\n"); 700 return -EOPNOTSUPP; 701 } 702 703 ar->id.bmi_ids_valid = true; 704 ar->id.bmi_board_id = board_id; 705 ar->id.bmi_chip_id = chip_id; 706 707 return 0; 708 } 709 710 static int ath10k_download_and_run_otp(struct ath10k *ar) 711 { 712 u32 result, address = ar->hw_params.patch_load_addr; 713 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 714 int ret; 715 716 ret = ath10k_download_board_data(ar, 717 ar->running_fw->board_data, 718 ar->running_fw->board_len); 719 if (ret) { 720 ath10k_err(ar, "failed to download board data: %d\n", ret); 721 return ret; 722 } 723 724 /* OTP is optional */ 725 726 if (!ar->running_fw->fw_file.otp_data || 727 !ar->running_fw->fw_file.otp_len) { 728 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n", 729 ar->running_fw->fw_file.otp_data, 730 ar->running_fw->fw_file.otp_len); 731 return 0; 732 } 733 734 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 735 address, ar->running_fw->fw_file.otp_len); 736 737 ret = ath10k_bmi_fast_download(ar, address, 738 ar->running_fw->fw_file.otp_data, 739 ar->running_fw->fw_file.otp_len); 740 if (ret) { 741 ath10k_err(ar, "could not write otp (%d)\n", ret); 742 return ret; 743 } 744 745 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 746 if (ret) { 747 ath10k_err(ar, "could not execute otp (%d)\n", ret); 748 return ret; 749 } 750 751 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 752 753 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 754 ar->running_fw->fw_file.fw_features)) && 755 result != 0) { 756 ath10k_err(ar, "otp calibration failed: %d", result); 757 return -EINVAL; 758 } 759 760 return 0; 761 } 762 763 static int ath10k_download_fw(struct ath10k *ar) 764 { 765 u32 address, data_len; 766 const void *data; 767 int ret; 768 769 address = ar->hw_params.patch_load_addr; 770 771 data = ar->running_fw->fw_file.firmware_data; 772 data_len = ar->running_fw->fw_file.firmware_len; 773 774 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file); 775 if (ret) { 776 ath10k_err(ar, "failed to configure fw code swap: %d\n", 777 ret); 778 return ret; 779 } 780 781 ath10k_dbg(ar, ATH10K_DBG_BOOT, 782 "boot uploading firmware image %pK len %d\n", 783 data, data_len); 784 785 ret = ath10k_bmi_fast_download(ar, address, data, data_len); 786 if (ret) { 787 ath10k_err(ar, "failed to download firmware: %d\n", 788 ret); 789 return ret; 790 } 791 792 return ret; 793 } 794 795 static void ath10k_core_free_board_files(struct ath10k *ar) 796 { 797 if (!IS_ERR(ar->normal_mode_fw.board)) 798 release_firmware(ar->normal_mode_fw.board); 799 800 ar->normal_mode_fw.board = NULL; 801 ar->normal_mode_fw.board_data = NULL; 802 ar->normal_mode_fw.board_len = 0; 803 } 804 805 static void ath10k_core_free_firmware_files(struct ath10k *ar) 806 { 807 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware)) 808 release_firmware(ar->normal_mode_fw.fw_file.firmware); 809 810 if (!IS_ERR(ar->cal_file)) 811 release_firmware(ar->cal_file); 812 813 if (!IS_ERR(ar->pre_cal_file)) 814 release_firmware(ar->pre_cal_file); 815 816 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file); 817 818 ar->normal_mode_fw.fw_file.otp_data = NULL; 819 ar->normal_mode_fw.fw_file.otp_len = 0; 820 821 ar->normal_mode_fw.fw_file.firmware = NULL; 822 ar->normal_mode_fw.fw_file.firmware_data = NULL; 823 ar->normal_mode_fw.fw_file.firmware_len = 0; 824 825 ar->cal_file = NULL; 826 ar->pre_cal_file = NULL; 827 } 828 829 static int ath10k_fetch_cal_file(struct ath10k *ar) 830 { 831 char filename[100]; 832 833 /* pre-cal-<bus>-<id>.bin */ 834 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin", 835 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 836 837 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 838 if (!IS_ERR(ar->pre_cal_file)) 839 goto success; 840 841 /* cal-<bus>-<id>.bin */ 842 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 843 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 844 845 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 846 if (IS_ERR(ar->cal_file)) 847 /* calibration file is optional, don't print any warnings */ 848 return PTR_ERR(ar->cal_file); 849 success: 850 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 851 ATH10K_FW_DIR, filename); 852 853 return 0; 854 } 855 856 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar) 857 { 858 if (!ar->hw_params.fw.board) { 859 ath10k_err(ar, "failed to find board file fw entry\n"); 860 return -EINVAL; 861 } 862 863 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 864 ar->hw_params.fw.dir, 865 ar->hw_params.fw.board); 866 if (IS_ERR(ar->normal_mode_fw.board)) 867 return PTR_ERR(ar->normal_mode_fw.board); 868 869 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data; 870 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size; 871 872 return 0; 873 } 874 875 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, 876 const void *buf, size_t buf_len, 877 const char *boardname) 878 { 879 const struct ath10k_fw_ie *hdr; 880 bool name_match_found; 881 int ret, board_ie_id; 882 size_t board_ie_len; 883 const void *board_ie_data; 884 885 name_match_found = false; 886 887 /* go through ATH10K_BD_IE_BOARD_ elements */ 888 while (buf_len > sizeof(struct ath10k_fw_ie)) { 889 hdr = buf; 890 board_ie_id = le32_to_cpu(hdr->id); 891 board_ie_len = le32_to_cpu(hdr->len); 892 board_ie_data = hdr->data; 893 894 buf_len -= sizeof(*hdr); 895 buf += sizeof(*hdr); 896 897 if (buf_len < ALIGN(board_ie_len, 4)) { 898 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", 899 buf_len, ALIGN(board_ie_len, 4)); 900 ret = -EINVAL; 901 goto out; 902 } 903 904 switch (board_ie_id) { 905 case ATH10K_BD_IE_BOARD_NAME: 906 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", 907 board_ie_data, board_ie_len); 908 909 if (board_ie_len != strlen(boardname)) 910 break; 911 912 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 913 if (ret) 914 break; 915 916 name_match_found = true; 917 ath10k_dbg(ar, ATH10K_DBG_BOOT, 918 "boot found match for name '%s'", 919 boardname); 920 break; 921 case ATH10K_BD_IE_BOARD_DATA: 922 if (!name_match_found) 923 /* no match found */ 924 break; 925 926 ath10k_dbg(ar, ATH10K_DBG_BOOT, 927 "boot found board data for '%s'", 928 boardname); 929 930 ar->normal_mode_fw.board_data = board_ie_data; 931 ar->normal_mode_fw.board_len = board_ie_len; 932 933 ret = 0; 934 goto out; 935 default: 936 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", 937 board_ie_id); 938 break; 939 } 940 941 /* jump over the padding */ 942 board_ie_len = ALIGN(board_ie_len, 4); 943 944 buf_len -= board_ie_len; 945 buf += board_ie_len; 946 } 947 948 /* no match found */ 949 ret = -ENOENT; 950 951 out: 952 return ret; 953 } 954 955 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, 956 const char *boardname, 957 const char *filename) 958 { 959 size_t len, magic_len, ie_len; 960 struct ath10k_fw_ie *hdr; 961 const u8 *data; 962 int ret, ie_id; 963 964 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 965 ar->hw_params.fw.dir, 966 filename); 967 if (IS_ERR(ar->normal_mode_fw.board)) 968 return PTR_ERR(ar->normal_mode_fw.board); 969 970 data = ar->normal_mode_fw.board->data; 971 len = ar->normal_mode_fw.board->size; 972 973 /* magic has extra null byte padded */ 974 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; 975 if (len < magic_len) { 976 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", 977 ar->hw_params.fw.dir, filename, len); 978 ret = -EINVAL; 979 goto err; 980 } 981 982 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { 983 ath10k_err(ar, "found invalid board magic\n"); 984 ret = -EINVAL; 985 goto err; 986 } 987 988 /* magic is padded to 4 bytes */ 989 magic_len = ALIGN(magic_len, 4); 990 if (len < magic_len) { 991 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", 992 ar->hw_params.fw.dir, filename, len); 993 ret = -EINVAL; 994 goto err; 995 } 996 997 data += magic_len; 998 len -= magic_len; 999 1000 while (len > sizeof(struct ath10k_fw_ie)) { 1001 hdr = (struct ath10k_fw_ie *)data; 1002 ie_id = le32_to_cpu(hdr->id); 1003 ie_len = le32_to_cpu(hdr->len); 1004 1005 len -= sizeof(*hdr); 1006 data = hdr->data; 1007 1008 if (len < ALIGN(ie_len, 4)) { 1009 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", 1010 ie_id, ie_len, len); 1011 ret = -EINVAL; 1012 goto err; 1013 } 1014 1015 switch (ie_id) { 1016 case ATH10K_BD_IE_BOARD: 1017 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1018 boardname); 1019 if (ret == -ENOENT) 1020 /* no match found, continue */ 1021 break; 1022 else if (ret) 1023 /* there was an error, bail out */ 1024 goto err; 1025 1026 /* board data found */ 1027 goto out; 1028 } 1029 1030 /* jump over the padding */ 1031 ie_len = ALIGN(ie_len, 4); 1032 1033 len -= ie_len; 1034 data += ie_len; 1035 } 1036 1037 out: 1038 if (!ar->normal_mode_fw.board_data || !ar->normal_mode_fw.board_len) { 1039 ath10k_err(ar, 1040 "failed to fetch board data for %s from %s/%s\n", 1041 boardname, ar->hw_params.fw.dir, filename); 1042 ret = -ENODATA; 1043 goto err; 1044 } 1045 1046 return 0; 1047 1048 err: 1049 ath10k_core_free_board_files(ar); 1050 return ret; 1051 } 1052 1053 static int ath10k_core_create_board_name(struct ath10k *ar, char *name, 1054 size_t name_len) 1055 { 1056 if (ar->id.bmi_ids_valid) { 1057 scnprintf(name, name_len, 1058 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d", 1059 ath10k_bus_str(ar->hif.bus), 1060 ar->id.bmi_chip_id, 1061 ar->id.bmi_board_id); 1062 goto out; 1063 } 1064 1065 scnprintf(name, name_len, 1066 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x", 1067 ath10k_bus_str(ar->hif.bus), 1068 ar->id.vendor, ar->id.device, 1069 ar->id.subsystem_vendor, ar->id.subsystem_device); 1070 1071 out: 1072 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); 1073 1074 return 0; 1075 } 1076 1077 static int ath10k_core_fetch_board_file(struct ath10k *ar) 1078 { 1079 char boardname[100]; 1080 int ret; 1081 1082 ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname)); 1083 if (ret) { 1084 ath10k_err(ar, "failed to create board name: %d", ret); 1085 return ret; 1086 } 1087 1088 ar->bd_api = 2; 1089 ret = ath10k_core_fetch_board_data_api_n(ar, boardname, 1090 ATH10K_BOARD_API2_FILE); 1091 if (!ret) 1092 goto success; 1093 1094 ar->bd_api = 1; 1095 ret = ath10k_core_fetch_board_data_api_1(ar); 1096 if (ret) { 1097 ath10k_err(ar, "failed to fetch board data\n"); 1098 return ret; 1099 } 1100 1101 success: 1102 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); 1103 return 0; 1104 } 1105 1106 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1107 struct ath10k_fw_file *fw_file) 1108 { 1109 size_t magic_len, len, ie_len; 1110 int ie_id, i, index, bit, ret; 1111 struct ath10k_fw_ie *hdr; 1112 const u8 *data; 1113 __le32 *timestamp, *version; 1114 1115 /* first fetch the firmware file (firmware-*.bin) */ 1116 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1117 name); 1118 if (IS_ERR(fw_file->firmware)) { 1119 ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n", 1120 ar->hw_params.fw.dir, name, 1121 PTR_ERR(fw_file->firmware)); 1122 return PTR_ERR(fw_file->firmware); 1123 } 1124 1125 data = fw_file->firmware->data; 1126 len = fw_file->firmware->size; 1127 1128 /* magic also includes the null byte, check that as well */ 1129 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 1130 1131 if (len < magic_len) { 1132 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 1133 ar->hw_params.fw.dir, name, len); 1134 ret = -EINVAL; 1135 goto err; 1136 } 1137 1138 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 1139 ath10k_err(ar, "invalid firmware magic\n"); 1140 ret = -EINVAL; 1141 goto err; 1142 } 1143 1144 /* jump over the padding */ 1145 magic_len = ALIGN(magic_len, 4); 1146 1147 len -= magic_len; 1148 data += magic_len; 1149 1150 /* loop elements */ 1151 while (len > sizeof(struct ath10k_fw_ie)) { 1152 hdr = (struct ath10k_fw_ie *)data; 1153 1154 ie_id = le32_to_cpu(hdr->id); 1155 ie_len = le32_to_cpu(hdr->len); 1156 1157 len -= sizeof(*hdr); 1158 data += sizeof(*hdr); 1159 1160 if (len < ie_len) { 1161 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 1162 ie_id, len, ie_len); 1163 ret = -EINVAL; 1164 goto err; 1165 } 1166 1167 switch (ie_id) { 1168 case ATH10K_FW_IE_FW_VERSION: 1169 if (ie_len > sizeof(fw_file->fw_version) - 1) 1170 break; 1171 1172 memcpy(fw_file->fw_version, data, ie_len); 1173 fw_file->fw_version[ie_len] = '\0'; 1174 1175 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1176 "found fw version %s\n", 1177 fw_file->fw_version); 1178 break; 1179 case ATH10K_FW_IE_TIMESTAMP: 1180 if (ie_len != sizeof(u32)) 1181 break; 1182 1183 timestamp = (__le32 *)data; 1184 1185 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 1186 le32_to_cpup(timestamp)); 1187 break; 1188 case ATH10K_FW_IE_FEATURES: 1189 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1190 "found firmware features ie (%zd B)\n", 1191 ie_len); 1192 1193 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 1194 index = i / 8; 1195 bit = i % 8; 1196 1197 if (index == ie_len) 1198 break; 1199 1200 if (data[index] & (1 << bit)) { 1201 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1202 "Enabling feature bit: %i\n", 1203 i); 1204 __set_bit(i, fw_file->fw_features); 1205 } 1206 } 1207 1208 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 1209 fw_file->fw_features, 1210 sizeof(fw_file->fw_features)); 1211 break; 1212 case ATH10K_FW_IE_FW_IMAGE: 1213 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1214 "found fw image ie (%zd B)\n", 1215 ie_len); 1216 1217 fw_file->firmware_data = data; 1218 fw_file->firmware_len = ie_len; 1219 1220 break; 1221 case ATH10K_FW_IE_OTP_IMAGE: 1222 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1223 "found otp image ie (%zd B)\n", 1224 ie_len); 1225 1226 fw_file->otp_data = data; 1227 fw_file->otp_len = ie_len; 1228 1229 break; 1230 case ATH10K_FW_IE_WMI_OP_VERSION: 1231 if (ie_len != sizeof(u32)) 1232 break; 1233 1234 version = (__le32 *)data; 1235 1236 fw_file->wmi_op_version = le32_to_cpup(version); 1237 1238 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 1239 fw_file->wmi_op_version); 1240 break; 1241 case ATH10K_FW_IE_HTT_OP_VERSION: 1242 if (ie_len != sizeof(u32)) 1243 break; 1244 1245 version = (__le32 *)data; 1246 1247 fw_file->htt_op_version = le32_to_cpup(version); 1248 1249 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 1250 fw_file->htt_op_version); 1251 break; 1252 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 1253 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1254 "found fw code swap image ie (%zd B)\n", 1255 ie_len); 1256 fw_file->codeswap_data = data; 1257 fw_file->codeswap_len = ie_len; 1258 break; 1259 default: 1260 ath10k_warn(ar, "Unknown FW IE: %u\n", 1261 le32_to_cpu(hdr->id)); 1262 break; 1263 } 1264 1265 /* jump over the padding */ 1266 ie_len = ALIGN(ie_len, 4); 1267 1268 len -= ie_len; 1269 data += ie_len; 1270 } 1271 1272 if (!fw_file->firmware_data || 1273 !fw_file->firmware_len) { 1274 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 1275 ar->hw_params.fw.dir, name); 1276 ret = -ENOMEDIUM; 1277 goto err; 1278 } 1279 1280 return 0; 1281 1282 err: 1283 ath10k_core_free_firmware_files(ar); 1284 return ret; 1285 } 1286 1287 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 1288 { 1289 int ret; 1290 1291 /* calibration file is optional, don't check for any errors */ 1292 ath10k_fetch_cal_file(ar); 1293 1294 ar->fw_api = 5; 1295 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 1296 1297 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API5_FILE, 1298 &ar->normal_mode_fw.fw_file); 1299 if (ret == 0) 1300 goto success; 1301 1302 ar->fw_api = 4; 1303 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 1304 1305 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API4_FILE, 1306 &ar->normal_mode_fw.fw_file); 1307 if (ret == 0) 1308 goto success; 1309 1310 ar->fw_api = 3; 1311 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 1312 1313 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE, 1314 &ar->normal_mode_fw.fw_file); 1315 if (ret == 0) 1316 goto success; 1317 1318 ar->fw_api = 2; 1319 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 1320 1321 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE, 1322 &ar->normal_mode_fw.fw_file); 1323 if (ret) 1324 return ret; 1325 1326 success: 1327 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1328 1329 return 0; 1330 } 1331 1332 static int ath10k_core_pre_cal_download(struct ath10k *ar) 1333 { 1334 int ret; 1335 1336 ret = ath10k_download_cal_file(ar, ar->pre_cal_file); 1337 if (ret == 0) { 1338 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE; 1339 goto success; 1340 } 1341 1342 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1343 "boot did not find a pre calibration file, try DT next: %d\n", 1344 ret); 1345 1346 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data"); 1347 if (ret) { 1348 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1349 "unable to load pre cal data from DT: %d\n", ret); 1350 return ret; 1351 } 1352 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT; 1353 1354 success: 1355 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1356 ath10k_cal_mode_str(ar->cal_mode)); 1357 1358 return 0; 1359 } 1360 1361 static int ath10k_core_pre_cal_config(struct ath10k *ar) 1362 { 1363 int ret; 1364 1365 ret = ath10k_core_pre_cal_download(ar); 1366 if (ret) { 1367 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1368 "failed to load pre cal data: %d\n", ret); 1369 return ret; 1370 } 1371 1372 ret = ath10k_core_get_board_id_from_otp(ar); 1373 if (ret) { 1374 ath10k_err(ar, "failed to get board id: %d\n", ret); 1375 return ret; 1376 } 1377 1378 ret = ath10k_download_and_run_otp(ar); 1379 if (ret) { 1380 ath10k_err(ar, "failed to run otp: %d\n", ret); 1381 return ret; 1382 } 1383 1384 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1385 "pre cal configuration done successfully\n"); 1386 1387 return 0; 1388 } 1389 1390 static int ath10k_download_cal_data(struct ath10k *ar) 1391 { 1392 int ret; 1393 1394 ret = ath10k_core_pre_cal_config(ar); 1395 if (ret == 0) 1396 return 0; 1397 1398 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1399 "pre cal download procedure failed, try cal file: %d\n", 1400 ret); 1401 1402 ret = ath10k_download_cal_file(ar, ar->cal_file); 1403 if (ret == 0) { 1404 ar->cal_mode = ATH10K_CAL_MODE_FILE; 1405 goto done; 1406 } 1407 1408 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1409 "boot did not find a calibration file, try DT next: %d\n", 1410 ret); 1411 1412 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data"); 1413 if (ret == 0) { 1414 ar->cal_mode = ATH10K_CAL_MODE_DT; 1415 goto done; 1416 } 1417 1418 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1419 "boot did not find DT entry, try target EEPROM next: %d\n", 1420 ret); 1421 1422 ret = ath10k_download_cal_eeprom(ar); 1423 if (ret == 0) { 1424 ar->cal_mode = ATH10K_CAL_MODE_EEPROM; 1425 goto done; 1426 } 1427 1428 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1429 "boot did not find target EEPROM entry, try OTP next: %d\n", 1430 ret); 1431 1432 ret = ath10k_download_and_run_otp(ar); 1433 if (ret) { 1434 ath10k_err(ar, "failed to run otp: %d\n", ret); 1435 return ret; 1436 } 1437 1438 ar->cal_mode = ATH10K_CAL_MODE_OTP; 1439 1440 done: 1441 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1442 ath10k_cal_mode_str(ar->cal_mode)); 1443 return 0; 1444 } 1445 1446 static int ath10k_init_uart(struct ath10k *ar) 1447 { 1448 int ret; 1449 1450 /* 1451 * Explicitly setting UART prints to zero as target turns it on 1452 * based on scratch registers. 1453 */ 1454 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 1455 if (ret) { 1456 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 1457 return ret; 1458 } 1459 1460 if (!uart_print) 1461 return 0; 1462 1463 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 1464 if (ret) { 1465 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1466 return ret; 1467 } 1468 1469 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 1470 if (ret) { 1471 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1472 return ret; 1473 } 1474 1475 /* Set the UART baud rate to 19200. */ 1476 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 1477 if (ret) { 1478 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 1479 return ret; 1480 } 1481 1482 ath10k_info(ar, "UART prints enabled\n"); 1483 return 0; 1484 } 1485 1486 static int ath10k_init_hw_params(struct ath10k *ar) 1487 { 1488 const struct ath10k_hw_params *uninitialized_var(hw_params); 1489 int i; 1490 1491 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 1492 hw_params = &ath10k_hw_params_list[i]; 1493 1494 if (hw_params->id == ar->target_version && 1495 hw_params->dev_id == ar->dev_id) 1496 break; 1497 } 1498 1499 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 1500 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 1501 ar->target_version); 1502 return -EINVAL; 1503 } 1504 1505 ar->hw_params = *hw_params; 1506 1507 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 1508 ar->hw_params.name, ar->target_version); 1509 1510 return 0; 1511 } 1512 1513 static void ath10k_core_restart(struct work_struct *work) 1514 { 1515 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 1516 int ret; 1517 1518 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1519 1520 /* Place a barrier to make sure the compiler doesn't reorder 1521 * CRASH_FLUSH and calling other functions. 1522 */ 1523 barrier(); 1524 1525 ieee80211_stop_queues(ar->hw); 1526 ath10k_drain_tx(ar); 1527 complete(&ar->scan.started); 1528 complete(&ar->scan.completed); 1529 complete(&ar->scan.on_channel); 1530 complete(&ar->offchan_tx_completed); 1531 complete(&ar->install_key_done); 1532 complete(&ar->vdev_setup_done); 1533 complete(&ar->thermal.wmi_sync); 1534 complete(&ar->bss_survey_done); 1535 wake_up(&ar->htt.empty_tx_wq); 1536 wake_up(&ar->wmi.tx_credits_wq); 1537 wake_up(&ar->peer_mapping_wq); 1538 1539 mutex_lock(&ar->conf_mutex); 1540 1541 switch (ar->state) { 1542 case ATH10K_STATE_ON: 1543 ar->state = ATH10K_STATE_RESTARTING; 1544 ath10k_halt(ar); 1545 ath10k_scan_finish(ar); 1546 ieee80211_restart_hw(ar->hw); 1547 break; 1548 case ATH10K_STATE_OFF: 1549 /* this can happen if driver is being unloaded 1550 * or if the crash happens during FW probing */ 1551 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 1552 break; 1553 case ATH10K_STATE_RESTARTING: 1554 /* hw restart might be requested from multiple places */ 1555 break; 1556 case ATH10K_STATE_RESTARTED: 1557 ar->state = ATH10K_STATE_WEDGED; 1558 /* fall through */ 1559 case ATH10K_STATE_WEDGED: 1560 ath10k_warn(ar, "device is wedged, will not restart\n"); 1561 break; 1562 case ATH10K_STATE_UTF: 1563 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 1564 break; 1565 } 1566 1567 mutex_unlock(&ar->conf_mutex); 1568 1569 ret = ath10k_debug_fw_devcoredump(ar); 1570 if (ret) 1571 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d", 1572 ret); 1573 } 1574 1575 static void ath10k_core_set_coverage_class_work(struct work_struct *work) 1576 { 1577 struct ath10k *ar = container_of(work, struct ath10k, 1578 set_coverage_class_work); 1579 1580 if (ar->hw_params.hw_ops->set_coverage_class) 1581 ar->hw_params.hw_ops->set_coverage_class(ar, -1); 1582 } 1583 1584 static int ath10k_core_init_firmware_features(struct ath10k *ar) 1585 { 1586 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 1587 1588 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) && 1589 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 1590 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 1591 return -EINVAL; 1592 } 1593 1594 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 1595 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 1596 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version); 1597 return -EINVAL; 1598 } 1599 1600 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 1601 switch (ath10k_cryptmode_param) { 1602 case ATH10K_CRYPT_MODE_HW: 1603 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1604 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1605 break; 1606 case ATH10K_CRYPT_MODE_SW: 1607 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1608 fw_file->fw_features)) { 1609 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 1610 return -EINVAL; 1611 } 1612 1613 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1614 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1615 break; 1616 default: 1617 ath10k_info(ar, "invalid cryptmode: %d\n", 1618 ath10k_cryptmode_param); 1619 return -EINVAL; 1620 } 1621 1622 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 1623 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 1624 1625 if (rawmode) { 1626 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1627 fw_file->fw_features)) { 1628 ath10k_err(ar, "rawmode = 1 requires support from firmware"); 1629 return -EINVAL; 1630 } 1631 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1632 } 1633 1634 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 1635 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 1636 1637 /* Workaround: 1638 * 1639 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 1640 * and causes enormous performance issues (malformed frames, 1641 * etc). 1642 * 1643 * Disabling A-MSDU makes RAW mode stable with heavy traffic 1644 * albeit a bit slower compared to regular operation. 1645 */ 1646 ar->htt.max_num_amsdu = 1; 1647 } 1648 1649 /* Backwards compatibility for firmwares without 1650 * ATH10K_FW_IE_WMI_OP_VERSION. 1651 */ 1652 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 1653 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 1654 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 1655 fw_file->fw_features)) 1656 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 1657 else 1658 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 1659 } else { 1660 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 1661 } 1662 } 1663 1664 switch (fw_file->wmi_op_version) { 1665 case ATH10K_FW_WMI_OP_VERSION_MAIN: 1666 ar->max_num_peers = TARGET_NUM_PEERS; 1667 ar->max_num_stations = TARGET_NUM_STATIONS; 1668 ar->max_num_vdevs = TARGET_NUM_VDEVS; 1669 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 1670 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1671 WMI_STAT_PEER; 1672 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1673 break; 1674 case ATH10K_FW_WMI_OP_VERSION_10_1: 1675 case ATH10K_FW_WMI_OP_VERSION_10_2: 1676 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 1677 if (ath10k_peer_stats_enabled(ar)) { 1678 ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS; 1679 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS; 1680 } else { 1681 ar->max_num_peers = TARGET_10X_NUM_PEERS; 1682 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 1683 } 1684 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 1685 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 1686 ar->fw_stats_req_mask = WMI_STAT_PEER; 1687 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1688 break; 1689 case ATH10K_FW_WMI_OP_VERSION_TLV: 1690 ar->max_num_peers = TARGET_TLV_NUM_PEERS; 1691 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 1692 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 1693 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 1694 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 1695 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 1696 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1697 WMI_STAT_PEER; 1698 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1699 break; 1700 case ATH10K_FW_WMI_OP_VERSION_10_4: 1701 ar->max_num_peers = TARGET_10_4_NUM_PEERS; 1702 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 1703 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 1704 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 1705 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 1706 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER | 1707 WMI_10_4_STAT_PEER_EXTD; 1708 ar->max_spatial_stream = ar->hw_params.max_spatial_stream; 1709 1710 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, 1711 fw_file->fw_features)) 1712 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC; 1713 else 1714 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 1715 break; 1716 case ATH10K_FW_WMI_OP_VERSION_UNSET: 1717 case ATH10K_FW_WMI_OP_VERSION_MAX: 1718 WARN_ON(1); 1719 return -EINVAL; 1720 } 1721 1722 /* Backwards compatibility for firmwares without 1723 * ATH10K_FW_IE_HTT_OP_VERSION. 1724 */ 1725 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 1726 switch (fw_file->wmi_op_version) { 1727 case ATH10K_FW_WMI_OP_VERSION_MAIN: 1728 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 1729 break; 1730 case ATH10K_FW_WMI_OP_VERSION_10_1: 1731 case ATH10K_FW_WMI_OP_VERSION_10_2: 1732 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 1733 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 1734 break; 1735 case ATH10K_FW_WMI_OP_VERSION_TLV: 1736 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 1737 break; 1738 case ATH10K_FW_WMI_OP_VERSION_10_4: 1739 case ATH10K_FW_WMI_OP_VERSION_UNSET: 1740 case ATH10K_FW_WMI_OP_VERSION_MAX: 1741 ath10k_err(ar, "htt op version not found from fw meta data"); 1742 return -EINVAL; 1743 } 1744 } 1745 1746 return 0; 1747 } 1748 1749 static int ath10k_core_reset_rx_filter(struct ath10k *ar) 1750 { 1751 int ret; 1752 int vdev_id; 1753 int vdev_type; 1754 int vdev_subtype; 1755 const u8 *vdev_addr; 1756 1757 vdev_id = 0; 1758 vdev_type = WMI_VDEV_TYPE_STA; 1759 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE); 1760 vdev_addr = ar->mac_addr; 1761 1762 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype, 1763 vdev_addr); 1764 if (ret) { 1765 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret); 1766 return ret; 1767 } 1768 1769 ret = ath10k_wmi_vdev_delete(ar, vdev_id); 1770 if (ret) { 1771 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret); 1772 return ret; 1773 } 1774 1775 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be 1776 * serialized properly implicitly. 1777 * 1778 * Moreover (most) WMI commands have no explicit acknowledges. It is 1779 * possible to infer it implicitly by poking firmware with echo 1780 * command - getting a reply means all preceding comments have been 1781 * (mostly) processed. 1782 * 1783 * In case of vdev create/delete this is sufficient. 1784 * 1785 * Without this it's possible to end up with a race when HTT Rx ring is 1786 * started before vdev create/delete hack is complete allowing a short 1787 * window of opportunity to receive (and Tx ACK) a bunch of frames. 1788 */ 1789 ret = ath10k_wmi_barrier(ar); 1790 if (ret) { 1791 ath10k_err(ar, "failed to ping firmware: %d\n", ret); 1792 return ret; 1793 } 1794 1795 return 0; 1796 } 1797 1798 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 1799 const struct ath10k_fw_components *fw) 1800 { 1801 int status; 1802 u32 val; 1803 1804 lockdep_assert_held(&ar->conf_mutex); 1805 1806 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1807 1808 ar->running_fw = fw; 1809 1810 ath10k_bmi_start(ar); 1811 1812 if (ath10k_init_configure_target(ar)) { 1813 status = -EINVAL; 1814 goto err; 1815 } 1816 1817 status = ath10k_download_cal_data(ar); 1818 if (status) 1819 goto err; 1820 1821 /* Some of of qca988x solutions are having global reset issue 1822 * during target initialization. Bypassing PLL setting before 1823 * downloading firmware and letting the SoC run on REF_CLK is 1824 * fixing the problem. Corresponding firmware change is also needed 1825 * to set the clock source once the target is initialized. 1826 */ 1827 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 1828 ar->running_fw->fw_file.fw_features)) { 1829 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 1830 if (status) { 1831 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 1832 status); 1833 goto err; 1834 } 1835 } 1836 1837 status = ath10k_download_fw(ar); 1838 if (status) 1839 goto err; 1840 1841 status = ath10k_init_uart(ar); 1842 if (status) 1843 goto err; 1844 1845 ar->htc.htc_ops.target_send_suspend_complete = 1846 ath10k_send_suspend_complete; 1847 1848 status = ath10k_htc_init(ar); 1849 if (status) { 1850 ath10k_err(ar, "could not init HTC (%d)\n", status); 1851 goto err; 1852 } 1853 1854 status = ath10k_bmi_done(ar); 1855 if (status) 1856 goto err; 1857 1858 status = ath10k_wmi_attach(ar); 1859 if (status) { 1860 ath10k_err(ar, "WMI attach failed: %d\n", status); 1861 goto err; 1862 } 1863 1864 status = ath10k_htt_init(ar); 1865 if (status) { 1866 ath10k_err(ar, "failed to init htt: %d\n", status); 1867 goto err_wmi_detach; 1868 } 1869 1870 status = ath10k_htt_tx_start(&ar->htt); 1871 if (status) { 1872 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 1873 goto err_wmi_detach; 1874 } 1875 1876 status = ath10k_htt_rx_alloc(&ar->htt); 1877 if (status) { 1878 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 1879 goto err_htt_tx_detach; 1880 } 1881 1882 status = ath10k_hif_start(ar); 1883 if (status) { 1884 ath10k_err(ar, "could not start HIF: %d\n", status); 1885 goto err_htt_rx_detach; 1886 } 1887 1888 status = ath10k_htc_wait_target(&ar->htc); 1889 if (status) { 1890 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 1891 goto err_hif_stop; 1892 } 1893 1894 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 1895 status = ath10k_htt_connect(&ar->htt); 1896 if (status) { 1897 ath10k_err(ar, "failed to connect htt (%d)\n", status); 1898 goto err_hif_stop; 1899 } 1900 } 1901 1902 status = ath10k_wmi_connect(ar); 1903 if (status) { 1904 ath10k_err(ar, "could not connect wmi: %d\n", status); 1905 goto err_hif_stop; 1906 } 1907 1908 status = ath10k_htc_start(&ar->htc); 1909 if (status) { 1910 ath10k_err(ar, "failed to start htc: %d\n", status); 1911 goto err_hif_stop; 1912 } 1913 1914 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 1915 status = ath10k_wmi_wait_for_service_ready(ar); 1916 if (status) { 1917 ath10k_warn(ar, "wmi service ready event not received"); 1918 goto err_hif_stop; 1919 } 1920 } 1921 1922 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 1923 ar->hw->wiphy->fw_version); 1924 1925 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map)) { 1926 val = 0; 1927 if (ath10k_peer_stats_enabled(ar)) 1928 val = WMI_10_4_PEER_STATS; 1929 1930 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) 1931 val |= WMI_10_4_BSS_CHANNEL_INFO_64; 1932 1933 /* 10.4 firmware supports BT-Coex without reloading firmware 1934 * via pdev param. To support Bluetooth coexistence pdev param, 1935 * WMI_COEX_GPIO_SUPPORT of extended resource config should be 1936 * enabled always. 1937 */ 1938 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 1939 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 1940 ar->running_fw->fw_file.fw_features)) 1941 val |= WMI_10_4_COEX_GPIO_SUPPORT; 1942 1943 status = ath10k_mac_ext_resource_config(ar, val); 1944 if (status) { 1945 ath10k_err(ar, 1946 "failed to send ext resource cfg command : %d\n", 1947 status); 1948 goto err_hif_stop; 1949 } 1950 } 1951 1952 status = ath10k_wmi_cmd_init(ar); 1953 if (status) { 1954 ath10k_err(ar, "could not send WMI init command (%d)\n", 1955 status); 1956 goto err_hif_stop; 1957 } 1958 1959 status = ath10k_wmi_wait_for_unified_ready(ar); 1960 if (status) { 1961 ath10k_err(ar, "wmi unified ready event not received\n"); 1962 goto err_hif_stop; 1963 } 1964 1965 /* Some firmware revisions do not properly set up hardware rx filter 1966 * registers. 1967 * 1968 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK 1969 * is filled with 0s instead of 1s allowing HW to respond with ACKs to 1970 * any frames that matches MAC_PCU_RX_FILTER which is also 1971 * misconfigured to accept anything. 1972 * 1973 * The ADDR1 is programmed using internal firmware structure field and 1974 * can't be (easily/sanely) reached from the driver explicitly. It is 1975 * possible to implicitly make it correct by creating a dummy vdev and 1976 * then deleting it. 1977 */ 1978 status = ath10k_core_reset_rx_filter(ar); 1979 if (status) { 1980 ath10k_err(ar, "failed to reset rx filter: %d\n", status); 1981 goto err_hif_stop; 1982 } 1983 1984 /* If firmware indicates Full Rx Reorder support it must be used in a 1985 * slightly different manner. Let HTT code know. 1986 */ 1987 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 1988 ar->wmi.svc_map)); 1989 1990 status = ath10k_htt_rx_ring_refill(ar); 1991 if (status) { 1992 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 1993 goto err_hif_stop; 1994 } 1995 1996 if (ar->max_num_vdevs >= 64) 1997 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL; 1998 else 1999 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 2000 2001 INIT_LIST_HEAD(&ar->arvifs); 2002 2003 /* we don't care about HTT in UTF mode */ 2004 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2005 status = ath10k_htt_setup(&ar->htt); 2006 if (status) { 2007 ath10k_err(ar, "failed to setup htt: %d\n", status); 2008 goto err_hif_stop; 2009 } 2010 } 2011 2012 status = ath10k_debug_start(ar); 2013 if (status) 2014 goto err_hif_stop; 2015 2016 return 0; 2017 2018 err_hif_stop: 2019 ath10k_hif_stop(ar); 2020 err_htt_rx_detach: 2021 ath10k_htt_rx_free(&ar->htt); 2022 err_htt_tx_detach: 2023 ath10k_htt_tx_free(&ar->htt); 2024 err_wmi_detach: 2025 ath10k_wmi_detach(ar); 2026 err: 2027 return status; 2028 } 2029 EXPORT_SYMBOL(ath10k_core_start); 2030 2031 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 2032 { 2033 int ret; 2034 unsigned long time_left; 2035 2036 reinit_completion(&ar->target_suspend); 2037 2038 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 2039 if (ret) { 2040 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 2041 return ret; 2042 } 2043 2044 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 2045 2046 if (!time_left) { 2047 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 2048 return -ETIMEDOUT; 2049 } 2050 2051 return 0; 2052 } 2053 2054 void ath10k_core_stop(struct ath10k *ar) 2055 { 2056 lockdep_assert_held(&ar->conf_mutex); 2057 ath10k_debug_stop(ar); 2058 2059 /* try to suspend target */ 2060 if (ar->state != ATH10K_STATE_RESTARTING && 2061 ar->state != ATH10K_STATE_UTF) 2062 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 2063 2064 ath10k_hif_stop(ar); 2065 ath10k_htt_tx_stop(&ar->htt); 2066 ath10k_htt_rx_free(&ar->htt); 2067 ath10k_wmi_detach(ar); 2068 } 2069 EXPORT_SYMBOL(ath10k_core_stop); 2070 2071 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 2072 * order to know what hw capabilities should be advertised to mac80211 it is 2073 * necessary to load the firmware (and tear it down immediately since start 2074 * hook will try to init it again) before registering */ 2075 static int ath10k_core_probe_fw(struct ath10k *ar) 2076 { 2077 struct bmi_target_info target_info; 2078 int ret = 0; 2079 2080 ret = ath10k_hif_power_up(ar); 2081 if (ret) { 2082 ath10k_err(ar, "could not start pci hif (%d)\n", ret); 2083 return ret; 2084 } 2085 2086 memset(&target_info, 0, sizeof(target_info)); 2087 ret = ath10k_bmi_get_target_info(ar, &target_info); 2088 if (ret) { 2089 ath10k_err(ar, "could not get target info (%d)\n", ret); 2090 goto err_power_down; 2091 } 2092 2093 ar->target_version = target_info.version; 2094 ar->hw->wiphy->hw_version = target_info.version; 2095 2096 ret = ath10k_init_hw_params(ar); 2097 if (ret) { 2098 ath10k_err(ar, "could not get hw params (%d)\n", ret); 2099 goto err_power_down; 2100 } 2101 2102 ret = ath10k_core_fetch_firmware_files(ar); 2103 if (ret) { 2104 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 2105 goto err_power_down; 2106 } 2107 2108 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) != 2109 sizeof(ar->normal_mode_fw.fw_file.fw_version)); 2110 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version, 2111 sizeof(ar->hw->wiphy->fw_version)); 2112 2113 ath10k_debug_print_hwfw_info(ar); 2114 2115 ret = ath10k_core_pre_cal_download(ar); 2116 if (ret) { 2117 /* pre calibration data download is not necessary 2118 * for all the chipsets. Ignore failures and continue. 2119 */ 2120 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2121 "could not load pre cal data: %d\n", ret); 2122 } 2123 2124 ret = ath10k_core_get_board_id_from_otp(ar); 2125 if (ret && ret != -EOPNOTSUPP) { 2126 ath10k_err(ar, "failed to get board id from otp: %d\n", 2127 ret); 2128 goto err_free_firmware_files; 2129 } 2130 2131 ret = ath10k_core_fetch_board_file(ar); 2132 if (ret) { 2133 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 2134 goto err_free_firmware_files; 2135 } 2136 2137 ath10k_debug_print_board_info(ar); 2138 2139 ret = ath10k_core_init_firmware_features(ar); 2140 if (ret) { 2141 ath10k_err(ar, "fatal problem with firmware features: %d\n", 2142 ret); 2143 goto err_free_firmware_files; 2144 } 2145 2146 ret = ath10k_swap_code_seg_init(ar, &ar->normal_mode_fw.fw_file); 2147 if (ret) { 2148 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 2149 ret); 2150 goto err_free_firmware_files; 2151 } 2152 2153 mutex_lock(&ar->conf_mutex); 2154 2155 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL, 2156 &ar->normal_mode_fw); 2157 if (ret) { 2158 ath10k_err(ar, "could not init core (%d)\n", ret); 2159 goto err_unlock; 2160 } 2161 2162 ath10k_debug_print_boot_info(ar); 2163 ath10k_core_stop(ar); 2164 2165 mutex_unlock(&ar->conf_mutex); 2166 2167 ath10k_hif_power_down(ar); 2168 return 0; 2169 2170 err_unlock: 2171 mutex_unlock(&ar->conf_mutex); 2172 2173 err_free_firmware_files: 2174 ath10k_core_free_firmware_files(ar); 2175 2176 err_power_down: 2177 ath10k_hif_power_down(ar); 2178 2179 return ret; 2180 } 2181 2182 static void ath10k_core_register_work(struct work_struct *work) 2183 { 2184 struct ath10k *ar = container_of(work, struct ath10k, register_work); 2185 int status; 2186 2187 /* peer stats are enabled by default */ 2188 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags); 2189 2190 status = ath10k_core_probe_fw(ar); 2191 if (status) { 2192 ath10k_err(ar, "could not probe fw (%d)\n", status); 2193 goto err; 2194 } 2195 2196 status = ath10k_mac_register(ar); 2197 if (status) { 2198 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 2199 goto err_release_fw; 2200 } 2201 2202 status = ath10k_debug_register(ar); 2203 if (status) { 2204 ath10k_err(ar, "unable to initialize debugfs\n"); 2205 goto err_unregister_mac; 2206 } 2207 2208 status = ath10k_spectral_create(ar); 2209 if (status) { 2210 ath10k_err(ar, "failed to initialize spectral\n"); 2211 goto err_debug_destroy; 2212 } 2213 2214 status = ath10k_thermal_register(ar); 2215 if (status) { 2216 ath10k_err(ar, "could not register thermal device: %d\n", 2217 status); 2218 goto err_spectral_destroy; 2219 } 2220 2221 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 2222 return; 2223 2224 err_spectral_destroy: 2225 ath10k_spectral_destroy(ar); 2226 err_debug_destroy: 2227 ath10k_debug_destroy(ar); 2228 err_unregister_mac: 2229 ath10k_mac_unregister(ar); 2230 err_release_fw: 2231 ath10k_core_free_firmware_files(ar); 2232 err: 2233 /* TODO: It's probably a good idea to release device from the driver 2234 * but calling device_release_driver() here will cause a deadlock. 2235 */ 2236 return; 2237 } 2238 2239 int ath10k_core_register(struct ath10k *ar, u32 chip_id) 2240 { 2241 ar->chip_id = chip_id; 2242 queue_work(ar->workqueue, &ar->register_work); 2243 2244 return 0; 2245 } 2246 EXPORT_SYMBOL(ath10k_core_register); 2247 2248 void ath10k_core_unregister(struct ath10k *ar) 2249 { 2250 cancel_work_sync(&ar->register_work); 2251 2252 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 2253 return; 2254 2255 ath10k_thermal_unregister(ar); 2256 /* Stop spectral before unregistering from mac80211 to remove the 2257 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 2258 * would be already be free'd recursively, leading to a double free. 2259 */ 2260 ath10k_spectral_destroy(ar); 2261 2262 /* We must unregister from mac80211 before we stop HTC and HIF. 2263 * Otherwise we will fail to submit commands to FW and mac80211 will be 2264 * unhappy about callback failures. */ 2265 ath10k_mac_unregister(ar); 2266 2267 ath10k_testmode_destroy(ar); 2268 2269 ath10k_core_free_firmware_files(ar); 2270 ath10k_core_free_board_files(ar); 2271 2272 ath10k_debug_unregister(ar); 2273 } 2274 EXPORT_SYMBOL(ath10k_core_unregister); 2275 2276 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 2277 enum ath10k_bus bus, 2278 enum ath10k_hw_rev hw_rev, 2279 const struct ath10k_hif_ops *hif_ops) 2280 { 2281 struct ath10k *ar; 2282 int ret; 2283 2284 ar = ath10k_mac_create(priv_size); 2285 if (!ar) 2286 return NULL; 2287 2288 ar->ath_common.priv = ar; 2289 ar->ath_common.hw = ar->hw; 2290 ar->dev = dev; 2291 ar->hw_rev = hw_rev; 2292 ar->hif.ops = hif_ops; 2293 ar->hif.bus = bus; 2294 2295 switch (hw_rev) { 2296 case ATH10K_HW_QCA988X: 2297 case ATH10K_HW_QCA9887: 2298 ar->regs = &qca988x_regs; 2299 ar->hw_values = &qca988x_values; 2300 break; 2301 case ATH10K_HW_QCA6174: 2302 case ATH10K_HW_QCA9377: 2303 ar->regs = &qca6174_regs; 2304 ar->hw_values = &qca6174_values; 2305 break; 2306 case ATH10K_HW_QCA99X0: 2307 case ATH10K_HW_QCA9984: 2308 ar->regs = &qca99x0_regs; 2309 ar->hw_values = &qca99x0_values; 2310 break; 2311 case ATH10K_HW_QCA9888: 2312 ar->regs = &qca99x0_regs; 2313 ar->hw_values = &qca9888_values; 2314 break; 2315 case ATH10K_HW_QCA4019: 2316 ar->regs = &qca4019_regs; 2317 ar->hw_values = &qca4019_values; 2318 break; 2319 default: 2320 ath10k_err(ar, "unsupported core hardware revision %d\n", 2321 hw_rev); 2322 ret = -ENOTSUPP; 2323 goto err_free_mac; 2324 } 2325 2326 init_completion(&ar->scan.started); 2327 init_completion(&ar->scan.completed); 2328 init_completion(&ar->scan.on_channel); 2329 init_completion(&ar->target_suspend); 2330 init_completion(&ar->wow.wakeup_completed); 2331 2332 init_completion(&ar->install_key_done); 2333 init_completion(&ar->vdev_setup_done); 2334 init_completion(&ar->thermal.wmi_sync); 2335 init_completion(&ar->bss_survey_done); 2336 2337 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 2338 2339 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 2340 if (!ar->workqueue) 2341 goto err_free_mac; 2342 2343 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 2344 if (!ar->workqueue_aux) 2345 goto err_free_wq; 2346 2347 mutex_init(&ar->conf_mutex); 2348 spin_lock_init(&ar->data_lock); 2349 spin_lock_init(&ar->txqs_lock); 2350 2351 INIT_LIST_HEAD(&ar->txqs); 2352 INIT_LIST_HEAD(&ar->peers); 2353 init_waitqueue_head(&ar->peer_mapping_wq); 2354 init_waitqueue_head(&ar->htt.empty_tx_wq); 2355 init_waitqueue_head(&ar->wmi.tx_credits_wq); 2356 2357 init_completion(&ar->offchan_tx_completed); 2358 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 2359 skb_queue_head_init(&ar->offchan_tx_queue); 2360 2361 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 2362 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 2363 2364 INIT_WORK(&ar->register_work, ath10k_core_register_work); 2365 INIT_WORK(&ar->restart_work, ath10k_core_restart); 2366 INIT_WORK(&ar->set_coverage_class_work, 2367 ath10k_core_set_coverage_class_work); 2368 2369 init_dummy_netdev(&ar->napi_dev); 2370 2371 ret = ath10k_debug_create(ar); 2372 if (ret) 2373 goto err_free_aux_wq; 2374 2375 return ar; 2376 2377 err_free_aux_wq: 2378 destroy_workqueue(ar->workqueue_aux); 2379 err_free_wq: 2380 destroy_workqueue(ar->workqueue); 2381 2382 err_free_mac: 2383 ath10k_mac_destroy(ar); 2384 2385 return NULL; 2386 } 2387 EXPORT_SYMBOL(ath10k_core_create); 2388 2389 void ath10k_core_destroy(struct ath10k *ar) 2390 { 2391 flush_workqueue(ar->workqueue); 2392 destroy_workqueue(ar->workqueue); 2393 2394 flush_workqueue(ar->workqueue_aux); 2395 destroy_workqueue(ar->workqueue_aux); 2396 2397 ath10k_debug_destroy(ar); 2398 ath10k_htt_tx_destroy(&ar->htt); 2399 ath10k_wmi_free_host_mem(ar); 2400 ath10k_mac_destroy(ar); 2401 } 2402 EXPORT_SYMBOL(ath10k_core_destroy); 2403 2404 MODULE_AUTHOR("Qualcomm Atheros"); 2405 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards."); 2406 MODULE_LICENSE("Dual BSD/GPL"); 2407