1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include <linux/module.h> 19 #include <linux/firmware.h> 20 #include <linux/of.h> 21 #include <linux/dmi.h> 22 #include <linux/ctype.h> 23 #include <asm/byteorder.h> 24 25 #include "core.h" 26 #include "mac.h" 27 #include "htc.h" 28 #include "hif.h" 29 #include "wmi.h" 30 #include "bmi.h" 31 #include "debug.h" 32 #include "htt.h" 33 #include "testmode.h" 34 #include "wmi-ops.h" 35 36 unsigned int ath10k_debug_mask; 37 static unsigned int ath10k_cryptmode_param; 38 static bool uart_print; 39 static bool skip_otp; 40 static bool rawmode; 41 42 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 43 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 44 module_param(uart_print, bool, 0644); 45 module_param(skip_otp, bool, 0644); 46 module_param(rawmode, bool, 0644); 47 48 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 49 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 50 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 51 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 52 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); 53 54 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 55 { 56 .id = QCA988X_HW_2_0_VERSION, 57 .dev_id = QCA988X_2_0_DEVICE_ID, 58 .name = "qca988x hw2.0", 59 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 60 .uart_pin = 7, 61 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 62 .otp_exe_param = 0, 63 .channel_counters_freq_hz = 88000, 64 .max_probe_resp_desc_thres = 0, 65 .cal_data_len = 2116, 66 .fw = { 67 .dir = QCA988X_HW_2_0_FW_DIR, 68 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 69 .board_size = QCA988X_BOARD_DATA_SZ, 70 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 71 }, 72 .hw_ops = &qca988x_ops, 73 .decap_align_bytes = 4, 74 .spectral_bin_discard = 0, 75 .vht160_mcs_rx_highest = 0, 76 .vht160_mcs_tx_highest = 0, 77 }, 78 { 79 .id = QCA9887_HW_1_0_VERSION, 80 .dev_id = QCA9887_1_0_DEVICE_ID, 81 .name = "qca9887 hw1.0", 82 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR, 83 .uart_pin = 7, 84 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 85 .otp_exe_param = 0, 86 .channel_counters_freq_hz = 88000, 87 .max_probe_resp_desc_thres = 0, 88 .cal_data_len = 2116, 89 .fw = { 90 .dir = QCA9887_HW_1_0_FW_DIR, 91 .board = QCA9887_HW_1_0_BOARD_DATA_FILE, 92 .board_size = QCA9887_BOARD_DATA_SZ, 93 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ, 94 }, 95 .hw_ops = &qca988x_ops, 96 .decap_align_bytes = 4, 97 .spectral_bin_discard = 0, 98 .vht160_mcs_rx_highest = 0, 99 .vht160_mcs_tx_highest = 0, 100 }, 101 { 102 .id = QCA6174_HW_2_1_VERSION, 103 .dev_id = QCA6164_2_1_DEVICE_ID, 104 .name = "qca6164 hw2.1", 105 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 106 .uart_pin = 6, 107 .otp_exe_param = 0, 108 .channel_counters_freq_hz = 88000, 109 .max_probe_resp_desc_thres = 0, 110 .cal_data_len = 8124, 111 .fw = { 112 .dir = QCA6174_HW_2_1_FW_DIR, 113 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 114 .board_size = QCA6174_BOARD_DATA_SZ, 115 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 116 }, 117 .hw_ops = &qca988x_ops, 118 .decap_align_bytes = 4, 119 .spectral_bin_discard = 0, 120 .vht160_mcs_rx_highest = 0, 121 .vht160_mcs_tx_highest = 0, 122 }, 123 { 124 .id = QCA6174_HW_2_1_VERSION, 125 .dev_id = QCA6174_2_1_DEVICE_ID, 126 .name = "qca6174 hw2.1", 127 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 128 .uart_pin = 6, 129 .otp_exe_param = 0, 130 .channel_counters_freq_hz = 88000, 131 .max_probe_resp_desc_thres = 0, 132 .cal_data_len = 8124, 133 .fw = { 134 .dir = QCA6174_HW_2_1_FW_DIR, 135 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 136 .board_size = QCA6174_BOARD_DATA_SZ, 137 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 138 }, 139 .hw_ops = &qca988x_ops, 140 .decap_align_bytes = 4, 141 .spectral_bin_discard = 0, 142 .vht160_mcs_rx_highest = 0, 143 .vht160_mcs_tx_highest = 0, 144 }, 145 { 146 .id = QCA6174_HW_3_0_VERSION, 147 .dev_id = QCA6174_2_1_DEVICE_ID, 148 .name = "qca6174 hw3.0", 149 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 150 .uart_pin = 6, 151 .otp_exe_param = 0, 152 .channel_counters_freq_hz = 88000, 153 .max_probe_resp_desc_thres = 0, 154 .cal_data_len = 8124, 155 .fw = { 156 .dir = QCA6174_HW_3_0_FW_DIR, 157 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 158 .board_size = QCA6174_BOARD_DATA_SZ, 159 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 160 }, 161 .hw_ops = &qca988x_ops, 162 .decap_align_bytes = 4, 163 .spectral_bin_discard = 0, 164 .vht160_mcs_rx_highest = 0, 165 .vht160_mcs_tx_highest = 0, 166 }, 167 { 168 .id = QCA6174_HW_3_2_VERSION, 169 .dev_id = QCA6174_2_1_DEVICE_ID, 170 .name = "qca6174 hw3.2", 171 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 172 .uart_pin = 6, 173 .otp_exe_param = 0, 174 .channel_counters_freq_hz = 88000, 175 .max_probe_resp_desc_thres = 0, 176 .cal_data_len = 8124, 177 .fw = { 178 /* uses same binaries as hw3.0 */ 179 .dir = QCA6174_HW_3_0_FW_DIR, 180 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 181 .board_size = QCA6174_BOARD_DATA_SZ, 182 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 183 }, 184 .hw_ops = &qca6174_ops, 185 .hw_clk = qca6174_clk, 186 .target_cpu_freq = 176000000, 187 .decap_align_bytes = 4, 188 .spectral_bin_discard = 0, 189 .vht160_mcs_rx_highest = 0, 190 .vht160_mcs_tx_highest = 0, 191 }, 192 { 193 .id = QCA99X0_HW_2_0_DEV_VERSION, 194 .dev_id = QCA99X0_2_0_DEVICE_ID, 195 .name = "qca99x0 hw2.0", 196 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 197 .uart_pin = 7, 198 .otp_exe_param = 0x00000700, 199 .continuous_frag_desc = true, 200 .cck_rate_map_rev2 = true, 201 .channel_counters_freq_hz = 150000, 202 .max_probe_resp_desc_thres = 24, 203 .tx_chain_mask = 0xf, 204 .rx_chain_mask = 0xf, 205 .max_spatial_stream = 4, 206 .cal_data_len = 12064, 207 .fw = { 208 .dir = QCA99X0_HW_2_0_FW_DIR, 209 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 210 .board_size = QCA99X0_BOARD_DATA_SZ, 211 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 212 }, 213 .sw_decrypt_mcast_mgmt = true, 214 .hw_ops = &qca99x0_ops, 215 .decap_align_bytes = 1, 216 .spectral_bin_discard = 4, 217 .vht160_mcs_rx_highest = 0, 218 .vht160_mcs_tx_highest = 0, 219 }, 220 { 221 .id = QCA9984_HW_1_0_DEV_VERSION, 222 .dev_id = QCA9984_1_0_DEVICE_ID, 223 .name = "qca9984/qca9994 hw1.0", 224 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR, 225 .uart_pin = 7, 226 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 227 .otp_exe_param = 0x00000700, 228 .continuous_frag_desc = true, 229 .cck_rate_map_rev2 = true, 230 .channel_counters_freq_hz = 150000, 231 .max_probe_resp_desc_thres = 24, 232 .tx_chain_mask = 0xf, 233 .rx_chain_mask = 0xf, 234 .max_spatial_stream = 4, 235 .cal_data_len = 12064, 236 .fw = { 237 .dir = QCA9984_HW_1_0_FW_DIR, 238 .board = QCA9984_HW_1_0_BOARD_DATA_FILE, 239 .board_size = QCA99X0_BOARD_DATA_SZ, 240 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 241 }, 242 .sw_decrypt_mcast_mgmt = true, 243 .hw_ops = &qca99x0_ops, 244 .decap_align_bytes = 1, 245 .spectral_bin_discard = 12, 246 247 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz 248 * or 2x2 160Mhz, long-guard-interval. 249 */ 250 .vht160_mcs_rx_highest = 1560, 251 .vht160_mcs_tx_highest = 1560, 252 }, 253 { 254 .id = QCA9888_HW_2_0_DEV_VERSION, 255 .dev_id = QCA9888_2_0_DEVICE_ID, 256 .name = "qca9888 hw2.0", 257 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR, 258 .uart_pin = 7, 259 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 260 .otp_exe_param = 0x00000700, 261 .continuous_frag_desc = true, 262 .channel_counters_freq_hz = 150000, 263 .max_probe_resp_desc_thres = 24, 264 .tx_chain_mask = 3, 265 .rx_chain_mask = 3, 266 .max_spatial_stream = 2, 267 .cal_data_len = 12064, 268 .fw = { 269 .dir = QCA9888_HW_2_0_FW_DIR, 270 .board = QCA9888_HW_2_0_BOARD_DATA_FILE, 271 .board_size = QCA99X0_BOARD_DATA_SZ, 272 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 273 }, 274 .sw_decrypt_mcast_mgmt = true, 275 .hw_ops = &qca99x0_ops, 276 .decap_align_bytes = 1, 277 .spectral_bin_discard = 12, 278 279 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or 280 * 1x1 160Mhz, long-guard-interval. 281 */ 282 .vht160_mcs_rx_highest = 780, 283 .vht160_mcs_tx_highest = 780, 284 }, 285 { 286 .id = QCA9377_HW_1_0_DEV_VERSION, 287 .dev_id = QCA9377_1_0_DEVICE_ID, 288 .name = "qca9377 hw1.0", 289 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 290 .uart_pin = 6, 291 .otp_exe_param = 0, 292 .channel_counters_freq_hz = 88000, 293 .max_probe_resp_desc_thres = 0, 294 .cal_data_len = 8124, 295 .fw = { 296 .dir = QCA9377_HW_1_0_FW_DIR, 297 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 298 .board_size = QCA9377_BOARD_DATA_SZ, 299 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 300 }, 301 .hw_ops = &qca988x_ops, 302 .decap_align_bytes = 4, 303 .spectral_bin_discard = 0, 304 .vht160_mcs_rx_highest = 0, 305 .vht160_mcs_tx_highest = 0, 306 }, 307 { 308 .id = QCA9377_HW_1_1_DEV_VERSION, 309 .dev_id = QCA9377_1_0_DEVICE_ID, 310 .name = "qca9377 hw1.1", 311 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 312 .uart_pin = 6, 313 .otp_exe_param = 0, 314 .channel_counters_freq_hz = 88000, 315 .max_probe_resp_desc_thres = 0, 316 .cal_data_len = 8124, 317 .fw = { 318 .dir = QCA9377_HW_1_0_FW_DIR, 319 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 320 .board_size = QCA9377_BOARD_DATA_SZ, 321 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 322 }, 323 .hw_ops = &qca6174_ops, 324 .hw_clk = qca6174_clk, 325 .target_cpu_freq = 176000000, 326 .decap_align_bytes = 4, 327 .spectral_bin_discard = 0, 328 .vht160_mcs_rx_highest = 0, 329 .vht160_mcs_tx_highest = 0, 330 }, 331 { 332 .id = QCA4019_HW_1_0_DEV_VERSION, 333 .dev_id = 0, 334 .name = "qca4019 hw1.0", 335 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR, 336 .uart_pin = 7, 337 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 338 .otp_exe_param = 0x0010000, 339 .continuous_frag_desc = true, 340 .cck_rate_map_rev2 = true, 341 .channel_counters_freq_hz = 125000, 342 .max_probe_resp_desc_thres = 24, 343 .tx_chain_mask = 0x3, 344 .rx_chain_mask = 0x3, 345 .max_spatial_stream = 2, 346 .cal_data_len = 12064, 347 .fw = { 348 .dir = QCA4019_HW_1_0_FW_DIR, 349 .board = QCA4019_HW_1_0_BOARD_DATA_FILE, 350 .board_size = QCA4019_BOARD_DATA_SZ, 351 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, 352 }, 353 .sw_decrypt_mcast_mgmt = true, 354 .hw_ops = &qca99x0_ops, 355 .decap_align_bytes = 1, 356 .spectral_bin_discard = 4, 357 .vht160_mcs_rx_highest = 0, 358 .vht160_mcs_tx_highest = 0, 359 }, 360 }; 361 362 static const char *const ath10k_core_fw_feature_str[] = { 363 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 364 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 365 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 366 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 367 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 368 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 369 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 370 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 371 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 372 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 373 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 374 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 375 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", 376 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl", 377 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param", 378 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war", 379 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast", 380 }; 381 382 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 383 size_t buf_len, 384 enum ath10k_fw_features feat) 385 { 386 /* make sure that ath10k_core_fw_feature_str[] gets updated */ 387 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != 388 ATH10K_FW_FEATURE_COUNT); 389 390 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 391 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 392 return scnprintf(buf, buf_len, "bit%d", feat); 393 } 394 395 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 396 } 397 398 void ath10k_core_get_fw_features_str(struct ath10k *ar, 399 char *buf, 400 size_t buf_len) 401 { 402 size_t len = 0; 403 int i; 404 405 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 406 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) { 407 if (len > 0) 408 len += scnprintf(buf + len, buf_len - len, ","); 409 410 len += ath10k_core_get_fw_feature_str(buf + len, 411 buf_len - len, 412 i); 413 } 414 } 415 } 416 417 static void ath10k_send_suspend_complete(struct ath10k *ar) 418 { 419 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 420 421 complete(&ar->target_suspend); 422 } 423 424 static void ath10k_init_sdio(struct ath10k *ar) 425 { 426 u32 param = 0; 427 428 ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256); 429 ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99); 430 ath10k_bmi_read32(ar, hi_acs_flags, ¶m); 431 432 param |= (HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET | 433 HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET | 434 HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE); 435 436 ath10k_bmi_write32(ar, hi_acs_flags, param); 437 } 438 439 static int ath10k_init_configure_target(struct ath10k *ar) 440 { 441 u32 param_host; 442 int ret; 443 444 /* tell target which HTC version it is used*/ 445 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 446 HTC_PROTOCOL_VERSION); 447 if (ret) { 448 ath10k_err(ar, "settings HTC version failed\n"); 449 return ret; 450 } 451 452 /* set the firmware mode to STA/IBSS/AP */ 453 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 454 if (ret) { 455 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 456 return ret; 457 } 458 459 /* TODO following parameters need to be re-visited. */ 460 /* num_device */ 461 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 462 /* Firmware mode */ 463 /* FIXME: Why FW_MODE_AP ??.*/ 464 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 465 /* mac_addr_method */ 466 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 467 /* firmware_bridge */ 468 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 469 /* fwsubmode */ 470 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 471 472 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 473 if (ret) { 474 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 475 return ret; 476 } 477 478 /* We do all byte-swapping on the host */ 479 ret = ath10k_bmi_write32(ar, hi_be, 0); 480 if (ret) { 481 ath10k_err(ar, "setting host CPU BE mode failed\n"); 482 return ret; 483 } 484 485 /* FW descriptor/Data swap flags */ 486 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 487 488 if (ret) { 489 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 490 return ret; 491 } 492 493 /* Some devices have a special sanity check that verifies the PCI 494 * Device ID is written to this host interest var. It is known to be 495 * required to boot QCA6164. 496 */ 497 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 498 ar->dev_id); 499 if (ret) { 500 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 501 return ret; 502 } 503 504 return 0; 505 } 506 507 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 508 const char *dir, 509 const char *file) 510 { 511 char filename[100]; 512 const struct firmware *fw; 513 int ret; 514 515 if (file == NULL) 516 return ERR_PTR(-ENOENT); 517 518 if (dir == NULL) 519 dir = "."; 520 521 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 522 ret = request_firmware_direct(&fw, filename, ar->dev); 523 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n", 524 filename, ret); 525 526 if (ret) 527 return ERR_PTR(ret); 528 529 return fw; 530 } 531 532 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 533 size_t data_len) 534 { 535 u32 board_data_size = ar->hw_params.fw.board_size; 536 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 537 u32 board_ext_data_addr; 538 int ret; 539 540 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 541 if (ret) { 542 ath10k_err(ar, "could not read board ext data addr (%d)\n", 543 ret); 544 return ret; 545 } 546 547 ath10k_dbg(ar, ATH10K_DBG_BOOT, 548 "boot push board extended data addr 0x%x\n", 549 board_ext_data_addr); 550 551 if (board_ext_data_addr == 0) 552 return 0; 553 554 if (data_len != (board_data_size + board_ext_data_size)) { 555 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 556 data_len, board_data_size, board_ext_data_size); 557 return -EINVAL; 558 } 559 560 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 561 data + board_data_size, 562 board_ext_data_size); 563 if (ret) { 564 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 565 return ret; 566 } 567 568 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 569 (board_ext_data_size << 16) | 1); 570 if (ret) { 571 ath10k_err(ar, "could not write board ext data bit (%d)\n", 572 ret); 573 return ret; 574 } 575 576 return 0; 577 } 578 579 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 580 size_t data_len) 581 { 582 u32 board_data_size = ar->hw_params.fw.board_size; 583 u32 address; 584 int ret; 585 586 ret = ath10k_push_board_ext_data(ar, data, data_len); 587 if (ret) { 588 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 589 goto exit; 590 } 591 592 ret = ath10k_bmi_read32(ar, hi_board_data, &address); 593 if (ret) { 594 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 595 goto exit; 596 } 597 598 ret = ath10k_bmi_write_memory(ar, address, data, 599 min_t(u32, board_data_size, 600 data_len)); 601 if (ret) { 602 ath10k_err(ar, "could not write board data (%d)\n", ret); 603 goto exit; 604 } 605 606 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 607 if (ret) { 608 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 609 goto exit; 610 } 611 612 exit: 613 return ret; 614 } 615 616 static int ath10k_download_cal_file(struct ath10k *ar, 617 const struct firmware *file) 618 { 619 int ret; 620 621 if (!file) 622 return -ENOENT; 623 624 if (IS_ERR(file)) 625 return PTR_ERR(file); 626 627 ret = ath10k_download_board_data(ar, file->data, file->size); 628 if (ret) { 629 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 630 return ret; 631 } 632 633 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 634 635 return 0; 636 } 637 638 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name) 639 { 640 struct device_node *node; 641 int data_len; 642 void *data; 643 int ret; 644 645 node = ar->dev->of_node; 646 if (!node) 647 /* Device Tree is optional, don't print any warnings if 648 * there's no node for ath10k. 649 */ 650 return -ENOENT; 651 652 if (!of_get_property(node, dt_name, &data_len)) { 653 /* The calibration data node is optional */ 654 return -ENOENT; 655 } 656 657 if (data_len != ar->hw_params.cal_data_len) { 658 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 659 data_len); 660 ret = -EMSGSIZE; 661 goto out; 662 } 663 664 data = kmalloc(data_len, GFP_KERNEL); 665 if (!data) { 666 ret = -ENOMEM; 667 goto out; 668 } 669 670 ret = of_property_read_u8_array(node, dt_name, data, data_len); 671 if (ret) { 672 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 673 ret); 674 goto out_free; 675 } 676 677 ret = ath10k_download_board_data(ar, data, data_len); 678 if (ret) { 679 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 680 ret); 681 goto out_free; 682 } 683 684 ret = 0; 685 686 out_free: 687 kfree(data); 688 689 out: 690 return ret; 691 } 692 693 static int ath10k_download_cal_eeprom(struct ath10k *ar) 694 { 695 size_t data_len; 696 void *data = NULL; 697 int ret; 698 699 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len); 700 if (ret) { 701 if (ret != -EOPNOTSUPP) 702 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n", 703 ret); 704 goto out_free; 705 } 706 707 ret = ath10k_download_board_data(ar, data, data_len); 708 if (ret) { 709 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n", 710 ret); 711 goto out_free; 712 } 713 714 ret = 0; 715 716 out_free: 717 kfree(data); 718 719 return ret; 720 } 721 722 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) 723 { 724 u32 result, address; 725 u8 board_id, chip_id; 726 int ret, bmi_board_id_param; 727 728 address = ar->hw_params.patch_load_addr; 729 730 if (!ar->normal_mode_fw.fw_file.otp_data || 731 !ar->normal_mode_fw.fw_file.otp_len) { 732 ath10k_warn(ar, 733 "failed to retrieve board id because of invalid otp\n"); 734 return -ENODATA; 735 } 736 737 ath10k_dbg(ar, ATH10K_DBG_BOOT, 738 "boot upload otp to 0x%x len %zd for board id\n", 739 address, ar->normal_mode_fw.fw_file.otp_len); 740 741 ret = ath10k_bmi_fast_download(ar, address, 742 ar->normal_mode_fw.fw_file.otp_data, 743 ar->normal_mode_fw.fw_file.otp_len); 744 if (ret) { 745 ath10k_err(ar, "could not write otp for board id check: %d\n", 746 ret); 747 return ret; 748 } 749 750 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 751 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 752 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID; 753 else 754 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID; 755 756 ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result); 757 if (ret) { 758 ath10k_err(ar, "could not execute otp for board id check: %d\n", 759 ret); 760 return ret; 761 } 762 763 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); 764 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); 765 766 ath10k_dbg(ar, ATH10K_DBG_BOOT, 767 "boot get otp board id result 0x%08x board_id %d chip_id %d\n", 768 result, board_id, chip_id); 769 770 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 || 771 (board_id == 0)) { 772 ath10k_dbg(ar, ATH10K_DBG_BOOT, 773 "board id does not exist in otp, ignore it\n"); 774 return -EOPNOTSUPP; 775 } 776 777 ar->id.bmi_ids_valid = true; 778 ar->id.bmi_board_id = board_id; 779 ar->id.bmi_chip_id = chip_id; 780 781 return 0; 782 } 783 784 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data) 785 { 786 struct ath10k *ar = data; 787 const char *bdf_ext; 788 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC; 789 u8 bdf_enabled; 790 int i; 791 792 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE) 793 return; 794 795 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) { 796 ath10k_dbg(ar, ATH10K_DBG_BOOT, 797 "wrong smbios bdf ext type length (%d).\n", 798 hdr->length); 799 return; 800 } 801 802 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET); 803 if (!bdf_enabled) { 804 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n"); 805 return; 806 } 807 808 /* Only one string exists (per spec) */ 809 bdf_ext = (char *)hdr + hdr->length; 810 811 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) { 812 ath10k_dbg(ar, ATH10K_DBG_BOOT, 813 "bdf variant magic does not match.\n"); 814 return; 815 } 816 817 for (i = 0; i < strlen(bdf_ext); i++) { 818 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) { 819 ath10k_dbg(ar, ATH10K_DBG_BOOT, 820 "bdf variant name contains non ascii chars.\n"); 821 return; 822 } 823 } 824 825 /* Copy extension name without magic suffix */ 826 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic), 827 sizeof(ar->id.bdf_ext)) < 0) { 828 ath10k_dbg(ar, ATH10K_DBG_BOOT, 829 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 830 bdf_ext); 831 return; 832 } 833 834 ath10k_dbg(ar, ATH10K_DBG_BOOT, 835 "found and validated bdf variant smbios_type 0x%x bdf %s\n", 836 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext); 837 } 838 839 static int ath10k_core_check_smbios(struct ath10k *ar) 840 { 841 ar->id.bdf_ext[0] = '\0'; 842 dmi_walk(ath10k_core_check_bdfext, ar); 843 844 if (ar->id.bdf_ext[0] == '\0') 845 return -ENODATA; 846 847 return 0; 848 } 849 850 static int ath10k_download_and_run_otp(struct ath10k *ar) 851 { 852 u32 result, address = ar->hw_params.patch_load_addr; 853 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 854 int ret; 855 856 ret = ath10k_download_board_data(ar, 857 ar->running_fw->board_data, 858 ar->running_fw->board_len); 859 if (ret) { 860 ath10k_err(ar, "failed to download board data: %d\n", ret); 861 return ret; 862 } 863 864 /* OTP is optional */ 865 866 if (!ar->running_fw->fw_file.otp_data || 867 !ar->running_fw->fw_file.otp_len) { 868 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n", 869 ar->running_fw->fw_file.otp_data, 870 ar->running_fw->fw_file.otp_len); 871 return 0; 872 } 873 874 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 875 address, ar->running_fw->fw_file.otp_len); 876 877 ret = ath10k_bmi_fast_download(ar, address, 878 ar->running_fw->fw_file.otp_data, 879 ar->running_fw->fw_file.otp_len); 880 if (ret) { 881 ath10k_err(ar, "could not write otp (%d)\n", ret); 882 return ret; 883 } 884 885 /* As of now pre-cal is valid for 10_4 variants */ 886 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 887 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 888 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL; 889 890 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 891 if (ret) { 892 ath10k_err(ar, "could not execute otp (%d)\n", ret); 893 return ret; 894 } 895 896 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 897 898 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 899 ar->running_fw->fw_file.fw_features)) && 900 result != 0) { 901 ath10k_err(ar, "otp calibration failed: %d", result); 902 return -EINVAL; 903 } 904 905 return 0; 906 } 907 908 static int ath10k_download_fw(struct ath10k *ar) 909 { 910 u32 address, data_len; 911 const void *data; 912 int ret; 913 914 address = ar->hw_params.patch_load_addr; 915 916 data = ar->running_fw->fw_file.firmware_data; 917 data_len = ar->running_fw->fw_file.firmware_len; 918 919 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file); 920 if (ret) { 921 ath10k_err(ar, "failed to configure fw code swap: %d\n", 922 ret); 923 return ret; 924 } 925 926 ath10k_dbg(ar, ATH10K_DBG_BOOT, 927 "boot uploading firmware image %pK len %d\n", 928 data, data_len); 929 930 ret = ath10k_bmi_fast_download(ar, address, data, data_len); 931 if (ret) { 932 ath10k_err(ar, "failed to download firmware: %d\n", 933 ret); 934 return ret; 935 } 936 937 return ret; 938 } 939 940 static void ath10k_core_free_board_files(struct ath10k *ar) 941 { 942 if (!IS_ERR(ar->normal_mode_fw.board)) 943 release_firmware(ar->normal_mode_fw.board); 944 945 ar->normal_mode_fw.board = NULL; 946 ar->normal_mode_fw.board_data = NULL; 947 ar->normal_mode_fw.board_len = 0; 948 } 949 950 static void ath10k_core_free_firmware_files(struct ath10k *ar) 951 { 952 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware)) 953 release_firmware(ar->normal_mode_fw.fw_file.firmware); 954 955 if (!IS_ERR(ar->cal_file)) 956 release_firmware(ar->cal_file); 957 958 if (!IS_ERR(ar->pre_cal_file)) 959 release_firmware(ar->pre_cal_file); 960 961 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file); 962 963 ar->normal_mode_fw.fw_file.otp_data = NULL; 964 ar->normal_mode_fw.fw_file.otp_len = 0; 965 966 ar->normal_mode_fw.fw_file.firmware = NULL; 967 ar->normal_mode_fw.fw_file.firmware_data = NULL; 968 ar->normal_mode_fw.fw_file.firmware_len = 0; 969 970 ar->cal_file = NULL; 971 ar->pre_cal_file = NULL; 972 } 973 974 static int ath10k_fetch_cal_file(struct ath10k *ar) 975 { 976 char filename[100]; 977 978 /* pre-cal-<bus>-<id>.bin */ 979 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin", 980 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 981 982 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 983 if (!IS_ERR(ar->pre_cal_file)) 984 goto success; 985 986 /* cal-<bus>-<id>.bin */ 987 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 988 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 989 990 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 991 if (IS_ERR(ar->cal_file)) 992 /* calibration file is optional, don't print any warnings */ 993 return PTR_ERR(ar->cal_file); 994 success: 995 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 996 ATH10K_FW_DIR, filename); 997 998 return 0; 999 } 1000 1001 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar) 1002 { 1003 if (!ar->hw_params.fw.board) { 1004 ath10k_err(ar, "failed to find board file fw entry\n"); 1005 return -EINVAL; 1006 } 1007 1008 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1009 ar->hw_params.fw.dir, 1010 ar->hw_params.fw.board); 1011 if (IS_ERR(ar->normal_mode_fw.board)) 1012 return PTR_ERR(ar->normal_mode_fw.board); 1013 1014 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data; 1015 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size; 1016 1017 return 0; 1018 } 1019 1020 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, 1021 const void *buf, size_t buf_len, 1022 const char *boardname) 1023 { 1024 const struct ath10k_fw_ie *hdr; 1025 bool name_match_found; 1026 int ret, board_ie_id; 1027 size_t board_ie_len; 1028 const void *board_ie_data; 1029 1030 name_match_found = false; 1031 1032 /* go through ATH10K_BD_IE_BOARD_ elements */ 1033 while (buf_len > sizeof(struct ath10k_fw_ie)) { 1034 hdr = buf; 1035 board_ie_id = le32_to_cpu(hdr->id); 1036 board_ie_len = le32_to_cpu(hdr->len); 1037 board_ie_data = hdr->data; 1038 1039 buf_len -= sizeof(*hdr); 1040 buf += sizeof(*hdr); 1041 1042 if (buf_len < ALIGN(board_ie_len, 4)) { 1043 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", 1044 buf_len, ALIGN(board_ie_len, 4)); 1045 ret = -EINVAL; 1046 goto out; 1047 } 1048 1049 switch (board_ie_id) { 1050 case ATH10K_BD_IE_BOARD_NAME: 1051 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", 1052 board_ie_data, board_ie_len); 1053 1054 if (board_ie_len != strlen(boardname)) 1055 break; 1056 1057 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 1058 if (ret) 1059 break; 1060 1061 name_match_found = true; 1062 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1063 "boot found match for name '%s'", 1064 boardname); 1065 break; 1066 case ATH10K_BD_IE_BOARD_DATA: 1067 if (!name_match_found) 1068 /* no match found */ 1069 break; 1070 1071 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1072 "boot found board data for '%s'", 1073 boardname); 1074 1075 ar->normal_mode_fw.board_data = board_ie_data; 1076 ar->normal_mode_fw.board_len = board_ie_len; 1077 1078 ret = 0; 1079 goto out; 1080 default: 1081 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", 1082 board_ie_id); 1083 break; 1084 } 1085 1086 /* jump over the padding */ 1087 board_ie_len = ALIGN(board_ie_len, 4); 1088 1089 buf_len -= board_ie_len; 1090 buf += board_ie_len; 1091 } 1092 1093 /* no match found */ 1094 ret = -ENOENT; 1095 1096 out: 1097 return ret; 1098 } 1099 1100 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, 1101 const char *boardname, 1102 const char *filename) 1103 { 1104 size_t len, magic_len, ie_len; 1105 struct ath10k_fw_ie *hdr; 1106 const u8 *data; 1107 int ret, ie_id; 1108 1109 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1110 ar->hw_params.fw.dir, 1111 filename); 1112 if (IS_ERR(ar->normal_mode_fw.board)) 1113 return PTR_ERR(ar->normal_mode_fw.board); 1114 1115 data = ar->normal_mode_fw.board->data; 1116 len = ar->normal_mode_fw.board->size; 1117 1118 /* magic has extra null byte padded */ 1119 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; 1120 if (len < magic_len) { 1121 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", 1122 ar->hw_params.fw.dir, filename, len); 1123 ret = -EINVAL; 1124 goto err; 1125 } 1126 1127 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { 1128 ath10k_err(ar, "found invalid board magic\n"); 1129 ret = -EINVAL; 1130 goto err; 1131 } 1132 1133 /* magic is padded to 4 bytes */ 1134 magic_len = ALIGN(magic_len, 4); 1135 if (len < magic_len) { 1136 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", 1137 ar->hw_params.fw.dir, filename, len); 1138 ret = -EINVAL; 1139 goto err; 1140 } 1141 1142 data += magic_len; 1143 len -= magic_len; 1144 1145 while (len > sizeof(struct ath10k_fw_ie)) { 1146 hdr = (struct ath10k_fw_ie *)data; 1147 ie_id = le32_to_cpu(hdr->id); 1148 ie_len = le32_to_cpu(hdr->len); 1149 1150 len -= sizeof(*hdr); 1151 data = hdr->data; 1152 1153 if (len < ALIGN(ie_len, 4)) { 1154 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", 1155 ie_id, ie_len, len); 1156 ret = -EINVAL; 1157 goto err; 1158 } 1159 1160 switch (ie_id) { 1161 case ATH10K_BD_IE_BOARD: 1162 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1163 boardname); 1164 if (ret == -ENOENT && ar->id.bdf_ext[0] != '\0') { 1165 /* try default bdf if variant was not found */ 1166 char *s, *v = ",variant="; 1167 char boardname2[100]; 1168 1169 strlcpy(boardname2, boardname, 1170 sizeof(boardname2)); 1171 1172 s = strstr(boardname2, v); 1173 if (s) 1174 *s = '\0'; /* strip ",variant=%s" */ 1175 1176 ret = ath10k_core_parse_bd_ie_board(ar, data, 1177 ie_len, 1178 boardname2); 1179 } 1180 1181 if (ret == -ENOENT) 1182 /* no match found, continue */ 1183 break; 1184 else if (ret) 1185 /* there was an error, bail out */ 1186 goto err; 1187 1188 /* board data found */ 1189 goto out; 1190 } 1191 1192 /* jump over the padding */ 1193 ie_len = ALIGN(ie_len, 4); 1194 1195 len -= ie_len; 1196 data += ie_len; 1197 } 1198 1199 out: 1200 if (!ar->normal_mode_fw.board_data || !ar->normal_mode_fw.board_len) { 1201 ath10k_err(ar, 1202 "failed to fetch board data for %s from %s/%s\n", 1203 boardname, ar->hw_params.fw.dir, filename); 1204 ret = -ENODATA; 1205 goto err; 1206 } 1207 1208 return 0; 1209 1210 err: 1211 ath10k_core_free_board_files(ar); 1212 return ret; 1213 } 1214 1215 static int ath10k_core_create_board_name(struct ath10k *ar, char *name, 1216 size_t name_len) 1217 { 1218 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */ 1219 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 }; 1220 1221 if (ar->id.bmi_ids_valid) { 1222 scnprintf(name, name_len, 1223 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d", 1224 ath10k_bus_str(ar->hif.bus), 1225 ar->id.bmi_chip_id, 1226 ar->id.bmi_board_id); 1227 goto out; 1228 } 1229 1230 if (ar->id.bdf_ext[0] != '\0') 1231 scnprintf(variant, sizeof(variant), ",variant=%s", 1232 ar->id.bdf_ext); 1233 1234 scnprintf(name, name_len, 1235 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s", 1236 ath10k_bus_str(ar->hif.bus), 1237 ar->id.vendor, ar->id.device, 1238 ar->id.subsystem_vendor, ar->id.subsystem_device, variant); 1239 out: 1240 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); 1241 1242 return 0; 1243 } 1244 1245 static int ath10k_core_fetch_board_file(struct ath10k *ar) 1246 { 1247 char boardname[100]; 1248 int ret; 1249 1250 ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname)); 1251 if (ret) { 1252 ath10k_err(ar, "failed to create board name: %d", ret); 1253 return ret; 1254 } 1255 1256 ar->bd_api = 2; 1257 ret = ath10k_core_fetch_board_data_api_n(ar, boardname, 1258 ATH10K_BOARD_API2_FILE); 1259 if (!ret) 1260 goto success; 1261 1262 ar->bd_api = 1; 1263 ret = ath10k_core_fetch_board_data_api_1(ar); 1264 if (ret) { 1265 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n", 1266 ar->hw_params.fw.dir); 1267 return ret; 1268 } 1269 1270 success: 1271 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); 1272 return 0; 1273 } 1274 1275 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1276 struct ath10k_fw_file *fw_file) 1277 { 1278 size_t magic_len, len, ie_len; 1279 int ie_id, i, index, bit, ret; 1280 struct ath10k_fw_ie *hdr; 1281 const u8 *data; 1282 __le32 *timestamp, *version; 1283 1284 /* first fetch the firmware file (firmware-*.bin) */ 1285 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1286 name); 1287 if (IS_ERR(fw_file->firmware)) 1288 return PTR_ERR(fw_file->firmware); 1289 1290 data = fw_file->firmware->data; 1291 len = fw_file->firmware->size; 1292 1293 /* magic also includes the null byte, check that as well */ 1294 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 1295 1296 if (len < magic_len) { 1297 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 1298 ar->hw_params.fw.dir, name, len); 1299 ret = -EINVAL; 1300 goto err; 1301 } 1302 1303 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 1304 ath10k_err(ar, "invalid firmware magic\n"); 1305 ret = -EINVAL; 1306 goto err; 1307 } 1308 1309 /* jump over the padding */ 1310 magic_len = ALIGN(magic_len, 4); 1311 1312 len -= magic_len; 1313 data += magic_len; 1314 1315 /* loop elements */ 1316 while (len > sizeof(struct ath10k_fw_ie)) { 1317 hdr = (struct ath10k_fw_ie *)data; 1318 1319 ie_id = le32_to_cpu(hdr->id); 1320 ie_len = le32_to_cpu(hdr->len); 1321 1322 len -= sizeof(*hdr); 1323 data += sizeof(*hdr); 1324 1325 if (len < ie_len) { 1326 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 1327 ie_id, len, ie_len); 1328 ret = -EINVAL; 1329 goto err; 1330 } 1331 1332 switch (ie_id) { 1333 case ATH10K_FW_IE_FW_VERSION: 1334 if (ie_len > sizeof(fw_file->fw_version) - 1) 1335 break; 1336 1337 memcpy(fw_file->fw_version, data, ie_len); 1338 fw_file->fw_version[ie_len] = '\0'; 1339 1340 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1341 "found fw version %s\n", 1342 fw_file->fw_version); 1343 break; 1344 case ATH10K_FW_IE_TIMESTAMP: 1345 if (ie_len != sizeof(u32)) 1346 break; 1347 1348 timestamp = (__le32 *)data; 1349 1350 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 1351 le32_to_cpup(timestamp)); 1352 break; 1353 case ATH10K_FW_IE_FEATURES: 1354 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1355 "found firmware features ie (%zd B)\n", 1356 ie_len); 1357 1358 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 1359 index = i / 8; 1360 bit = i % 8; 1361 1362 if (index == ie_len) 1363 break; 1364 1365 if (data[index] & (1 << bit)) { 1366 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1367 "Enabling feature bit: %i\n", 1368 i); 1369 __set_bit(i, fw_file->fw_features); 1370 } 1371 } 1372 1373 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 1374 fw_file->fw_features, 1375 sizeof(fw_file->fw_features)); 1376 break; 1377 case ATH10K_FW_IE_FW_IMAGE: 1378 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1379 "found fw image ie (%zd B)\n", 1380 ie_len); 1381 1382 fw_file->firmware_data = data; 1383 fw_file->firmware_len = ie_len; 1384 1385 break; 1386 case ATH10K_FW_IE_OTP_IMAGE: 1387 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1388 "found otp image ie (%zd B)\n", 1389 ie_len); 1390 1391 fw_file->otp_data = data; 1392 fw_file->otp_len = ie_len; 1393 1394 break; 1395 case ATH10K_FW_IE_WMI_OP_VERSION: 1396 if (ie_len != sizeof(u32)) 1397 break; 1398 1399 version = (__le32 *)data; 1400 1401 fw_file->wmi_op_version = le32_to_cpup(version); 1402 1403 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 1404 fw_file->wmi_op_version); 1405 break; 1406 case ATH10K_FW_IE_HTT_OP_VERSION: 1407 if (ie_len != sizeof(u32)) 1408 break; 1409 1410 version = (__le32 *)data; 1411 1412 fw_file->htt_op_version = le32_to_cpup(version); 1413 1414 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 1415 fw_file->htt_op_version); 1416 break; 1417 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 1418 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1419 "found fw code swap image ie (%zd B)\n", 1420 ie_len); 1421 fw_file->codeswap_data = data; 1422 fw_file->codeswap_len = ie_len; 1423 break; 1424 default: 1425 ath10k_warn(ar, "Unknown FW IE: %u\n", 1426 le32_to_cpu(hdr->id)); 1427 break; 1428 } 1429 1430 /* jump over the padding */ 1431 ie_len = ALIGN(ie_len, 4); 1432 1433 len -= ie_len; 1434 data += ie_len; 1435 } 1436 1437 if (!fw_file->firmware_data || 1438 !fw_file->firmware_len) { 1439 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 1440 ar->hw_params.fw.dir, name); 1441 ret = -ENOMEDIUM; 1442 goto err; 1443 } 1444 1445 return 0; 1446 1447 err: 1448 ath10k_core_free_firmware_files(ar); 1449 return ret; 1450 } 1451 1452 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name, 1453 size_t fw_name_len, int fw_api) 1454 { 1455 switch (ar->hif.bus) { 1456 case ATH10K_BUS_SDIO: 1457 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin", 1458 ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus), 1459 fw_api); 1460 break; 1461 case ATH10K_BUS_PCI: 1462 case ATH10K_BUS_AHB: 1463 scnprintf(fw_name, fw_name_len, "%s-%d.bin", 1464 ATH10K_FW_FILE_BASE, fw_api); 1465 break; 1466 } 1467 } 1468 1469 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 1470 { 1471 int ret, i; 1472 char fw_name[100]; 1473 1474 /* calibration file is optional, don't check for any errors */ 1475 ath10k_fetch_cal_file(ar); 1476 1477 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) { 1478 ar->fw_api = i; 1479 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", 1480 ar->fw_api); 1481 1482 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api); 1483 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name, 1484 &ar->normal_mode_fw.fw_file); 1485 if (!ret) 1486 goto success; 1487 } 1488 1489 /* we end up here if we couldn't fetch any firmware */ 1490 1491 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d", 1492 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir, 1493 ret); 1494 1495 return ret; 1496 1497 success: 1498 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1499 1500 return 0; 1501 } 1502 1503 static int ath10k_core_pre_cal_download(struct ath10k *ar) 1504 { 1505 int ret; 1506 1507 ret = ath10k_download_cal_file(ar, ar->pre_cal_file); 1508 if (ret == 0) { 1509 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE; 1510 goto success; 1511 } 1512 1513 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1514 "boot did not find a pre calibration file, try DT next: %d\n", 1515 ret); 1516 1517 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data"); 1518 if (ret) { 1519 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1520 "unable to load pre cal data from DT: %d\n", ret); 1521 return ret; 1522 } 1523 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT; 1524 1525 success: 1526 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1527 ath10k_cal_mode_str(ar->cal_mode)); 1528 1529 return 0; 1530 } 1531 1532 static int ath10k_core_pre_cal_config(struct ath10k *ar) 1533 { 1534 int ret; 1535 1536 ret = ath10k_core_pre_cal_download(ar); 1537 if (ret) { 1538 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1539 "failed to load pre cal data: %d\n", ret); 1540 return ret; 1541 } 1542 1543 ret = ath10k_core_get_board_id_from_otp(ar); 1544 if (ret) { 1545 ath10k_err(ar, "failed to get board id: %d\n", ret); 1546 return ret; 1547 } 1548 1549 ret = ath10k_download_and_run_otp(ar); 1550 if (ret) { 1551 ath10k_err(ar, "failed to run otp: %d\n", ret); 1552 return ret; 1553 } 1554 1555 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1556 "pre cal configuration done successfully\n"); 1557 1558 return 0; 1559 } 1560 1561 static int ath10k_download_cal_data(struct ath10k *ar) 1562 { 1563 int ret; 1564 1565 ret = ath10k_core_pre_cal_config(ar); 1566 if (ret == 0) 1567 return 0; 1568 1569 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1570 "pre cal download procedure failed, try cal file: %d\n", 1571 ret); 1572 1573 ret = ath10k_download_cal_file(ar, ar->cal_file); 1574 if (ret == 0) { 1575 ar->cal_mode = ATH10K_CAL_MODE_FILE; 1576 goto done; 1577 } 1578 1579 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1580 "boot did not find a calibration file, try DT next: %d\n", 1581 ret); 1582 1583 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data"); 1584 if (ret == 0) { 1585 ar->cal_mode = ATH10K_CAL_MODE_DT; 1586 goto done; 1587 } 1588 1589 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1590 "boot did not find DT entry, try target EEPROM next: %d\n", 1591 ret); 1592 1593 ret = ath10k_download_cal_eeprom(ar); 1594 if (ret == 0) { 1595 ar->cal_mode = ATH10K_CAL_MODE_EEPROM; 1596 goto done; 1597 } 1598 1599 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1600 "boot did not find target EEPROM entry, try OTP next: %d\n", 1601 ret); 1602 1603 ret = ath10k_download_and_run_otp(ar); 1604 if (ret) { 1605 ath10k_err(ar, "failed to run otp: %d\n", ret); 1606 return ret; 1607 } 1608 1609 ar->cal_mode = ATH10K_CAL_MODE_OTP; 1610 1611 done: 1612 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1613 ath10k_cal_mode_str(ar->cal_mode)); 1614 return 0; 1615 } 1616 1617 static int ath10k_init_uart(struct ath10k *ar) 1618 { 1619 int ret; 1620 1621 /* 1622 * Explicitly setting UART prints to zero as target turns it on 1623 * based on scratch registers. 1624 */ 1625 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 1626 if (ret) { 1627 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 1628 return ret; 1629 } 1630 1631 if (!uart_print) 1632 return 0; 1633 1634 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 1635 if (ret) { 1636 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1637 return ret; 1638 } 1639 1640 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 1641 if (ret) { 1642 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1643 return ret; 1644 } 1645 1646 /* Set the UART baud rate to 19200. */ 1647 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 1648 if (ret) { 1649 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 1650 return ret; 1651 } 1652 1653 ath10k_info(ar, "UART prints enabled\n"); 1654 return 0; 1655 } 1656 1657 static int ath10k_init_hw_params(struct ath10k *ar) 1658 { 1659 const struct ath10k_hw_params *uninitialized_var(hw_params); 1660 int i; 1661 1662 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 1663 hw_params = &ath10k_hw_params_list[i]; 1664 1665 if (hw_params->id == ar->target_version && 1666 hw_params->dev_id == ar->dev_id) 1667 break; 1668 } 1669 1670 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 1671 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 1672 ar->target_version); 1673 return -EINVAL; 1674 } 1675 1676 ar->hw_params = *hw_params; 1677 1678 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 1679 ar->hw_params.name, ar->target_version); 1680 1681 return 0; 1682 } 1683 1684 static void ath10k_core_restart(struct work_struct *work) 1685 { 1686 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 1687 int ret; 1688 1689 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1690 1691 /* Place a barrier to make sure the compiler doesn't reorder 1692 * CRASH_FLUSH and calling other functions. 1693 */ 1694 barrier(); 1695 1696 ieee80211_stop_queues(ar->hw); 1697 ath10k_drain_tx(ar); 1698 complete(&ar->scan.started); 1699 complete(&ar->scan.completed); 1700 complete(&ar->scan.on_channel); 1701 complete(&ar->offchan_tx_completed); 1702 complete(&ar->install_key_done); 1703 complete(&ar->vdev_setup_done); 1704 complete(&ar->thermal.wmi_sync); 1705 complete(&ar->bss_survey_done); 1706 wake_up(&ar->htt.empty_tx_wq); 1707 wake_up(&ar->wmi.tx_credits_wq); 1708 wake_up(&ar->peer_mapping_wq); 1709 1710 /* TODO: We can have one instance of cancelling coverage_class_work by 1711 * moving it to ath10k_halt(), so that both stop() and restart() would 1712 * call that but it takes conf_mutex() and if we call cancel_work_sync() 1713 * with conf_mutex it will deadlock. 1714 */ 1715 cancel_work_sync(&ar->set_coverage_class_work); 1716 1717 mutex_lock(&ar->conf_mutex); 1718 1719 switch (ar->state) { 1720 case ATH10K_STATE_ON: 1721 ar->state = ATH10K_STATE_RESTARTING; 1722 ath10k_halt(ar); 1723 ath10k_scan_finish(ar); 1724 ieee80211_restart_hw(ar->hw); 1725 break; 1726 case ATH10K_STATE_OFF: 1727 /* this can happen if driver is being unloaded 1728 * or if the crash happens during FW probing 1729 */ 1730 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 1731 break; 1732 case ATH10K_STATE_RESTARTING: 1733 /* hw restart might be requested from multiple places */ 1734 break; 1735 case ATH10K_STATE_RESTARTED: 1736 ar->state = ATH10K_STATE_WEDGED; 1737 /* fall through */ 1738 case ATH10K_STATE_WEDGED: 1739 ath10k_warn(ar, "device is wedged, will not restart\n"); 1740 break; 1741 case ATH10K_STATE_UTF: 1742 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 1743 break; 1744 } 1745 1746 mutex_unlock(&ar->conf_mutex); 1747 1748 ret = ath10k_debug_fw_devcoredump(ar); 1749 if (ret) 1750 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d", 1751 ret); 1752 } 1753 1754 static void ath10k_core_set_coverage_class_work(struct work_struct *work) 1755 { 1756 struct ath10k *ar = container_of(work, struct ath10k, 1757 set_coverage_class_work); 1758 1759 if (ar->hw_params.hw_ops->set_coverage_class) 1760 ar->hw_params.hw_ops->set_coverage_class(ar, -1); 1761 } 1762 1763 static int ath10k_core_init_firmware_features(struct ath10k *ar) 1764 { 1765 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 1766 1767 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) && 1768 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 1769 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 1770 return -EINVAL; 1771 } 1772 1773 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 1774 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 1775 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version); 1776 return -EINVAL; 1777 } 1778 1779 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 1780 switch (ath10k_cryptmode_param) { 1781 case ATH10K_CRYPT_MODE_HW: 1782 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1783 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1784 break; 1785 case ATH10K_CRYPT_MODE_SW: 1786 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1787 fw_file->fw_features)) { 1788 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 1789 return -EINVAL; 1790 } 1791 1792 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1793 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1794 break; 1795 default: 1796 ath10k_info(ar, "invalid cryptmode: %d\n", 1797 ath10k_cryptmode_param); 1798 return -EINVAL; 1799 } 1800 1801 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 1802 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 1803 1804 if (rawmode) { 1805 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1806 fw_file->fw_features)) { 1807 ath10k_err(ar, "rawmode = 1 requires support from firmware"); 1808 return -EINVAL; 1809 } 1810 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1811 } 1812 1813 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 1814 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 1815 1816 /* Workaround: 1817 * 1818 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 1819 * and causes enormous performance issues (malformed frames, 1820 * etc). 1821 * 1822 * Disabling A-MSDU makes RAW mode stable with heavy traffic 1823 * albeit a bit slower compared to regular operation. 1824 */ 1825 ar->htt.max_num_amsdu = 1; 1826 } 1827 1828 /* Backwards compatibility for firmwares without 1829 * ATH10K_FW_IE_WMI_OP_VERSION. 1830 */ 1831 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 1832 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 1833 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 1834 fw_file->fw_features)) 1835 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 1836 else 1837 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 1838 } else { 1839 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 1840 } 1841 } 1842 1843 switch (fw_file->wmi_op_version) { 1844 case ATH10K_FW_WMI_OP_VERSION_MAIN: 1845 ar->max_num_peers = TARGET_NUM_PEERS; 1846 ar->max_num_stations = TARGET_NUM_STATIONS; 1847 ar->max_num_vdevs = TARGET_NUM_VDEVS; 1848 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 1849 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1850 WMI_STAT_PEER; 1851 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1852 break; 1853 case ATH10K_FW_WMI_OP_VERSION_10_1: 1854 case ATH10K_FW_WMI_OP_VERSION_10_2: 1855 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 1856 if (ath10k_peer_stats_enabled(ar)) { 1857 ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS; 1858 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS; 1859 } else { 1860 ar->max_num_peers = TARGET_10X_NUM_PEERS; 1861 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 1862 } 1863 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 1864 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 1865 ar->fw_stats_req_mask = WMI_STAT_PEER; 1866 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1867 break; 1868 case ATH10K_FW_WMI_OP_VERSION_TLV: 1869 ar->max_num_peers = TARGET_TLV_NUM_PEERS; 1870 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 1871 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 1872 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 1873 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 1874 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 1875 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1876 WMI_STAT_PEER; 1877 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1878 break; 1879 case ATH10K_FW_WMI_OP_VERSION_10_4: 1880 ar->max_num_peers = TARGET_10_4_NUM_PEERS; 1881 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 1882 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 1883 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 1884 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 1885 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER | 1886 WMI_10_4_STAT_PEER_EXTD; 1887 ar->max_spatial_stream = ar->hw_params.max_spatial_stream; 1888 1889 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, 1890 fw_file->fw_features)) 1891 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC; 1892 else 1893 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 1894 break; 1895 case ATH10K_FW_WMI_OP_VERSION_UNSET: 1896 case ATH10K_FW_WMI_OP_VERSION_MAX: 1897 WARN_ON(1); 1898 return -EINVAL; 1899 } 1900 1901 /* Backwards compatibility for firmwares without 1902 * ATH10K_FW_IE_HTT_OP_VERSION. 1903 */ 1904 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 1905 switch (fw_file->wmi_op_version) { 1906 case ATH10K_FW_WMI_OP_VERSION_MAIN: 1907 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 1908 break; 1909 case ATH10K_FW_WMI_OP_VERSION_10_1: 1910 case ATH10K_FW_WMI_OP_VERSION_10_2: 1911 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 1912 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 1913 break; 1914 case ATH10K_FW_WMI_OP_VERSION_TLV: 1915 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 1916 break; 1917 case ATH10K_FW_WMI_OP_VERSION_10_4: 1918 case ATH10K_FW_WMI_OP_VERSION_UNSET: 1919 case ATH10K_FW_WMI_OP_VERSION_MAX: 1920 ath10k_err(ar, "htt op version not found from fw meta data"); 1921 return -EINVAL; 1922 } 1923 } 1924 1925 return 0; 1926 } 1927 1928 static int ath10k_core_reset_rx_filter(struct ath10k *ar) 1929 { 1930 int ret; 1931 int vdev_id; 1932 int vdev_type; 1933 int vdev_subtype; 1934 const u8 *vdev_addr; 1935 1936 vdev_id = 0; 1937 vdev_type = WMI_VDEV_TYPE_STA; 1938 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE); 1939 vdev_addr = ar->mac_addr; 1940 1941 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype, 1942 vdev_addr); 1943 if (ret) { 1944 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret); 1945 return ret; 1946 } 1947 1948 ret = ath10k_wmi_vdev_delete(ar, vdev_id); 1949 if (ret) { 1950 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret); 1951 return ret; 1952 } 1953 1954 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be 1955 * serialized properly implicitly. 1956 * 1957 * Moreover (most) WMI commands have no explicit acknowledges. It is 1958 * possible to infer it implicitly by poking firmware with echo 1959 * command - getting a reply means all preceding comments have been 1960 * (mostly) processed. 1961 * 1962 * In case of vdev create/delete this is sufficient. 1963 * 1964 * Without this it's possible to end up with a race when HTT Rx ring is 1965 * started before vdev create/delete hack is complete allowing a short 1966 * window of opportunity to receive (and Tx ACK) a bunch of frames. 1967 */ 1968 ret = ath10k_wmi_barrier(ar); 1969 if (ret) { 1970 ath10k_err(ar, "failed to ping firmware: %d\n", ret); 1971 return ret; 1972 } 1973 1974 return 0; 1975 } 1976 1977 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 1978 const struct ath10k_fw_components *fw) 1979 { 1980 int status; 1981 u32 val; 1982 1983 lockdep_assert_held(&ar->conf_mutex); 1984 1985 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1986 1987 ar->running_fw = fw; 1988 1989 ath10k_bmi_start(ar); 1990 1991 if (ath10k_init_configure_target(ar)) { 1992 status = -EINVAL; 1993 goto err; 1994 } 1995 1996 status = ath10k_download_cal_data(ar); 1997 if (status) 1998 goto err; 1999 2000 /* Some of of qca988x solutions are having global reset issue 2001 * during target initialization. Bypassing PLL setting before 2002 * downloading firmware and letting the SoC run on REF_CLK is 2003 * fixing the problem. Corresponding firmware change is also needed 2004 * to set the clock source once the target is initialized. 2005 */ 2006 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 2007 ar->running_fw->fw_file.fw_features)) { 2008 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 2009 if (status) { 2010 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 2011 status); 2012 goto err; 2013 } 2014 } 2015 2016 status = ath10k_download_fw(ar); 2017 if (status) 2018 goto err; 2019 2020 status = ath10k_init_uart(ar); 2021 if (status) 2022 goto err; 2023 2024 if (ar->hif.bus == ATH10K_BUS_SDIO) 2025 ath10k_init_sdio(ar); 2026 2027 ar->htc.htc_ops.target_send_suspend_complete = 2028 ath10k_send_suspend_complete; 2029 2030 status = ath10k_htc_init(ar); 2031 if (status) { 2032 ath10k_err(ar, "could not init HTC (%d)\n", status); 2033 goto err; 2034 } 2035 2036 status = ath10k_bmi_done(ar); 2037 if (status) 2038 goto err; 2039 2040 status = ath10k_wmi_attach(ar); 2041 if (status) { 2042 ath10k_err(ar, "WMI attach failed: %d\n", status); 2043 goto err; 2044 } 2045 2046 status = ath10k_htt_init(ar); 2047 if (status) { 2048 ath10k_err(ar, "failed to init htt: %d\n", status); 2049 goto err_wmi_detach; 2050 } 2051 2052 status = ath10k_htt_tx_start(&ar->htt); 2053 if (status) { 2054 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 2055 goto err_wmi_detach; 2056 } 2057 2058 status = ath10k_htt_rx_alloc(&ar->htt); 2059 if (status) { 2060 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 2061 goto err_htt_tx_detach; 2062 } 2063 2064 status = ath10k_hif_start(ar); 2065 if (status) { 2066 ath10k_err(ar, "could not start HIF: %d\n", status); 2067 goto err_htt_rx_detach; 2068 } 2069 2070 status = ath10k_htc_wait_target(&ar->htc); 2071 if (status) { 2072 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 2073 goto err_hif_stop; 2074 } 2075 2076 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2077 status = ath10k_htt_connect(&ar->htt); 2078 if (status) { 2079 ath10k_err(ar, "failed to connect htt (%d)\n", status); 2080 goto err_hif_stop; 2081 } 2082 } 2083 2084 status = ath10k_wmi_connect(ar); 2085 if (status) { 2086 ath10k_err(ar, "could not connect wmi: %d\n", status); 2087 goto err_hif_stop; 2088 } 2089 2090 status = ath10k_htc_start(&ar->htc); 2091 if (status) { 2092 ath10k_err(ar, "failed to start htc: %d\n", status); 2093 goto err_hif_stop; 2094 } 2095 2096 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2097 status = ath10k_wmi_wait_for_service_ready(ar); 2098 if (status) { 2099 ath10k_warn(ar, "wmi service ready event not received"); 2100 goto err_hif_stop; 2101 } 2102 } 2103 2104 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 2105 ar->hw->wiphy->fw_version); 2106 2107 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) && 2108 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2109 val = 0; 2110 if (ath10k_peer_stats_enabled(ar)) 2111 val = WMI_10_4_PEER_STATS; 2112 2113 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) 2114 val |= WMI_10_4_BSS_CHANNEL_INFO_64; 2115 2116 /* 10.4 firmware supports BT-Coex without reloading firmware 2117 * via pdev param. To support Bluetooth coexistence pdev param, 2118 * WMI_COEX_GPIO_SUPPORT of extended resource config should be 2119 * enabled always. 2120 */ 2121 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 2122 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 2123 ar->running_fw->fw_file.fw_features)) 2124 val |= WMI_10_4_COEX_GPIO_SUPPORT; 2125 2126 status = ath10k_mac_ext_resource_config(ar, val); 2127 if (status) { 2128 ath10k_err(ar, 2129 "failed to send ext resource cfg command : %d\n", 2130 status); 2131 goto err_hif_stop; 2132 } 2133 } 2134 2135 status = ath10k_wmi_cmd_init(ar); 2136 if (status) { 2137 ath10k_err(ar, "could not send WMI init command (%d)\n", 2138 status); 2139 goto err_hif_stop; 2140 } 2141 2142 status = ath10k_wmi_wait_for_unified_ready(ar); 2143 if (status) { 2144 ath10k_err(ar, "wmi unified ready event not received\n"); 2145 goto err_hif_stop; 2146 } 2147 2148 /* Some firmware revisions do not properly set up hardware rx filter 2149 * registers. 2150 * 2151 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK 2152 * is filled with 0s instead of 1s allowing HW to respond with ACKs to 2153 * any frames that matches MAC_PCU_RX_FILTER which is also 2154 * misconfigured to accept anything. 2155 * 2156 * The ADDR1 is programmed using internal firmware structure field and 2157 * can't be (easily/sanely) reached from the driver explicitly. It is 2158 * possible to implicitly make it correct by creating a dummy vdev and 2159 * then deleting it. 2160 */ 2161 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2162 status = ath10k_core_reset_rx_filter(ar); 2163 if (status) { 2164 ath10k_err(ar, 2165 "failed to reset rx filter: %d\n", status); 2166 goto err_hif_stop; 2167 } 2168 } 2169 2170 /* If firmware indicates Full Rx Reorder support it must be used in a 2171 * slightly different manner. Let HTT code know. 2172 */ 2173 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 2174 ar->wmi.svc_map)); 2175 2176 status = ath10k_htt_rx_ring_refill(ar); 2177 if (status) { 2178 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 2179 goto err_hif_stop; 2180 } 2181 2182 if (ar->max_num_vdevs >= 64) 2183 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL; 2184 else 2185 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 2186 2187 INIT_LIST_HEAD(&ar->arvifs); 2188 2189 /* we don't care about HTT in UTF mode */ 2190 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2191 status = ath10k_htt_setup(&ar->htt); 2192 if (status) { 2193 ath10k_err(ar, "failed to setup htt: %d\n", status); 2194 goto err_hif_stop; 2195 } 2196 } 2197 2198 status = ath10k_debug_start(ar); 2199 if (status) 2200 goto err_hif_stop; 2201 2202 return 0; 2203 2204 err_hif_stop: 2205 ath10k_hif_stop(ar); 2206 err_htt_rx_detach: 2207 ath10k_htt_rx_free(&ar->htt); 2208 err_htt_tx_detach: 2209 ath10k_htt_tx_free(&ar->htt); 2210 err_wmi_detach: 2211 ath10k_wmi_detach(ar); 2212 err: 2213 return status; 2214 } 2215 EXPORT_SYMBOL(ath10k_core_start); 2216 2217 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 2218 { 2219 int ret; 2220 unsigned long time_left; 2221 2222 reinit_completion(&ar->target_suspend); 2223 2224 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 2225 if (ret) { 2226 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 2227 return ret; 2228 } 2229 2230 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 2231 2232 if (!time_left) { 2233 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 2234 return -ETIMEDOUT; 2235 } 2236 2237 return 0; 2238 } 2239 2240 void ath10k_core_stop(struct ath10k *ar) 2241 { 2242 lockdep_assert_held(&ar->conf_mutex); 2243 ath10k_debug_stop(ar); 2244 2245 /* try to suspend target */ 2246 if (ar->state != ATH10K_STATE_RESTARTING && 2247 ar->state != ATH10K_STATE_UTF) 2248 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 2249 2250 ath10k_hif_stop(ar); 2251 ath10k_htt_tx_stop(&ar->htt); 2252 ath10k_htt_rx_free(&ar->htt); 2253 ath10k_wmi_detach(ar); 2254 } 2255 EXPORT_SYMBOL(ath10k_core_stop); 2256 2257 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 2258 * order to know what hw capabilities should be advertised to mac80211 it is 2259 * necessary to load the firmware (and tear it down immediately since start 2260 * hook will try to init it again) before registering 2261 */ 2262 static int ath10k_core_probe_fw(struct ath10k *ar) 2263 { 2264 struct bmi_target_info target_info; 2265 int ret = 0; 2266 2267 ret = ath10k_hif_power_up(ar); 2268 if (ret) { 2269 ath10k_err(ar, "could not start pci hif (%d)\n", ret); 2270 return ret; 2271 } 2272 2273 memset(&target_info, 0, sizeof(target_info)); 2274 if (ar->hif.bus == ATH10K_BUS_SDIO) 2275 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info); 2276 else 2277 ret = ath10k_bmi_get_target_info(ar, &target_info); 2278 if (ret) { 2279 ath10k_err(ar, "could not get target info (%d)\n", ret); 2280 goto err_power_down; 2281 } 2282 2283 ar->target_version = target_info.version; 2284 ar->hw->wiphy->hw_version = target_info.version; 2285 2286 ret = ath10k_init_hw_params(ar); 2287 if (ret) { 2288 ath10k_err(ar, "could not get hw params (%d)\n", ret); 2289 goto err_power_down; 2290 } 2291 2292 ret = ath10k_core_fetch_firmware_files(ar); 2293 if (ret) { 2294 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 2295 goto err_power_down; 2296 } 2297 2298 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) != 2299 sizeof(ar->normal_mode_fw.fw_file.fw_version)); 2300 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version, 2301 sizeof(ar->hw->wiphy->fw_version)); 2302 2303 ath10k_debug_print_hwfw_info(ar); 2304 2305 ret = ath10k_core_pre_cal_download(ar); 2306 if (ret) { 2307 /* pre calibration data download is not necessary 2308 * for all the chipsets. Ignore failures and continue. 2309 */ 2310 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2311 "could not load pre cal data: %d\n", ret); 2312 } 2313 2314 ret = ath10k_core_get_board_id_from_otp(ar); 2315 if (ret && ret != -EOPNOTSUPP) { 2316 ath10k_err(ar, "failed to get board id from otp: %d\n", 2317 ret); 2318 goto err_free_firmware_files; 2319 } 2320 2321 ret = ath10k_core_check_smbios(ar); 2322 if (ret) 2323 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not set.\n"); 2324 2325 ret = ath10k_core_fetch_board_file(ar); 2326 if (ret) { 2327 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 2328 goto err_free_firmware_files; 2329 } 2330 2331 ath10k_debug_print_board_info(ar); 2332 2333 ret = ath10k_core_init_firmware_features(ar); 2334 if (ret) { 2335 ath10k_err(ar, "fatal problem with firmware features: %d\n", 2336 ret); 2337 goto err_free_firmware_files; 2338 } 2339 2340 ret = ath10k_swap_code_seg_init(ar, &ar->normal_mode_fw.fw_file); 2341 if (ret) { 2342 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 2343 ret); 2344 goto err_free_firmware_files; 2345 } 2346 2347 mutex_lock(&ar->conf_mutex); 2348 2349 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL, 2350 &ar->normal_mode_fw); 2351 if (ret) { 2352 ath10k_err(ar, "could not init core (%d)\n", ret); 2353 goto err_unlock; 2354 } 2355 2356 ath10k_debug_print_boot_info(ar); 2357 ath10k_core_stop(ar); 2358 2359 mutex_unlock(&ar->conf_mutex); 2360 2361 ath10k_hif_power_down(ar); 2362 return 0; 2363 2364 err_unlock: 2365 mutex_unlock(&ar->conf_mutex); 2366 2367 err_free_firmware_files: 2368 ath10k_core_free_firmware_files(ar); 2369 2370 err_power_down: 2371 ath10k_hif_power_down(ar); 2372 2373 return ret; 2374 } 2375 2376 static void ath10k_core_register_work(struct work_struct *work) 2377 { 2378 struct ath10k *ar = container_of(work, struct ath10k, register_work); 2379 int status; 2380 2381 /* peer stats are enabled by default */ 2382 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags); 2383 2384 status = ath10k_core_probe_fw(ar); 2385 if (status) { 2386 ath10k_err(ar, "could not probe fw (%d)\n", status); 2387 goto err; 2388 } 2389 2390 status = ath10k_mac_register(ar); 2391 if (status) { 2392 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 2393 goto err_release_fw; 2394 } 2395 2396 status = ath10k_debug_register(ar); 2397 if (status) { 2398 ath10k_err(ar, "unable to initialize debugfs\n"); 2399 goto err_unregister_mac; 2400 } 2401 2402 status = ath10k_spectral_create(ar); 2403 if (status) { 2404 ath10k_err(ar, "failed to initialize spectral\n"); 2405 goto err_debug_destroy; 2406 } 2407 2408 status = ath10k_thermal_register(ar); 2409 if (status) { 2410 ath10k_err(ar, "could not register thermal device: %d\n", 2411 status); 2412 goto err_spectral_destroy; 2413 } 2414 2415 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 2416 return; 2417 2418 err_spectral_destroy: 2419 ath10k_spectral_destroy(ar); 2420 err_debug_destroy: 2421 ath10k_debug_destroy(ar); 2422 err_unregister_mac: 2423 ath10k_mac_unregister(ar); 2424 err_release_fw: 2425 ath10k_core_free_firmware_files(ar); 2426 err: 2427 /* TODO: It's probably a good idea to release device from the driver 2428 * but calling device_release_driver() here will cause a deadlock. 2429 */ 2430 return; 2431 } 2432 2433 int ath10k_core_register(struct ath10k *ar, u32 chip_id) 2434 { 2435 ar->chip_id = chip_id; 2436 queue_work(ar->workqueue, &ar->register_work); 2437 2438 return 0; 2439 } 2440 EXPORT_SYMBOL(ath10k_core_register); 2441 2442 void ath10k_core_unregister(struct ath10k *ar) 2443 { 2444 cancel_work_sync(&ar->register_work); 2445 2446 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 2447 return; 2448 2449 ath10k_thermal_unregister(ar); 2450 /* Stop spectral before unregistering from mac80211 to remove the 2451 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 2452 * would be already be free'd recursively, leading to a double free. 2453 */ 2454 ath10k_spectral_destroy(ar); 2455 2456 /* We must unregister from mac80211 before we stop HTC and HIF. 2457 * Otherwise we will fail to submit commands to FW and mac80211 will be 2458 * unhappy about callback failures. 2459 */ 2460 ath10k_mac_unregister(ar); 2461 2462 ath10k_testmode_destroy(ar); 2463 2464 ath10k_core_free_firmware_files(ar); 2465 ath10k_core_free_board_files(ar); 2466 2467 ath10k_debug_unregister(ar); 2468 } 2469 EXPORT_SYMBOL(ath10k_core_unregister); 2470 2471 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 2472 enum ath10k_bus bus, 2473 enum ath10k_hw_rev hw_rev, 2474 const struct ath10k_hif_ops *hif_ops) 2475 { 2476 struct ath10k *ar; 2477 int ret; 2478 2479 ar = ath10k_mac_create(priv_size); 2480 if (!ar) 2481 return NULL; 2482 2483 ar->ath_common.priv = ar; 2484 ar->ath_common.hw = ar->hw; 2485 ar->dev = dev; 2486 ar->hw_rev = hw_rev; 2487 ar->hif.ops = hif_ops; 2488 ar->hif.bus = bus; 2489 2490 switch (hw_rev) { 2491 case ATH10K_HW_QCA988X: 2492 case ATH10K_HW_QCA9887: 2493 ar->regs = &qca988x_regs; 2494 ar->hw_ce_regs = &qcax_ce_regs; 2495 ar->hw_values = &qca988x_values; 2496 break; 2497 case ATH10K_HW_QCA6174: 2498 case ATH10K_HW_QCA9377: 2499 ar->regs = &qca6174_regs; 2500 ar->hw_ce_regs = &qcax_ce_regs; 2501 ar->hw_values = &qca6174_values; 2502 break; 2503 case ATH10K_HW_QCA99X0: 2504 case ATH10K_HW_QCA9984: 2505 ar->regs = &qca99x0_regs; 2506 ar->hw_ce_regs = &qcax_ce_regs; 2507 ar->hw_values = &qca99x0_values; 2508 break; 2509 case ATH10K_HW_QCA9888: 2510 ar->regs = &qca99x0_regs; 2511 ar->hw_ce_regs = &qcax_ce_regs; 2512 ar->hw_values = &qca9888_values; 2513 break; 2514 case ATH10K_HW_QCA4019: 2515 ar->regs = &qca4019_regs; 2516 ar->hw_ce_regs = &qcax_ce_regs; 2517 ar->hw_values = &qca4019_values; 2518 break; 2519 default: 2520 ath10k_err(ar, "unsupported core hardware revision %d\n", 2521 hw_rev); 2522 ret = -ENOTSUPP; 2523 goto err_free_mac; 2524 } 2525 2526 init_completion(&ar->scan.started); 2527 init_completion(&ar->scan.completed); 2528 init_completion(&ar->scan.on_channel); 2529 init_completion(&ar->target_suspend); 2530 init_completion(&ar->wow.wakeup_completed); 2531 2532 init_completion(&ar->install_key_done); 2533 init_completion(&ar->vdev_setup_done); 2534 init_completion(&ar->thermal.wmi_sync); 2535 init_completion(&ar->bss_survey_done); 2536 2537 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 2538 2539 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 2540 if (!ar->workqueue) 2541 goto err_free_mac; 2542 2543 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 2544 if (!ar->workqueue_aux) 2545 goto err_free_wq; 2546 2547 mutex_init(&ar->conf_mutex); 2548 spin_lock_init(&ar->data_lock); 2549 spin_lock_init(&ar->txqs_lock); 2550 2551 INIT_LIST_HEAD(&ar->txqs); 2552 INIT_LIST_HEAD(&ar->peers); 2553 init_waitqueue_head(&ar->peer_mapping_wq); 2554 init_waitqueue_head(&ar->htt.empty_tx_wq); 2555 init_waitqueue_head(&ar->wmi.tx_credits_wq); 2556 2557 init_completion(&ar->offchan_tx_completed); 2558 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 2559 skb_queue_head_init(&ar->offchan_tx_queue); 2560 2561 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 2562 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 2563 2564 INIT_WORK(&ar->register_work, ath10k_core_register_work); 2565 INIT_WORK(&ar->restart_work, ath10k_core_restart); 2566 INIT_WORK(&ar->set_coverage_class_work, 2567 ath10k_core_set_coverage_class_work); 2568 2569 init_dummy_netdev(&ar->napi_dev); 2570 2571 ret = ath10k_debug_create(ar); 2572 if (ret) 2573 goto err_free_aux_wq; 2574 2575 return ar; 2576 2577 err_free_aux_wq: 2578 destroy_workqueue(ar->workqueue_aux); 2579 err_free_wq: 2580 destroy_workqueue(ar->workqueue); 2581 2582 err_free_mac: 2583 ath10k_mac_destroy(ar); 2584 2585 return NULL; 2586 } 2587 EXPORT_SYMBOL(ath10k_core_create); 2588 2589 void ath10k_core_destroy(struct ath10k *ar) 2590 { 2591 flush_workqueue(ar->workqueue); 2592 destroy_workqueue(ar->workqueue); 2593 2594 flush_workqueue(ar->workqueue_aux); 2595 destroy_workqueue(ar->workqueue_aux); 2596 2597 ath10k_debug_destroy(ar); 2598 ath10k_htt_tx_destroy(&ar->htt); 2599 ath10k_wmi_free_host_mem(ar); 2600 ath10k_mac_destroy(ar); 2601 } 2602 EXPORT_SYMBOL(ath10k_core_destroy); 2603 2604 MODULE_AUTHOR("Qualcomm Atheros"); 2605 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards."); 2606 MODULE_LICENSE("Dual BSD/GPL"); 2607