1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include <linux/module.h> 19 #include <linux/firmware.h> 20 #include <linux/of.h> 21 #include <linux/dmi.h> 22 #include <linux/ctype.h> 23 #include <asm/byteorder.h> 24 25 #include "core.h" 26 #include "mac.h" 27 #include "htc.h" 28 #include "hif.h" 29 #include "wmi.h" 30 #include "bmi.h" 31 #include "debug.h" 32 #include "htt.h" 33 #include "testmode.h" 34 #include "wmi-ops.h" 35 36 unsigned int ath10k_debug_mask; 37 static unsigned int ath10k_cryptmode_param; 38 static bool uart_print; 39 static bool skip_otp; 40 static bool rawmode; 41 42 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 43 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 44 module_param(uart_print, bool, 0644); 45 module_param(skip_otp, bool, 0644); 46 module_param(rawmode, bool, 0644); 47 48 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 49 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 50 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 51 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 52 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); 53 54 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 55 { 56 .id = QCA988X_HW_2_0_VERSION, 57 .dev_id = QCA988X_2_0_DEVICE_ID, 58 .name = "qca988x hw2.0", 59 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 60 .uart_pin = 7, 61 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 62 .otp_exe_param = 0, 63 .channel_counters_freq_hz = 88000, 64 .max_probe_resp_desc_thres = 0, 65 .cal_data_len = 2116, 66 .fw = { 67 .dir = QCA988X_HW_2_0_FW_DIR, 68 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 69 .board_size = QCA988X_BOARD_DATA_SZ, 70 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 71 }, 72 .hw_ops = &qca988x_ops, 73 .decap_align_bytes = 4, 74 .spectral_bin_discard = 0, 75 }, 76 { 77 .id = QCA9887_HW_1_0_VERSION, 78 .dev_id = QCA9887_1_0_DEVICE_ID, 79 .name = "qca9887 hw1.0", 80 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR, 81 .uart_pin = 7, 82 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 83 .otp_exe_param = 0, 84 .channel_counters_freq_hz = 88000, 85 .max_probe_resp_desc_thres = 0, 86 .cal_data_len = 2116, 87 .fw = { 88 .dir = QCA9887_HW_1_0_FW_DIR, 89 .board = QCA9887_HW_1_0_BOARD_DATA_FILE, 90 .board_size = QCA9887_BOARD_DATA_SZ, 91 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ, 92 }, 93 .hw_ops = &qca988x_ops, 94 .decap_align_bytes = 4, 95 .spectral_bin_discard = 0, 96 }, 97 { 98 .id = QCA6174_HW_2_1_VERSION, 99 .dev_id = QCA6164_2_1_DEVICE_ID, 100 .name = "qca6164 hw2.1", 101 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 102 .uart_pin = 6, 103 .otp_exe_param = 0, 104 .channel_counters_freq_hz = 88000, 105 .max_probe_resp_desc_thres = 0, 106 .cal_data_len = 8124, 107 .fw = { 108 .dir = QCA6174_HW_2_1_FW_DIR, 109 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 110 .board_size = QCA6174_BOARD_DATA_SZ, 111 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 112 }, 113 .hw_ops = &qca988x_ops, 114 .decap_align_bytes = 4, 115 .spectral_bin_discard = 0, 116 }, 117 { 118 .id = QCA6174_HW_2_1_VERSION, 119 .dev_id = QCA6174_2_1_DEVICE_ID, 120 .name = "qca6174 hw2.1", 121 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 122 .uart_pin = 6, 123 .otp_exe_param = 0, 124 .channel_counters_freq_hz = 88000, 125 .max_probe_resp_desc_thres = 0, 126 .cal_data_len = 8124, 127 .fw = { 128 .dir = QCA6174_HW_2_1_FW_DIR, 129 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 130 .board_size = QCA6174_BOARD_DATA_SZ, 131 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 132 }, 133 .hw_ops = &qca988x_ops, 134 .decap_align_bytes = 4, 135 .spectral_bin_discard = 0, 136 }, 137 { 138 .id = QCA6174_HW_3_0_VERSION, 139 .dev_id = QCA6174_2_1_DEVICE_ID, 140 .name = "qca6174 hw3.0", 141 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 142 .uart_pin = 6, 143 .otp_exe_param = 0, 144 .channel_counters_freq_hz = 88000, 145 .max_probe_resp_desc_thres = 0, 146 .cal_data_len = 8124, 147 .fw = { 148 .dir = QCA6174_HW_3_0_FW_DIR, 149 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 150 .board_size = QCA6174_BOARD_DATA_SZ, 151 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 152 }, 153 .hw_ops = &qca988x_ops, 154 .decap_align_bytes = 4, 155 .spectral_bin_discard = 0, 156 }, 157 { 158 .id = QCA6174_HW_3_2_VERSION, 159 .dev_id = QCA6174_2_1_DEVICE_ID, 160 .name = "qca6174 hw3.2", 161 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 162 .uart_pin = 6, 163 .otp_exe_param = 0, 164 .channel_counters_freq_hz = 88000, 165 .max_probe_resp_desc_thres = 0, 166 .cal_data_len = 8124, 167 .fw = { 168 /* uses same binaries as hw3.0 */ 169 .dir = QCA6174_HW_3_0_FW_DIR, 170 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 171 .board_size = QCA6174_BOARD_DATA_SZ, 172 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 173 }, 174 .hw_ops = &qca6174_ops, 175 .hw_clk = qca6174_clk, 176 .target_cpu_freq = 176000000, 177 .decap_align_bytes = 4, 178 .spectral_bin_discard = 0, 179 }, 180 { 181 .id = QCA99X0_HW_2_0_DEV_VERSION, 182 .dev_id = QCA99X0_2_0_DEVICE_ID, 183 .name = "qca99x0 hw2.0", 184 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 185 .uart_pin = 7, 186 .otp_exe_param = 0x00000700, 187 .continuous_frag_desc = true, 188 .cck_rate_map_rev2 = true, 189 .channel_counters_freq_hz = 150000, 190 .max_probe_resp_desc_thres = 24, 191 .tx_chain_mask = 0xf, 192 .rx_chain_mask = 0xf, 193 .max_spatial_stream = 4, 194 .cal_data_len = 12064, 195 .fw = { 196 .dir = QCA99X0_HW_2_0_FW_DIR, 197 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 198 .board_size = QCA99X0_BOARD_DATA_SZ, 199 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 200 }, 201 .sw_decrypt_mcast_mgmt = true, 202 .hw_ops = &qca99x0_ops, 203 .decap_align_bytes = 1, 204 .spectral_bin_discard = 4, 205 }, 206 { 207 .id = QCA9984_HW_1_0_DEV_VERSION, 208 .dev_id = QCA9984_1_0_DEVICE_ID, 209 .name = "qca9984/qca9994 hw1.0", 210 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR, 211 .uart_pin = 7, 212 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 213 .otp_exe_param = 0x00000700, 214 .continuous_frag_desc = true, 215 .cck_rate_map_rev2 = true, 216 .channel_counters_freq_hz = 150000, 217 .max_probe_resp_desc_thres = 24, 218 .tx_chain_mask = 0xf, 219 .rx_chain_mask = 0xf, 220 .max_spatial_stream = 4, 221 .cal_data_len = 12064, 222 .fw = { 223 .dir = QCA9984_HW_1_0_FW_DIR, 224 .board = QCA9984_HW_1_0_BOARD_DATA_FILE, 225 .board_size = QCA99X0_BOARD_DATA_SZ, 226 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 227 }, 228 .sw_decrypt_mcast_mgmt = true, 229 .hw_ops = &qca99x0_ops, 230 .decap_align_bytes = 1, 231 .spectral_bin_discard = 12, 232 }, 233 { 234 .id = QCA9888_HW_2_0_DEV_VERSION, 235 .dev_id = QCA9888_2_0_DEVICE_ID, 236 .name = "qca9888 hw2.0", 237 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR, 238 .uart_pin = 7, 239 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 240 .otp_exe_param = 0x00000700, 241 .continuous_frag_desc = true, 242 .channel_counters_freq_hz = 150000, 243 .max_probe_resp_desc_thres = 24, 244 .tx_chain_mask = 3, 245 .rx_chain_mask = 3, 246 .max_spatial_stream = 2, 247 .cal_data_len = 12064, 248 .fw = { 249 .dir = QCA9888_HW_2_0_FW_DIR, 250 .board = QCA9888_HW_2_0_BOARD_DATA_FILE, 251 .board_size = QCA99X0_BOARD_DATA_SZ, 252 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 253 }, 254 .sw_decrypt_mcast_mgmt = true, 255 .hw_ops = &qca99x0_ops, 256 .decap_align_bytes = 1, 257 .spectral_bin_discard = 12, 258 }, 259 { 260 .id = QCA9377_HW_1_0_DEV_VERSION, 261 .dev_id = QCA9377_1_0_DEVICE_ID, 262 .name = "qca9377 hw1.0", 263 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 264 .uart_pin = 6, 265 .otp_exe_param = 0, 266 .channel_counters_freq_hz = 88000, 267 .max_probe_resp_desc_thres = 0, 268 .cal_data_len = 8124, 269 .fw = { 270 .dir = QCA9377_HW_1_0_FW_DIR, 271 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 272 .board_size = QCA9377_BOARD_DATA_SZ, 273 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 274 }, 275 .hw_ops = &qca988x_ops, 276 .decap_align_bytes = 4, 277 .spectral_bin_discard = 0, 278 }, 279 { 280 .id = QCA9377_HW_1_1_DEV_VERSION, 281 .dev_id = QCA9377_1_0_DEVICE_ID, 282 .name = "qca9377 hw1.1", 283 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 284 .uart_pin = 6, 285 .otp_exe_param = 0, 286 .channel_counters_freq_hz = 88000, 287 .max_probe_resp_desc_thres = 0, 288 .cal_data_len = 8124, 289 .fw = { 290 .dir = QCA9377_HW_1_0_FW_DIR, 291 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 292 .board_size = QCA9377_BOARD_DATA_SZ, 293 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 294 }, 295 .hw_ops = &qca6174_ops, 296 .hw_clk = qca6174_clk, 297 .target_cpu_freq = 176000000, 298 .decap_align_bytes = 4, 299 .spectral_bin_discard = 0, 300 }, 301 { 302 .id = QCA4019_HW_1_0_DEV_VERSION, 303 .dev_id = 0, 304 .name = "qca4019 hw1.0", 305 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR, 306 .uart_pin = 7, 307 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 308 .otp_exe_param = 0x0010000, 309 .continuous_frag_desc = true, 310 .cck_rate_map_rev2 = true, 311 .channel_counters_freq_hz = 125000, 312 .max_probe_resp_desc_thres = 24, 313 .tx_chain_mask = 0x3, 314 .rx_chain_mask = 0x3, 315 .max_spatial_stream = 2, 316 .cal_data_len = 12064, 317 .fw = { 318 .dir = QCA4019_HW_1_0_FW_DIR, 319 .board = QCA4019_HW_1_0_BOARD_DATA_FILE, 320 .board_size = QCA4019_BOARD_DATA_SZ, 321 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, 322 }, 323 .sw_decrypt_mcast_mgmt = true, 324 .hw_ops = &qca99x0_ops, 325 .decap_align_bytes = 1, 326 .spectral_bin_discard = 4, 327 }, 328 }; 329 330 static const char *const ath10k_core_fw_feature_str[] = { 331 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 332 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 333 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 334 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 335 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 336 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 337 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 338 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 339 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 340 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 341 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 342 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 343 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", 344 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl", 345 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param", 346 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war", 347 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast", 348 }; 349 350 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 351 size_t buf_len, 352 enum ath10k_fw_features feat) 353 { 354 /* make sure that ath10k_core_fw_feature_str[] gets updated */ 355 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != 356 ATH10K_FW_FEATURE_COUNT); 357 358 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 359 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 360 return scnprintf(buf, buf_len, "bit%d", feat); 361 } 362 363 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 364 } 365 366 void ath10k_core_get_fw_features_str(struct ath10k *ar, 367 char *buf, 368 size_t buf_len) 369 { 370 size_t len = 0; 371 int i; 372 373 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 374 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) { 375 if (len > 0) 376 len += scnprintf(buf + len, buf_len - len, ","); 377 378 len += ath10k_core_get_fw_feature_str(buf + len, 379 buf_len - len, 380 i); 381 } 382 } 383 } 384 385 static void ath10k_send_suspend_complete(struct ath10k *ar) 386 { 387 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 388 389 complete(&ar->target_suspend); 390 } 391 392 static int ath10k_init_configure_target(struct ath10k *ar) 393 { 394 u32 param_host; 395 int ret; 396 397 /* tell target which HTC version it is used*/ 398 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 399 HTC_PROTOCOL_VERSION); 400 if (ret) { 401 ath10k_err(ar, "settings HTC version failed\n"); 402 return ret; 403 } 404 405 /* set the firmware mode to STA/IBSS/AP */ 406 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 407 if (ret) { 408 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 409 return ret; 410 } 411 412 /* TODO following parameters need to be re-visited. */ 413 /* num_device */ 414 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 415 /* Firmware mode */ 416 /* FIXME: Why FW_MODE_AP ??.*/ 417 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 418 /* mac_addr_method */ 419 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 420 /* firmware_bridge */ 421 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 422 /* fwsubmode */ 423 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 424 425 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 426 if (ret) { 427 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 428 return ret; 429 } 430 431 /* We do all byte-swapping on the host */ 432 ret = ath10k_bmi_write32(ar, hi_be, 0); 433 if (ret) { 434 ath10k_err(ar, "setting host CPU BE mode failed\n"); 435 return ret; 436 } 437 438 /* FW descriptor/Data swap flags */ 439 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 440 441 if (ret) { 442 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 443 return ret; 444 } 445 446 /* Some devices have a special sanity check that verifies the PCI 447 * Device ID is written to this host interest var. It is known to be 448 * required to boot QCA6164. 449 */ 450 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 451 ar->dev_id); 452 if (ret) { 453 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 454 return ret; 455 } 456 457 return 0; 458 } 459 460 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 461 const char *dir, 462 const char *file) 463 { 464 char filename[100]; 465 const struct firmware *fw; 466 int ret; 467 468 if (file == NULL) 469 return ERR_PTR(-ENOENT); 470 471 if (dir == NULL) 472 dir = "."; 473 474 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 475 ret = request_firmware_direct(&fw, filename, ar->dev); 476 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n", 477 filename, ret); 478 479 if (ret) 480 return ERR_PTR(ret); 481 482 return fw; 483 } 484 485 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 486 size_t data_len) 487 { 488 u32 board_data_size = ar->hw_params.fw.board_size; 489 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 490 u32 board_ext_data_addr; 491 int ret; 492 493 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 494 if (ret) { 495 ath10k_err(ar, "could not read board ext data addr (%d)\n", 496 ret); 497 return ret; 498 } 499 500 ath10k_dbg(ar, ATH10K_DBG_BOOT, 501 "boot push board extended data addr 0x%x\n", 502 board_ext_data_addr); 503 504 if (board_ext_data_addr == 0) 505 return 0; 506 507 if (data_len != (board_data_size + board_ext_data_size)) { 508 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 509 data_len, board_data_size, board_ext_data_size); 510 return -EINVAL; 511 } 512 513 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 514 data + board_data_size, 515 board_ext_data_size); 516 if (ret) { 517 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 518 return ret; 519 } 520 521 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 522 (board_ext_data_size << 16) | 1); 523 if (ret) { 524 ath10k_err(ar, "could not write board ext data bit (%d)\n", 525 ret); 526 return ret; 527 } 528 529 return 0; 530 } 531 532 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 533 size_t data_len) 534 { 535 u32 board_data_size = ar->hw_params.fw.board_size; 536 u32 address; 537 int ret; 538 539 ret = ath10k_push_board_ext_data(ar, data, data_len); 540 if (ret) { 541 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 542 goto exit; 543 } 544 545 ret = ath10k_bmi_read32(ar, hi_board_data, &address); 546 if (ret) { 547 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 548 goto exit; 549 } 550 551 ret = ath10k_bmi_write_memory(ar, address, data, 552 min_t(u32, board_data_size, 553 data_len)); 554 if (ret) { 555 ath10k_err(ar, "could not write board data (%d)\n", ret); 556 goto exit; 557 } 558 559 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 560 if (ret) { 561 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 562 goto exit; 563 } 564 565 exit: 566 return ret; 567 } 568 569 static int ath10k_download_cal_file(struct ath10k *ar, 570 const struct firmware *file) 571 { 572 int ret; 573 574 if (!file) 575 return -ENOENT; 576 577 if (IS_ERR(file)) 578 return PTR_ERR(file); 579 580 ret = ath10k_download_board_data(ar, file->data, file->size); 581 if (ret) { 582 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 583 return ret; 584 } 585 586 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 587 588 return 0; 589 } 590 591 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name) 592 { 593 struct device_node *node; 594 int data_len; 595 void *data; 596 int ret; 597 598 node = ar->dev->of_node; 599 if (!node) 600 /* Device Tree is optional, don't print any warnings if 601 * there's no node for ath10k. 602 */ 603 return -ENOENT; 604 605 if (!of_get_property(node, dt_name, &data_len)) { 606 /* The calibration data node is optional */ 607 return -ENOENT; 608 } 609 610 if (data_len != ar->hw_params.cal_data_len) { 611 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 612 data_len); 613 ret = -EMSGSIZE; 614 goto out; 615 } 616 617 data = kmalloc(data_len, GFP_KERNEL); 618 if (!data) { 619 ret = -ENOMEM; 620 goto out; 621 } 622 623 ret = of_property_read_u8_array(node, dt_name, data, data_len); 624 if (ret) { 625 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 626 ret); 627 goto out_free; 628 } 629 630 ret = ath10k_download_board_data(ar, data, data_len); 631 if (ret) { 632 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 633 ret); 634 goto out_free; 635 } 636 637 ret = 0; 638 639 out_free: 640 kfree(data); 641 642 out: 643 return ret; 644 } 645 646 static int ath10k_download_cal_eeprom(struct ath10k *ar) 647 { 648 size_t data_len; 649 void *data = NULL; 650 int ret; 651 652 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len); 653 if (ret) { 654 if (ret != -EOPNOTSUPP) 655 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n", 656 ret); 657 goto out_free; 658 } 659 660 ret = ath10k_download_board_data(ar, data, data_len); 661 if (ret) { 662 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n", 663 ret); 664 goto out_free; 665 } 666 667 ret = 0; 668 669 out_free: 670 kfree(data); 671 672 return ret; 673 } 674 675 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) 676 { 677 u32 result, address; 678 u8 board_id, chip_id; 679 int ret; 680 681 address = ar->hw_params.patch_load_addr; 682 683 if (!ar->normal_mode_fw.fw_file.otp_data || 684 !ar->normal_mode_fw.fw_file.otp_len) { 685 ath10k_warn(ar, 686 "failed to retrieve board id because of invalid otp\n"); 687 return -ENODATA; 688 } 689 690 ath10k_dbg(ar, ATH10K_DBG_BOOT, 691 "boot upload otp to 0x%x len %zd for board id\n", 692 address, ar->normal_mode_fw.fw_file.otp_len); 693 694 ret = ath10k_bmi_fast_download(ar, address, 695 ar->normal_mode_fw.fw_file.otp_data, 696 ar->normal_mode_fw.fw_file.otp_len); 697 if (ret) { 698 ath10k_err(ar, "could not write otp for board id check: %d\n", 699 ret); 700 return ret; 701 } 702 703 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EEPROM_BOARD_ID, 704 &result); 705 if (ret) { 706 ath10k_err(ar, "could not execute otp for board id check: %d\n", 707 ret); 708 return ret; 709 } 710 711 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); 712 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); 713 714 ath10k_dbg(ar, ATH10K_DBG_BOOT, 715 "boot get otp board id result 0x%08x board_id %d chip_id %d\n", 716 result, board_id, chip_id); 717 718 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 || 719 (board_id == 0)) { 720 ath10k_dbg(ar, ATH10K_DBG_BOOT, 721 "board id does not exist in otp, ignore it\n"); 722 return -EOPNOTSUPP; 723 } 724 725 ar->id.bmi_ids_valid = true; 726 ar->id.bmi_board_id = board_id; 727 ar->id.bmi_chip_id = chip_id; 728 729 return 0; 730 } 731 732 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data) 733 { 734 struct ath10k *ar = data; 735 const char *bdf_ext; 736 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC; 737 u8 bdf_enabled; 738 int i; 739 740 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE) 741 return; 742 743 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) { 744 ath10k_dbg(ar, ATH10K_DBG_BOOT, 745 "wrong smbios bdf ext type length (%d).\n", 746 hdr->length); 747 return; 748 } 749 750 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET); 751 if (!bdf_enabled) { 752 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n"); 753 return; 754 } 755 756 /* Only one string exists (per spec) */ 757 bdf_ext = (char *)hdr + hdr->length; 758 759 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) { 760 ath10k_dbg(ar, ATH10K_DBG_BOOT, 761 "bdf variant magic does not match.\n"); 762 return; 763 } 764 765 for (i = 0; i < strlen(bdf_ext); i++) { 766 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) { 767 ath10k_dbg(ar, ATH10K_DBG_BOOT, 768 "bdf variant name contains non ascii chars.\n"); 769 return; 770 } 771 } 772 773 /* Copy extension name without magic suffix */ 774 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic), 775 sizeof(ar->id.bdf_ext)) < 0) { 776 ath10k_dbg(ar, ATH10K_DBG_BOOT, 777 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 778 bdf_ext); 779 return; 780 } 781 782 ath10k_dbg(ar, ATH10K_DBG_BOOT, 783 "found and validated bdf variant smbios_type 0x%x bdf %s\n", 784 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext); 785 } 786 787 static int ath10k_core_check_smbios(struct ath10k *ar) 788 { 789 ar->id.bdf_ext[0] = '\0'; 790 dmi_walk(ath10k_core_check_bdfext, ar); 791 792 if (ar->id.bdf_ext[0] == '\0') 793 return -ENODATA; 794 795 return 0; 796 } 797 798 static int ath10k_download_and_run_otp(struct ath10k *ar) 799 { 800 u32 result, address = ar->hw_params.patch_load_addr; 801 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 802 int ret; 803 804 ret = ath10k_download_board_data(ar, 805 ar->running_fw->board_data, 806 ar->running_fw->board_len); 807 if (ret) { 808 ath10k_err(ar, "failed to download board data: %d\n", ret); 809 return ret; 810 } 811 812 /* OTP is optional */ 813 814 if (!ar->running_fw->fw_file.otp_data || 815 !ar->running_fw->fw_file.otp_len) { 816 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n", 817 ar->running_fw->fw_file.otp_data, 818 ar->running_fw->fw_file.otp_len); 819 return 0; 820 } 821 822 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 823 address, ar->running_fw->fw_file.otp_len); 824 825 ret = ath10k_bmi_fast_download(ar, address, 826 ar->running_fw->fw_file.otp_data, 827 ar->running_fw->fw_file.otp_len); 828 if (ret) { 829 ath10k_err(ar, "could not write otp (%d)\n", ret); 830 return ret; 831 } 832 833 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 834 if (ret) { 835 ath10k_err(ar, "could not execute otp (%d)\n", ret); 836 return ret; 837 } 838 839 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 840 841 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 842 ar->running_fw->fw_file.fw_features)) && 843 result != 0) { 844 ath10k_err(ar, "otp calibration failed: %d", result); 845 return -EINVAL; 846 } 847 848 return 0; 849 } 850 851 static int ath10k_download_fw(struct ath10k *ar) 852 { 853 u32 address, data_len; 854 const void *data; 855 int ret; 856 857 address = ar->hw_params.patch_load_addr; 858 859 data = ar->running_fw->fw_file.firmware_data; 860 data_len = ar->running_fw->fw_file.firmware_len; 861 862 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file); 863 if (ret) { 864 ath10k_err(ar, "failed to configure fw code swap: %d\n", 865 ret); 866 return ret; 867 } 868 869 ath10k_dbg(ar, ATH10K_DBG_BOOT, 870 "boot uploading firmware image %pK len %d\n", 871 data, data_len); 872 873 ret = ath10k_bmi_fast_download(ar, address, data, data_len); 874 if (ret) { 875 ath10k_err(ar, "failed to download firmware: %d\n", 876 ret); 877 return ret; 878 } 879 880 return ret; 881 } 882 883 static void ath10k_core_free_board_files(struct ath10k *ar) 884 { 885 if (!IS_ERR(ar->normal_mode_fw.board)) 886 release_firmware(ar->normal_mode_fw.board); 887 888 ar->normal_mode_fw.board = NULL; 889 ar->normal_mode_fw.board_data = NULL; 890 ar->normal_mode_fw.board_len = 0; 891 } 892 893 static void ath10k_core_free_firmware_files(struct ath10k *ar) 894 { 895 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware)) 896 release_firmware(ar->normal_mode_fw.fw_file.firmware); 897 898 if (!IS_ERR(ar->cal_file)) 899 release_firmware(ar->cal_file); 900 901 if (!IS_ERR(ar->pre_cal_file)) 902 release_firmware(ar->pre_cal_file); 903 904 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file); 905 906 ar->normal_mode_fw.fw_file.otp_data = NULL; 907 ar->normal_mode_fw.fw_file.otp_len = 0; 908 909 ar->normal_mode_fw.fw_file.firmware = NULL; 910 ar->normal_mode_fw.fw_file.firmware_data = NULL; 911 ar->normal_mode_fw.fw_file.firmware_len = 0; 912 913 ar->cal_file = NULL; 914 ar->pre_cal_file = NULL; 915 } 916 917 static int ath10k_fetch_cal_file(struct ath10k *ar) 918 { 919 char filename[100]; 920 921 /* pre-cal-<bus>-<id>.bin */ 922 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin", 923 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 924 925 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 926 if (!IS_ERR(ar->pre_cal_file)) 927 goto success; 928 929 /* cal-<bus>-<id>.bin */ 930 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 931 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 932 933 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 934 if (IS_ERR(ar->cal_file)) 935 /* calibration file is optional, don't print any warnings */ 936 return PTR_ERR(ar->cal_file); 937 success: 938 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 939 ATH10K_FW_DIR, filename); 940 941 return 0; 942 } 943 944 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar) 945 { 946 if (!ar->hw_params.fw.board) { 947 ath10k_err(ar, "failed to find board file fw entry\n"); 948 return -EINVAL; 949 } 950 951 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 952 ar->hw_params.fw.dir, 953 ar->hw_params.fw.board); 954 if (IS_ERR(ar->normal_mode_fw.board)) 955 return PTR_ERR(ar->normal_mode_fw.board); 956 957 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data; 958 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size; 959 960 return 0; 961 } 962 963 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, 964 const void *buf, size_t buf_len, 965 const char *boardname) 966 { 967 const struct ath10k_fw_ie *hdr; 968 bool name_match_found; 969 int ret, board_ie_id; 970 size_t board_ie_len; 971 const void *board_ie_data; 972 973 name_match_found = false; 974 975 /* go through ATH10K_BD_IE_BOARD_ elements */ 976 while (buf_len > sizeof(struct ath10k_fw_ie)) { 977 hdr = buf; 978 board_ie_id = le32_to_cpu(hdr->id); 979 board_ie_len = le32_to_cpu(hdr->len); 980 board_ie_data = hdr->data; 981 982 buf_len -= sizeof(*hdr); 983 buf += sizeof(*hdr); 984 985 if (buf_len < ALIGN(board_ie_len, 4)) { 986 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", 987 buf_len, ALIGN(board_ie_len, 4)); 988 ret = -EINVAL; 989 goto out; 990 } 991 992 switch (board_ie_id) { 993 case ATH10K_BD_IE_BOARD_NAME: 994 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", 995 board_ie_data, board_ie_len); 996 997 if (board_ie_len != strlen(boardname)) 998 break; 999 1000 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 1001 if (ret) 1002 break; 1003 1004 name_match_found = true; 1005 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1006 "boot found match for name '%s'", 1007 boardname); 1008 break; 1009 case ATH10K_BD_IE_BOARD_DATA: 1010 if (!name_match_found) 1011 /* no match found */ 1012 break; 1013 1014 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1015 "boot found board data for '%s'", 1016 boardname); 1017 1018 ar->normal_mode_fw.board_data = board_ie_data; 1019 ar->normal_mode_fw.board_len = board_ie_len; 1020 1021 ret = 0; 1022 goto out; 1023 default: 1024 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", 1025 board_ie_id); 1026 break; 1027 } 1028 1029 /* jump over the padding */ 1030 board_ie_len = ALIGN(board_ie_len, 4); 1031 1032 buf_len -= board_ie_len; 1033 buf += board_ie_len; 1034 } 1035 1036 /* no match found */ 1037 ret = -ENOENT; 1038 1039 out: 1040 return ret; 1041 } 1042 1043 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, 1044 const char *boardname, 1045 const char *filename) 1046 { 1047 size_t len, magic_len, ie_len; 1048 struct ath10k_fw_ie *hdr; 1049 const u8 *data; 1050 int ret, ie_id; 1051 1052 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1053 ar->hw_params.fw.dir, 1054 filename); 1055 if (IS_ERR(ar->normal_mode_fw.board)) 1056 return PTR_ERR(ar->normal_mode_fw.board); 1057 1058 data = ar->normal_mode_fw.board->data; 1059 len = ar->normal_mode_fw.board->size; 1060 1061 /* magic has extra null byte padded */ 1062 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; 1063 if (len < magic_len) { 1064 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", 1065 ar->hw_params.fw.dir, filename, len); 1066 ret = -EINVAL; 1067 goto err; 1068 } 1069 1070 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { 1071 ath10k_err(ar, "found invalid board magic\n"); 1072 ret = -EINVAL; 1073 goto err; 1074 } 1075 1076 /* magic is padded to 4 bytes */ 1077 magic_len = ALIGN(magic_len, 4); 1078 if (len < magic_len) { 1079 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", 1080 ar->hw_params.fw.dir, filename, len); 1081 ret = -EINVAL; 1082 goto err; 1083 } 1084 1085 data += magic_len; 1086 len -= magic_len; 1087 1088 while (len > sizeof(struct ath10k_fw_ie)) { 1089 hdr = (struct ath10k_fw_ie *)data; 1090 ie_id = le32_to_cpu(hdr->id); 1091 ie_len = le32_to_cpu(hdr->len); 1092 1093 len -= sizeof(*hdr); 1094 data = hdr->data; 1095 1096 if (len < ALIGN(ie_len, 4)) { 1097 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", 1098 ie_id, ie_len, len); 1099 ret = -EINVAL; 1100 goto err; 1101 } 1102 1103 switch (ie_id) { 1104 case ATH10K_BD_IE_BOARD: 1105 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1106 boardname); 1107 if (ret == -ENOENT && ar->id.bdf_ext[0] != '\0') { 1108 /* try default bdf if variant was not found */ 1109 char *s, *v = ",variant="; 1110 char boardname2[100]; 1111 1112 strlcpy(boardname2, boardname, 1113 sizeof(boardname2)); 1114 1115 s = strstr(boardname2, v); 1116 if (s) 1117 *s = '\0'; /* strip ",variant=%s" */ 1118 1119 ret = ath10k_core_parse_bd_ie_board(ar, data, 1120 ie_len, 1121 boardname2); 1122 } 1123 1124 if (ret == -ENOENT) 1125 /* no match found, continue */ 1126 break; 1127 else if (ret) 1128 /* there was an error, bail out */ 1129 goto err; 1130 1131 /* board data found */ 1132 goto out; 1133 } 1134 1135 /* jump over the padding */ 1136 ie_len = ALIGN(ie_len, 4); 1137 1138 len -= ie_len; 1139 data += ie_len; 1140 } 1141 1142 out: 1143 if (!ar->normal_mode_fw.board_data || !ar->normal_mode_fw.board_len) { 1144 ath10k_err(ar, 1145 "failed to fetch board data for %s from %s/%s\n", 1146 boardname, ar->hw_params.fw.dir, filename); 1147 ret = -ENODATA; 1148 goto err; 1149 } 1150 1151 return 0; 1152 1153 err: 1154 ath10k_core_free_board_files(ar); 1155 return ret; 1156 } 1157 1158 static int ath10k_core_create_board_name(struct ath10k *ar, char *name, 1159 size_t name_len) 1160 { 1161 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */ 1162 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 }; 1163 1164 if (ar->id.bmi_ids_valid) { 1165 scnprintf(name, name_len, 1166 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d", 1167 ath10k_bus_str(ar->hif.bus), 1168 ar->id.bmi_chip_id, 1169 ar->id.bmi_board_id); 1170 goto out; 1171 } 1172 1173 if (ar->id.bdf_ext[0] != '\0') 1174 scnprintf(variant, sizeof(variant), ",variant=%s", 1175 ar->id.bdf_ext); 1176 1177 scnprintf(name, name_len, 1178 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s", 1179 ath10k_bus_str(ar->hif.bus), 1180 ar->id.vendor, ar->id.device, 1181 ar->id.subsystem_vendor, ar->id.subsystem_device, variant); 1182 out: 1183 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); 1184 1185 return 0; 1186 } 1187 1188 static int ath10k_core_fetch_board_file(struct ath10k *ar) 1189 { 1190 char boardname[100]; 1191 int ret; 1192 1193 ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname)); 1194 if (ret) { 1195 ath10k_err(ar, "failed to create board name: %d", ret); 1196 return ret; 1197 } 1198 1199 ar->bd_api = 2; 1200 ret = ath10k_core_fetch_board_data_api_n(ar, boardname, 1201 ATH10K_BOARD_API2_FILE); 1202 if (!ret) 1203 goto success; 1204 1205 ar->bd_api = 1; 1206 ret = ath10k_core_fetch_board_data_api_1(ar); 1207 if (ret) { 1208 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n", 1209 ar->hw_params.fw.dir); 1210 return ret; 1211 } 1212 1213 success: 1214 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); 1215 return 0; 1216 } 1217 1218 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1219 struct ath10k_fw_file *fw_file) 1220 { 1221 size_t magic_len, len, ie_len; 1222 int ie_id, i, index, bit, ret; 1223 struct ath10k_fw_ie *hdr; 1224 const u8 *data; 1225 __le32 *timestamp, *version; 1226 1227 /* first fetch the firmware file (firmware-*.bin) */ 1228 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1229 name); 1230 if (IS_ERR(fw_file->firmware)) 1231 return PTR_ERR(fw_file->firmware); 1232 1233 data = fw_file->firmware->data; 1234 len = fw_file->firmware->size; 1235 1236 /* magic also includes the null byte, check that as well */ 1237 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 1238 1239 if (len < magic_len) { 1240 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 1241 ar->hw_params.fw.dir, name, len); 1242 ret = -EINVAL; 1243 goto err; 1244 } 1245 1246 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 1247 ath10k_err(ar, "invalid firmware magic\n"); 1248 ret = -EINVAL; 1249 goto err; 1250 } 1251 1252 /* jump over the padding */ 1253 magic_len = ALIGN(magic_len, 4); 1254 1255 len -= magic_len; 1256 data += magic_len; 1257 1258 /* loop elements */ 1259 while (len > sizeof(struct ath10k_fw_ie)) { 1260 hdr = (struct ath10k_fw_ie *)data; 1261 1262 ie_id = le32_to_cpu(hdr->id); 1263 ie_len = le32_to_cpu(hdr->len); 1264 1265 len -= sizeof(*hdr); 1266 data += sizeof(*hdr); 1267 1268 if (len < ie_len) { 1269 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 1270 ie_id, len, ie_len); 1271 ret = -EINVAL; 1272 goto err; 1273 } 1274 1275 switch (ie_id) { 1276 case ATH10K_FW_IE_FW_VERSION: 1277 if (ie_len > sizeof(fw_file->fw_version) - 1) 1278 break; 1279 1280 memcpy(fw_file->fw_version, data, ie_len); 1281 fw_file->fw_version[ie_len] = '\0'; 1282 1283 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1284 "found fw version %s\n", 1285 fw_file->fw_version); 1286 break; 1287 case ATH10K_FW_IE_TIMESTAMP: 1288 if (ie_len != sizeof(u32)) 1289 break; 1290 1291 timestamp = (__le32 *)data; 1292 1293 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 1294 le32_to_cpup(timestamp)); 1295 break; 1296 case ATH10K_FW_IE_FEATURES: 1297 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1298 "found firmware features ie (%zd B)\n", 1299 ie_len); 1300 1301 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 1302 index = i / 8; 1303 bit = i % 8; 1304 1305 if (index == ie_len) 1306 break; 1307 1308 if (data[index] & (1 << bit)) { 1309 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1310 "Enabling feature bit: %i\n", 1311 i); 1312 __set_bit(i, fw_file->fw_features); 1313 } 1314 } 1315 1316 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 1317 fw_file->fw_features, 1318 sizeof(fw_file->fw_features)); 1319 break; 1320 case ATH10K_FW_IE_FW_IMAGE: 1321 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1322 "found fw image ie (%zd B)\n", 1323 ie_len); 1324 1325 fw_file->firmware_data = data; 1326 fw_file->firmware_len = ie_len; 1327 1328 break; 1329 case ATH10K_FW_IE_OTP_IMAGE: 1330 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1331 "found otp image ie (%zd B)\n", 1332 ie_len); 1333 1334 fw_file->otp_data = data; 1335 fw_file->otp_len = ie_len; 1336 1337 break; 1338 case ATH10K_FW_IE_WMI_OP_VERSION: 1339 if (ie_len != sizeof(u32)) 1340 break; 1341 1342 version = (__le32 *)data; 1343 1344 fw_file->wmi_op_version = le32_to_cpup(version); 1345 1346 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 1347 fw_file->wmi_op_version); 1348 break; 1349 case ATH10K_FW_IE_HTT_OP_VERSION: 1350 if (ie_len != sizeof(u32)) 1351 break; 1352 1353 version = (__le32 *)data; 1354 1355 fw_file->htt_op_version = le32_to_cpup(version); 1356 1357 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 1358 fw_file->htt_op_version); 1359 break; 1360 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 1361 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1362 "found fw code swap image ie (%zd B)\n", 1363 ie_len); 1364 fw_file->codeswap_data = data; 1365 fw_file->codeswap_len = ie_len; 1366 break; 1367 default: 1368 ath10k_warn(ar, "Unknown FW IE: %u\n", 1369 le32_to_cpu(hdr->id)); 1370 break; 1371 } 1372 1373 /* jump over the padding */ 1374 ie_len = ALIGN(ie_len, 4); 1375 1376 len -= ie_len; 1377 data += ie_len; 1378 } 1379 1380 if (!fw_file->firmware_data || 1381 !fw_file->firmware_len) { 1382 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 1383 ar->hw_params.fw.dir, name); 1384 ret = -ENOMEDIUM; 1385 goto err; 1386 } 1387 1388 return 0; 1389 1390 err: 1391 ath10k_core_free_firmware_files(ar); 1392 return ret; 1393 } 1394 1395 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name, 1396 size_t fw_name_len, int fw_api) 1397 { 1398 scnprintf(fw_name, fw_name_len, "%s-%d.bin", ATH10K_FW_FILE_BASE, fw_api); 1399 } 1400 1401 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 1402 { 1403 int ret, i; 1404 char fw_name[100]; 1405 1406 /* calibration file is optional, don't check for any errors */ 1407 ath10k_fetch_cal_file(ar); 1408 1409 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) { 1410 ar->fw_api = i; 1411 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", 1412 ar->fw_api); 1413 1414 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api); 1415 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name, 1416 &ar->normal_mode_fw.fw_file); 1417 if (!ret) 1418 goto success; 1419 } 1420 1421 /* we end up here if we couldn't fetch any firmware */ 1422 1423 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d", 1424 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir, 1425 ret); 1426 1427 return ret; 1428 1429 success: 1430 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1431 1432 return 0; 1433 } 1434 1435 static int ath10k_core_pre_cal_download(struct ath10k *ar) 1436 { 1437 int ret; 1438 1439 ret = ath10k_download_cal_file(ar, ar->pre_cal_file); 1440 if (ret == 0) { 1441 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE; 1442 goto success; 1443 } 1444 1445 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1446 "boot did not find a pre calibration file, try DT next: %d\n", 1447 ret); 1448 1449 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data"); 1450 if (ret) { 1451 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1452 "unable to load pre cal data from DT: %d\n", ret); 1453 return ret; 1454 } 1455 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT; 1456 1457 success: 1458 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1459 ath10k_cal_mode_str(ar->cal_mode)); 1460 1461 return 0; 1462 } 1463 1464 static int ath10k_core_pre_cal_config(struct ath10k *ar) 1465 { 1466 int ret; 1467 1468 ret = ath10k_core_pre_cal_download(ar); 1469 if (ret) { 1470 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1471 "failed to load pre cal data: %d\n", ret); 1472 return ret; 1473 } 1474 1475 ret = ath10k_core_get_board_id_from_otp(ar); 1476 if (ret) { 1477 ath10k_err(ar, "failed to get board id: %d\n", ret); 1478 return ret; 1479 } 1480 1481 ret = ath10k_download_and_run_otp(ar); 1482 if (ret) { 1483 ath10k_err(ar, "failed to run otp: %d\n", ret); 1484 return ret; 1485 } 1486 1487 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1488 "pre cal configuration done successfully\n"); 1489 1490 return 0; 1491 } 1492 1493 static int ath10k_download_cal_data(struct ath10k *ar) 1494 { 1495 int ret; 1496 1497 ret = ath10k_core_pre_cal_config(ar); 1498 if (ret == 0) 1499 return 0; 1500 1501 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1502 "pre cal download procedure failed, try cal file: %d\n", 1503 ret); 1504 1505 ret = ath10k_download_cal_file(ar, ar->cal_file); 1506 if (ret == 0) { 1507 ar->cal_mode = ATH10K_CAL_MODE_FILE; 1508 goto done; 1509 } 1510 1511 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1512 "boot did not find a calibration file, try DT next: %d\n", 1513 ret); 1514 1515 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data"); 1516 if (ret == 0) { 1517 ar->cal_mode = ATH10K_CAL_MODE_DT; 1518 goto done; 1519 } 1520 1521 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1522 "boot did not find DT entry, try target EEPROM next: %d\n", 1523 ret); 1524 1525 ret = ath10k_download_cal_eeprom(ar); 1526 if (ret == 0) { 1527 ar->cal_mode = ATH10K_CAL_MODE_EEPROM; 1528 goto done; 1529 } 1530 1531 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1532 "boot did not find target EEPROM entry, try OTP next: %d\n", 1533 ret); 1534 1535 ret = ath10k_download_and_run_otp(ar); 1536 if (ret) { 1537 ath10k_err(ar, "failed to run otp: %d\n", ret); 1538 return ret; 1539 } 1540 1541 ar->cal_mode = ATH10K_CAL_MODE_OTP; 1542 1543 done: 1544 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1545 ath10k_cal_mode_str(ar->cal_mode)); 1546 return 0; 1547 } 1548 1549 static int ath10k_init_uart(struct ath10k *ar) 1550 { 1551 int ret; 1552 1553 /* 1554 * Explicitly setting UART prints to zero as target turns it on 1555 * based on scratch registers. 1556 */ 1557 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 1558 if (ret) { 1559 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 1560 return ret; 1561 } 1562 1563 if (!uart_print) 1564 return 0; 1565 1566 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 1567 if (ret) { 1568 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1569 return ret; 1570 } 1571 1572 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 1573 if (ret) { 1574 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1575 return ret; 1576 } 1577 1578 /* Set the UART baud rate to 19200. */ 1579 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 1580 if (ret) { 1581 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 1582 return ret; 1583 } 1584 1585 ath10k_info(ar, "UART prints enabled\n"); 1586 return 0; 1587 } 1588 1589 static int ath10k_init_hw_params(struct ath10k *ar) 1590 { 1591 const struct ath10k_hw_params *uninitialized_var(hw_params); 1592 int i; 1593 1594 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 1595 hw_params = &ath10k_hw_params_list[i]; 1596 1597 if (hw_params->id == ar->target_version && 1598 hw_params->dev_id == ar->dev_id) 1599 break; 1600 } 1601 1602 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 1603 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 1604 ar->target_version); 1605 return -EINVAL; 1606 } 1607 1608 ar->hw_params = *hw_params; 1609 1610 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 1611 ar->hw_params.name, ar->target_version); 1612 1613 return 0; 1614 } 1615 1616 static void ath10k_core_restart(struct work_struct *work) 1617 { 1618 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 1619 int ret; 1620 1621 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1622 1623 /* Place a barrier to make sure the compiler doesn't reorder 1624 * CRASH_FLUSH and calling other functions. 1625 */ 1626 barrier(); 1627 1628 ieee80211_stop_queues(ar->hw); 1629 ath10k_drain_tx(ar); 1630 complete(&ar->scan.started); 1631 complete(&ar->scan.completed); 1632 complete(&ar->scan.on_channel); 1633 complete(&ar->offchan_tx_completed); 1634 complete(&ar->install_key_done); 1635 complete(&ar->vdev_setup_done); 1636 complete(&ar->thermal.wmi_sync); 1637 complete(&ar->bss_survey_done); 1638 wake_up(&ar->htt.empty_tx_wq); 1639 wake_up(&ar->wmi.tx_credits_wq); 1640 wake_up(&ar->peer_mapping_wq); 1641 1642 /* TODO: We can have one instance of cancelling coverage_class_work by 1643 * moving it to ath10k_halt(), so that both stop() and restart() would 1644 * call that but it takes conf_mutex() and if we call cancel_work_sync() 1645 * with conf_mutex it will deadlock. 1646 */ 1647 cancel_work_sync(&ar->set_coverage_class_work); 1648 1649 mutex_lock(&ar->conf_mutex); 1650 1651 switch (ar->state) { 1652 case ATH10K_STATE_ON: 1653 ar->state = ATH10K_STATE_RESTARTING; 1654 ath10k_halt(ar); 1655 ath10k_scan_finish(ar); 1656 ieee80211_restart_hw(ar->hw); 1657 break; 1658 case ATH10K_STATE_OFF: 1659 /* this can happen if driver is being unloaded 1660 * or if the crash happens during FW probing 1661 */ 1662 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 1663 break; 1664 case ATH10K_STATE_RESTARTING: 1665 /* hw restart might be requested from multiple places */ 1666 break; 1667 case ATH10K_STATE_RESTARTED: 1668 ar->state = ATH10K_STATE_WEDGED; 1669 /* fall through */ 1670 case ATH10K_STATE_WEDGED: 1671 ath10k_warn(ar, "device is wedged, will not restart\n"); 1672 break; 1673 case ATH10K_STATE_UTF: 1674 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 1675 break; 1676 } 1677 1678 mutex_unlock(&ar->conf_mutex); 1679 1680 ret = ath10k_debug_fw_devcoredump(ar); 1681 if (ret) 1682 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d", 1683 ret); 1684 } 1685 1686 static void ath10k_core_set_coverage_class_work(struct work_struct *work) 1687 { 1688 struct ath10k *ar = container_of(work, struct ath10k, 1689 set_coverage_class_work); 1690 1691 if (ar->hw_params.hw_ops->set_coverage_class) 1692 ar->hw_params.hw_ops->set_coverage_class(ar, -1); 1693 } 1694 1695 static int ath10k_core_init_firmware_features(struct ath10k *ar) 1696 { 1697 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 1698 1699 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) && 1700 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 1701 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 1702 return -EINVAL; 1703 } 1704 1705 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 1706 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 1707 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version); 1708 return -EINVAL; 1709 } 1710 1711 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 1712 switch (ath10k_cryptmode_param) { 1713 case ATH10K_CRYPT_MODE_HW: 1714 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1715 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1716 break; 1717 case ATH10K_CRYPT_MODE_SW: 1718 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1719 fw_file->fw_features)) { 1720 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 1721 return -EINVAL; 1722 } 1723 1724 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1725 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1726 break; 1727 default: 1728 ath10k_info(ar, "invalid cryptmode: %d\n", 1729 ath10k_cryptmode_param); 1730 return -EINVAL; 1731 } 1732 1733 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 1734 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 1735 1736 if (rawmode) { 1737 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1738 fw_file->fw_features)) { 1739 ath10k_err(ar, "rawmode = 1 requires support from firmware"); 1740 return -EINVAL; 1741 } 1742 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1743 } 1744 1745 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 1746 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 1747 1748 /* Workaround: 1749 * 1750 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 1751 * and causes enormous performance issues (malformed frames, 1752 * etc). 1753 * 1754 * Disabling A-MSDU makes RAW mode stable with heavy traffic 1755 * albeit a bit slower compared to regular operation. 1756 */ 1757 ar->htt.max_num_amsdu = 1; 1758 } 1759 1760 /* Backwards compatibility for firmwares without 1761 * ATH10K_FW_IE_WMI_OP_VERSION. 1762 */ 1763 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 1764 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 1765 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 1766 fw_file->fw_features)) 1767 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 1768 else 1769 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 1770 } else { 1771 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 1772 } 1773 } 1774 1775 switch (fw_file->wmi_op_version) { 1776 case ATH10K_FW_WMI_OP_VERSION_MAIN: 1777 ar->max_num_peers = TARGET_NUM_PEERS; 1778 ar->max_num_stations = TARGET_NUM_STATIONS; 1779 ar->max_num_vdevs = TARGET_NUM_VDEVS; 1780 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 1781 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1782 WMI_STAT_PEER; 1783 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1784 break; 1785 case ATH10K_FW_WMI_OP_VERSION_10_1: 1786 case ATH10K_FW_WMI_OP_VERSION_10_2: 1787 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 1788 if (ath10k_peer_stats_enabled(ar)) { 1789 ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS; 1790 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS; 1791 } else { 1792 ar->max_num_peers = TARGET_10X_NUM_PEERS; 1793 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 1794 } 1795 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 1796 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 1797 ar->fw_stats_req_mask = WMI_STAT_PEER; 1798 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1799 break; 1800 case ATH10K_FW_WMI_OP_VERSION_TLV: 1801 ar->max_num_peers = TARGET_TLV_NUM_PEERS; 1802 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 1803 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 1804 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 1805 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 1806 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 1807 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1808 WMI_STAT_PEER; 1809 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1810 break; 1811 case ATH10K_FW_WMI_OP_VERSION_10_4: 1812 ar->max_num_peers = TARGET_10_4_NUM_PEERS; 1813 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 1814 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 1815 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 1816 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 1817 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER | 1818 WMI_10_4_STAT_PEER_EXTD; 1819 ar->max_spatial_stream = ar->hw_params.max_spatial_stream; 1820 1821 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, 1822 fw_file->fw_features)) 1823 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC; 1824 else 1825 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 1826 break; 1827 case ATH10K_FW_WMI_OP_VERSION_UNSET: 1828 case ATH10K_FW_WMI_OP_VERSION_MAX: 1829 WARN_ON(1); 1830 return -EINVAL; 1831 } 1832 1833 /* Backwards compatibility for firmwares without 1834 * ATH10K_FW_IE_HTT_OP_VERSION. 1835 */ 1836 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 1837 switch (fw_file->wmi_op_version) { 1838 case ATH10K_FW_WMI_OP_VERSION_MAIN: 1839 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 1840 break; 1841 case ATH10K_FW_WMI_OP_VERSION_10_1: 1842 case ATH10K_FW_WMI_OP_VERSION_10_2: 1843 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 1844 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 1845 break; 1846 case ATH10K_FW_WMI_OP_VERSION_TLV: 1847 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 1848 break; 1849 case ATH10K_FW_WMI_OP_VERSION_10_4: 1850 case ATH10K_FW_WMI_OP_VERSION_UNSET: 1851 case ATH10K_FW_WMI_OP_VERSION_MAX: 1852 ath10k_err(ar, "htt op version not found from fw meta data"); 1853 return -EINVAL; 1854 } 1855 } 1856 1857 return 0; 1858 } 1859 1860 static int ath10k_core_reset_rx_filter(struct ath10k *ar) 1861 { 1862 int ret; 1863 int vdev_id; 1864 int vdev_type; 1865 int vdev_subtype; 1866 const u8 *vdev_addr; 1867 1868 vdev_id = 0; 1869 vdev_type = WMI_VDEV_TYPE_STA; 1870 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE); 1871 vdev_addr = ar->mac_addr; 1872 1873 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype, 1874 vdev_addr); 1875 if (ret) { 1876 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret); 1877 return ret; 1878 } 1879 1880 ret = ath10k_wmi_vdev_delete(ar, vdev_id); 1881 if (ret) { 1882 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret); 1883 return ret; 1884 } 1885 1886 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be 1887 * serialized properly implicitly. 1888 * 1889 * Moreover (most) WMI commands have no explicit acknowledges. It is 1890 * possible to infer it implicitly by poking firmware with echo 1891 * command - getting a reply means all preceding comments have been 1892 * (mostly) processed. 1893 * 1894 * In case of vdev create/delete this is sufficient. 1895 * 1896 * Without this it's possible to end up with a race when HTT Rx ring is 1897 * started before vdev create/delete hack is complete allowing a short 1898 * window of opportunity to receive (and Tx ACK) a bunch of frames. 1899 */ 1900 ret = ath10k_wmi_barrier(ar); 1901 if (ret) { 1902 ath10k_err(ar, "failed to ping firmware: %d\n", ret); 1903 return ret; 1904 } 1905 1906 return 0; 1907 } 1908 1909 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 1910 const struct ath10k_fw_components *fw) 1911 { 1912 int status; 1913 u32 val; 1914 1915 lockdep_assert_held(&ar->conf_mutex); 1916 1917 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1918 1919 ar->running_fw = fw; 1920 1921 ath10k_bmi_start(ar); 1922 1923 if (ath10k_init_configure_target(ar)) { 1924 status = -EINVAL; 1925 goto err; 1926 } 1927 1928 status = ath10k_download_cal_data(ar); 1929 if (status) 1930 goto err; 1931 1932 /* Some of of qca988x solutions are having global reset issue 1933 * during target initialization. Bypassing PLL setting before 1934 * downloading firmware and letting the SoC run on REF_CLK is 1935 * fixing the problem. Corresponding firmware change is also needed 1936 * to set the clock source once the target is initialized. 1937 */ 1938 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 1939 ar->running_fw->fw_file.fw_features)) { 1940 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 1941 if (status) { 1942 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 1943 status); 1944 goto err; 1945 } 1946 } 1947 1948 status = ath10k_download_fw(ar); 1949 if (status) 1950 goto err; 1951 1952 status = ath10k_init_uart(ar); 1953 if (status) 1954 goto err; 1955 1956 ar->htc.htc_ops.target_send_suspend_complete = 1957 ath10k_send_suspend_complete; 1958 1959 status = ath10k_htc_init(ar); 1960 if (status) { 1961 ath10k_err(ar, "could not init HTC (%d)\n", status); 1962 goto err; 1963 } 1964 1965 status = ath10k_bmi_done(ar); 1966 if (status) 1967 goto err; 1968 1969 status = ath10k_wmi_attach(ar); 1970 if (status) { 1971 ath10k_err(ar, "WMI attach failed: %d\n", status); 1972 goto err; 1973 } 1974 1975 status = ath10k_htt_init(ar); 1976 if (status) { 1977 ath10k_err(ar, "failed to init htt: %d\n", status); 1978 goto err_wmi_detach; 1979 } 1980 1981 status = ath10k_htt_tx_start(&ar->htt); 1982 if (status) { 1983 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 1984 goto err_wmi_detach; 1985 } 1986 1987 status = ath10k_htt_rx_alloc(&ar->htt); 1988 if (status) { 1989 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 1990 goto err_htt_tx_detach; 1991 } 1992 1993 status = ath10k_hif_start(ar); 1994 if (status) { 1995 ath10k_err(ar, "could not start HIF: %d\n", status); 1996 goto err_htt_rx_detach; 1997 } 1998 1999 status = ath10k_htc_wait_target(&ar->htc); 2000 if (status) { 2001 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 2002 goto err_hif_stop; 2003 } 2004 2005 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2006 status = ath10k_htt_connect(&ar->htt); 2007 if (status) { 2008 ath10k_err(ar, "failed to connect htt (%d)\n", status); 2009 goto err_hif_stop; 2010 } 2011 } 2012 2013 status = ath10k_wmi_connect(ar); 2014 if (status) { 2015 ath10k_err(ar, "could not connect wmi: %d\n", status); 2016 goto err_hif_stop; 2017 } 2018 2019 status = ath10k_htc_start(&ar->htc); 2020 if (status) { 2021 ath10k_err(ar, "failed to start htc: %d\n", status); 2022 goto err_hif_stop; 2023 } 2024 2025 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2026 status = ath10k_wmi_wait_for_service_ready(ar); 2027 if (status) { 2028 ath10k_warn(ar, "wmi service ready event not received"); 2029 goto err_hif_stop; 2030 } 2031 } 2032 2033 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 2034 ar->hw->wiphy->fw_version); 2035 2036 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) && 2037 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2038 val = 0; 2039 if (ath10k_peer_stats_enabled(ar)) 2040 val = WMI_10_4_PEER_STATS; 2041 2042 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) 2043 val |= WMI_10_4_BSS_CHANNEL_INFO_64; 2044 2045 /* 10.4 firmware supports BT-Coex without reloading firmware 2046 * via pdev param. To support Bluetooth coexistence pdev param, 2047 * WMI_COEX_GPIO_SUPPORT of extended resource config should be 2048 * enabled always. 2049 */ 2050 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 2051 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 2052 ar->running_fw->fw_file.fw_features)) 2053 val |= WMI_10_4_COEX_GPIO_SUPPORT; 2054 2055 status = ath10k_mac_ext_resource_config(ar, val); 2056 if (status) { 2057 ath10k_err(ar, 2058 "failed to send ext resource cfg command : %d\n", 2059 status); 2060 goto err_hif_stop; 2061 } 2062 } 2063 2064 status = ath10k_wmi_cmd_init(ar); 2065 if (status) { 2066 ath10k_err(ar, "could not send WMI init command (%d)\n", 2067 status); 2068 goto err_hif_stop; 2069 } 2070 2071 status = ath10k_wmi_wait_for_unified_ready(ar); 2072 if (status) { 2073 ath10k_err(ar, "wmi unified ready event not received\n"); 2074 goto err_hif_stop; 2075 } 2076 2077 /* Some firmware revisions do not properly set up hardware rx filter 2078 * registers. 2079 * 2080 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK 2081 * is filled with 0s instead of 1s allowing HW to respond with ACKs to 2082 * any frames that matches MAC_PCU_RX_FILTER which is also 2083 * misconfigured to accept anything. 2084 * 2085 * The ADDR1 is programmed using internal firmware structure field and 2086 * can't be (easily/sanely) reached from the driver explicitly. It is 2087 * possible to implicitly make it correct by creating a dummy vdev and 2088 * then deleting it. 2089 */ 2090 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2091 status = ath10k_core_reset_rx_filter(ar); 2092 if (status) { 2093 ath10k_err(ar, 2094 "failed to reset rx filter: %d\n", status); 2095 goto err_hif_stop; 2096 } 2097 } 2098 2099 /* If firmware indicates Full Rx Reorder support it must be used in a 2100 * slightly different manner. Let HTT code know. 2101 */ 2102 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 2103 ar->wmi.svc_map)); 2104 2105 status = ath10k_htt_rx_ring_refill(ar); 2106 if (status) { 2107 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 2108 goto err_hif_stop; 2109 } 2110 2111 if (ar->max_num_vdevs >= 64) 2112 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL; 2113 else 2114 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 2115 2116 INIT_LIST_HEAD(&ar->arvifs); 2117 2118 /* we don't care about HTT in UTF mode */ 2119 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2120 status = ath10k_htt_setup(&ar->htt); 2121 if (status) { 2122 ath10k_err(ar, "failed to setup htt: %d\n", status); 2123 goto err_hif_stop; 2124 } 2125 } 2126 2127 status = ath10k_debug_start(ar); 2128 if (status) 2129 goto err_hif_stop; 2130 2131 return 0; 2132 2133 err_hif_stop: 2134 ath10k_hif_stop(ar); 2135 err_htt_rx_detach: 2136 ath10k_htt_rx_free(&ar->htt); 2137 err_htt_tx_detach: 2138 ath10k_htt_tx_free(&ar->htt); 2139 err_wmi_detach: 2140 ath10k_wmi_detach(ar); 2141 err: 2142 return status; 2143 } 2144 EXPORT_SYMBOL(ath10k_core_start); 2145 2146 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 2147 { 2148 int ret; 2149 unsigned long time_left; 2150 2151 reinit_completion(&ar->target_suspend); 2152 2153 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 2154 if (ret) { 2155 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 2156 return ret; 2157 } 2158 2159 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 2160 2161 if (!time_left) { 2162 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 2163 return -ETIMEDOUT; 2164 } 2165 2166 return 0; 2167 } 2168 2169 void ath10k_core_stop(struct ath10k *ar) 2170 { 2171 lockdep_assert_held(&ar->conf_mutex); 2172 ath10k_debug_stop(ar); 2173 2174 /* try to suspend target */ 2175 if (ar->state != ATH10K_STATE_RESTARTING && 2176 ar->state != ATH10K_STATE_UTF) 2177 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 2178 2179 ath10k_hif_stop(ar); 2180 ath10k_htt_tx_stop(&ar->htt); 2181 ath10k_htt_rx_free(&ar->htt); 2182 ath10k_wmi_detach(ar); 2183 } 2184 EXPORT_SYMBOL(ath10k_core_stop); 2185 2186 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 2187 * order to know what hw capabilities should be advertised to mac80211 it is 2188 * necessary to load the firmware (and tear it down immediately since start 2189 * hook will try to init it again) before registering 2190 */ 2191 static int ath10k_core_probe_fw(struct ath10k *ar) 2192 { 2193 struct bmi_target_info target_info; 2194 int ret = 0; 2195 2196 ret = ath10k_hif_power_up(ar); 2197 if (ret) { 2198 ath10k_err(ar, "could not start pci hif (%d)\n", ret); 2199 return ret; 2200 } 2201 2202 memset(&target_info, 0, sizeof(target_info)); 2203 ret = ath10k_bmi_get_target_info(ar, &target_info); 2204 if (ret) { 2205 ath10k_err(ar, "could not get target info (%d)\n", ret); 2206 goto err_power_down; 2207 } 2208 2209 ar->target_version = target_info.version; 2210 ar->hw->wiphy->hw_version = target_info.version; 2211 2212 ret = ath10k_init_hw_params(ar); 2213 if (ret) { 2214 ath10k_err(ar, "could not get hw params (%d)\n", ret); 2215 goto err_power_down; 2216 } 2217 2218 ret = ath10k_core_fetch_firmware_files(ar); 2219 if (ret) { 2220 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 2221 goto err_power_down; 2222 } 2223 2224 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) != 2225 sizeof(ar->normal_mode_fw.fw_file.fw_version)); 2226 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version, 2227 sizeof(ar->hw->wiphy->fw_version)); 2228 2229 ath10k_debug_print_hwfw_info(ar); 2230 2231 ret = ath10k_core_pre_cal_download(ar); 2232 if (ret) { 2233 /* pre calibration data download is not necessary 2234 * for all the chipsets. Ignore failures and continue. 2235 */ 2236 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2237 "could not load pre cal data: %d\n", ret); 2238 } 2239 2240 ret = ath10k_core_get_board_id_from_otp(ar); 2241 if (ret && ret != -EOPNOTSUPP) { 2242 ath10k_err(ar, "failed to get board id from otp: %d\n", 2243 ret); 2244 goto err_free_firmware_files; 2245 } 2246 2247 ret = ath10k_core_check_smbios(ar); 2248 if (ret) 2249 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not set.\n"); 2250 2251 ret = ath10k_core_fetch_board_file(ar); 2252 if (ret) { 2253 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 2254 goto err_free_firmware_files; 2255 } 2256 2257 ath10k_debug_print_board_info(ar); 2258 2259 ret = ath10k_core_init_firmware_features(ar); 2260 if (ret) { 2261 ath10k_err(ar, "fatal problem with firmware features: %d\n", 2262 ret); 2263 goto err_free_firmware_files; 2264 } 2265 2266 ret = ath10k_swap_code_seg_init(ar, &ar->normal_mode_fw.fw_file); 2267 if (ret) { 2268 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 2269 ret); 2270 goto err_free_firmware_files; 2271 } 2272 2273 mutex_lock(&ar->conf_mutex); 2274 2275 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL, 2276 &ar->normal_mode_fw); 2277 if (ret) { 2278 ath10k_err(ar, "could not init core (%d)\n", ret); 2279 goto err_unlock; 2280 } 2281 2282 ath10k_debug_print_boot_info(ar); 2283 ath10k_core_stop(ar); 2284 2285 mutex_unlock(&ar->conf_mutex); 2286 2287 ath10k_hif_power_down(ar); 2288 return 0; 2289 2290 err_unlock: 2291 mutex_unlock(&ar->conf_mutex); 2292 2293 err_free_firmware_files: 2294 ath10k_core_free_firmware_files(ar); 2295 2296 err_power_down: 2297 ath10k_hif_power_down(ar); 2298 2299 return ret; 2300 } 2301 2302 static void ath10k_core_register_work(struct work_struct *work) 2303 { 2304 struct ath10k *ar = container_of(work, struct ath10k, register_work); 2305 int status; 2306 2307 /* peer stats are enabled by default */ 2308 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags); 2309 2310 status = ath10k_core_probe_fw(ar); 2311 if (status) { 2312 ath10k_err(ar, "could not probe fw (%d)\n", status); 2313 goto err; 2314 } 2315 2316 status = ath10k_mac_register(ar); 2317 if (status) { 2318 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 2319 goto err_release_fw; 2320 } 2321 2322 status = ath10k_debug_register(ar); 2323 if (status) { 2324 ath10k_err(ar, "unable to initialize debugfs\n"); 2325 goto err_unregister_mac; 2326 } 2327 2328 status = ath10k_spectral_create(ar); 2329 if (status) { 2330 ath10k_err(ar, "failed to initialize spectral\n"); 2331 goto err_debug_destroy; 2332 } 2333 2334 status = ath10k_thermal_register(ar); 2335 if (status) { 2336 ath10k_err(ar, "could not register thermal device: %d\n", 2337 status); 2338 goto err_spectral_destroy; 2339 } 2340 2341 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 2342 return; 2343 2344 err_spectral_destroy: 2345 ath10k_spectral_destroy(ar); 2346 err_debug_destroy: 2347 ath10k_debug_destroy(ar); 2348 err_unregister_mac: 2349 ath10k_mac_unregister(ar); 2350 err_release_fw: 2351 ath10k_core_free_firmware_files(ar); 2352 err: 2353 /* TODO: It's probably a good idea to release device from the driver 2354 * but calling device_release_driver() here will cause a deadlock. 2355 */ 2356 return; 2357 } 2358 2359 int ath10k_core_register(struct ath10k *ar, u32 chip_id) 2360 { 2361 ar->chip_id = chip_id; 2362 queue_work(ar->workqueue, &ar->register_work); 2363 2364 return 0; 2365 } 2366 EXPORT_SYMBOL(ath10k_core_register); 2367 2368 void ath10k_core_unregister(struct ath10k *ar) 2369 { 2370 cancel_work_sync(&ar->register_work); 2371 2372 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 2373 return; 2374 2375 ath10k_thermal_unregister(ar); 2376 /* Stop spectral before unregistering from mac80211 to remove the 2377 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 2378 * would be already be free'd recursively, leading to a double free. 2379 */ 2380 ath10k_spectral_destroy(ar); 2381 2382 /* We must unregister from mac80211 before we stop HTC and HIF. 2383 * Otherwise we will fail to submit commands to FW and mac80211 will be 2384 * unhappy about callback failures. 2385 */ 2386 ath10k_mac_unregister(ar); 2387 2388 ath10k_testmode_destroy(ar); 2389 2390 ath10k_core_free_firmware_files(ar); 2391 ath10k_core_free_board_files(ar); 2392 2393 ath10k_debug_unregister(ar); 2394 } 2395 EXPORT_SYMBOL(ath10k_core_unregister); 2396 2397 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 2398 enum ath10k_bus bus, 2399 enum ath10k_hw_rev hw_rev, 2400 const struct ath10k_hif_ops *hif_ops) 2401 { 2402 struct ath10k *ar; 2403 int ret; 2404 2405 ar = ath10k_mac_create(priv_size); 2406 if (!ar) 2407 return NULL; 2408 2409 ar->ath_common.priv = ar; 2410 ar->ath_common.hw = ar->hw; 2411 ar->dev = dev; 2412 ar->hw_rev = hw_rev; 2413 ar->hif.ops = hif_ops; 2414 ar->hif.bus = bus; 2415 2416 switch (hw_rev) { 2417 case ATH10K_HW_QCA988X: 2418 case ATH10K_HW_QCA9887: 2419 ar->regs = &qca988x_regs; 2420 ar->hw_values = &qca988x_values; 2421 break; 2422 case ATH10K_HW_QCA6174: 2423 case ATH10K_HW_QCA9377: 2424 ar->regs = &qca6174_regs; 2425 ar->hw_values = &qca6174_values; 2426 break; 2427 case ATH10K_HW_QCA99X0: 2428 case ATH10K_HW_QCA9984: 2429 ar->regs = &qca99x0_regs; 2430 ar->hw_values = &qca99x0_values; 2431 break; 2432 case ATH10K_HW_QCA9888: 2433 ar->regs = &qca99x0_regs; 2434 ar->hw_values = &qca9888_values; 2435 break; 2436 case ATH10K_HW_QCA4019: 2437 ar->regs = &qca4019_regs; 2438 ar->hw_values = &qca4019_values; 2439 break; 2440 default: 2441 ath10k_err(ar, "unsupported core hardware revision %d\n", 2442 hw_rev); 2443 ret = -ENOTSUPP; 2444 goto err_free_mac; 2445 } 2446 2447 init_completion(&ar->scan.started); 2448 init_completion(&ar->scan.completed); 2449 init_completion(&ar->scan.on_channel); 2450 init_completion(&ar->target_suspend); 2451 init_completion(&ar->wow.wakeup_completed); 2452 2453 init_completion(&ar->install_key_done); 2454 init_completion(&ar->vdev_setup_done); 2455 init_completion(&ar->thermal.wmi_sync); 2456 init_completion(&ar->bss_survey_done); 2457 2458 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 2459 2460 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 2461 if (!ar->workqueue) 2462 goto err_free_mac; 2463 2464 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 2465 if (!ar->workqueue_aux) 2466 goto err_free_wq; 2467 2468 mutex_init(&ar->conf_mutex); 2469 spin_lock_init(&ar->data_lock); 2470 spin_lock_init(&ar->txqs_lock); 2471 2472 INIT_LIST_HEAD(&ar->txqs); 2473 INIT_LIST_HEAD(&ar->peers); 2474 init_waitqueue_head(&ar->peer_mapping_wq); 2475 init_waitqueue_head(&ar->htt.empty_tx_wq); 2476 init_waitqueue_head(&ar->wmi.tx_credits_wq); 2477 2478 init_completion(&ar->offchan_tx_completed); 2479 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 2480 skb_queue_head_init(&ar->offchan_tx_queue); 2481 2482 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 2483 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 2484 2485 INIT_WORK(&ar->register_work, ath10k_core_register_work); 2486 INIT_WORK(&ar->restart_work, ath10k_core_restart); 2487 INIT_WORK(&ar->set_coverage_class_work, 2488 ath10k_core_set_coverage_class_work); 2489 2490 init_dummy_netdev(&ar->napi_dev); 2491 2492 ret = ath10k_debug_create(ar); 2493 if (ret) 2494 goto err_free_aux_wq; 2495 2496 return ar; 2497 2498 err_free_aux_wq: 2499 destroy_workqueue(ar->workqueue_aux); 2500 err_free_wq: 2501 destroy_workqueue(ar->workqueue); 2502 2503 err_free_mac: 2504 ath10k_mac_destroy(ar); 2505 2506 return NULL; 2507 } 2508 EXPORT_SYMBOL(ath10k_core_create); 2509 2510 void ath10k_core_destroy(struct ath10k *ar) 2511 { 2512 flush_workqueue(ar->workqueue); 2513 destroy_workqueue(ar->workqueue); 2514 2515 flush_workqueue(ar->workqueue_aux); 2516 destroy_workqueue(ar->workqueue_aux); 2517 2518 ath10k_debug_destroy(ar); 2519 ath10k_htt_tx_destroy(&ar->htt); 2520 ath10k_wmi_free_host_mem(ar); 2521 ath10k_mac_destroy(ar); 2522 } 2523 EXPORT_SYMBOL(ath10k_core_destroy); 2524 2525 MODULE_AUTHOR("Qualcomm Atheros"); 2526 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards."); 2527 MODULE_LICENSE("Dual BSD/GPL"); 2528