1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (c) 2005-2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. 6 */ 7 8 #include <linux/module.h> 9 #include <linux/firmware.h> 10 #include <linux/of.h> 11 #include <linux/property.h> 12 #include <linux/dmi.h> 13 #include <linux/ctype.h> 14 #include <linux/pm_qos.h> 15 #include <asm/byteorder.h> 16 17 #include "core.h" 18 #include "mac.h" 19 #include "htc.h" 20 #include "hif.h" 21 #include "wmi.h" 22 #include "bmi.h" 23 #include "debug.h" 24 #include "htt.h" 25 #include "testmode.h" 26 #include "wmi-ops.h" 27 #include "coredump.h" 28 29 unsigned int ath10k_debug_mask; 30 EXPORT_SYMBOL(ath10k_debug_mask); 31 32 static unsigned int ath10k_cryptmode_param; 33 static bool uart_print; 34 static bool skip_otp; 35 static bool rawmode; 36 static bool fw_diag_log; 37 38 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) | 39 BIT(ATH10K_FW_CRASH_DUMP_CE_DATA); 40 41 /* FIXME: most of these should be readonly */ 42 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 43 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 44 module_param(uart_print, bool, 0644); 45 module_param(skip_otp, bool, 0644); 46 module_param(rawmode, bool, 0644); 47 module_param(fw_diag_log, bool, 0644); 48 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444); 49 50 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 51 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 52 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 53 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 54 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); 55 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file"); 56 MODULE_PARM_DESC(fw_diag_log, "Diag based fw log debugging"); 57 58 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 59 { 60 .id = QCA988X_HW_2_0_VERSION, 61 .dev_id = QCA988X_2_0_DEVICE_ID, 62 .bus = ATH10K_BUS_PCI, 63 .name = "qca988x hw2.0", 64 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 65 .uart_pin = 7, 66 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 67 .otp_exe_param = 0, 68 .channel_counters_freq_hz = 88000, 69 .max_probe_resp_desc_thres = 0, 70 .cal_data_len = 2116, 71 .fw = { 72 .dir = QCA988X_HW_2_0_FW_DIR, 73 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 74 .board_size = QCA988X_BOARD_DATA_SZ, 75 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 76 }, 77 .hw_ops = &qca988x_ops, 78 .decap_align_bytes = 4, 79 .spectral_bin_discard = 0, 80 .spectral_bin_offset = 0, 81 .vht160_mcs_rx_highest = 0, 82 .vht160_mcs_tx_highest = 0, 83 .n_cipher_suites = 8, 84 .ast_skid_limit = 0x10, 85 .num_wds_entries = 0x20, 86 .target_64bit = false, 87 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 88 .shadow_reg_support = false, 89 .rri_on_ddr = false, 90 .hw_filter_reset_required = true, 91 .fw_diag_ce_download = false, 92 .tx_stats_over_pktlog = true, 93 }, 94 { 95 .id = QCA988X_HW_2_0_VERSION, 96 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT, 97 .name = "qca988x hw2.0 ubiquiti", 98 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 99 .uart_pin = 7, 100 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 101 .otp_exe_param = 0, 102 .channel_counters_freq_hz = 88000, 103 .max_probe_resp_desc_thres = 0, 104 .cal_data_len = 2116, 105 .fw = { 106 .dir = QCA988X_HW_2_0_FW_DIR, 107 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 108 .board_size = QCA988X_BOARD_DATA_SZ, 109 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 110 }, 111 .hw_ops = &qca988x_ops, 112 .decap_align_bytes = 4, 113 .spectral_bin_discard = 0, 114 .spectral_bin_offset = 0, 115 .vht160_mcs_rx_highest = 0, 116 .vht160_mcs_tx_highest = 0, 117 .n_cipher_suites = 8, 118 .ast_skid_limit = 0x10, 119 .num_wds_entries = 0x20, 120 .target_64bit = false, 121 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 122 .per_ce_irq = false, 123 .shadow_reg_support = false, 124 .rri_on_ddr = false, 125 .hw_filter_reset_required = true, 126 .fw_diag_ce_download = false, 127 .tx_stats_over_pktlog = true, 128 }, 129 { 130 .id = QCA9887_HW_1_0_VERSION, 131 .dev_id = QCA9887_1_0_DEVICE_ID, 132 .bus = ATH10K_BUS_PCI, 133 .name = "qca9887 hw1.0", 134 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR, 135 .uart_pin = 7, 136 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 137 .otp_exe_param = 0, 138 .channel_counters_freq_hz = 88000, 139 .max_probe_resp_desc_thres = 0, 140 .cal_data_len = 2116, 141 .fw = { 142 .dir = QCA9887_HW_1_0_FW_DIR, 143 .board = QCA9887_HW_1_0_BOARD_DATA_FILE, 144 .board_size = QCA9887_BOARD_DATA_SZ, 145 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ, 146 }, 147 .hw_ops = &qca988x_ops, 148 .decap_align_bytes = 4, 149 .spectral_bin_discard = 0, 150 .spectral_bin_offset = 0, 151 .vht160_mcs_rx_highest = 0, 152 .vht160_mcs_tx_highest = 0, 153 .n_cipher_suites = 8, 154 .ast_skid_limit = 0x10, 155 .num_wds_entries = 0x20, 156 .target_64bit = false, 157 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 158 .per_ce_irq = false, 159 .shadow_reg_support = false, 160 .rri_on_ddr = false, 161 .hw_filter_reset_required = true, 162 .fw_diag_ce_download = false, 163 .tx_stats_over_pktlog = false, 164 }, 165 { 166 .id = QCA6174_HW_3_2_VERSION, 167 .dev_id = QCA6174_3_2_DEVICE_ID, 168 .bus = ATH10K_BUS_SDIO, 169 .name = "qca6174 hw3.2 sdio", 170 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 171 .uart_pin = 19, 172 .otp_exe_param = 0, 173 .channel_counters_freq_hz = 88000, 174 .max_probe_resp_desc_thres = 0, 175 .cal_data_len = 0, 176 .fw = { 177 .dir = QCA6174_HW_3_0_FW_DIR, 178 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 179 .board_size = QCA6174_BOARD_DATA_SZ, 180 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 181 }, 182 .hw_ops = &qca6174_sdio_ops, 183 .hw_clk = qca6174_clk, 184 .target_cpu_freq = 176000000, 185 .decap_align_bytes = 4, 186 .n_cipher_suites = 8, 187 .num_peers = 10, 188 .ast_skid_limit = 0x10, 189 .num_wds_entries = 0x20, 190 .uart_pin_workaround = true, 191 .tx_stats_over_pktlog = false, 192 }, 193 { 194 .id = QCA6174_HW_2_1_VERSION, 195 .dev_id = QCA6164_2_1_DEVICE_ID, 196 .bus = ATH10K_BUS_PCI, 197 .name = "qca6164 hw2.1", 198 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 199 .uart_pin = 6, 200 .otp_exe_param = 0, 201 .channel_counters_freq_hz = 88000, 202 .max_probe_resp_desc_thres = 0, 203 .cal_data_len = 8124, 204 .fw = { 205 .dir = QCA6174_HW_2_1_FW_DIR, 206 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 207 .board_size = QCA6174_BOARD_DATA_SZ, 208 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 209 }, 210 .hw_ops = &qca988x_ops, 211 .decap_align_bytes = 4, 212 .spectral_bin_discard = 0, 213 .spectral_bin_offset = 0, 214 .vht160_mcs_rx_highest = 0, 215 .vht160_mcs_tx_highest = 0, 216 .n_cipher_suites = 8, 217 .ast_skid_limit = 0x10, 218 .num_wds_entries = 0x20, 219 .target_64bit = false, 220 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 221 .per_ce_irq = false, 222 .shadow_reg_support = false, 223 .rri_on_ddr = false, 224 .hw_filter_reset_required = true, 225 .fw_diag_ce_download = false, 226 .tx_stats_over_pktlog = false, 227 }, 228 { 229 .id = QCA6174_HW_2_1_VERSION, 230 .dev_id = QCA6174_2_1_DEVICE_ID, 231 .bus = ATH10K_BUS_PCI, 232 .name = "qca6174 hw2.1", 233 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 234 .uart_pin = 6, 235 .otp_exe_param = 0, 236 .channel_counters_freq_hz = 88000, 237 .max_probe_resp_desc_thres = 0, 238 .cal_data_len = 8124, 239 .fw = { 240 .dir = QCA6174_HW_2_1_FW_DIR, 241 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 242 .board_size = QCA6174_BOARD_DATA_SZ, 243 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 244 }, 245 .hw_ops = &qca988x_ops, 246 .decap_align_bytes = 4, 247 .spectral_bin_discard = 0, 248 .spectral_bin_offset = 0, 249 .vht160_mcs_rx_highest = 0, 250 .vht160_mcs_tx_highest = 0, 251 .n_cipher_suites = 8, 252 .ast_skid_limit = 0x10, 253 .num_wds_entries = 0x20, 254 .target_64bit = false, 255 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 256 .per_ce_irq = false, 257 .shadow_reg_support = false, 258 .rri_on_ddr = false, 259 .hw_filter_reset_required = true, 260 .fw_diag_ce_download = false, 261 .tx_stats_over_pktlog = false, 262 }, 263 { 264 .id = QCA6174_HW_3_0_VERSION, 265 .dev_id = QCA6174_2_1_DEVICE_ID, 266 .bus = ATH10K_BUS_PCI, 267 .name = "qca6174 hw3.0", 268 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 269 .uart_pin = 6, 270 .otp_exe_param = 0, 271 .channel_counters_freq_hz = 88000, 272 .max_probe_resp_desc_thres = 0, 273 .cal_data_len = 8124, 274 .fw = { 275 .dir = QCA6174_HW_3_0_FW_DIR, 276 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 277 .board_size = QCA6174_BOARD_DATA_SZ, 278 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 279 }, 280 .hw_ops = &qca988x_ops, 281 .decap_align_bytes = 4, 282 .spectral_bin_discard = 0, 283 .spectral_bin_offset = 0, 284 .vht160_mcs_rx_highest = 0, 285 .vht160_mcs_tx_highest = 0, 286 .n_cipher_suites = 8, 287 .ast_skid_limit = 0x10, 288 .num_wds_entries = 0x20, 289 .target_64bit = false, 290 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 291 .per_ce_irq = false, 292 .shadow_reg_support = false, 293 .rri_on_ddr = false, 294 .hw_filter_reset_required = true, 295 .fw_diag_ce_download = false, 296 .tx_stats_over_pktlog = false, 297 }, 298 { 299 .id = QCA6174_HW_3_2_VERSION, 300 .dev_id = QCA6174_2_1_DEVICE_ID, 301 .bus = ATH10K_BUS_PCI, 302 .name = "qca6174 hw3.2", 303 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 304 .uart_pin = 6, 305 .otp_exe_param = 0, 306 .channel_counters_freq_hz = 88000, 307 .max_probe_resp_desc_thres = 0, 308 .cal_data_len = 8124, 309 .fw = { 310 /* uses same binaries as hw3.0 */ 311 .dir = QCA6174_HW_3_0_FW_DIR, 312 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 313 .board_size = QCA6174_BOARD_DATA_SZ, 314 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 315 }, 316 .hw_ops = &qca6174_ops, 317 .hw_clk = qca6174_clk, 318 .target_cpu_freq = 176000000, 319 .decap_align_bytes = 4, 320 .spectral_bin_discard = 0, 321 .spectral_bin_offset = 0, 322 .vht160_mcs_rx_highest = 0, 323 .vht160_mcs_tx_highest = 0, 324 .n_cipher_suites = 8, 325 .ast_skid_limit = 0x10, 326 .num_wds_entries = 0x20, 327 .target_64bit = false, 328 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 329 .per_ce_irq = false, 330 .shadow_reg_support = false, 331 .rri_on_ddr = false, 332 .hw_filter_reset_required = true, 333 .fw_diag_ce_download = true, 334 .tx_stats_over_pktlog = false, 335 }, 336 { 337 .id = QCA99X0_HW_2_0_DEV_VERSION, 338 .dev_id = QCA99X0_2_0_DEVICE_ID, 339 .bus = ATH10K_BUS_PCI, 340 .name = "qca99x0 hw2.0", 341 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 342 .uart_pin = 7, 343 .otp_exe_param = 0x00000700, 344 .continuous_frag_desc = true, 345 .cck_rate_map_rev2 = true, 346 .channel_counters_freq_hz = 150000, 347 .max_probe_resp_desc_thres = 24, 348 .tx_chain_mask = 0xf, 349 .rx_chain_mask = 0xf, 350 .max_spatial_stream = 4, 351 .cal_data_len = 12064, 352 .fw = { 353 .dir = QCA99X0_HW_2_0_FW_DIR, 354 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 355 .board_size = QCA99X0_BOARD_DATA_SZ, 356 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 357 }, 358 .sw_decrypt_mcast_mgmt = true, 359 .hw_ops = &qca99x0_ops, 360 .decap_align_bytes = 1, 361 .spectral_bin_discard = 4, 362 .spectral_bin_offset = 0, 363 .vht160_mcs_rx_highest = 0, 364 .vht160_mcs_tx_highest = 0, 365 .n_cipher_suites = 11, 366 .ast_skid_limit = 0x10, 367 .num_wds_entries = 0x20, 368 .target_64bit = false, 369 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 370 .per_ce_irq = false, 371 .shadow_reg_support = false, 372 .rri_on_ddr = false, 373 .hw_filter_reset_required = true, 374 .fw_diag_ce_download = false, 375 .tx_stats_over_pktlog = false, 376 }, 377 { 378 .id = QCA9984_HW_1_0_DEV_VERSION, 379 .dev_id = QCA9984_1_0_DEVICE_ID, 380 .bus = ATH10K_BUS_PCI, 381 .name = "qca9984/qca9994 hw1.0", 382 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR, 383 .uart_pin = 7, 384 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 385 .otp_exe_param = 0x00000700, 386 .continuous_frag_desc = true, 387 .cck_rate_map_rev2 = true, 388 .channel_counters_freq_hz = 150000, 389 .max_probe_resp_desc_thres = 24, 390 .tx_chain_mask = 0xf, 391 .rx_chain_mask = 0xf, 392 .max_spatial_stream = 4, 393 .cal_data_len = 12064, 394 .fw = { 395 .dir = QCA9984_HW_1_0_FW_DIR, 396 .board = QCA9984_HW_1_0_BOARD_DATA_FILE, 397 .eboard = QCA9984_HW_1_0_EBOARD_DATA_FILE, 398 .board_size = QCA99X0_BOARD_DATA_SZ, 399 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 400 .ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ, 401 }, 402 .sw_decrypt_mcast_mgmt = true, 403 .hw_ops = &qca99x0_ops, 404 .decap_align_bytes = 1, 405 .spectral_bin_discard = 12, 406 .spectral_bin_offset = 8, 407 408 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz 409 * or 2x2 160Mhz, long-guard-interval. 410 */ 411 .vht160_mcs_rx_highest = 1560, 412 .vht160_mcs_tx_highest = 1560, 413 .n_cipher_suites = 11, 414 .ast_skid_limit = 0x10, 415 .num_wds_entries = 0x20, 416 .target_64bit = false, 417 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 418 .per_ce_irq = false, 419 .shadow_reg_support = false, 420 .rri_on_ddr = false, 421 .hw_filter_reset_required = true, 422 .fw_diag_ce_download = false, 423 .tx_stats_over_pktlog = false, 424 }, 425 { 426 .id = QCA9888_HW_2_0_DEV_VERSION, 427 .dev_id = QCA9888_2_0_DEVICE_ID, 428 .bus = ATH10K_BUS_PCI, 429 .name = "qca9888 hw2.0", 430 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR, 431 .uart_pin = 7, 432 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 433 .otp_exe_param = 0x00000700, 434 .continuous_frag_desc = true, 435 .channel_counters_freq_hz = 150000, 436 .max_probe_resp_desc_thres = 24, 437 .tx_chain_mask = 3, 438 .rx_chain_mask = 3, 439 .max_spatial_stream = 2, 440 .cal_data_len = 12064, 441 .fw = { 442 .dir = QCA9888_HW_2_0_FW_DIR, 443 .board = QCA9888_HW_2_0_BOARD_DATA_FILE, 444 .board_size = QCA99X0_BOARD_DATA_SZ, 445 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 446 }, 447 .sw_decrypt_mcast_mgmt = true, 448 .hw_ops = &qca99x0_ops, 449 .decap_align_bytes = 1, 450 .spectral_bin_discard = 12, 451 .spectral_bin_offset = 8, 452 453 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or 454 * 1x1 160Mhz, long-guard-interval. 455 */ 456 .vht160_mcs_rx_highest = 780, 457 .vht160_mcs_tx_highest = 780, 458 .n_cipher_suites = 11, 459 .ast_skid_limit = 0x10, 460 .num_wds_entries = 0x20, 461 .target_64bit = false, 462 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 463 .per_ce_irq = false, 464 .shadow_reg_support = false, 465 .rri_on_ddr = false, 466 .hw_filter_reset_required = true, 467 .fw_diag_ce_download = false, 468 .tx_stats_over_pktlog = false, 469 }, 470 { 471 .id = QCA9377_HW_1_0_DEV_VERSION, 472 .dev_id = QCA9377_1_0_DEVICE_ID, 473 .bus = ATH10K_BUS_PCI, 474 .name = "qca9377 hw1.0", 475 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 476 .uart_pin = 6, 477 .otp_exe_param = 0, 478 .channel_counters_freq_hz = 88000, 479 .max_probe_resp_desc_thres = 0, 480 .cal_data_len = 8124, 481 .fw = { 482 .dir = QCA9377_HW_1_0_FW_DIR, 483 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 484 .board_size = QCA9377_BOARD_DATA_SZ, 485 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 486 }, 487 .hw_ops = &qca988x_ops, 488 .decap_align_bytes = 4, 489 .spectral_bin_discard = 0, 490 .spectral_bin_offset = 0, 491 .vht160_mcs_rx_highest = 0, 492 .vht160_mcs_tx_highest = 0, 493 .n_cipher_suites = 8, 494 .ast_skid_limit = 0x10, 495 .num_wds_entries = 0x20, 496 .target_64bit = false, 497 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 498 .per_ce_irq = false, 499 .shadow_reg_support = false, 500 .rri_on_ddr = false, 501 .hw_filter_reset_required = true, 502 .fw_diag_ce_download = false, 503 .tx_stats_over_pktlog = false, 504 }, 505 { 506 .id = QCA9377_HW_1_1_DEV_VERSION, 507 .dev_id = QCA9377_1_0_DEVICE_ID, 508 .bus = ATH10K_BUS_PCI, 509 .name = "qca9377 hw1.1", 510 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 511 .uart_pin = 6, 512 .otp_exe_param = 0, 513 .channel_counters_freq_hz = 88000, 514 .max_probe_resp_desc_thres = 0, 515 .cal_data_len = 8124, 516 .fw = { 517 .dir = QCA9377_HW_1_0_FW_DIR, 518 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 519 .board_size = QCA9377_BOARD_DATA_SZ, 520 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 521 }, 522 .hw_ops = &qca6174_ops, 523 .hw_clk = qca6174_clk, 524 .target_cpu_freq = 176000000, 525 .decap_align_bytes = 4, 526 .spectral_bin_discard = 0, 527 .spectral_bin_offset = 0, 528 .vht160_mcs_rx_highest = 0, 529 .vht160_mcs_tx_highest = 0, 530 .n_cipher_suites = 8, 531 .ast_skid_limit = 0x10, 532 .num_wds_entries = 0x20, 533 .target_64bit = false, 534 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 535 .per_ce_irq = false, 536 .shadow_reg_support = false, 537 .rri_on_ddr = false, 538 .hw_filter_reset_required = true, 539 .fw_diag_ce_download = true, 540 .tx_stats_over_pktlog = false, 541 }, 542 { 543 .id = QCA4019_HW_1_0_DEV_VERSION, 544 .dev_id = 0, 545 .bus = ATH10K_BUS_AHB, 546 .name = "qca4019 hw1.0", 547 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR, 548 .uart_pin = 7, 549 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 550 .otp_exe_param = 0x0010000, 551 .continuous_frag_desc = true, 552 .cck_rate_map_rev2 = true, 553 .channel_counters_freq_hz = 125000, 554 .max_probe_resp_desc_thres = 24, 555 .tx_chain_mask = 0x3, 556 .rx_chain_mask = 0x3, 557 .max_spatial_stream = 2, 558 .cal_data_len = 12064, 559 .fw = { 560 .dir = QCA4019_HW_1_0_FW_DIR, 561 .board = QCA4019_HW_1_0_BOARD_DATA_FILE, 562 .board_size = QCA4019_BOARD_DATA_SZ, 563 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, 564 }, 565 .sw_decrypt_mcast_mgmt = true, 566 .hw_ops = &qca99x0_ops, 567 .decap_align_bytes = 1, 568 .spectral_bin_discard = 4, 569 .spectral_bin_offset = 0, 570 .vht160_mcs_rx_highest = 0, 571 .vht160_mcs_tx_highest = 0, 572 .n_cipher_suites = 11, 573 .ast_skid_limit = 0x10, 574 .num_wds_entries = 0x20, 575 .target_64bit = false, 576 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 577 .per_ce_irq = false, 578 .shadow_reg_support = false, 579 .rri_on_ddr = false, 580 .hw_filter_reset_required = true, 581 .fw_diag_ce_download = false, 582 .tx_stats_over_pktlog = false, 583 }, 584 { 585 .id = WCN3990_HW_1_0_DEV_VERSION, 586 .dev_id = 0, 587 .bus = ATH10K_BUS_SNOC, 588 .name = "wcn3990 hw1.0", 589 .continuous_frag_desc = true, 590 .tx_chain_mask = 0x7, 591 .rx_chain_mask = 0x7, 592 .max_spatial_stream = 4, 593 .fw = { 594 .dir = WCN3990_HW_1_0_FW_DIR, 595 }, 596 .sw_decrypt_mcast_mgmt = true, 597 .hw_ops = &wcn3990_ops, 598 .decap_align_bytes = 1, 599 .num_peers = TARGET_HL_TLV_NUM_PEERS, 600 .n_cipher_suites = 11, 601 .ast_skid_limit = TARGET_HL_TLV_AST_SKID_LIMIT, 602 .num_wds_entries = TARGET_HL_TLV_NUM_WDS_ENTRIES, 603 .target_64bit = true, 604 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC, 605 .per_ce_irq = true, 606 .shadow_reg_support = true, 607 .rri_on_ddr = true, 608 .hw_filter_reset_required = false, 609 .fw_diag_ce_download = false, 610 .tx_stats_over_pktlog = false, 611 }, 612 }; 613 614 static const char *const ath10k_core_fw_feature_str[] = { 615 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 616 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 617 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 618 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 619 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 620 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 621 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 622 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 623 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 624 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 625 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 626 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 627 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", 628 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl", 629 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param", 630 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war", 631 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast", 632 [ATH10K_FW_FEATURE_NO_PS] = "no-ps", 633 [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference", 634 [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi", 635 [ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL] = "single-chan-info-per-channel", 636 [ATH10K_FW_FEATURE_PEER_FIXED_RATE] = "peer-fixed-rate", 637 }; 638 639 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 640 size_t buf_len, 641 enum ath10k_fw_features feat) 642 { 643 /* make sure that ath10k_core_fw_feature_str[] gets updated */ 644 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != 645 ATH10K_FW_FEATURE_COUNT); 646 647 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 648 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 649 return scnprintf(buf, buf_len, "bit%d", feat); 650 } 651 652 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 653 } 654 655 void ath10k_core_get_fw_features_str(struct ath10k *ar, 656 char *buf, 657 size_t buf_len) 658 { 659 size_t len = 0; 660 int i; 661 662 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 663 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) { 664 if (len > 0) 665 len += scnprintf(buf + len, buf_len - len, ","); 666 667 len += ath10k_core_get_fw_feature_str(buf + len, 668 buf_len - len, 669 i); 670 } 671 } 672 } 673 674 static void ath10k_send_suspend_complete(struct ath10k *ar) 675 { 676 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 677 678 complete(&ar->target_suspend); 679 } 680 681 static int ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode) 682 { 683 int ret; 684 u32 param = 0; 685 686 ret = ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256); 687 if (ret) 688 return ret; 689 690 ret = ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99); 691 if (ret) 692 return ret; 693 694 ret = ath10k_bmi_read32(ar, hi_acs_flags, ¶m); 695 if (ret) 696 return ret; 697 698 /* Data transfer is not initiated, when reduced Tx completion 699 * is used for SDIO. disable it until fixed 700 */ 701 param &= ~HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET; 702 703 /* Alternate credit size of 1544 as used by SDIO firmware is 704 * not big enough for mac80211 / native wifi frames. disable it 705 */ 706 param &= ~HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE; 707 708 if (mode == ATH10K_FIRMWARE_MODE_UTF) 709 param &= ~HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET; 710 else 711 param |= HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET; 712 713 ret = ath10k_bmi_write32(ar, hi_acs_flags, param); 714 if (ret) 715 return ret; 716 717 /* Explicitly set fwlog prints to zero as target may turn it on 718 * based on scratch registers. 719 */ 720 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m); 721 if (ret) 722 return ret; 723 724 param |= HI_OPTION_DISABLE_DBGLOG; 725 ret = ath10k_bmi_write32(ar, hi_option_flag, param); 726 if (ret) 727 return ret; 728 729 return 0; 730 } 731 732 static int ath10k_init_configure_target(struct ath10k *ar) 733 { 734 u32 param_host; 735 int ret; 736 737 /* tell target which HTC version it is used*/ 738 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 739 HTC_PROTOCOL_VERSION); 740 if (ret) { 741 ath10k_err(ar, "settings HTC version failed\n"); 742 return ret; 743 } 744 745 /* set the firmware mode to STA/IBSS/AP */ 746 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 747 if (ret) { 748 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 749 return ret; 750 } 751 752 /* TODO following parameters need to be re-visited. */ 753 /* num_device */ 754 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 755 /* Firmware mode */ 756 /* FIXME: Why FW_MODE_AP ??.*/ 757 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 758 /* mac_addr_method */ 759 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 760 /* firmware_bridge */ 761 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 762 /* fwsubmode */ 763 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 764 765 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 766 if (ret) { 767 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 768 return ret; 769 } 770 771 /* We do all byte-swapping on the host */ 772 ret = ath10k_bmi_write32(ar, hi_be, 0); 773 if (ret) { 774 ath10k_err(ar, "setting host CPU BE mode failed\n"); 775 return ret; 776 } 777 778 /* FW descriptor/Data swap flags */ 779 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 780 781 if (ret) { 782 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 783 return ret; 784 } 785 786 /* Some devices have a special sanity check that verifies the PCI 787 * Device ID is written to this host interest var. It is known to be 788 * required to boot QCA6164. 789 */ 790 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 791 ar->dev_id); 792 if (ret) { 793 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 794 return ret; 795 } 796 797 return 0; 798 } 799 800 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 801 const char *dir, 802 const char *file) 803 { 804 char filename[100]; 805 const struct firmware *fw; 806 int ret; 807 808 if (file == NULL) 809 return ERR_PTR(-ENOENT); 810 811 if (dir == NULL) 812 dir = "."; 813 814 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 815 ret = firmware_request_nowarn(&fw, filename, ar->dev); 816 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n", 817 filename, ret); 818 819 if (ret) 820 return ERR_PTR(ret); 821 822 return fw; 823 } 824 825 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 826 size_t data_len) 827 { 828 u32 board_data_size = ar->hw_params.fw.board_size; 829 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 830 u32 board_ext_data_addr; 831 int ret; 832 833 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 834 if (ret) { 835 ath10k_err(ar, "could not read board ext data addr (%d)\n", 836 ret); 837 return ret; 838 } 839 840 ath10k_dbg(ar, ATH10K_DBG_BOOT, 841 "boot push board extended data addr 0x%x\n", 842 board_ext_data_addr); 843 844 if (board_ext_data_addr == 0) 845 return 0; 846 847 if (data_len != (board_data_size + board_ext_data_size)) { 848 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 849 data_len, board_data_size, board_ext_data_size); 850 return -EINVAL; 851 } 852 853 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 854 data + board_data_size, 855 board_ext_data_size); 856 if (ret) { 857 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 858 return ret; 859 } 860 861 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 862 (board_ext_data_size << 16) | 1); 863 if (ret) { 864 ath10k_err(ar, "could not write board ext data bit (%d)\n", 865 ret); 866 return ret; 867 } 868 869 return 0; 870 } 871 872 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) 873 { 874 u32 result, address; 875 u8 board_id, chip_id; 876 bool ext_bid_support; 877 int ret, bmi_board_id_param; 878 879 address = ar->hw_params.patch_load_addr; 880 881 if (!ar->normal_mode_fw.fw_file.otp_data || 882 !ar->normal_mode_fw.fw_file.otp_len) { 883 ath10k_warn(ar, 884 "failed to retrieve board id because of invalid otp\n"); 885 return -ENODATA; 886 } 887 888 ath10k_dbg(ar, ATH10K_DBG_BOOT, 889 "boot upload otp to 0x%x len %zd for board id\n", 890 address, ar->normal_mode_fw.fw_file.otp_len); 891 892 ret = ath10k_bmi_fast_download(ar, address, 893 ar->normal_mode_fw.fw_file.otp_data, 894 ar->normal_mode_fw.fw_file.otp_len); 895 if (ret) { 896 ath10k_err(ar, "could not write otp for board id check: %d\n", 897 ret); 898 return ret; 899 } 900 901 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 902 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 903 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID; 904 else 905 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID; 906 907 ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result); 908 if (ret) { 909 ath10k_err(ar, "could not execute otp for board id check: %d\n", 910 ret); 911 return ret; 912 } 913 914 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); 915 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); 916 ext_bid_support = (result & ATH10K_BMI_EXT_BOARD_ID_SUPPORT); 917 918 ath10k_dbg(ar, ATH10K_DBG_BOOT, 919 "boot get otp board id result 0x%08x board_id %d chip_id %d ext_bid_support %d\n", 920 result, board_id, chip_id, ext_bid_support); 921 922 ar->id.ext_bid_supported = ext_bid_support; 923 924 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 || 925 (board_id == 0)) { 926 ath10k_dbg(ar, ATH10K_DBG_BOOT, 927 "board id does not exist in otp, ignore it\n"); 928 return -EOPNOTSUPP; 929 } 930 931 ar->id.bmi_ids_valid = true; 932 ar->id.bmi_board_id = board_id; 933 ar->id.bmi_chip_id = chip_id; 934 935 return 0; 936 } 937 938 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data) 939 { 940 struct ath10k *ar = data; 941 const char *bdf_ext; 942 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC; 943 u8 bdf_enabled; 944 int i; 945 946 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE) 947 return; 948 949 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) { 950 ath10k_dbg(ar, ATH10K_DBG_BOOT, 951 "wrong smbios bdf ext type length (%d).\n", 952 hdr->length); 953 return; 954 } 955 956 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET); 957 if (!bdf_enabled) { 958 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n"); 959 return; 960 } 961 962 /* Only one string exists (per spec) */ 963 bdf_ext = (char *)hdr + hdr->length; 964 965 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) { 966 ath10k_dbg(ar, ATH10K_DBG_BOOT, 967 "bdf variant magic does not match.\n"); 968 return; 969 } 970 971 for (i = 0; i < strlen(bdf_ext); i++) { 972 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) { 973 ath10k_dbg(ar, ATH10K_DBG_BOOT, 974 "bdf variant name contains non ascii chars.\n"); 975 return; 976 } 977 } 978 979 /* Copy extension name without magic suffix */ 980 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic), 981 sizeof(ar->id.bdf_ext)) < 0) { 982 ath10k_dbg(ar, ATH10K_DBG_BOOT, 983 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 984 bdf_ext); 985 return; 986 } 987 988 ath10k_dbg(ar, ATH10K_DBG_BOOT, 989 "found and validated bdf variant smbios_type 0x%x bdf %s\n", 990 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext); 991 } 992 993 static int ath10k_core_check_smbios(struct ath10k *ar) 994 { 995 ar->id.bdf_ext[0] = '\0'; 996 dmi_walk(ath10k_core_check_bdfext, ar); 997 998 if (ar->id.bdf_ext[0] == '\0') 999 return -ENODATA; 1000 1001 return 0; 1002 } 1003 1004 static int ath10k_core_check_dt(struct ath10k *ar) 1005 { 1006 struct device_node *node; 1007 const char *variant = NULL; 1008 1009 node = ar->dev->of_node; 1010 if (!node) 1011 return -ENOENT; 1012 1013 of_property_read_string(node, "qcom,ath10k-calibration-variant", 1014 &variant); 1015 if (!variant) 1016 return -ENODATA; 1017 1018 if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0) 1019 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1020 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 1021 variant); 1022 1023 return 0; 1024 } 1025 1026 static int ath10k_download_fw(struct ath10k *ar) 1027 { 1028 u32 address, data_len; 1029 const void *data; 1030 int ret; 1031 struct pm_qos_request latency_qos; 1032 1033 address = ar->hw_params.patch_load_addr; 1034 1035 data = ar->running_fw->fw_file.firmware_data; 1036 data_len = ar->running_fw->fw_file.firmware_len; 1037 1038 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file); 1039 if (ret) { 1040 ath10k_err(ar, "failed to configure fw code swap: %d\n", 1041 ret); 1042 return ret; 1043 } 1044 1045 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1046 "boot uploading firmware image %pK len %d\n", 1047 data, data_len); 1048 1049 /* Check if device supports to download firmware via 1050 * diag copy engine. Downloading firmware via diag CE 1051 * greatly reduces the time to download firmware. 1052 */ 1053 if (ar->hw_params.fw_diag_ce_download) { 1054 ret = ath10k_hw_diag_fast_download(ar, address, 1055 data, data_len); 1056 if (ret == 0) 1057 /* firmware upload via diag ce was successful */ 1058 return 0; 1059 1060 ath10k_warn(ar, 1061 "failed to upload firmware via diag ce, trying BMI: %d", 1062 ret); 1063 } 1064 1065 memset(&latency_qos, 0, sizeof(latency_qos)); 1066 pm_qos_add_request(&latency_qos, PM_QOS_CPU_DMA_LATENCY, 0); 1067 1068 ret = ath10k_bmi_fast_download(ar, address, data, data_len); 1069 1070 pm_qos_remove_request(&latency_qos); 1071 1072 return ret; 1073 } 1074 1075 void ath10k_core_free_board_files(struct ath10k *ar) 1076 { 1077 if (!IS_ERR(ar->normal_mode_fw.board)) 1078 release_firmware(ar->normal_mode_fw.board); 1079 1080 if (!IS_ERR(ar->normal_mode_fw.ext_board)) 1081 release_firmware(ar->normal_mode_fw.ext_board); 1082 1083 ar->normal_mode_fw.board = NULL; 1084 ar->normal_mode_fw.board_data = NULL; 1085 ar->normal_mode_fw.board_len = 0; 1086 ar->normal_mode_fw.ext_board = NULL; 1087 ar->normal_mode_fw.ext_board_data = NULL; 1088 ar->normal_mode_fw.ext_board_len = 0; 1089 } 1090 EXPORT_SYMBOL(ath10k_core_free_board_files); 1091 1092 static void ath10k_core_free_firmware_files(struct ath10k *ar) 1093 { 1094 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware)) 1095 release_firmware(ar->normal_mode_fw.fw_file.firmware); 1096 1097 if (!IS_ERR(ar->cal_file)) 1098 release_firmware(ar->cal_file); 1099 1100 if (!IS_ERR(ar->pre_cal_file)) 1101 release_firmware(ar->pre_cal_file); 1102 1103 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file); 1104 1105 ar->normal_mode_fw.fw_file.otp_data = NULL; 1106 ar->normal_mode_fw.fw_file.otp_len = 0; 1107 1108 ar->normal_mode_fw.fw_file.firmware = NULL; 1109 ar->normal_mode_fw.fw_file.firmware_data = NULL; 1110 ar->normal_mode_fw.fw_file.firmware_len = 0; 1111 1112 ar->cal_file = NULL; 1113 ar->pre_cal_file = NULL; 1114 } 1115 1116 static int ath10k_fetch_cal_file(struct ath10k *ar) 1117 { 1118 char filename[100]; 1119 1120 /* pre-cal-<bus>-<id>.bin */ 1121 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin", 1122 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1123 1124 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1125 if (!IS_ERR(ar->pre_cal_file)) 1126 goto success; 1127 1128 /* cal-<bus>-<id>.bin */ 1129 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 1130 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1131 1132 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1133 if (IS_ERR(ar->cal_file)) 1134 /* calibration file is optional, don't print any warnings */ 1135 return PTR_ERR(ar->cal_file); 1136 success: 1137 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 1138 ATH10K_FW_DIR, filename); 1139 1140 return 0; 1141 } 1142 1143 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar, int bd_ie_type) 1144 { 1145 const struct firmware *fw; 1146 1147 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1148 if (!ar->hw_params.fw.board) { 1149 ath10k_err(ar, "failed to find board file fw entry\n"); 1150 return -EINVAL; 1151 } 1152 1153 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1154 ar->hw_params.fw.dir, 1155 ar->hw_params.fw.board); 1156 if (IS_ERR(ar->normal_mode_fw.board)) 1157 return PTR_ERR(ar->normal_mode_fw.board); 1158 1159 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data; 1160 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size; 1161 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1162 if (!ar->hw_params.fw.eboard) { 1163 ath10k_err(ar, "failed to find eboard file fw entry\n"); 1164 return -EINVAL; 1165 } 1166 1167 fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1168 ar->hw_params.fw.eboard); 1169 ar->normal_mode_fw.ext_board = fw; 1170 if (IS_ERR(ar->normal_mode_fw.ext_board)) 1171 return PTR_ERR(ar->normal_mode_fw.ext_board); 1172 1173 ar->normal_mode_fw.ext_board_data = ar->normal_mode_fw.ext_board->data; 1174 ar->normal_mode_fw.ext_board_len = ar->normal_mode_fw.ext_board->size; 1175 } 1176 1177 return 0; 1178 } 1179 1180 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, 1181 const void *buf, size_t buf_len, 1182 const char *boardname, 1183 int bd_ie_type) 1184 { 1185 const struct ath10k_fw_ie *hdr; 1186 bool name_match_found; 1187 int ret, board_ie_id; 1188 size_t board_ie_len; 1189 const void *board_ie_data; 1190 1191 name_match_found = false; 1192 1193 /* go through ATH10K_BD_IE_BOARD_ elements */ 1194 while (buf_len > sizeof(struct ath10k_fw_ie)) { 1195 hdr = buf; 1196 board_ie_id = le32_to_cpu(hdr->id); 1197 board_ie_len = le32_to_cpu(hdr->len); 1198 board_ie_data = hdr->data; 1199 1200 buf_len -= sizeof(*hdr); 1201 buf += sizeof(*hdr); 1202 1203 if (buf_len < ALIGN(board_ie_len, 4)) { 1204 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", 1205 buf_len, ALIGN(board_ie_len, 4)); 1206 ret = -EINVAL; 1207 goto out; 1208 } 1209 1210 switch (board_ie_id) { 1211 case ATH10K_BD_IE_BOARD_NAME: 1212 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", 1213 board_ie_data, board_ie_len); 1214 1215 if (board_ie_len != strlen(boardname)) 1216 break; 1217 1218 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 1219 if (ret) 1220 break; 1221 1222 name_match_found = true; 1223 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1224 "boot found match for name '%s'", 1225 boardname); 1226 break; 1227 case ATH10K_BD_IE_BOARD_DATA: 1228 if (!name_match_found) 1229 /* no match found */ 1230 break; 1231 1232 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1233 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1234 "boot found board data for '%s'", 1235 boardname); 1236 1237 ar->normal_mode_fw.board_data = board_ie_data; 1238 ar->normal_mode_fw.board_len = board_ie_len; 1239 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1240 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1241 "boot found eboard data for '%s'", 1242 boardname); 1243 1244 ar->normal_mode_fw.ext_board_data = board_ie_data; 1245 ar->normal_mode_fw.ext_board_len = board_ie_len; 1246 } 1247 1248 ret = 0; 1249 goto out; 1250 default: 1251 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", 1252 board_ie_id); 1253 break; 1254 } 1255 1256 /* jump over the padding */ 1257 board_ie_len = ALIGN(board_ie_len, 4); 1258 1259 buf_len -= board_ie_len; 1260 buf += board_ie_len; 1261 } 1262 1263 /* no match found */ 1264 ret = -ENOENT; 1265 1266 out: 1267 return ret; 1268 } 1269 1270 static int ath10k_core_search_bd(struct ath10k *ar, 1271 const char *boardname, 1272 const u8 *data, 1273 size_t len) 1274 { 1275 size_t ie_len; 1276 struct ath10k_fw_ie *hdr; 1277 int ret = -ENOENT, ie_id; 1278 1279 while (len > sizeof(struct ath10k_fw_ie)) { 1280 hdr = (struct ath10k_fw_ie *)data; 1281 ie_id = le32_to_cpu(hdr->id); 1282 ie_len = le32_to_cpu(hdr->len); 1283 1284 len -= sizeof(*hdr); 1285 data = hdr->data; 1286 1287 if (len < ALIGN(ie_len, 4)) { 1288 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", 1289 ie_id, ie_len, len); 1290 return -EINVAL; 1291 } 1292 1293 switch (ie_id) { 1294 case ATH10K_BD_IE_BOARD: 1295 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1296 boardname, 1297 ATH10K_BD_IE_BOARD); 1298 if (ret == -ENOENT) 1299 /* no match found, continue */ 1300 break; 1301 1302 /* either found or error, so stop searching */ 1303 goto out; 1304 case ATH10K_BD_IE_BOARD_EXT: 1305 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1306 boardname, 1307 ATH10K_BD_IE_BOARD_EXT); 1308 if (ret == -ENOENT) 1309 /* no match found, continue */ 1310 break; 1311 1312 /* either found or error, so stop searching */ 1313 goto out; 1314 } 1315 1316 /* jump over the padding */ 1317 ie_len = ALIGN(ie_len, 4); 1318 1319 len -= ie_len; 1320 data += ie_len; 1321 } 1322 1323 out: 1324 /* return result of parse_bd_ie_board() or -ENOENT */ 1325 return ret; 1326 } 1327 1328 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, 1329 const char *boardname, 1330 const char *fallback_boardname, 1331 const char *filename) 1332 { 1333 size_t len, magic_len; 1334 const u8 *data; 1335 int ret; 1336 1337 /* Skip if already fetched during board data download */ 1338 if (!ar->normal_mode_fw.board) 1339 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1340 ar->hw_params.fw.dir, 1341 filename); 1342 if (IS_ERR(ar->normal_mode_fw.board)) 1343 return PTR_ERR(ar->normal_mode_fw.board); 1344 1345 data = ar->normal_mode_fw.board->data; 1346 len = ar->normal_mode_fw.board->size; 1347 1348 /* magic has extra null byte padded */ 1349 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; 1350 if (len < magic_len) { 1351 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", 1352 ar->hw_params.fw.dir, filename, len); 1353 ret = -EINVAL; 1354 goto err; 1355 } 1356 1357 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { 1358 ath10k_err(ar, "found invalid board magic\n"); 1359 ret = -EINVAL; 1360 goto err; 1361 } 1362 1363 /* magic is padded to 4 bytes */ 1364 magic_len = ALIGN(magic_len, 4); 1365 if (len < magic_len) { 1366 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", 1367 ar->hw_params.fw.dir, filename, len); 1368 ret = -EINVAL; 1369 goto err; 1370 } 1371 1372 data += magic_len; 1373 len -= magic_len; 1374 1375 /* attempt to find boardname in the IE list */ 1376 ret = ath10k_core_search_bd(ar, boardname, data, len); 1377 1378 /* if we didn't find it and have a fallback name, try that */ 1379 if (ret == -ENOENT && fallback_boardname) 1380 ret = ath10k_core_search_bd(ar, fallback_boardname, data, len); 1381 1382 if (ret == -ENOENT) { 1383 ath10k_err(ar, 1384 "failed to fetch board data for %s from %s/%s\n", 1385 boardname, ar->hw_params.fw.dir, filename); 1386 ret = -ENODATA; 1387 } 1388 1389 if (ret) 1390 goto err; 1391 1392 return 0; 1393 1394 err: 1395 ath10k_core_free_board_files(ar); 1396 return ret; 1397 } 1398 1399 static int ath10k_core_create_board_name(struct ath10k *ar, char *name, 1400 size_t name_len, bool with_variant) 1401 { 1402 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */ 1403 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 }; 1404 1405 if (with_variant && ar->id.bdf_ext[0] != '\0') 1406 scnprintf(variant, sizeof(variant), ",variant=%s", 1407 ar->id.bdf_ext); 1408 1409 if (ar->id.bmi_ids_valid) { 1410 scnprintf(name, name_len, 1411 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s", 1412 ath10k_bus_str(ar->hif.bus), 1413 ar->id.bmi_chip_id, 1414 ar->id.bmi_board_id, variant); 1415 goto out; 1416 } 1417 1418 if (ar->id.qmi_ids_valid) { 1419 scnprintf(name, name_len, 1420 "bus=%s,qmi-board-id=%x", 1421 ath10k_bus_str(ar->hif.bus), 1422 ar->id.qmi_board_id); 1423 goto out; 1424 } 1425 1426 scnprintf(name, name_len, 1427 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s", 1428 ath10k_bus_str(ar->hif.bus), 1429 ar->id.vendor, ar->id.device, 1430 ar->id.subsystem_vendor, ar->id.subsystem_device, variant); 1431 out: 1432 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); 1433 1434 return 0; 1435 } 1436 1437 static int ath10k_core_create_eboard_name(struct ath10k *ar, char *name, 1438 size_t name_len) 1439 { 1440 if (ar->id.bmi_ids_valid) { 1441 scnprintf(name, name_len, 1442 "bus=%s,bmi-chip-id=%d,bmi-eboard-id=%d", 1443 ath10k_bus_str(ar->hif.bus), 1444 ar->id.bmi_chip_id, 1445 ar->id.bmi_eboard_id); 1446 1447 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using eboard name '%s'\n", name); 1448 return 0; 1449 } 1450 /* Fallback if returned board id is zero */ 1451 return -1; 1452 } 1453 1454 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type) 1455 { 1456 char boardname[100], fallback_boardname[100]; 1457 int ret; 1458 1459 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1460 ret = ath10k_core_create_board_name(ar, boardname, 1461 sizeof(boardname), true); 1462 if (ret) { 1463 ath10k_err(ar, "failed to create board name: %d", ret); 1464 return ret; 1465 } 1466 1467 ret = ath10k_core_create_board_name(ar, fallback_boardname, 1468 sizeof(boardname), false); 1469 if (ret) { 1470 ath10k_err(ar, "failed to create fallback board name: %d", ret); 1471 return ret; 1472 } 1473 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1474 ret = ath10k_core_create_eboard_name(ar, boardname, 1475 sizeof(boardname)); 1476 if (ret) { 1477 ath10k_err(ar, "fallback to eboard.bin since board id 0"); 1478 goto fallback; 1479 } 1480 } 1481 1482 ar->bd_api = 2; 1483 ret = ath10k_core_fetch_board_data_api_n(ar, boardname, 1484 fallback_boardname, 1485 ATH10K_BOARD_API2_FILE); 1486 if (!ret) 1487 goto success; 1488 1489 fallback: 1490 ar->bd_api = 1; 1491 ret = ath10k_core_fetch_board_data_api_1(ar, bd_ie_type); 1492 if (ret) { 1493 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n", 1494 ar->hw_params.fw.dir); 1495 return ret; 1496 } 1497 1498 success: 1499 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); 1500 return 0; 1501 } 1502 EXPORT_SYMBOL(ath10k_core_fetch_board_file); 1503 1504 static int ath10k_core_get_ext_board_id_from_otp(struct ath10k *ar) 1505 { 1506 u32 result, address; 1507 u8 ext_board_id; 1508 int ret; 1509 1510 address = ar->hw_params.patch_load_addr; 1511 1512 if (!ar->normal_mode_fw.fw_file.otp_data || 1513 !ar->normal_mode_fw.fw_file.otp_len) { 1514 ath10k_warn(ar, 1515 "failed to retrieve extended board id due to otp binary missing\n"); 1516 return -ENODATA; 1517 } 1518 1519 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1520 "boot upload otp to 0x%x len %zd for ext board id\n", 1521 address, ar->normal_mode_fw.fw_file.otp_len); 1522 1523 ret = ath10k_bmi_fast_download(ar, address, 1524 ar->normal_mode_fw.fw_file.otp_data, 1525 ar->normal_mode_fw.fw_file.otp_len); 1526 if (ret) { 1527 ath10k_err(ar, "could not write otp for ext board id check: %d\n", 1528 ret); 1529 return ret; 1530 } 1531 1532 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EXT_BOARD_ID, &result); 1533 if (ret) { 1534 ath10k_err(ar, "could not execute otp for ext board id check: %d\n", 1535 ret); 1536 return ret; 1537 } 1538 1539 if (!result) { 1540 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1541 "ext board id does not exist in otp, ignore it\n"); 1542 return -EOPNOTSUPP; 1543 } 1544 1545 ext_board_id = result & ATH10K_BMI_EBOARD_ID_STATUS_MASK; 1546 1547 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1548 "boot get otp ext board id result 0x%08x ext_board_id %d\n", 1549 result, ext_board_id); 1550 1551 ar->id.bmi_eboard_id = ext_board_id; 1552 1553 return 0; 1554 } 1555 1556 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 1557 size_t data_len) 1558 { 1559 u32 board_data_size = ar->hw_params.fw.board_size; 1560 u32 eboard_data_size = ar->hw_params.fw.ext_board_size; 1561 u32 board_address; 1562 u32 ext_board_address; 1563 int ret; 1564 1565 ret = ath10k_push_board_ext_data(ar, data, data_len); 1566 if (ret) { 1567 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 1568 goto exit; 1569 } 1570 1571 ret = ath10k_bmi_read32(ar, hi_board_data, &board_address); 1572 if (ret) { 1573 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 1574 goto exit; 1575 } 1576 1577 ret = ath10k_bmi_write_memory(ar, board_address, data, 1578 min_t(u32, board_data_size, 1579 data_len)); 1580 if (ret) { 1581 ath10k_err(ar, "could not write board data (%d)\n", ret); 1582 goto exit; 1583 } 1584 1585 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 1586 if (ret) { 1587 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 1588 goto exit; 1589 } 1590 1591 if (!ar->id.ext_bid_supported) 1592 goto exit; 1593 1594 /* Extended board data download */ 1595 ret = ath10k_core_get_ext_board_id_from_otp(ar); 1596 if (ret == -EOPNOTSUPP) { 1597 /* Not fetching ext_board_data if ext board id is 0 */ 1598 ath10k_dbg(ar, ATH10K_DBG_BOOT, "otp returned ext board id 0\n"); 1599 return 0; 1600 } else if (ret) { 1601 ath10k_err(ar, "failed to get extended board id: %d\n", ret); 1602 goto exit; 1603 } 1604 1605 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD_EXT); 1606 if (ret) 1607 goto exit; 1608 1609 if (ar->normal_mode_fw.ext_board_data) { 1610 ext_board_address = board_address + EXT_BOARD_ADDRESS_OFFSET; 1611 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1612 "boot writing ext board data to addr 0x%x", 1613 ext_board_address); 1614 ret = ath10k_bmi_write_memory(ar, ext_board_address, 1615 ar->normal_mode_fw.ext_board_data, 1616 min_t(u32, eboard_data_size, data_len)); 1617 if (ret) 1618 ath10k_err(ar, "failed to write ext board data: %d\n", ret); 1619 } 1620 1621 exit: 1622 return ret; 1623 } 1624 1625 static int ath10k_download_and_run_otp(struct ath10k *ar) 1626 { 1627 u32 result, address = ar->hw_params.patch_load_addr; 1628 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 1629 int ret; 1630 1631 ret = ath10k_download_board_data(ar, 1632 ar->running_fw->board_data, 1633 ar->running_fw->board_len); 1634 if (ret) { 1635 ath10k_err(ar, "failed to download board data: %d\n", ret); 1636 return ret; 1637 } 1638 1639 /* OTP is optional */ 1640 1641 if (!ar->running_fw->fw_file.otp_data || 1642 !ar->running_fw->fw_file.otp_len) { 1643 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n", 1644 ar->running_fw->fw_file.otp_data, 1645 ar->running_fw->fw_file.otp_len); 1646 return 0; 1647 } 1648 1649 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 1650 address, ar->running_fw->fw_file.otp_len); 1651 1652 ret = ath10k_bmi_fast_download(ar, address, 1653 ar->running_fw->fw_file.otp_data, 1654 ar->running_fw->fw_file.otp_len); 1655 if (ret) { 1656 ath10k_err(ar, "could not write otp (%d)\n", ret); 1657 return ret; 1658 } 1659 1660 /* As of now pre-cal is valid for 10_4 variants */ 1661 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 1662 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 1663 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL; 1664 1665 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 1666 if (ret) { 1667 ath10k_err(ar, "could not execute otp (%d)\n", ret); 1668 return ret; 1669 } 1670 1671 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 1672 1673 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 1674 ar->running_fw->fw_file.fw_features)) && 1675 result != 0) { 1676 ath10k_err(ar, "otp calibration failed: %d", result); 1677 return -EINVAL; 1678 } 1679 1680 return 0; 1681 } 1682 1683 static int ath10k_download_cal_file(struct ath10k *ar, 1684 const struct firmware *file) 1685 { 1686 int ret; 1687 1688 if (!file) 1689 return -ENOENT; 1690 1691 if (IS_ERR(file)) 1692 return PTR_ERR(file); 1693 1694 ret = ath10k_download_board_data(ar, file->data, file->size); 1695 if (ret) { 1696 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 1697 return ret; 1698 } 1699 1700 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 1701 1702 return 0; 1703 } 1704 1705 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name) 1706 { 1707 struct device_node *node; 1708 int data_len; 1709 void *data; 1710 int ret; 1711 1712 node = ar->dev->of_node; 1713 if (!node) 1714 /* Device Tree is optional, don't print any warnings if 1715 * there's no node for ath10k. 1716 */ 1717 return -ENOENT; 1718 1719 if (!of_get_property(node, dt_name, &data_len)) { 1720 /* The calibration data node is optional */ 1721 return -ENOENT; 1722 } 1723 1724 if (data_len != ar->hw_params.cal_data_len) { 1725 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 1726 data_len); 1727 ret = -EMSGSIZE; 1728 goto out; 1729 } 1730 1731 data = kmalloc(data_len, GFP_KERNEL); 1732 if (!data) { 1733 ret = -ENOMEM; 1734 goto out; 1735 } 1736 1737 ret = of_property_read_u8_array(node, dt_name, data, data_len); 1738 if (ret) { 1739 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 1740 ret); 1741 goto out_free; 1742 } 1743 1744 ret = ath10k_download_board_data(ar, data, data_len); 1745 if (ret) { 1746 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 1747 ret); 1748 goto out_free; 1749 } 1750 1751 ret = 0; 1752 1753 out_free: 1754 kfree(data); 1755 1756 out: 1757 return ret; 1758 } 1759 1760 static int ath10k_download_cal_eeprom(struct ath10k *ar) 1761 { 1762 size_t data_len; 1763 void *data = NULL; 1764 int ret; 1765 1766 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len); 1767 if (ret) { 1768 if (ret != -EOPNOTSUPP) 1769 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n", 1770 ret); 1771 goto out_free; 1772 } 1773 1774 ret = ath10k_download_board_data(ar, data, data_len); 1775 if (ret) { 1776 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n", 1777 ret); 1778 goto out_free; 1779 } 1780 1781 ret = 0; 1782 1783 out_free: 1784 kfree(data); 1785 1786 return ret; 1787 } 1788 1789 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1790 struct ath10k_fw_file *fw_file) 1791 { 1792 size_t magic_len, len, ie_len; 1793 int ie_id, i, index, bit, ret; 1794 struct ath10k_fw_ie *hdr; 1795 const u8 *data; 1796 __le32 *timestamp, *version; 1797 1798 /* first fetch the firmware file (firmware-*.bin) */ 1799 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1800 name); 1801 if (IS_ERR(fw_file->firmware)) 1802 return PTR_ERR(fw_file->firmware); 1803 1804 data = fw_file->firmware->data; 1805 len = fw_file->firmware->size; 1806 1807 /* magic also includes the null byte, check that as well */ 1808 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 1809 1810 if (len < magic_len) { 1811 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 1812 ar->hw_params.fw.dir, name, len); 1813 ret = -EINVAL; 1814 goto err; 1815 } 1816 1817 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 1818 ath10k_err(ar, "invalid firmware magic\n"); 1819 ret = -EINVAL; 1820 goto err; 1821 } 1822 1823 /* jump over the padding */ 1824 magic_len = ALIGN(magic_len, 4); 1825 1826 len -= magic_len; 1827 data += magic_len; 1828 1829 /* loop elements */ 1830 while (len > sizeof(struct ath10k_fw_ie)) { 1831 hdr = (struct ath10k_fw_ie *)data; 1832 1833 ie_id = le32_to_cpu(hdr->id); 1834 ie_len = le32_to_cpu(hdr->len); 1835 1836 len -= sizeof(*hdr); 1837 data += sizeof(*hdr); 1838 1839 if (len < ie_len) { 1840 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 1841 ie_id, len, ie_len); 1842 ret = -EINVAL; 1843 goto err; 1844 } 1845 1846 switch (ie_id) { 1847 case ATH10K_FW_IE_FW_VERSION: 1848 if (ie_len > sizeof(fw_file->fw_version) - 1) 1849 break; 1850 1851 memcpy(fw_file->fw_version, data, ie_len); 1852 fw_file->fw_version[ie_len] = '\0'; 1853 1854 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1855 "found fw version %s\n", 1856 fw_file->fw_version); 1857 break; 1858 case ATH10K_FW_IE_TIMESTAMP: 1859 if (ie_len != sizeof(u32)) 1860 break; 1861 1862 timestamp = (__le32 *)data; 1863 1864 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 1865 le32_to_cpup(timestamp)); 1866 break; 1867 case ATH10K_FW_IE_FEATURES: 1868 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1869 "found firmware features ie (%zd B)\n", 1870 ie_len); 1871 1872 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 1873 index = i / 8; 1874 bit = i % 8; 1875 1876 if (index == ie_len) 1877 break; 1878 1879 if (data[index] & (1 << bit)) { 1880 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1881 "Enabling feature bit: %i\n", 1882 i); 1883 __set_bit(i, fw_file->fw_features); 1884 } 1885 } 1886 1887 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 1888 fw_file->fw_features, 1889 sizeof(fw_file->fw_features)); 1890 break; 1891 case ATH10K_FW_IE_FW_IMAGE: 1892 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1893 "found fw image ie (%zd B)\n", 1894 ie_len); 1895 1896 fw_file->firmware_data = data; 1897 fw_file->firmware_len = ie_len; 1898 1899 break; 1900 case ATH10K_FW_IE_OTP_IMAGE: 1901 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1902 "found otp image ie (%zd B)\n", 1903 ie_len); 1904 1905 fw_file->otp_data = data; 1906 fw_file->otp_len = ie_len; 1907 1908 break; 1909 case ATH10K_FW_IE_WMI_OP_VERSION: 1910 if (ie_len != sizeof(u32)) 1911 break; 1912 1913 version = (__le32 *)data; 1914 1915 fw_file->wmi_op_version = le32_to_cpup(version); 1916 1917 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 1918 fw_file->wmi_op_version); 1919 break; 1920 case ATH10K_FW_IE_HTT_OP_VERSION: 1921 if (ie_len != sizeof(u32)) 1922 break; 1923 1924 version = (__le32 *)data; 1925 1926 fw_file->htt_op_version = le32_to_cpup(version); 1927 1928 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 1929 fw_file->htt_op_version); 1930 break; 1931 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 1932 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1933 "found fw code swap image ie (%zd B)\n", 1934 ie_len); 1935 fw_file->codeswap_data = data; 1936 fw_file->codeswap_len = ie_len; 1937 break; 1938 default: 1939 ath10k_warn(ar, "Unknown FW IE: %u\n", 1940 le32_to_cpu(hdr->id)); 1941 break; 1942 } 1943 1944 /* jump over the padding */ 1945 ie_len = ALIGN(ie_len, 4); 1946 1947 len -= ie_len; 1948 data += ie_len; 1949 } 1950 1951 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) && 1952 (!fw_file->firmware_data || !fw_file->firmware_len)) { 1953 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 1954 ar->hw_params.fw.dir, name); 1955 ret = -ENOMEDIUM; 1956 goto err; 1957 } 1958 1959 return 0; 1960 1961 err: 1962 ath10k_core_free_firmware_files(ar); 1963 return ret; 1964 } 1965 1966 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name, 1967 size_t fw_name_len, int fw_api) 1968 { 1969 switch (ar->hif.bus) { 1970 case ATH10K_BUS_SDIO: 1971 case ATH10K_BUS_USB: 1972 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin", 1973 ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus), 1974 fw_api); 1975 break; 1976 case ATH10K_BUS_PCI: 1977 case ATH10K_BUS_AHB: 1978 case ATH10K_BUS_SNOC: 1979 scnprintf(fw_name, fw_name_len, "%s-%d.bin", 1980 ATH10K_FW_FILE_BASE, fw_api); 1981 break; 1982 } 1983 } 1984 1985 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 1986 { 1987 int ret, i; 1988 char fw_name[100]; 1989 1990 /* calibration file is optional, don't check for any errors */ 1991 ath10k_fetch_cal_file(ar); 1992 1993 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) { 1994 ar->fw_api = i; 1995 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", 1996 ar->fw_api); 1997 1998 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api); 1999 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name, 2000 &ar->normal_mode_fw.fw_file); 2001 if (!ret) 2002 goto success; 2003 } 2004 2005 /* we end up here if we couldn't fetch any firmware */ 2006 2007 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d", 2008 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir, 2009 ret); 2010 2011 return ret; 2012 2013 success: 2014 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 2015 2016 return 0; 2017 } 2018 2019 static int ath10k_core_pre_cal_download(struct ath10k *ar) 2020 { 2021 int ret; 2022 2023 ret = ath10k_download_cal_file(ar, ar->pre_cal_file); 2024 if (ret == 0) { 2025 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE; 2026 goto success; 2027 } 2028 2029 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2030 "boot did not find a pre calibration file, try DT next: %d\n", 2031 ret); 2032 2033 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data"); 2034 if (ret) { 2035 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2036 "unable to load pre cal data from DT: %d\n", ret); 2037 return ret; 2038 } 2039 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT; 2040 2041 success: 2042 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 2043 ath10k_cal_mode_str(ar->cal_mode)); 2044 2045 return 0; 2046 } 2047 2048 static int ath10k_core_pre_cal_config(struct ath10k *ar) 2049 { 2050 int ret; 2051 2052 ret = ath10k_core_pre_cal_download(ar); 2053 if (ret) { 2054 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2055 "failed to load pre cal data: %d\n", ret); 2056 return ret; 2057 } 2058 2059 ret = ath10k_core_get_board_id_from_otp(ar); 2060 if (ret) { 2061 ath10k_err(ar, "failed to get board id: %d\n", ret); 2062 return ret; 2063 } 2064 2065 ret = ath10k_download_and_run_otp(ar); 2066 if (ret) { 2067 ath10k_err(ar, "failed to run otp: %d\n", ret); 2068 return ret; 2069 } 2070 2071 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2072 "pre cal configuration done successfully\n"); 2073 2074 return 0; 2075 } 2076 2077 static int ath10k_download_cal_data(struct ath10k *ar) 2078 { 2079 int ret; 2080 2081 ret = ath10k_core_pre_cal_config(ar); 2082 if (ret == 0) 2083 return 0; 2084 2085 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2086 "pre cal download procedure failed, try cal file: %d\n", 2087 ret); 2088 2089 ret = ath10k_download_cal_file(ar, ar->cal_file); 2090 if (ret == 0) { 2091 ar->cal_mode = ATH10K_CAL_MODE_FILE; 2092 goto done; 2093 } 2094 2095 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2096 "boot did not find a calibration file, try DT next: %d\n", 2097 ret); 2098 2099 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data"); 2100 if (ret == 0) { 2101 ar->cal_mode = ATH10K_CAL_MODE_DT; 2102 goto done; 2103 } 2104 2105 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2106 "boot did not find DT entry, try target EEPROM next: %d\n", 2107 ret); 2108 2109 ret = ath10k_download_cal_eeprom(ar); 2110 if (ret == 0) { 2111 ar->cal_mode = ATH10K_CAL_MODE_EEPROM; 2112 goto done; 2113 } 2114 2115 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2116 "boot did not find target EEPROM entry, try OTP next: %d\n", 2117 ret); 2118 2119 ret = ath10k_download_and_run_otp(ar); 2120 if (ret) { 2121 ath10k_err(ar, "failed to run otp: %d\n", ret); 2122 return ret; 2123 } 2124 2125 ar->cal_mode = ATH10K_CAL_MODE_OTP; 2126 2127 done: 2128 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 2129 ath10k_cal_mode_str(ar->cal_mode)); 2130 return 0; 2131 } 2132 2133 static int ath10k_init_uart(struct ath10k *ar) 2134 { 2135 int ret; 2136 2137 /* 2138 * Explicitly setting UART prints to zero as target turns it on 2139 * based on scratch registers. 2140 */ 2141 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 2142 if (ret) { 2143 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 2144 return ret; 2145 } 2146 2147 if (!uart_print) { 2148 if (ar->hw_params.uart_pin_workaround) { 2149 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 2150 ar->hw_params.uart_pin); 2151 if (ret) { 2152 ath10k_warn(ar, "failed to set UART TX pin: %d", 2153 ret); 2154 return ret; 2155 } 2156 } 2157 2158 return 0; 2159 } 2160 2161 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 2162 if (ret) { 2163 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 2164 return ret; 2165 } 2166 2167 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 2168 if (ret) { 2169 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 2170 return ret; 2171 } 2172 2173 /* Set the UART baud rate to 19200. */ 2174 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 2175 if (ret) { 2176 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 2177 return ret; 2178 } 2179 2180 ath10k_info(ar, "UART prints enabled\n"); 2181 return 0; 2182 } 2183 2184 static int ath10k_init_hw_params(struct ath10k *ar) 2185 { 2186 const struct ath10k_hw_params *uninitialized_var(hw_params); 2187 int i; 2188 2189 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 2190 hw_params = &ath10k_hw_params_list[i]; 2191 2192 if (hw_params->bus == ar->hif.bus && 2193 hw_params->id == ar->target_version && 2194 hw_params->dev_id == ar->dev_id) 2195 break; 2196 } 2197 2198 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 2199 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 2200 ar->target_version); 2201 return -EINVAL; 2202 } 2203 2204 ar->hw_params = *hw_params; 2205 2206 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 2207 ar->hw_params.name, ar->target_version); 2208 2209 return 0; 2210 } 2211 2212 static void ath10k_core_restart(struct work_struct *work) 2213 { 2214 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 2215 int ret; 2216 2217 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2218 2219 /* Place a barrier to make sure the compiler doesn't reorder 2220 * CRASH_FLUSH and calling other functions. 2221 */ 2222 barrier(); 2223 2224 ieee80211_stop_queues(ar->hw); 2225 ath10k_drain_tx(ar); 2226 complete(&ar->scan.started); 2227 complete(&ar->scan.completed); 2228 complete(&ar->scan.on_channel); 2229 complete(&ar->offchan_tx_completed); 2230 complete(&ar->install_key_done); 2231 complete(&ar->vdev_setup_done); 2232 complete(&ar->vdev_delete_done); 2233 complete(&ar->thermal.wmi_sync); 2234 complete(&ar->bss_survey_done); 2235 wake_up(&ar->htt.empty_tx_wq); 2236 wake_up(&ar->wmi.tx_credits_wq); 2237 wake_up(&ar->peer_mapping_wq); 2238 2239 /* TODO: We can have one instance of cancelling coverage_class_work by 2240 * moving it to ath10k_halt(), so that both stop() and restart() would 2241 * call that but it takes conf_mutex() and if we call cancel_work_sync() 2242 * with conf_mutex it will deadlock. 2243 */ 2244 cancel_work_sync(&ar->set_coverage_class_work); 2245 2246 mutex_lock(&ar->conf_mutex); 2247 2248 switch (ar->state) { 2249 case ATH10K_STATE_ON: 2250 ar->state = ATH10K_STATE_RESTARTING; 2251 ath10k_halt(ar); 2252 ath10k_scan_finish(ar); 2253 ieee80211_restart_hw(ar->hw); 2254 break; 2255 case ATH10K_STATE_OFF: 2256 /* this can happen if driver is being unloaded 2257 * or if the crash happens during FW probing 2258 */ 2259 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 2260 break; 2261 case ATH10K_STATE_RESTARTING: 2262 /* hw restart might be requested from multiple places */ 2263 break; 2264 case ATH10K_STATE_RESTARTED: 2265 ar->state = ATH10K_STATE_WEDGED; 2266 /* fall through */ 2267 case ATH10K_STATE_WEDGED: 2268 ath10k_warn(ar, "device is wedged, will not restart\n"); 2269 break; 2270 case ATH10K_STATE_UTF: 2271 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 2272 break; 2273 } 2274 2275 mutex_unlock(&ar->conf_mutex); 2276 2277 ret = ath10k_coredump_submit(ar); 2278 if (ret) 2279 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d", 2280 ret); 2281 2282 complete(&ar->driver_recovery); 2283 } 2284 2285 static void ath10k_core_set_coverage_class_work(struct work_struct *work) 2286 { 2287 struct ath10k *ar = container_of(work, struct ath10k, 2288 set_coverage_class_work); 2289 2290 if (ar->hw_params.hw_ops->set_coverage_class) 2291 ar->hw_params.hw_ops->set_coverage_class(ar, -1); 2292 } 2293 2294 static int ath10k_core_init_firmware_features(struct ath10k *ar) 2295 { 2296 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 2297 int max_num_peers; 2298 2299 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) && 2300 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 2301 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 2302 return -EINVAL; 2303 } 2304 2305 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 2306 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 2307 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version); 2308 return -EINVAL; 2309 } 2310 2311 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 2312 switch (ath10k_cryptmode_param) { 2313 case ATH10K_CRYPT_MODE_HW: 2314 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2315 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 2316 break; 2317 case ATH10K_CRYPT_MODE_SW: 2318 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 2319 fw_file->fw_features)) { 2320 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 2321 return -EINVAL; 2322 } 2323 2324 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2325 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 2326 break; 2327 default: 2328 ath10k_info(ar, "invalid cryptmode: %d\n", 2329 ath10k_cryptmode_param); 2330 return -EINVAL; 2331 } 2332 2333 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 2334 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 2335 2336 if (rawmode) { 2337 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 2338 fw_file->fw_features)) { 2339 ath10k_err(ar, "rawmode = 1 requires support from firmware"); 2340 return -EINVAL; 2341 } 2342 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2343 } 2344 2345 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 2346 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 2347 2348 /* Workaround: 2349 * 2350 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 2351 * and causes enormous performance issues (malformed frames, 2352 * etc). 2353 * 2354 * Disabling A-MSDU makes RAW mode stable with heavy traffic 2355 * albeit a bit slower compared to regular operation. 2356 */ 2357 ar->htt.max_num_amsdu = 1; 2358 } 2359 2360 /* Backwards compatibility for firmwares without 2361 * ATH10K_FW_IE_WMI_OP_VERSION. 2362 */ 2363 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 2364 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 2365 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 2366 fw_file->fw_features)) 2367 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 2368 else 2369 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 2370 } else { 2371 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 2372 } 2373 } 2374 2375 switch (fw_file->wmi_op_version) { 2376 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2377 max_num_peers = TARGET_NUM_PEERS; 2378 ar->max_num_stations = TARGET_NUM_STATIONS; 2379 ar->max_num_vdevs = TARGET_NUM_VDEVS; 2380 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 2381 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 2382 WMI_STAT_PEER; 2383 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2384 break; 2385 case ATH10K_FW_WMI_OP_VERSION_10_1: 2386 case ATH10K_FW_WMI_OP_VERSION_10_2: 2387 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2388 if (ath10k_peer_stats_enabled(ar)) { 2389 max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS; 2390 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS; 2391 } else { 2392 max_num_peers = TARGET_10X_NUM_PEERS; 2393 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 2394 } 2395 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 2396 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 2397 ar->fw_stats_req_mask = WMI_STAT_PEER; 2398 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2399 break; 2400 case ATH10K_FW_WMI_OP_VERSION_TLV: 2401 max_num_peers = TARGET_TLV_NUM_PEERS; 2402 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 2403 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 2404 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 2405 if (ar->hif.bus == ATH10K_BUS_SDIO) 2406 ar->htt.max_num_pending_tx = 2407 TARGET_TLV_NUM_MSDU_DESC_HL; 2408 else 2409 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 2410 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 2411 ar->fw_stats_req_mask = WMI_TLV_STAT_PDEV | WMI_TLV_STAT_VDEV | 2412 WMI_TLV_STAT_PEER | WMI_TLV_STAT_PEER_EXTD; 2413 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2414 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC; 2415 break; 2416 case ATH10K_FW_WMI_OP_VERSION_10_4: 2417 max_num_peers = TARGET_10_4_NUM_PEERS; 2418 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 2419 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 2420 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 2421 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 2422 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER | 2423 WMI_10_4_STAT_PEER_EXTD | 2424 WMI_10_4_STAT_VDEV_EXTD; 2425 ar->max_spatial_stream = ar->hw_params.max_spatial_stream; 2426 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS; 2427 2428 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, 2429 fw_file->fw_features)) 2430 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC; 2431 else 2432 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 2433 break; 2434 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2435 case ATH10K_FW_WMI_OP_VERSION_MAX: 2436 default: 2437 WARN_ON(1); 2438 return -EINVAL; 2439 } 2440 2441 if (ar->hw_params.num_peers) 2442 ar->max_num_peers = ar->hw_params.num_peers; 2443 else 2444 ar->max_num_peers = max_num_peers; 2445 2446 /* Backwards compatibility for firmwares without 2447 * ATH10K_FW_IE_HTT_OP_VERSION. 2448 */ 2449 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 2450 switch (fw_file->wmi_op_version) { 2451 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2452 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 2453 break; 2454 case ATH10K_FW_WMI_OP_VERSION_10_1: 2455 case ATH10K_FW_WMI_OP_VERSION_10_2: 2456 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2457 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 2458 break; 2459 case ATH10K_FW_WMI_OP_VERSION_TLV: 2460 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 2461 break; 2462 case ATH10K_FW_WMI_OP_VERSION_10_4: 2463 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2464 case ATH10K_FW_WMI_OP_VERSION_MAX: 2465 ath10k_err(ar, "htt op version not found from fw meta data"); 2466 return -EINVAL; 2467 } 2468 } 2469 2470 return 0; 2471 } 2472 2473 static int ath10k_core_reset_rx_filter(struct ath10k *ar) 2474 { 2475 int ret; 2476 int vdev_id; 2477 int vdev_type; 2478 int vdev_subtype; 2479 const u8 *vdev_addr; 2480 2481 vdev_id = 0; 2482 vdev_type = WMI_VDEV_TYPE_STA; 2483 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE); 2484 vdev_addr = ar->mac_addr; 2485 2486 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype, 2487 vdev_addr); 2488 if (ret) { 2489 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret); 2490 return ret; 2491 } 2492 2493 ret = ath10k_wmi_vdev_delete(ar, vdev_id); 2494 if (ret) { 2495 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret); 2496 return ret; 2497 } 2498 2499 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be 2500 * serialized properly implicitly. 2501 * 2502 * Moreover (most) WMI commands have no explicit acknowledges. It is 2503 * possible to infer it implicitly by poking firmware with echo 2504 * command - getting a reply means all preceding comments have been 2505 * (mostly) processed. 2506 * 2507 * In case of vdev create/delete this is sufficient. 2508 * 2509 * Without this it's possible to end up with a race when HTT Rx ring is 2510 * started before vdev create/delete hack is complete allowing a short 2511 * window of opportunity to receive (and Tx ACK) a bunch of frames. 2512 */ 2513 ret = ath10k_wmi_barrier(ar); 2514 if (ret) { 2515 ath10k_err(ar, "failed to ping firmware: %d\n", ret); 2516 return ret; 2517 } 2518 2519 return 0; 2520 } 2521 2522 static int ath10k_core_compat_services(struct ath10k *ar) 2523 { 2524 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 2525 2526 /* all 10.x firmware versions support thermal throttling but don't 2527 * advertise the support via service flags so we have to hardcode 2528 * it here 2529 */ 2530 switch (fw_file->wmi_op_version) { 2531 case ATH10K_FW_WMI_OP_VERSION_10_1: 2532 case ATH10K_FW_WMI_OP_VERSION_10_2: 2533 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2534 case ATH10K_FW_WMI_OP_VERSION_10_4: 2535 set_bit(WMI_SERVICE_THERM_THROT, ar->wmi.svc_map); 2536 break; 2537 default: 2538 break; 2539 } 2540 2541 return 0; 2542 } 2543 2544 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 2545 const struct ath10k_fw_components *fw) 2546 { 2547 int status; 2548 u32 val; 2549 2550 lockdep_assert_held(&ar->conf_mutex); 2551 2552 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2553 2554 ar->running_fw = fw; 2555 2556 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2557 ar->running_fw->fw_file.fw_features)) { 2558 ath10k_bmi_start(ar); 2559 2560 if (ath10k_init_configure_target(ar)) { 2561 status = -EINVAL; 2562 goto err; 2563 } 2564 2565 status = ath10k_download_cal_data(ar); 2566 if (status) 2567 goto err; 2568 2569 /* Some of of qca988x solutions are having global reset issue 2570 * during target initialization. Bypassing PLL setting before 2571 * downloading firmware and letting the SoC run on REF_CLK is 2572 * fixing the problem. Corresponding firmware change is also 2573 * needed to set the clock source once the target is 2574 * initialized. 2575 */ 2576 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 2577 ar->running_fw->fw_file.fw_features)) { 2578 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 2579 if (status) { 2580 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 2581 status); 2582 goto err; 2583 } 2584 } 2585 2586 status = ath10k_download_fw(ar); 2587 if (status) 2588 goto err; 2589 2590 status = ath10k_init_uart(ar); 2591 if (status) 2592 goto err; 2593 2594 if (ar->hif.bus == ATH10K_BUS_SDIO) { 2595 status = ath10k_init_sdio(ar, mode); 2596 if (status) { 2597 ath10k_err(ar, "failed to init SDIO: %d\n", status); 2598 goto err; 2599 } 2600 } 2601 } 2602 2603 ar->htc.htc_ops.target_send_suspend_complete = 2604 ath10k_send_suspend_complete; 2605 2606 status = ath10k_htc_init(ar); 2607 if (status) { 2608 ath10k_err(ar, "could not init HTC (%d)\n", status); 2609 goto err; 2610 } 2611 2612 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2613 ar->running_fw->fw_file.fw_features)) { 2614 status = ath10k_bmi_done(ar); 2615 if (status) 2616 goto err; 2617 } 2618 2619 status = ath10k_wmi_attach(ar); 2620 if (status) { 2621 ath10k_err(ar, "WMI attach failed: %d\n", status); 2622 goto err; 2623 } 2624 2625 status = ath10k_htt_init(ar); 2626 if (status) { 2627 ath10k_err(ar, "failed to init htt: %d\n", status); 2628 goto err_wmi_detach; 2629 } 2630 2631 status = ath10k_htt_tx_start(&ar->htt); 2632 if (status) { 2633 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 2634 goto err_wmi_detach; 2635 } 2636 2637 /* If firmware indicates Full Rx Reorder support it must be used in a 2638 * slightly different manner. Let HTT code know. 2639 */ 2640 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 2641 ar->wmi.svc_map)); 2642 2643 status = ath10k_htt_rx_alloc(&ar->htt); 2644 if (status) { 2645 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 2646 goto err_htt_tx_detach; 2647 } 2648 2649 status = ath10k_hif_start(ar); 2650 if (status) { 2651 ath10k_err(ar, "could not start HIF: %d\n", status); 2652 goto err_htt_rx_detach; 2653 } 2654 2655 status = ath10k_htc_wait_target(&ar->htc); 2656 if (status) { 2657 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 2658 goto err_hif_stop; 2659 } 2660 2661 status = ath10k_hif_swap_mailbox(ar); 2662 if (status) { 2663 ath10k_err(ar, "failed to swap mailbox: %d\n", status); 2664 goto err_hif_stop; 2665 } 2666 2667 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2668 status = ath10k_htt_connect(&ar->htt); 2669 if (status) { 2670 ath10k_err(ar, "failed to connect htt (%d)\n", status); 2671 goto err_hif_stop; 2672 } 2673 } 2674 2675 status = ath10k_wmi_connect(ar); 2676 if (status) { 2677 ath10k_err(ar, "could not connect wmi: %d\n", status); 2678 goto err_hif_stop; 2679 } 2680 2681 status = ath10k_htc_start(&ar->htc); 2682 if (status) { 2683 ath10k_err(ar, "failed to start htc: %d\n", status); 2684 goto err_hif_stop; 2685 } 2686 2687 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2688 status = ath10k_wmi_wait_for_service_ready(ar); 2689 if (status) { 2690 ath10k_warn(ar, "wmi service ready event not received"); 2691 goto err_hif_stop; 2692 } 2693 } 2694 2695 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 2696 ar->hw->wiphy->fw_version); 2697 2698 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) && 2699 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2700 val = 0; 2701 if (ath10k_peer_stats_enabled(ar)) 2702 val = WMI_10_4_PEER_STATS; 2703 2704 /* Enable vdev stats by default */ 2705 val |= WMI_10_4_VDEV_STATS; 2706 2707 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) 2708 val |= WMI_10_4_BSS_CHANNEL_INFO_64; 2709 2710 /* 10.4 firmware supports BT-Coex without reloading firmware 2711 * via pdev param. To support Bluetooth coexistence pdev param, 2712 * WMI_COEX_GPIO_SUPPORT of extended resource config should be 2713 * enabled always. 2714 */ 2715 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 2716 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 2717 ar->running_fw->fw_file.fw_features)) 2718 val |= WMI_10_4_COEX_GPIO_SUPPORT; 2719 2720 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, 2721 ar->wmi.svc_map)) 2722 val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY; 2723 2724 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, 2725 ar->wmi.svc_map)) 2726 val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA; 2727 2728 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI, 2729 ar->wmi.svc_map)) 2730 val |= WMI_10_4_TX_DATA_ACK_RSSI; 2731 2732 if (test_bit(WMI_SERVICE_REPORT_AIRTIME, ar->wmi.svc_map)) 2733 val |= WMI_10_4_REPORT_AIRTIME; 2734 2735 status = ath10k_mac_ext_resource_config(ar, val); 2736 if (status) { 2737 ath10k_err(ar, 2738 "failed to send ext resource cfg command : %d\n", 2739 status); 2740 goto err_hif_stop; 2741 } 2742 } 2743 2744 status = ath10k_wmi_cmd_init(ar); 2745 if (status) { 2746 ath10k_err(ar, "could not send WMI init command (%d)\n", 2747 status); 2748 goto err_hif_stop; 2749 } 2750 2751 status = ath10k_wmi_wait_for_unified_ready(ar); 2752 if (status) { 2753 ath10k_err(ar, "wmi unified ready event not received\n"); 2754 goto err_hif_stop; 2755 } 2756 2757 status = ath10k_core_compat_services(ar); 2758 if (status) { 2759 ath10k_err(ar, "compat services failed: %d\n", status); 2760 goto err_hif_stop; 2761 } 2762 2763 status = ath10k_wmi_pdev_set_base_macaddr(ar, ar->mac_addr); 2764 if (status && status != -EOPNOTSUPP) { 2765 ath10k_err(ar, 2766 "failed to set base mac address: %d\n", status); 2767 goto err_hif_stop; 2768 } 2769 2770 /* Some firmware revisions do not properly set up hardware rx filter 2771 * registers. 2772 * 2773 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK 2774 * is filled with 0s instead of 1s allowing HW to respond with ACKs to 2775 * any frames that matches MAC_PCU_RX_FILTER which is also 2776 * misconfigured to accept anything. 2777 * 2778 * The ADDR1 is programmed using internal firmware structure field and 2779 * can't be (easily/sanely) reached from the driver explicitly. It is 2780 * possible to implicitly make it correct by creating a dummy vdev and 2781 * then deleting it. 2782 */ 2783 if (ar->hw_params.hw_filter_reset_required && 2784 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2785 status = ath10k_core_reset_rx_filter(ar); 2786 if (status) { 2787 ath10k_err(ar, 2788 "failed to reset rx filter: %d\n", status); 2789 goto err_hif_stop; 2790 } 2791 } 2792 2793 status = ath10k_htt_rx_ring_refill(ar); 2794 if (status) { 2795 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 2796 goto err_hif_stop; 2797 } 2798 2799 if (ar->max_num_vdevs >= 64) 2800 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL; 2801 else 2802 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 2803 2804 INIT_LIST_HEAD(&ar->arvifs); 2805 2806 /* we don't care about HTT in UTF mode */ 2807 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2808 status = ath10k_htt_setup(&ar->htt); 2809 if (status) { 2810 ath10k_err(ar, "failed to setup htt: %d\n", status); 2811 goto err_hif_stop; 2812 } 2813 } 2814 2815 status = ath10k_debug_start(ar); 2816 if (status) 2817 goto err_hif_stop; 2818 2819 status = ath10k_hif_set_target_log_mode(ar, fw_diag_log); 2820 if (status && status != -EOPNOTSUPP) { 2821 ath10k_warn(ar, "set target log mode failed: %d\n", status); 2822 goto err_hif_stop; 2823 } 2824 2825 return 0; 2826 2827 err_hif_stop: 2828 ath10k_hif_stop(ar); 2829 err_htt_rx_detach: 2830 ath10k_htt_rx_free(&ar->htt); 2831 err_htt_tx_detach: 2832 ath10k_htt_tx_free(&ar->htt); 2833 err_wmi_detach: 2834 ath10k_wmi_detach(ar); 2835 err: 2836 return status; 2837 } 2838 EXPORT_SYMBOL(ath10k_core_start); 2839 2840 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 2841 { 2842 int ret; 2843 unsigned long time_left; 2844 2845 reinit_completion(&ar->target_suspend); 2846 2847 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 2848 if (ret) { 2849 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 2850 return ret; 2851 } 2852 2853 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 2854 2855 if (!time_left) { 2856 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 2857 return -ETIMEDOUT; 2858 } 2859 2860 return 0; 2861 } 2862 2863 void ath10k_core_stop(struct ath10k *ar) 2864 { 2865 lockdep_assert_held(&ar->conf_mutex); 2866 ath10k_debug_stop(ar); 2867 2868 /* try to suspend target */ 2869 if (ar->state != ATH10K_STATE_RESTARTING && 2870 ar->state != ATH10K_STATE_UTF) 2871 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 2872 2873 ath10k_hif_stop(ar); 2874 ath10k_htt_tx_stop(&ar->htt); 2875 ath10k_htt_rx_free(&ar->htt); 2876 ath10k_wmi_detach(ar); 2877 } 2878 EXPORT_SYMBOL(ath10k_core_stop); 2879 2880 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 2881 * order to know what hw capabilities should be advertised to mac80211 it is 2882 * necessary to load the firmware (and tear it down immediately since start 2883 * hook will try to init it again) before registering 2884 */ 2885 static int ath10k_core_probe_fw(struct ath10k *ar) 2886 { 2887 struct bmi_target_info target_info; 2888 int ret = 0; 2889 2890 ret = ath10k_hif_power_up(ar, ATH10K_FIRMWARE_MODE_NORMAL); 2891 if (ret) { 2892 ath10k_err(ar, "could not power on hif bus (%d)\n", ret); 2893 return ret; 2894 } 2895 2896 switch (ar->hif.bus) { 2897 case ATH10K_BUS_SDIO: 2898 memset(&target_info, 0, sizeof(target_info)); 2899 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info); 2900 if (ret) { 2901 ath10k_err(ar, "could not get target info (%d)\n", ret); 2902 goto err_power_down; 2903 } 2904 ar->target_version = target_info.version; 2905 ar->hw->wiphy->hw_version = target_info.version; 2906 break; 2907 case ATH10K_BUS_PCI: 2908 case ATH10K_BUS_AHB: 2909 case ATH10K_BUS_USB: 2910 memset(&target_info, 0, sizeof(target_info)); 2911 ret = ath10k_bmi_get_target_info(ar, &target_info); 2912 if (ret) { 2913 ath10k_err(ar, "could not get target info (%d)\n", ret); 2914 goto err_power_down; 2915 } 2916 ar->target_version = target_info.version; 2917 ar->hw->wiphy->hw_version = target_info.version; 2918 break; 2919 case ATH10K_BUS_SNOC: 2920 memset(&target_info, 0, sizeof(target_info)); 2921 ret = ath10k_hif_get_target_info(ar, &target_info); 2922 if (ret) { 2923 ath10k_err(ar, "could not get target info (%d)\n", ret); 2924 goto err_power_down; 2925 } 2926 ar->target_version = target_info.version; 2927 ar->hw->wiphy->hw_version = target_info.version; 2928 break; 2929 default: 2930 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus); 2931 } 2932 2933 ret = ath10k_init_hw_params(ar); 2934 if (ret) { 2935 ath10k_err(ar, "could not get hw params (%d)\n", ret); 2936 goto err_power_down; 2937 } 2938 2939 ret = ath10k_core_fetch_firmware_files(ar); 2940 if (ret) { 2941 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 2942 goto err_power_down; 2943 } 2944 2945 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) != 2946 sizeof(ar->normal_mode_fw.fw_file.fw_version)); 2947 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version, 2948 sizeof(ar->hw->wiphy->fw_version)); 2949 2950 ath10k_debug_print_hwfw_info(ar); 2951 2952 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2953 ar->normal_mode_fw.fw_file.fw_features)) { 2954 ret = ath10k_core_pre_cal_download(ar); 2955 if (ret) { 2956 /* pre calibration data download is not necessary 2957 * for all the chipsets. Ignore failures and continue. 2958 */ 2959 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2960 "could not load pre cal data: %d\n", ret); 2961 } 2962 2963 ret = ath10k_core_get_board_id_from_otp(ar); 2964 if (ret && ret != -EOPNOTSUPP) { 2965 ath10k_err(ar, "failed to get board id from otp: %d\n", 2966 ret); 2967 goto err_free_firmware_files; 2968 } 2969 2970 ret = ath10k_core_check_smbios(ar); 2971 if (ret) 2972 ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n"); 2973 2974 ret = ath10k_core_check_dt(ar); 2975 if (ret) 2976 ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n"); 2977 2978 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD); 2979 if (ret) { 2980 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 2981 goto err_free_firmware_files; 2982 } 2983 2984 ath10k_debug_print_board_info(ar); 2985 } 2986 2987 device_get_mac_address(ar->dev, ar->mac_addr, sizeof(ar->mac_addr)); 2988 2989 ret = ath10k_core_init_firmware_features(ar); 2990 if (ret) { 2991 ath10k_err(ar, "fatal problem with firmware features: %d\n", 2992 ret); 2993 goto err_free_firmware_files; 2994 } 2995 2996 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2997 ar->normal_mode_fw.fw_file.fw_features)) { 2998 ret = ath10k_swap_code_seg_init(ar, 2999 &ar->normal_mode_fw.fw_file); 3000 if (ret) { 3001 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 3002 ret); 3003 goto err_free_firmware_files; 3004 } 3005 } 3006 3007 mutex_lock(&ar->conf_mutex); 3008 3009 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL, 3010 &ar->normal_mode_fw); 3011 if (ret) { 3012 ath10k_err(ar, "could not init core (%d)\n", ret); 3013 goto err_unlock; 3014 } 3015 3016 ath10k_debug_print_boot_info(ar); 3017 ath10k_core_stop(ar); 3018 3019 mutex_unlock(&ar->conf_mutex); 3020 3021 ath10k_hif_power_down(ar); 3022 return 0; 3023 3024 err_unlock: 3025 mutex_unlock(&ar->conf_mutex); 3026 3027 err_free_firmware_files: 3028 ath10k_core_free_firmware_files(ar); 3029 3030 err_power_down: 3031 ath10k_hif_power_down(ar); 3032 3033 return ret; 3034 } 3035 3036 static void ath10k_core_register_work(struct work_struct *work) 3037 { 3038 struct ath10k *ar = container_of(work, struct ath10k, register_work); 3039 int status; 3040 3041 /* peer stats are enabled by default */ 3042 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags); 3043 3044 status = ath10k_core_probe_fw(ar); 3045 if (status) { 3046 ath10k_err(ar, "could not probe fw (%d)\n", status); 3047 goto err; 3048 } 3049 3050 status = ath10k_mac_register(ar); 3051 if (status) { 3052 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 3053 goto err_release_fw; 3054 } 3055 3056 status = ath10k_coredump_register(ar); 3057 if (status) { 3058 ath10k_err(ar, "unable to register coredump\n"); 3059 goto err_unregister_mac; 3060 } 3061 3062 status = ath10k_debug_register(ar); 3063 if (status) { 3064 ath10k_err(ar, "unable to initialize debugfs\n"); 3065 goto err_unregister_coredump; 3066 } 3067 3068 status = ath10k_spectral_create(ar); 3069 if (status) { 3070 ath10k_err(ar, "failed to initialize spectral\n"); 3071 goto err_debug_destroy; 3072 } 3073 3074 status = ath10k_thermal_register(ar); 3075 if (status) { 3076 ath10k_err(ar, "could not register thermal device: %d\n", 3077 status); 3078 goto err_spectral_destroy; 3079 } 3080 3081 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 3082 return; 3083 3084 err_spectral_destroy: 3085 ath10k_spectral_destroy(ar); 3086 err_debug_destroy: 3087 ath10k_debug_destroy(ar); 3088 err_unregister_coredump: 3089 ath10k_coredump_unregister(ar); 3090 err_unregister_mac: 3091 ath10k_mac_unregister(ar); 3092 err_release_fw: 3093 ath10k_core_free_firmware_files(ar); 3094 err: 3095 /* TODO: It's probably a good idea to release device from the driver 3096 * but calling device_release_driver() here will cause a deadlock. 3097 */ 3098 return; 3099 } 3100 3101 int ath10k_core_register(struct ath10k *ar, 3102 const struct ath10k_bus_params *bus_params) 3103 { 3104 ar->bus_param = *bus_params; 3105 3106 queue_work(ar->workqueue, &ar->register_work); 3107 3108 return 0; 3109 } 3110 EXPORT_SYMBOL(ath10k_core_register); 3111 3112 void ath10k_core_unregister(struct ath10k *ar) 3113 { 3114 cancel_work_sync(&ar->register_work); 3115 3116 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 3117 return; 3118 3119 ath10k_thermal_unregister(ar); 3120 /* Stop spectral before unregistering from mac80211 to remove the 3121 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 3122 * would be already be free'd recursively, leading to a double free. 3123 */ 3124 ath10k_spectral_destroy(ar); 3125 3126 /* We must unregister from mac80211 before we stop HTC and HIF. 3127 * Otherwise we will fail to submit commands to FW and mac80211 will be 3128 * unhappy about callback failures. 3129 */ 3130 ath10k_mac_unregister(ar); 3131 3132 ath10k_testmode_destroy(ar); 3133 3134 ath10k_core_free_firmware_files(ar); 3135 ath10k_core_free_board_files(ar); 3136 3137 ath10k_debug_unregister(ar); 3138 } 3139 EXPORT_SYMBOL(ath10k_core_unregister); 3140 3141 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 3142 enum ath10k_bus bus, 3143 enum ath10k_hw_rev hw_rev, 3144 const struct ath10k_hif_ops *hif_ops) 3145 { 3146 struct ath10k *ar; 3147 int ret; 3148 3149 ar = ath10k_mac_create(priv_size); 3150 if (!ar) 3151 return NULL; 3152 3153 ar->ath_common.priv = ar; 3154 ar->ath_common.hw = ar->hw; 3155 ar->dev = dev; 3156 ar->hw_rev = hw_rev; 3157 ar->hif.ops = hif_ops; 3158 ar->hif.bus = bus; 3159 3160 switch (hw_rev) { 3161 case ATH10K_HW_QCA988X: 3162 case ATH10K_HW_QCA9887: 3163 ar->regs = &qca988x_regs; 3164 ar->hw_ce_regs = &qcax_ce_regs; 3165 ar->hw_values = &qca988x_values; 3166 break; 3167 case ATH10K_HW_QCA6174: 3168 case ATH10K_HW_QCA9377: 3169 ar->regs = &qca6174_regs; 3170 ar->hw_ce_regs = &qcax_ce_regs; 3171 ar->hw_values = &qca6174_values; 3172 break; 3173 case ATH10K_HW_QCA99X0: 3174 case ATH10K_HW_QCA9984: 3175 ar->regs = &qca99x0_regs; 3176 ar->hw_ce_regs = &qcax_ce_regs; 3177 ar->hw_values = &qca99x0_values; 3178 break; 3179 case ATH10K_HW_QCA9888: 3180 ar->regs = &qca99x0_regs; 3181 ar->hw_ce_regs = &qcax_ce_regs; 3182 ar->hw_values = &qca9888_values; 3183 break; 3184 case ATH10K_HW_QCA4019: 3185 ar->regs = &qca4019_regs; 3186 ar->hw_ce_regs = &qcax_ce_regs; 3187 ar->hw_values = &qca4019_values; 3188 break; 3189 case ATH10K_HW_WCN3990: 3190 ar->regs = &wcn3990_regs; 3191 ar->hw_ce_regs = &wcn3990_ce_regs; 3192 ar->hw_values = &wcn3990_values; 3193 break; 3194 default: 3195 ath10k_err(ar, "unsupported core hardware revision %d\n", 3196 hw_rev); 3197 ret = -ENOTSUPP; 3198 goto err_free_mac; 3199 } 3200 3201 init_completion(&ar->scan.started); 3202 init_completion(&ar->scan.completed); 3203 init_completion(&ar->scan.on_channel); 3204 init_completion(&ar->target_suspend); 3205 init_completion(&ar->driver_recovery); 3206 init_completion(&ar->wow.wakeup_completed); 3207 3208 init_completion(&ar->install_key_done); 3209 init_completion(&ar->vdev_setup_done); 3210 init_completion(&ar->vdev_delete_done); 3211 init_completion(&ar->thermal.wmi_sync); 3212 init_completion(&ar->bss_survey_done); 3213 init_completion(&ar->peer_delete_done); 3214 3215 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 3216 3217 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 3218 if (!ar->workqueue) 3219 goto err_free_mac; 3220 3221 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 3222 if (!ar->workqueue_aux) 3223 goto err_free_wq; 3224 3225 mutex_init(&ar->conf_mutex); 3226 mutex_init(&ar->dump_mutex); 3227 spin_lock_init(&ar->data_lock); 3228 3229 INIT_LIST_HEAD(&ar->peers); 3230 init_waitqueue_head(&ar->peer_mapping_wq); 3231 init_waitqueue_head(&ar->htt.empty_tx_wq); 3232 init_waitqueue_head(&ar->wmi.tx_credits_wq); 3233 3234 init_completion(&ar->offchan_tx_completed); 3235 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 3236 skb_queue_head_init(&ar->offchan_tx_queue); 3237 3238 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 3239 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 3240 3241 INIT_WORK(&ar->register_work, ath10k_core_register_work); 3242 INIT_WORK(&ar->restart_work, ath10k_core_restart); 3243 INIT_WORK(&ar->set_coverage_class_work, 3244 ath10k_core_set_coverage_class_work); 3245 3246 init_dummy_netdev(&ar->napi_dev); 3247 3248 ret = ath10k_coredump_create(ar); 3249 if (ret) 3250 goto err_free_aux_wq; 3251 3252 ret = ath10k_debug_create(ar); 3253 if (ret) 3254 goto err_free_coredump; 3255 3256 return ar; 3257 3258 err_free_coredump: 3259 ath10k_coredump_destroy(ar); 3260 3261 err_free_aux_wq: 3262 destroy_workqueue(ar->workqueue_aux); 3263 err_free_wq: 3264 destroy_workqueue(ar->workqueue); 3265 3266 err_free_mac: 3267 ath10k_mac_destroy(ar); 3268 3269 return NULL; 3270 } 3271 EXPORT_SYMBOL(ath10k_core_create); 3272 3273 void ath10k_core_destroy(struct ath10k *ar) 3274 { 3275 flush_workqueue(ar->workqueue); 3276 destroy_workqueue(ar->workqueue); 3277 3278 flush_workqueue(ar->workqueue_aux); 3279 destroy_workqueue(ar->workqueue_aux); 3280 3281 ath10k_debug_destroy(ar); 3282 ath10k_coredump_destroy(ar); 3283 ath10k_htt_tx_destroy(&ar->htt); 3284 ath10k_wmi_free_host_mem(ar); 3285 ath10k_mac_destroy(ar); 3286 } 3287 EXPORT_SYMBOL(ath10k_core_destroy); 3288 3289 MODULE_AUTHOR("Qualcomm Atheros"); 3290 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards."); 3291 MODULE_LICENSE("Dual BSD/GPL"); 3292