1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (c) 2005-2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. 6 */ 7 8 #include <linux/module.h> 9 #include <linux/firmware.h> 10 #include <linux/of.h> 11 #include <linux/property.h> 12 #include <linux/dmi.h> 13 #include <linux/ctype.h> 14 #include <linux/pm_qos.h> 15 #include <asm/byteorder.h> 16 17 #include "core.h" 18 #include "mac.h" 19 #include "htc.h" 20 #include "hif.h" 21 #include "wmi.h" 22 #include "bmi.h" 23 #include "debug.h" 24 #include "htt.h" 25 #include "testmode.h" 26 #include "wmi-ops.h" 27 #include "coredump.h" 28 29 unsigned int ath10k_debug_mask; 30 EXPORT_SYMBOL(ath10k_debug_mask); 31 32 static unsigned int ath10k_cryptmode_param; 33 static bool uart_print; 34 static bool skip_otp; 35 static bool rawmode; 36 static bool fw_diag_log; 37 38 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) | 39 BIT(ATH10K_FW_CRASH_DUMP_CE_DATA); 40 41 /* FIXME: most of these should be readonly */ 42 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 43 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 44 module_param(uart_print, bool, 0644); 45 module_param(skip_otp, bool, 0644); 46 module_param(rawmode, bool, 0644); 47 module_param(fw_diag_log, bool, 0644); 48 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444); 49 50 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 51 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 52 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 53 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 54 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); 55 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file"); 56 MODULE_PARM_DESC(fw_diag_log, "Diag based fw log debugging"); 57 58 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 59 { 60 .id = QCA988X_HW_2_0_VERSION, 61 .dev_id = QCA988X_2_0_DEVICE_ID, 62 .bus = ATH10K_BUS_PCI, 63 .name = "qca988x hw2.0", 64 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 65 .uart_pin = 7, 66 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 67 .otp_exe_param = 0, 68 .channel_counters_freq_hz = 88000, 69 .max_probe_resp_desc_thres = 0, 70 .cal_data_len = 2116, 71 .fw = { 72 .dir = QCA988X_HW_2_0_FW_DIR, 73 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 74 .board_size = QCA988X_BOARD_DATA_SZ, 75 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 76 }, 77 .hw_ops = &qca988x_ops, 78 .decap_align_bytes = 4, 79 .spectral_bin_discard = 0, 80 .spectral_bin_offset = 0, 81 .vht160_mcs_rx_highest = 0, 82 .vht160_mcs_tx_highest = 0, 83 .n_cipher_suites = 8, 84 .ast_skid_limit = 0x10, 85 .num_wds_entries = 0x20, 86 .target_64bit = false, 87 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 88 .shadow_reg_support = false, 89 .rri_on_ddr = false, 90 .hw_filter_reset_required = true, 91 .fw_diag_ce_download = false, 92 .tx_stats_over_pktlog = true, 93 }, 94 { 95 .id = QCA988X_HW_2_0_VERSION, 96 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT, 97 .name = "qca988x hw2.0 ubiquiti", 98 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 99 .uart_pin = 7, 100 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 101 .otp_exe_param = 0, 102 .channel_counters_freq_hz = 88000, 103 .max_probe_resp_desc_thres = 0, 104 .cal_data_len = 2116, 105 .fw = { 106 .dir = QCA988X_HW_2_0_FW_DIR, 107 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 108 .board_size = QCA988X_BOARD_DATA_SZ, 109 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 110 }, 111 .hw_ops = &qca988x_ops, 112 .decap_align_bytes = 4, 113 .spectral_bin_discard = 0, 114 .spectral_bin_offset = 0, 115 .vht160_mcs_rx_highest = 0, 116 .vht160_mcs_tx_highest = 0, 117 .n_cipher_suites = 8, 118 .ast_skid_limit = 0x10, 119 .num_wds_entries = 0x20, 120 .target_64bit = false, 121 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 122 .shadow_reg_support = false, 123 .rri_on_ddr = false, 124 .hw_filter_reset_required = true, 125 .fw_diag_ce_download = false, 126 .tx_stats_over_pktlog = true, 127 }, 128 { 129 .id = QCA9887_HW_1_0_VERSION, 130 .dev_id = QCA9887_1_0_DEVICE_ID, 131 .bus = ATH10K_BUS_PCI, 132 .name = "qca9887 hw1.0", 133 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR, 134 .uart_pin = 7, 135 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 136 .otp_exe_param = 0, 137 .channel_counters_freq_hz = 88000, 138 .max_probe_resp_desc_thres = 0, 139 .cal_data_len = 2116, 140 .fw = { 141 .dir = QCA9887_HW_1_0_FW_DIR, 142 .board = QCA9887_HW_1_0_BOARD_DATA_FILE, 143 .board_size = QCA9887_BOARD_DATA_SZ, 144 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ, 145 }, 146 .hw_ops = &qca988x_ops, 147 .decap_align_bytes = 4, 148 .spectral_bin_discard = 0, 149 .spectral_bin_offset = 0, 150 .vht160_mcs_rx_highest = 0, 151 .vht160_mcs_tx_highest = 0, 152 .n_cipher_suites = 8, 153 .ast_skid_limit = 0x10, 154 .num_wds_entries = 0x20, 155 .target_64bit = false, 156 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 157 .shadow_reg_support = false, 158 .rri_on_ddr = false, 159 .hw_filter_reset_required = true, 160 .fw_diag_ce_download = false, 161 .tx_stats_over_pktlog = false, 162 }, 163 { 164 .id = QCA6174_HW_3_2_VERSION, 165 .dev_id = QCA6174_3_2_DEVICE_ID, 166 .bus = ATH10K_BUS_SDIO, 167 .name = "qca6174 hw3.2 sdio", 168 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 169 .uart_pin = 19, 170 .otp_exe_param = 0, 171 .channel_counters_freq_hz = 88000, 172 .max_probe_resp_desc_thres = 0, 173 .cal_data_len = 0, 174 .fw = { 175 .dir = QCA6174_HW_3_0_FW_DIR, 176 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 177 .board_size = QCA6174_BOARD_DATA_SZ, 178 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 179 }, 180 .hw_ops = &qca6174_sdio_ops, 181 .hw_clk = qca6174_clk, 182 .target_cpu_freq = 176000000, 183 .decap_align_bytes = 4, 184 .n_cipher_suites = 8, 185 .num_peers = 10, 186 .ast_skid_limit = 0x10, 187 .num_wds_entries = 0x20, 188 .uart_pin_workaround = true, 189 .tx_stats_over_pktlog = false, 190 .bmi_large_size_download = true, 191 .supports_peer_stats_info = true, 192 }, 193 { 194 .id = QCA6174_HW_2_1_VERSION, 195 .dev_id = QCA6164_2_1_DEVICE_ID, 196 .bus = ATH10K_BUS_PCI, 197 .name = "qca6164 hw2.1", 198 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 199 .uart_pin = 6, 200 .otp_exe_param = 0, 201 .channel_counters_freq_hz = 88000, 202 .max_probe_resp_desc_thres = 0, 203 .cal_data_len = 8124, 204 .fw = { 205 .dir = QCA6174_HW_2_1_FW_DIR, 206 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 207 .board_size = QCA6174_BOARD_DATA_SZ, 208 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 209 }, 210 .hw_ops = &qca988x_ops, 211 .decap_align_bytes = 4, 212 .spectral_bin_discard = 0, 213 .spectral_bin_offset = 0, 214 .vht160_mcs_rx_highest = 0, 215 .vht160_mcs_tx_highest = 0, 216 .n_cipher_suites = 8, 217 .ast_skid_limit = 0x10, 218 .num_wds_entries = 0x20, 219 .target_64bit = false, 220 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 221 .shadow_reg_support = false, 222 .rri_on_ddr = false, 223 .hw_filter_reset_required = true, 224 .fw_diag_ce_download = false, 225 .tx_stats_over_pktlog = false, 226 }, 227 { 228 .id = QCA6174_HW_2_1_VERSION, 229 .dev_id = QCA6174_2_1_DEVICE_ID, 230 .bus = ATH10K_BUS_PCI, 231 .name = "qca6174 hw2.1", 232 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 233 .uart_pin = 6, 234 .otp_exe_param = 0, 235 .channel_counters_freq_hz = 88000, 236 .max_probe_resp_desc_thres = 0, 237 .cal_data_len = 8124, 238 .fw = { 239 .dir = QCA6174_HW_2_1_FW_DIR, 240 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 241 .board_size = QCA6174_BOARD_DATA_SZ, 242 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 243 }, 244 .hw_ops = &qca988x_ops, 245 .decap_align_bytes = 4, 246 .spectral_bin_discard = 0, 247 .spectral_bin_offset = 0, 248 .vht160_mcs_rx_highest = 0, 249 .vht160_mcs_tx_highest = 0, 250 .n_cipher_suites = 8, 251 .ast_skid_limit = 0x10, 252 .num_wds_entries = 0x20, 253 .target_64bit = false, 254 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 255 .shadow_reg_support = false, 256 .rri_on_ddr = false, 257 .hw_filter_reset_required = true, 258 .fw_diag_ce_download = false, 259 .tx_stats_over_pktlog = false, 260 }, 261 { 262 .id = QCA6174_HW_3_0_VERSION, 263 .dev_id = QCA6174_2_1_DEVICE_ID, 264 .bus = ATH10K_BUS_PCI, 265 .name = "qca6174 hw3.0", 266 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 267 .uart_pin = 6, 268 .otp_exe_param = 0, 269 .channel_counters_freq_hz = 88000, 270 .max_probe_resp_desc_thres = 0, 271 .cal_data_len = 8124, 272 .fw = { 273 .dir = QCA6174_HW_3_0_FW_DIR, 274 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 275 .board_size = QCA6174_BOARD_DATA_SZ, 276 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 277 }, 278 .hw_ops = &qca988x_ops, 279 .decap_align_bytes = 4, 280 .spectral_bin_discard = 0, 281 .spectral_bin_offset = 0, 282 .vht160_mcs_rx_highest = 0, 283 .vht160_mcs_tx_highest = 0, 284 .n_cipher_suites = 8, 285 .ast_skid_limit = 0x10, 286 .num_wds_entries = 0x20, 287 .target_64bit = false, 288 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 289 .shadow_reg_support = false, 290 .rri_on_ddr = false, 291 .hw_filter_reset_required = true, 292 .fw_diag_ce_download = false, 293 .tx_stats_over_pktlog = false, 294 }, 295 { 296 .id = QCA6174_HW_3_2_VERSION, 297 .dev_id = QCA6174_2_1_DEVICE_ID, 298 .bus = ATH10K_BUS_PCI, 299 .name = "qca6174 hw3.2", 300 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 301 .uart_pin = 6, 302 .otp_exe_param = 0, 303 .channel_counters_freq_hz = 88000, 304 .max_probe_resp_desc_thres = 0, 305 .cal_data_len = 8124, 306 .fw = { 307 /* uses same binaries as hw3.0 */ 308 .dir = QCA6174_HW_3_0_FW_DIR, 309 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 310 .board_size = QCA6174_BOARD_DATA_SZ, 311 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 312 }, 313 .hw_ops = &qca6174_ops, 314 .hw_clk = qca6174_clk, 315 .target_cpu_freq = 176000000, 316 .decap_align_bytes = 4, 317 .spectral_bin_discard = 0, 318 .spectral_bin_offset = 0, 319 .vht160_mcs_rx_highest = 0, 320 .vht160_mcs_tx_highest = 0, 321 .n_cipher_suites = 8, 322 .ast_skid_limit = 0x10, 323 .num_wds_entries = 0x20, 324 .target_64bit = false, 325 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 326 .shadow_reg_support = false, 327 .rri_on_ddr = false, 328 .hw_filter_reset_required = true, 329 .fw_diag_ce_download = true, 330 .tx_stats_over_pktlog = false, 331 .supports_peer_stats_info = true, 332 }, 333 { 334 .id = QCA99X0_HW_2_0_DEV_VERSION, 335 .dev_id = QCA99X0_2_0_DEVICE_ID, 336 .bus = ATH10K_BUS_PCI, 337 .name = "qca99x0 hw2.0", 338 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 339 .uart_pin = 7, 340 .otp_exe_param = 0x00000700, 341 .continuous_frag_desc = true, 342 .cck_rate_map_rev2 = true, 343 .channel_counters_freq_hz = 150000, 344 .max_probe_resp_desc_thres = 24, 345 .tx_chain_mask = 0xf, 346 .rx_chain_mask = 0xf, 347 .max_spatial_stream = 4, 348 .cal_data_len = 12064, 349 .fw = { 350 .dir = QCA99X0_HW_2_0_FW_DIR, 351 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 352 .board_size = QCA99X0_BOARD_DATA_SZ, 353 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 354 }, 355 .sw_decrypt_mcast_mgmt = true, 356 .hw_ops = &qca99x0_ops, 357 .decap_align_bytes = 1, 358 .spectral_bin_discard = 4, 359 .spectral_bin_offset = 0, 360 .vht160_mcs_rx_highest = 0, 361 .vht160_mcs_tx_highest = 0, 362 .n_cipher_suites = 11, 363 .ast_skid_limit = 0x10, 364 .num_wds_entries = 0x20, 365 .target_64bit = false, 366 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 367 .shadow_reg_support = false, 368 .rri_on_ddr = false, 369 .hw_filter_reset_required = true, 370 .fw_diag_ce_download = false, 371 .tx_stats_over_pktlog = false, 372 }, 373 { 374 .id = QCA9984_HW_1_0_DEV_VERSION, 375 .dev_id = QCA9984_1_0_DEVICE_ID, 376 .bus = ATH10K_BUS_PCI, 377 .name = "qca9984/qca9994 hw1.0", 378 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR, 379 .uart_pin = 7, 380 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 381 .otp_exe_param = 0x00000700, 382 .continuous_frag_desc = true, 383 .cck_rate_map_rev2 = true, 384 .channel_counters_freq_hz = 150000, 385 .max_probe_resp_desc_thres = 24, 386 .tx_chain_mask = 0xf, 387 .rx_chain_mask = 0xf, 388 .max_spatial_stream = 4, 389 .cal_data_len = 12064, 390 .fw = { 391 .dir = QCA9984_HW_1_0_FW_DIR, 392 .board = QCA9984_HW_1_0_BOARD_DATA_FILE, 393 .eboard = QCA9984_HW_1_0_EBOARD_DATA_FILE, 394 .board_size = QCA99X0_BOARD_DATA_SZ, 395 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 396 .ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ, 397 }, 398 .sw_decrypt_mcast_mgmt = true, 399 .hw_ops = &qca99x0_ops, 400 .decap_align_bytes = 1, 401 .spectral_bin_discard = 12, 402 .spectral_bin_offset = 8, 403 404 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz 405 * or 2x2 160Mhz, long-guard-interval. 406 */ 407 .vht160_mcs_rx_highest = 1560, 408 .vht160_mcs_tx_highest = 1560, 409 .n_cipher_suites = 11, 410 .ast_skid_limit = 0x10, 411 .num_wds_entries = 0x20, 412 .target_64bit = false, 413 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 414 .shadow_reg_support = false, 415 .rri_on_ddr = false, 416 .hw_filter_reset_required = true, 417 .fw_diag_ce_download = false, 418 .tx_stats_over_pktlog = false, 419 }, 420 { 421 .id = QCA9888_HW_2_0_DEV_VERSION, 422 .dev_id = QCA9888_2_0_DEVICE_ID, 423 .bus = ATH10K_BUS_PCI, 424 .name = "qca9888 hw2.0", 425 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR, 426 .uart_pin = 7, 427 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 428 .otp_exe_param = 0x00000700, 429 .continuous_frag_desc = true, 430 .channel_counters_freq_hz = 150000, 431 .max_probe_resp_desc_thres = 24, 432 .tx_chain_mask = 3, 433 .rx_chain_mask = 3, 434 .max_spatial_stream = 2, 435 .cal_data_len = 12064, 436 .fw = { 437 .dir = QCA9888_HW_2_0_FW_DIR, 438 .board = QCA9888_HW_2_0_BOARD_DATA_FILE, 439 .board_size = QCA99X0_BOARD_DATA_SZ, 440 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 441 }, 442 .sw_decrypt_mcast_mgmt = true, 443 .hw_ops = &qca99x0_ops, 444 .decap_align_bytes = 1, 445 .spectral_bin_discard = 12, 446 .spectral_bin_offset = 8, 447 448 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or 449 * 1x1 160Mhz, long-guard-interval. 450 */ 451 .vht160_mcs_rx_highest = 780, 452 .vht160_mcs_tx_highest = 780, 453 .n_cipher_suites = 11, 454 .ast_skid_limit = 0x10, 455 .num_wds_entries = 0x20, 456 .target_64bit = false, 457 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 458 .shadow_reg_support = false, 459 .rri_on_ddr = false, 460 .hw_filter_reset_required = true, 461 .fw_diag_ce_download = false, 462 .tx_stats_over_pktlog = false, 463 }, 464 { 465 .id = QCA9377_HW_1_0_DEV_VERSION, 466 .dev_id = QCA9377_1_0_DEVICE_ID, 467 .bus = ATH10K_BUS_PCI, 468 .name = "qca9377 hw1.0", 469 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 470 .uart_pin = 6, 471 .otp_exe_param = 0, 472 .channel_counters_freq_hz = 88000, 473 .max_probe_resp_desc_thres = 0, 474 .cal_data_len = 8124, 475 .fw = { 476 .dir = QCA9377_HW_1_0_FW_DIR, 477 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 478 .board_size = QCA9377_BOARD_DATA_SZ, 479 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 480 }, 481 .hw_ops = &qca988x_ops, 482 .decap_align_bytes = 4, 483 .spectral_bin_discard = 0, 484 .spectral_bin_offset = 0, 485 .vht160_mcs_rx_highest = 0, 486 .vht160_mcs_tx_highest = 0, 487 .n_cipher_suites = 8, 488 .ast_skid_limit = 0x10, 489 .num_wds_entries = 0x20, 490 .target_64bit = false, 491 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 492 .shadow_reg_support = false, 493 .rri_on_ddr = false, 494 .hw_filter_reset_required = true, 495 .fw_diag_ce_download = false, 496 .tx_stats_over_pktlog = false, 497 }, 498 { 499 .id = QCA9377_HW_1_1_DEV_VERSION, 500 .dev_id = QCA9377_1_0_DEVICE_ID, 501 .bus = ATH10K_BUS_PCI, 502 .name = "qca9377 hw1.1", 503 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 504 .uart_pin = 6, 505 .otp_exe_param = 0, 506 .channel_counters_freq_hz = 88000, 507 .max_probe_resp_desc_thres = 0, 508 .cal_data_len = 8124, 509 .fw = { 510 .dir = QCA9377_HW_1_0_FW_DIR, 511 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 512 .board_size = QCA9377_BOARD_DATA_SZ, 513 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 514 }, 515 .hw_ops = &qca6174_ops, 516 .hw_clk = qca6174_clk, 517 .target_cpu_freq = 176000000, 518 .decap_align_bytes = 4, 519 .spectral_bin_discard = 0, 520 .spectral_bin_offset = 0, 521 .vht160_mcs_rx_highest = 0, 522 .vht160_mcs_tx_highest = 0, 523 .n_cipher_suites = 8, 524 .ast_skid_limit = 0x10, 525 .num_wds_entries = 0x20, 526 .target_64bit = false, 527 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 528 .shadow_reg_support = false, 529 .rri_on_ddr = false, 530 .hw_filter_reset_required = true, 531 .fw_diag_ce_download = true, 532 .tx_stats_over_pktlog = false, 533 }, 534 { 535 .id = QCA9377_HW_1_1_DEV_VERSION, 536 .dev_id = QCA9377_1_0_DEVICE_ID, 537 .bus = ATH10K_BUS_SDIO, 538 .name = "qca9377 hw1.1 sdio", 539 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 540 .uart_pin = 19, 541 .otp_exe_param = 0, 542 .channel_counters_freq_hz = 88000, 543 .max_probe_resp_desc_thres = 0, 544 .cal_data_len = 8124, 545 .fw = { 546 .dir = QCA9377_HW_1_0_FW_DIR, 547 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 548 .board_size = QCA9377_BOARD_DATA_SZ, 549 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 550 }, 551 .hw_ops = &qca6174_ops, 552 .hw_clk = qca6174_clk, 553 .target_cpu_freq = 176000000, 554 .decap_align_bytes = 4, 555 .n_cipher_suites = 8, 556 .num_peers = TARGET_QCA9377_HL_NUM_PEERS, 557 .ast_skid_limit = 0x10, 558 .num_wds_entries = 0x20, 559 .uart_pin_workaround = true, 560 }, 561 { 562 .id = QCA4019_HW_1_0_DEV_VERSION, 563 .dev_id = 0, 564 .bus = ATH10K_BUS_AHB, 565 .name = "qca4019 hw1.0", 566 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR, 567 .uart_pin = 7, 568 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 569 .otp_exe_param = 0x0010000, 570 .continuous_frag_desc = true, 571 .cck_rate_map_rev2 = true, 572 .channel_counters_freq_hz = 125000, 573 .max_probe_resp_desc_thres = 24, 574 .tx_chain_mask = 0x3, 575 .rx_chain_mask = 0x3, 576 .max_spatial_stream = 2, 577 .cal_data_len = 12064, 578 .fw = { 579 .dir = QCA4019_HW_1_0_FW_DIR, 580 .board = QCA4019_HW_1_0_BOARD_DATA_FILE, 581 .board_size = QCA4019_BOARD_DATA_SZ, 582 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, 583 }, 584 .sw_decrypt_mcast_mgmt = true, 585 .hw_ops = &qca99x0_ops, 586 .decap_align_bytes = 1, 587 .spectral_bin_discard = 4, 588 .spectral_bin_offset = 0, 589 .vht160_mcs_rx_highest = 0, 590 .vht160_mcs_tx_highest = 0, 591 .n_cipher_suites = 11, 592 .ast_skid_limit = 0x10, 593 .num_wds_entries = 0x20, 594 .target_64bit = false, 595 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 596 .shadow_reg_support = false, 597 .rri_on_ddr = false, 598 .hw_filter_reset_required = true, 599 .fw_diag_ce_download = false, 600 .tx_stats_over_pktlog = false, 601 }, 602 { 603 .id = WCN3990_HW_1_0_DEV_VERSION, 604 .dev_id = 0, 605 .bus = ATH10K_BUS_SNOC, 606 .name = "wcn3990 hw1.0", 607 .continuous_frag_desc = true, 608 .tx_chain_mask = 0x7, 609 .rx_chain_mask = 0x7, 610 .max_spatial_stream = 4, 611 .fw = { 612 .dir = WCN3990_HW_1_0_FW_DIR, 613 }, 614 .sw_decrypt_mcast_mgmt = true, 615 .hw_ops = &wcn3990_ops, 616 .decap_align_bytes = 1, 617 .num_peers = TARGET_HL_TLV_NUM_PEERS, 618 .n_cipher_suites = 11, 619 .ast_skid_limit = TARGET_HL_TLV_AST_SKID_LIMIT, 620 .num_wds_entries = TARGET_HL_TLV_NUM_WDS_ENTRIES, 621 .target_64bit = true, 622 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC, 623 .shadow_reg_support = true, 624 .rri_on_ddr = true, 625 .hw_filter_reset_required = false, 626 .fw_diag_ce_download = false, 627 .tx_stats_over_pktlog = false, 628 }, 629 }; 630 631 static const char *const ath10k_core_fw_feature_str[] = { 632 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 633 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 634 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 635 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 636 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 637 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 638 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 639 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 640 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 641 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 642 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 643 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 644 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", 645 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl", 646 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param", 647 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war", 648 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast", 649 [ATH10K_FW_FEATURE_NO_PS] = "no-ps", 650 [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference", 651 [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi", 652 [ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL] = "single-chan-info-per-channel", 653 [ATH10K_FW_FEATURE_PEER_FIXED_RATE] = "peer-fixed-rate", 654 }; 655 656 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 657 size_t buf_len, 658 enum ath10k_fw_features feat) 659 { 660 /* make sure that ath10k_core_fw_feature_str[] gets updated */ 661 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != 662 ATH10K_FW_FEATURE_COUNT); 663 664 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 665 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 666 return scnprintf(buf, buf_len, "bit%d", feat); 667 } 668 669 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 670 } 671 672 void ath10k_core_get_fw_features_str(struct ath10k *ar, 673 char *buf, 674 size_t buf_len) 675 { 676 size_t len = 0; 677 int i; 678 679 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 680 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) { 681 if (len > 0) 682 len += scnprintf(buf + len, buf_len - len, ","); 683 684 len += ath10k_core_get_fw_feature_str(buf + len, 685 buf_len - len, 686 i); 687 } 688 } 689 } 690 691 static void ath10k_send_suspend_complete(struct ath10k *ar) 692 { 693 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 694 695 complete(&ar->target_suspend); 696 } 697 698 static int ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode) 699 { 700 int ret; 701 u32 param = 0; 702 703 ret = ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256); 704 if (ret) 705 return ret; 706 707 ret = ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99); 708 if (ret) 709 return ret; 710 711 ret = ath10k_bmi_read32(ar, hi_acs_flags, ¶m); 712 if (ret) 713 return ret; 714 715 param |= HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET; 716 717 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) 718 param |= HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE; 719 else 720 param &= ~HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE; 721 722 if (mode == ATH10K_FIRMWARE_MODE_UTF) 723 param &= ~HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET; 724 else 725 param |= HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET; 726 727 ret = ath10k_bmi_write32(ar, hi_acs_flags, param); 728 if (ret) 729 return ret; 730 731 ret = ath10k_bmi_read32(ar, hi_option_flag2, ¶m); 732 if (ret) 733 return ret; 734 735 param |= HI_OPTION_SDIO_CRASH_DUMP_ENHANCEMENT_HOST; 736 737 ret = ath10k_bmi_write32(ar, hi_option_flag2, param); 738 if (ret) 739 return ret; 740 741 return 0; 742 } 743 744 static int ath10k_init_configure_target(struct ath10k *ar) 745 { 746 u32 param_host; 747 int ret; 748 749 /* tell target which HTC version it is used*/ 750 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 751 HTC_PROTOCOL_VERSION); 752 if (ret) { 753 ath10k_err(ar, "settings HTC version failed\n"); 754 return ret; 755 } 756 757 /* set the firmware mode to STA/IBSS/AP */ 758 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 759 if (ret) { 760 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 761 return ret; 762 } 763 764 /* TODO following parameters need to be re-visited. */ 765 /* num_device */ 766 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 767 /* Firmware mode */ 768 /* FIXME: Why FW_MODE_AP ??.*/ 769 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 770 /* mac_addr_method */ 771 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 772 /* firmware_bridge */ 773 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 774 /* fwsubmode */ 775 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 776 777 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 778 if (ret) { 779 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 780 return ret; 781 } 782 783 /* We do all byte-swapping on the host */ 784 ret = ath10k_bmi_write32(ar, hi_be, 0); 785 if (ret) { 786 ath10k_err(ar, "setting host CPU BE mode failed\n"); 787 return ret; 788 } 789 790 /* FW descriptor/Data swap flags */ 791 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 792 793 if (ret) { 794 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 795 return ret; 796 } 797 798 /* Some devices have a special sanity check that verifies the PCI 799 * Device ID is written to this host interest var. It is known to be 800 * required to boot QCA6164. 801 */ 802 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 803 ar->dev_id); 804 if (ret) { 805 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 806 return ret; 807 } 808 809 return 0; 810 } 811 812 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 813 const char *dir, 814 const char *file) 815 { 816 char filename[100]; 817 const struct firmware *fw; 818 int ret; 819 820 if (file == NULL) 821 return ERR_PTR(-ENOENT); 822 823 if (dir == NULL) 824 dir = "."; 825 826 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 827 ret = firmware_request_nowarn(&fw, filename, ar->dev); 828 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n", 829 filename, ret); 830 831 if (ret) 832 return ERR_PTR(ret); 833 834 return fw; 835 } 836 837 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 838 size_t data_len) 839 { 840 u32 board_data_size = ar->hw_params.fw.board_size; 841 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 842 u32 board_ext_data_addr; 843 int ret; 844 845 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 846 if (ret) { 847 ath10k_err(ar, "could not read board ext data addr (%d)\n", 848 ret); 849 return ret; 850 } 851 852 ath10k_dbg(ar, ATH10K_DBG_BOOT, 853 "boot push board extended data addr 0x%x\n", 854 board_ext_data_addr); 855 856 if (board_ext_data_addr == 0) 857 return 0; 858 859 if (data_len != (board_data_size + board_ext_data_size)) { 860 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 861 data_len, board_data_size, board_ext_data_size); 862 return -EINVAL; 863 } 864 865 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 866 data + board_data_size, 867 board_ext_data_size); 868 if (ret) { 869 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 870 return ret; 871 } 872 873 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 874 (board_ext_data_size << 16) | 1); 875 if (ret) { 876 ath10k_err(ar, "could not write board ext data bit (%d)\n", 877 ret); 878 return ret; 879 } 880 881 return 0; 882 } 883 884 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) 885 { 886 u32 result, address; 887 u8 board_id, chip_id; 888 bool ext_bid_support; 889 int ret, bmi_board_id_param; 890 891 address = ar->hw_params.patch_load_addr; 892 893 if (!ar->normal_mode_fw.fw_file.otp_data || 894 !ar->normal_mode_fw.fw_file.otp_len) { 895 ath10k_warn(ar, 896 "failed to retrieve board id because of invalid otp\n"); 897 return -ENODATA; 898 } 899 900 if (ar->id.bmi_ids_valid) { 901 ath10k_dbg(ar, ATH10K_DBG_BOOT, 902 "boot already acquired valid otp board id,skip download, board_id %d chip_id %d\n", 903 ar->id.bmi_board_id, ar->id.bmi_chip_id); 904 goto skip_otp_download; 905 } 906 907 ath10k_dbg(ar, ATH10K_DBG_BOOT, 908 "boot upload otp to 0x%x len %zd for board id\n", 909 address, ar->normal_mode_fw.fw_file.otp_len); 910 911 ret = ath10k_bmi_fast_download(ar, address, 912 ar->normal_mode_fw.fw_file.otp_data, 913 ar->normal_mode_fw.fw_file.otp_len); 914 if (ret) { 915 ath10k_err(ar, "could not write otp for board id check: %d\n", 916 ret); 917 return ret; 918 } 919 920 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 921 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 922 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID; 923 else 924 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID; 925 926 ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result); 927 if (ret) { 928 ath10k_err(ar, "could not execute otp for board id check: %d\n", 929 ret); 930 return ret; 931 } 932 933 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); 934 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); 935 ext_bid_support = (result & ATH10K_BMI_EXT_BOARD_ID_SUPPORT); 936 937 ath10k_dbg(ar, ATH10K_DBG_BOOT, 938 "boot get otp board id result 0x%08x board_id %d chip_id %d ext_bid_support %d\n", 939 result, board_id, chip_id, ext_bid_support); 940 941 ar->id.ext_bid_supported = ext_bid_support; 942 943 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 || 944 (board_id == 0)) { 945 ath10k_dbg(ar, ATH10K_DBG_BOOT, 946 "board id does not exist in otp, ignore it\n"); 947 return -EOPNOTSUPP; 948 } 949 950 ar->id.bmi_ids_valid = true; 951 ar->id.bmi_board_id = board_id; 952 ar->id.bmi_chip_id = chip_id; 953 954 skip_otp_download: 955 956 return 0; 957 } 958 959 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data) 960 { 961 struct ath10k *ar = data; 962 const char *bdf_ext; 963 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC; 964 u8 bdf_enabled; 965 int i; 966 967 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE) 968 return; 969 970 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) { 971 ath10k_dbg(ar, ATH10K_DBG_BOOT, 972 "wrong smbios bdf ext type length (%d).\n", 973 hdr->length); 974 return; 975 } 976 977 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET); 978 if (!bdf_enabled) { 979 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n"); 980 return; 981 } 982 983 /* Only one string exists (per spec) */ 984 bdf_ext = (char *)hdr + hdr->length; 985 986 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) { 987 ath10k_dbg(ar, ATH10K_DBG_BOOT, 988 "bdf variant magic does not match.\n"); 989 return; 990 } 991 992 for (i = 0; i < strlen(bdf_ext); i++) { 993 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) { 994 ath10k_dbg(ar, ATH10K_DBG_BOOT, 995 "bdf variant name contains non ascii chars.\n"); 996 return; 997 } 998 } 999 1000 /* Copy extension name without magic suffix */ 1001 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic), 1002 sizeof(ar->id.bdf_ext)) < 0) { 1003 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1004 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 1005 bdf_ext); 1006 return; 1007 } 1008 1009 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1010 "found and validated bdf variant smbios_type 0x%x bdf %s\n", 1011 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext); 1012 } 1013 1014 static int ath10k_core_check_smbios(struct ath10k *ar) 1015 { 1016 ar->id.bdf_ext[0] = '\0'; 1017 dmi_walk(ath10k_core_check_bdfext, ar); 1018 1019 if (ar->id.bdf_ext[0] == '\0') 1020 return -ENODATA; 1021 1022 return 0; 1023 } 1024 1025 int ath10k_core_check_dt(struct ath10k *ar) 1026 { 1027 struct device_node *node; 1028 const char *variant = NULL; 1029 1030 node = ar->dev->of_node; 1031 if (!node) 1032 return -ENOENT; 1033 1034 of_property_read_string(node, "qcom,ath10k-calibration-variant", 1035 &variant); 1036 if (!variant) 1037 return -ENODATA; 1038 1039 if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0) 1040 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1041 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 1042 variant); 1043 1044 return 0; 1045 } 1046 EXPORT_SYMBOL(ath10k_core_check_dt); 1047 1048 static int ath10k_download_fw(struct ath10k *ar) 1049 { 1050 u32 address, data_len; 1051 const void *data; 1052 int ret; 1053 struct pm_qos_request latency_qos; 1054 1055 address = ar->hw_params.patch_load_addr; 1056 1057 data = ar->running_fw->fw_file.firmware_data; 1058 data_len = ar->running_fw->fw_file.firmware_len; 1059 1060 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file); 1061 if (ret) { 1062 ath10k_err(ar, "failed to configure fw code swap: %d\n", 1063 ret); 1064 return ret; 1065 } 1066 1067 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1068 "boot uploading firmware image %pK len %d\n", 1069 data, data_len); 1070 1071 /* Check if device supports to download firmware via 1072 * diag copy engine. Downloading firmware via diag CE 1073 * greatly reduces the time to download firmware. 1074 */ 1075 if (ar->hw_params.fw_diag_ce_download) { 1076 ret = ath10k_hw_diag_fast_download(ar, address, 1077 data, data_len); 1078 if (ret == 0) 1079 /* firmware upload via diag ce was successful */ 1080 return 0; 1081 1082 ath10k_warn(ar, 1083 "failed to upload firmware via diag ce, trying BMI: %d", 1084 ret); 1085 } 1086 1087 memset(&latency_qos, 0, sizeof(latency_qos)); 1088 cpu_latency_qos_add_request(&latency_qos, 0); 1089 1090 ret = ath10k_bmi_fast_download(ar, address, data, data_len); 1091 1092 cpu_latency_qos_remove_request(&latency_qos); 1093 1094 return ret; 1095 } 1096 1097 void ath10k_core_free_board_files(struct ath10k *ar) 1098 { 1099 if (!IS_ERR(ar->normal_mode_fw.board)) 1100 release_firmware(ar->normal_mode_fw.board); 1101 1102 if (!IS_ERR(ar->normal_mode_fw.ext_board)) 1103 release_firmware(ar->normal_mode_fw.ext_board); 1104 1105 ar->normal_mode_fw.board = NULL; 1106 ar->normal_mode_fw.board_data = NULL; 1107 ar->normal_mode_fw.board_len = 0; 1108 ar->normal_mode_fw.ext_board = NULL; 1109 ar->normal_mode_fw.ext_board_data = NULL; 1110 ar->normal_mode_fw.ext_board_len = 0; 1111 } 1112 EXPORT_SYMBOL(ath10k_core_free_board_files); 1113 1114 static void ath10k_core_free_firmware_files(struct ath10k *ar) 1115 { 1116 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware)) 1117 release_firmware(ar->normal_mode_fw.fw_file.firmware); 1118 1119 if (!IS_ERR(ar->cal_file)) 1120 release_firmware(ar->cal_file); 1121 1122 if (!IS_ERR(ar->pre_cal_file)) 1123 release_firmware(ar->pre_cal_file); 1124 1125 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file); 1126 1127 ar->normal_mode_fw.fw_file.otp_data = NULL; 1128 ar->normal_mode_fw.fw_file.otp_len = 0; 1129 1130 ar->normal_mode_fw.fw_file.firmware = NULL; 1131 ar->normal_mode_fw.fw_file.firmware_data = NULL; 1132 ar->normal_mode_fw.fw_file.firmware_len = 0; 1133 1134 ar->cal_file = NULL; 1135 ar->pre_cal_file = NULL; 1136 } 1137 1138 static int ath10k_fetch_cal_file(struct ath10k *ar) 1139 { 1140 char filename[100]; 1141 1142 /* pre-cal-<bus>-<id>.bin */ 1143 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin", 1144 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1145 1146 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1147 if (!IS_ERR(ar->pre_cal_file)) 1148 goto success; 1149 1150 /* cal-<bus>-<id>.bin */ 1151 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 1152 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1153 1154 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1155 if (IS_ERR(ar->cal_file)) 1156 /* calibration file is optional, don't print any warnings */ 1157 return PTR_ERR(ar->cal_file); 1158 success: 1159 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 1160 ATH10K_FW_DIR, filename); 1161 1162 return 0; 1163 } 1164 1165 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar, int bd_ie_type) 1166 { 1167 const struct firmware *fw; 1168 1169 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1170 if (!ar->hw_params.fw.board) { 1171 ath10k_err(ar, "failed to find board file fw entry\n"); 1172 return -EINVAL; 1173 } 1174 1175 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1176 ar->hw_params.fw.dir, 1177 ar->hw_params.fw.board); 1178 if (IS_ERR(ar->normal_mode_fw.board)) 1179 return PTR_ERR(ar->normal_mode_fw.board); 1180 1181 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data; 1182 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size; 1183 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1184 if (!ar->hw_params.fw.eboard) { 1185 ath10k_err(ar, "failed to find eboard file fw entry\n"); 1186 return -EINVAL; 1187 } 1188 1189 fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1190 ar->hw_params.fw.eboard); 1191 ar->normal_mode_fw.ext_board = fw; 1192 if (IS_ERR(ar->normal_mode_fw.ext_board)) 1193 return PTR_ERR(ar->normal_mode_fw.ext_board); 1194 1195 ar->normal_mode_fw.ext_board_data = ar->normal_mode_fw.ext_board->data; 1196 ar->normal_mode_fw.ext_board_len = ar->normal_mode_fw.ext_board->size; 1197 } 1198 1199 return 0; 1200 } 1201 1202 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, 1203 const void *buf, size_t buf_len, 1204 const char *boardname, 1205 int bd_ie_type) 1206 { 1207 const struct ath10k_fw_ie *hdr; 1208 bool name_match_found; 1209 int ret, board_ie_id; 1210 size_t board_ie_len; 1211 const void *board_ie_data; 1212 1213 name_match_found = false; 1214 1215 /* go through ATH10K_BD_IE_BOARD_ elements */ 1216 while (buf_len > sizeof(struct ath10k_fw_ie)) { 1217 hdr = buf; 1218 board_ie_id = le32_to_cpu(hdr->id); 1219 board_ie_len = le32_to_cpu(hdr->len); 1220 board_ie_data = hdr->data; 1221 1222 buf_len -= sizeof(*hdr); 1223 buf += sizeof(*hdr); 1224 1225 if (buf_len < ALIGN(board_ie_len, 4)) { 1226 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", 1227 buf_len, ALIGN(board_ie_len, 4)); 1228 ret = -EINVAL; 1229 goto out; 1230 } 1231 1232 switch (board_ie_id) { 1233 case ATH10K_BD_IE_BOARD_NAME: 1234 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", 1235 board_ie_data, board_ie_len); 1236 1237 if (board_ie_len != strlen(boardname)) 1238 break; 1239 1240 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 1241 if (ret) 1242 break; 1243 1244 name_match_found = true; 1245 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1246 "boot found match for name '%s'", 1247 boardname); 1248 break; 1249 case ATH10K_BD_IE_BOARD_DATA: 1250 if (!name_match_found) 1251 /* no match found */ 1252 break; 1253 1254 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1255 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1256 "boot found board data for '%s'", 1257 boardname); 1258 1259 ar->normal_mode_fw.board_data = board_ie_data; 1260 ar->normal_mode_fw.board_len = board_ie_len; 1261 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1262 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1263 "boot found eboard data for '%s'", 1264 boardname); 1265 1266 ar->normal_mode_fw.ext_board_data = board_ie_data; 1267 ar->normal_mode_fw.ext_board_len = board_ie_len; 1268 } 1269 1270 ret = 0; 1271 goto out; 1272 default: 1273 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", 1274 board_ie_id); 1275 break; 1276 } 1277 1278 /* jump over the padding */ 1279 board_ie_len = ALIGN(board_ie_len, 4); 1280 1281 buf_len -= board_ie_len; 1282 buf += board_ie_len; 1283 } 1284 1285 /* no match found */ 1286 ret = -ENOENT; 1287 1288 out: 1289 return ret; 1290 } 1291 1292 static int ath10k_core_search_bd(struct ath10k *ar, 1293 const char *boardname, 1294 const u8 *data, 1295 size_t len) 1296 { 1297 size_t ie_len; 1298 struct ath10k_fw_ie *hdr; 1299 int ret = -ENOENT, ie_id; 1300 1301 while (len > sizeof(struct ath10k_fw_ie)) { 1302 hdr = (struct ath10k_fw_ie *)data; 1303 ie_id = le32_to_cpu(hdr->id); 1304 ie_len = le32_to_cpu(hdr->len); 1305 1306 len -= sizeof(*hdr); 1307 data = hdr->data; 1308 1309 if (len < ALIGN(ie_len, 4)) { 1310 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", 1311 ie_id, ie_len, len); 1312 return -EINVAL; 1313 } 1314 1315 switch (ie_id) { 1316 case ATH10K_BD_IE_BOARD: 1317 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1318 boardname, 1319 ATH10K_BD_IE_BOARD); 1320 if (ret == -ENOENT) 1321 /* no match found, continue */ 1322 break; 1323 1324 /* either found or error, so stop searching */ 1325 goto out; 1326 case ATH10K_BD_IE_BOARD_EXT: 1327 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1328 boardname, 1329 ATH10K_BD_IE_BOARD_EXT); 1330 if (ret == -ENOENT) 1331 /* no match found, continue */ 1332 break; 1333 1334 /* either found or error, so stop searching */ 1335 goto out; 1336 } 1337 1338 /* jump over the padding */ 1339 ie_len = ALIGN(ie_len, 4); 1340 1341 len -= ie_len; 1342 data += ie_len; 1343 } 1344 1345 out: 1346 /* return result of parse_bd_ie_board() or -ENOENT */ 1347 return ret; 1348 } 1349 1350 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, 1351 const char *boardname, 1352 const char *fallback_boardname, 1353 const char *filename) 1354 { 1355 size_t len, magic_len; 1356 const u8 *data; 1357 int ret; 1358 1359 /* Skip if already fetched during board data download */ 1360 if (!ar->normal_mode_fw.board) 1361 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1362 ar->hw_params.fw.dir, 1363 filename); 1364 if (IS_ERR(ar->normal_mode_fw.board)) 1365 return PTR_ERR(ar->normal_mode_fw.board); 1366 1367 data = ar->normal_mode_fw.board->data; 1368 len = ar->normal_mode_fw.board->size; 1369 1370 /* magic has extra null byte padded */ 1371 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; 1372 if (len < magic_len) { 1373 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", 1374 ar->hw_params.fw.dir, filename, len); 1375 ret = -EINVAL; 1376 goto err; 1377 } 1378 1379 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { 1380 ath10k_err(ar, "found invalid board magic\n"); 1381 ret = -EINVAL; 1382 goto err; 1383 } 1384 1385 /* magic is padded to 4 bytes */ 1386 magic_len = ALIGN(magic_len, 4); 1387 if (len < magic_len) { 1388 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", 1389 ar->hw_params.fw.dir, filename, len); 1390 ret = -EINVAL; 1391 goto err; 1392 } 1393 1394 data += magic_len; 1395 len -= magic_len; 1396 1397 /* attempt to find boardname in the IE list */ 1398 ret = ath10k_core_search_bd(ar, boardname, data, len); 1399 1400 /* if we didn't find it and have a fallback name, try that */ 1401 if (ret == -ENOENT && fallback_boardname) 1402 ret = ath10k_core_search_bd(ar, fallback_boardname, data, len); 1403 1404 if (ret == -ENOENT) { 1405 ath10k_err(ar, 1406 "failed to fetch board data for %s from %s/%s\n", 1407 boardname, ar->hw_params.fw.dir, filename); 1408 ret = -ENODATA; 1409 } 1410 1411 if (ret) 1412 goto err; 1413 1414 return 0; 1415 1416 err: 1417 ath10k_core_free_board_files(ar); 1418 return ret; 1419 } 1420 1421 static int ath10k_core_create_board_name(struct ath10k *ar, char *name, 1422 size_t name_len, bool with_variant) 1423 { 1424 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */ 1425 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 }; 1426 1427 if (with_variant && ar->id.bdf_ext[0] != '\0') 1428 scnprintf(variant, sizeof(variant), ",variant=%s", 1429 ar->id.bdf_ext); 1430 1431 if (ar->id.bmi_ids_valid) { 1432 scnprintf(name, name_len, 1433 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s", 1434 ath10k_bus_str(ar->hif.bus), 1435 ar->id.bmi_chip_id, 1436 ar->id.bmi_board_id, variant); 1437 goto out; 1438 } 1439 1440 if (ar->id.qmi_ids_valid) { 1441 if (with_variant && ar->id.bdf_ext[0] != '\0') 1442 scnprintf(name, name_len, 1443 "bus=%s,qmi-board-id=%x,qmi-chip-id=%x%s", 1444 ath10k_bus_str(ar->hif.bus), 1445 ar->id.qmi_board_id, ar->id.qmi_chip_id, 1446 variant); 1447 else 1448 scnprintf(name, name_len, 1449 "bus=%s,qmi-board-id=%x", 1450 ath10k_bus_str(ar->hif.bus), 1451 ar->id.qmi_board_id); 1452 goto out; 1453 } 1454 1455 scnprintf(name, name_len, 1456 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s", 1457 ath10k_bus_str(ar->hif.bus), 1458 ar->id.vendor, ar->id.device, 1459 ar->id.subsystem_vendor, ar->id.subsystem_device, variant); 1460 out: 1461 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); 1462 1463 return 0; 1464 } 1465 1466 static int ath10k_core_create_eboard_name(struct ath10k *ar, char *name, 1467 size_t name_len) 1468 { 1469 if (ar->id.bmi_ids_valid) { 1470 scnprintf(name, name_len, 1471 "bus=%s,bmi-chip-id=%d,bmi-eboard-id=%d", 1472 ath10k_bus_str(ar->hif.bus), 1473 ar->id.bmi_chip_id, 1474 ar->id.bmi_eboard_id); 1475 1476 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using eboard name '%s'\n", name); 1477 return 0; 1478 } 1479 /* Fallback if returned board id is zero */ 1480 return -1; 1481 } 1482 1483 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type) 1484 { 1485 char boardname[100], fallback_boardname[100]; 1486 int ret; 1487 1488 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1489 ret = ath10k_core_create_board_name(ar, boardname, 1490 sizeof(boardname), true); 1491 if (ret) { 1492 ath10k_err(ar, "failed to create board name: %d", ret); 1493 return ret; 1494 } 1495 1496 ret = ath10k_core_create_board_name(ar, fallback_boardname, 1497 sizeof(boardname), false); 1498 if (ret) { 1499 ath10k_err(ar, "failed to create fallback board name: %d", ret); 1500 return ret; 1501 } 1502 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1503 ret = ath10k_core_create_eboard_name(ar, boardname, 1504 sizeof(boardname)); 1505 if (ret) { 1506 ath10k_err(ar, "fallback to eboard.bin since board id 0"); 1507 goto fallback; 1508 } 1509 } 1510 1511 ar->bd_api = 2; 1512 ret = ath10k_core_fetch_board_data_api_n(ar, boardname, 1513 fallback_boardname, 1514 ATH10K_BOARD_API2_FILE); 1515 if (!ret) 1516 goto success; 1517 1518 fallback: 1519 ar->bd_api = 1; 1520 ret = ath10k_core_fetch_board_data_api_1(ar, bd_ie_type); 1521 if (ret) { 1522 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n", 1523 ar->hw_params.fw.dir); 1524 return ret; 1525 } 1526 1527 success: 1528 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); 1529 return 0; 1530 } 1531 EXPORT_SYMBOL(ath10k_core_fetch_board_file); 1532 1533 static int ath10k_core_get_ext_board_id_from_otp(struct ath10k *ar) 1534 { 1535 u32 result, address; 1536 u8 ext_board_id; 1537 int ret; 1538 1539 address = ar->hw_params.patch_load_addr; 1540 1541 if (!ar->normal_mode_fw.fw_file.otp_data || 1542 !ar->normal_mode_fw.fw_file.otp_len) { 1543 ath10k_warn(ar, 1544 "failed to retrieve extended board id due to otp binary missing\n"); 1545 return -ENODATA; 1546 } 1547 1548 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1549 "boot upload otp to 0x%x len %zd for ext board id\n", 1550 address, ar->normal_mode_fw.fw_file.otp_len); 1551 1552 ret = ath10k_bmi_fast_download(ar, address, 1553 ar->normal_mode_fw.fw_file.otp_data, 1554 ar->normal_mode_fw.fw_file.otp_len); 1555 if (ret) { 1556 ath10k_err(ar, "could not write otp for ext board id check: %d\n", 1557 ret); 1558 return ret; 1559 } 1560 1561 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EXT_BOARD_ID, &result); 1562 if (ret) { 1563 ath10k_err(ar, "could not execute otp for ext board id check: %d\n", 1564 ret); 1565 return ret; 1566 } 1567 1568 if (!result) { 1569 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1570 "ext board id does not exist in otp, ignore it\n"); 1571 return -EOPNOTSUPP; 1572 } 1573 1574 ext_board_id = result & ATH10K_BMI_EBOARD_ID_STATUS_MASK; 1575 1576 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1577 "boot get otp ext board id result 0x%08x ext_board_id %d\n", 1578 result, ext_board_id); 1579 1580 ar->id.bmi_eboard_id = ext_board_id; 1581 1582 return 0; 1583 } 1584 1585 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 1586 size_t data_len) 1587 { 1588 u32 board_data_size = ar->hw_params.fw.board_size; 1589 u32 eboard_data_size = ar->hw_params.fw.ext_board_size; 1590 u32 board_address; 1591 u32 ext_board_address; 1592 int ret; 1593 1594 ret = ath10k_push_board_ext_data(ar, data, data_len); 1595 if (ret) { 1596 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 1597 goto exit; 1598 } 1599 1600 ret = ath10k_bmi_read32(ar, hi_board_data, &board_address); 1601 if (ret) { 1602 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 1603 goto exit; 1604 } 1605 1606 ret = ath10k_bmi_write_memory(ar, board_address, data, 1607 min_t(u32, board_data_size, 1608 data_len)); 1609 if (ret) { 1610 ath10k_err(ar, "could not write board data (%d)\n", ret); 1611 goto exit; 1612 } 1613 1614 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 1615 if (ret) { 1616 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 1617 goto exit; 1618 } 1619 1620 if (!ar->id.ext_bid_supported) 1621 goto exit; 1622 1623 /* Extended board data download */ 1624 ret = ath10k_core_get_ext_board_id_from_otp(ar); 1625 if (ret == -EOPNOTSUPP) { 1626 /* Not fetching ext_board_data if ext board id is 0 */ 1627 ath10k_dbg(ar, ATH10K_DBG_BOOT, "otp returned ext board id 0\n"); 1628 return 0; 1629 } else if (ret) { 1630 ath10k_err(ar, "failed to get extended board id: %d\n", ret); 1631 goto exit; 1632 } 1633 1634 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD_EXT); 1635 if (ret) 1636 goto exit; 1637 1638 if (ar->normal_mode_fw.ext_board_data) { 1639 ext_board_address = board_address + EXT_BOARD_ADDRESS_OFFSET; 1640 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1641 "boot writing ext board data to addr 0x%x", 1642 ext_board_address); 1643 ret = ath10k_bmi_write_memory(ar, ext_board_address, 1644 ar->normal_mode_fw.ext_board_data, 1645 min_t(u32, eboard_data_size, data_len)); 1646 if (ret) 1647 ath10k_err(ar, "failed to write ext board data: %d\n", ret); 1648 } 1649 1650 exit: 1651 return ret; 1652 } 1653 1654 static int ath10k_download_and_run_otp(struct ath10k *ar) 1655 { 1656 u32 result, address = ar->hw_params.patch_load_addr; 1657 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 1658 int ret; 1659 1660 ret = ath10k_download_board_data(ar, 1661 ar->running_fw->board_data, 1662 ar->running_fw->board_len); 1663 if (ret) { 1664 ath10k_err(ar, "failed to download board data: %d\n", ret); 1665 return ret; 1666 } 1667 1668 /* OTP is optional */ 1669 1670 if (!ar->running_fw->fw_file.otp_data || 1671 !ar->running_fw->fw_file.otp_len) { 1672 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n", 1673 ar->running_fw->fw_file.otp_data, 1674 ar->running_fw->fw_file.otp_len); 1675 return 0; 1676 } 1677 1678 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 1679 address, ar->running_fw->fw_file.otp_len); 1680 1681 ret = ath10k_bmi_fast_download(ar, address, 1682 ar->running_fw->fw_file.otp_data, 1683 ar->running_fw->fw_file.otp_len); 1684 if (ret) { 1685 ath10k_err(ar, "could not write otp (%d)\n", ret); 1686 return ret; 1687 } 1688 1689 /* As of now pre-cal is valid for 10_4 variants */ 1690 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 1691 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 1692 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL; 1693 1694 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 1695 if (ret) { 1696 ath10k_err(ar, "could not execute otp (%d)\n", ret); 1697 return ret; 1698 } 1699 1700 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 1701 1702 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 1703 ar->running_fw->fw_file.fw_features)) && 1704 result != 0) { 1705 ath10k_err(ar, "otp calibration failed: %d", result); 1706 return -EINVAL; 1707 } 1708 1709 return 0; 1710 } 1711 1712 static int ath10k_download_cal_file(struct ath10k *ar, 1713 const struct firmware *file) 1714 { 1715 int ret; 1716 1717 if (!file) 1718 return -ENOENT; 1719 1720 if (IS_ERR(file)) 1721 return PTR_ERR(file); 1722 1723 ret = ath10k_download_board_data(ar, file->data, file->size); 1724 if (ret) { 1725 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 1726 return ret; 1727 } 1728 1729 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 1730 1731 return 0; 1732 } 1733 1734 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name) 1735 { 1736 struct device_node *node; 1737 int data_len; 1738 void *data; 1739 int ret; 1740 1741 node = ar->dev->of_node; 1742 if (!node) 1743 /* Device Tree is optional, don't print any warnings if 1744 * there's no node for ath10k. 1745 */ 1746 return -ENOENT; 1747 1748 if (!of_get_property(node, dt_name, &data_len)) { 1749 /* The calibration data node is optional */ 1750 return -ENOENT; 1751 } 1752 1753 if (data_len != ar->hw_params.cal_data_len) { 1754 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 1755 data_len); 1756 ret = -EMSGSIZE; 1757 goto out; 1758 } 1759 1760 data = kmalloc(data_len, GFP_KERNEL); 1761 if (!data) { 1762 ret = -ENOMEM; 1763 goto out; 1764 } 1765 1766 ret = of_property_read_u8_array(node, dt_name, data, data_len); 1767 if (ret) { 1768 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 1769 ret); 1770 goto out_free; 1771 } 1772 1773 ret = ath10k_download_board_data(ar, data, data_len); 1774 if (ret) { 1775 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 1776 ret); 1777 goto out_free; 1778 } 1779 1780 ret = 0; 1781 1782 out_free: 1783 kfree(data); 1784 1785 out: 1786 return ret; 1787 } 1788 1789 static int ath10k_download_cal_eeprom(struct ath10k *ar) 1790 { 1791 size_t data_len; 1792 void *data = NULL; 1793 int ret; 1794 1795 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len); 1796 if (ret) { 1797 if (ret != -EOPNOTSUPP) 1798 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n", 1799 ret); 1800 goto out_free; 1801 } 1802 1803 ret = ath10k_download_board_data(ar, data, data_len); 1804 if (ret) { 1805 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n", 1806 ret); 1807 goto out_free; 1808 } 1809 1810 ret = 0; 1811 1812 out_free: 1813 kfree(data); 1814 1815 return ret; 1816 } 1817 1818 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1819 struct ath10k_fw_file *fw_file) 1820 { 1821 size_t magic_len, len, ie_len; 1822 int ie_id, i, index, bit, ret; 1823 struct ath10k_fw_ie *hdr; 1824 const u8 *data; 1825 __le32 *timestamp, *version; 1826 1827 /* first fetch the firmware file (firmware-*.bin) */ 1828 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1829 name); 1830 if (IS_ERR(fw_file->firmware)) 1831 return PTR_ERR(fw_file->firmware); 1832 1833 data = fw_file->firmware->data; 1834 len = fw_file->firmware->size; 1835 1836 /* magic also includes the null byte, check that as well */ 1837 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 1838 1839 if (len < magic_len) { 1840 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 1841 ar->hw_params.fw.dir, name, len); 1842 ret = -EINVAL; 1843 goto err; 1844 } 1845 1846 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 1847 ath10k_err(ar, "invalid firmware magic\n"); 1848 ret = -EINVAL; 1849 goto err; 1850 } 1851 1852 /* jump over the padding */ 1853 magic_len = ALIGN(magic_len, 4); 1854 1855 len -= magic_len; 1856 data += magic_len; 1857 1858 /* loop elements */ 1859 while (len > sizeof(struct ath10k_fw_ie)) { 1860 hdr = (struct ath10k_fw_ie *)data; 1861 1862 ie_id = le32_to_cpu(hdr->id); 1863 ie_len = le32_to_cpu(hdr->len); 1864 1865 len -= sizeof(*hdr); 1866 data += sizeof(*hdr); 1867 1868 if (len < ie_len) { 1869 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 1870 ie_id, len, ie_len); 1871 ret = -EINVAL; 1872 goto err; 1873 } 1874 1875 switch (ie_id) { 1876 case ATH10K_FW_IE_FW_VERSION: 1877 if (ie_len > sizeof(fw_file->fw_version) - 1) 1878 break; 1879 1880 memcpy(fw_file->fw_version, data, ie_len); 1881 fw_file->fw_version[ie_len] = '\0'; 1882 1883 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1884 "found fw version %s\n", 1885 fw_file->fw_version); 1886 break; 1887 case ATH10K_FW_IE_TIMESTAMP: 1888 if (ie_len != sizeof(u32)) 1889 break; 1890 1891 timestamp = (__le32 *)data; 1892 1893 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 1894 le32_to_cpup(timestamp)); 1895 break; 1896 case ATH10K_FW_IE_FEATURES: 1897 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1898 "found firmware features ie (%zd B)\n", 1899 ie_len); 1900 1901 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 1902 index = i / 8; 1903 bit = i % 8; 1904 1905 if (index == ie_len) 1906 break; 1907 1908 if (data[index] & (1 << bit)) { 1909 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1910 "Enabling feature bit: %i\n", 1911 i); 1912 __set_bit(i, fw_file->fw_features); 1913 } 1914 } 1915 1916 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 1917 fw_file->fw_features, 1918 sizeof(fw_file->fw_features)); 1919 break; 1920 case ATH10K_FW_IE_FW_IMAGE: 1921 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1922 "found fw image ie (%zd B)\n", 1923 ie_len); 1924 1925 fw_file->firmware_data = data; 1926 fw_file->firmware_len = ie_len; 1927 1928 break; 1929 case ATH10K_FW_IE_OTP_IMAGE: 1930 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1931 "found otp image ie (%zd B)\n", 1932 ie_len); 1933 1934 fw_file->otp_data = data; 1935 fw_file->otp_len = ie_len; 1936 1937 break; 1938 case ATH10K_FW_IE_WMI_OP_VERSION: 1939 if (ie_len != sizeof(u32)) 1940 break; 1941 1942 version = (__le32 *)data; 1943 1944 fw_file->wmi_op_version = le32_to_cpup(version); 1945 1946 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 1947 fw_file->wmi_op_version); 1948 break; 1949 case ATH10K_FW_IE_HTT_OP_VERSION: 1950 if (ie_len != sizeof(u32)) 1951 break; 1952 1953 version = (__le32 *)data; 1954 1955 fw_file->htt_op_version = le32_to_cpup(version); 1956 1957 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 1958 fw_file->htt_op_version); 1959 break; 1960 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 1961 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1962 "found fw code swap image ie (%zd B)\n", 1963 ie_len); 1964 fw_file->codeswap_data = data; 1965 fw_file->codeswap_len = ie_len; 1966 break; 1967 default: 1968 ath10k_warn(ar, "Unknown FW IE: %u\n", 1969 le32_to_cpu(hdr->id)); 1970 break; 1971 } 1972 1973 /* jump over the padding */ 1974 ie_len = ALIGN(ie_len, 4); 1975 1976 len -= ie_len; 1977 data += ie_len; 1978 } 1979 1980 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) && 1981 (!fw_file->firmware_data || !fw_file->firmware_len)) { 1982 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 1983 ar->hw_params.fw.dir, name); 1984 ret = -ENOMEDIUM; 1985 goto err; 1986 } 1987 1988 return 0; 1989 1990 err: 1991 ath10k_core_free_firmware_files(ar); 1992 return ret; 1993 } 1994 1995 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name, 1996 size_t fw_name_len, int fw_api) 1997 { 1998 switch (ar->hif.bus) { 1999 case ATH10K_BUS_SDIO: 2000 case ATH10K_BUS_USB: 2001 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin", 2002 ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus), 2003 fw_api); 2004 break; 2005 case ATH10K_BUS_PCI: 2006 case ATH10K_BUS_AHB: 2007 case ATH10K_BUS_SNOC: 2008 scnprintf(fw_name, fw_name_len, "%s-%d.bin", 2009 ATH10K_FW_FILE_BASE, fw_api); 2010 break; 2011 } 2012 } 2013 2014 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 2015 { 2016 int ret, i; 2017 char fw_name[100]; 2018 2019 /* calibration file is optional, don't check for any errors */ 2020 ath10k_fetch_cal_file(ar); 2021 2022 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) { 2023 ar->fw_api = i; 2024 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", 2025 ar->fw_api); 2026 2027 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api); 2028 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name, 2029 &ar->normal_mode_fw.fw_file); 2030 if (!ret) 2031 goto success; 2032 } 2033 2034 /* we end up here if we couldn't fetch any firmware */ 2035 2036 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d", 2037 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir, 2038 ret); 2039 2040 return ret; 2041 2042 success: 2043 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 2044 2045 return 0; 2046 } 2047 2048 static int ath10k_core_pre_cal_download(struct ath10k *ar) 2049 { 2050 int ret; 2051 2052 ret = ath10k_download_cal_file(ar, ar->pre_cal_file); 2053 if (ret == 0) { 2054 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE; 2055 goto success; 2056 } 2057 2058 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2059 "boot did not find a pre calibration file, try DT next: %d\n", 2060 ret); 2061 2062 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data"); 2063 if (ret) { 2064 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2065 "unable to load pre cal data from DT: %d\n", ret); 2066 return ret; 2067 } 2068 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT; 2069 2070 success: 2071 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 2072 ath10k_cal_mode_str(ar->cal_mode)); 2073 2074 return 0; 2075 } 2076 2077 static int ath10k_core_pre_cal_config(struct ath10k *ar) 2078 { 2079 int ret; 2080 2081 ret = ath10k_core_pre_cal_download(ar); 2082 if (ret) { 2083 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2084 "failed to load pre cal data: %d\n", ret); 2085 return ret; 2086 } 2087 2088 ret = ath10k_core_get_board_id_from_otp(ar); 2089 if (ret) { 2090 ath10k_err(ar, "failed to get board id: %d\n", ret); 2091 return ret; 2092 } 2093 2094 ret = ath10k_download_and_run_otp(ar); 2095 if (ret) { 2096 ath10k_err(ar, "failed to run otp: %d\n", ret); 2097 return ret; 2098 } 2099 2100 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2101 "pre cal configuration done successfully\n"); 2102 2103 return 0; 2104 } 2105 2106 static int ath10k_download_cal_data(struct ath10k *ar) 2107 { 2108 int ret; 2109 2110 ret = ath10k_core_pre_cal_config(ar); 2111 if (ret == 0) 2112 return 0; 2113 2114 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2115 "pre cal download procedure failed, try cal file: %d\n", 2116 ret); 2117 2118 ret = ath10k_download_cal_file(ar, ar->cal_file); 2119 if (ret == 0) { 2120 ar->cal_mode = ATH10K_CAL_MODE_FILE; 2121 goto done; 2122 } 2123 2124 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2125 "boot did not find a calibration file, try DT next: %d\n", 2126 ret); 2127 2128 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data"); 2129 if (ret == 0) { 2130 ar->cal_mode = ATH10K_CAL_MODE_DT; 2131 goto done; 2132 } 2133 2134 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2135 "boot did not find DT entry, try target EEPROM next: %d\n", 2136 ret); 2137 2138 ret = ath10k_download_cal_eeprom(ar); 2139 if (ret == 0) { 2140 ar->cal_mode = ATH10K_CAL_MODE_EEPROM; 2141 goto done; 2142 } 2143 2144 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2145 "boot did not find target EEPROM entry, try OTP next: %d\n", 2146 ret); 2147 2148 ret = ath10k_download_and_run_otp(ar); 2149 if (ret) { 2150 ath10k_err(ar, "failed to run otp: %d\n", ret); 2151 return ret; 2152 } 2153 2154 ar->cal_mode = ATH10K_CAL_MODE_OTP; 2155 2156 done: 2157 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 2158 ath10k_cal_mode_str(ar->cal_mode)); 2159 return 0; 2160 } 2161 2162 static void ath10k_core_fetch_btcoex_dt(struct ath10k *ar) 2163 { 2164 struct device_node *node; 2165 u8 coex_support = 0; 2166 int ret; 2167 2168 node = ar->dev->of_node; 2169 if (!node) 2170 goto out; 2171 2172 ret = of_property_read_u8(node, "qcom,coexist-support", &coex_support); 2173 if (ret) { 2174 ar->coex_support = true; 2175 goto out; 2176 } 2177 2178 if (coex_support) { 2179 ar->coex_support = true; 2180 } else { 2181 ar->coex_support = false; 2182 ar->coex_gpio_pin = -1; 2183 goto out; 2184 } 2185 2186 ret = of_property_read_u32(node, "qcom,coexist-gpio-pin", 2187 &ar->coex_gpio_pin); 2188 if (ret) 2189 ar->coex_gpio_pin = -1; 2190 2191 out: 2192 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot coex_support %d coex_gpio_pin %d\n", 2193 ar->coex_support, ar->coex_gpio_pin); 2194 } 2195 2196 static int ath10k_init_uart(struct ath10k *ar) 2197 { 2198 int ret; 2199 2200 /* 2201 * Explicitly setting UART prints to zero as target turns it on 2202 * based on scratch registers. 2203 */ 2204 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 2205 if (ret) { 2206 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 2207 return ret; 2208 } 2209 2210 if (!uart_print) { 2211 if (ar->hw_params.uart_pin_workaround) { 2212 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 2213 ar->hw_params.uart_pin); 2214 if (ret) { 2215 ath10k_warn(ar, "failed to set UART TX pin: %d", 2216 ret); 2217 return ret; 2218 } 2219 } 2220 2221 return 0; 2222 } 2223 2224 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 2225 if (ret) { 2226 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 2227 return ret; 2228 } 2229 2230 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 2231 if (ret) { 2232 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 2233 return ret; 2234 } 2235 2236 /* Set the UART baud rate to 19200. */ 2237 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 2238 if (ret) { 2239 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 2240 return ret; 2241 } 2242 2243 ath10k_info(ar, "UART prints enabled\n"); 2244 return 0; 2245 } 2246 2247 static int ath10k_init_hw_params(struct ath10k *ar) 2248 { 2249 const struct ath10k_hw_params *hw_params; 2250 int i; 2251 2252 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 2253 hw_params = &ath10k_hw_params_list[i]; 2254 2255 if (hw_params->bus == ar->hif.bus && 2256 hw_params->id == ar->target_version && 2257 hw_params->dev_id == ar->dev_id) 2258 break; 2259 } 2260 2261 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 2262 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 2263 ar->target_version); 2264 return -EINVAL; 2265 } 2266 2267 ar->hw_params = *hw_params; 2268 2269 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 2270 ar->hw_params.name, ar->target_version); 2271 2272 return 0; 2273 } 2274 2275 static void ath10k_core_restart(struct work_struct *work) 2276 { 2277 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 2278 int ret; 2279 2280 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2281 2282 /* Place a barrier to make sure the compiler doesn't reorder 2283 * CRASH_FLUSH and calling other functions. 2284 */ 2285 barrier(); 2286 2287 ieee80211_stop_queues(ar->hw); 2288 ath10k_drain_tx(ar); 2289 complete(&ar->scan.started); 2290 complete(&ar->scan.completed); 2291 complete(&ar->scan.on_channel); 2292 complete(&ar->offchan_tx_completed); 2293 complete(&ar->install_key_done); 2294 complete(&ar->vdev_setup_done); 2295 complete(&ar->vdev_delete_done); 2296 complete(&ar->thermal.wmi_sync); 2297 complete(&ar->bss_survey_done); 2298 wake_up(&ar->htt.empty_tx_wq); 2299 wake_up(&ar->wmi.tx_credits_wq); 2300 wake_up(&ar->peer_mapping_wq); 2301 2302 /* TODO: We can have one instance of cancelling coverage_class_work by 2303 * moving it to ath10k_halt(), so that both stop() and restart() would 2304 * call that but it takes conf_mutex() and if we call cancel_work_sync() 2305 * with conf_mutex it will deadlock. 2306 */ 2307 cancel_work_sync(&ar->set_coverage_class_work); 2308 2309 mutex_lock(&ar->conf_mutex); 2310 2311 switch (ar->state) { 2312 case ATH10K_STATE_ON: 2313 ar->state = ATH10K_STATE_RESTARTING; 2314 ath10k_halt(ar); 2315 ath10k_scan_finish(ar); 2316 ieee80211_restart_hw(ar->hw); 2317 break; 2318 case ATH10K_STATE_OFF: 2319 /* this can happen if driver is being unloaded 2320 * or if the crash happens during FW probing 2321 */ 2322 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 2323 break; 2324 case ATH10K_STATE_RESTARTING: 2325 /* hw restart might be requested from multiple places */ 2326 break; 2327 case ATH10K_STATE_RESTARTED: 2328 ar->state = ATH10K_STATE_WEDGED; 2329 fallthrough; 2330 case ATH10K_STATE_WEDGED: 2331 ath10k_warn(ar, "device is wedged, will not restart\n"); 2332 break; 2333 case ATH10K_STATE_UTF: 2334 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 2335 break; 2336 } 2337 2338 mutex_unlock(&ar->conf_mutex); 2339 2340 ret = ath10k_coredump_submit(ar); 2341 if (ret) 2342 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d", 2343 ret); 2344 2345 complete(&ar->driver_recovery); 2346 } 2347 2348 static void ath10k_core_set_coverage_class_work(struct work_struct *work) 2349 { 2350 struct ath10k *ar = container_of(work, struct ath10k, 2351 set_coverage_class_work); 2352 2353 if (ar->hw_params.hw_ops->set_coverage_class) 2354 ar->hw_params.hw_ops->set_coverage_class(ar, -1); 2355 } 2356 2357 static int ath10k_core_init_firmware_features(struct ath10k *ar) 2358 { 2359 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 2360 int max_num_peers; 2361 2362 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) && 2363 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 2364 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 2365 return -EINVAL; 2366 } 2367 2368 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 2369 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 2370 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version); 2371 return -EINVAL; 2372 } 2373 2374 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 2375 switch (ath10k_cryptmode_param) { 2376 case ATH10K_CRYPT_MODE_HW: 2377 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2378 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 2379 break; 2380 case ATH10K_CRYPT_MODE_SW: 2381 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 2382 fw_file->fw_features)) { 2383 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 2384 return -EINVAL; 2385 } 2386 2387 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2388 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 2389 break; 2390 default: 2391 ath10k_info(ar, "invalid cryptmode: %d\n", 2392 ath10k_cryptmode_param); 2393 return -EINVAL; 2394 } 2395 2396 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 2397 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 2398 2399 if (rawmode) { 2400 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 2401 fw_file->fw_features)) { 2402 ath10k_err(ar, "rawmode = 1 requires support from firmware"); 2403 return -EINVAL; 2404 } 2405 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2406 } 2407 2408 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 2409 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 2410 2411 /* Workaround: 2412 * 2413 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 2414 * and causes enormous performance issues (malformed frames, 2415 * etc). 2416 * 2417 * Disabling A-MSDU makes RAW mode stable with heavy traffic 2418 * albeit a bit slower compared to regular operation. 2419 */ 2420 ar->htt.max_num_amsdu = 1; 2421 } 2422 2423 /* Backwards compatibility for firmwares without 2424 * ATH10K_FW_IE_WMI_OP_VERSION. 2425 */ 2426 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 2427 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 2428 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 2429 fw_file->fw_features)) 2430 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 2431 else 2432 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 2433 } else { 2434 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 2435 } 2436 } 2437 2438 switch (fw_file->wmi_op_version) { 2439 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2440 max_num_peers = TARGET_NUM_PEERS; 2441 ar->max_num_stations = TARGET_NUM_STATIONS; 2442 ar->max_num_vdevs = TARGET_NUM_VDEVS; 2443 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 2444 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 2445 WMI_STAT_PEER; 2446 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2447 break; 2448 case ATH10K_FW_WMI_OP_VERSION_10_1: 2449 case ATH10K_FW_WMI_OP_VERSION_10_2: 2450 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2451 if (ath10k_peer_stats_enabled(ar)) { 2452 max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS; 2453 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS; 2454 } else { 2455 max_num_peers = TARGET_10X_NUM_PEERS; 2456 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 2457 } 2458 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 2459 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 2460 ar->fw_stats_req_mask = WMI_STAT_PEER; 2461 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2462 break; 2463 case ATH10K_FW_WMI_OP_VERSION_TLV: 2464 max_num_peers = TARGET_TLV_NUM_PEERS; 2465 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 2466 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 2467 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 2468 if (ar->hif.bus == ATH10K_BUS_SDIO) 2469 ar->htt.max_num_pending_tx = 2470 TARGET_TLV_NUM_MSDU_DESC_HL; 2471 else 2472 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 2473 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 2474 ar->fw_stats_req_mask = WMI_TLV_STAT_PDEV | WMI_TLV_STAT_VDEV | 2475 WMI_TLV_STAT_PEER | WMI_TLV_STAT_PEER_EXTD; 2476 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2477 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC; 2478 break; 2479 case ATH10K_FW_WMI_OP_VERSION_10_4: 2480 max_num_peers = TARGET_10_4_NUM_PEERS; 2481 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 2482 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 2483 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 2484 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 2485 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER | 2486 WMI_10_4_STAT_PEER_EXTD | 2487 WMI_10_4_STAT_VDEV_EXTD; 2488 ar->max_spatial_stream = ar->hw_params.max_spatial_stream; 2489 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS; 2490 2491 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, 2492 fw_file->fw_features)) 2493 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC; 2494 else 2495 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 2496 break; 2497 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2498 case ATH10K_FW_WMI_OP_VERSION_MAX: 2499 default: 2500 WARN_ON(1); 2501 return -EINVAL; 2502 } 2503 2504 if (ar->hw_params.num_peers) 2505 ar->max_num_peers = ar->hw_params.num_peers; 2506 else 2507 ar->max_num_peers = max_num_peers; 2508 2509 /* Backwards compatibility for firmwares without 2510 * ATH10K_FW_IE_HTT_OP_VERSION. 2511 */ 2512 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 2513 switch (fw_file->wmi_op_version) { 2514 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2515 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 2516 break; 2517 case ATH10K_FW_WMI_OP_VERSION_10_1: 2518 case ATH10K_FW_WMI_OP_VERSION_10_2: 2519 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2520 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 2521 break; 2522 case ATH10K_FW_WMI_OP_VERSION_TLV: 2523 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 2524 break; 2525 case ATH10K_FW_WMI_OP_VERSION_10_4: 2526 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2527 case ATH10K_FW_WMI_OP_VERSION_MAX: 2528 ath10k_err(ar, "htt op version not found from fw meta data"); 2529 return -EINVAL; 2530 } 2531 } 2532 2533 return 0; 2534 } 2535 2536 static int ath10k_core_reset_rx_filter(struct ath10k *ar) 2537 { 2538 int ret; 2539 int vdev_id; 2540 int vdev_type; 2541 int vdev_subtype; 2542 const u8 *vdev_addr; 2543 2544 vdev_id = 0; 2545 vdev_type = WMI_VDEV_TYPE_STA; 2546 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE); 2547 vdev_addr = ar->mac_addr; 2548 2549 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype, 2550 vdev_addr); 2551 if (ret) { 2552 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret); 2553 return ret; 2554 } 2555 2556 ret = ath10k_wmi_vdev_delete(ar, vdev_id); 2557 if (ret) { 2558 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret); 2559 return ret; 2560 } 2561 2562 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be 2563 * serialized properly implicitly. 2564 * 2565 * Moreover (most) WMI commands have no explicit acknowledges. It is 2566 * possible to infer it implicitly by poking firmware with echo 2567 * command - getting a reply means all preceding comments have been 2568 * (mostly) processed. 2569 * 2570 * In case of vdev create/delete this is sufficient. 2571 * 2572 * Without this it's possible to end up with a race when HTT Rx ring is 2573 * started before vdev create/delete hack is complete allowing a short 2574 * window of opportunity to receive (and Tx ACK) a bunch of frames. 2575 */ 2576 ret = ath10k_wmi_barrier(ar); 2577 if (ret) { 2578 ath10k_err(ar, "failed to ping firmware: %d\n", ret); 2579 return ret; 2580 } 2581 2582 return 0; 2583 } 2584 2585 static int ath10k_core_compat_services(struct ath10k *ar) 2586 { 2587 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 2588 2589 /* all 10.x firmware versions support thermal throttling but don't 2590 * advertise the support via service flags so we have to hardcode 2591 * it here 2592 */ 2593 switch (fw_file->wmi_op_version) { 2594 case ATH10K_FW_WMI_OP_VERSION_10_1: 2595 case ATH10K_FW_WMI_OP_VERSION_10_2: 2596 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2597 case ATH10K_FW_WMI_OP_VERSION_10_4: 2598 set_bit(WMI_SERVICE_THERM_THROT, ar->wmi.svc_map); 2599 break; 2600 default: 2601 break; 2602 } 2603 2604 return 0; 2605 } 2606 2607 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 2608 const struct ath10k_fw_components *fw) 2609 { 2610 int status; 2611 u32 val; 2612 2613 lockdep_assert_held(&ar->conf_mutex); 2614 2615 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2616 2617 ar->running_fw = fw; 2618 2619 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2620 ar->running_fw->fw_file.fw_features)) { 2621 ath10k_bmi_start(ar); 2622 2623 /* Enable hardware clock to speed up firmware download */ 2624 if (ar->hw_params.hw_ops->enable_pll_clk) { 2625 status = ar->hw_params.hw_ops->enable_pll_clk(ar); 2626 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot enable pll ret %d\n", 2627 status); 2628 } 2629 2630 if (ath10k_init_configure_target(ar)) { 2631 status = -EINVAL; 2632 goto err; 2633 } 2634 2635 status = ath10k_download_cal_data(ar); 2636 if (status) 2637 goto err; 2638 2639 /* Some of of qca988x solutions are having global reset issue 2640 * during target initialization. Bypassing PLL setting before 2641 * downloading firmware and letting the SoC run on REF_CLK is 2642 * fixing the problem. Corresponding firmware change is also 2643 * needed to set the clock source once the target is 2644 * initialized. 2645 */ 2646 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 2647 ar->running_fw->fw_file.fw_features)) { 2648 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 2649 if (status) { 2650 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 2651 status); 2652 goto err; 2653 } 2654 } 2655 2656 status = ath10k_download_fw(ar); 2657 if (status) 2658 goto err; 2659 2660 status = ath10k_init_uart(ar); 2661 if (status) 2662 goto err; 2663 2664 if (ar->hif.bus == ATH10K_BUS_SDIO) { 2665 status = ath10k_init_sdio(ar, mode); 2666 if (status) { 2667 ath10k_err(ar, "failed to init SDIO: %d\n", status); 2668 goto err; 2669 } 2670 } 2671 } 2672 2673 ar->htc.htc_ops.target_send_suspend_complete = 2674 ath10k_send_suspend_complete; 2675 2676 status = ath10k_htc_init(ar); 2677 if (status) { 2678 ath10k_err(ar, "could not init HTC (%d)\n", status); 2679 goto err; 2680 } 2681 2682 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2683 ar->running_fw->fw_file.fw_features)) { 2684 status = ath10k_bmi_done(ar); 2685 if (status) 2686 goto err; 2687 } 2688 2689 status = ath10k_wmi_attach(ar); 2690 if (status) { 2691 ath10k_err(ar, "WMI attach failed: %d\n", status); 2692 goto err; 2693 } 2694 2695 status = ath10k_htt_init(ar); 2696 if (status) { 2697 ath10k_err(ar, "failed to init htt: %d\n", status); 2698 goto err_wmi_detach; 2699 } 2700 2701 status = ath10k_htt_tx_start(&ar->htt); 2702 if (status) { 2703 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 2704 goto err_wmi_detach; 2705 } 2706 2707 /* If firmware indicates Full Rx Reorder support it must be used in a 2708 * slightly different manner. Let HTT code know. 2709 */ 2710 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 2711 ar->wmi.svc_map)); 2712 2713 status = ath10k_htt_rx_alloc(&ar->htt); 2714 if (status) { 2715 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 2716 goto err_htt_tx_detach; 2717 } 2718 2719 status = ath10k_hif_start(ar); 2720 if (status) { 2721 ath10k_err(ar, "could not start HIF: %d\n", status); 2722 goto err_htt_rx_detach; 2723 } 2724 2725 status = ath10k_htc_wait_target(&ar->htc); 2726 if (status) { 2727 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 2728 goto err_hif_stop; 2729 } 2730 2731 status = ath10k_hif_start_post(ar); 2732 if (status) { 2733 ath10k_err(ar, "failed to swap mailbox: %d\n", status); 2734 goto err_hif_stop; 2735 } 2736 2737 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2738 status = ath10k_htt_connect(&ar->htt); 2739 if (status) { 2740 ath10k_err(ar, "failed to connect htt (%d)\n", status); 2741 goto err_hif_stop; 2742 } 2743 } 2744 2745 status = ath10k_wmi_connect(ar); 2746 if (status) { 2747 ath10k_err(ar, "could not connect wmi: %d\n", status); 2748 goto err_hif_stop; 2749 } 2750 2751 status = ath10k_htc_start(&ar->htc); 2752 if (status) { 2753 ath10k_err(ar, "failed to start htc: %d\n", status); 2754 goto err_hif_stop; 2755 } 2756 2757 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2758 status = ath10k_wmi_wait_for_service_ready(ar); 2759 if (status) { 2760 ath10k_warn(ar, "wmi service ready event not received"); 2761 goto err_hif_stop; 2762 } 2763 } 2764 2765 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 2766 ar->hw->wiphy->fw_version); 2767 2768 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) && 2769 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2770 val = 0; 2771 if (ath10k_peer_stats_enabled(ar)) 2772 val = WMI_10_4_PEER_STATS; 2773 2774 /* Enable vdev stats by default */ 2775 val |= WMI_10_4_VDEV_STATS; 2776 2777 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) 2778 val |= WMI_10_4_BSS_CHANNEL_INFO_64; 2779 2780 ath10k_core_fetch_btcoex_dt(ar); 2781 2782 /* 10.4 firmware supports BT-Coex without reloading firmware 2783 * via pdev param. To support Bluetooth coexistence pdev param, 2784 * WMI_COEX_GPIO_SUPPORT of extended resource config should be 2785 * enabled always. 2786 * 2787 * We can still enable BTCOEX if firmware has the support 2788 * eventhough btceox_support value is 2789 * ATH10K_DT_BTCOEX_NOT_FOUND 2790 */ 2791 2792 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 2793 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 2794 ar->running_fw->fw_file.fw_features) && 2795 ar->coex_support) 2796 val |= WMI_10_4_COEX_GPIO_SUPPORT; 2797 2798 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, 2799 ar->wmi.svc_map)) 2800 val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY; 2801 2802 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, 2803 ar->wmi.svc_map)) 2804 val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA; 2805 2806 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI, 2807 ar->wmi.svc_map)) 2808 val |= WMI_10_4_TX_DATA_ACK_RSSI; 2809 2810 if (test_bit(WMI_SERVICE_REPORT_AIRTIME, ar->wmi.svc_map)) 2811 val |= WMI_10_4_REPORT_AIRTIME; 2812 2813 if (test_bit(WMI_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT, 2814 ar->wmi.svc_map)) 2815 val |= WMI_10_4_EXT_PEER_TID_CONFIGS_SUPPORT; 2816 2817 status = ath10k_mac_ext_resource_config(ar, val); 2818 if (status) { 2819 ath10k_err(ar, 2820 "failed to send ext resource cfg command : %d\n", 2821 status); 2822 goto err_hif_stop; 2823 } 2824 } 2825 2826 status = ath10k_wmi_cmd_init(ar); 2827 if (status) { 2828 ath10k_err(ar, "could not send WMI init command (%d)\n", 2829 status); 2830 goto err_hif_stop; 2831 } 2832 2833 status = ath10k_wmi_wait_for_unified_ready(ar); 2834 if (status) { 2835 ath10k_err(ar, "wmi unified ready event not received\n"); 2836 goto err_hif_stop; 2837 } 2838 2839 status = ath10k_core_compat_services(ar); 2840 if (status) { 2841 ath10k_err(ar, "compat services failed: %d\n", status); 2842 goto err_hif_stop; 2843 } 2844 2845 status = ath10k_wmi_pdev_set_base_macaddr(ar, ar->mac_addr); 2846 if (status && status != -EOPNOTSUPP) { 2847 ath10k_err(ar, 2848 "failed to set base mac address: %d\n", status); 2849 goto err_hif_stop; 2850 } 2851 2852 /* Some firmware revisions do not properly set up hardware rx filter 2853 * registers. 2854 * 2855 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK 2856 * is filled with 0s instead of 1s allowing HW to respond with ACKs to 2857 * any frames that matches MAC_PCU_RX_FILTER which is also 2858 * misconfigured to accept anything. 2859 * 2860 * The ADDR1 is programmed using internal firmware structure field and 2861 * can't be (easily/sanely) reached from the driver explicitly. It is 2862 * possible to implicitly make it correct by creating a dummy vdev and 2863 * then deleting it. 2864 */ 2865 if (ar->hw_params.hw_filter_reset_required && 2866 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2867 status = ath10k_core_reset_rx_filter(ar); 2868 if (status) { 2869 ath10k_err(ar, 2870 "failed to reset rx filter: %d\n", status); 2871 goto err_hif_stop; 2872 } 2873 } 2874 2875 status = ath10k_htt_rx_ring_refill(ar); 2876 if (status) { 2877 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 2878 goto err_hif_stop; 2879 } 2880 2881 if (ar->max_num_vdevs >= 64) 2882 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL; 2883 else 2884 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 2885 2886 INIT_LIST_HEAD(&ar->arvifs); 2887 2888 /* we don't care about HTT in UTF mode */ 2889 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2890 status = ath10k_htt_setup(&ar->htt); 2891 if (status) { 2892 ath10k_err(ar, "failed to setup htt: %d\n", status); 2893 goto err_hif_stop; 2894 } 2895 } 2896 2897 status = ath10k_debug_start(ar); 2898 if (status) 2899 goto err_hif_stop; 2900 2901 status = ath10k_hif_set_target_log_mode(ar, fw_diag_log); 2902 if (status && status != -EOPNOTSUPP) { 2903 ath10k_warn(ar, "set target log mode failed: %d\n", status); 2904 goto err_hif_stop; 2905 } 2906 2907 return 0; 2908 2909 err_hif_stop: 2910 ath10k_hif_stop(ar); 2911 err_htt_rx_detach: 2912 ath10k_htt_rx_free(&ar->htt); 2913 err_htt_tx_detach: 2914 ath10k_htt_tx_free(&ar->htt); 2915 err_wmi_detach: 2916 ath10k_wmi_detach(ar); 2917 err: 2918 return status; 2919 } 2920 EXPORT_SYMBOL(ath10k_core_start); 2921 2922 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 2923 { 2924 int ret; 2925 unsigned long time_left; 2926 2927 reinit_completion(&ar->target_suspend); 2928 2929 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 2930 if (ret) { 2931 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 2932 return ret; 2933 } 2934 2935 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 2936 2937 if (!time_left) { 2938 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 2939 return -ETIMEDOUT; 2940 } 2941 2942 return 0; 2943 } 2944 2945 void ath10k_core_stop(struct ath10k *ar) 2946 { 2947 lockdep_assert_held(&ar->conf_mutex); 2948 ath10k_debug_stop(ar); 2949 2950 /* try to suspend target */ 2951 if (ar->state != ATH10K_STATE_RESTARTING && 2952 ar->state != ATH10K_STATE_UTF) 2953 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 2954 2955 ath10k_hif_stop(ar); 2956 ath10k_htt_tx_stop(&ar->htt); 2957 ath10k_htt_rx_free(&ar->htt); 2958 ath10k_wmi_detach(ar); 2959 2960 ar->id.bmi_ids_valid = false; 2961 } 2962 EXPORT_SYMBOL(ath10k_core_stop); 2963 2964 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 2965 * order to know what hw capabilities should be advertised to mac80211 it is 2966 * necessary to load the firmware (and tear it down immediately since start 2967 * hook will try to init it again) before registering 2968 */ 2969 static int ath10k_core_probe_fw(struct ath10k *ar) 2970 { 2971 struct bmi_target_info target_info; 2972 int ret = 0; 2973 2974 ret = ath10k_hif_power_up(ar, ATH10K_FIRMWARE_MODE_NORMAL); 2975 if (ret) { 2976 ath10k_err(ar, "could not power on hif bus (%d)\n", ret); 2977 return ret; 2978 } 2979 2980 switch (ar->hif.bus) { 2981 case ATH10K_BUS_SDIO: 2982 memset(&target_info, 0, sizeof(target_info)); 2983 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info); 2984 if (ret) { 2985 ath10k_err(ar, "could not get target info (%d)\n", ret); 2986 goto err_power_down; 2987 } 2988 ar->target_version = target_info.version; 2989 ar->hw->wiphy->hw_version = target_info.version; 2990 break; 2991 case ATH10K_BUS_PCI: 2992 case ATH10K_BUS_AHB: 2993 case ATH10K_BUS_USB: 2994 memset(&target_info, 0, sizeof(target_info)); 2995 ret = ath10k_bmi_get_target_info(ar, &target_info); 2996 if (ret) { 2997 ath10k_err(ar, "could not get target info (%d)\n", ret); 2998 goto err_power_down; 2999 } 3000 ar->target_version = target_info.version; 3001 ar->hw->wiphy->hw_version = target_info.version; 3002 break; 3003 case ATH10K_BUS_SNOC: 3004 memset(&target_info, 0, sizeof(target_info)); 3005 ret = ath10k_hif_get_target_info(ar, &target_info); 3006 if (ret) { 3007 ath10k_err(ar, "could not get target info (%d)\n", ret); 3008 goto err_power_down; 3009 } 3010 ar->target_version = target_info.version; 3011 ar->hw->wiphy->hw_version = target_info.version; 3012 break; 3013 default: 3014 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus); 3015 } 3016 3017 ret = ath10k_init_hw_params(ar); 3018 if (ret) { 3019 ath10k_err(ar, "could not get hw params (%d)\n", ret); 3020 goto err_power_down; 3021 } 3022 3023 ret = ath10k_core_fetch_firmware_files(ar); 3024 if (ret) { 3025 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 3026 goto err_power_down; 3027 } 3028 3029 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) != 3030 sizeof(ar->normal_mode_fw.fw_file.fw_version)); 3031 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version, 3032 sizeof(ar->hw->wiphy->fw_version)); 3033 3034 ath10k_debug_print_hwfw_info(ar); 3035 3036 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 3037 ar->normal_mode_fw.fw_file.fw_features)) { 3038 ret = ath10k_core_pre_cal_download(ar); 3039 if (ret) { 3040 /* pre calibration data download is not necessary 3041 * for all the chipsets. Ignore failures and continue. 3042 */ 3043 ath10k_dbg(ar, ATH10K_DBG_BOOT, 3044 "could not load pre cal data: %d\n", ret); 3045 } 3046 3047 ret = ath10k_core_get_board_id_from_otp(ar); 3048 if (ret && ret != -EOPNOTSUPP) { 3049 ath10k_err(ar, "failed to get board id from otp: %d\n", 3050 ret); 3051 goto err_free_firmware_files; 3052 } 3053 3054 ret = ath10k_core_check_smbios(ar); 3055 if (ret) 3056 ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n"); 3057 3058 ret = ath10k_core_check_dt(ar); 3059 if (ret) 3060 ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n"); 3061 3062 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD); 3063 if (ret) { 3064 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 3065 goto err_free_firmware_files; 3066 } 3067 3068 ath10k_debug_print_board_info(ar); 3069 } 3070 3071 device_get_mac_address(ar->dev, ar->mac_addr, sizeof(ar->mac_addr)); 3072 3073 ret = ath10k_core_init_firmware_features(ar); 3074 if (ret) { 3075 ath10k_err(ar, "fatal problem with firmware features: %d\n", 3076 ret); 3077 goto err_free_firmware_files; 3078 } 3079 3080 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 3081 ar->normal_mode_fw.fw_file.fw_features)) { 3082 ret = ath10k_swap_code_seg_init(ar, 3083 &ar->normal_mode_fw.fw_file); 3084 if (ret) { 3085 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 3086 ret); 3087 goto err_free_firmware_files; 3088 } 3089 } 3090 3091 mutex_lock(&ar->conf_mutex); 3092 3093 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL, 3094 &ar->normal_mode_fw); 3095 if (ret) { 3096 ath10k_err(ar, "could not init core (%d)\n", ret); 3097 goto err_unlock; 3098 } 3099 3100 ath10k_debug_print_boot_info(ar); 3101 ath10k_core_stop(ar); 3102 3103 mutex_unlock(&ar->conf_mutex); 3104 3105 ath10k_hif_power_down(ar); 3106 return 0; 3107 3108 err_unlock: 3109 mutex_unlock(&ar->conf_mutex); 3110 3111 err_free_firmware_files: 3112 ath10k_core_free_firmware_files(ar); 3113 3114 err_power_down: 3115 ath10k_hif_power_down(ar); 3116 3117 return ret; 3118 } 3119 3120 static void ath10k_core_register_work(struct work_struct *work) 3121 { 3122 struct ath10k *ar = container_of(work, struct ath10k, register_work); 3123 int status; 3124 3125 /* peer stats are enabled by default */ 3126 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags); 3127 3128 status = ath10k_core_probe_fw(ar); 3129 if (status) { 3130 ath10k_err(ar, "could not probe fw (%d)\n", status); 3131 goto err; 3132 } 3133 3134 status = ath10k_mac_register(ar); 3135 if (status) { 3136 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 3137 goto err_release_fw; 3138 } 3139 3140 status = ath10k_coredump_register(ar); 3141 if (status) { 3142 ath10k_err(ar, "unable to register coredump\n"); 3143 goto err_unregister_mac; 3144 } 3145 3146 status = ath10k_debug_register(ar); 3147 if (status) { 3148 ath10k_err(ar, "unable to initialize debugfs\n"); 3149 goto err_unregister_coredump; 3150 } 3151 3152 status = ath10k_spectral_create(ar); 3153 if (status) { 3154 ath10k_err(ar, "failed to initialize spectral\n"); 3155 goto err_debug_destroy; 3156 } 3157 3158 status = ath10k_thermal_register(ar); 3159 if (status) { 3160 ath10k_err(ar, "could not register thermal device: %d\n", 3161 status); 3162 goto err_spectral_destroy; 3163 } 3164 3165 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 3166 return; 3167 3168 err_spectral_destroy: 3169 ath10k_spectral_destroy(ar); 3170 err_debug_destroy: 3171 ath10k_debug_destroy(ar); 3172 err_unregister_coredump: 3173 ath10k_coredump_unregister(ar); 3174 err_unregister_mac: 3175 ath10k_mac_unregister(ar); 3176 err_release_fw: 3177 ath10k_core_free_firmware_files(ar); 3178 err: 3179 /* TODO: It's probably a good idea to release device from the driver 3180 * but calling device_release_driver() here will cause a deadlock. 3181 */ 3182 return; 3183 } 3184 3185 int ath10k_core_register(struct ath10k *ar, 3186 const struct ath10k_bus_params *bus_params) 3187 { 3188 ar->bus_param = *bus_params; 3189 3190 queue_work(ar->workqueue, &ar->register_work); 3191 3192 return 0; 3193 } 3194 EXPORT_SYMBOL(ath10k_core_register); 3195 3196 void ath10k_core_unregister(struct ath10k *ar) 3197 { 3198 cancel_work_sync(&ar->register_work); 3199 3200 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 3201 return; 3202 3203 ath10k_thermal_unregister(ar); 3204 /* Stop spectral before unregistering from mac80211 to remove the 3205 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 3206 * would be already be free'd recursively, leading to a double free. 3207 */ 3208 ath10k_spectral_destroy(ar); 3209 3210 /* We must unregister from mac80211 before we stop HTC and HIF. 3211 * Otherwise we will fail to submit commands to FW and mac80211 will be 3212 * unhappy about callback failures. 3213 */ 3214 ath10k_mac_unregister(ar); 3215 3216 ath10k_testmode_destroy(ar); 3217 3218 ath10k_core_free_firmware_files(ar); 3219 ath10k_core_free_board_files(ar); 3220 3221 ath10k_debug_unregister(ar); 3222 } 3223 EXPORT_SYMBOL(ath10k_core_unregister); 3224 3225 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 3226 enum ath10k_bus bus, 3227 enum ath10k_hw_rev hw_rev, 3228 const struct ath10k_hif_ops *hif_ops) 3229 { 3230 struct ath10k *ar; 3231 int ret; 3232 3233 ar = ath10k_mac_create(priv_size); 3234 if (!ar) 3235 return NULL; 3236 3237 ar->ath_common.priv = ar; 3238 ar->ath_common.hw = ar->hw; 3239 ar->dev = dev; 3240 ar->hw_rev = hw_rev; 3241 ar->hif.ops = hif_ops; 3242 ar->hif.bus = bus; 3243 3244 switch (hw_rev) { 3245 case ATH10K_HW_QCA988X: 3246 case ATH10K_HW_QCA9887: 3247 ar->regs = &qca988x_regs; 3248 ar->hw_ce_regs = &qcax_ce_regs; 3249 ar->hw_values = &qca988x_values; 3250 break; 3251 case ATH10K_HW_QCA6174: 3252 case ATH10K_HW_QCA9377: 3253 ar->regs = &qca6174_regs; 3254 ar->hw_ce_regs = &qcax_ce_regs; 3255 ar->hw_values = &qca6174_values; 3256 break; 3257 case ATH10K_HW_QCA99X0: 3258 case ATH10K_HW_QCA9984: 3259 ar->regs = &qca99x0_regs; 3260 ar->hw_ce_regs = &qcax_ce_regs; 3261 ar->hw_values = &qca99x0_values; 3262 break; 3263 case ATH10K_HW_QCA9888: 3264 ar->regs = &qca99x0_regs; 3265 ar->hw_ce_regs = &qcax_ce_regs; 3266 ar->hw_values = &qca9888_values; 3267 break; 3268 case ATH10K_HW_QCA4019: 3269 ar->regs = &qca4019_regs; 3270 ar->hw_ce_regs = &qcax_ce_regs; 3271 ar->hw_values = &qca4019_values; 3272 break; 3273 case ATH10K_HW_WCN3990: 3274 ar->regs = &wcn3990_regs; 3275 ar->hw_ce_regs = &wcn3990_ce_regs; 3276 ar->hw_values = &wcn3990_values; 3277 break; 3278 default: 3279 ath10k_err(ar, "unsupported core hardware revision %d\n", 3280 hw_rev); 3281 ret = -ENOTSUPP; 3282 goto err_free_mac; 3283 } 3284 3285 init_completion(&ar->scan.started); 3286 init_completion(&ar->scan.completed); 3287 init_completion(&ar->scan.on_channel); 3288 init_completion(&ar->target_suspend); 3289 init_completion(&ar->driver_recovery); 3290 init_completion(&ar->wow.wakeup_completed); 3291 3292 init_completion(&ar->install_key_done); 3293 init_completion(&ar->vdev_setup_done); 3294 init_completion(&ar->vdev_delete_done); 3295 init_completion(&ar->thermal.wmi_sync); 3296 init_completion(&ar->bss_survey_done); 3297 init_completion(&ar->peer_delete_done); 3298 init_completion(&ar->peer_stats_info_complete); 3299 3300 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 3301 3302 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 3303 if (!ar->workqueue) 3304 goto err_free_mac; 3305 3306 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 3307 if (!ar->workqueue_aux) 3308 goto err_free_wq; 3309 3310 ar->workqueue_tx_complete = 3311 create_singlethread_workqueue("ath10k_tx_complete_wq"); 3312 if (!ar->workqueue_tx_complete) 3313 goto err_free_aux_wq; 3314 3315 mutex_init(&ar->conf_mutex); 3316 mutex_init(&ar->dump_mutex); 3317 spin_lock_init(&ar->data_lock); 3318 3319 INIT_LIST_HEAD(&ar->peers); 3320 init_waitqueue_head(&ar->peer_mapping_wq); 3321 init_waitqueue_head(&ar->htt.empty_tx_wq); 3322 init_waitqueue_head(&ar->wmi.tx_credits_wq); 3323 3324 skb_queue_head_init(&ar->htt.rx_indication_head); 3325 3326 init_completion(&ar->offchan_tx_completed); 3327 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 3328 skb_queue_head_init(&ar->offchan_tx_queue); 3329 3330 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 3331 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 3332 3333 INIT_WORK(&ar->register_work, ath10k_core_register_work); 3334 INIT_WORK(&ar->restart_work, ath10k_core_restart); 3335 INIT_WORK(&ar->set_coverage_class_work, 3336 ath10k_core_set_coverage_class_work); 3337 3338 init_dummy_netdev(&ar->napi_dev); 3339 3340 ret = ath10k_coredump_create(ar); 3341 if (ret) 3342 goto err_free_tx_complete; 3343 3344 ret = ath10k_debug_create(ar); 3345 if (ret) 3346 goto err_free_coredump; 3347 3348 return ar; 3349 3350 err_free_coredump: 3351 ath10k_coredump_destroy(ar); 3352 err_free_tx_complete: 3353 destroy_workqueue(ar->workqueue_tx_complete); 3354 err_free_aux_wq: 3355 destroy_workqueue(ar->workqueue_aux); 3356 err_free_wq: 3357 destroy_workqueue(ar->workqueue); 3358 err_free_mac: 3359 ath10k_mac_destroy(ar); 3360 3361 return NULL; 3362 } 3363 EXPORT_SYMBOL(ath10k_core_create); 3364 3365 void ath10k_core_destroy(struct ath10k *ar) 3366 { 3367 flush_workqueue(ar->workqueue); 3368 destroy_workqueue(ar->workqueue); 3369 3370 flush_workqueue(ar->workqueue_aux); 3371 destroy_workqueue(ar->workqueue_aux); 3372 3373 flush_workqueue(ar->workqueue_tx_complete); 3374 destroy_workqueue(ar->workqueue_tx_complete); 3375 3376 ath10k_debug_destroy(ar); 3377 ath10k_coredump_destroy(ar); 3378 ath10k_htt_tx_destroy(&ar->htt); 3379 ath10k_wmi_free_host_mem(ar); 3380 ath10k_mac_destroy(ar); 3381 } 3382 EXPORT_SYMBOL(ath10k_core_destroy); 3383 3384 MODULE_AUTHOR("Qualcomm Atheros"); 3385 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards."); 3386 MODULE_LICENSE("Dual BSD/GPL"); 3387