1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include <linux/module.h> 19 #include <linux/firmware.h> 20 #include <linux/of.h> 21 22 #include "core.h" 23 #include "mac.h" 24 #include "htc.h" 25 #include "hif.h" 26 #include "wmi.h" 27 #include "bmi.h" 28 #include "debug.h" 29 #include "htt.h" 30 #include "testmode.h" 31 #include "wmi-ops.h" 32 33 unsigned int ath10k_debug_mask; 34 static unsigned int ath10k_cryptmode_param; 35 static bool uart_print; 36 static bool skip_otp; 37 static bool rawmode; 38 39 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 40 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 41 module_param(uart_print, bool, 0644); 42 module_param(skip_otp, bool, 0644); 43 module_param(rawmode, bool, 0644); 44 45 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 46 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 47 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 48 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 49 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); 50 51 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 52 { 53 .id = QCA988X_HW_2_0_VERSION, 54 .dev_id = QCA988X_2_0_DEVICE_ID, 55 .name = "qca988x hw2.0", 56 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 57 .uart_pin = 7, 58 .has_shifted_cc_wraparound = true, 59 .otp_exe_param = 0, 60 .channel_counters_freq_hz = 88000, 61 .max_probe_resp_desc_thres = 0, 62 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER, 63 .fw = { 64 .dir = QCA988X_HW_2_0_FW_DIR, 65 .fw = QCA988X_HW_2_0_FW_FILE, 66 .otp = QCA988X_HW_2_0_OTP_FILE, 67 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 68 .board_size = QCA988X_BOARD_DATA_SZ, 69 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 70 }, 71 }, 72 { 73 .id = QCA6174_HW_2_1_VERSION, 74 .dev_id = QCA6164_2_1_DEVICE_ID, 75 .name = "qca6164 hw2.1", 76 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 77 .uart_pin = 6, 78 .otp_exe_param = 0, 79 .channel_counters_freq_hz = 88000, 80 .max_probe_resp_desc_thres = 0, 81 .fw = { 82 .dir = QCA6174_HW_2_1_FW_DIR, 83 .fw = QCA6174_HW_2_1_FW_FILE, 84 .otp = QCA6174_HW_2_1_OTP_FILE, 85 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 86 .board_size = QCA6174_BOARD_DATA_SZ, 87 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 88 }, 89 }, 90 { 91 .id = QCA6174_HW_2_1_VERSION, 92 .dev_id = QCA6174_2_1_DEVICE_ID, 93 .name = "qca6174 hw2.1", 94 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 95 .uart_pin = 6, 96 .otp_exe_param = 0, 97 .channel_counters_freq_hz = 88000, 98 .max_probe_resp_desc_thres = 0, 99 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER, 100 .fw = { 101 .dir = QCA6174_HW_2_1_FW_DIR, 102 .fw = QCA6174_HW_2_1_FW_FILE, 103 .otp = QCA6174_HW_2_1_OTP_FILE, 104 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 105 .board_size = QCA6174_BOARD_DATA_SZ, 106 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 107 }, 108 }, 109 { 110 .id = QCA6174_HW_3_0_VERSION, 111 .dev_id = QCA6174_2_1_DEVICE_ID, 112 .name = "qca6174 hw3.0", 113 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 114 .uart_pin = 6, 115 .otp_exe_param = 0, 116 .channel_counters_freq_hz = 88000, 117 .max_probe_resp_desc_thres = 0, 118 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER, 119 .fw = { 120 .dir = QCA6174_HW_3_0_FW_DIR, 121 .fw = QCA6174_HW_3_0_FW_FILE, 122 .otp = QCA6174_HW_3_0_OTP_FILE, 123 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 124 .board_size = QCA6174_BOARD_DATA_SZ, 125 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 126 }, 127 }, 128 { 129 .id = QCA6174_HW_3_2_VERSION, 130 .dev_id = QCA6174_2_1_DEVICE_ID, 131 .name = "qca6174 hw3.2", 132 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 133 .uart_pin = 6, 134 .otp_exe_param = 0, 135 .channel_counters_freq_hz = 88000, 136 .max_probe_resp_desc_thres = 0, 137 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER, 138 .fw = { 139 /* uses same binaries as hw3.0 */ 140 .dir = QCA6174_HW_3_0_FW_DIR, 141 .fw = QCA6174_HW_3_0_FW_FILE, 142 .otp = QCA6174_HW_3_0_OTP_FILE, 143 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 144 .board_size = QCA6174_BOARD_DATA_SZ, 145 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 146 }, 147 }, 148 { 149 .id = QCA99X0_HW_2_0_DEV_VERSION, 150 .dev_id = QCA99X0_2_0_DEVICE_ID, 151 .name = "qca99x0 hw2.0", 152 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 153 .uart_pin = 7, 154 .otp_exe_param = 0x00000700, 155 .continuous_frag_desc = true, 156 .channel_counters_freq_hz = 150000, 157 .max_probe_resp_desc_thres = 24, 158 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_BEFORE, 159 .fw = { 160 .dir = QCA99X0_HW_2_0_FW_DIR, 161 .fw = QCA99X0_HW_2_0_FW_FILE, 162 .otp = QCA99X0_HW_2_0_OTP_FILE, 163 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 164 .board_size = QCA99X0_BOARD_DATA_SZ, 165 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 166 }, 167 }, 168 { 169 .id = QCA9377_HW_1_0_DEV_VERSION, 170 .dev_id = QCA9377_1_0_DEVICE_ID, 171 .name = "qca9377 hw1.0", 172 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 173 .uart_pin = 6, 174 .otp_exe_param = 0, 175 .channel_counters_freq_hz = 88000, 176 .max_probe_resp_desc_thres = 0, 177 .fw = { 178 .dir = QCA9377_HW_1_0_FW_DIR, 179 .fw = QCA9377_HW_1_0_FW_FILE, 180 .otp = QCA9377_HW_1_0_OTP_FILE, 181 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 182 .board_size = QCA9377_BOARD_DATA_SZ, 183 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 184 }, 185 }, 186 { 187 .id = QCA9377_HW_1_1_DEV_VERSION, 188 .dev_id = QCA9377_1_0_DEVICE_ID, 189 .name = "qca9377 hw1.1", 190 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 191 .uart_pin = 6, 192 .otp_exe_param = 0, 193 .channel_counters_freq_hz = 88000, 194 .max_probe_resp_desc_thres = 0, 195 .fw = { 196 .dir = QCA9377_HW_1_0_FW_DIR, 197 .fw = QCA9377_HW_1_0_FW_FILE, 198 .otp = QCA9377_HW_1_0_OTP_FILE, 199 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 200 .board_size = QCA9377_BOARD_DATA_SZ, 201 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 202 }, 203 }, 204 }; 205 206 static const char *const ath10k_core_fw_feature_str[] = { 207 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 208 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 209 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 210 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 211 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 212 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 213 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 214 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 215 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 216 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 217 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 218 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 219 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", 220 }; 221 222 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 223 size_t buf_len, 224 enum ath10k_fw_features feat) 225 { 226 /* make sure that ath10k_core_fw_feature_str[] gets updated */ 227 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != 228 ATH10K_FW_FEATURE_COUNT); 229 230 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 231 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 232 return scnprintf(buf, buf_len, "bit%d", feat); 233 } 234 235 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 236 } 237 238 void ath10k_core_get_fw_features_str(struct ath10k *ar, 239 char *buf, 240 size_t buf_len) 241 { 242 unsigned int len = 0; 243 int i; 244 245 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 246 if (test_bit(i, ar->fw_features)) { 247 if (len > 0) 248 len += scnprintf(buf + len, buf_len - len, ","); 249 250 len += ath10k_core_get_fw_feature_str(buf + len, 251 buf_len - len, 252 i); 253 } 254 } 255 } 256 257 static void ath10k_send_suspend_complete(struct ath10k *ar) 258 { 259 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 260 261 complete(&ar->target_suspend); 262 } 263 264 static int ath10k_init_configure_target(struct ath10k *ar) 265 { 266 u32 param_host; 267 int ret; 268 269 /* tell target which HTC version it is used*/ 270 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 271 HTC_PROTOCOL_VERSION); 272 if (ret) { 273 ath10k_err(ar, "settings HTC version failed\n"); 274 return ret; 275 } 276 277 /* set the firmware mode to STA/IBSS/AP */ 278 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 279 if (ret) { 280 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 281 return ret; 282 } 283 284 /* TODO following parameters need to be re-visited. */ 285 /* num_device */ 286 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 287 /* Firmware mode */ 288 /* FIXME: Why FW_MODE_AP ??.*/ 289 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 290 /* mac_addr_method */ 291 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 292 /* firmware_bridge */ 293 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 294 /* fwsubmode */ 295 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 296 297 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 298 if (ret) { 299 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 300 return ret; 301 } 302 303 /* We do all byte-swapping on the host */ 304 ret = ath10k_bmi_write32(ar, hi_be, 0); 305 if (ret) { 306 ath10k_err(ar, "setting host CPU BE mode failed\n"); 307 return ret; 308 } 309 310 /* FW descriptor/Data swap flags */ 311 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 312 313 if (ret) { 314 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 315 return ret; 316 } 317 318 /* Some devices have a special sanity check that verifies the PCI 319 * Device ID is written to this host interest var. It is known to be 320 * required to boot QCA6164. 321 */ 322 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 323 ar->dev_id); 324 if (ret) { 325 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 326 return ret; 327 } 328 329 return 0; 330 } 331 332 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 333 const char *dir, 334 const char *file) 335 { 336 char filename[100]; 337 const struct firmware *fw; 338 int ret; 339 340 if (file == NULL) 341 return ERR_PTR(-ENOENT); 342 343 if (dir == NULL) 344 dir = "."; 345 346 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 347 ret = request_firmware(&fw, filename, ar->dev); 348 if (ret) 349 return ERR_PTR(ret); 350 351 return fw; 352 } 353 354 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 355 size_t data_len) 356 { 357 u32 board_data_size = ar->hw_params.fw.board_size; 358 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 359 u32 board_ext_data_addr; 360 int ret; 361 362 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 363 if (ret) { 364 ath10k_err(ar, "could not read board ext data addr (%d)\n", 365 ret); 366 return ret; 367 } 368 369 ath10k_dbg(ar, ATH10K_DBG_BOOT, 370 "boot push board extended data addr 0x%x\n", 371 board_ext_data_addr); 372 373 if (board_ext_data_addr == 0) 374 return 0; 375 376 if (data_len != (board_data_size + board_ext_data_size)) { 377 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 378 data_len, board_data_size, board_ext_data_size); 379 return -EINVAL; 380 } 381 382 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 383 data + board_data_size, 384 board_ext_data_size); 385 if (ret) { 386 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 387 return ret; 388 } 389 390 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 391 (board_ext_data_size << 16) | 1); 392 if (ret) { 393 ath10k_err(ar, "could not write board ext data bit (%d)\n", 394 ret); 395 return ret; 396 } 397 398 return 0; 399 } 400 401 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 402 size_t data_len) 403 { 404 u32 board_data_size = ar->hw_params.fw.board_size; 405 u32 address; 406 int ret; 407 408 ret = ath10k_push_board_ext_data(ar, data, data_len); 409 if (ret) { 410 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 411 goto exit; 412 } 413 414 ret = ath10k_bmi_read32(ar, hi_board_data, &address); 415 if (ret) { 416 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 417 goto exit; 418 } 419 420 ret = ath10k_bmi_write_memory(ar, address, data, 421 min_t(u32, board_data_size, 422 data_len)); 423 if (ret) { 424 ath10k_err(ar, "could not write board data (%d)\n", ret); 425 goto exit; 426 } 427 428 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 429 if (ret) { 430 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 431 goto exit; 432 } 433 434 exit: 435 return ret; 436 } 437 438 static int ath10k_download_cal_file(struct ath10k *ar) 439 { 440 int ret; 441 442 if (!ar->cal_file) 443 return -ENOENT; 444 445 if (IS_ERR(ar->cal_file)) 446 return PTR_ERR(ar->cal_file); 447 448 ret = ath10k_download_board_data(ar, ar->cal_file->data, 449 ar->cal_file->size); 450 if (ret) { 451 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 452 return ret; 453 } 454 455 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 456 457 return 0; 458 } 459 460 static int ath10k_download_cal_dt(struct ath10k *ar) 461 { 462 struct device_node *node; 463 int data_len; 464 void *data; 465 int ret; 466 467 node = ar->dev->of_node; 468 if (!node) 469 /* Device Tree is optional, don't print any warnings if 470 * there's no node for ath10k. 471 */ 472 return -ENOENT; 473 474 if (!of_get_property(node, "qcom,ath10k-calibration-data", 475 &data_len)) { 476 /* The calibration data node is optional */ 477 return -ENOENT; 478 } 479 480 if (data_len != QCA988X_CAL_DATA_LEN) { 481 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 482 data_len); 483 ret = -EMSGSIZE; 484 goto out; 485 } 486 487 data = kmalloc(data_len, GFP_KERNEL); 488 if (!data) { 489 ret = -ENOMEM; 490 goto out; 491 } 492 493 ret = of_property_read_u8_array(node, "qcom,ath10k-calibration-data", 494 data, data_len); 495 if (ret) { 496 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 497 ret); 498 goto out_free; 499 } 500 501 ret = ath10k_download_board_data(ar, data, data_len); 502 if (ret) { 503 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 504 ret); 505 goto out_free; 506 } 507 508 ret = 0; 509 510 out_free: 511 kfree(data); 512 513 out: 514 return ret; 515 } 516 517 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) 518 { 519 u32 result, address; 520 u8 board_id, chip_id; 521 int ret; 522 523 address = ar->hw_params.patch_load_addr; 524 525 if (!ar->otp_data || !ar->otp_len) { 526 ath10k_warn(ar, 527 "failed to retrieve board id because of invalid otp\n"); 528 return -ENODATA; 529 } 530 531 ath10k_dbg(ar, ATH10K_DBG_BOOT, 532 "boot upload otp to 0x%x len %zd for board id\n", 533 address, ar->otp_len); 534 535 ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len); 536 if (ret) { 537 ath10k_err(ar, "could not write otp for board id check: %d\n", 538 ret); 539 return ret; 540 } 541 542 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EEPROM_BOARD_ID, 543 &result); 544 if (ret) { 545 ath10k_err(ar, "could not execute otp for board id check: %d\n", 546 ret); 547 return ret; 548 } 549 550 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); 551 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); 552 553 ath10k_dbg(ar, ATH10K_DBG_BOOT, 554 "boot get otp board id result 0x%08x board_id %d chip_id %d\n", 555 result, board_id, chip_id); 556 557 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0) 558 return -EOPNOTSUPP; 559 560 ar->id.bmi_ids_valid = true; 561 ar->id.bmi_board_id = board_id; 562 ar->id.bmi_chip_id = chip_id; 563 564 return 0; 565 } 566 567 static int ath10k_download_and_run_otp(struct ath10k *ar) 568 { 569 u32 result, address = ar->hw_params.patch_load_addr; 570 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 571 int ret; 572 573 ret = ath10k_download_board_data(ar, ar->board_data, ar->board_len); 574 if (ret) { 575 ath10k_err(ar, "failed to download board data: %d\n", ret); 576 return ret; 577 } 578 579 /* OTP is optional */ 580 581 if (!ar->otp_data || !ar->otp_len) { 582 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n", 583 ar->otp_data, ar->otp_len); 584 return 0; 585 } 586 587 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 588 address, ar->otp_len); 589 590 ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len); 591 if (ret) { 592 ath10k_err(ar, "could not write otp (%d)\n", ret); 593 return ret; 594 } 595 596 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 597 if (ret) { 598 ath10k_err(ar, "could not execute otp (%d)\n", ret); 599 return ret; 600 } 601 602 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 603 604 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 605 ar->fw_features)) && 606 result != 0) { 607 ath10k_err(ar, "otp calibration failed: %d", result); 608 return -EINVAL; 609 } 610 611 return 0; 612 } 613 614 static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode) 615 { 616 u32 address, data_len; 617 const char *mode_name; 618 const void *data; 619 int ret; 620 621 address = ar->hw_params.patch_load_addr; 622 623 switch (mode) { 624 case ATH10K_FIRMWARE_MODE_NORMAL: 625 data = ar->firmware_data; 626 data_len = ar->firmware_len; 627 mode_name = "normal"; 628 ret = ath10k_swap_code_seg_configure(ar, 629 ATH10K_SWAP_CODE_SEG_BIN_TYPE_FW); 630 if (ret) { 631 ath10k_err(ar, "failed to configure fw code swap: %d\n", 632 ret); 633 return ret; 634 } 635 break; 636 case ATH10K_FIRMWARE_MODE_UTF: 637 data = ar->testmode.utf_firmware_data; 638 data_len = ar->testmode.utf_firmware_len; 639 mode_name = "utf"; 640 break; 641 default: 642 ath10k_err(ar, "unknown firmware mode: %d\n", mode); 643 return -EINVAL; 644 } 645 646 ath10k_dbg(ar, ATH10K_DBG_BOOT, 647 "boot uploading firmware image %p len %d mode %s\n", 648 data, data_len, mode_name); 649 650 ret = ath10k_bmi_fast_download(ar, address, data, data_len); 651 if (ret) { 652 ath10k_err(ar, "failed to download %s firmware: %d\n", 653 mode_name, ret); 654 return ret; 655 } 656 657 return ret; 658 } 659 660 static void ath10k_core_free_board_files(struct ath10k *ar) 661 { 662 if (!IS_ERR(ar->board)) 663 release_firmware(ar->board); 664 665 ar->board = NULL; 666 ar->board_data = NULL; 667 ar->board_len = 0; 668 } 669 670 static void ath10k_core_free_firmware_files(struct ath10k *ar) 671 { 672 if (!IS_ERR(ar->otp)) 673 release_firmware(ar->otp); 674 675 if (!IS_ERR(ar->firmware)) 676 release_firmware(ar->firmware); 677 678 if (!IS_ERR(ar->cal_file)) 679 release_firmware(ar->cal_file); 680 681 ath10k_swap_code_seg_release(ar); 682 683 ar->otp = NULL; 684 ar->otp_data = NULL; 685 ar->otp_len = 0; 686 687 ar->firmware = NULL; 688 ar->firmware_data = NULL; 689 ar->firmware_len = 0; 690 691 ar->cal_file = NULL; 692 } 693 694 static int ath10k_fetch_cal_file(struct ath10k *ar) 695 { 696 char filename[100]; 697 698 /* cal-<bus>-<id>.bin */ 699 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 700 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 701 702 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 703 if (IS_ERR(ar->cal_file)) 704 /* calibration file is optional, don't print any warnings */ 705 return PTR_ERR(ar->cal_file); 706 707 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 708 ATH10K_FW_DIR, filename); 709 710 return 0; 711 } 712 713 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar) 714 { 715 if (!ar->hw_params.fw.board) { 716 ath10k_err(ar, "failed to find board file fw entry\n"); 717 return -EINVAL; 718 } 719 720 ar->board = ath10k_fetch_fw_file(ar, 721 ar->hw_params.fw.dir, 722 ar->hw_params.fw.board); 723 if (IS_ERR(ar->board)) 724 return PTR_ERR(ar->board); 725 726 ar->board_data = ar->board->data; 727 ar->board_len = ar->board->size; 728 729 return 0; 730 } 731 732 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, 733 const void *buf, size_t buf_len, 734 const char *boardname) 735 { 736 const struct ath10k_fw_ie *hdr; 737 bool name_match_found; 738 int ret, board_ie_id; 739 size_t board_ie_len; 740 const void *board_ie_data; 741 742 name_match_found = false; 743 744 /* go through ATH10K_BD_IE_BOARD_ elements */ 745 while (buf_len > sizeof(struct ath10k_fw_ie)) { 746 hdr = buf; 747 board_ie_id = le32_to_cpu(hdr->id); 748 board_ie_len = le32_to_cpu(hdr->len); 749 board_ie_data = hdr->data; 750 751 buf_len -= sizeof(*hdr); 752 buf += sizeof(*hdr); 753 754 if (buf_len < ALIGN(board_ie_len, 4)) { 755 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", 756 buf_len, ALIGN(board_ie_len, 4)); 757 ret = -EINVAL; 758 goto out; 759 } 760 761 switch (board_ie_id) { 762 case ATH10K_BD_IE_BOARD_NAME: 763 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", 764 board_ie_data, board_ie_len); 765 766 if (board_ie_len != strlen(boardname)) 767 break; 768 769 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 770 if (ret) 771 break; 772 773 name_match_found = true; 774 ath10k_dbg(ar, ATH10K_DBG_BOOT, 775 "boot found match for name '%s'", 776 boardname); 777 break; 778 case ATH10K_BD_IE_BOARD_DATA: 779 if (!name_match_found) 780 /* no match found */ 781 break; 782 783 ath10k_dbg(ar, ATH10K_DBG_BOOT, 784 "boot found board data for '%s'", 785 boardname); 786 787 ar->board_data = board_ie_data; 788 ar->board_len = board_ie_len; 789 790 ret = 0; 791 goto out; 792 default: 793 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", 794 board_ie_id); 795 break; 796 } 797 798 /* jump over the padding */ 799 board_ie_len = ALIGN(board_ie_len, 4); 800 801 buf_len -= board_ie_len; 802 buf += board_ie_len; 803 } 804 805 /* no match found */ 806 ret = -ENOENT; 807 808 out: 809 return ret; 810 } 811 812 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, 813 const char *boardname, 814 const char *filename) 815 { 816 size_t len, magic_len, ie_len; 817 struct ath10k_fw_ie *hdr; 818 const u8 *data; 819 int ret, ie_id; 820 821 ar->board = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, filename); 822 if (IS_ERR(ar->board)) 823 return PTR_ERR(ar->board); 824 825 data = ar->board->data; 826 len = ar->board->size; 827 828 /* magic has extra null byte padded */ 829 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; 830 if (len < magic_len) { 831 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", 832 ar->hw_params.fw.dir, filename, len); 833 ret = -EINVAL; 834 goto err; 835 } 836 837 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { 838 ath10k_err(ar, "found invalid board magic\n"); 839 ret = -EINVAL; 840 goto err; 841 } 842 843 /* magic is padded to 4 bytes */ 844 magic_len = ALIGN(magic_len, 4); 845 if (len < magic_len) { 846 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", 847 ar->hw_params.fw.dir, filename, len); 848 ret = -EINVAL; 849 goto err; 850 } 851 852 data += magic_len; 853 len -= magic_len; 854 855 while (len > sizeof(struct ath10k_fw_ie)) { 856 hdr = (struct ath10k_fw_ie *)data; 857 ie_id = le32_to_cpu(hdr->id); 858 ie_len = le32_to_cpu(hdr->len); 859 860 len -= sizeof(*hdr); 861 data = hdr->data; 862 863 if (len < ALIGN(ie_len, 4)) { 864 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", 865 ie_id, ie_len, len); 866 ret = -EINVAL; 867 goto err; 868 } 869 870 switch (ie_id) { 871 case ATH10K_BD_IE_BOARD: 872 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 873 boardname); 874 if (ret == -ENOENT) 875 /* no match found, continue */ 876 break; 877 else if (ret) 878 /* there was an error, bail out */ 879 goto err; 880 881 /* board data found */ 882 goto out; 883 } 884 885 /* jump over the padding */ 886 ie_len = ALIGN(ie_len, 4); 887 888 len -= ie_len; 889 data += ie_len; 890 } 891 892 out: 893 if (!ar->board_data || !ar->board_len) { 894 ath10k_err(ar, 895 "failed to fetch board data for %s from %s/%s\n", 896 boardname, ar->hw_params.fw.dir, filename); 897 ret = -ENODATA; 898 goto err; 899 } 900 901 return 0; 902 903 err: 904 ath10k_core_free_board_files(ar); 905 return ret; 906 } 907 908 static int ath10k_core_create_board_name(struct ath10k *ar, char *name, 909 size_t name_len) 910 { 911 if (ar->id.bmi_ids_valid) { 912 scnprintf(name, name_len, 913 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d", 914 ath10k_bus_str(ar->hif.bus), 915 ar->id.bmi_chip_id, 916 ar->id.bmi_board_id); 917 goto out; 918 } 919 920 scnprintf(name, name_len, 921 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x", 922 ath10k_bus_str(ar->hif.bus), 923 ar->id.vendor, ar->id.device, 924 ar->id.subsystem_vendor, ar->id.subsystem_device); 925 926 out: 927 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); 928 929 return 0; 930 } 931 932 static int ath10k_core_fetch_board_file(struct ath10k *ar) 933 { 934 char boardname[100]; 935 int ret; 936 937 ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname)); 938 if (ret) { 939 ath10k_err(ar, "failed to create board name: %d", ret); 940 return ret; 941 } 942 943 ar->bd_api = 2; 944 ret = ath10k_core_fetch_board_data_api_n(ar, boardname, 945 ATH10K_BOARD_API2_FILE); 946 if (!ret) 947 goto success; 948 949 ar->bd_api = 1; 950 ret = ath10k_core_fetch_board_data_api_1(ar); 951 if (ret) { 952 ath10k_err(ar, "failed to fetch board data\n"); 953 return ret; 954 } 955 956 success: 957 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); 958 return 0; 959 } 960 961 static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar) 962 { 963 int ret = 0; 964 965 if (ar->hw_params.fw.fw == NULL) { 966 ath10k_err(ar, "firmware file not defined\n"); 967 return -EINVAL; 968 } 969 970 ar->firmware = ath10k_fetch_fw_file(ar, 971 ar->hw_params.fw.dir, 972 ar->hw_params.fw.fw); 973 if (IS_ERR(ar->firmware)) { 974 ret = PTR_ERR(ar->firmware); 975 ath10k_err(ar, "could not fetch firmware (%d)\n", ret); 976 goto err; 977 } 978 979 ar->firmware_data = ar->firmware->data; 980 ar->firmware_len = ar->firmware->size; 981 982 /* OTP may be undefined. If so, don't fetch it at all */ 983 if (ar->hw_params.fw.otp == NULL) 984 return 0; 985 986 ar->otp = ath10k_fetch_fw_file(ar, 987 ar->hw_params.fw.dir, 988 ar->hw_params.fw.otp); 989 if (IS_ERR(ar->otp)) { 990 ret = PTR_ERR(ar->otp); 991 ath10k_err(ar, "could not fetch otp (%d)\n", ret); 992 goto err; 993 } 994 995 ar->otp_data = ar->otp->data; 996 ar->otp_len = ar->otp->size; 997 998 return 0; 999 1000 err: 1001 ath10k_core_free_firmware_files(ar); 1002 return ret; 1003 } 1004 1005 static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name) 1006 { 1007 size_t magic_len, len, ie_len; 1008 int ie_id, i, index, bit, ret; 1009 struct ath10k_fw_ie *hdr; 1010 const u8 *data; 1011 __le32 *timestamp, *version; 1012 1013 /* first fetch the firmware file (firmware-*.bin) */ 1014 ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name); 1015 if (IS_ERR(ar->firmware)) { 1016 ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n", 1017 ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware)); 1018 return PTR_ERR(ar->firmware); 1019 } 1020 1021 data = ar->firmware->data; 1022 len = ar->firmware->size; 1023 1024 /* magic also includes the null byte, check that as well */ 1025 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 1026 1027 if (len < magic_len) { 1028 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 1029 ar->hw_params.fw.dir, name, len); 1030 ret = -EINVAL; 1031 goto err; 1032 } 1033 1034 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 1035 ath10k_err(ar, "invalid firmware magic\n"); 1036 ret = -EINVAL; 1037 goto err; 1038 } 1039 1040 /* jump over the padding */ 1041 magic_len = ALIGN(magic_len, 4); 1042 1043 len -= magic_len; 1044 data += magic_len; 1045 1046 /* loop elements */ 1047 while (len > sizeof(struct ath10k_fw_ie)) { 1048 hdr = (struct ath10k_fw_ie *)data; 1049 1050 ie_id = le32_to_cpu(hdr->id); 1051 ie_len = le32_to_cpu(hdr->len); 1052 1053 len -= sizeof(*hdr); 1054 data += sizeof(*hdr); 1055 1056 if (len < ie_len) { 1057 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 1058 ie_id, len, ie_len); 1059 ret = -EINVAL; 1060 goto err; 1061 } 1062 1063 switch (ie_id) { 1064 case ATH10K_FW_IE_FW_VERSION: 1065 if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1) 1066 break; 1067 1068 memcpy(ar->hw->wiphy->fw_version, data, ie_len); 1069 ar->hw->wiphy->fw_version[ie_len] = '\0'; 1070 1071 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1072 "found fw version %s\n", 1073 ar->hw->wiphy->fw_version); 1074 break; 1075 case ATH10K_FW_IE_TIMESTAMP: 1076 if (ie_len != sizeof(u32)) 1077 break; 1078 1079 timestamp = (__le32 *)data; 1080 1081 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 1082 le32_to_cpup(timestamp)); 1083 break; 1084 case ATH10K_FW_IE_FEATURES: 1085 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1086 "found firmware features ie (%zd B)\n", 1087 ie_len); 1088 1089 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 1090 index = i / 8; 1091 bit = i % 8; 1092 1093 if (index == ie_len) 1094 break; 1095 1096 if (data[index] & (1 << bit)) { 1097 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1098 "Enabling feature bit: %i\n", 1099 i); 1100 __set_bit(i, ar->fw_features); 1101 } 1102 } 1103 1104 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 1105 ar->fw_features, 1106 sizeof(ar->fw_features)); 1107 break; 1108 case ATH10K_FW_IE_FW_IMAGE: 1109 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1110 "found fw image ie (%zd B)\n", 1111 ie_len); 1112 1113 ar->firmware_data = data; 1114 ar->firmware_len = ie_len; 1115 1116 break; 1117 case ATH10K_FW_IE_OTP_IMAGE: 1118 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1119 "found otp image ie (%zd B)\n", 1120 ie_len); 1121 1122 ar->otp_data = data; 1123 ar->otp_len = ie_len; 1124 1125 break; 1126 case ATH10K_FW_IE_WMI_OP_VERSION: 1127 if (ie_len != sizeof(u32)) 1128 break; 1129 1130 version = (__le32 *)data; 1131 1132 ar->wmi.op_version = le32_to_cpup(version); 1133 1134 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 1135 ar->wmi.op_version); 1136 break; 1137 case ATH10K_FW_IE_HTT_OP_VERSION: 1138 if (ie_len != sizeof(u32)) 1139 break; 1140 1141 version = (__le32 *)data; 1142 1143 ar->htt.op_version = le32_to_cpup(version); 1144 1145 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 1146 ar->htt.op_version); 1147 break; 1148 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 1149 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1150 "found fw code swap image ie (%zd B)\n", 1151 ie_len); 1152 ar->swap.firmware_codeswap_data = data; 1153 ar->swap.firmware_codeswap_len = ie_len; 1154 break; 1155 default: 1156 ath10k_warn(ar, "Unknown FW IE: %u\n", 1157 le32_to_cpu(hdr->id)); 1158 break; 1159 } 1160 1161 /* jump over the padding */ 1162 ie_len = ALIGN(ie_len, 4); 1163 1164 len -= ie_len; 1165 data += ie_len; 1166 } 1167 1168 if (!ar->firmware_data || !ar->firmware_len) { 1169 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 1170 ar->hw_params.fw.dir, name); 1171 ret = -ENOMEDIUM; 1172 goto err; 1173 } 1174 1175 return 0; 1176 1177 err: 1178 ath10k_core_free_firmware_files(ar); 1179 return ret; 1180 } 1181 1182 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 1183 { 1184 int ret; 1185 1186 /* calibration file is optional, don't check for any errors */ 1187 ath10k_fetch_cal_file(ar); 1188 1189 ar->fw_api = 5; 1190 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 1191 1192 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API5_FILE); 1193 if (ret == 0) 1194 goto success; 1195 1196 ar->fw_api = 4; 1197 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 1198 1199 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API4_FILE); 1200 if (ret == 0) 1201 goto success; 1202 1203 ar->fw_api = 3; 1204 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 1205 1206 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE); 1207 if (ret == 0) 1208 goto success; 1209 1210 ar->fw_api = 2; 1211 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 1212 1213 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE); 1214 if (ret == 0) 1215 goto success; 1216 1217 ar->fw_api = 1; 1218 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 1219 1220 ret = ath10k_core_fetch_firmware_api_1(ar); 1221 if (ret) 1222 return ret; 1223 1224 success: 1225 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1226 1227 return 0; 1228 } 1229 1230 static int ath10k_download_cal_data(struct ath10k *ar) 1231 { 1232 int ret; 1233 1234 ret = ath10k_download_cal_file(ar); 1235 if (ret == 0) { 1236 ar->cal_mode = ATH10K_CAL_MODE_FILE; 1237 goto done; 1238 } 1239 1240 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1241 "boot did not find a calibration file, try DT next: %d\n", 1242 ret); 1243 1244 ret = ath10k_download_cal_dt(ar); 1245 if (ret == 0) { 1246 ar->cal_mode = ATH10K_CAL_MODE_DT; 1247 goto done; 1248 } 1249 1250 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1251 "boot did not find DT entry, try OTP next: %d\n", 1252 ret); 1253 1254 ret = ath10k_download_and_run_otp(ar); 1255 if (ret) { 1256 ath10k_err(ar, "failed to run otp: %d\n", ret); 1257 return ret; 1258 } 1259 1260 ar->cal_mode = ATH10K_CAL_MODE_OTP; 1261 1262 done: 1263 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1264 ath10k_cal_mode_str(ar->cal_mode)); 1265 return 0; 1266 } 1267 1268 static int ath10k_init_uart(struct ath10k *ar) 1269 { 1270 int ret; 1271 1272 /* 1273 * Explicitly setting UART prints to zero as target turns it on 1274 * based on scratch registers. 1275 */ 1276 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 1277 if (ret) { 1278 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 1279 return ret; 1280 } 1281 1282 if (!uart_print) 1283 return 0; 1284 1285 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 1286 if (ret) { 1287 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1288 return ret; 1289 } 1290 1291 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 1292 if (ret) { 1293 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1294 return ret; 1295 } 1296 1297 /* Set the UART baud rate to 19200. */ 1298 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 1299 if (ret) { 1300 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 1301 return ret; 1302 } 1303 1304 ath10k_info(ar, "UART prints enabled\n"); 1305 return 0; 1306 } 1307 1308 static int ath10k_init_hw_params(struct ath10k *ar) 1309 { 1310 const struct ath10k_hw_params *uninitialized_var(hw_params); 1311 int i; 1312 1313 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 1314 hw_params = &ath10k_hw_params_list[i]; 1315 1316 if (hw_params->id == ar->target_version && 1317 hw_params->dev_id == ar->dev_id) 1318 break; 1319 } 1320 1321 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 1322 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 1323 ar->target_version); 1324 return -EINVAL; 1325 } 1326 1327 ar->hw_params = *hw_params; 1328 1329 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 1330 ar->hw_params.name, ar->target_version); 1331 1332 return 0; 1333 } 1334 1335 static void ath10k_core_restart(struct work_struct *work) 1336 { 1337 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 1338 1339 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1340 1341 /* Place a barrier to make sure the compiler doesn't reorder 1342 * CRASH_FLUSH and calling other functions. 1343 */ 1344 barrier(); 1345 1346 ieee80211_stop_queues(ar->hw); 1347 ath10k_drain_tx(ar); 1348 complete_all(&ar->scan.started); 1349 complete_all(&ar->scan.completed); 1350 complete_all(&ar->scan.on_channel); 1351 complete_all(&ar->offchan_tx_completed); 1352 complete_all(&ar->install_key_done); 1353 complete_all(&ar->vdev_setup_done); 1354 complete_all(&ar->thermal.wmi_sync); 1355 wake_up(&ar->htt.empty_tx_wq); 1356 wake_up(&ar->wmi.tx_credits_wq); 1357 wake_up(&ar->peer_mapping_wq); 1358 1359 mutex_lock(&ar->conf_mutex); 1360 1361 switch (ar->state) { 1362 case ATH10K_STATE_ON: 1363 ar->state = ATH10K_STATE_RESTARTING; 1364 ath10k_hif_stop(ar); 1365 ath10k_scan_finish(ar); 1366 ieee80211_restart_hw(ar->hw); 1367 break; 1368 case ATH10K_STATE_OFF: 1369 /* this can happen if driver is being unloaded 1370 * or if the crash happens during FW probing */ 1371 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 1372 break; 1373 case ATH10K_STATE_RESTARTING: 1374 /* hw restart might be requested from multiple places */ 1375 break; 1376 case ATH10K_STATE_RESTARTED: 1377 ar->state = ATH10K_STATE_WEDGED; 1378 /* fall through */ 1379 case ATH10K_STATE_WEDGED: 1380 ath10k_warn(ar, "device is wedged, will not restart\n"); 1381 break; 1382 case ATH10K_STATE_UTF: 1383 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 1384 break; 1385 } 1386 1387 mutex_unlock(&ar->conf_mutex); 1388 } 1389 1390 static int ath10k_core_init_firmware_features(struct ath10k *ar) 1391 { 1392 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) && 1393 !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { 1394 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 1395 return -EINVAL; 1396 } 1397 1398 if (ar->wmi.op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 1399 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 1400 ATH10K_FW_WMI_OP_VERSION_MAX, ar->wmi.op_version); 1401 return -EINVAL; 1402 } 1403 1404 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 1405 switch (ath10k_cryptmode_param) { 1406 case ATH10K_CRYPT_MODE_HW: 1407 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1408 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1409 break; 1410 case ATH10K_CRYPT_MODE_SW: 1411 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1412 ar->fw_features)) { 1413 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 1414 return -EINVAL; 1415 } 1416 1417 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1418 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1419 break; 1420 default: 1421 ath10k_info(ar, "invalid cryptmode: %d\n", 1422 ath10k_cryptmode_param); 1423 return -EINVAL; 1424 } 1425 1426 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 1427 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 1428 1429 if (rawmode) { 1430 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1431 ar->fw_features)) { 1432 ath10k_err(ar, "rawmode = 1 requires support from firmware"); 1433 return -EINVAL; 1434 } 1435 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1436 } 1437 1438 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 1439 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 1440 1441 /* Workaround: 1442 * 1443 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 1444 * and causes enormous performance issues (malformed frames, 1445 * etc). 1446 * 1447 * Disabling A-MSDU makes RAW mode stable with heavy traffic 1448 * albeit a bit slower compared to regular operation. 1449 */ 1450 ar->htt.max_num_amsdu = 1; 1451 } 1452 1453 /* Backwards compatibility for firmwares without 1454 * ATH10K_FW_IE_WMI_OP_VERSION. 1455 */ 1456 if (ar->wmi.op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 1457 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { 1458 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 1459 ar->fw_features)) 1460 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 1461 else 1462 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 1463 } else { 1464 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 1465 } 1466 } 1467 1468 switch (ar->wmi.op_version) { 1469 case ATH10K_FW_WMI_OP_VERSION_MAIN: 1470 ar->max_num_peers = TARGET_NUM_PEERS; 1471 ar->max_num_stations = TARGET_NUM_STATIONS; 1472 ar->max_num_vdevs = TARGET_NUM_VDEVS; 1473 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 1474 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1475 WMI_STAT_PEER; 1476 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1477 break; 1478 case ATH10K_FW_WMI_OP_VERSION_10_1: 1479 case ATH10K_FW_WMI_OP_VERSION_10_2: 1480 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 1481 ar->max_num_peers = TARGET_10X_NUM_PEERS; 1482 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 1483 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 1484 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 1485 ar->fw_stats_req_mask = WMI_STAT_PEER; 1486 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1487 break; 1488 case ATH10K_FW_WMI_OP_VERSION_TLV: 1489 ar->max_num_peers = TARGET_TLV_NUM_PEERS; 1490 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 1491 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 1492 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 1493 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 1494 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 1495 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1496 WMI_STAT_PEER; 1497 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1498 break; 1499 case ATH10K_FW_WMI_OP_VERSION_10_4: 1500 ar->max_num_peers = TARGET_10_4_NUM_PEERS; 1501 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 1502 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 1503 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 1504 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 1505 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 1506 ar->fw_stats_req_mask = WMI_STAT_PEER; 1507 ar->max_spatial_stream = WMI_10_4_MAX_SPATIAL_STREAM; 1508 break; 1509 case ATH10K_FW_WMI_OP_VERSION_UNSET: 1510 case ATH10K_FW_WMI_OP_VERSION_MAX: 1511 WARN_ON(1); 1512 return -EINVAL; 1513 } 1514 1515 /* Backwards compatibility for firmwares without 1516 * ATH10K_FW_IE_HTT_OP_VERSION. 1517 */ 1518 if (ar->htt.op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 1519 switch (ar->wmi.op_version) { 1520 case ATH10K_FW_WMI_OP_VERSION_MAIN: 1521 ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 1522 break; 1523 case ATH10K_FW_WMI_OP_VERSION_10_1: 1524 case ATH10K_FW_WMI_OP_VERSION_10_2: 1525 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 1526 ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 1527 break; 1528 case ATH10K_FW_WMI_OP_VERSION_TLV: 1529 ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 1530 break; 1531 case ATH10K_FW_WMI_OP_VERSION_10_4: 1532 case ATH10K_FW_WMI_OP_VERSION_UNSET: 1533 case ATH10K_FW_WMI_OP_VERSION_MAX: 1534 WARN_ON(1); 1535 return -EINVAL; 1536 } 1537 } 1538 1539 return 0; 1540 } 1541 1542 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode) 1543 { 1544 int status; 1545 1546 lockdep_assert_held(&ar->conf_mutex); 1547 1548 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1549 1550 ath10k_bmi_start(ar); 1551 1552 if (ath10k_init_configure_target(ar)) { 1553 status = -EINVAL; 1554 goto err; 1555 } 1556 1557 status = ath10k_download_cal_data(ar); 1558 if (status) 1559 goto err; 1560 1561 /* Some of of qca988x solutions are having global reset issue 1562 * during target initialization. Bypassing PLL setting before 1563 * downloading firmware and letting the SoC run on REF_CLK is 1564 * fixing the problem. Corresponding firmware change is also needed 1565 * to set the clock source once the target is initialized. 1566 */ 1567 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 1568 ar->fw_features)) { 1569 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 1570 if (status) { 1571 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 1572 status); 1573 goto err; 1574 } 1575 } 1576 1577 status = ath10k_download_fw(ar, mode); 1578 if (status) 1579 goto err; 1580 1581 status = ath10k_init_uart(ar); 1582 if (status) 1583 goto err; 1584 1585 ar->htc.htc_ops.target_send_suspend_complete = 1586 ath10k_send_suspend_complete; 1587 1588 status = ath10k_htc_init(ar); 1589 if (status) { 1590 ath10k_err(ar, "could not init HTC (%d)\n", status); 1591 goto err; 1592 } 1593 1594 status = ath10k_bmi_done(ar); 1595 if (status) 1596 goto err; 1597 1598 status = ath10k_wmi_attach(ar); 1599 if (status) { 1600 ath10k_err(ar, "WMI attach failed: %d\n", status); 1601 goto err; 1602 } 1603 1604 status = ath10k_htt_init(ar); 1605 if (status) { 1606 ath10k_err(ar, "failed to init htt: %d\n", status); 1607 goto err_wmi_detach; 1608 } 1609 1610 status = ath10k_htt_tx_alloc(&ar->htt); 1611 if (status) { 1612 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 1613 goto err_wmi_detach; 1614 } 1615 1616 status = ath10k_htt_rx_alloc(&ar->htt); 1617 if (status) { 1618 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 1619 goto err_htt_tx_detach; 1620 } 1621 1622 status = ath10k_hif_start(ar); 1623 if (status) { 1624 ath10k_err(ar, "could not start HIF: %d\n", status); 1625 goto err_htt_rx_detach; 1626 } 1627 1628 status = ath10k_htc_wait_target(&ar->htc); 1629 if (status) { 1630 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 1631 goto err_hif_stop; 1632 } 1633 1634 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 1635 status = ath10k_htt_connect(&ar->htt); 1636 if (status) { 1637 ath10k_err(ar, "failed to connect htt (%d)\n", status); 1638 goto err_hif_stop; 1639 } 1640 } 1641 1642 status = ath10k_wmi_connect(ar); 1643 if (status) { 1644 ath10k_err(ar, "could not connect wmi: %d\n", status); 1645 goto err_hif_stop; 1646 } 1647 1648 status = ath10k_htc_start(&ar->htc); 1649 if (status) { 1650 ath10k_err(ar, "failed to start htc: %d\n", status); 1651 goto err_hif_stop; 1652 } 1653 1654 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 1655 status = ath10k_wmi_wait_for_service_ready(ar); 1656 if (status) { 1657 ath10k_warn(ar, "wmi service ready event not received"); 1658 goto err_hif_stop; 1659 } 1660 } 1661 1662 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 1663 ar->hw->wiphy->fw_version); 1664 1665 status = ath10k_wmi_cmd_init(ar); 1666 if (status) { 1667 ath10k_err(ar, "could not send WMI init command (%d)\n", 1668 status); 1669 goto err_hif_stop; 1670 } 1671 1672 status = ath10k_wmi_wait_for_unified_ready(ar); 1673 if (status) { 1674 ath10k_err(ar, "wmi unified ready event not received\n"); 1675 goto err_hif_stop; 1676 } 1677 1678 /* If firmware indicates Full Rx Reorder support it must be used in a 1679 * slightly different manner. Let HTT code know. 1680 */ 1681 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 1682 ar->wmi.svc_map)); 1683 1684 status = ath10k_htt_rx_ring_refill(ar); 1685 if (status) { 1686 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 1687 goto err_hif_stop; 1688 } 1689 1690 /* we don't care about HTT in UTF mode */ 1691 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 1692 status = ath10k_htt_setup(&ar->htt); 1693 if (status) { 1694 ath10k_err(ar, "failed to setup htt: %d\n", status); 1695 goto err_hif_stop; 1696 } 1697 } 1698 1699 status = ath10k_debug_start(ar); 1700 if (status) 1701 goto err_hif_stop; 1702 1703 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 1704 1705 INIT_LIST_HEAD(&ar->arvifs); 1706 1707 return 0; 1708 1709 err_hif_stop: 1710 ath10k_hif_stop(ar); 1711 err_htt_rx_detach: 1712 ath10k_htt_rx_free(&ar->htt); 1713 err_htt_tx_detach: 1714 ath10k_htt_tx_free(&ar->htt); 1715 err_wmi_detach: 1716 ath10k_wmi_detach(ar); 1717 err: 1718 return status; 1719 } 1720 EXPORT_SYMBOL(ath10k_core_start); 1721 1722 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 1723 { 1724 int ret; 1725 unsigned long time_left; 1726 1727 reinit_completion(&ar->target_suspend); 1728 1729 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 1730 if (ret) { 1731 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 1732 return ret; 1733 } 1734 1735 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 1736 1737 if (!time_left) { 1738 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 1739 return -ETIMEDOUT; 1740 } 1741 1742 return 0; 1743 } 1744 1745 void ath10k_core_stop(struct ath10k *ar) 1746 { 1747 lockdep_assert_held(&ar->conf_mutex); 1748 ath10k_debug_stop(ar); 1749 1750 /* try to suspend target */ 1751 if (ar->state != ATH10K_STATE_RESTARTING && 1752 ar->state != ATH10K_STATE_UTF) 1753 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 1754 1755 ath10k_hif_stop(ar); 1756 ath10k_htt_tx_free(&ar->htt); 1757 ath10k_htt_rx_free(&ar->htt); 1758 ath10k_wmi_detach(ar); 1759 } 1760 EXPORT_SYMBOL(ath10k_core_stop); 1761 1762 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 1763 * order to know what hw capabilities should be advertised to mac80211 it is 1764 * necessary to load the firmware (and tear it down immediately since start 1765 * hook will try to init it again) before registering */ 1766 static int ath10k_core_probe_fw(struct ath10k *ar) 1767 { 1768 struct bmi_target_info target_info; 1769 int ret = 0; 1770 1771 ret = ath10k_hif_power_up(ar); 1772 if (ret) { 1773 ath10k_err(ar, "could not start pci hif (%d)\n", ret); 1774 return ret; 1775 } 1776 1777 memset(&target_info, 0, sizeof(target_info)); 1778 ret = ath10k_bmi_get_target_info(ar, &target_info); 1779 if (ret) { 1780 ath10k_err(ar, "could not get target info (%d)\n", ret); 1781 goto err_power_down; 1782 } 1783 1784 ar->target_version = target_info.version; 1785 ar->hw->wiphy->hw_version = target_info.version; 1786 1787 ret = ath10k_init_hw_params(ar); 1788 if (ret) { 1789 ath10k_err(ar, "could not get hw params (%d)\n", ret); 1790 goto err_power_down; 1791 } 1792 1793 ret = ath10k_core_fetch_firmware_files(ar); 1794 if (ret) { 1795 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 1796 goto err_power_down; 1797 } 1798 1799 ath10k_debug_print_hwfw_info(ar); 1800 1801 ret = ath10k_core_get_board_id_from_otp(ar); 1802 if (ret && ret != -EOPNOTSUPP) { 1803 ath10k_err(ar, "failed to get board id from otp: %d\n", 1804 ret); 1805 return ret; 1806 } 1807 1808 ret = ath10k_core_fetch_board_file(ar); 1809 if (ret) { 1810 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 1811 goto err_free_firmware_files; 1812 } 1813 1814 ath10k_debug_print_board_info(ar); 1815 1816 ret = ath10k_core_init_firmware_features(ar); 1817 if (ret) { 1818 ath10k_err(ar, "fatal problem with firmware features: %d\n", 1819 ret); 1820 goto err_free_firmware_files; 1821 } 1822 1823 ret = ath10k_swap_code_seg_init(ar); 1824 if (ret) { 1825 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 1826 ret); 1827 goto err_free_firmware_files; 1828 } 1829 1830 mutex_lock(&ar->conf_mutex); 1831 1832 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL); 1833 if (ret) { 1834 ath10k_err(ar, "could not init core (%d)\n", ret); 1835 goto err_unlock; 1836 } 1837 1838 ath10k_debug_print_boot_info(ar); 1839 ath10k_core_stop(ar); 1840 1841 mutex_unlock(&ar->conf_mutex); 1842 1843 ath10k_hif_power_down(ar); 1844 return 0; 1845 1846 err_unlock: 1847 mutex_unlock(&ar->conf_mutex); 1848 1849 err_free_firmware_files: 1850 ath10k_core_free_firmware_files(ar); 1851 1852 err_power_down: 1853 ath10k_hif_power_down(ar); 1854 1855 return ret; 1856 } 1857 1858 static void ath10k_core_register_work(struct work_struct *work) 1859 { 1860 struct ath10k *ar = container_of(work, struct ath10k, register_work); 1861 int status; 1862 1863 status = ath10k_core_probe_fw(ar); 1864 if (status) { 1865 ath10k_err(ar, "could not probe fw (%d)\n", status); 1866 goto err; 1867 } 1868 1869 status = ath10k_mac_register(ar); 1870 if (status) { 1871 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 1872 goto err_release_fw; 1873 } 1874 1875 status = ath10k_debug_register(ar); 1876 if (status) { 1877 ath10k_err(ar, "unable to initialize debugfs\n"); 1878 goto err_unregister_mac; 1879 } 1880 1881 status = ath10k_spectral_create(ar); 1882 if (status) { 1883 ath10k_err(ar, "failed to initialize spectral\n"); 1884 goto err_debug_destroy; 1885 } 1886 1887 status = ath10k_thermal_register(ar); 1888 if (status) { 1889 ath10k_err(ar, "could not register thermal device: %d\n", 1890 status); 1891 goto err_spectral_destroy; 1892 } 1893 1894 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 1895 return; 1896 1897 err_spectral_destroy: 1898 ath10k_spectral_destroy(ar); 1899 err_debug_destroy: 1900 ath10k_debug_destroy(ar); 1901 err_unregister_mac: 1902 ath10k_mac_unregister(ar); 1903 err_release_fw: 1904 ath10k_core_free_firmware_files(ar); 1905 err: 1906 /* TODO: It's probably a good idea to release device from the driver 1907 * but calling device_release_driver() here will cause a deadlock. 1908 */ 1909 return; 1910 } 1911 1912 int ath10k_core_register(struct ath10k *ar, u32 chip_id) 1913 { 1914 ar->chip_id = chip_id; 1915 queue_work(ar->workqueue, &ar->register_work); 1916 1917 return 0; 1918 } 1919 EXPORT_SYMBOL(ath10k_core_register); 1920 1921 void ath10k_core_unregister(struct ath10k *ar) 1922 { 1923 cancel_work_sync(&ar->register_work); 1924 1925 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 1926 return; 1927 1928 ath10k_thermal_unregister(ar); 1929 /* Stop spectral before unregistering from mac80211 to remove the 1930 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 1931 * would be already be free'd recursively, leading to a double free. 1932 */ 1933 ath10k_spectral_destroy(ar); 1934 1935 /* We must unregister from mac80211 before we stop HTC and HIF. 1936 * Otherwise we will fail to submit commands to FW and mac80211 will be 1937 * unhappy about callback failures. */ 1938 ath10k_mac_unregister(ar); 1939 1940 ath10k_testmode_destroy(ar); 1941 1942 ath10k_core_free_firmware_files(ar); 1943 ath10k_core_free_board_files(ar); 1944 1945 ath10k_debug_unregister(ar); 1946 } 1947 EXPORT_SYMBOL(ath10k_core_unregister); 1948 1949 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 1950 enum ath10k_bus bus, 1951 enum ath10k_hw_rev hw_rev, 1952 const struct ath10k_hif_ops *hif_ops) 1953 { 1954 struct ath10k *ar; 1955 int ret; 1956 1957 ar = ath10k_mac_create(priv_size); 1958 if (!ar) 1959 return NULL; 1960 1961 ar->ath_common.priv = ar; 1962 ar->ath_common.hw = ar->hw; 1963 ar->dev = dev; 1964 ar->hw_rev = hw_rev; 1965 ar->hif.ops = hif_ops; 1966 ar->hif.bus = bus; 1967 1968 switch (hw_rev) { 1969 case ATH10K_HW_QCA988X: 1970 ar->regs = &qca988x_regs; 1971 ar->hw_values = &qca988x_values; 1972 break; 1973 case ATH10K_HW_QCA6174: 1974 case ATH10K_HW_QCA9377: 1975 ar->regs = &qca6174_regs; 1976 ar->hw_values = &qca6174_values; 1977 break; 1978 case ATH10K_HW_QCA99X0: 1979 ar->regs = &qca99x0_regs; 1980 ar->hw_values = &qca99x0_values; 1981 break; 1982 default: 1983 ath10k_err(ar, "unsupported core hardware revision %d\n", 1984 hw_rev); 1985 ret = -ENOTSUPP; 1986 goto err_free_mac; 1987 } 1988 1989 init_completion(&ar->scan.started); 1990 init_completion(&ar->scan.completed); 1991 init_completion(&ar->scan.on_channel); 1992 init_completion(&ar->target_suspend); 1993 init_completion(&ar->wow.wakeup_completed); 1994 1995 init_completion(&ar->install_key_done); 1996 init_completion(&ar->vdev_setup_done); 1997 init_completion(&ar->thermal.wmi_sync); 1998 1999 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 2000 2001 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 2002 if (!ar->workqueue) 2003 goto err_free_mac; 2004 2005 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 2006 if (!ar->workqueue_aux) 2007 goto err_free_wq; 2008 2009 mutex_init(&ar->conf_mutex); 2010 spin_lock_init(&ar->data_lock); 2011 2012 INIT_LIST_HEAD(&ar->peers); 2013 init_waitqueue_head(&ar->peer_mapping_wq); 2014 init_waitqueue_head(&ar->htt.empty_tx_wq); 2015 init_waitqueue_head(&ar->wmi.tx_credits_wq); 2016 2017 init_completion(&ar->offchan_tx_completed); 2018 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 2019 skb_queue_head_init(&ar->offchan_tx_queue); 2020 2021 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 2022 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 2023 2024 INIT_WORK(&ar->register_work, ath10k_core_register_work); 2025 INIT_WORK(&ar->restart_work, ath10k_core_restart); 2026 2027 ret = ath10k_debug_create(ar); 2028 if (ret) 2029 goto err_free_aux_wq; 2030 2031 return ar; 2032 2033 err_free_aux_wq: 2034 destroy_workqueue(ar->workqueue_aux); 2035 err_free_wq: 2036 destroy_workqueue(ar->workqueue); 2037 2038 err_free_mac: 2039 ath10k_mac_destroy(ar); 2040 2041 return NULL; 2042 } 2043 EXPORT_SYMBOL(ath10k_core_create); 2044 2045 void ath10k_core_destroy(struct ath10k *ar) 2046 { 2047 flush_workqueue(ar->workqueue); 2048 destroy_workqueue(ar->workqueue); 2049 2050 flush_workqueue(ar->workqueue_aux); 2051 destroy_workqueue(ar->workqueue_aux); 2052 2053 ath10k_debug_destroy(ar); 2054 ath10k_wmi_free_host_mem(ar); 2055 ath10k_mac_destroy(ar); 2056 } 2057 EXPORT_SYMBOL(ath10k_core_destroy); 2058 2059 MODULE_AUTHOR("Qualcomm Atheros"); 2060 MODULE_DESCRIPTION("Core module for QCA988X PCIe devices."); 2061 MODULE_LICENSE("Dual BSD/GPL"); 2062