1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include <linux/module.h> 19 #include <linux/firmware.h> 20 #include <linux/of.h> 21 #include <linux/dmi.h> 22 #include <linux/ctype.h> 23 #include <asm/byteorder.h> 24 25 #include "core.h" 26 #include "mac.h" 27 #include "htc.h" 28 #include "hif.h" 29 #include "wmi.h" 30 #include "bmi.h" 31 #include "debug.h" 32 #include "htt.h" 33 #include "testmode.h" 34 #include "wmi-ops.h" 35 36 unsigned int ath10k_debug_mask; 37 static unsigned int ath10k_cryptmode_param; 38 static bool uart_print; 39 static bool skip_otp; 40 static bool rawmode; 41 42 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 43 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 44 module_param(uart_print, bool, 0644); 45 module_param(skip_otp, bool, 0644); 46 module_param(rawmode, bool, 0644); 47 48 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 49 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 50 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 51 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 52 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); 53 54 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 55 { 56 .id = QCA988X_HW_2_0_VERSION, 57 .dev_id = QCA988X_2_0_DEVICE_ID, 58 .name = "qca988x hw2.0", 59 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 60 .uart_pin = 7, 61 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 62 .otp_exe_param = 0, 63 .channel_counters_freq_hz = 88000, 64 .max_probe_resp_desc_thres = 0, 65 .cal_data_len = 2116, 66 .fw = { 67 .dir = QCA988X_HW_2_0_FW_DIR, 68 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 69 .board_size = QCA988X_BOARD_DATA_SZ, 70 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 71 }, 72 .hw_ops = &qca988x_ops, 73 .decap_align_bytes = 4, 74 .spectral_bin_discard = 0, 75 .vht160_mcs_rx_highest = 0, 76 .vht160_mcs_tx_highest = 0, 77 .n_cipher_suites = 8, 78 .num_peers = TARGET_TLV_NUM_PEERS, 79 .ast_skid_limit = 0x10, 80 .num_wds_entries = 0x20, 81 }, 82 { 83 .id = QCA9887_HW_1_0_VERSION, 84 .dev_id = QCA9887_1_0_DEVICE_ID, 85 .name = "qca9887 hw1.0", 86 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR, 87 .uart_pin = 7, 88 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 89 .otp_exe_param = 0, 90 .channel_counters_freq_hz = 88000, 91 .max_probe_resp_desc_thres = 0, 92 .cal_data_len = 2116, 93 .fw = { 94 .dir = QCA9887_HW_1_0_FW_DIR, 95 .board = QCA9887_HW_1_0_BOARD_DATA_FILE, 96 .board_size = QCA9887_BOARD_DATA_SZ, 97 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ, 98 }, 99 .hw_ops = &qca988x_ops, 100 .decap_align_bytes = 4, 101 .spectral_bin_discard = 0, 102 .vht160_mcs_rx_highest = 0, 103 .vht160_mcs_tx_highest = 0, 104 .n_cipher_suites = 8, 105 .num_peers = TARGET_TLV_NUM_PEERS, 106 .ast_skid_limit = 0x10, 107 .num_wds_entries = 0x20, 108 }, 109 { 110 .id = QCA6174_HW_2_1_VERSION, 111 .dev_id = QCA6164_2_1_DEVICE_ID, 112 .name = "qca6164 hw2.1", 113 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 114 .uart_pin = 6, 115 .otp_exe_param = 0, 116 .channel_counters_freq_hz = 88000, 117 .max_probe_resp_desc_thres = 0, 118 .cal_data_len = 8124, 119 .fw = { 120 .dir = QCA6174_HW_2_1_FW_DIR, 121 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 122 .board_size = QCA6174_BOARD_DATA_SZ, 123 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 124 }, 125 .hw_ops = &qca988x_ops, 126 .decap_align_bytes = 4, 127 .spectral_bin_discard = 0, 128 .vht160_mcs_rx_highest = 0, 129 .vht160_mcs_tx_highest = 0, 130 .n_cipher_suites = 8, 131 .num_peers = TARGET_TLV_NUM_PEERS, 132 .ast_skid_limit = 0x10, 133 .num_wds_entries = 0x20, 134 }, 135 { 136 .id = QCA6174_HW_2_1_VERSION, 137 .dev_id = QCA6174_2_1_DEVICE_ID, 138 .name = "qca6174 hw2.1", 139 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 140 .uart_pin = 6, 141 .otp_exe_param = 0, 142 .channel_counters_freq_hz = 88000, 143 .max_probe_resp_desc_thres = 0, 144 .cal_data_len = 8124, 145 .fw = { 146 .dir = QCA6174_HW_2_1_FW_DIR, 147 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 148 .board_size = QCA6174_BOARD_DATA_SZ, 149 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 150 }, 151 .hw_ops = &qca988x_ops, 152 .decap_align_bytes = 4, 153 .spectral_bin_discard = 0, 154 .vht160_mcs_rx_highest = 0, 155 .vht160_mcs_tx_highest = 0, 156 .n_cipher_suites = 8, 157 .num_peers = TARGET_TLV_NUM_PEERS, 158 .ast_skid_limit = 0x10, 159 .num_wds_entries = 0x20, 160 }, 161 { 162 .id = QCA6174_HW_3_0_VERSION, 163 .dev_id = QCA6174_2_1_DEVICE_ID, 164 .name = "qca6174 hw3.0", 165 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 166 .uart_pin = 6, 167 .otp_exe_param = 0, 168 .channel_counters_freq_hz = 88000, 169 .max_probe_resp_desc_thres = 0, 170 .cal_data_len = 8124, 171 .fw = { 172 .dir = QCA6174_HW_3_0_FW_DIR, 173 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 174 .board_size = QCA6174_BOARD_DATA_SZ, 175 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 176 }, 177 .hw_ops = &qca988x_ops, 178 .decap_align_bytes = 4, 179 .spectral_bin_discard = 0, 180 .vht160_mcs_rx_highest = 0, 181 .vht160_mcs_tx_highest = 0, 182 .n_cipher_suites = 8, 183 .num_peers = TARGET_TLV_NUM_PEERS, 184 .ast_skid_limit = 0x10, 185 .num_wds_entries = 0x20, 186 }, 187 { 188 .id = QCA6174_HW_3_2_VERSION, 189 .dev_id = QCA6174_2_1_DEVICE_ID, 190 .name = "qca6174 hw3.2", 191 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 192 .uart_pin = 6, 193 .otp_exe_param = 0, 194 .channel_counters_freq_hz = 88000, 195 .max_probe_resp_desc_thres = 0, 196 .cal_data_len = 8124, 197 .fw = { 198 /* uses same binaries as hw3.0 */ 199 .dir = QCA6174_HW_3_0_FW_DIR, 200 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 201 .board_size = QCA6174_BOARD_DATA_SZ, 202 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 203 }, 204 .hw_ops = &qca6174_ops, 205 .hw_clk = qca6174_clk, 206 .target_cpu_freq = 176000000, 207 .decap_align_bytes = 4, 208 .spectral_bin_discard = 0, 209 .vht160_mcs_rx_highest = 0, 210 .vht160_mcs_tx_highest = 0, 211 .n_cipher_suites = 8, 212 .num_peers = TARGET_TLV_NUM_PEERS, 213 .ast_skid_limit = 0x10, 214 .num_wds_entries = 0x20, 215 }, 216 { 217 .id = QCA99X0_HW_2_0_DEV_VERSION, 218 .dev_id = QCA99X0_2_0_DEVICE_ID, 219 .name = "qca99x0 hw2.0", 220 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 221 .uart_pin = 7, 222 .otp_exe_param = 0x00000700, 223 .continuous_frag_desc = true, 224 .cck_rate_map_rev2 = true, 225 .channel_counters_freq_hz = 150000, 226 .max_probe_resp_desc_thres = 24, 227 .tx_chain_mask = 0xf, 228 .rx_chain_mask = 0xf, 229 .max_spatial_stream = 4, 230 .cal_data_len = 12064, 231 .fw = { 232 .dir = QCA99X0_HW_2_0_FW_DIR, 233 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 234 .board_size = QCA99X0_BOARD_DATA_SZ, 235 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 236 }, 237 .sw_decrypt_mcast_mgmt = true, 238 .hw_ops = &qca99x0_ops, 239 .decap_align_bytes = 1, 240 .spectral_bin_discard = 4, 241 .vht160_mcs_rx_highest = 0, 242 .vht160_mcs_tx_highest = 0, 243 .n_cipher_suites = 11, 244 .num_peers = TARGET_TLV_NUM_PEERS, 245 .ast_skid_limit = 0x10, 246 .num_wds_entries = 0x20, 247 }, 248 { 249 .id = QCA9984_HW_1_0_DEV_VERSION, 250 .dev_id = QCA9984_1_0_DEVICE_ID, 251 .name = "qca9984/qca9994 hw1.0", 252 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR, 253 .uart_pin = 7, 254 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 255 .otp_exe_param = 0x00000700, 256 .continuous_frag_desc = true, 257 .cck_rate_map_rev2 = true, 258 .channel_counters_freq_hz = 150000, 259 .max_probe_resp_desc_thres = 24, 260 .tx_chain_mask = 0xf, 261 .rx_chain_mask = 0xf, 262 .max_spatial_stream = 4, 263 .cal_data_len = 12064, 264 .fw = { 265 .dir = QCA9984_HW_1_0_FW_DIR, 266 .board = QCA9984_HW_1_0_BOARD_DATA_FILE, 267 .board_size = QCA99X0_BOARD_DATA_SZ, 268 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 269 }, 270 .sw_decrypt_mcast_mgmt = true, 271 .hw_ops = &qca99x0_ops, 272 .decap_align_bytes = 1, 273 .spectral_bin_discard = 12, 274 275 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz 276 * or 2x2 160Mhz, long-guard-interval. 277 */ 278 .vht160_mcs_rx_highest = 1560, 279 .vht160_mcs_tx_highest = 1560, 280 .n_cipher_suites = 11, 281 .num_peers = TARGET_TLV_NUM_PEERS, 282 .ast_skid_limit = 0x10, 283 .num_wds_entries = 0x20, 284 }, 285 { 286 .id = QCA9888_HW_2_0_DEV_VERSION, 287 .dev_id = QCA9888_2_0_DEVICE_ID, 288 .name = "qca9888 hw2.0", 289 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR, 290 .uart_pin = 7, 291 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 292 .otp_exe_param = 0x00000700, 293 .continuous_frag_desc = true, 294 .channel_counters_freq_hz = 150000, 295 .max_probe_resp_desc_thres = 24, 296 .tx_chain_mask = 3, 297 .rx_chain_mask = 3, 298 .max_spatial_stream = 2, 299 .cal_data_len = 12064, 300 .fw = { 301 .dir = QCA9888_HW_2_0_FW_DIR, 302 .board = QCA9888_HW_2_0_BOARD_DATA_FILE, 303 .board_size = QCA99X0_BOARD_DATA_SZ, 304 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 305 }, 306 .sw_decrypt_mcast_mgmt = true, 307 .hw_ops = &qca99x0_ops, 308 .decap_align_bytes = 1, 309 .spectral_bin_discard = 12, 310 311 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or 312 * 1x1 160Mhz, long-guard-interval. 313 */ 314 .vht160_mcs_rx_highest = 780, 315 .vht160_mcs_tx_highest = 780, 316 .n_cipher_suites = 11, 317 .num_peers = TARGET_TLV_NUM_PEERS, 318 .ast_skid_limit = 0x10, 319 .num_wds_entries = 0x20, 320 }, 321 { 322 .id = QCA9377_HW_1_0_DEV_VERSION, 323 .dev_id = QCA9377_1_0_DEVICE_ID, 324 .name = "qca9377 hw1.0", 325 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 326 .uart_pin = 6, 327 .otp_exe_param = 0, 328 .channel_counters_freq_hz = 88000, 329 .max_probe_resp_desc_thres = 0, 330 .cal_data_len = 8124, 331 .fw = { 332 .dir = QCA9377_HW_1_0_FW_DIR, 333 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 334 .board_size = QCA9377_BOARD_DATA_SZ, 335 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 336 }, 337 .hw_ops = &qca988x_ops, 338 .decap_align_bytes = 4, 339 .spectral_bin_discard = 0, 340 .vht160_mcs_rx_highest = 0, 341 .vht160_mcs_tx_highest = 0, 342 .n_cipher_suites = 8, 343 .num_peers = TARGET_TLV_NUM_PEERS, 344 .ast_skid_limit = 0x10, 345 .num_wds_entries = 0x20, 346 }, 347 { 348 .id = QCA9377_HW_1_1_DEV_VERSION, 349 .dev_id = QCA9377_1_0_DEVICE_ID, 350 .name = "qca9377 hw1.1", 351 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 352 .uart_pin = 6, 353 .otp_exe_param = 0, 354 .channel_counters_freq_hz = 88000, 355 .max_probe_resp_desc_thres = 0, 356 .cal_data_len = 8124, 357 .fw = { 358 .dir = QCA9377_HW_1_0_FW_DIR, 359 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 360 .board_size = QCA9377_BOARD_DATA_SZ, 361 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 362 }, 363 .hw_ops = &qca6174_ops, 364 .hw_clk = qca6174_clk, 365 .target_cpu_freq = 176000000, 366 .decap_align_bytes = 4, 367 .spectral_bin_discard = 0, 368 .vht160_mcs_rx_highest = 0, 369 .vht160_mcs_tx_highest = 0, 370 .n_cipher_suites = 8, 371 .num_peers = TARGET_TLV_NUM_PEERS, 372 .ast_skid_limit = 0x10, 373 .num_wds_entries = 0x20, 374 }, 375 { 376 .id = QCA4019_HW_1_0_DEV_VERSION, 377 .dev_id = 0, 378 .name = "qca4019 hw1.0", 379 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR, 380 .uart_pin = 7, 381 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 382 .otp_exe_param = 0x0010000, 383 .continuous_frag_desc = true, 384 .cck_rate_map_rev2 = true, 385 .channel_counters_freq_hz = 125000, 386 .max_probe_resp_desc_thres = 24, 387 .tx_chain_mask = 0x3, 388 .rx_chain_mask = 0x3, 389 .max_spatial_stream = 2, 390 .cal_data_len = 12064, 391 .fw = { 392 .dir = QCA4019_HW_1_0_FW_DIR, 393 .board = QCA4019_HW_1_0_BOARD_DATA_FILE, 394 .board_size = QCA4019_BOARD_DATA_SZ, 395 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, 396 }, 397 .sw_decrypt_mcast_mgmt = true, 398 .hw_ops = &qca99x0_ops, 399 .decap_align_bytes = 1, 400 .spectral_bin_discard = 4, 401 .vht160_mcs_rx_highest = 0, 402 .vht160_mcs_tx_highest = 0, 403 .n_cipher_suites = 11, 404 .num_peers = TARGET_TLV_NUM_PEERS, 405 .ast_skid_limit = 0x10, 406 .num_wds_entries = 0x20, 407 }, 408 { 409 .id = WCN3990_HW_1_0_DEV_VERSION, 410 .dev_id = 0, 411 .name = "wcn3990 hw1.0", 412 .continuous_frag_desc = true, 413 .tx_chain_mask = 0x7, 414 .rx_chain_mask = 0x7, 415 .max_spatial_stream = 4, 416 .fw = { 417 .dir = WCN3990_HW_1_0_FW_DIR, 418 }, 419 .sw_decrypt_mcast_mgmt = true, 420 .hw_ops = &wcn3990_ops, 421 .decap_align_bytes = 1, 422 .num_peers = TARGET_HL_10_TLV_NUM_PEERS, 423 .ast_skid_limit = TARGET_HL_10_TLV_AST_SKID_LIMIT, 424 .num_wds_entries = TARGET_HL_10_TLV_NUM_WDS_ENTRIES, 425 }, 426 }; 427 428 static const char *const ath10k_core_fw_feature_str[] = { 429 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 430 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 431 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 432 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 433 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 434 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 435 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 436 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 437 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 438 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 439 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 440 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 441 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", 442 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl", 443 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param", 444 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war", 445 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast", 446 [ATH10K_FW_FEATURE_NO_PS] = "no-ps", 447 [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference", 448 }; 449 450 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 451 size_t buf_len, 452 enum ath10k_fw_features feat) 453 { 454 /* make sure that ath10k_core_fw_feature_str[] gets updated */ 455 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != 456 ATH10K_FW_FEATURE_COUNT); 457 458 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 459 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 460 return scnprintf(buf, buf_len, "bit%d", feat); 461 } 462 463 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 464 } 465 466 void ath10k_core_get_fw_features_str(struct ath10k *ar, 467 char *buf, 468 size_t buf_len) 469 { 470 size_t len = 0; 471 int i; 472 473 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 474 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) { 475 if (len > 0) 476 len += scnprintf(buf + len, buf_len - len, ","); 477 478 len += ath10k_core_get_fw_feature_str(buf + len, 479 buf_len - len, 480 i); 481 } 482 } 483 } 484 485 static void ath10k_send_suspend_complete(struct ath10k *ar) 486 { 487 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 488 489 complete(&ar->target_suspend); 490 } 491 492 static void ath10k_init_sdio(struct ath10k *ar) 493 { 494 u32 param = 0; 495 496 ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256); 497 ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99); 498 ath10k_bmi_read32(ar, hi_acs_flags, ¶m); 499 500 param |= (HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET | 501 HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET | 502 HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE); 503 504 ath10k_bmi_write32(ar, hi_acs_flags, param); 505 } 506 507 static int ath10k_init_configure_target(struct ath10k *ar) 508 { 509 u32 param_host; 510 int ret; 511 512 /* tell target which HTC version it is used*/ 513 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 514 HTC_PROTOCOL_VERSION); 515 if (ret) { 516 ath10k_err(ar, "settings HTC version failed\n"); 517 return ret; 518 } 519 520 /* set the firmware mode to STA/IBSS/AP */ 521 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 522 if (ret) { 523 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 524 return ret; 525 } 526 527 /* TODO following parameters need to be re-visited. */ 528 /* num_device */ 529 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 530 /* Firmware mode */ 531 /* FIXME: Why FW_MODE_AP ??.*/ 532 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 533 /* mac_addr_method */ 534 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 535 /* firmware_bridge */ 536 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 537 /* fwsubmode */ 538 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 539 540 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 541 if (ret) { 542 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 543 return ret; 544 } 545 546 /* We do all byte-swapping on the host */ 547 ret = ath10k_bmi_write32(ar, hi_be, 0); 548 if (ret) { 549 ath10k_err(ar, "setting host CPU BE mode failed\n"); 550 return ret; 551 } 552 553 /* FW descriptor/Data swap flags */ 554 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 555 556 if (ret) { 557 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 558 return ret; 559 } 560 561 /* Some devices have a special sanity check that verifies the PCI 562 * Device ID is written to this host interest var. It is known to be 563 * required to boot QCA6164. 564 */ 565 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 566 ar->dev_id); 567 if (ret) { 568 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 569 return ret; 570 } 571 572 return 0; 573 } 574 575 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 576 const char *dir, 577 const char *file) 578 { 579 char filename[100]; 580 const struct firmware *fw; 581 int ret; 582 583 if (file == NULL) 584 return ERR_PTR(-ENOENT); 585 586 if (dir == NULL) 587 dir = "."; 588 589 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 590 ret = request_firmware(&fw, filename, ar->dev); 591 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n", 592 filename, ret); 593 594 if (ret) 595 return ERR_PTR(ret); 596 597 return fw; 598 } 599 600 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 601 size_t data_len) 602 { 603 u32 board_data_size = ar->hw_params.fw.board_size; 604 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 605 u32 board_ext_data_addr; 606 int ret; 607 608 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 609 if (ret) { 610 ath10k_err(ar, "could not read board ext data addr (%d)\n", 611 ret); 612 return ret; 613 } 614 615 ath10k_dbg(ar, ATH10K_DBG_BOOT, 616 "boot push board extended data addr 0x%x\n", 617 board_ext_data_addr); 618 619 if (board_ext_data_addr == 0) 620 return 0; 621 622 if (data_len != (board_data_size + board_ext_data_size)) { 623 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 624 data_len, board_data_size, board_ext_data_size); 625 return -EINVAL; 626 } 627 628 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 629 data + board_data_size, 630 board_ext_data_size); 631 if (ret) { 632 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 633 return ret; 634 } 635 636 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 637 (board_ext_data_size << 16) | 1); 638 if (ret) { 639 ath10k_err(ar, "could not write board ext data bit (%d)\n", 640 ret); 641 return ret; 642 } 643 644 return 0; 645 } 646 647 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 648 size_t data_len) 649 { 650 u32 board_data_size = ar->hw_params.fw.board_size; 651 u32 address; 652 int ret; 653 654 ret = ath10k_push_board_ext_data(ar, data, data_len); 655 if (ret) { 656 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 657 goto exit; 658 } 659 660 ret = ath10k_bmi_read32(ar, hi_board_data, &address); 661 if (ret) { 662 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 663 goto exit; 664 } 665 666 ret = ath10k_bmi_write_memory(ar, address, data, 667 min_t(u32, board_data_size, 668 data_len)); 669 if (ret) { 670 ath10k_err(ar, "could not write board data (%d)\n", ret); 671 goto exit; 672 } 673 674 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 675 if (ret) { 676 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 677 goto exit; 678 } 679 680 exit: 681 return ret; 682 } 683 684 static int ath10k_download_cal_file(struct ath10k *ar, 685 const struct firmware *file) 686 { 687 int ret; 688 689 if (!file) 690 return -ENOENT; 691 692 if (IS_ERR(file)) 693 return PTR_ERR(file); 694 695 ret = ath10k_download_board_data(ar, file->data, file->size); 696 if (ret) { 697 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 698 return ret; 699 } 700 701 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 702 703 return 0; 704 } 705 706 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name) 707 { 708 struct device_node *node; 709 int data_len; 710 void *data; 711 int ret; 712 713 node = ar->dev->of_node; 714 if (!node) 715 /* Device Tree is optional, don't print any warnings if 716 * there's no node for ath10k. 717 */ 718 return -ENOENT; 719 720 if (!of_get_property(node, dt_name, &data_len)) { 721 /* The calibration data node is optional */ 722 return -ENOENT; 723 } 724 725 if (data_len != ar->hw_params.cal_data_len) { 726 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 727 data_len); 728 ret = -EMSGSIZE; 729 goto out; 730 } 731 732 data = kmalloc(data_len, GFP_KERNEL); 733 if (!data) { 734 ret = -ENOMEM; 735 goto out; 736 } 737 738 ret = of_property_read_u8_array(node, dt_name, data, data_len); 739 if (ret) { 740 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 741 ret); 742 goto out_free; 743 } 744 745 ret = ath10k_download_board_data(ar, data, data_len); 746 if (ret) { 747 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 748 ret); 749 goto out_free; 750 } 751 752 ret = 0; 753 754 out_free: 755 kfree(data); 756 757 out: 758 return ret; 759 } 760 761 static int ath10k_download_cal_eeprom(struct ath10k *ar) 762 { 763 size_t data_len; 764 void *data = NULL; 765 int ret; 766 767 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len); 768 if (ret) { 769 if (ret != -EOPNOTSUPP) 770 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n", 771 ret); 772 goto out_free; 773 } 774 775 ret = ath10k_download_board_data(ar, data, data_len); 776 if (ret) { 777 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n", 778 ret); 779 goto out_free; 780 } 781 782 ret = 0; 783 784 out_free: 785 kfree(data); 786 787 return ret; 788 } 789 790 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) 791 { 792 u32 result, address; 793 u8 board_id, chip_id; 794 int ret, bmi_board_id_param; 795 796 address = ar->hw_params.patch_load_addr; 797 798 if (!ar->normal_mode_fw.fw_file.otp_data || 799 !ar->normal_mode_fw.fw_file.otp_len) { 800 ath10k_warn(ar, 801 "failed to retrieve board id because of invalid otp\n"); 802 return -ENODATA; 803 } 804 805 ath10k_dbg(ar, ATH10K_DBG_BOOT, 806 "boot upload otp to 0x%x len %zd for board id\n", 807 address, ar->normal_mode_fw.fw_file.otp_len); 808 809 ret = ath10k_bmi_fast_download(ar, address, 810 ar->normal_mode_fw.fw_file.otp_data, 811 ar->normal_mode_fw.fw_file.otp_len); 812 if (ret) { 813 ath10k_err(ar, "could not write otp for board id check: %d\n", 814 ret); 815 return ret; 816 } 817 818 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 819 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 820 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID; 821 else 822 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID; 823 824 ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result); 825 if (ret) { 826 ath10k_err(ar, "could not execute otp for board id check: %d\n", 827 ret); 828 return ret; 829 } 830 831 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); 832 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); 833 834 ath10k_dbg(ar, ATH10K_DBG_BOOT, 835 "boot get otp board id result 0x%08x board_id %d chip_id %d\n", 836 result, board_id, chip_id); 837 838 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 || 839 (board_id == 0)) { 840 ath10k_dbg(ar, ATH10K_DBG_BOOT, 841 "board id does not exist in otp, ignore it\n"); 842 return -EOPNOTSUPP; 843 } 844 845 ar->id.bmi_ids_valid = true; 846 ar->id.bmi_board_id = board_id; 847 ar->id.bmi_chip_id = chip_id; 848 849 return 0; 850 } 851 852 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data) 853 { 854 struct ath10k *ar = data; 855 const char *bdf_ext; 856 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC; 857 u8 bdf_enabled; 858 int i; 859 860 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE) 861 return; 862 863 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) { 864 ath10k_dbg(ar, ATH10K_DBG_BOOT, 865 "wrong smbios bdf ext type length (%d).\n", 866 hdr->length); 867 return; 868 } 869 870 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET); 871 if (!bdf_enabled) { 872 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n"); 873 return; 874 } 875 876 /* Only one string exists (per spec) */ 877 bdf_ext = (char *)hdr + hdr->length; 878 879 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) { 880 ath10k_dbg(ar, ATH10K_DBG_BOOT, 881 "bdf variant magic does not match.\n"); 882 return; 883 } 884 885 for (i = 0; i < strlen(bdf_ext); i++) { 886 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) { 887 ath10k_dbg(ar, ATH10K_DBG_BOOT, 888 "bdf variant name contains non ascii chars.\n"); 889 return; 890 } 891 } 892 893 /* Copy extension name without magic suffix */ 894 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic), 895 sizeof(ar->id.bdf_ext)) < 0) { 896 ath10k_dbg(ar, ATH10K_DBG_BOOT, 897 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 898 bdf_ext); 899 return; 900 } 901 902 ath10k_dbg(ar, ATH10K_DBG_BOOT, 903 "found and validated bdf variant smbios_type 0x%x bdf %s\n", 904 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext); 905 } 906 907 static int ath10k_core_check_smbios(struct ath10k *ar) 908 { 909 ar->id.bdf_ext[0] = '\0'; 910 dmi_walk(ath10k_core_check_bdfext, ar); 911 912 if (ar->id.bdf_ext[0] == '\0') 913 return -ENODATA; 914 915 return 0; 916 } 917 918 static int ath10k_core_check_dt(struct ath10k *ar) 919 { 920 struct device_node *node; 921 const char *variant = NULL; 922 923 node = ar->dev->of_node; 924 if (!node) 925 return -ENOENT; 926 927 of_property_read_string(node, "qcom,ath10k-calibration-variant", 928 &variant); 929 if (!variant) 930 return -ENODATA; 931 932 if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0) 933 ath10k_dbg(ar, ATH10K_DBG_BOOT, 934 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 935 variant); 936 937 return 0; 938 } 939 940 static int ath10k_download_and_run_otp(struct ath10k *ar) 941 { 942 u32 result, address = ar->hw_params.patch_load_addr; 943 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 944 int ret; 945 946 ret = ath10k_download_board_data(ar, 947 ar->running_fw->board_data, 948 ar->running_fw->board_len); 949 if (ret) { 950 ath10k_err(ar, "failed to download board data: %d\n", ret); 951 return ret; 952 } 953 954 /* OTP is optional */ 955 956 if (!ar->running_fw->fw_file.otp_data || 957 !ar->running_fw->fw_file.otp_len) { 958 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n", 959 ar->running_fw->fw_file.otp_data, 960 ar->running_fw->fw_file.otp_len); 961 return 0; 962 } 963 964 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 965 address, ar->running_fw->fw_file.otp_len); 966 967 ret = ath10k_bmi_fast_download(ar, address, 968 ar->running_fw->fw_file.otp_data, 969 ar->running_fw->fw_file.otp_len); 970 if (ret) { 971 ath10k_err(ar, "could not write otp (%d)\n", ret); 972 return ret; 973 } 974 975 /* As of now pre-cal is valid for 10_4 variants */ 976 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 977 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 978 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL; 979 980 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 981 if (ret) { 982 ath10k_err(ar, "could not execute otp (%d)\n", ret); 983 return ret; 984 } 985 986 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 987 988 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 989 ar->running_fw->fw_file.fw_features)) && 990 result != 0) { 991 ath10k_err(ar, "otp calibration failed: %d", result); 992 return -EINVAL; 993 } 994 995 return 0; 996 } 997 998 static int ath10k_download_fw(struct ath10k *ar) 999 { 1000 u32 address, data_len; 1001 const void *data; 1002 int ret; 1003 1004 address = ar->hw_params.patch_load_addr; 1005 1006 data = ar->running_fw->fw_file.firmware_data; 1007 data_len = ar->running_fw->fw_file.firmware_len; 1008 1009 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file); 1010 if (ret) { 1011 ath10k_err(ar, "failed to configure fw code swap: %d\n", 1012 ret); 1013 return ret; 1014 } 1015 1016 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1017 "boot uploading firmware image %pK len %d\n", 1018 data, data_len); 1019 1020 ret = ath10k_bmi_fast_download(ar, address, data, data_len); 1021 if (ret) { 1022 ath10k_err(ar, "failed to download firmware: %d\n", 1023 ret); 1024 return ret; 1025 } 1026 1027 return ret; 1028 } 1029 1030 static void ath10k_core_free_board_files(struct ath10k *ar) 1031 { 1032 if (!IS_ERR(ar->normal_mode_fw.board)) 1033 release_firmware(ar->normal_mode_fw.board); 1034 1035 ar->normal_mode_fw.board = NULL; 1036 ar->normal_mode_fw.board_data = NULL; 1037 ar->normal_mode_fw.board_len = 0; 1038 } 1039 1040 static void ath10k_core_free_firmware_files(struct ath10k *ar) 1041 { 1042 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware)) 1043 release_firmware(ar->normal_mode_fw.fw_file.firmware); 1044 1045 if (!IS_ERR(ar->cal_file)) 1046 release_firmware(ar->cal_file); 1047 1048 if (!IS_ERR(ar->pre_cal_file)) 1049 release_firmware(ar->pre_cal_file); 1050 1051 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file); 1052 1053 ar->normal_mode_fw.fw_file.otp_data = NULL; 1054 ar->normal_mode_fw.fw_file.otp_len = 0; 1055 1056 ar->normal_mode_fw.fw_file.firmware = NULL; 1057 ar->normal_mode_fw.fw_file.firmware_data = NULL; 1058 ar->normal_mode_fw.fw_file.firmware_len = 0; 1059 1060 ar->cal_file = NULL; 1061 ar->pre_cal_file = NULL; 1062 } 1063 1064 static int ath10k_fetch_cal_file(struct ath10k *ar) 1065 { 1066 char filename[100]; 1067 1068 /* pre-cal-<bus>-<id>.bin */ 1069 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin", 1070 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1071 1072 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1073 if (!IS_ERR(ar->pre_cal_file)) 1074 goto success; 1075 1076 /* cal-<bus>-<id>.bin */ 1077 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 1078 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1079 1080 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1081 if (IS_ERR(ar->cal_file)) 1082 /* calibration file is optional, don't print any warnings */ 1083 return PTR_ERR(ar->cal_file); 1084 success: 1085 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 1086 ATH10K_FW_DIR, filename); 1087 1088 return 0; 1089 } 1090 1091 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar) 1092 { 1093 if (!ar->hw_params.fw.board) { 1094 ath10k_err(ar, "failed to find board file fw entry\n"); 1095 return -EINVAL; 1096 } 1097 1098 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1099 ar->hw_params.fw.dir, 1100 ar->hw_params.fw.board); 1101 if (IS_ERR(ar->normal_mode_fw.board)) 1102 return PTR_ERR(ar->normal_mode_fw.board); 1103 1104 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data; 1105 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size; 1106 1107 return 0; 1108 } 1109 1110 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, 1111 const void *buf, size_t buf_len, 1112 const char *boardname) 1113 { 1114 const struct ath10k_fw_ie *hdr; 1115 bool name_match_found; 1116 int ret, board_ie_id; 1117 size_t board_ie_len; 1118 const void *board_ie_data; 1119 1120 name_match_found = false; 1121 1122 /* go through ATH10K_BD_IE_BOARD_ elements */ 1123 while (buf_len > sizeof(struct ath10k_fw_ie)) { 1124 hdr = buf; 1125 board_ie_id = le32_to_cpu(hdr->id); 1126 board_ie_len = le32_to_cpu(hdr->len); 1127 board_ie_data = hdr->data; 1128 1129 buf_len -= sizeof(*hdr); 1130 buf += sizeof(*hdr); 1131 1132 if (buf_len < ALIGN(board_ie_len, 4)) { 1133 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", 1134 buf_len, ALIGN(board_ie_len, 4)); 1135 ret = -EINVAL; 1136 goto out; 1137 } 1138 1139 switch (board_ie_id) { 1140 case ATH10K_BD_IE_BOARD_NAME: 1141 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", 1142 board_ie_data, board_ie_len); 1143 1144 if (board_ie_len != strlen(boardname)) 1145 break; 1146 1147 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 1148 if (ret) 1149 break; 1150 1151 name_match_found = true; 1152 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1153 "boot found match for name '%s'", 1154 boardname); 1155 break; 1156 case ATH10K_BD_IE_BOARD_DATA: 1157 if (!name_match_found) 1158 /* no match found */ 1159 break; 1160 1161 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1162 "boot found board data for '%s'", 1163 boardname); 1164 1165 ar->normal_mode_fw.board_data = board_ie_data; 1166 ar->normal_mode_fw.board_len = board_ie_len; 1167 1168 ret = 0; 1169 goto out; 1170 default: 1171 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", 1172 board_ie_id); 1173 break; 1174 } 1175 1176 /* jump over the padding */ 1177 board_ie_len = ALIGN(board_ie_len, 4); 1178 1179 buf_len -= board_ie_len; 1180 buf += board_ie_len; 1181 } 1182 1183 /* no match found */ 1184 ret = -ENOENT; 1185 1186 out: 1187 return ret; 1188 } 1189 1190 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, 1191 const char *boardname, 1192 const char *filename) 1193 { 1194 size_t len, magic_len, ie_len; 1195 struct ath10k_fw_ie *hdr; 1196 const u8 *data; 1197 int ret, ie_id; 1198 1199 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1200 ar->hw_params.fw.dir, 1201 filename); 1202 if (IS_ERR(ar->normal_mode_fw.board)) 1203 return PTR_ERR(ar->normal_mode_fw.board); 1204 1205 data = ar->normal_mode_fw.board->data; 1206 len = ar->normal_mode_fw.board->size; 1207 1208 /* magic has extra null byte padded */ 1209 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; 1210 if (len < magic_len) { 1211 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", 1212 ar->hw_params.fw.dir, filename, len); 1213 ret = -EINVAL; 1214 goto err; 1215 } 1216 1217 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { 1218 ath10k_err(ar, "found invalid board magic\n"); 1219 ret = -EINVAL; 1220 goto err; 1221 } 1222 1223 /* magic is padded to 4 bytes */ 1224 magic_len = ALIGN(magic_len, 4); 1225 if (len < magic_len) { 1226 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", 1227 ar->hw_params.fw.dir, filename, len); 1228 ret = -EINVAL; 1229 goto err; 1230 } 1231 1232 data += magic_len; 1233 len -= magic_len; 1234 1235 while (len > sizeof(struct ath10k_fw_ie)) { 1236 hdr = (struct ath10k_fw_ie *)data; 1237 ie_id = le32_to_cpu(hdr->id); 1238 ie_len = le32_to_cpu(hdr->len); 1239 1240 len -= sizeof(*hdr); 1241 data = hdr->data; 1242 1243 if (len < ALIGN(ie_len, 4)) { 1244 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", 1245 ie_id, ie_len, len); 1246 ret = -EINVAL; 1247 goto err; 1248 } 1249 1250 switch (ie_id) { 1251 case ATH10K_BD_IE_BOARD: 1252 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1253 boardname); 1254 if (ret == -ENOENT && ar->id.bdf_ext[0] != '\0') { 1255 /* try default bdf if variant was not found */ 1256 char *s, *v = ",variant="; 1257 char boardname2[100]; 1258 1259 strlcpy(boardname2, boardname, 1260 sizeof(boardname2)); 1261 1262 s = strstr(boardname2, v); 1263 if (s) 1264 *s = '\0'; /* strip ",variant=%s" */ 1265 1266 ret = ath10k_core_parse_bd_ie_board(ar, data, 1267 ie_len, 1268 boardname2); 1269 } 1270 1271 if (ret == -ENOENT) 1272 /* no match found, continue */ 1273 break; 1274 else if (ret) 1275 /* there was an error, bail out */ 1276 goto err; 1277 1278 /* board data found */ 1279 goto out; 1280 } 1281 1282 /* jump over the padding */ 1283 ie_len = ALIGN(ie_len, 4); 1284 1285 len -= ie_len; 1286 data += ie_len; 1287 } 1288 1289 out: 1290 if (!ar->normal_mode_fw.board_data || !ar->normal_mode_fw.board_len) { 1291 ath10k_err(ar, 1292 "failed to fetch board data for %s from %s/%s\n", 1293 boardname, ar->hw_params.fw.dir, filename); 1294 ret = -ENODATA; 1295 goto err; 1296 } 1297 1298 return 0; 1299 1300 err: 1301 ath10k_core_free_board_files(ar); 1302 return ret; 1303 } 1304 1305 static int ath10k_core_create_board_name(struct ath10k *ar, char *name, 1306 size_t name_len) 1307 { 1308 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */ 1309 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 }; 1310 1311 if (ar->id.bdf_ext[0] != '\0') 1312 scnprintf(variant, sizeof(variant), ",variant=%s", 1313 ar->id.bdf_ext); 1314 1315 if (ar->id.bmi_ids_valid) { 1316 scnprintf(name, name_len, 1317 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s", 1318 ath10k_bus_str(ar->hif.bus), 1319 ar->id.bmi_chip_id, 1320 ar->id.bmi_board_id, variant); 1321 goto out; 1322 } 1323 1324 scnprintf(name, name_len, 1325 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s", 1326 ath10k_bus_str(ar->hif.bus), 1327 ar->id.vendor, ar->id.device, 1328 ar->id.subsystem_vendor, ar->id.subsystem_device, variant); 1329 out: 1330 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); 1331 1332 return 0; 1333 } 1334 1335 static int ath10k_core_fetch_board_file(struct ath10k *ar) 1336 { 1337 char boardname[100]; 1338 int ret; 1339 1340 ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname)); 1341 if (ret) { 1342 ath10k_err(ar, "failed to create board name: %d", ret); 1343 return ret; 1344 } 1345 1346 ar->bd_api = 2; 1347 ret = ath10k_core_fetch_board_data_api_n(ar, boardname, 1348 ATH10K_BOARD_API2_FILE); 1349 if (!ret) 1350 goto success; 1351 1352 ar->bd_api = 1; 1353 ret = ath10k_core_fetch_board_data_api_1(ar); 1354 if (ret) { 1355 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n", 1356 ar->hw_params.fw.dir); 1357 return ret; 1358 } 1359 1360 success: 1361 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); 1362 return 0; 1363 } 1364 1365 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1366 struct ath10k_fw_file *fw_file) 1367 { 1368 size_t magic_len, len, ie_len; 1369 int ie_id, i, index, bit, ret; 1370 struct ath10k_fw_ie *hdr; 1371 const u8 *data; 1372 __le32 *timestamp, *version; 1373 1374 /* first fetch the firmware file (firmware-*.bin) */ 1375 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1376 name); 1377 if (IS_ERR(fw_file->firmware)) 1378 return PTR_ERR(fw_file->firmware); 1379 1380 data = fw_file->firmware->data; 1381 len = fw_file->firmware->size; 1382 1383 /* magic also includes the null byte, check that as well */ 1384 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 1385 1386 if (len < magic_len) { 1387 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 1388 ar->hw_params.fw.dir, name, len); 1389 ret = -EINVAL; 1390 goto err; 1391 } 1392 1393 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 1394 ath10k_err(ar, "invalid firmware magic\n"); 1395 ret = -EINVAL; 1396 goto err; 1397 } 1398 1399 /* jump over the padding */ 1400 magic_len = ALIGN(magic_len, 4); 1401 1402 len -= magic_len; 1403 data += magic_len; 1404 1405 /* loop elements */ 1406 while (len > sizeof(struct ath10k_fw_ie)) { 1407 hdr = (struct ath10k_fw_ie *)data; 1408 1409 ie_id = le32_to_cpu(hdr->id); 1410 ie_len = le32_to_cpu(hdr->len); 1411 1412 len -= sizeof(*hdr); 1413 data += sizeof(*hdr); 1414 1415 if (len < ie_len) { 1416 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 1417 ie_id, len, ie_len); 1418 ret = -EINVAL; 1419 goto err; 1420 } 1421 1422 switch (ie_id) { 1423 case ATH10K_FW_IE_FW_VERSION: 1424 if (ie_len > sizeof(fw_file->fw_version) - 1) 1425 break; 1426 1427 memcpy(fw_file->fw_version, data, ie_len); 1428 fw_file->fw_version[ie_len] = '\0'; 1429 1430 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1431 "found fw version %s\n", 1432 fw_file->fw_version); 1433 break; 1434 case ATH10K_FW_IE_TIMESTAMP: 1435 if (ie_len != sizeof(u32)) 1436 break; 1437 1438 timestamp = (__le32 *)data; 1439 1440 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 1441 le32_to_cpup(timestamp)); 1442 break; 1443 case ATH10K_FW_IE_FEATURES: 1444 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1445 "found firmware features ie (%zd B)\n", 1446 ie_len); 1447 1448 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 1449 index = i / 8; 1450 bit = i % 8; 1451 1452 if (index == ie_len) 1453 break; 1454 1455 if (data[index] & (1 << bit)) { 1456 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1457 "Enabling feature bit: %i\n", 1458 i); 1459 __set_bit(i, fw_file->fw_features); 1460 } 1461 } 1462 1463 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 1464 fw_file->fw_features, 1465 sizeof(fw_file->fw_features)); 1466 break; 1467 case ATH10K_FW_IE_FW_IMAGE: 1468 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1469 "found fw image ie (%zd B)\n", 1470 ie_len); 1471 1472 fw_file->firmware_data = data; 1473 fw_file->firmware_len = ie_len; 1474 1475 break; 1476 case ATH10K_FW_IE_OTP_IMAGE: 1477 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1478 "found otp image ie (%zd B)\n", 1479 ie_len); 1480 1481 fw_file->otp_data = data; 1482 fw_file->otp_len = ie_len; 1483 1484 break; 1485 case ATH10K_FW_IE_WMI_OP_VERSION: 1486 if (ie_len != sizeof(u32)) 1487 break; 1488 1489 version = (__le32 *)data; 1490 1491 fw_file->wmi_op_version = le32_to_cpup(version); 1492 1493 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 1494 fw_file->wmi_op_version); 1495 break; 1496 case ATH10K_FW_IE_HTT_OP_VERSION: 1497 if (ie_len != sizeof(u32)) 1498 break; 1499 1500 version = (__le32 *)data; 1501 1502 fw_file->htt_op_version = le32_to_cpup(version); 1503 1504 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 1505 fw_file->htt_op_version); 1506 break; 1507 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 1508 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1509 "found fw code swap image ie (%zd B)\n", 1510 ie_len); 1511 fw_file->codeswap_data = data; 1512 fw_file->codeswap_len = ie_len; 1513 break; 1514 default: 1515 ath10k_warn(ar, "Unknown FW IE: %u\n", 1516 le32_to_cpu(hdr->id)); 1517 break; 1518 } 1519 1520 /* jump over the padding */ 1521 ie_len = ALIGN(ie_len, 4); 1522 1523 len -= ie_len; 1524 data += ie_len; 1525 } 1526 1527 if (!fw_file->firmware_data || 1528 !fw_file->firmware_len) { 1529 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 1530 ar->hw_params.fw.dir, name); 1531 ret = -ENOMEDIUM; 1532 goto err; 1533 } 1534 1535 return 0; 1536 1537 err: 1538 ath10k_core_free_firmware_files(ar); 1539 return ret; 1540 } 1541 1542 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name, 1543 size_t fw_name_len, int fw_api) 1544 { 1545 switch (ar->hif.bus) { 1546 case ATH10K_BUS_SDIO: 1547 case ATH10K_BUS_USB: 1548 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin", 1549 ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus), 1550 fw_api); 1551 break; 1552 case ATH10K_BUS_PCI: 1553 case ATH10K_BUS_AHB: 1554 scnprintf(fw_name, fw_name_len, "%s-%d.bin", 1555 ATH10K_FW_FILE_BASE, fw_api); 1556 break; 1557 } 1558 } 1559 1560 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 1561 { 1562 int ret, i; 1563 char fw_name[100]; 1564 1565 /* calibration file is optional, don't check for any errors */ 1566 ath10k_fetch_cal_file(ar); 1567 1568 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) { 1569 ar->fw_api = i; 1570 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", 1571 ar->fw_api); 1572 1573 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api); 1574 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name, 1575 &ar->normal_mode_fw.fw_file); 1576 if (!ret) 1577 goto success; 1578 } 1579 1580 /* we end up here if we couldn't fetch any firmware */ 1581 1582 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d", 1583 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir, 1584 ret); 1585 1586 return ret; 1587 1588 success: 1589 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1590 1591 return 0; 1592 } 1593 1594 static int ath10k_core_pre_cal_download(struct ath10k *ar) 1595 { 1596 int ret; 1597 1598 ret = ath10k_download_cal_file(ar, ar->pre_cal_file); 1599 if (ret == 0) { 1600 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE; 1601 goto success; 1602 } 1603 1604 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1605 "boot did not find a pre calibration file, try DT next: %d\n", 1606 ret); 1607 1608 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data"); 1609 if (ret) { 1610 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1611 "unable to load pre cal data from DT: %d\n", ret); 1612 return ret; 1613 } 1614 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT; 1615 1616 success: 1617 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1618 ath10k_cal_mode_str(ar->cal_mode)); 1619 1620 return 0; 1621 } 1622 1623 static int ath10k_core_pre_cal_config(struct ath10k *ar) 1624 { 1625 int ret; 1626 1627 ret = ath10k_core_pre_cal_download(ar); 1628 if (ret) { 1629 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1630 "failed to load pre cal data: %d\n", ret); 1631 return ret; 1632 } 1633 1634 ret = ath10k_core_get_board_id_from_otp(ar); 1635 if (ret) { 1636 ath10k_err(ar, "failed to get board id: %d\n", ret); 1637 return ret; 1638 } 1639 1640 ret = ath10k_download_and_run_otp(ar); 1641 if (ret) { 1642 ath10k_err(ar, "failed to run otp: %d\n", ret); 1643 return ret; 1644 } 1645 1646 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1647 "pre cal configuration done successfully\n"); 1648 1649 return 0; 1650 } 1651 1652 static int ath10k_download_cal_data(struct ath10k *ar) 1653 { 1654 int ret; 1655 1656 ret = ath10k_core_pre_cal_config(ar); 1657 if (ret == 0) 1658 return 0; 1659 1660 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1661 "pre cal download procedure failed, try cal file: %d\n", 1662 ret); 1663 1664 ret = ath10k_download_cal_file(ar, ar->cal_file); 1665 if (ret == 0) { 1666 ar->cal_mode = ATH10K_CAL_MODE_FILE; 1667 goto done; 1668 } 1669 1670 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1671 "boot did not find a calibration file, try DT next: %d\n", 1672 ret); 1673 1674 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data"); 1675 if (ret == 0) { 1676 ar->cal_mode = ATH10K_CAL_MODE_DT; 1677 goto done; 1678 } 1679 1680 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1681 "boot did not find DT entry, try target EEPROM next: %d\n", 1682 ret); 1683 1684 ret = ath10k_download_cal_eeprom(ar); 1685 if (ret == 0) { 1686 ar->cal_mode = ATH10K_CAL_MODE_EEPROM; 1687 goto done; 1688 } 1689 1690 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1691 "boot did not find target EEPROM entry, try OTP next: %d\n", 1692 ret); 1693 1694 ret = ath10k_download_and_run_otp(ar); 1695 if (ret) { 1696 ath10k_err(ar, "failed to run otp: %d\n", ret); 1697 return ret; 1698 } 1699 1700 ar->cal_mode = ATH10K_CAL_MODE_OTP; 1701 1702 done: 1703 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1704 ath10k_cal_mode_str(ar->cal_mode)); 1705 return 0; 1706 } 1707 1708 static int ath10k_init_uart(struct ath10k *ar) 1709 { 1710 int ret; 1711 1712 /* 1713 * Explicitly setting UART prints to zero as target turns it on 1714 * based on scratch registers. 1715 */ 1716 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 1717 if (ret) { 1718 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 1719 return ret; 1720 } 1721 1722 if (!uart_print) 1723 return 0; 1724 1725 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 1726 if (ret) { 1727 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1728 return ret; 1729 } 1730 1731 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 1732 if (ret) { 1733 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1734 return ret; 1735 } 1736 1737 /* Set the UART baud rate to 19200. */ 1738 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 1739 if (ret) { 1740 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 1741 return ret; 1742 } 1743 1744 ath10k_info(ar, "UART prints enabled\n"); 1745 return 0; 1746 } 1747 1748 static int ath10k_init_hw_params(struct ath10k *ar) 1749 { 1750 const struct ath10k_hw_params *uninitialized_var(hw_params); 1751 int i; 1752 1753 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 1754 hw_params = &ath10k_hw_params_list[i]; 1755 1756 if (hw_params->id == ar->target_version && 1757 hw_params->dev_id == ar->dev_id) 1758 break; 1759 } 1760 1761 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 1762 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 1763 ar->target_version); 1764 return -EINVAL; 1765 } 1766 1767 ar->hw_params = *hw_params; 1768 1769 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 1770 ar->hw_params.name, ar->target_version); 1771 1772 return 0; 1773 } 1774 1775 static void ath10k_core_restart(struct work_struct *work) 1776 { 1777 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 1778 int ret; 1779 1780 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1781 1782 /* Place a barrier to make sure the compiler doesn't reorder 1783 * CRASH_FLUSH and calling other functions. 1784 */ 1785 barrier(); 1786 1787 ieee80211_stop_queues(ar->hw); 1788 ath10k_drain_tx(ar); 1789 complete(&ar->scan.started); 1790 complete(&ar->scan.completed); 1791 complete(&ar->scan.on_channel); 1792 complete(&ar->offchan_tx_completed); 1793 complete(&ar->install_key_done); 1794 complete(&ar->vdev_setup_done); 1795 complete(&ar->thermal.wmi_sync); 1796 complete(&ar->bss_survey_done); 1797 wake_up(&ar->htt.empty_tx_wq); 1798 wake_up(&ar->wmi.tx_credits_wq); 1799 wake_up(&ar->peer_mapping_wq); 1800 1801 /* TODO: We can have one instance of cancelling coverage_class_work by 1802 * moving it to ath10k_halt(), so that both stop() and restart() would 1803 * call that but it takes conf_mutex() and if we call cancel_work_sync() 1804 * with conf_mutex it will deadlock. 1805 */ 1806 cancel_work_sync(&ar->set_coverage_class_work); 1807 1808 mutex_lock(&ar->conf_mutex); 1809 1810 switch (ar->state) { 1811 case ATH10K_STATE_ON: 1812 ar->state = ATH10K_STATE_RESTARTING; 1813 ath10k_halt(ar); 1814 ath10k_scan_finish(ar); 1815 ieee80211_restart_hw(ar->hw); 1816 break; 1817 case ATH10K_STATE_OFF: 1818 /* this can happen if driver is being unloaded 1819 * or if the crash happens during FW probing 1820 */ 1821 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 1822 break; 1823 case ATH10K_STATE_RESTARTING: 1824 /* hw restart might be requested from multiple places */ 1825 break; 1826 case ATH10K_STATE_RESTARTED: 1827 ar->state = ATH10K_STATE_WEDGED; 1828 /* fall through */ 1829 case ATH10K_STATE_WEDGED: 1830 ath10k_warn(ar, "device is wedged, will not restart\n"); 1831 break; 1832 case ATH10K_STATE_UTF: 1833 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 1834 break; 1835 } 1836 1837 mutex_unlock(&ar->conf_mutex); 1838 1839 ret = ath10k_debug_fw_devcoredump(ar); 1840 if (ret) 1841 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d", 1842 ret); 1843 } 1844 1845 static void ath10k_core_set_coverage_class_work(struct work_struct *work) 1846 { 1847 struct ath10k *ar = container_of(work, struct ath10k, 1848 set_coverage_class_work); 1849 1850 if (ar->hw_params.hw_ops->set_coverage_class) 1851 ar->hw_params.hw_ops->set_coverage_class(ar, -1); 1852 } 1853 1854 static int ath10k_core_init_firmware_features(struct ath10k *ar) 1855 { 1856 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 1857 1858 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) && 1859 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 1860 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 1861 return -EINVAL; 1862 } 1863 1864 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 1865 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 1866 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version); 1867 return -EINVAL; 1868 } 1869 1870 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 1871 switch (ath10k_cryptmode_param) { 1872 case ATH10K_CRYPT_MODE_HW: 1873 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1874 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1875 break; 1876 case ATH10K_CRYPT_MODE_SW: 1877 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1878 fw_file->fw_features)) { 1879 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 1880 return -EINVAL; 1881 } 1882 1883 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1884 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1885 break; 1886 default: 1887 ath10k_info(ar, "invalid cryptmode: %d\n", 1888 ath10k_cryptmode_param); 1889 return -EINVAL; 1890 } 1891 1892 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 1893 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 1894 1895 if (rawmode) { 1896 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1897 fw_file->fw_features)) { 1898 ath10k_err(ar, "rawmode = 1 requires support from firmware"); 1899 return -EINVAL; 1900 } 1901 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1902 } 1903 1904 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 1905 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 1906 1907 /* Workaround: 1908 * 1909 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 1910 * and causes enormous performance issues (malformed frames, 1911 * etc). 1912 * 1913 * Disabling A-MSDU makes RAW mode stable with heavy traffic 1914 * albeit a bit slower compared to regular operation. 1915 */ 1916 ar->htt.max_num_amsdu = 1; 1917 } 1918 1919 /* Backwards compatibility for firmwares without 1920 * ATH10K_FW_IE_WMI_OP_VERSION. 1921 */ 1922 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 1923 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 1924 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 1925 fw_file->fw_features)) 1926 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 1927 else 1928 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 1929 } else { 1930 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 1931 } 1932 } 1933 1934 switch (fw_file->wmi_op_version) { 1935 case ATH10K_FW_WMI_OP_VERSION_MAIN: 1936 ar->max_num_peers = TARGET_NUM_PEERS; 1937 ar->max_num_stations = TARGET_NUM_STATIONS; 1938 ar->max_num_vdevs = TARGET_NUM_VDEVS; 1939 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 1940 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1941 WMI_STAT_PEER; 1942 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1943 break; 1944 case ATH10K_FW_WMI_OP_VERSION_10_1: 1945 case ATH10K_FW_WMI_OP_VERSION_10_2: 1946 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 1947 if (ath10k_peer_stats_enabled(ar)) { 1948 ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS; 1949 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS; 1950 } else { 1951 ar->max_num_peers = TARGET_10X_NUM_PEERS; 1952 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 1953 } 1954 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 1955 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 1956 ar->fw_stats_req_mask = WMI_STAT_PEER; 1957 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1958 break; 1959 case ATH10K_FW_WMI_OP_VERSION_TLV: 1960 ar->max_num_peers = TARGET_TLV_NUM_PEERS; 1961 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 1962 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 1963 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 1964 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 1965 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 1966 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1967 WMI_STAT_PEER; 1968 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1969 break; 1970 case ATH10K_FW_WMI_OP_VERSION_10_4: 1971 ar->max_num_peers = TARGET_10_4_NUM_PEERS; 1972 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 1973 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 1974 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 1975 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 1976 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER | 1977 WMI_10_4_STAT_PEER_EXTD; 1978 ar->max_spatial_stream = ar->hw_params.max_spatial_stream; 1979 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS; 1980 1981 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, 1982 fw_file->fw_features)) 1983 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC; 1984 else 1985 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 1986 break; 1987 case ATH10K_FW_WMI_OP_VERSION_UNSET: 1988 case ATH10K_FW_WMI_OP_VERSION_MAX: 1989 WARN_ON(1); 1990 return -EINVAL; 1991 } 1992 1993 /* Backwards compatibility for firmwares without 1994 * ATH10K_FW_IE_HTT_OP_VERSION. 1995 */ 1996 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 1997 switch (fw_file->wmi_op_version) { 1998 case ATH10K_FW_WMI_OP_VERSION_MAIN: 1999 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 2000 break; 2001 case ATH10K_FW_WMI_OP_VERSION_10_1: 2002 case ATH10K_FW_WMI_OP_VERSION_10_2: 2003 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2004 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 2005 break; 2006 case ATH10K_FW_WMI_OP_VERSION_TLV: 2007 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 2008 break; 2009 case ATH10K_FW_WMI_OP_VERSION_10_4: 2010 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2011 case ATH10K_FW_WMI_OP_VERSION_MAX: 2012 ath10k_err(ar, "htt op version not found from fw meta data"); 2013 return -EINVAL; 2014 } 2015 } 2016 2017 return 0; 2018 } 2019 2020 static int ath10k_core_reset_rx_filter(struct ath10k *ar) 2021 { 2022 int ret; 2023 int vdev_id; 2024 int vdev_type; 2025 int vdev_subtype; 2026 const u8 *vdev_addr; 2027 2028 vdev_id = 0; 2029 vdev_type = WMI_VDEV_TYPE_STA; 2030 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE); 2031 vdev_addr = ar->mac_addr; 2032 2033 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype, 2034 vdev_addr); 2035 if (ret) { 2036 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret); 2037 return ret; 2038 } 2039 2040 ret = ath10k_wmi_vdev_delete(ar, vdev_id); 2041 if (ret) { 2042 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret); 2043 return ret; 2044 } 2045 2046 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be 2047 * serialized properly implicitly. 2048 * 2049 * Moreover (most) WMI commands have no explicit acknowledges. It is 2050 * possible to infer it implicitly by poking firmware with echo 2051 * command - getting a reply means all preceding comments have been 2052 * (mostly) processed. 2053 * 2054 * In case of vdev create/delete this is sufficient. 2055 * 2056 * Without this it's possible to end up with a race when HTT Rx ring is 2057 * started before vdev create/delete hack is complete allowing a short 2058 * window of opportunity to receive (and Tx ACK) a bunch of frames. 2059 */ 2060 ret = ath10k_wmi_barrier(ar); 2061 if (ret) { 2062 ath10k_err(ar, "failed to ping firmware: %d\n", ret); 2063 return ret; 2064 } 2065 2066 return 0; 2067 } 2068 2069 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 2070 const struct ath10k_fw_components *fw) 2071 { 2072 int status; 2073 u32 val; 2074 2075 lockdep_assert_held(&ar->conf_mutex); 2076 2077 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2078 2079 ar->running_fw = fw; 2080 2081 ath10k_bmi_start(ar); 2082 2083 if (ath10k_init_configure_target(ar)) { 2084 status = -EINVAL; 2085 goto err; 2086 } 2087 2088 status = ath10k_download_cal_data(ar); 2089 if (status) 2090 goto err; 2091 2092 /* Some of of qca988x solutions are having global reset issue 2093 * during target initialization. Bypassing PLL setting before 2094 * downloading firmware and letting the SoC run on REF_CLK is 2095 * fixing the problem. Corresponding firmware change is also needed 2096 * to set the clock source once the target is initialized. 2097 */ 2098 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 2099 ar->running_fw->fw_file.fw_features)) { 2100 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 2101 if (status) { 2102 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 2103 status); 2104 goto err; 2105 } 2106 } 2107 2108 status = ath10k_download_fw(ar); 2109 if (status) 2110 goto err; 2111 2112 status = ath10k_init_uart(ar); 2113 if (status) 2114 goto err; 2115 2116 if (ar->hif.bus == ATH10K_BUS_SDIO) 2117 ath10k_init_sdio(ar); 2118 2119 ar->htc.htc_ops.target_send_suspend_complete = 2120 ath10k_send_suspend_complete; 2121 2122 status = ath10k_htc_init(ar); 2123 if (status) { 2124 ath10k_err(ar, "could not init HTC (%d)\n", status); 2125 goto err; 2126 } 2127 2128 status = ath10k_bmi_done(ar); 2129 if (status) 2130 goto err; 2131 2132 status = ath10k_wmi_attach(ar); 2133 if (status) { 2134 ath10k_err(ar, "WMI attach failed: %d\n", status); 2135 goto err; 2136 } 2137 2138 status = ath10k_htt_init(ar); 2139 if (status) { 2140 ath10k_err(ar, "failed to init htt: %d\n", status); 2141 goto err_wmi_detach; 2142 } 2143 2144 status = ath10k_htt_tx_start(&ar->htt); 2145 if (status) { 2146 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 2147 goto err_wmi_detach; 2148 } 2149 2150 /* If firmware indicates Full Rx Reorder support it must be used in a 2151 * slightly different manner. Let HTT code know. 2152 */ 2153 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 2154 ar->wmi.svc_map)); 2155 2156 status = ath10k_htt_rx_alloc(&ar->htt); 2157 if (status) { 2158 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 2159 goto err_htt_tx_detach; 2160 } 2161 2162 status = ath10k_hif_start(ar); 2163 if (status) { 2164 ath10k_err(ar, "could not start HIF: %d\n", status); 2165 goto err_htt_rx_detach; 2166 } 2167 2168 status = ath10k_htc_wait_target(&ar->htc); 2169 if (status) { 2170 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 2171 goto err_hif_stop; 2172 } 2173 2174 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2175 status = ath10k_htt_connect(&ar->htt); 2176 if (status) { 2177 ath10k_err(ar, "failed to connect htt (%d)\n", status); 2178 goto err_hif_stop; 2179 } 2180 } 2181 2182 status = ath10k_wmi_connect(ar); 2183 if (status) { 2184 ath10k_err(ar, "could not connect wmi: %d\n", status); 2185 goto err_hif_stop; 2186 } 2187 2188 status = ath10k_htc_start(&ar->htc); 2189 if (status) { 2190 ath10k_err(ar, "failed to start htc: %d\n", status); 2191 goto err_hif_stop; 2192 } 2193 2194 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2195 status = ath10k_wmi_wait_for_service_ready(ar); 2196 if (status) { 2197 ath10k_warn(ar, "wmi service ready event not received"); 2198 goto err_hif_stop; 2199 } 2200 } 2201 2202 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 2203 ar->hw->wiphy->fw_version); 2204 2205 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) && 2206 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2207 val = 0; 2208 if (ath10k_peer_stats_enabled(ar)) 2209 val = WMI_10_4_PEER_STATS; 2210 2211 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) 2212 val |= WMI_10_4_BSS_CHANNEL_INFO_64; 2213 2214 /* 10.4 firmware supports BT-Coex without reloading firmware 2215 * via pdev param. To support Bluetooth coexistence pdev param, 2216 * WMI_COEX_GPIO_SUPPORT of extended resource config should be 2217 * enabled always. 2218 */ 2219 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 2220 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 2221 ar->running_fw->fw_file.fw_features)) 2222 val |= WMI_10_4_COEX_GPIO_SUPPORT; 2223 2224 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, 2225 ar->wmi.svc_map)) 2226 val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY; 2227 2228 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, 2229 ar->wmi.svc_map)) 2230 val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA; 2231 2232 status = ath10k_mac_ext_resource_config(ar, val); 2233 if (status) { 2234 ath10k_err(ar, 2235 "failed to send ext resource cfg command : %d\n", 2236 status); 2237 goto err_hif_stop; 2238 } 2239 } 2240 2241 status = ath10k_wmi_cmd_init(ar); 2242 if (status) { 2243 ath10k_err(ar, "could not send WMI init command (%d)\n", 2244 status); 2245 goto err_hif_stop; 2246 } 2247 2248 status = ath10k_wmi_wait_for_unified_ready(ar); 2249 if (status) { 2250 ath10k_err(ar, "wmi unified ready event not received\n"); 2251 goto err_hif_stop; 2252 } 2253 2254 /* Some firmware revisions do not properly set up hardware rx filter 2255 * registers. 2256 * 2257 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK 2258 * is filled with 0s instead of 1s allowing HW to respond with ACKs to 2259 * any frames that matches MAC_PCU_RX_FILTER which is also 2260 * misconfigured to accept anything. 2261 * 2262 * The ADDR1 is programmed using internal firmware structure field and 2263 * can't be (easily/sanely) reached from the driver explicitly. It is 2264 * possible to implicitly make it correct by creating a dummy vdev and 2265 * then deleting it. 2266 */ 2267 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2268 status = ath10k_core_reset_rx_filter(ar); 2269 if (status) { 2270 ath10k_err(ar, 2271 "failed to reset rx filter: %d\n", status); 2272 goto err_hif_stop; 2273 } 2274 } 2275 2276 status = ath10k_htt_rx_ring_refill(ar); 2277 if (status) { 2278 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 2279 goto err_hif_stop; 2280 } 2281 2282 if (ar->max_num_vdevs >= 64) 2283 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL; 2284 else 2285 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 2286 2287 INIT_LIST_HEAD(&ar->arvifs); 2288 2289 /* we don't care about HTT in UTF mode */ 2290 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2291 status = ath10k_htt_setup(&ar->htt); 2292 if (status) { 2293 ath10k_err(ar, "failed to setup htt: %d\n", status); 2294 goto err_hif_stop; 2295 } 2296 } 2297 2298 status = ath10k_debug_start(ar); 2299 if (status) 2300 goto err_hif_stop; 2301 2302 return 0; 2303 2304 err_hif_stop: 2305 ath10k_hif_stop(ar); 2306 err_htt_rx_detach: 2307 ath10k_htt_rx_free(&ar->htt); 2308 err_htt_tx_detach: 2309 ath10k_htt_tx_free(&ar->htt); 2310 err_wmi_detach: 2311 ath10k_wmi_detach(ar); 2312 err: 2313 return status; 2314 } 2315 EXPORT_SYMBOL(ath10k_core_start); 2316 2317 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 2318 { 2319 int ret; 2320 unsigned long time_left; 2321 2322 reinit_completion(&ar->target_suspend); 2323 2324 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 2325 if (ret) { 2326 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 2327 return ret; 2328 } 2329 2330 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 2331 2332 if (!time_left) { 2333 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 2334 return -ETIMEDOUT; 2335 } 2336 2337 return 0; 2338 } 2339 2340 void ath10k_core_stop(struct ath10k *ar) 2341 { 2342 lockdep_assert_held(&ar->conf_mutex); 2343 ath10k_debug_stop(ar); 2344 2345 /* try to suspend target */ 2346 if (ar->state != ATH10K_STATE_RESTARTING && 2347 ar->state != ATH10K_STATE_UTF) 2348 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 2349 2350 ath10k_hif_stop(ar); 2351 ath10k_htt_tx_stop(&ar->htt); 2352 ath10k_htt_rx_free(&ar->htt); 2353 ath10k_wmi_detach(ar); 2354 } 2355 EXPORT_SYMBOL(ath10k_core_stop); 2356 2357 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 2358 * order to know what hw capabilities should be advertised to mac80211 it is 2359 * necessary to load the firmware (and tear it down immediately since start 2360 * hook will try to init it again) before registering 2361 */ 2362 static int ath10k_core_probe_fw(struct ath10k *ar) 2363 { 2364 struct bmi_target_info target_info; 2365 int ret = 0; 2366 2367 ret = ath10k_hif_power_up(ar); 2368 if (ret) { 2369 ath10k_err(ar, "could not start pci hif (%d)\n", ret); 2370 return ret; 2371 } 2372 2373 memset(&target_info, 0, sizeof(target_info)); 2374 if (ar->hif.bus == ATH10K_BUS_SDIO) 2375 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info); 2376 else 2377 ret = ath10k_bmi_get_target_info(ar, &target_info); 2378 if (ret) { 2379 ath10k_err(ar, "could not get target info (%d)\n", ret); 2380 goto err_power_down; 2381 } 2382 2383 ar->target_version = target_info.version; 2384 ar->hw->wiphy->hw_version = target_info.version; 2385 2386 ret = ath10k_init_hw_params(ar); 2387 if (ret) { 2388 ath10k_err(ar, "could not get hw params (%d)\n", ret); 2389 goto err_power_down; 2390 } 2391 2392 ret = ath10k_core_fetch_firmware_files(ar); 2393 if (ret) { 2394 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 2395 goto err_power_down; 2396 } 2397 2398 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) != 2399 sizeof(ar->normal_mode_fw.fw_file.fw_version)); 2400 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version, 2401 sizeof(ar->hw->wiphy->fw_version)); 2402 2403 ath10k_debug_print_hwfw_info(ar); 2404 2405 ret = ath10k_core_pre_cal_download(ar); 2406 if (ret) { 2407 /* pre calibration data download is not necessary 2408 * for all the chipsets. Ignore failures and continue. 2409 */ 2410 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2411 "could not load pre cal data: %d\n", ret); 2412 } 2413 2414 ret = ath10k_core_get_board_id_from_otp(ar); 2415 if (ret && ret != -EOPNOTSUPP) { 2416 ath10k_err(ar, "failed to get board id from otp: %d\n", 2417 ret); 2418 goto err_free_firmware_files; 2419 } 2420 2421 ret = ath10k_core_check_smbios(ar); 2422 if (ret) 2423 ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n"); 2424 2425 ret = ath10k_core_check_dt(ar); 2426 if (ret) 2427 ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n"); 2428 2429 ret = ath10k_core_fetch_board_file(ar); 2430 if (ret) { 2431 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 2432 goto err_free_firmware_files; 2433 } 2434 2435 ath10k_debug_print_board_info(ar); 2436 2437 ret = ath10k_core_init_firmware_features(ar); 2438 if (ret) { 2439 ath10k_err(ar, "fatal problem with firmware features: %d\n", 2440 ret); 2441 goto err_free_firmware_files; 2442 } 2443 2444 ret = ath10k_swap_code_seg_init(ar, &ar->normal_mode_fw.fw_file); 2445 if (ret) { 2446 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 2447 ret); 2448 goto err_free_firmware_files; 2449 } 2450 2451 mutex_lock(&ar->conf_mutex); 2452 2453 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL, 2454 &ar->normal_mode_fw); 2455 if (ret) { 2456 ath10k_err(ar, "could not init core (%d)\n", ret); 2457 goto err_unlock; 2458 } 2459 2460 ath10k_debug_print_boot_info(ar); 2461 ath10k_core_stop(ar); 2462 2463 mutex_unlock(&ar->conf_mutex); 2464 2465 ath10k_hif_power_down(ar); 2466 return 0; 2467 2468 err_unlock: 2469 mutex_unlock(&ar->conf_mutex); 2470 2471 err_free_firmware_files: 2472 ath10k_core_free_firmware_files(ar); 2473 2474 err_power_down: 2475 ath10k_hif_power_down(ar); 2476 2477 return ret; 2478 } 2479 2480 static void ath10k_core_register_work(struct work_struct *work) 2481 { 2482 struct ath10k *ar = container_of(work, struct ath10k, register_work); 2483 int status; 2484 2485 /* peer stats are enabled by default */ 2486 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags); 2487 2488 status = ath10k_core_probe_fw(ar); 2489 if (status) { 2490 ath10k_err(ar, "could not probe fw (%d)\n", status); 2491 goto err; 2492 } 2493 2494 status = ath10k_mac_register(ar); 2495 if (status) { 2496 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 2497 goto err_release_fw; 2498 } 2499 2500 status = ath10k_debug_register(ar); 2501 if (status) { 2502 ath10k_err(ar, "unable to initialize debugfs\n"); 2503 goto err_unregister_mac; 2504 } 2505 2506 status = ath10k_spectral_create(ar); 2507 if (status) { 2508 ath10k_err(ar, "failed to initialize spectral\n"); 2509 goto err_debug_destroy; 2510 } 2511 2512 status = ath10k_thermal_register(ar); 2513 if (status) { 2514 ath10k_err(ar, "could not register thermal device: %d\n", 2515 status); 2516 goto err_spectral_destroy; 2517 } 2518 2519 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 2520 return; 2521 2522 err_spectral_destroy: 2523 ath10k_spectral_destroy(ar); 2524 err_debug_destroy: 2525 ath10k_debug_destroy(ar); 2526 err_unregister_mac: 2527 ath10k_mac_unregister(ar); 2528 err_release_fw: 2529 ath10k_core_free_firmware_files(ar); 2530 err: 2531 /* TODO: It's probably a good idea to release device from the driver 2532 * but calling device_release_driver() here will cause a deadlock. 2533 */ 2534 return; 2535 } 2536 2537 int ath10k_core_register(struct ath10k *ar, u32 chip_id) 2538 { 2539 ar->chip_id = chip_id; 2540 queue_work(ar->workqueue, &ar->register_work); 2541 2542 return 0; 2543 } 2544 EXPORT_SYMBOL(ath10k_core_register); 2545 2546 void ath10k_core_unregister(struct ath10k *ar) 2547 { 2548 cancel_work_sync(&ar->register_work); 2549 2550 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 2551 return; 2552 2553 ath10k_thermal_unregister(ar); 2554 /* Stop spectral before unregistering from mac80211 to remove the 2555 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 2556 * would be already be free'd recursively, leading to a double free. 2557 */ 2558 ath10k_spectral_destroy(ar); 2559 2560 /* We must unregister from mac80211 before we stop HTC and HIF. 2561 * Otherwise we will fail to submit commands to FW and mac80211 will be 2562 * unhappy about callback failures. 2563 */ 2564 ath10k_mac_unregister(ar); 2565 2566 ath10k_testmode_destroy(ar); 2567 2568 ath10k_core_free_firmware_files(ar); 2569 ath10k_core_free_board_files(ar); 2570 2571 ath10k_debug_unregister(ar); 2572 } 2573 EXPORT_SYMBOL(ath10k_core_unregister); 2574 2575 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 2576 enum ath10k_bus bus, 2577 enum ath10k_hw_rev hw_rev, 2578 const struct ath10k_hif_ops *hif_ops) 2579 { 2580 struct ath10k *ar; 2581 int ret; 2582 2583 ar = ath10k_mac_create(priv_size); 2584 if (!ar) 2585 return NULL; 2586 2587 ar->ath_common.priv = ar; 2588 ar->ath_common.hw = ar->hw; 2589 ar->dev = dev; 2590 ar->hw_rev = hw_rev; 2591 ar->hif.ops = hif_ops; 2592 ar->hif.bus = bus; 2593 2594 switch (hw_rev) { 2595 case ATH10K_HW_QCA988X: 2596 case ATH10K_HW_QCA9887: 2597 ar->regs = &qca988x_regs; 2598 ar->hw_ce_regs = &qcax_ce_regs; 2599 ar->hw_values = &qca988x_values; 2600 break; 2601 case ATH10K_HW_QCA6174: 2602 case ATH10K_HW_QCA9377: 2603 ar->regs = &qca6174_regs; 2604 ar->hw_ce_regs = &qcax_ce_regs; 2605 ar->hw_values = &qca6174_values; 2606 break; 2607 case ATH10K_HW_QCA99X0: 2608 case ATH10K_HW_QCA9984: 2609 ar->regs = &qca99x0_regs; 2610 ar->hw_ce_regs = &qcax_ce_regs; 2611 ar->hw_values = &qca99x0_values; 2612 break; 2613 case ATH10K_HW_QCA9888: 2614 ar->regs = &qca99x0_regs; 2615 ar->hw_ce_regs = &qcax_ce_regs; 2616 ar->hw_values = &qca9888_values; 2617 break; 2618 case ATH10K_HW_QCA4019: 2619 ar->regs = &qca4019_regs; 2620 ar->hw_ce_regs = &qcax_ce_regs; 2621 ar->hw_values = &qca4019_values; 2622 break; 2623 case ATH10K_HW_WCN3990: 2624 ar->regs = &wcn3990_regs; 2625 ar->hw_ce_regs = &wcn3990_ce_regs; 2626 ar->hw_values = &wcn3990_values; 2627 break; 2628 default: 2629 ath10k_err(ar, "unsupported core hardware revision %d\n", 2630 hw_rev); 2631 ret = -ENOTSUPP; 2632 goto err_free_mac; 2633 } 2634 2635 init_completion(&ar->scan.started); 2636 init_completion(&ar->scan.completed); 2637 init_completion(&ar->scan.on_channel); 2638 init_completion(&ar->target_suspend); 2639 init_completion(&ar->wow.wakeup_completed); 2640 2641 init_completion(&ar->install_key_done); 2642 init_completion(&ar->vdev_setup_done); 2643 init_completion(&ar->thermal.wmi_sync); 2644 init_completion(&ar->bss_survey_done); 2645 2646 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 2647 2648 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 2649 if (!ar->workqueue) 2650 goto err_free_mac; 2651 2652 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 2653 if (!ar->workqueue_aux) 2654 goto err_free_wq; 2655 2656 mutex_init(&ar->conf_mutex); 2657 spin_lock_init(&ar->data_lock); 2658 spin_lock_init(&ar->txqs_lock); 2659 2660 INIT_LIST_HEAD(&ar->txqs); 2661 INIT_LIST_HEAD(&ar->peers); 2662 init_waitqueue_head(&ar->peer_mapping_wq); 2663 init_waitqueue_head(&ar->htt.empty_tx_wq); 2664 init_waitqueue_head(&ar->wmi.tx_credits_wq); 2665 2666 init_completion(&ar->offchan_tx_completed); 2667 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 2668 skb_queue_head_init(&ar->offchan_tx_queue); 2669 2670 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 2671 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 2672 2673 INIT_WORK(&ar->register_work, ath10k_core_register_work); 2674 INIT_WORK(&ar->restart_work, ath10k_core_restart); 2675 INIT_WORK(&ar->set_coverage_class_work, 2676 ath10k_core_set_coverage_class_work); 2677 2678 init_dummy_netdev(&ar->napi_dev); 2679 2680 ret = ath10k_debug_create(ar); 2681 if (ret) 2682 goto err_free_aux_wq; 2683 2684 return ar; 2685 2686 err_free_aux_wq: 2687 destroy_workqueue(ar->workqueue_aux); 2688 err_free_wq: 2689 destroy_workqueue(ar->workqueue); 2690 2691 err_free_mac: 2692 ath10k_mac_destroy(ar); 2693 2694 return NULL; 2695 } 2696 EXPORT_SYMBOL(ath10k_core_create); 2697 2698 void ath10k_core_destroy(struct ath10k *ar) 2699 { 2700 flush_workqueue(ar->workqueue); 2701 destroy_workqueue(ar->workqueue); 2702 2703 flush_workqueue(ar->workqueue_aux); 2704 destroy_workqueue(ar->workqueue_aux); 2705 2706 ath10k_debug_destroy(ar); 2707 ath10k_htt_tx_destroy(&ar->htt); 2708 ath10k_wmi_free_host_mem(ar); 2709 ath10k_mac_destroy(ar); 2710 } 2711 EXPORT_SYMBOL(ath10k_core_destroy); 2712 2713 MODULE_AUTHOR("Qualcomm Atheros"); 2714 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards."); 2715 MODULE_LICENSE("Dual BSD/GPL"); 2716