1 // SPDX-License-Identifier: ISC
2 /*
3  * Copyright (c) 2005-2011 Atheros Communications Inc.
4  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5  * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
6  */
7 
8 #include <linux/module.h>
9 #include <linux/firmware.h>
10 #include <linux/of.h>
11 #include <linux/property.h>
12 #include <linux/dmi.h>
13 #include <linux/ctype.h>
14 #include <linux/pm_qos.h>
15 #include <asm/byteorder.h>
16 
17 #include "core.h"
18 #include "mac.h"
19 #include "htc.h"
20 #include "hif.h"
21 #include "wmi.h"
22 #include "bmi.h"
23 #include "debug.h"
24 #include "htt.h"
25 #include "testmode.h"
26 #include "wmi-ops.h"
27 #include "coredump.h"
28 
29 unsigned int ath10k_debug_mask;
30 EXPORT_SYMBOL(ath10k_debug_mask);
31 
32 static unsigned int ath10k_cryptmode_param;
33 static bool uart_print;
34 static bool skip_otp;
35 static bool rawmode;
36 static bool fw_diag_log;
37 
38 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) |
39 				     BIT(ATH10K_FW_CRASH_DUMP_CE_DATA);
40 
41 /* FIXME: most of these should be readonly */
42 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
43 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
44 module_param(uart_print, bool, 0644);
45 module_param(skip_otp, bool, 0644);
46 module_param(rawmode, bool, 0644);
47 module_param(fw_diag_log, bool, 0644);
48 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444);
49 
50 MODULE_PARM_DESC(debug_mask, "Debugging mask");
51 MODULE_PARM_DESC(uart_print, "Uart target debugging");
52 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
53 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
54 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath");
55 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file");
56 MODULE_PARM_DESC(fw_diag_log, "Diag based fw log debugging");
57 
58 static const struct ath10k_hw_params ath10k_hw_params_list[] = {
59 	{
60 		.id = QCA988X_HW_2_0_VERSION,
61 		.dev_id = QCA988X_2_0_DEVICE_ID,
62 		.bus = ATH10K_BUS_PCI,
63 		.name = "qca988x hw2.0",
64 		.patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
65 		.uart_pin = 7,
66 		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
67 		.otp_exe_param = 0,
68 		.channel_counters_freq_hz = 88000,
69 		.max_probe_resp_desc_thres = 0,
70 		.cal_data_len = 2116,
71 		.fw = {
72 			.dir = QCA988X_HW_2_0_FW_DIR,
73 			.board = QCA988X_HW_2_0_BOARD_DATA_FILE,
74 			.board_size = QCA988X_BOARD_DATA_SZ,
75 			.board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
76 		},
77 		.hw_ops = &qca988x_ops,
78 		.decap_align_bytes = 4,
79 		.spectral_bin_discard = 0,
80 		.spectral_bin_offset = 0,
81 		.vht160_mcs_rx_highest = 0,
82 		.vht160_mcs_tx_highest = 0,
83 		.n_cipher_suites = 8,
84 		.ast_skid_limit = 0x10,
85 		.num_wds_entries = 0x20,
86 		.target_64bit = false,
87 		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
88 		.shadow_reg_support = false,
89 		.rri_on_ddr = false,
90 		.hw_filter_reset_required = true,
91 		.fw_diag_ce_download = false,
92 		.tx_stats_over_pktlog = true,
93 	},
94 	{
95 		.id = QCA988X_HW_2_0_VERSION,
96 		.dev_id = QCA988X_2_0_DEVICE_ID_UBNT,
97 		.name = "qca988x hw2.0 ubiquiti",
98 		.patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
99 		.uart_pin = 7,
100 		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
101 		.otp_exe_param = 0,
102 		.channel_counters_freq_hz = 88000,
103 		.max_probe_resp_desc_thres = 0,
104 		.cal_data_len = 2116,
105 		.fw = {
106 			.dir = QCA988X_HW_2_0_FW_DIR,
107 			.board = QCA988X_HW_2_0_BOARD_DATA_FILE,
108 			.board_size = QCA988X_BOARD_DATA_SZ,
109 			.board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
110 		},
111 		.hw_ops = &qca988x_ops,
112 		.decap_align_bytes = 4,
113 		.spectral_bin_discard = 0,
114 		.spectral_bin_offset = 0,
115 		.vht160_mcs_rx_highest = 0,
116 		.vht160_mcs_tx_highest = 0,
117 		.n_cipher_suites = 8,
118 		.ast_skid_limit = 0x10,
119 		.num_wds_entries = 0x20,
120 		.target_64bit = false,
121 		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
122 		.per_ce_irq = false,
123 		.shadow_reg_support = false,
124 		.rri_on_ddr = false,
125 		.hw_filter_reset_required = true,
126 		.fw_diag_ce_download = false,
127 		.tx_stats_over_pktlog = true,
128 	},
129 	{
130 		.id = QCA9887_HW_1_0_VERSION,
131 		.dev_id = QCA9887_1_0_DEVICE_ID,
132 		.bus = ATH10K_BUS_PCI,
133 		.name = "qca9887 hw1.0",
134 		.patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
135 		.uart_pin = 7,
136 		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
137 		.otp_exe_param = 0,
138 		.channel_counters_freq_hz = 88000,
139 		.max_probe_resp_desc_thres = 0,
140 		.cal_data_len = 2116,
141 		.fw = {
142 			.dir = QCA9887_HW_1_0_FW_DIR,
143 			.board = QCA9887_HW_1_0_BOARD_DATA_FILE,
144 			.board_size = QCA9887_BOARD_DATA_SZ,
145 			.board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
146 		},
147 		.hw_ops = &qca988x_ops,
148 		.decap_align_bytes = 4,
149 		.spectral_bin_discard = 0,
150 		.spectral_bin_offset = 0,
151 		.vht160_mcs_rx_highest = 0,
152 		.vht160_mcs_tx_highest = 0,
153 		.n_cipher_suites = 8,
154 		.ast_skid_limit = 0x10,
155 		.num_wds_entries = 0x20,
156 		.target_64bit = false,
157 		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
158 		.per_ce_irq = false,
159 		.shadow_reg_support = false,
160 		.rri_on_ddr = false,
161 		.hw_filter_reset_required = true,
162 		.fw_diag_ce_download = false,
163 		.tx_stats_over_pktlog = false,
164 	},
165 	{
166 		.id = QCA6174_HW_3_2_VERSION,
167 		.dev_id = QCA6174_3_2_DEVICE_ID,
168 		.bus = ATH10K_BUS_SDIO,
169 		.name = "qca6174 hw3.2 sdio",
170 		.patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
171 		.uart_pin = 19,
172 		.otp_exe_param = 0,
173 		.channel_counters_freq_hz = 88000,
174 		.max_probe_resp_desc_thres = 0,
175 		.cal_data_len = 0,
176 		.fw = {
177 			.dir = QCA6174_HW_3_0_FW_DIR,
178 			.board = QCA6174_HW_3_0_BOARD_DATA_FILE,
179 			.board_size = QCA6174_BOARD_DATA_SZ,
180 			.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
181 		},
182 		.hw_ops = &qca6174_sdio_ops,
183 		.hw_clk = qca6174_clk,
184 		.target_cpu_freq = 176000000,
185 		.decap_align_bytes = 4,
186 		.n_cipher_suites = 8,
187 		.num_peers = 10,
188 		.ast_skid_limit = 0x10,
189 		.num_wds_entries = 0x20,
190 		.uart_pin_workaround = true,
191 		.tx_stats_over_pktlog = false,
192 		.bmi_large_size_download = true,
193 		.supports_peer_stats_info = true,
194 	},
195 	{
196 		.id = QCA6174_HW_2_1_VERSION,
197 		.dev_id = QCA6164_2_1_DEVICE_ID,
198 		.bus = ATH10K_BUS_PCI,
199 		.name = "qca6164 hw2.1",
200 		.patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
201 		.uart_pin = 6,
202 		.otp_exe_param = 0,
203 		.channel_counters_freq_hz = 88000,
204 		.max_probe_resp_desc_thres = 0,
205 		.cal_data_len = 8124,
206 		.fw = {
207 			.dir = QCA6174_HW_2_1_FW_DIR,
208 			.board = QCA6174_HW_2_1_BOARD_DATA_FILE,
209 			.board_size = QCA6174_BOARD_DATA_SZ,
210 			.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
211 		},
212 		.hw_ops = &qca988x_ops,
213 		.decap_align_bytes = 4,
214 		.spectral_bin_discard = 0,
215 		.spectral_bin_offset = 0,
216 		.vht160_mcs_rx_highest = 0,
217 		.vht160_mcs_tx_highest = 0,
218 		.n_cipher_suites = 8,
219 		.ast_skid_limit = 0x10,
220 		.num_wds_entries = 0x20,
221 		.target_64bit = false,
222 		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
223 		.per_ce_irq = false,
224 		.shadow_reg_support = false,
225 		.rri_on_ddr = false,
226 		.hw_filter_reset_required = true,
227 		.fw_diag_ce_download = false,
228 		.tx_stats_over_pktlog = false,
229 	},
230 	{
231 		.id = QCA6174_HW_2_1_VERSION,
232 		.dev_id = QCA6174_2_1_DEVICE_ID,
233 		.bus = ATH10K_BUS_PCI,
234 		.name = "qca6174 hw2.1",
235 		.patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
236 		.uart_pin = 6,
237 		.otp_exe_param = 0,
238 		.channel_counters_freq_hz = 88000,
239 		.max_probe_resp_desc_thres = 0,
240 		.cal_data_len = 8124,
241 		.fw = {
242 			.dir = QCA6174_HW_2_1_FW_DIR,
243 			.board = QCA6174_HW_2_1_BOARD_DATA_FILE,
244 			.board_size = QCA6174_BOARD_DATA_SZ,
245 			.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
246 		},
247 		.hw_ops = &qca988x_ops,
248 		.decap_align_bytes = 4,
249 		.spectral_bin_discard = 0,
250 		.spectral_bin_offset = 0,
251 		.vht160_mcs_rx_highest = 0,
252 		.vht160_mcs_tx_highest = 0,
253 		.n_cipher_suites = 8,
254 		.ast_skid_limit = 0x10,
255 		.num_wds_entries = 0x20,
256 		.target_64bit = false,
257 		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
258 		.per_ce_irq = false,
259 		.shadow_reg_support = false,
260 		.rri_on_ddr = false,
261 		.hw_filter_reset_required = true,
262 		.fw_diag_ce_download = false,
263 		.tx_stats_over_pktlog = false,
264 	},
265 	{
266 		.id = QCA6174_HW_3_0_VERSION,
267 		.dev_id = QCA6174_2_1_DEVICE_ID,
268 		.bus = ATH10K_BUS_PCI,
269 		.name = "qca6174 hw3.0",
270 		.patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
271 		.uart_pin = 6,
272 		.otp_exe_param = 0,
273 		.channel_counters_freq_hz = 88000,
274 		.max_probe_resp_desc_thres = 0,
275 		.cal_data_len = 8124,
276 		.fw = {
277 			.dir = QCA6174_HW_3_0_FW_DIR,
278 			.board = QCA6174_HW_3_0_BOARD_DATA_FILE,
279 			.board_size = QCA6174_BOARD_DATA_SZ,
280 			.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
281 		},
282 		.hw_ops = &qca988x_ops,
283 		.decap_align_bytes = 4,
284 		.spectral_bin_discard = 0,
285 		.spectral_bin_offset = 0,
286 		.vht160_mcs_rx_highest = 0,
287 		.vht160_mcs_tx_highest = 0,
288 		.n_cipher_suites = 8,
289 		.ast_skid_limit = 0x10,
290 		.num_wds_entries = 0x20,
291 		.target_64bit = false,
292 		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
293 		.per_ce_irq = false,
294 		.shadow_reg_support = false,
295 		.rri_on_ddr = false,
296 		.hw_filter_reset_required = true,
297 		.fw_diag_ce_download = false,
298 		.tx_stats_over_pktlog = false,
299 	},
300 	{
301 		.id = QCA6174_HW_3_2_VERSION,
302 		.dev_id = QCA6174_2_1_DEVICE_ID,
303 		.bus = ATH10K_BUS_PCI,
304 		.name = "qca6174 hw3.2",
305 		.patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
306 		.uart_pin = 6,
307 		.otp_exe_param = 0,
308 		.channel_counters_freq_hz = 88000,
309 		.max_probe_resp_desc_thres = 0,
310 		.cal_data_len = 8124,
311 		.fw = {
312 			/* uses same binaries as hw3.0 */
313 			.dir = QCA6174_HW_3_0_FW_DIR,
314 			.board = QCA6174_HW_3_0_BOARD_DATA_FILE,
315 			.board_size = QCA6174_BOARD_DATA_SZ,
316 			.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
317 		},
318 		.hw_ops = &qca6174_ops,
319 		.hw_clk = qca6174_clk,
320 		.target_cpu_freq = 176000000,
321 		.decap_align_bytes = 4,
322 		.spectral_bin_discard = 0,
323 		.spectral_bin_offset = 0,
324 		.vht160_mcs_rx_highest = 0,
325 		.vht160_mcs_tx_highest = 0,
326 		.n_cipher_suites = 8,
327 		.ast_skid_limit = 0x10,
328 		.num_wds_entries = 0x20,
329 		.target_64bit = false,
330 		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
331 		.per_ce_irq = false,
332 		.shadow_reg_support = false,
333 		.rri_on_ddr = false,
334 		.hw_filter_reset_required = true,
335 		.fw_diag_ce_download = true,
336 		.tx_stats_over_pktlog = false,
337 	},
338 	{
339 		.id = QCA99X0_HW_2_0_DEV_VERSION,
340 		.dev_id = QCA99X0_2_0_DEVICE_ID,
341 		.bus = ATH10K_BUS_PCI,
342 		.name = "qca99x0 hw2.0",
343 		.patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
344 		.uart_pin = 7,
345 		.otp_exe_param = 0x00000700,
346 		.continuous_frag_desc = true,
347 		.cck_rate_map_rev2 = true,
348 		.channel_counters_freq_hz = 150000,
349 		.max_probe_resp_desc_thres = 24,
350 		.tx_chain_mask = 0xf,
351 		.rx_chain_mask = 0xf,
352 		.max_spatial_stream = 4,
353 		.cal_data_len = 12064,
354 		.fw = {
355 			.dir = QCA99X0_HW_2_0_FW_DIR,
356 			.board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
357 			.board_size = QCA99X0_BOARD_DATA_SZ,
358 			.board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
359 		},
360 		.sw_decrypt_mcast_mgmt = true,
361 		.hw_ops = &qca99x0_ops,
362 		.decap_align_bytes = 1,
363 		.spectral_bin_discard = 4,
364 		.spectral_bin_offset = 0,
365 		.vht160_mcs_rx_highest = 0,
366 		.vht160_mcs_tx_highest = 0,
367 		.n_cipher_suites = 11,
368 		.ast_skid_limit = 0x10,
369 		.num_wds_entries = 0x20,
370 		.target_64bit = false,
371 		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
372 		.per_ce_irq = false,
373 		.shadow_reg_support = false,
374 		.rri_on_ddr = false,
375 		.hw_filter_reset_required = true,
376 		.fw_diag_ce_download = false,
377 		.tx_stats_over_pktlog = false,
378 	},
379 	{
380 		.id = QCA9984_HW_1_0_DEV_VERSION,
381 		.dev_id = QCA9984_1_0_DEVICE_ID,
382 		.bus = ATH10K_BUS_PCI,
383 		.name = "qca9984/qca9994 hw1.0",
384 		.patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
385 		.uart_pin = 7,
386 		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
387 		.otp_exe_param = 0x00000700,
388 		.continuous_frag_desc = true,
389 		.cck_rate_map_rev2 = true,
390 		.channel_counters_freq_hz = 150000,
391 		.max_probe_resp_desc_thres = 24,
392 		.tx_chain_mask = 0xf,
393 		.rx_chain_mask = 0xf,
394 		.max_spatial_stream = 4,
395 		.cal_data_len = 12064,
396 		.fw = {
397 			.dir = QCA9984_HW_1_0_FW_DIR,
398 			.board = QCA9984_HW_1_0_BOARD_DATA_FILE,
399 			.eboard = QCA9984_HW_1_0_EBOARD_DATA_FILE,
400 			.board_size = QCA99X0_BOARD_DATA_SZ,
401 			.board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
402 			.ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ,
403 		},
404 		.sw_decrypt_mcast_mgmt = true,
405 		.hw_ops = &qca99x0_ops,
406 		.decap_align_bytes = 1,
407 		.spectral_bin_discard = 12,
408 		.spectral_bin_offset = 8,
409 
410 		/* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz
411 		 * or 2x2 160Mhz, long-guard-interval.
412 		 */
413 		.vht160_mcs_rx_highest = 1560,
414 		.vht160_mcs_tx_highest = 1560,
415 		.n_cipher_suites = 11,
416 		.ast_skid_limit = 0x10,
417 		.num_wds_entries = 0x20,
418 		.target_64bit = false,
419 		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
420 		.per_ce_irq = false,
421 		.shadow_reg_support = false,
422 		.rri_on_ddr = false,
423 		.hw_filter_reset_required = true,
424 		.fw_diag_ce_download = false,
425 		.tx_stats_over_pktlog = false,
426 	},
427 	{
428 		.id = QCA9888_HW_2_0_DEV_VERSION,
429 		.dev_id = QCA9888_2_0_DEVICE_ID,
430 		.bus = ATH10K_BUS_PCI,
431 		.name = "qca9888 hw2.0",
432 		.patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
433 		.uart_pin = 7,
434 		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
435 		.otp_exe_param = 0x00000700,
436 		.continuous_frag_desc = true,
437 		.channel_counters_freq_hz = 150000,
438 		.max_probe_resp_desc_thres = 24,
439 		.tx_chain_mask = 3,
440 		.rx_chain_mask = 3,
441 		.max_spatial_stream = 2,
442 		.cal_data_len = 12064,
443 		.fw = {
444 			.dir = QCA9888_HW_2_0_FW_DIR,
445 			.board = QCA9888_HW_2_0_BOARD_DATA_FILE,
446 			.board_size = QCA99X0_BOARD_DATA_SZ,
447 			.board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
448 		},
449 		.sw_decrypt_mcast_mgmt = true,
450 		.hw_ops = &qca99x0_ops,
451 		.decap_align_bytes = 1,
452 		.spectral_bin_discard = 12,
453 		.spectral_bin_offset = 8,
454 
455 		/* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or
456 		 * 1x1 160Mhz, long-guard-interval.
457 		 */
458 		.vht160_mcs_rx_highest = 780,
459 		.vht160_mcs_tx_highest = 780,
460 		.n_cipher_suites = 11,
461 		.ast_skid_limit = 0x10,
462 		.num_wds_entries = 0x20,
463 		.target_64bit = false,
464 		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
465 		.per_ce_irq = false,
466 		.shadow_reg_support = false,
467 		.rri_on_ddr = false,
468 		.hw_filter_reset_required = true,
469 		.fw_diag_ce_download = false,
470 		.tx_stats_over_pktlog = false,
471 	},
472 	{
473 		.id = QCA9377_HW_1_0_DEV_VERSION,
474 		.dev_id = QCA9377_1_0_DEVICE_ID,
475 		.bus = ATH10K_BUS_PCI,
476 		.name = "qca9377 hw1.0",
477 		.patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
478 		.uart_pin = 6,
479 		.otp_exe_param = 0,
480 		.channel_counters_freq_hz = 88000,
481 		.max_probe_resp_desc_thres = 0,
482 		.cal_data_len = 8124,
483 		.fw = {
484 			.dir = QCA9377_HW_1_0_FW_DIR,
485 			.board = QCA9377_HW_1_0_BOARD_DATA_FILE,
486 			.board_size = QCA9377_BOARD_DATA_SZ,
487 			.board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
488 		},
489 		.hw_ops = &qca988x_ops,
490 		.decap_align_bytes = 4,
491 		.spectral_bin_discard = 0,
492 		.spectral_bin_offset = 0,
493 		.vht160_mcs_rx_highest = 0,
494 		.vht160_mcs_tx_highest = 0,
495 		.n_cipher_suites = 8,
496 		.ast_skid_limit = 0x10,
497 		.num_wds_entries = 0x20,
498 		.target_64bit = false,
499 		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
500 		.per_ce_irq = false,
501 		.shadow_reg_support = false,
502 		.rri_on_ddr = false,
503 		.hw_filter_reset_required = true,
504 		.fw_diag_ce_download = false,
505 		.tx_stats_over_pktlog = false,
506 	},
507 	{
508 		.id = QCA9377_HW_1_1_DEV_VERSION,
509 		.dev_id = QCA9377_1_0_DEVICE_ID,
510 		.bus = ATH10K_BUS_PCI,
511 		.name = "qca9377 hw1.1",
512 		.patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
513 		.uart_pin = 6,
514 		.otp_exe_param = 0,
515 		.channel_counters_freq_hz = 88000,
516 		.max_probe_resp_desc_thres = 0,
517 		.cal_data_len = 8124,
518 		.fw = {
519 			.dir = QCA9377_HW_1_0_FW_DIR,
520 			.board = QCA9377_HW_1_0_BOARD_DATA_FILE,
521 			.board_size = QCA9377_BOARD_DATA_SZ,
522 			.board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
523 		},
524 		.hw_ops = &qca6174_ops,
525 		.hw_clk = qca6174_clk,
526 		.target_cpu_freq = 176000000,
527 		.decap_align_bytes = 4,
528 		.spectral_bin_discard = 0,
529 		.spectral_bin_offset = 0,
530 		.vht160_mcs_rx_highest = 0,
531 		.vht160_mcs_tx_highest = 0,
532 		.n_cipher_suites = 8,
533 		.ast_skid_limit = 0x10,
534 		.num_wds_entries = 0x20,
535 		.target_64bit = false,
536 		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
537 		.per_ce_irq = false,
538 		.shadow_reg_support = false,
539 		.rri_on_ddr = false,
540 		.hw_filter_reset_required = true,
541 		.fw_diag_ce_download = true,
542 		.tx_stats_over_pktlog = false,
543 	},
544 	{
545 		.id = QCA9377_HW_1_1_DEV_VERSION,
546 		.dev_id = QCA9377_1_0_DEVICE_ID,
547 		.bus = ATH10K_BUS_SDIO,
548 		.name = "qca9377 hw1.1 sdio",
549 		.patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
550 		.uart_pin = 19,
551 		.otp_exe_param = 0,
552 		.channel_counters_freq_hz = 88000,
553 		.max_probe_resp_desc_thres = 0,
554 		.cal_data_len = 8124,
555 		.fw = {
556 			.dir = QCA9377_HW_1_0_FW_DIR,
557 			.board = QCA9377_HW_1_0_BOARD_DATA_FILE,
558 			.board_size = QCA9377_BOARD_DATA_SZ,
559 			.board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
560 		},
561 		.hw_ops = &qca6174_ops,
562 		.hw_clk = qca6174_clk,
563 		.target_cpu_freq = 176000000,
564 		.decap_align_bytes = 4,
565 		.n_cipher_suites = 8,
566 		.num_peers = TARGET_QCA9377_HL_NUM_PEERS,
567 		.ast_skid_limit = 0x10,
568 		.num_wds_entries = 0x20,
569 		.uart_pin_workaround = true,
570 	},
571 	{
572 		.id = QCA4019_HW_1_0_DEV_VERSION,
573 		.dev_id = 0,
574 		.bus = ATH10K_BUS_AHB,
575 		.name = "qca4019 hw1.0",
576 		.patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
577 		.uart_pin = 7,
578 		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
579 		.otp_exe_param = 0x0010000,
580 		.continuous_frag_desc = true,
581 		.cck_rate_map_rev2 = true,
582 		.channel_counters_freq_hz = 125000,
583 		.max_probe_resp_desc_thres = 24,
584 		.tx_chain_mask = 0x3,
585 		.rx_chain_mask = 0x3,
586 		.max_spatial_stream = 2,
587 		.cal_data_len = 12064,
588 		.fw = {
589 			.dir = QCA4019_HW_1_0_FW_DIR,
590 			.board = QCA4019_HW_1_0_BOARD_DATA_FILE,
591 			.board_size = QCA4019_BOARD_DATA_SZ,
592 			.board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
593 		},
594 		.sw_decrypt_mcast_mgmt = true,
595 		.hw_ops = &qca99x0_ops,
596 		.decap_align_bytes = 1,
597 		.spectral_bin_discard = 4,
598 		.spectral_bin_offset = 0,
599 		.vht160_mcs_rx_highest = 0,
600 		.vht160_mcs_tx_highest = 0,
601 		.n_cipher_suites = 11,
602 		.ast_skid_limit = 0x10,
603 		.num_wds_entries = 0x20,
604 		.target_64bit = false,
605 		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
606 		.per_ce_irq = false,
607 		.shadow_reg_support = false,
608 		.rri_on_ddr = false,
609 		.hw_filter_reset_required = true,
610 		.fw_diag_ce_download = false,
611 		.tx_stats_over_pktlog = false,
612 	},
613 	{
614 		.id = WCN3990_HW_1_0_DEV_VERSION,
615 		.dev_id = 0,
616 		.bus = ATH10K_BUS_SNOC,
617 		.name = "wcn3990 hw1.0",
618 		.continuous_frag_desc = true,
619 		.tx_chain_mask = 0x7,
620 		.rx_chain_mask = 0x7,
621 		.max_spatial_stream = 4,
622 		.fw = {
623 			.dir = WCN3990_HW_1_0_FW_DIR,
624 		},
625 		.sw_decrypt_mcast_mgmt = true,
626 		.hw_ops = &wcn3990_ops,
627 		.decap_align_bytes = 1,
628 		.num_peers = TARGET_HL_TLV_NUM_PEERS,
629 		.n_cipher_suites = 11,
630 		.ast_skid_limit = TARGET_HL_TLV_AST_SKID_LIMIT,
631 		.num_wds_entries = TARGET_HL_TLV_NUM_WDS_ENTRIES,
632 		.target_64bit = true,
633 		.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC,
634 		.per_ce_irq = true,
635 		.shadow_reg_support = true,
636 		.rri_on_ddr = true,
637 		.hw_filter_reset_required = false,
638 		.fw_diag_ce_download = false,
639 		.tx_stats_over_pktlog = false,
640 	},
641 };
642 
643 static const char *const ath10k_core_fw_feature_str[] = {
644 	[ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
645 	[ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
646 	[ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
647 	[ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
648 	[ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
649 	[ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
650 	[ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
651 	[ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
652 	[ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
653 	[ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
654 	[ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
655 	[ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
656 	[ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
657 	[ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
658 	[ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param",
659 	[ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",
660 	[ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast",
661 	[ATH10K_FW_FEATURE_NO_PS] = "no-ps",
662 	[ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference",
663 	[ATH10K_FW_FEATURE_NON_BMI] = "non-bmi",
664 	[ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL] = "single-chan-info-per-channel",
665 	[ATH10K_FW_FEATURE_PEER_FIXED_RATE] = "peer-fixed-rate",
666 };
667 
668 static unsigned int ath10k_core_get_fw_feature_str(char *buf,
669 						   size_t buf_len,
670 						   enum ath10k_fw_features feat)
671 {
672 	/* make sure that ath10k_core_fw_feature_str[] gets updated */
673 	BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
674 		     ATH10K_FW_FEATURE_COUNT);
675 
676 	if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
677 	    WARN_ON(!ath10k_core_fw_feature_str[feat])) {
678 		return scnprintf(buf, buf_len, "bit%d", feat);
679 	}
680 
681 	return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
682 }
683 
684 void ath10k_core_get_fw_features_str(struct ath10k *ar,
685 				     char *buf,
686 				     size_t buf_len)
687 {
688 	size_t len = 0;
689 	int i;
690 
691 	for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
692 		if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) {
693 			if (len > 0)
694 				len += scnprintf(buf + len, buf_len - len, ",");
695 
696 			len += ath10k_core_get_fw_feature_str(buf + len,
697 							      buf_len - len,
698 							      i);
699 		}
700 	}
701 }
702 
703 static void ath10k_send_suspend_complete(struct ath10k *ar)
704 {
705 	ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
706 
707 	complete(&ar->target_suspend);
708 }
709 
710 static int ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode)
711 {
712 	int ret;
713 	u32 param = 0;
714 
715 	ret = ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256);
716 	if (ret)
717 		return ret;
718 
719 	ret = ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99);
720 	if (ret)
721 		return ret;
722 
723 	ret = ath10k_bmi_read32(ar, hi_acs_flags, &param);
724 	if (ret)
725 		return ret;
726 
727 	param |= HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET;
728 
729 	if (mode == ATH10K_FIRMWARE_MODE_NORMAL)
730 		param |= HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
731 	else
732 		param &= ~HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
733 
734 	if (mode == ATH10K_FIRMWARE_MODE_UTF)
735 		param &= ~HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
736 	else
737 		param |= HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
738 
739 	ret = ath10k_bmi_write32(ar, hi_acs_flags, param);
740 	if (ret)
741 		return ret;
742 
743 	return 0;
744 }
745 
746 static int ath10k_init_configure_target(struct ath10k *ar)
747 {
748 	u32 param_host;
749 	int ret;
750 
751 	/* tell target which HTC version it is used*/
752 	ret = ath10k_bmi_write32(ar, hi_app_host_interest,
753 				 HTC_PROTOCOL_VERSION);
754 	if (ret) {
755 		ath10k_err(ar, "settings HTC version failed\n");
756 		return ret;
757 	}
758 
759 	/* set the firmware mode to STA/IBSS/AP */
760 	ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
761 	if (ret) {
762 		ath10k_err(ar, "setting firmware mode (1/2) failed\n");
763 		return ret;
764 	}
765 
766 	/* TODO following parameters need to be re-visited. */
767 	/* num_device */
768 	param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
769 	/* Firmware mode */
770 	/* FIXME: Why FW_MODE_AP ??.*/
771 	param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
772 	/* mac_addr_method */
773 	param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
774 	/* firmware_bridge */
775 	param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
776 	/* fwsubmode */
777 	param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
778 
779 	ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
780 	if (ret) {
781 		ath10k_err(ar, "setting firmware mode (2/2) failed\n");
782 		return ret;
783 	}
784 
785 	/* We do all byte-swapping on the host */
786 	ret = ath10k_bmi_write32(ar, hi_be, 0);
787 	if (ret) {
788 		ath10k_err(ar, "setting host CPU BE mode failed\n");
789 		return ret;
790 	}
791 
792 	/* FW descriptor/Data swap flags */
793 	ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
794 
795 	if (ret) {
796 		ath10k_err(ar, "setting FW data/desc swap flags failed\n");
797 		return ret;
798 	}
799 
800 	/* Some devices have a special sanity check that verifies the PCI
801 	 * Device ID is written to this host interest var. It is known to be
802 	 * required to boot QCA6164.
803 	 */
804 	ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
805 				 ar->dev_id);
806 	if (ret) {
807 		ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
808 		return ret;
809 	}
810 
811 	return 0;
812 }
813 
814 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
815 						   const char *dir,
816 						   const char *file)
817 {
818 	char filename[100];
819 	const struct firmware *fw;
820 	int ret;
821 
822 	if (file == NULL)
823 		return ERR_PTR(-ENOENT);
824 
825 	if (dir == NULL)
826 		dir = ".";
827 
828 	snprintf(filename, sizeof(filename), "%s/%s", dir, file);
829 	ret = firmware_request_nowarn(&fw, filename, ar->dev);
830 	ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n",
831 		   filename, ret);
832 
833 	if (ret)
834 		return ERR_PTR(ret);
835 
836 	return fw;
837 }
838 
839 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
840 				      size_t data_len)
841 {
842 	u32 board_data_size = ar->hw_params.fw.board_size;
843 	u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
844 	u32 board_ext_data_addr;
845 	int ret;
846 
847 	ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
848 	if (ret) {
849 		ath10k_err(ar, "could not read board ext data addr (%d)\n",
850 			   ret);
851 		return ret;
852 	}
853 
854 	ath10k_dbg(ar, ATH10K_DBG_BOOT,
855 		   "boot push board extended data addr 0x%x\n",
856 		   board_ext_data_addr);
857 
858 	if (board_ext_data_addr == 0)
859 		return 0;
860 
861 	if (data_len != (board_data_size + board_ext_data_size)) {
862 		ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
863 			   data_len, board_data_size, board_ext_data_size);
864 		return -EINVAL;
865 	}
866 
867 	ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
868 				      data + board_data_size,
869 				      board_ext_data_size);
870 	if (ret) {
871 		ath10k_err(ar, "could not write board ext data (%d)\n", ret);
872 		return ret;
873 	}
874 
875 	ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
876 				 (board_ext_data_size << 16) | 1);
877 	if (ret) {
878 		ath10k_err(ar, "could not write board ext data bit (%d)\n",
879 			   ret);
880 		return ret;
881 	}
882 
883 	return 0;
884 }
885 
886 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
887 {
888 	u32 result, address;
889 	u8 board_id, chip_id;
890 	bool ext_bid_support;
891 	int ret, bmi_board_id_param;
892 
893 	address = ar->hw_params.patch_load_addr;
894 
895 	if (!ar->normal_mode_fw.fw_file.otp_data ||
896 	    !ar->normal_mode_fw.fw_file.otp_len) {
897 		ath10k_warn(ar,
898 			    "failed to retrieve board id because of invalid otp\n");
899 		return -ENODATA;
900 	}
901 
902 	if (ar->id.bmi_ids_valid) {
903 		ath10k_dbg(ar, ATH10K_DBG_BOOT,
904 			   "boot already acquired valid otp board id,skip download, board_id %d chip_id %d\n",
905 			   ar->id.bmi_board_id, ar->id.bmi_chip_id);
906 		goto skip_otp_download;
907 	}
908 
909 	ath10k_dbg(ar, ATH10K_DBG_BOOT,
910 		   "boot upload otp to 0x%x len %zd for board id\n",
911 		   address, ar->normal_mode_fw.fw_file.otp_len);
912 
913 	ret = ath10k_bmi_fast_download(ar, address,
914 				       ar->normal_mode_fw.fw_file.otp_data,
915 				       ar->normal_mode_fw.fw_file.otp_len);
916 	if (ret) {
917 		ath10k_err(ar, "could not write otp for board id check: %d\n",
918 			   ret);
919 		return ret;
920 	}
921 
922 	if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
923 	    ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
924 		bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID;
925 	else
926 		bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID;
927 
928 	ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result);
929 	if (ret) {
930 		ath10k_err(ar, "could not execute otp for board id check: %d\n",
931 			   ret);
932 		return ret;
933 	}
934 
935 	board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
936 	chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
937 	ext_bid_support = (result & ATH10K_BMI_EXT_BOARD_ID_SUPPORT);
938 
939 	ath10k_dbg(ar, ATH10K_DBG_BOOT,
940 		   "boot get otp board id result 0x%08x board_id %d chip_id %d ext_bid_support %d\n",
941 		   result, board_id, chip_id, ext_bid_support);
942 
943 	ar->id.ext_bid_supported = ext_bid_support;
944 
945 	if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 ||
946 	    (board_id == 0)) {
947 		ath10k_dbg(ar, ATH10K_DBG_BOOT,
948 			   "board id does not exist in otp, ignore it\n");
949 		return -EOPNOTSUPP;
950 	}
951 
952 	ar->id.bmi_ids_valid = true;
953 	ar->id.bmi_board_id = board_id;
954 	ar->id.bmi_chip_id = chip_id;
955 
956 skip_otp_download:
957 
958 	return 0;
959 }
960 
961 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data)
962 {
963 	struct ath10k *ar = data;
964 	const char *bdf_ext;
965 	const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC;
966 	u8 bdf_enabled;
967 	int i;
968 
969 	if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE)
970 		return;
971 
972 	if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) {
973 		ath10k_dbg(ar, ATH10K_DBG_BOOT,
974 			   "wrong smbios bdf ext type length (%d).\n",
975 			   hdr->length);
976 		return;
977 	}
978 
979 	bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET);
980 	if (!bdf_enabled) {
981 		ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n");
982 		return;
983 	}
984 
985 	/* Only one string exists (per spec) */
986 	bdf_ext = (char *)hdr + hdr->length;
987 
988 	if (memcmp(bdf_ext, magic, strlen(magic)) != 0) {
989 		ath10k_dbg(ar, ATH10K_DBG_BOOT,
990 			   "bdf variant magic does not match.\n");
991 		return;
992 	}
993 
994 	for (i = 0; i < strlen(bdf_ext); i++) {
995 		if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) {
996 			ath10k_dbg(ar, ATH10K_DBG_BOOT,
997 				   "bdf variant name contains non ascii chars.\n");
998 			return;
999 		}
1000 	}
1001 
1002 	/* Copy extension name without magic suffix */
1003 	if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic),
1004 		    sizeof(ar->id.bdf_ext)) < 0) {
1005 		ath10k_dbg(ar, ATH10K_DBG_BOOT,
1006 			   "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1007 			    bdf_ext);
1008 		return;
1009 	}
1010 
1011 	ath10k_dbg(ar, ATH10K_DBG_BOOT,
1012 		   "found and validated bdf variant smbios_type 0x%x bdf %s\n",
1013 		   ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext);
1014 }
1015 
1016 static int ath10k_core_check_smbios(struct ath10k *ar)
1017 {
1018 	ar->id.bdf_ext[0] = '\0';
1019 	dmi_walk(ath10k_core_check_bdfext, ar);
1020 
1021 	if (ar->id.bdf_ext[0] == '\0')
1022 		return -ENODATA;
1023 
1024 	return 0;
1025 }
1026 
1027 static int ath10k_core_check_dt(struct ath10k *ar)
1028 {
1029 	struct device_node *node;
1030 	const char *variant = NULL;
1031 
1032 	node = ar->dev->of_node;
1033 	if (!node)
1034 		return -ENOENT;
1035 
1036 	of_property_read_string(node, "qcom,ath10k-calibration-variant",
1037 				&variant);
1038 	if (!variant)
1039 		return -ENODATA;
1040 
1041 	if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0)
1042 		ath10k_dbg(ar, ATH10K_DBG_BOOT,
1043 			   "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1044 			    variant);
1045 
1046 	return 0;
1047 }
1048 
1049 static int ath10k_download_fw(struct ath10k *ar)
1050 {
1051 	u32 address, data_len;
1052 	const void *data;
1053 	int ret;
1054 	struct pm_qos_request latency_qos;
1055 
1056 	address = ar->hw_params.patch_load_addr;
1057 
1058 	data = ar->running_fw->fw_file.firmware_data;
1059 	data_len = ar->running_fw->fw_file.firmware_len;
1060 
1061 	ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file);
1062 	if (ret) {
1063 		ath10k_err(ar, "failed to configure fw code swap: %d\n",
1064 			   ret);
1065 		return ret;
1066 	}
1067 
1068 	ath10k_dbg(ar, ATH10K_DBG_BOOT,
1069 		   "boot uploading firmware image %pK len %d\n",
1070 		   data, data_len);
1071 
1072 	/* Check if device supports to download firmware via
1073 	 * diag copy engine. Downloading firmware via diag CE
1074 	 * greatly reduces the time to download firmware.
1075 	 */
1076 	if (ar->hw_params.fw_diag_ce_download) {
1077 		ret = ath10k_hw_diag_fast_download(ar, address,
1078 						   data, data_len);
1079 		if (ret == 0)
1080 			/* firmware upload via diag ce was successful */
1081 			return 0;
1082 
1083 		ath10k_warn(ar,
1084 			    "failed to upload firmware via diag ce, trying BMI: %d",
1085 			    ret);
1086 	}
1087 
1088 	memset(&latency_qos, 0, sizeof(latency_qos));
1089 	cpu_latency_qos_add_request(&latency_qos, 0);
1090 
1091 	ret = ath10k_bmi_fast_download(ar, address, data, data_len);
1092 
1093 	cpu_latency_qos_remove_request(&latency_qos);
1094 
1095 	return ret;
1096 }
1097 
1098 void ath10k_core_free_board_files(struct ath10k *ar)
1099 {
1100 	if (!IS_ERR(ar->normal_mode_fw.board))
1101 		release_firmware(ar->normal_mode_fw.board);
1102 
1103 	if (!IS_ERR(ar->normal_mode_fw.ext_board))
1104 		release_firmware(ar->normal_mode_fw.ext_board);
1105 
1106 	ar->normal_mode_fw.board = NULL;
1107 	ar->normal_mode_fw.board_data = NULL;
1108 	ar->normal_mode_fw.board_len = 0;
1109 	ar->normal_mode_fw.ext_board = NULL;
1110 	ar->normal_mode_fw.ext_board_data = NULL;
1111 	ar->normal_mode_fw.ext_board_len = 0;
1112 }
1113 EXPORT_SYMBOL(ath10k_core_free_board_files);
1114 
1115 static void ath10k_core_free_firmware_files(struct ath10k *ar)
1116 {
1117 	if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware))
1118 		release_firmware(ar->normal_mode_fw.fw_file.firmware);
1119 
1120 	if (!IS_ERR(ar->cal_file))
1121 		release_firmware(ar->cal_file);
1122 
1123 	if (!IS_ERR(ar->pre_cal_file))
1124 		release_firmware(ar->pre_cal_file);
1125 
1126 	ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file);
1127 
1128 	ar->normal_mode_fw.fw_file.otp_data = NULL;
1129 	ar->normal_mode_fw.fw_file.otp_len = 0;
1130 
1131 	ar->normal_mode_fw.fw_file.firmware = NULL;
1132 	ar->normal_mode_fw.fw_file.firmware_data = NULL;
1133 	ar->normal_mode_fw.fw_file.firmware_len = 0;
1134 
1135 	ar->cal_file = NULL;
1136 	ar->pre_cal_file = NULL;
1137 }
1138 
1139 static int ath10k_fetch_cal_file(struct ath10k *ar)
1140 {
1141 	char filename[100];
1142 
1143 	/* pre-cal-<bus>-<id>.bin */
1144 	scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin",
1145 		  ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1146 
1147 	ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1148 	if (!IS_ERR(ar->pre_cal_file))
1149 		goto success;
1150 
1151 	/* cal-<bus>-<id>.bin */
1152 	scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
1153 		  ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1154 
1155 	ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1156 	if (IS_ERR(ar->cal_file))
1157 		/* calibration file is optional, don't print any warnings */
1158 		return PTR_ERR(ar->cal_file);
1159 success:
1160 	ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
1161 		   ATH10K_FW_DIR, filename);
1162 
1163 	return 0;
1164 }
1165 
1166 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar, int bd_ie_type)
1167 {
1168 	const struct firmware *fw;
1169 
1170 	if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1171 		if (!ar->hw_params.fw.board) {
1172 			ath10k_err(ar, "failed to find board file fw entry\n");
1173 			return -EINVAL;
1174 		}
1175 
1176 		ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1177 								ar->hw_params.fw.dir,
1178 								ar->hw_params.fw.board);
1179 		if (IS_ERR(ar->normal_mode_fw.board))
1180 			return PTR_ERR(ar->normal_mode_fw.board);
1181 
1182 		ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data;
1183 		ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size;
1184 	} else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1185 		if (!ar->hw_params.fw.eboard) {
1186 			ath10k_err(ar, "failed to find eboard file fw entry\n");
1187 			return -EINVAL;
1188 		}
1189 
1190 		fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1191 					  ar->hw_params.fw.eboard);
1192 		ar->normal_mode_fw.ext_board = fw;
1193 		if (IS_ERR(ar->normal_mode_fw.ext_board))
1194 			return PTR_ERR(ar->normal_mode_fw.ext_board);
1195 
1196 		ar->normal_mode_fw.ext_board_data = ar->normal_mode_fw.ext_board->data;
1197 		ar->normal_mode_fw.ext_board_len = ar->normal_mode_fw.ext_board->size;
1198 	}
1199 
1200 	return 0;
1201 }
1202 
1203 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
1204 					 const void *buf, size_t buf_len,
1205 					 const char *boardname,
1206 					 int bd_ie_type)
1207 {
1208 	const struct ath10k_fw_ie *hdr;
1209 	bool name_match_found;
1210 	int ret, board_ie_id;
1211 	size_t board_ie_len;
1212 	const void *board_ie_data;
1213 
1214 	name_match_found = false;
1215 
1216 	/* go through ATH10K_BD_IE_BOARD_ elements */
1217 	while (buf_len > sizeof(struct ath10k_fw_ie)) {
1218 		hdr = buf;
1219 		board_ie_id = le32_to_cpu(hdr->id);
1220 		board_ie_len = le32_to_cpu(hdr->len);
1221 		board_ie_data = hdr->data;
1222 
1223 		buf_len -= sizeof(*hdr);
1224 		buf += sizeof(*hdr);
1225 
1226 		if (buf_len < ALIGN(board_ie_len, 4)) {
1227 			ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
1228 				   buf_len, ALIGN(board_ie_len, 4));
1229 			ret = -EINVAL;
1230 			goto out;
1231 		}
1232 
1233 		switch (board_ie_id) {
1234 		case ATH10K_BD_IE_BOARD_NAME:
1235 			ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
1236 					board_ie_data, board_ie_len);
1237 
1238 			if (board_ie_len != strlen(boardname))
1239 				break;
1240 
1241 			ret = memcmp(board_ie_data, boardname, strlen(boardname));
1242 			if (ret)
1243 				break;
1244 
1245 			name_match_found = true;
1246 			ath10k_dbg(ar, ATH10K_DBG_BOOT,
1247 				   "boot found match for name '%s'",
1248 				   boardname);
1249 			break;
1250 		case ATH10K_BD_IE_BOARD_DATA:
1251 			if (!name_match_found)
1252 				/* no match found */
1253 				break;
1254 
1255 			if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1256 				ath10k_dbg(ar, ATH10K_DBG_BOOT,
1257 					   "boot found board data for '%s'",
1258 						boardname);
1259 
1260 				ar->normal_mode_fw.board_data = board_ie_data;
1261 				ar->normal_mode_fw.board_len = board_ie_len;
1262 			} else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1263 				ath10k_dbg(ar, ATH10K_DBG_BOOT,
1264 					   "boot found eboard data for '%s'",
1265 						boardname);
1266 
1267 				ar->normal_mode_fw.ext_board_data = board_ie_data;
1268 				ar->normal_mode_fw.ext_board_len = board_ie_len;
1269 			}
1270 
1271 			ret = 0;
1272 			goto out;
1273 		default:
1274 			ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
1275 				    board_ie_id);
1276 			break;
1277 		}
1278 
1279 		/* jump over the padding */
1280 		board_ie_len = ALIGN(board_ie_len, 4);
1281 
1282 		buf_len -= board_ie_len;
1283 		buf += board_ie_len;
1284 	}
1285 
1286 	/* no match found */
1287 	ret = -ENOENT;
1288 
1289 out:
1290 	return ret;
1291 }
1292 
1293 static int ath10k_core_search_bd(struct ath10k *ar,
1294 				 const char *boardname,
1295 				 const u8 *data,
1296 				 size_t len)
1297 {
1298 	size_t ie_len;
1299 	struct ath10k_fw_ie *hdr;
1300 	int ret = -ENOENT, ie_id;
1301 
1302 	while (len > sizeof(struct ath10k_fw_ie)) {
1303 		hdr = (struct ath10k_fw_ie *)data;
1304 		ie_id = le32_to_cpu(hdr->id);
1305 		ie_len = le32_to_cpu(hdr->len);
1306 
1307 		len -= sizeof(*hdr);
1308 		data = hdr->data;
1309 
1310 		if (len < ALIGN(ie_len, 4)) {
1311 			ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
1312 				   ie_id, ie_len, len);
1313 			return -EINVAL;
1314 		}
1315 
1316 		switch (ie_id) {
1317 		case ATH10K_BD_IE_BOARD:
1318 			ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1319 							    boardname,
1320 							    ATH10K_BD_IE_BOARD);
1321 			if (ret == -ENOENT)
1322 				/* no match found, continue */
1323 				break;
1324 
1325 			/* either found or error, so stop searching */
1326 			goto out;
1327 		case ATH10K_BD_IE_BOARD_EXT:
1328 			ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1329 							    boardname,
1330 							    ATH10K_BD_IE_BOARD_EXT);
1331 			if (ret == -ENOENT)
1332 				/* no match found, continue */
1333 				break;
1334 
1335 			/* either found or error, so stop searching */
1336 			goto out;
1337 		}
1338 
1339 		/* jump over the padding */
1340 		ie_len = ALIGN(ie_len, 4);
1341 
1342 		len -= ie_len;
1343 		data += ie_len;
1344 	}
1345 
1346 out:
1347 	/* return result of parse_bd_ie_board() or -ENOENT */
1348 	return ret;
1349 }
1350 
1351 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
1352 					      const char *boardname,
1353 					      const char *fallback_boardname,
1354 					      const char *filename)
1355 {
1356 	size_t len, magic_len;
1357 	const u8 *data;
1358 	int ret;
1359 
1360 	/* Skip if already fetched during board data download */
1361 	if (!ar->normal_mode_fw.board)
1362 		ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1363 								ar->hw_params.fw.dir,
1364 								filename);
1365 	if (IS_ERR(ar->normal_mode_fw.board))
1366 		return PTR_ERR(ar->normal_mode_fw.board);
1367 
1368 	data = ar->normal_mode_fw.board->data;
1369 	len = ar->normal_mode_fw.board->size;
1370 
1371 	/* magic has extra null byte padded */
1372 	magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
1373 	if (len < magic_len) {
1374 		ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
1375 			   ar->hw_params.fw.dir, filename, len);
1376 		ret = -EINVAL;
1377 		goto err;
1378 	}
1379 
1380 	if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
1381 		ath10k_err(ar, "found invalid board magic\n");
1382 		ret = -EINVAL;
1383 		goto err;
1384 	}
1385 
1386 	/* magic is padded to 4 bytes */
1387 	magic_len = ALIGN(magic_len, 4);
1388 	if (len < magic_len) {
1389 		ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
1390 			   ar->hw_params.fw.dir, filename, len);
1391 		ret = -EINVAL;
1392 		goto err;
1393 	}
1394 
1395 	data += magic_len;
1396 	len -= magic_len;
1397 
1398 	/* attempt to find boardname in the IE list */
1399 	ret = ath10k_core_search_bd(ar, boardname, data, len);
1400 
1401 	/* if we didn't find it and have a fallback name, try that */
1402 	if (ret == -ENOENT && fallback_boardname)
1403 		ret = ath10k_core_search_bd(ar, fallback_boardname, data, len);
1404 
1405 	if (ret == -ENOENT) {
1406 		ath10k_err(ar,
1407 			   "failed to fetch board data for %s from %s/%s\n",
1408 			   boardname, ar->hw_params.fw.dir, filename);
1409 		ret = -ENODATA;
1410 	}
1411 
1412 	if (ret)
1413 		goto err;
1414 
1415 	return 0;
1416 
1417 err:
1418 	ath10k_core_free_board_files(ar);
1419 	return ret;
1420 }
1421 
1422 static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
1423 					 size_t name_len, bool with_variant)
1424 {
1425 	/* strlen(',variant=') + strlen(ar->id.bdf_ext) */
1426 	char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 };
1427 
1428 	if (with_variant && ar->id.bdf_ext[0] != '\0')
1429 		scnprintf(variant, sizeof(variant), ",variant=%s",
1430 			  ar->id.bdf_ext);
1431 
1432 	if (ar->id.bmi_ids_valid) {
1433 		scnprintf(name, name_len,
1434 			  "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s",
1435 			  ath10k_bus_str(ar->hif.bus),
1436 			  ar->id.bmi_chip_id,
1437 			  ar->id.bmi_board_id, variant);
1438 		goto out;
1439 	}
1440 
1441 	if (ar->id.qmi_ids_valid) {
1442 		scnprintf(name, name_len,
1443 			  "bus=%s,qmi-board-id=%x",
1444 			  ath10k_bus_str(ar->hif.bus),
1445 			  ar->id.qmi_board_id);
1446 		goto out;
1447 	}
1448 
1449 	scnprintf(name, name_len,
1450 		  "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s",
1451 		  ath10k_bus_str(ar->hif.bus),
1452 		  ar->id.vendor, ar->id.device,
1453 		  ar->id.subsystem_vendor, ar->id.subsystem_device, variant);
1454 out:
1455 	ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
1456 
1457 	return 0;
1458 }
1459 
1460 static int ath10k_core_create_eboard_name(struct ath10k *ar, char *name,
1461 					  size_t name_len)
1462 {
1463 	if (ar->id.bmi_ids_valid) {
1464 		scnprintf(name, name_len,
1465 			  "bus=%s,bmi-chip-id=%d,bmi-eboard-id=%d",
1466 			  ath10k_bus_str(ar->hif.bus),
1467 			  ar->id.bmi_chip_id,
1468 			  ar->id.bmi_eboard_id);
1469 
1470 		ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using eboard name '%s'\n", name);
1471 		return 0;
1472 	}
1473 	/* Fallback if returned board id is zero */
1474 	return -1;
1475 }
1476 
1477 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type)
1478 {
1479 	char boardname[100], fallback_boardname[100];
1480 	int ret;
1481 
1482 	if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1483 		ret = ath10k_core_create_board_name(ar, boardname,
1484 						    sizeof(boardname), true);
1485 		if (ret) {
1486 			ath10k_err(ar, "failed to create board name: %d", ret);
1487 			return ret;
1488 		}
1489 
1490 		ret = ath10k_core_create_board_name(ar, fallback_boardname,
1491 						    sizeof(boardname), false);
1492 		if (ret) {
1493 			ath10k_err(ar, "failed to create fallback board name: %d", ret);
1494 			return ret;
1495 		}
1496 	} else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1497 		ret = ath10k_core_create_eboard_name(ar, boardname,
1498 						     sizeof(boardname));
1499 		if (ret) {
1500 			ath10k_err(ar, "fallback to eboard.bin since board id 0");
1501 			goto fallback;
1502 		}
1503 	}
1504 
1505 	ar->bd_api = 2;
1506 	ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
1507 						 fallback_boardname,
1508 						 ATH10K_BOARD_API2_FILE);
1509 	if (!ret)
1510 		goto success;
1511 
1512 fallback:
1513 	ar->bd_api = 1;
1514 	ret = ath10k_core_fetch_board_data_api_1(ar, bd_ie_type);
1515 	if (ret) {
1516 		ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n",
1517 			   ar->hw_params.fw.dir);
1518 		return ret;
1519 	}
1520 
1521 success:
1522 	ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
1523 	return 0;
1524 }
1525 EXPORT_SYMBOL(ath10k_core_fetch_board_file);
1526 
1527 static int ath10k_core_get_ext_board_id_from_otp(struct ath10k *ar)
1528 {
1529 	u32 result, address;
1530 	u8 ext_board_id;
1531 	int ret;
1532 
1533 	address = ar->hw_params.patch_load_addr;
1534 
1535 	if (!ar->normal_mode_fw.fw_file.otp_data ||
1536 	    !ar->normal_mode_fw.fw_file.otp_len) {
1537 		ath10k_warn(ar,
1538 			    "failed to retrieve extended board id due to otp binary missing\n");
1539 		return -ENODATA;
1540 	}
1541 
1542 	ath10k_dbg(ar, ATH10K_DBG_BOOT,
1543 		   "boot upload otp to 0x%x len %zd for ext board id\n",
1544 		   address, ar->normal_mode_fw.fw_file.otp_len);
1545 
1546 	ret = ath10k_bmi_fast_download(ar, address,
1547 				       ar->normal_mode_fw.fw_file.otp_data,
1548 				       ar->normal_mode_fw.fw_file.otp_len);
1549 	if (ret) {
1550 		ath10k_err(ar, "could not write otp for ext board id check: %d\n",
1551 			   ret);
1552 		return ret;
1553 	}
1554 
1555 	ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EXT_BOARD_ID, &result);
1556 	if (ret) {
1557 		ath10k_err(ar, "could not execute otp for ext board id check: %d\n",
1558 			   ret);
1559 		return ret;
1560 	}
1561 
1562 	if (!result) {
1563 		ath10k_dbg(ar, ATH10K_DBG_BOOT,
1564 			   "ext board id does not exist in otp, ignore it\n");
1565 		return -EOPNOTSUPP;
1566 	}
1567 
1568 	ext_board_id = result & ATH10K_BMI_EBOARD_ID_STATUS_MASK;
1569 
1570 	ath10k_dbg(ar, ATH10K_DBG_BOOT,
1571 		   "boot get otp ext board id result 0x%08x ext_board_id %d\n",
1572 		   result, ext_board_id);
1573 
1574 	ar->id.bmi_eboard_id = ext_board_id;
1575 
1576 	return 0;
1577 }
1578 
1579 static int ath10k_download_board_data(struct ath10k *ar, const void *data,
1580 				      size_t data_len)
1581 {
1582 	u32 board_data_size = ar->hw_params.fw.board_size;
1583 	u32 eboard_data_size = ar->hw_params.fw.ext_board_size;
1584 	u32 board_address;
1585 	u32 ext_board_address;
1586 	int ret;
1587 
1588 	ret = ath10k_push_board_ext_data(ar, data, data_len);
1589 	if (ret) {
1590 		ath10k_err(ar, "could not push board ext data (%d)\n", ret);
1591 		goto exit;
1592 	}
1593 
1594 	ret = ath10k_bmi_read32(ar, hi_board_data, &board_address);
1595 	if (ret) {
1596 		ath10k_err(ar, "could not read board data addr (%d)\n", ret);
1597 		goto exit;
1598 	}
1599 
1600 	ret = ath10k_bmi_write_memory(ar, board_address, data,
1601 				      min_t(u32, board_data_size,
1602 					    data_len));
1603 	if (ret) {
1604 		ath10k_err(ar, "could not write board data (%d)\n", ret);
1605 		goto exit;
1606 	}
1607 
1608 	ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
1609 	if (ret) {
1610 		ath10k_err(ar, "could not write board data bit (%d)\n", ret);
1611 		goto exit;
1612 	}
1613 
1614 	if (!ar->id.ext_bid_supported)
1615 		goto exit;
1616 
1617 	/* Extended board data download */
1618 	ret = ath10k_core_get_ext_board_id_from_otp(ar);
1619 	if (ret == -EOPNOTSUPP) {
1620 		/* Not fetching ext_board_data if ext board id is 0 */
1621 		ath10k_dbg(ar, ATH10K_DBG_BOOT, "otp returned ext board id 0\n");
1622 		return 0;
1623 	} else if (ret) {
1624 		ath10k_err(ar, "failed to get extended board id: %d\n", ret);
1625 		goto exit;
1626 	}
1627 
1628 	ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD_EXT);
1629 	if (ret)
1630 		goto exit;
1631 
1632 	if (ar->normal_mode_fw.ext_board_data) {
1633 		ext_board_address = board_address + EXT_BOARD_ADDRESS_OFFSET;
1634 		ath10k_dbg(ar, ATH10K_DBG_BOOT,
1635 			   "boot writing ext board data to addr 0x%x",
1636 			   ext_board_address);
1637 		ret = ath10k_bmi_write_memory(ar, ext_board_address,
1638 					      ar->normal_mode_fw.ext_board_data,
1639 					      min_t(u32, eboard_data_size, data_len));
1640 		if (ret)
1641 			ath10k_err(ar, "failed to write ext board data: %d\n", ret);
1642 	}
1643 
1644 exit:
1645 	return ret;
1646 }
1647 
1648 static int ath10k_download_and_run_otp(struct ath10k *ar)
1649 {
1650 	u32 result, address = ar->hw_params.patch_load_addr;
1651 	u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
1652 	int ret;
1653 
1654 	ret = ath10k_download_board_data(ar,
1655 					 ar->running_fw->board_data,
1656 					 ar->running_fw->board_len);
1657 	if (ret) {
1658 		ath10k_err(ar, "failed to download board data: %d\n", ret);
1659 		return ret;
1660 	}
1661 
1662 	/* OTP is optional */
1663 
1664 	if (!ar->running_fw->fw_file.otp_data ||
1665 	    !ar->running_fw->fw_file.otp_len) {
1666 		ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n",
1667 			    ar->running_fw->fw_file.otp_data,
1668 			    ar->running_fw->fw_file.otp_len);
1669 		return 0;
1670 	}
1671 
1672 	ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
1673 		   address, ar->running_fw->fw_file.otp_len);
1674 
1675 	ret = ath10k_bmi_fast_download(ar, address,
1676 				       ar->running_fw->fw_file.otp_data,
1677 				       ar->running_fw->fw_file.otp_len);
1678 	if (ret) {
1679 		ath10k_err(ar, "could not write otp (%d)\n", ret);
1680 		return ret;
1681 	}
1682 
1683 	/* As of now pre-cal is valid for 10_4 variants */
1684 	if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
1685 	    ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE)
1686 		bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL;
1687 
1688 	ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
1689 	if (ret) {
1690 		ath10k_err(ar, "could not execute otp (%d)\n", ret);
1691 		return ret;
1692 	}
1693 
1694 	ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
1695 
1696 	if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
1697 				   ar->running_fw->fw_file.fw_features)) &&
1698 	    result != 0) {
1699 		ath10k_err(ar, "otp calibration failed: %d", result);
1700 		return -EINVAL;
1701 	}
1702 
1703 	return 0;
1704 }
1705 
1706 static int ath10k_download_cal_file(struct ath10k *ar,
1707 				    const struct firmware *file)
1708 {
1709 	int ret;
1710 
1711 	if (!file)
1712 		return -ENOENT;
1713 
1714 	if (IS_ERR(file))
1715 		return PTR_ERR(file);
1716 
1717 	ret = ath10k_download_board_data(ar, file->data, file->size);
1718 	if (ret) {
1719 		ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
1720 		return ret;
1721 	}
1722 
1723 	ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
1724 
1725 	return 0;
1726 }
1727 
1728 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
1729 {
1730 	struct device_node *node;
1731 	int data_len;
1732 	void *data;
1733 	int ret;
1734 
1735 	node = ar->dev->of_node;
1736 	if (!node)
1737 		/* Device Tree is optional, don't print any warnings if
1738 		 * there's no node for ath10k.
1739 		 */
1740 		return -ENOENT;
1741 
1742 	if (!of_get_property(node, dt_name, &data_len)) {
1743 		/* The calibration data node is optional */
1744 		return -ENOENT;
1745 	}
1746 
1747 	if (data_len != ar->hw_params.cal_data_len) {
1748 		ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
1749 			    data_len);
1750 		ret = -EMSGSIZE;
1751 		goto out;
1752 	}
1753 
1754 	data = kmalloc(data_len, GFP_KERNEL);
1755 	if (!data) {
1756 		ret = -ENOMEM;
1757 		goto out;
1758 	}
1759 
1760 	ret = of_property_read_u8_array(node, dt_name, data, data_len);
1761 	if (ret) {
1762 		ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
1763 			    ret);
1764 		goto out_free;
1765 	}
1766 
1767 	ret = ath10k_download_board_data(ar, data, data_len);
1768 	if (ret) {
1769 		ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
1770 			    ret);
1771 		goto out_free;
1772 	}
1773 
1774 	ret = 0;
1775 
1776 out_free:
1777 	kfree(data);
1778 
1779 out:
1780 	return ret;
1781 }
1782 
1783 static int ath10k_download_cal_eeprom(struct ath10k *ar)
1784 {
1785 	size_t data_len;
1786 	void *data = NULL;
1787 	int ret;
1788 
1789 	ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len);
1790 	if (ret) {
1791 		if (ret != -EOPNOTSUPP)
1792 			ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
1793 				    ret);
1794 		goto out_free;
1795 	}
1796 
1797 	ret = ath10k_download_board_data(ar, data, data_len);
1798 	if (ret) {
1799 		ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n",
1800 			    ret);
1801 		goto out_free;
1802 	}
1803 
1804 	ret = 0;
1805 
1806 out_free:
1807 	kfree(data);
1808 
1809 	return ret;
1810 }
1811 
1812 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1813 				     struct ath10k_fw_file *fw_file)
1814 {
1815 	size_t magic_len, len, ie_len;
1816 	int ie_id, i, index, bit, ret;
1817 	struct ath10k_fw_ie *hdr;
1818 	const u8 *data;
1819 	__le32 *timestamp, *version;
1820 
1821 	/* first fetch the firmware file (firmware-*.bin) */
1822 	fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1823 						 name);
1824 	if (IS_ERR(fw_file->firmware))
1825 		return PTR_ERR(fw_file->firmware);
1826 
1827 	data = fw_file->firmware->data;
1828 	len = fw_file->firmware->size;
1829 
1830 	/* magic also includes the null byte, check that as well */
1831 	magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
1832 
1833 	if (len < magic_len) {
1834 		ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
1835 			   ar->hw_params.fw.dir, name, len);
1836 		ret = -EINVAL;
1837 		goto err;
1838 	}
1839 
1840 	if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
1841 		ath10k_err(ar, "invalid firmware magic\n");
1842 		ret = -EINVAL;
1843 		goto err;
1844 	}
1845 
1846 	/* jump over the padding */
1847 	magic_len = ALIGN(magic_len, 4);
1848 
1849 	len -= magic_len;
1850 	data += magic_len;
1851 
1852 	/* loop elements */
1853 	while (len > sizeof(struct ath10k_fw_ie)) {
1854 		hdr = (struct ath10k_fw_ie *)data;
1855 
1856 		ie_id = le32_to_cpu(hdr->id);
1857 		ie_len = le32_to_cpu(hdr->len);
1858 
1859 		len -= sizeof(*hdr);
1860 		data += sizeof(*hdr);
1861 
1862 		if (len < ie_len) {
1863 			ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
1864 				   ie_id, len, ie_len);
1865 			ret = -EINVAL;
1866 			goto err;
1867 		}
1868 
1869 		switch (ie_id) {
1870 		case ATH10K_FW_IE_FW_VERSION:
1871 			if (ie_len > sizeof(fw_file->fw_version) - 1)
1872 				break;
1873 
1874 			memcpy(fw_file->fw_version, data, ie_len);
1875 			fw_file->fw_version[ie_len] = '\0';
1876 
1877 			ath10k_dbg(ar, ATH10K_DBG_BOOT,
1878 				   "found fw version %s\n",
1879 				    fw_file->fw_version);
1880 			break;
1881 		case ATH10K_FW_IE_TIMESTAMP:
1882 			if (ie_len != sizeof(u32))
1883 				break;
1884 
1885 			timestamp = (__le32 *)data;
1886 
1887 			ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
1888 				   le32_to_cpup(timestamp));
1889 			break;
1890 		case ATH10K_FW_IE_FEATURES:
1891 			ath10k_dbg(ar, ATH10K_DBG_BOOT,
1892 				   "found firmware features ie (%zd B)\n",
1893 				   ie_len);
1894 
1895 			for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
1896 				index = i / 8;
1897 				bit = i % 8;
1898 
1899 				if (index == ie_len)
1900 					break;
1901 
1902 				if (data[index] & (1 << bit)) {
1903 					ath10k_dbg(ar, ATH10K_DBG_BOOT,
1904 						   "Enabling feature bit: %i\n",
1905 						   i);
1906 					__set_bit(i, fw_file->fw_features);
1907 				}
1908 			}
1909 
1910 			ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
1911 					fw_file->fw_features,
1912 					sizeof(fw_file->fw_features));
1913 			break;
1914 		case ATH10K_FW_IE_FW_IMAGE:
1915 			ath10k_dbg(ar, ATH10K_DBG_BOOT,
1916 				   "found fw image ie (%zd B)\n",
1917 				   ie_len);
1918 
1919 			fw_file->firmware_data = data;
1920 			fw_file->firmware_len = ie_len;
1921 
1922 			break;
1923 		case ATH10K_FW_IE_OTP_IMAGE:
1924 			ath10k_dbg(ar, ATH10K_DBG_BOOT,
1925 				   "found otp image ie (%zd B)\n",
1926 				   ie_len);
1927 
1928 			fw_file->otp_data = data;
1929 			fw_file->otp_len = ie_len;
1930 
1931 			break;
1932 		case ATH10K_FW_IE_WMI_OP_VERSION:
1933 			if (ie_len != sizeof(u32))
1934 				break;
1935 
1936 			version = (__le32 *)data;
1937 
1938 			fw_file->wmi_op_version = le32_to_cpup(version);
1939 
1940 			ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
1941 				   fw_file->wmi_op_version);
1942 			break;
1943 		case ATH10K_FW_IE_HTT_OP_VERSION:
1944 			if (ie_len != sizeof(u32))
1945 				break;
1946 
1947 			version = (__le32 *)data;
1948 
1949 			fw_file->htt_op_version = le32_to_cpup(version);
1950 
1951 			ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
1952 				   fw_file->htt_op_version);
1953 			break;
1954 		case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
1955 			ath10k_dbg(ar, ATH10K_DBG_BOOT,
1956 				   "found fw code swap image ie (%zd B)\n",
1957 				   ie_len);
1958 			fw_file->codeswap_data = data;
1959 			fw_file->codeswap_len = ie_len;
1960 			break;
1961 		default:
1962 			ath10k_warn(ar, "Unknown FW IE: %u\n",
1963 				    le32_to_cpu(hdr->id));
1964 			break;
1965 		}
1966 
1967 		/* jump over the padding */
1968 		ie_len = ALIGN(ie_len, 4);
1969 
1970 		len -= ie_len;
1971 		data += ie_len;
1972 	}
1973 
1974 	if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) &&
1975 	    (!fw_file->firmware_data || !fw_file->firmware_len)) {
1976 		ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
1977 			    ar->hw_params.fw.dir, name);
1978 		ret = -ENOMEDIUM;
1979 		goto err;
1980 	}
1981 
1982 	return 0;
1983 
1984 err:
1985 	ath10k_core_free_firmware_files(ar);
1986 	return ret;
1987 }
1988 
1989 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name,
1990 				    size_t fw_name_len, int fw_api)
1991 {
1992 	switch (ar->hif.bus) {
1993 	case ATH10K_BUS_SDIO:
1994 	case ATH10K_BUS_USB:
1995 		scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin",
1996 			  ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus),
1997 			  fw_api);
1998 		break;
1999 	case ATH10K_BUS_PCI:
2000 	case ATH10K_BUS_AHB:
2001 	case ATH10K_BUS_SNOC:
2002 		scnprintf(fw_name, fw_name_len, "%s-%d.bin",
2003 			  ATH10K_FW_FILE_BASE, fw_api);
2004 		break;
2005 	}
2006 }
2007 
2008 static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
2009 {
2010 	int ret, i;
2011 	char fw_name[100];
2012 
2013 	/* calibration file is optional, don't check for any errors */
2014 	ath10k_fetch_cal_file(ar);
2015 
2016 	for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) {
2017 		ar->fw_api = i;
2018 		ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n",
2019 			   ar->fw_api);
2020 
2021 		ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api);
2022 		ret = ath10k_core_fetch_firmware_api_n(ar, fw_name,
2023 						       &ar->normal_mode_fw.fw_file);
2024 		if (!ret)
2025 			goto success;
2026 	}
2027 
2028 	/* we end up here if we couldn't fetch any firmware */
2029 
2030 	ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d",
2031 		   ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir,
2032 		   ret);
2033 
2034 	return ret;
2035 
2036 success:
2037 	ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
2038 
2039 	return 0;
2040 }
2041 
2042 static int ath10k_core_pre_cal_download(struct ath10k *ar)
2043 {
2044 	int ret;
2045 
2046 	ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
2047 	if (ret == 0) {
2048 		ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
2049 		goto success;
2050 	}
2051 
2052 	ath10k_dbg(ar, ATH10K_DBG_BOOT,
2053 		   "boot did not find a pre calibration file, try DT next: %d\n",
2054 		   ret);
2055 
2056 	ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
2057 	if (ret) {
2058 		ath10k_dbg(ar, ATH10K_DBG_BOOT,
2059 			   "unable to load pre cal data from DT: %d\n", ret);
2060 		return ret;
2061 	}
2062 	ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
2063 
2064 success:
2065 	ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2066 		   ath10k_cal_mode_str(ar->cal_mode));
2067 
2068 	return 0;
2069 }
2070 
2071 static int ath10k_core_pre_cal_config(struct ath10k *ar)
2072 {
2073 	int ret;
2074 
2075 	ret = ath10k_core_pre_cal_download(ar);
2076 	if (ret) {
2077 		ath10k_dbg(ar, ATH10K_DBG_BOOT,
2078 			   "failed to load pre cal data: %d\n", ret);
2079 		return ret;
2080 	}
2081 
2082 	ret = ath10k_core_get_board_id_from_otp(ar);
2083 	if (ret) {
2084 		ath10k_err(ar, "failed to get board id: %d\n", ret);
2085 		return ret;
2086 	}
2087 
2088 	ret = ath10k_download_and_run_otp(ar);
2089 	if (ret) {
2090 		ath10k_err(ar, "failed to run otp: %d\n", ret);
2091 		return ret;
2092 	}
2093 
2094 	ath10k_dbg(ar, ATH10K_DBG_BOOT,
2095 		   "pre cal configuration done successfully\n");
2096 
2097 	return 0;
2098 }
2099 
2100 static int ath10k_download_cal_data(struct ath10k *ar)
2101 {
2102 	int ret;
2103 
2104 	ret = ath10k_core_pre_cal_config(ar);
2105 	if (ret == 0)
2106 		return 0;
2107 
2108 	ath10k_dbg(ar, ATH10K_DBG_BOOT,
2109 		   "pre cal download procedure failed, try cal file: %d\n",
2110 		   ret);
2111 
2112 	ret = ath10k_download_cal_file(ar, ar->cal_file);
2113 	if (ret == 0) {
2114 		ar->cal_mode = ATH10K_CAL_MODE_FILE;
2115 		goto done;
2116 	}
2117 
2118 	ath10k_dbg(ar, ATH10K_DBG_BOOT,
2119 		   "boot did not find a calibration file, try DT next: %d\n",
2120 		   ret);
2121 
2122 	ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
2123 	if (ret == 0) {
2124 		ar->cal_mode = ATH10K_CAL_MODE_DT;
2125 		goto done;
2126 	}
2127 
2128 	ath10k_dbg(ar, ATH10K_DBG_BOOT,
2129 		   "boot did not find DT entry, try target EEPROM next: %d\n",
2130 		   ret);
2131 
2132 	ret = ath10k_download_cal_eeprom(ar);
2133 	if (ret == 0) {
2134 		ar->cal_mode = ATH10K_CAL_MODE_EEPROM;
2135 		goto done;
2136 	}
2137 
2138 	ath10k_dbg(ar, ATH10K_DBG_BOOT,
2139 		   "boot did not find target EEPROM entry, try OTP next: %d\n",
2140 		   ret);
2141 
2142 	ret = ath10k_download_and_run_otp(ar);
2143 	if (ret) {
2144 		ath10k_err(ar, "failed to run otp: %d\n", ret);
2145 		return ret;
2146 	}
2147 
2148 	ar->cal_mode = ATH10K_CAL_MODE_OTP;
2149 
2150 done:
2151 	ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2152 		   ath10k_cal_mode_str(ar->cal_mode));
2153 	return 0;
2154 }
2155 
2156 static void ath10k_core_fetch_btcoex_dt(struct ath10k *ar)
2157 {
2158 	struct device_node *node;
2159 	u8 coex_support = 0;
2160 	int ret;
2161 
2162 	node = ar->dev->of_node;
2163 	if (!node)
2164 		goto out;
2165 
2166 	ret = of_property_read_u8(node, "qcom,coexist-support", &coex_support);
2167 	if (ret) {
2168 		ar->coex_support = true;
2169 		goto out;
2170 	}
2171 
2172 	if (coex_support) {
2173 		ar->coex_support = true;
2174 	} else {
2175 		ar->coex_support = false;
2176 		ar->coex_gpio_pin = -1;
2177 		goto out;
2178 	}
2179 
2180 	ret = of_property_read_u32(node, "qcom,coexist-gpio-pin",
2181 				   &ar->coex_gpio_pin);
2182 	if (ret)
2183 		ar->coex_gpio_pin = -1;
2184 
2185 out:
2186 	ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot coex_support %d coex_gpio_pin %d\n",
2187 		   ar->coex_support, ar->coex_gpio_pin);
2188 }
2189 
2190 static int ath10k_init_uart(struct ath10k *ar)
2191 {
2192 	int ret;
2193 
2194 	/*
2195 	 * Explicitly setting UART prints to zero as target turns it on
2196 	 * based on scratch registers.
2197 	 */
2198 	ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
2199 	if (ret) {
2200 		ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
2201 		return ret;
2202 	}
2203 
2204 	if (!uart_print) {
2205 		if (ar->hw_params.uart_pin_workaround) {
2206 			ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin,
2207 						 ar->hw_params.uart_pin);
2208 			if (ret) {
2209 				ath10k_warn(ar, "failed to set UART TX pin: %d",
2210 					    ret);
2211 				return ret;
2212 			}
2213 		}
2214 
2215 		return 0;
2216 	}
2217 
2218 	ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
2219 	if (ret) {
2220 		ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2221 		return ret;
2222 	}
2223 
2224 	ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
2225 	if (ret) {
2226 		ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2227 		return ret;
2228 	}
2229 
2230 	/* Set the UART baud rate to 19200. */
2231 	ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
2232 	if (ret) {
2233 		ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
2234 		return ret;
2235 	}
2236 
2237 	ath10k_info(ar, "UART prints enabled\n");
2238 	return 0;
2239 }
2240 
2241 static int ath10k_init_hw_params(struct ath10k *ar)
2242 {
2243 	const struct ath10k_hw_params *uninitialized_var(hw_params);
2244 	int i;
2245 
2246 	for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
2247 		hw_params = &ath10k_hw_params_list[i];
2248 
2249 		if (hw_params->bus == ar->hif.bus &&
2250 		    hw_params->id == ar->target_version &&
2251 		    hw_params->dev_id == ar->dev_id)
2252 			break;
2253 	}
2254 
2255 	if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
2256 		ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
2257 			   ar->target_version);
2258 		return -EINVAL;
2259 	}
2260 
2261 	ar->hw_params = *hw_params;
2262 
2263 	ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
2264 		   ar->hw_params.name, ar->target_version);
2265 
2266 	return 0;
2267 }
2268 
2269 static void ath10k_core_restart(struct work_struct *work)
2270 {
2271 	struct ath10k *ar = container_of(work, struct ath10k, restart_work);
2272 	int ret;
2273 
2274 	set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2275 
2276 	/* Place a barrier to make sure the compiler doesn't reorder
2277 	 * CRASH_FLUSH and calling other functions.
2278 	 */
2279 	barrier();
2280 
2281 	ieee80211_stop_queues(ar->hw);
2282 	ath10k_drain_tx(ar);
2283 	complete(&ar->scan.started);
2284 	complete(&ar->scan.completed);
2285 	complete(&ar->scan.on_channel);
2286 	complete(&ar->offchan_tx_completed);
2287 	complete(&ar->install_key_done);
2288 	complete(&ar->vdev_setup_done);
2289 	complete(&ar->vdev_delete_done);
2290 	complete(&ar->thermal.wmi_sync);
2291 	complete(&ar->bss_survey_done);
2292 	wake_up(&ar->htt.empty_tx_wq);
2293 	wake_up(&ar->wmi.tx_credits_wq);
2294 	wake_up(&ar->peer_mapping_wq);
2295 
2296 	/* TODO: We can have one instance of cancelling coverage_class_work by
2297 	 * moving it to ath10k_halt(), so that both stop() and restart() would
2298 	 * call that but it takes conf_mutex() and if we call cancel_work_sync()
2299 	 * with conf_mutex it will deadlock.
2300 	 */
2301 	cancel_work_sync(&ar->set_coverage_class_work);
2302 
2303 	mutex_lock(&ar->conf_mutex);
2304 
2305 	switch (ar->state) {
2306 	case ATH10K_STATE_ON:
2307 		ar->state = ATH10K_STATE_RESTARTING;
2308 		ath10k_halt(ar);
2309 		ath10k_scan_finish(ar);
2310 		ieee80211_restart_hw(ar->hw);
2311 		break;
2312 	case ATH10K_STATE_OFF:
2313 		/* this can happen if driver is being unloaded
2314 		 * or if the crash happens during FW probing
2315 		 */
2316 		ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
2317 		break;
2318 	case ATH10K_STATE_RESTARTING:
2319 		/* hw restart might be requested from multiple places */
2320 		break;
2321 	case ATH10K_STATE_RESTARTED:
2322 		ar->state = ATH10K_STATE_WEDGED;
2323 		/* fall through */
2324 	case ATH10K_STATE_WEDGED:
2325 		ath10k_warn(ar, "device is wedged, will not restart\n");
2326 		break;
2327 	case ATH10K_STATE_UTF:
2328 		ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
2329 		break;
2330 	}
2331 
2332 	mutex_unlock(&ar->conf_mutex);
2333 
2334 	ret = ath10k_coredump_submit(ar);
2335 	if (ret)
2336 		ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d",
2337 			    ret);
2338 
2339 	complete(&ar->driver_recovery);
2340 }
2341 
2342 static void ath10k_core_set_coverage_class_work(struct work_struct *work)
2343 {
2344 	struct ath10k *ar = container_of(work, struct ath10k,
2345 					 set_coverage_class_work);
2346 
2347 	if (ar->hw_params.hw_ops->set_coverage_class)
2348 		ar->hw_params.hw_ops->set_coverage_class(ar, -1);
2349 }
2350 
2351 static int ath10k_core_init_firmware_features(struct ath10k *ar)
2352 {
2353 	struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2354 	int max_num_peers;
2355 
2356 	if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) &&
2357 	    !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2358 		ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
2359 		return -EINVAL;
2360 	}
2361 
2362 	if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
2363 		ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
2364 			   ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version);
2365 		return -EINVAL;
2366 	}
2367 
2368 	ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
2369 	switch (ath10k_cryptmode_param) {
2370 	case ATH10K_CRYPT_MODE_HW:
2371 		clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2372 		clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2373 		break;
2374 	case ATH10K_CRYPT_MODE_SW:
2375 		if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2376 			      fw_file->fw_features)) {
2377 			ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
2378 			return -EINVAL;
2379 		}
2380 
2381 		set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2382 		set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2383 		break;
2384 	default:
2385 		ath10k_info(ar, "invalid cryptmode: %d\n",
2386 			    ath10k_cryptmode_param);
2387 		return -EINVAL;
2388 	}
2389 
2390 	ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
2391 	ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
2392 
2393 	if (rawmode) {
2394 		if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2395 			      fw_file->fw_features)) {
2396 			ath10k_err(ar, "rawmode = 1 requires support from firmware");
2397 			return -EINVAL;
2398 		}
2399 		set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2400 	}
2401 
2402 	if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
2403 		ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
2404 
2405 		/* Workaround:
2406 		 *
2407 		 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
2408 		 * and causes enormous performance issues (malformed frames,
2409 		 * etc).
2410 		 *
2411 		 * Disabling A-MSDU makes RAW mode stable with heavy traffic
2412 		 * albeit a bit slower compared to regular operation.
2413 		 */
2414 		ar->htt.max_num_amsdu = 1;
2415 	}
2416 
2417 	/* Backwards compatibility for firmwares without
2418 	 * ATH10K_FW_IE_WMI_OP_VERSION.
2419 	 */
2420 	if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
2421 		if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2422 			if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
2423 				     fw_file->fw_features))
2424 				fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
2425 			else
2426 				fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
2427 		} else {
2428 			fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
2429 		}
2430 	}
2431 
2432 	switch (fw_file->wmi_op_version) {
2433 	case ATH10K_FW_WMI_OP_VERSION_MAIN:
2434 		max_num_peers = TARGET_NUM_PEERS;
2435 		ar->max_num_stations = TARGET_NUM_STATIONS;
2436 		ar->max_num_vdevs = TARGET_NUM_VDEVS;
2437 		ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
2438 		ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
2439 			WMI_STAT_PEER;
2440 		ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2441 		break;
2442 	case ATH10K_FW_WMI_OP_VERSION_10_1:
2443 	case ATH10K_FW_WMI_OP_VERSION_10_2:
2444 	case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2445 		if (ath10k_peer_stats_enabled(ar)) {
2446 			max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
2447 			ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
2448 		} else {
2449 			max_num_peers = TARGET_10X_NUM_PEERS;
2450 			ar->max_num_stations = TARGET_10X_NUM_STATIONS;
2451 		}
2452 		ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
2453 		ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
2454 		ar->fw_stats_req_mask = WMI_STAT_PEER;
2455 		ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2456 		break;
2457 	case ATH10K_FW_WMI_OP_VERSION_TLV:
2458 		max_num_peers = TARGET_TLV_NUM_PEERS;
2459 		ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
2460 		ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
2461 		ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
2462 		if (ar->hif.bus == ATH10K_BUS_SDIO)
2463 			ar->htt.max_num_pending_tx =
2464 				TARGET_TLV_NUM_MSDU_DESC_HL;
2465 		else
2466 			ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
2467 		ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
2468 		ar->fw_stats_req_mask = WMI_TLV_STAT_PDEV | WMI_TLV_STAT_VDEV |
2469 			WMI_TLV_STAT_PEER | WMI_TLV_STAT_PEER_EXTD;
2470 		ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2471 		ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC;
2472 		break;
2473 	case ATH10K_FW_WMI_OP_VERSION_10_4:
2474 		max_num_peers = TARGET_10_4_NUM_PEERS;
2475 		ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
2476 		ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
2477 		ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
2478 		ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
2479 		ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
2480 					WMI_10_4_STAT_PEER_EXTD |
2481 					WMI_10_4_STAT_VDEV_EXTD;
2482 		ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
2483 		ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS;
2484 
2485 		if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
2486 			     fw_file->fw_features))
2487 			ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
2488 		else
2489 			ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
2490 		break;
2491 	case ATH10K_FW_WMI_OP_VERSION_UNSET:
2492 	case ATH10K_FW_WMI_OP_VERSION_MAX:
2493 	default:
2494 		WARN_ON(1);
2495 		return -EINVAL;
2496 	}
2497 
2498 	if (ar->hw_params.num_peers)
2499 		ar->max_num_peers = ar->hw_params.num_peers;
2500 	else
2501 		ar->max_num_peers = max_num_peers;
2502 
2503 	/* Backwards compatibility for firmwares without
2504 	 * ATH10K_FW_IE_HTT_OP_VERSION.
2505 	 */
2506 	if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
2507 		switch (fw_file->wmi_op_version) {
2508 		case ATH10K_FW_WMI_OP_VERSION_MAIN:
2509 			fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
2510 			break;
2511 		case ATH10K_FW_WMI_OP_VERSION_10_1:
2512 		case ATH10K_FW_WMI_OP_VERSION_10_2:
2513 		case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2514 			fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
2515 			break;
2516 		case ATH10K_FW_WMI_OP_VERSION_TLV:
2517 			fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
2518 			break;
2519 		case ATH10K_FW_WMI_OP_VERSION_10_4:
2520 		case ATH10K_FW_WMI_OP_VERSION_UNSET:
2521 		case ATH10K_FW_WMI_OP_VERSION_MAX:
2522 			ath10k_err(ar, "htt op version not found from fw meta data");
2523 			return -EINVAL;
2524 		}
2525 	}
2526 
2527 	return 0;
2528 }
2529 
2530 static int ath10k_core_reset_rx_filter(struct ath10k *ar)
2531 {
2532 	int ret;
2533 	int vdev_id;
2534 	int vdev_type;
2535 	int vdev_subtype;
2536 	const u8 *vdev_addr;
2537 
2538 	vdev_id = 0;
2539 	vdev_type = WMI_VDEV_TYPE_STA;
2540 	vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE);
2541 	vdev_addr = ar->mac_addr;
2542 
2543 	ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype,
2544 				     vdev_addr);
2545 	if (ret) {
2546 		ath10k_err(ar, "failed to create dummy vdev: %d\n", ret);
2547 		return ret;
2548 	}
2549 
2550 	ret = ath10k_wmi_vdev_delete(ar, vdev_id);
2551 	if (ret) {
2552 		ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret);
2553 		return ret;
2554 	}
2555 
2556 	/* WMI and HTT may use separate HIF pipes and are not guaranteed to be
2557 	 * serialized properly implicitly.
2558 	 *
2559 	 * Moreover (most) WMI commands have no explicit acknowledges. It is
2560 	 * possible to infer it implicitly by poking firmware with echo
2561 	 * command - getting a reply means all preceding comments have been
2562 	 * (mostly) processed.
2563 	 *
2564 	 * In case of vdev create/delete this is sufficient.
2565 	 *
2566 	 * Without this it's possible to end up with a race when HTT Rx ring is
2567 	 * started before vdev create/delete hack is complete allowing a short
2568 	 * window of opportunity to receive (and Tx ACK) a bunch of frames.
2569 	 */
2570 	ret = ath10k_wmi_barrier(ar);
2571 	if (ret) {
2572 		ath10k_err(ar, "failed to ping firmware: %d\n", ret);
2573 		return ret;
2574 	}
2575 
2576 	return 0;
2577 }
2578 
2579 static int ath10k_core_compat_services(struct ath10k *ar)
2580 {
2581 	struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2582 
2583 	/* all 10.x firmware versions support thermal throttling but don't
2584 	 * advertise the support via service flags so we have to hardcode
2585 	 * it here
2586 	 */
2587 	switch (fw_file->wmi_op_version) {
2588 	case ATH10K_FW_WMI_OP_VERSION_10_1:
2589 	case ATH10K_FW_WMI_OP_VERSION_10_2:
2590 	case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2591 	case ATH10K_FW_WMI_OP_VERSION_10_4:
2592 		set_bit(WMI_SERVICE_THERM_THROT, ar->wmi.svc_map);
2593 		break;
2594 	default:
2595 		break;
2596 	}
2597 
2598 	return 0;
2599 }
2600 
2601 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
2602 		      const struct ath10k_fw_components *fw)
2603 {
2604 	int status;
2605 	u32 val;
2606 
2607 	lockdep_assert_held(&ar->conf_mutex);
2608 
2609 	clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2610 
2611 	ar->running_fw = fw;
2612 
2613 	if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2614 		      ar->running_fw->fw_file.fw_features)) {
2615 		ath10k_bmi_start(ar);
2616 
2617 		if (ath10k_init_configure_target(ar)) {
2618 			status = -EINVAL;
2619 			goto err;
2620 		}
2621 
2622 		status = ath10k_download_cal_data(ar);
2623 		if (status)
2624 			goto err;
2625 
2626 		/* Some of of qca988x solutions are having global reset issue
2627 		 * during target initialization. Bypassing PLL setting before
2628 		 * downloading firmware and letting the SoC run on REF_CLK is
2629 		 * fixing the problem. Corresponding firmware change is also
2630 		 * needed to set the clock source once the target is
2631 		 * initialized.
2632 		 */
2633 		if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
2634 			     ar->running_fw->fw_file.fw_features)) {
2635 			status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
2636 			if (status) {
2637 				ath10k_err(ar, "could not write to skip_clock_init: %d\n",
2638 					   status);
2639 				goto err;
2640 			}
2641 		}
2642 
2643 		status = ath10k_download_fw(ar);
2644 		if (status)
2645 			goto err;
2646 
2647 		status = ath10k_init_uart(ar);
2648 		if (status)
2649 			goto err;
2650 
2651 		if (ar->hif.bus == ATH10K_BUS_SDIO) {
2652 			status = ath10k_init_sdio(ar, mode);
2653 			if (status) {
2654 				ath10k_err(ar, "failed to init SDIO: %d\n", status);
2655 				goto err;
2656 			}
2657 		}
2658 	}
2659 
2660 	ar->htc.htc_ops.target_send_suspend_complete =
2661 		ath10k_send_suspend_complete;
2662 
2663 	status = ath10k_htc_init(ar);
2664 	if (status) {
2665 		ath10k_err(ar, "could not init HTC (%d)\n", status);
2666 		goto err;
2667 	}
2668 
2669 	if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
2670 		      ar->running_fw->fw_file.fw_features)) {
2671 		status = ath10k_bmi_done(ar);
2672 		if (status)
2673 			goto err;
2674 	}
2675 
2676 	status = ath10k_wmi_attach(ar);
2677 	if (status) {
2678 		ath10k_err(ar, "WMI attach failed: %d\n", status);
2679 		goto err;
2680 	}
2681 
2682 	status = ath10k_htt_init(ar);
2683 	if (status) {
2684 		ath10k_err(ar, "failed to init htt: %d\n", status);
2685 		goto err_wmi_detach;
2686 	}
2687 
2688 	status = ath10k_htt_tx_start(&ar->htt);
2689 	if (status) {
2690 		ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
2691 		goto err_wmi_detach;
2692 	}
2693 
2694 	/* If firmware indicates Full Rx Reorder support it must be used in a
2695 	 * slightly different manner. Let HTT code know.
2696 	 */
2697 	ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
2698 						ar->wmi.svc_map));
2699 
2700 	status = ath10k_htt_rx_alloc(&ar->htt);
2701 	if (status) {
2702 		ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
2703 		goto err_htt_tx_detach;
2704 	}
2705 
2706 	status = ath10k_hif_start(ar);
2707 	if (status) {
2708 		ath10k_err(ar, "could not start HIF: %d\n", status);
2709 		goto err_htt_rx_detach;
2710 	}
2711 
2712 	status = ath10k_htc_wait_target(&ar->htc);
2713 	if (status) {
2714 		ath10k_err(ar, "failed to connect to HTC: %d\n", status);
2715 		goto err_hif_stop;
2716 	}
2717 
2718 	status = ath10k_hif_start_post(ar);
2719 	if (status) {
2720 		ath10k_err(ar, "failed to swap mailbox: %d\n", status);
2721 		goto err_hif_stop;
2722 	}
2723 
2724 	if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2725 		status = ath10k_htt_connect(&ar->htt);
2726 		if (status) {
2727 			ath10k_err(ar, "failed to connect htt (%d)\n", status);
2728 			goto err_hif_stop;
2729 		}
2730 	}
2731 
2732 	status = ath10k_wmi_connect(ar);
2733 	if (status) {
2734 		ath10k_err(ar, "could not connect wmi: %d\n", status);
2735 		goto err_hif_stop;
2736 	}
2737 
2738 	status = ath10k_htc_start(&ar->htc);
2739 	if (status) {
2740 		ath10k_err(ar, "failed to start htc: %d\n", status);
2741 		goto err_hif_stop;
2742 	}
2743 
2744 	if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2745 		status = ath10k_wmi_wait_for_service_ready(ar);
2746 		if (status) {
2747 			ath10k_warn(ar, "wmi service ready event not received");
2748 			goto err_hif_stop;
2749 		}
2750 	}
2751 
2752 	ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
2753 		   ar->hw->wiphy->fw_version);
2754 
2755 	if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) &&
2756 	    mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2757 		val = 0;
2758 		if (ath10k_peer_stats_enabled(ar))
2759 			val = WMI_10_4_PEER_STATS;
2760 
2761 		/* Enable vdev stats by default */
2762 		val |= WMI_10_4_VDEV_STATS;
2763 
2764 		if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
2765 			val |= WMI_10_4_BSS_CHANNEL_INFO_64;
2766 
2767 		ath10k_core_fetch_btcoex_dt(ar);
2768 
2769 		/* 10.4 firmware supports BT-Coex without reloading firmware
2770 		 * via pdev param. To support Bluetooth coexistence pdev param,
2771 		 * WMI_COEX_GPIO_SUPPORT of extended resource config should be
2772 		 * enabled always.
2773 		 *
2774 		 * We can still enable BTCOEX if firmware has the support
2775 		 * eventhough btceox_support value is
2776 		 * ATH10K_DT_BTCOEX_NOT_FOUND
2777 		 */
2778 
2779 		if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
2780 		    test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
2781 			     ar->running_fw->fw_file.fw_features) &&
2782 		    ar->coex_support)
2783 			val |= WMI_10_4_COEX_GPIO_SUPPORT;
2784 
2785 		if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
2786 			     ar->wmi.svc_map))
2787 			val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY;
2788 
2789 		if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
2790 			     ar->wmi.svc_map))
2791 			val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA;
2792 
2793 		if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI,
2794 			     ar->wmi.svc_map))
2795 			val |= WMI_10_4_TX_DATA_ACK_RSSI;
2796 
2797 		if (test_bit(WMI_SERVICE_REPORT_AIRTIME, ar->wmi.svc_map))
2798 			val |= WMI_10_4_REPORT_AIRTIME;
2799 
2800 		status = ath10k_mac_ext_resource_config(ar, val);
2801 		if (status) {
2802 			ath10k_err(ar,
2803 				   "failed to send ext resource cfg command : %d\n",
2804 				   status);
2805 			goto err_hif_stop;
2806 		}
2807 	}
2808 
2809 	status = ath10k_wmi_cmd_init(ar);
2810 	if (status) {
2811 		ath10k_err(ar, "could not send WMI init command (%d)\n",
2812 			   status);
2813 		goto err_hif_stop;
2814 	}
2815 
2816 	status = ath10k_wmi_wait_for_unified_ready(ar);
2817 	if (status) {
2818 		ath10k_err(ar, "wmi unified ready event not received\n");
2819 		goto err_hif_stop;
2820 	}
2821 
2822 	status = ath10k_core_compat_services(ar);
2823 	if (status) {
2824 		ath10k_err(ar, "compat services failed: %d\n", status);
2825 		goto err_hif_stop;
2826 	}
2827 
2828 	status = ath10k_wmi_pdev_set_base_macaddr(ar, ar->mac_addr);
2829 	if (status && status != -EOPNOTSUPP) {
2830 		ath10k_err(ar,
2831 			   "failed to set base mac address: %d\n", status);
2832 		goto err_hif_stop;
2833 	}
2834 
2835 	/* Some firmware revisions do not properly set up hardware rx filter
2836 	 * registers.
2837 	 *
2838 	 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK
2839 	 * is filled with 0s instead of 1s allowing HW to respond with ACKs to
2840 	 * any frames that matches MAC_PCU_RX_FILTER which is also
2841 	 * misconfigured to accept anything.
2842 	 *
2843 	 * The ADDR1 is programmed using internal firmware structure field and
2844 	 * can't be (easily/sanely) reached from the driver explicitly. It is
2845 	 * possible to implicitly make it correct by creating a dummy vdev and
2846 	 * then deleting it.
2847 	 */
2848 	if (ar->hw_params.hw_filter_reset_required &&
2849 	    mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2850 		status = ath10k_core_reset_rx_filter(ar);
2851 		if (status) {
2852 			ath10k_err(ar,
2853 				   "failed to reset rx filter: %d\n", status);
2854 			goto err_hif_stop;
2855 		}
2856 	}
2857 
2858 	status = ath10k_htt_rx_ring_refill(ar);
2859 	if (status) {
2860 		ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
2861 		goto err_hif_stop;
2862 	}
2863 
2864 	if (ar->max_num_vdevs >= 64)
2865 		ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL;
2866 	else
2867 		ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
2868 
2869 	INIT_LIST_HEAD(&ar->arvifs);
2870 
2871 	/* we don't care about HTT in UTF mode */
2872 	if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2873 		status = ath10k_htt_setup(&ar->htt);
2874 		if (status) {
2875 			ath10k_err(ar, "failed to setup htt: %d\n", status);
2876 			goto err_hif_stop;
2877 		}
2878 	}
2879 
2880 	status = ath10k_debug_start(ar);
2881 	if (status)
2882 		goto err_hif_stop;
2883 
2884 	status = ath10k_hif_set_target_log_mode(ar, fw_diag_log);
2885 	if (status && status != -EOPNOTSUPP) {
2886 		ath10k_warn(ar, "set target log mode failed: %d\n", status);
2887 		goto err_hif_stop;
2888 	}
2889 
2890 	return 0;
2891 
2892 err_hif_stop:
2893 	ath10k_hif_stop(ar);
2894 err_htt_rx_detach:
2895 	ath10k_htt_rx_free(&ar->htt);
2896 err_htt_tx_detach:
2897 	ath10k_htt_tx_free(&ar->htt);
2898 err_wmi_detach:
2899 	ath10k_wmi_detach(ar);
2900 err:
2901 	return status;
2902 }
2903 EXPORT_SYMBOL(ath10k_core_start);
2904 
2905 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
2906 {
2907 	int ret;
2908 	unsigned long time_left;
2909 
2910 	reinit_completion(&ar->target_suspend);
2911 
2912 	ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
2913 	if (ret) {
2914 		ath10k_warn(ar, "could not suspend target (%d)\n", ret);
2915 		return ret;
2916 	}
2917 
2918 	time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
2919 
2920 	if (!time_left) {
2921 		ath10k_warn(ar, "suspend timed out - target pause event never came\n");
2922 		return -ETIMEDOUT;
2923 	}
2924 
2925 	return 0;
2926 }
2927 
2928 void ath10k_core_stop(struct ath10k *ar)
2929 {
2930 	lockdep_assert_held(&ar->conf_mutex);
2931 	ath10k_debug_stop(ar);
2932 
2933 	/* try to suspend target */
2934 	if (ar->state != ATH10K_STATE_RESTARTING &&
2935 	    ar->state != ATH10K_STATE_UTF)
2936 		ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
2937 
2938 	ath10k_hif_stop(ar);
2939 	ath10k_htt_tx_stop(&ar->htt);
2940 	ath10k_htt_rx_free(&ar->htt);
2941 	ath10k_wmi_detach(ar);
2942 
2943 	ar->id.bmi_ids_valid = false;
2944 }
2945 EXPORT_SYMBOL(ath10k_core_stop);
2946 
2947 /* mac80211 manages fw/hw initialization through start/stop hooks. However in
2948  * order to know what hw capabilities should be advertised to mac80211 it is
2949  * necessary to load the firmware (and tear it down immediately since start
2950  * hook will try to init it again) before registering
2951  */
2952 static int ath10k_core_probe_fw(struct ath10k *ar)
2953 {
2954 	struct bmi_target_info target_info;
2955 	int ret = 0;
2956 
2957 	ret = ath10k_hif_power_up(ar, ATH10K_FIRMWARE_MODE_NORMAL);
2958 	if (ret) {
2959 		ath10k_err(ar, "could not power on hif bus (%d)\n", ret);
2960 		return ret;
2961 	}
2962 
2963 	switch (ar->hif.bus) {
2964 	case ATH10K_BUS_SDIO:
2965 		memset(&target_info, 0, sizeof(target_info));
2966 		ret = ath10k_bmi_get_target_info_sdio(ar, &target_info);
2967 		if (ret) {
2968 			ath10k_err(ar, "could not get target info (%d)\n", ret);
2969 			goto err_power_down;
2970 		}
2971 		ar->target_version = target_info.version;
2972 		ar->hw->wiphy->hw_version = target_info.version;
2973 		break;
2974 	case ATH10K_BUS_PCI:
2975 	case ATH10K_BUS_AHB:
2976 	case ATH10K_BUS_USB:
2977 		memset(&target_info, 0, sizeof(target_info));
2978 		ret = ath10k_bmi_get_target_info(ar, &target_info);
2979 		if (ret) {
2980 			ath10k_err(ar, "could not get target info (%d)\n", ret);
2981 			goto err_power_down;
2982 		}
2983 		ar->target_version = target_info.version;
2984 		ar->hw->wiphy->hw_version = target_info.version;
2985 		break;
2986 	case ATH10K_BUS_SNOC:
2987 		memset(&target_info, 0, sizeof(target_info));
2988 		ret = ath10k_hif_get_target_info(ar, &target_info);
2989 		if (ret) {
2990 			ath10k_err(ar, "could not get target info (%d)\n", ret);
2991 			goto err_power_down;
2992 		}
2993 		ar->target_version = target_info.version;
2994 		ar->hw->wiphy->hw_version = target_info.version;
2995 		break;
2996 	default:
2997 		ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus);
2998 	}
2999 
3000 	ret = ath10k_init_hw_params(ar);
3001 	if (ret) {
3002 		ath10k_err(ar, "could not get hw params (%d)\n", ret);
3003 		goto err_power_down;
3004 	}
3005 
3006 	ret = ath10k_core_fetch_firmware_files(ar);
3007 	if (ret) {
3008 		ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
3009 		goto err_power_down;
3010 	}
3011 
3012 	BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) !=
3013 		     sizeof(ar->normal_mode_fw.fw_file.fw_version));
3014 	memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version,
3015 	       sizeof(ar->hw->wiphy->fw_version));
3016 
3017 	ath10k_debug_print_hwfw_info(ar);
3018 
3019 	if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3020 		      ar->normal_mode_fw.fw_file.fw_features)) {
3021 		ret = ath10k_core_pre_cal_download(ar);
3022 		if (ret) {
3023 			/* pre calibration data download is not necessary
3024 			 * for all the chipsets. Ignore failures and continue.
3025 			 */
3026 			ath10k_dbg(ar, ATH10K_DBG_BOOT,
3027 				   "could not load pre cal data: %d\n", ret);
3028 		}
3029 
3030 		ret = ath10k_core_get_board_id_from_otp(ar);
3031 		if (ret && ret != -EOPNOTSUPP) {
3032 			ath10k_err(ar, "failed to get board id from otp: %d\n",
3033 				   ret);
3034 			goto err_free_firmware_files;
3035 		}
3036 
3037 		ret = ath10k_core_check_smbios(ar);
3038 		if (ret)
3039 			ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n");
3040 
3041 		ret = ath10k_core_check_dt(ar);
3042 		if (ret)
3043 			ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n");
3044 
3045 		ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD);
3046 		if (ret) {
3047 			ath10k_err(ar, "failed to fetch board file: %d\n", ret);
3048 			goto err_free_firmware_files;
3049 		}
3050 
3051 		ath10k_debug_print_board_info(ar);
3052 	}
3053 
3054 	device_get_mac_address(ar->dev, ar->mac_addr, sizeof(ar->mac_addr));
3055 
3056 	ret = ath10k_core_init_firmware_features(ar);
3057 	if (ret) {
3058 		ath10k_err(ar, "fatal problem with firmware features: %d\n",
3059 			   ret);
3060 		goto err_free_firmware_files;
3061 	}
3062 
3063 	if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3064 		      ar->normal_mode_fw.fw_file.fw_features)) {
3065 		ret = ath10k_swap_code_seg_init(ar,
3066 						&ar->normal_mode_fw.fw_file);
3067 		if (ret) {
3068 			ath10k_err(ar, "failed to initialize code swap segment: %d\n",
3069 				   ret);
3070 			goto err_free_firmware_files;
3071 		}
3072 	}
3073 
3074 	mutex_lock(&ar->conf_mutex);
3075 
3076 	ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL,
3077 				&ar->normal_mode_fw);
3078 	if (ret) {
3079 		ath10k_err(ar, "could not init core (%d)\n", ret);
3080 		goto err_unlock;
3081 	}
3082 
3083 	ath10k_debug_print_boot_info(ar);
3084 	ath10k_core_stop(ar);
3085 
3086 	mutex_unlock(&ar->conf_mutex);
3087 
3088 	ath10k_hif_power_down(ar);
3089 	return 0;
3090 
3091 err_unlock:
3092 	mutex_unlock(&ar->conf_mutex);
3093 
3094 err_free_firmware_files:
3095 	ath10k_core_free_firmware_files(ar);
3096 
3097 err_power_down:
3098 	ath10k_hif_power_down(ar);
3099 
3100 	return ret;
3101 }
3102 
3103 static void ath10k_core_register_work(struct work_struct *work)
3104 {
3105 	struct ath10k *ar = container_of(work, struct ath10k, register_work);
3106 	int status;
3107 
3108 	/* peer stats are enabled by default */
3109 	set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags);
3110 
3111 	status = ath10k_core_probe_fw(ar);
3112 	if (status) {
3113 		ath10k_err(ar, "could not probe fw (%d)\n", status);
3114 		goto err;
3115 	}
3116 
3117 	status = ath10k_mac_register(ar);
3118 	if (status) {
3119 		ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
3120 		goto err_release_fw;
3121 	}
3122 
3123 	status = ath10k_coredump_register(ar);
3124 	if (status) {
3125 		ath10k_err(ar, "unable to register coredump\n");
3126 		goto err_unregister_mac;
3127 	}
3128 
3129 	status = ath10k_debug_register(ar);
3130 	if (status) {
3131 		ath10k_err(ar, "unable to initialize debugfs\n");
3132 		goto err_unregister_coredump;
3133 	}
3134 
3135 	status = ath10k_spectral_create(ar);
3136 	if (status) {
3137 		ath10k_err(ar, "failed to initialize spectral\n");
3138 		goto err_debug_destroy;
3139 	}
3140 
3141 	status = ath10k_thermal_register(ar);
3142 	if (status) {
3143 		ath10k_err(ar, "could not register thermal device: %d\n",
3144 			   status);
3145 		goto err_spectral_destroy;
3146 	}
3147 
3148 	set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
3149 	return;
3150 
3151 err_spectral_destroy:
3152 	ath10k_spectral_destroy(ar);
3153 err_debug_destroy:
3154 	ath10k_debug_destroy(ar);
3155 err_unregister_coredump:
3156 	ath10k_coredump_unregister(ar);
3157 err_unregister_mac:
3158 	ath10k_mac_unregister(ar);
3159 err_release_fw:
3160 	ath10k_core_free_firmware_files(ar);
3161 err:
3162 	/* TODO: It's probably a good idea to release device from the driver
3163 	 * but calling device_release_driver() here will cause a deadlock.
3164 	 */
3165 	return;
3166 }
3167 
3168 int ath10k_core_register(struct ath10k *ar,
3169 			 const struct ath10k_bus_params *bus_params)
3170 {
3171 	ar->bus_param = *bus_params;
3172 
3173 	queue_work(ar->workqueue, &ar->register_work);
3174 
3175 	return 0;
3176 }
3177 EXPORT_SYMBOL(ath10k_core_register);
3178 
3179 void ath10k_core_unregister(struct ath10k *ar)
3180 {
3181 	cancel_work_sync(&ar->register_work);
3182 
3183 	if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
3184 		return;
3185 
3186 	ath10k_thermal_unregister(ar);
3187 	/* Stop spectral before unregistering from mac80211 to remove the
3188 	 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
3189 	 * would be already be free'd recursively, leading to a double free.
3190 	 */
3191 	ath10k_spectral_destroy(ar);
3192 
3193 	/* We must unregister from mac80211 before we stop HTC and HIF.
3194 	 * Otherwise we will fail to submit commands to FW and mac80211 will be
3195 	 * unhappy about callback failures.
3196 	 */
3197 	ath10k_mac_unregister(ar);
3198 
3199 	ath10k_testmode_destroy(ar);
3200 
3201 	ath10k_core_free_firmware_files(ar);
3202 	ath10k_core_free_board_files(ar);
3203 
3204 	ath10k_debug_unregister(ar);
3205 }
3206 EXPORT_SYMBOL(ath10k_core_unregister);
3207 
3208 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
3209 				  enum ath10k_bus bus,
3210 				  enum ath10k_hw_rev hw_rev,
3211 				  const struct ath10k_hif_ops *hif_ops)
3212 {
3213 	struct ath10k *ar;
3214 	int ret;
3215 
3216 	ar = ath10k_mac_create(priv_size);
3217 	if (!ar)
3218 		return NULL;
3219 
3220 	ar->ath_common.priv = ar;
3221 	ar->ath_common.hw = ar->hw;
3222 	ar->dev = dev;
3223 	ar->hw_rev = hw_rev;
3224 	ar->hif.ops = hif_ops;
3225 	ar->hif.bus = bus;
3226 
3227 	switch (hw_rev) {
3228 	case ATH10K_HW_QCA988X:
3229 	case ATH10K_HW_QCA9887:
3230 		ar->regs = &qca988x_regs;
3231 		ar->hw_ce_regs = &qcax_ce_regs;
3232 		ar->hw_values = &qca988x_values;
3233 		break;
3234 	case ATH10K_HW_QCA6174:
3235 	case ATH10K_HW_QCA9377:
3236 		ar->regs = &qca6174_regs;
3237 		ar->hw_ce_regs = &qcax_ce_regs;
3238 		ar->hw_values = &qca6174_values;
3239 		break;
3240 	case ATH10K_HW_QCA99X0:
3241 	case ATH10K_HW_QCA9984:
3242 		ar->regs = &qca99x0_regs;
3243 		ar->hw_ce_regs = &qcax_ce_regs;
3244 		ar->hw_values = &qca99x0_values;
3245 		break;
3246 	case ATH10K_HW_QCA9888:
3247 		ar->regs = &qca99x0_regs;
3248 		ar->hw_ce_regs = &qcax_ce_regs;
3249 		ar->hw_values = &qca9888_values;
3250 		break;
3251 	case ATH10K_HW_QCA4019:
3252 		ar->regs = &qca4019_regs;
3253 		ar->hw_ce_regs = &qcax_ce_regs;
3254 		ar->hw_values = &qca4019_values;
3255 		break;
3256 	case ATH10K_HW_WCN3990:
3257 		ar->regs = &wcn3990_regs;
3258 		ar->hw_ce_regs = &wcn3990_ce_regs;
3259 		ar->hw_values = &wcn3990_values;
3260 		break;
3261 	default:
3262 		ath10k_err(ar, "unsupported core hardware revision %d\n",
3263 			   hw_rev);
3264 		ret = -ENOTSUPP;
3265 		goto err_free_mac;
3266 	}
3267 
3268 	init_completion(&ar->scan.started);
3269 	init_completion(&ar->scan.completed);
3270 	init_completion(&ar->scan.on_channel);
3271 	init_completion(&ar->target_suspend);
3272 	init_completion(&ar->driver_recovery);
3273 	init_completion(&ar->wow.wakeup_completed);
3274 
3275 	init_completion(&ar->install_key_done);
3276 	init_completion(&ar->vdev_setup_done);
3277 	init_completion(&ar->vdev_delete_done);
3278 	init_completion(&ar->thermal.wmi_sync);
3279 	init_completion(&ar->bss_survey_done);
3280 	init_completion(&ar->peer_delete_done);
3281 	init_completion(&ar->peer_stats_info_complete);
3282 
3283 	INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
3284 
3285 	ar->workqueue = create_singlethread_workqueue("ath10k_wq");
3286 	if (!ar->workqueue)
3287 		goto err_free_mac;
3288 
3289 	ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
3290 	if (!ar->workqueue_aux)
3291 		goto err_free_wq;
3292 
3293 	ar->workqueue_tx_complete =
3294 		create_singlethread_workqueue("ath10k_tx_complete_wq");
3295 	if (!ar->workqueue_tx_complete)
3296 		goto err_free_aux_wq;
3297 
3298 	mutex_init(&ar->conf_mutex);
3299 	mutex_init(&ar->dump_mutex);
3300 	spin_lock_init(&ar->data_lock);
3301 
3302 	INIT_LIST_HEAD(&ar->peers);
3303 	init_waitqueue_head(&ar->peer_mapping_wq);
3304 	init_waitqueue_head(&ar->htt.empty_tx_wq);
3305 	init_waitqueue_head(&ar->wmi.tx_credits_wq);
3306 
3307 	skb_queue_head_init(&ar->htt.rx_indication_head);
3308 
3309 	init_completion(&ar->offchan_tx_completed);
3310 	INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
3311 	skb_queue_head_init(&ar->offchan_tx_queue);
3312 
3313 	INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
3314 	skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
3315 
3316 	INIT_WORK(&ar->register_work, ath10k_core_register_work);
3317 	INIT_WORK(&ar->restart_work, ath10k_core_restart);
3318 	INIT_WORK(&ar->set_coverage_class_work,
3319 		  ath10k_core_set_coverage_class_work);
3320 
3321 	init_dummy_netdev(&ar->napi_dev);
3322 
3323 	ret = ath10k_coredump_create(ar);
3324 	if (ret)
3325 		goto err_free_tx_complete;
3326 
3327 	ret = ath10k_debug_create(ar);
3328 	if (ret)
3329 		goto err_free_coredump;
3330 
3331 	return ar;
3332 
3333 err_free_coredump:
3334 	ath10k_coredump_destroy(ar);
3335 err_free_tx_complete:
3336 	destroy_workqueue(ar->workqueue_tx_complete);
3337 err_free_aux_wq:
3338 	destroy_workqueue(ar->workqueue_aux);
3339 err_free_wq:
3340 	destroy_workqueue(ar->workqueue);
3341 err_free_mac:
3342 	ath10k_mac_destroy(ar);
3343 
3344 	return NULL;
3345 }
3346 EXPORT_SYMBOL(ath10k_core_create);
3347 
3348 void ath10k_core_destroy(struct ath10k *ar)
3349 {
3350 	flush_workqueue(ar->workqueue);
3351 	destroy_workqueue(ar->workqueue);
3352 
3353 	flush_workqueue(ar->workqueue_aux);
3354 	destroy_workqueue(ar->workqueue_aux);
3355 
3356 	flush_workqueue(ar->workqueue_tx_complete);
3357 	destroy_workqueue(ar->workqueue_tx_complete);
3358 
3359 	ath10k_debug_destroy(ar);
3360 	ath10k_coredump_destroy(ar);
3361 	ath10k_htt_tx_destroy(&ar->htt);
3362 	ath10k_wmi_free_host_mem(ar);
3363 	ath10k_mac_destroy(ar);
3364 }
3365 EXPORT_SYMBOL(ath10k_core_destroy);
3366 
3367 MODULE_AUTHOR("Qualcomm Atheros");
3368 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards.");
3369 MODULE_LICENSE("Dual BSD/GPL");
3370