1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include <linux/module.h> 19 #include <linux/firmware.h> 20 #include <linux/of.h> 21 #include <linux/dmi.h> 22 #include <linux/ctype.h> 23 #include <asm/byteorder.h> 24 25 #include "core.h" 26 #include "mac.h" 27 #include "htc.h" 28 #include "hif.h" 29 #include "wmi.h" 30 #include "bmi.h" 31 #include "debug.h" 32 #include "htt.h" 33 #include "testmode.h" 34 #include "wmi-ops.h" 35 #include "coredump.h" 36 37 unsigned int ath10k_debug_mask; 38 static unsigned int ath10k_cryptmode_param; 39 static bool uart_print; 40 static bool skip_otp; 41 static bool rawmode; 42 43 /* Enable ATH10K_FW_CRASH_DUMP_REGISTERS and ATH10K_FW_CRASH_DUMP_CE_DATA 44 * by default. 45 */ 46 unsigned long ath10k_coredump_mask = 0x3; 47 48 /* FIXME: most of these should be readonly */ 49 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 50 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 51 module_param(uart_print, bool, 0644); 52 module_param(skip_otp, bool, 0644); 53 module_param(rawmode, bool, 0644); 54 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444); 55 56 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 57 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 58 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 59 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 60 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); 61 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file"); 62 63 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 64 { 65 .id = QCA988X_HW_2_0_VERSION, 66 .dev_id = QCA988X_2_0_DEVICE_ID, 67 .name = "qca988x hw2.0", 68 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 69 .uart_pin = 7, 70 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 71 .otp_exe_param = 0, 72 .channel_counters_freq_hz = 88000, 73 .max_probe_resp_desc_thres = 0, 74 .cal_data_len = 2116, 75 .fw = { 76 .dir = QCA988X_HW_2_0_FW_DIR, 77 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 78 .board_size = QCA988X_BOARD_DATA_SZ, 79 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 80 }, 81 .hw_ops = &qca988x_ops, 82 .decap_align_bytes = 4, 83 .spectral_bin_discard = 0, 84 .vht160_mcs_rx_highest = 0, 85 .vht160_mcs_tx_highest = 0, 86 .n_cipher_suites = 8, 87 .num_peers = TARGET_TLV_NUM_PEERS, 88 .ast_skid_limit = 0x10, 89 .num_wds_entries = 0x20, 90 .target_64bit = false, 91 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 92 }, 93 { 94 .id = QCA9887_HW_1_0_VERSION, 95 .dev_id = QCA9887_1_0_DEVICE_ID, 96 .name = "qca9887 hw1.0", 97 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR, 98 .uart_pin = 7, 99 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 100 .otp_exe_param = 0, 101 .channel_counters_freq_hz = 88000, 102 .max_probe_resp_desc_thres = 0, 103 .cal_data_len = 2116, 104 .fw = { 105 .dir = QCA9887_HW_1_0_FW_DIR, 106 .board = QCA9887_HW_1_0_BOARD_DATA_FILE, 107 .board_size = QCA9887_BOARD_DATA_SZ, 108 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ, 109 }, 110 .hw_ops = &qca988x_ops, 111 .decap_align_bytes = 4, 112 .spectral_bin_discard = 0, 113 .vht160_mcs_rx_highest = 0, 114 .vht160_mcs_tx_highest = 0, 115 .n_cipher_suites = 8, 116 .num_peers = TARGET_TLV_NUM_PEERS, 117 .ast_skid_limit = 0x10, 118 .num_wds_entries = 0x20, 119 .target_64bit = false, 120 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 121 }, 122 { 123 .id = QCA6174_HW_2_1_VERSION, 124 .dev_id = QCA6164_2_1_DEVICE_ID, 125 .name = "qca6164 hw2.1", 126 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 127 .uart_pin = 6, 128 .otp_exe_param = 0, 129 .channel_counters_freq_hz = 88000, 130 .max_probe_resp_desc_thres = 0, 131 .cal_data_len = 8124, 132 .fw = { 133 .dir = QCA6174_HW_2_1_FW_DIR, 134 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 135 .board_size = QCA6174_BOARD_DATA_SZ, 136 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 137 }, 138 .hw_ops = &qca988x_ops, 139 .decap_align_bytes = 4, 140 .spectral_bin_discard = 0, 141 .vht160_mcs_rx_highest = 0, 142 .vht160_mcs_tx_highest = 0, 143 .n_cipher_suites = 8, 144 .num_peers = TARGET_TLV_NUM_PEERS, 145 .ast_skid_limit = 0x10, 146 .num_wds_entries = 0x20, 147 .target_64bit = false, 148 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 149 }, 150 { 151 .id = QCA6174_HW_2_1_VERSION, 152 .dev_id = QCA6174_2_1_DEVICE_ID, 153 .name = "qca6174 hw2.1", 154 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 155 .uart_pin = 6, 156 .otp_exe_param = 0, 157 .channel_counters_freq_hz = 88000, 158 .max_probe_resp_desc_thres = 0, 159 .cal_data_len = 8124, 160 .fw = { 161 .dir = QCA6174_HW_2_1_FW_DIR, 162 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 163 .board_size = QCA6174_BOARD_DATA_SZ, 164 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 165 }, 166 .hw_ops = &qca988x_ops, 167 .decap_align_bytes = 4, 168 .spectral_bin_discard = 0, 169 .vht160_mcs_rx_highest = 0, 170 .vht160_mcs_tx_highest = 0, 171 .n_cipher_suites = 8, 172 .num_peers = TARGET_TLV_NUM_PEERS, 173 .ast_skid_limit = 0x10, 174 .num_wds_entries = 0x20, 175 .target_64bit = false, 176 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 177 }, 178 { 179 .id = QCA6174_HW_3_0_VERSION, 180 .dev_id = QCA6174_2_1_DEVICE_ID, 181 .name = "qca6174 hw3.0", 182 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 183 .uart_pin = 6, 184 .otp_exe_param = 0, 185 .channel_counters_freq_hz = 88000, 186 .max_probe_resp_desc_thres = 0, 187 .cal_data_len = 8124, 188 .fw = { 189 .dir = QCA6174_HW_3_0_FW_DIR, 190 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 191 .board_size = QCA6174_BOARD_DATA_SZ, 192 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 193 }, 194 .hw_ops = &qca988x_ops, 195 .decap_align_bytes = 4, 196 .spectral_bin_discard = 0, 197 .vht160_mcs_rx_highest = 0, 198 .vht160_mcs_tx_highest = 0, 199 .n_cipher_suites = 8, 200 .num_peers = TARGET_TLV_NUM_PEERS, 201 .ast_skid_limit = 0x10, 202 .num_wds_entries = 0x20, 203 .target_64bit = false, 204 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 205 }, 206 { 207 .id = QCA6174_HW_3_2_VERSION, 208 .dev_id = QCA6174_2_1_DEVICE_ID, 209 .name = "qca6174 hw3.2", 210 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 211 .uart_pin = 6, 212 .otp_exe_param = 0, 213 .channel_counters_freq_hz = 88000, 214 .max_probe_resp_desc_thres = 0, 215 .cal_data_len = 8124, 216 .fw = { 217 /* uses same binaries as hw3.0 */ 218 .dir = QCA6174_HW_3_0_FW_DIR, 219 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 220 .board_size = QCA6174_BOARD_DATA_SZ, 221 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 222 }, 223 .hw_ops = &qca6174_ops, 224 .hw_clk = qca6174_clk, 225 .target_cpu_freq = 176000000, 226 .decap_align_bytes = 4, 227 .spectral_bin_discard = 0, 228 .vht160_mcs_rx_highest = 0, 229 .vht160_mcs_tx_highest = 0, 230 .n_cipher_suites = 8, 231 .num_peers = TARGET_TLV_NUM_PEERS, 232 .ast_skid_limit = 0x10, 233 .num_wds_entries = 0x20, 234 .target_64bit = false, 235 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 236 }, 237 { 238 .id = QCA99X0_HW_2_0_DEV_VERSION, 239 .dev_id = QCA99X0_2_0_DEVICE_ID, 240 .name = "qca99x0 hw2.0", 241 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 242 .uart_pin = 7, 243 .otp_exe_param = 0x00000700, 244 .continuous_frag_desc = true, 245 .cck_rate_map_rev2 = true, 246 .channel_counters_freq_hz = 150000, 247 .max_probe_resp_desc_thres = 24, 248 .tx_chain_mask = 0xf, 249 .rx_chain_mask = 0xf, 250 .max_spatial_stream = 4, 251 .cal_data_len = 12064, 252 .fw = { 253 .dir = QCA99X0_HW_2_0_FW_DIR, 254 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 255 .board_size = QCA99X0_BOARD_DATA_SZ, 256 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 257 }, 258 .sw_decrypt_mcast_mgmt = true, 259 .hw_ops = &qca99x0_ops, 260 .decap_align_bytes = 1, 261 .spectral_bin_discard = 4, 262 .vht160_mcs_rx_highest = 0, 263 .vht160_mcs_tx_highest = 0, 264 .n_cipher_suites = 11, 265 .num_peers = TARGET_TLV_NUM_PEERS, 266 .ast_skid_limit = 0x10, 267 .num_wds_entries = 0x20, 268 .target_64bit = false, 269 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 270 }, 271 { 272 .id = QCA9984_HW_1_0_DEV_VERSION, 273 .dev_id = QCA9984_1_0_DEVICE_ID, 274 .name = "qca9984/qca9994 hw1.0", 275 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR, 276 .uart_pin = 7, 277 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 278 .otp_exe_param = 0x00000700, 279 .continuous_frag_desc = true, 280 .cck_rate_map_rev2 = true, 281 .channel_counters_freq_hz = 150000, 282 .max_probe_resp_desc_thres = 24, 283 .tx_chain_mask = 0xf, 284 .rx_chain_mask = 0xf, 285 .max_spatial_stream = 4, 286 .cal_data_len = 12064, 287 .fw = { 288 .dir = QCA9984_HW_1_0_FW_DIR, 289 .board = QCA9984_HW_1_0_BOARD_DATA_FILE, 290 .board_size = QCA99X0_BOARD_DATA_SZ, 291 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 292 }, 293 .sw_decrypt_mcast_mgmt = true, 294 .hw_ops = &qca99x0_ops, 295 .decap_align_bytes = 1, 296 .spectral_bin_discard = 12, 297 298 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz 299 * or 2x2 160Mhz, long-guard-interval. 300 */ 301 .vht160_mcs_rx_highest = 1560, 302 .vht160_mcs_tx_highest = 1560, 303 .n_cipher_suites = 11, 304 .num_peers = TARGET_TLV_NUM_PEERS, 305 .ast_skid_limit = 0x10, 306 .num_wds_entries = 0x20, 307 .target_64bit = false, 308 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 309 }, 310 { 311 .id = QCA9888_HW_2_0_DEV_VERSION, 312 .dev_id = QCA9888_2_0_DEVICE_ID, 313 .name = "qca9888 hw2.0", 314 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR, 315 .uart_pin = 7, 316 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 317 .otp_exe_param = 0x00000700, 318 .continuous_frag_desc = true, 319 .channel_counters_freq_hz = 150000, 320 .max_probe_resp_desc_thres = 24, 321 .tx_chain_mask = 3, 322 .rx_chain_mask = 3, 323 .max_spatial_stream = 2, 324 .cal_data_len = 12064, 325 .fw = { 326 .dir = QCA9888_HW_2_0_FW_DIR, 327 .board = QCA9888_HW_2_0_BOARD_DATA_FILE, 328 .board_size = QCA99X0_BOARD_DATA_SZ, 329 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 330 }, 331 .sw_decrypt_mcast_mgmt = true, 332 .hw_ops = &qca99x0_ops, 333 .decap_align_bytes = 1, 334 .spectral_bin_discard = 12, 335 336 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or 337 * 1x1 160Mhz, long-guard-interval. 338 */ 339 .vht160_mcs_rx_highest = 780, 340 .vht160_mcs_tx_highest = 780, 341 .n_cipher_suites = 11, 342 .num_peers = TARGET_TLV_NUM_PEERS, 343 .ast_skid_limit = 0x10, 344 .num_wds_entries = 0x20, 345 .target_64bit = false, 346 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 347 }, 348 { 349 .id = QCA9377_HW_1_0_DEV_VERSION, 350 .dev_id = QCA9377_1_0_DEVICE_ID, 351 .name = "qca9377 hw1.0", 352 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 353 .uart_pin = 6, 354 .otp_exe_param = 0, 355 .channel_counters_freq_hz = 88000, 356 .max_probe_resp_desc_thres = 0, 357 .cal_data_len = 8124, 358 .fw = { 359 .dir = QCA9377_HW_1_0_FW_DIR, 360 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 361 .board_size = QCA9377_BOARD_DATA_SZ, 362 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 363 }, 364 .hw_ops = &qca988x_ops, 365 .decap_align_bytes = 4, 366 .spectral_bin_discard = 0, 367 .vht160_mcs_rx_highest = 0, 368 .vht160_mcs_tx_highest = 0, 369 .n_cipher_suites = 8, 370 .num_peers = TARGET_TLV_NUM_PEERS, 371 .ast_skid_limit = 0x10, 372 .num_wds_entries = 0x20, 373 .target_64bit = false, 374 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 375 }, 376 { 377 .id = QCA9377_HW_1_1_DEV_VERSION, 378 .dev_id = QCA9377_1_0_DEVICE_ID, 379 .name = "qca9377 hw1.1", 380 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 381 .uart_pin = 6, 382 .otp_exe_param = 0, 383 .channel_counters_freq_hz = 88000, 384 .max_probe_resp_desc_thres = 0, 385 .cal_data_len = 8124, 386 .fw = { 387 .dir = QCA9377_HW_1_0_FW_DIR, 388 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 389 .board_size = QCA9377_BOARD_DATA_SZ, 390 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 391 }, 392 .hw_ops = &qca6174_ops, 393 .hw_clk = qca6174_clk, 394 .target_cpu_freq = 176000000, 395 .decap_align_bytes = 4, 396 .spectral_bin_discard = 0, 397 .vht160_mcs_rx_highest = 0, 398 .vht160_mcs_tx_highest = 0, 399 .n_cipher_suites = 8, 400 .num_peers = TARGET_TLV_NUM_PEERS, 401 .ast_skid_limit = 0x10, 402 .num_wds_entries = 0x20, 403 .target_64bit = false, 404 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 405 }, 406 { 407 .id = QCA4019_HW_1_0_DEV_VERSION, 408 .dev_id = 0, 409 .name = "qca4019 hw1.0", 410 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR, 411 .uart_pin = 7, 412 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 413 .otp_exe_param = 0x0010000, 414 .continuous_frag_desc = true, 415 .cck_rate_map_rev2 = true, 416 .channel_counters_freq_hz = 125000, 417 .max_probe_resp_desc_thres = 24, 418 .tx_chain_mask = 0x3, 419 .rx_chain_mask = 0x3, 420 .max_spatial_stream = 2, 421 .cal_data_len = 12064, 422 .fw = { 423 .dir = QCA4019_HW_1_0_FW_DIR, 424 .board = QCA4019_HW_1_0_BOARD_DATA_FILE, 425 .board_size = QCA4019_BOARD_DATA_SZ, 426 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, 427 }, 428 .sw_decrypt_mcast_mgmt = true, 429 .hw_ops = &qca99x0_ops, 430 .decap_align_bytes = 1, 431 .spectral_bin_discard = 4, 432 .vht160_mcs_rx_highest = 0, 433 .vht160_mcs_tx_highest = 0, 434 .n_cipher_suites = 11, 435 .num_peers = TARGET_TLV_NUM_PEERS, 436 .ast_skid_limit = 0x10, 437 .num_wds_entries = 0x20, 438 .target_64bit = false, 439 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 440 }, 441 { 442 .id = WCN3990_HW_1_0_DEV_VERSION, 443 .dev_id = 0, 444 .name = "wcn3990 hw1.0", 445 .continuous_frag_desc = true, 446 .tx_chain_mask = 0x7, 447 .rx_chain_mask = 0x7, 448 .max_spatial_stream = 4, 449 .fw = { 450 .dir = WCN3990_HW_1_0_FW_DIR, 451 }, 452 .sw_decrypt_mcast_mgmt = true, 453 .hw_ops = &wcn3990_ops, 454 .decap_align_bytes = 1, 455 .num_peers = TARGET_HL_10_TLV_NUM_PEERS, 456 .ast_skid_limit = TARGET_HL_10_TLV_AST_SKID_LIMIT, 457 .num_wds_entries = TARGET_HL_10_TLV_NUM_WDS_ENTRIES, 458 .target_64bit = true, 459 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC, 460 }, 461 }; 462 463 static const char *const ath10k_core_fw_feature_str[] = { 464 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 465 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 466 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 467 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 468 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 469 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 470 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 471 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 472 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 473 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 474 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 475 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 476 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", 477 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl", 478 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param", 479 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war", 480 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast", 481 [ATH10K_FW_FEATURE_NO_PS] = "no-ps", 482 [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference", 483 [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi", 484 }; 485 486 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 487 size_t buf_len, 488 enum ath10k_fw_features feat) 489 { 490 /* make sure that ath10k_core_fw_feature_str[] gets updated */ 491 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != 492 ATH10K_FW_FEATURE_COUNT); 493 494 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 495 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 496 return scnprintf(buf, buf_len, "bit%d", feat); 497 } 498 499 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 500 } 501 502 void ath10k_core_get_fw_features_str(struct ath10k *ar, 503 char *buf, 504 size_t buf_len) 505 { 506 size_t len = 0; 507 int i; 508 509 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 510 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) { 511 if (len > 0) 512 len += scnprintf(buf + len, buf_len - len, ","); 513 514 len += ath10k_core_get_fw_feature_str(buf + len, 515 buf_len - len, 516 i); 517 } 518 } 519 } 520 521 static void ath10k_send_suspend_complete(struct ath10k *ar) 522 { 523 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 524 525 complete(&ar->target_suspend); 526 } 527 528 static void ath10k_init_sdio(struct ath10k *ar) 529 { 530 u32 param = 0; 531 532 ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256); 533 ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99); 534 ath10k_bmi_read32(ar, hi_acs_flags, ¶m); 535 536 param |= (HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET | 537 HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET | 538 HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE); 539 540 ath10k_bmi_write32(ar, hi_acs_flags, param); 541 } 542 543 static int ath10k_init_configure_target(struct ath10k *ar) 544 { 545 u32 param_host; 546 int ret; 547 548 /* tell target which HTC version it is used*/ 549 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 550 HTC_PROTOCOL_VERSION); 551 if (ret) { 552 ath10k_err(ar, "settings HTC version failed\n"); 553 return ret; 554 } 555 556 /* set the firmware mode to STA/IBSS/AP */ 557 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 558 if (ret) { 559 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 560 return ret; 561 } 562 563 /* TODO following parameters need to be re-visited. */ 564 /* num_device */ 565 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 566 /* Firmware mode */ 567 /* FIXME: Why FW_MODE_AP ??.*/ 568 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 569 /* mac_addr_method */ 570 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 571 /* firmware_bridge */ 572 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 573 /* fwsubmode */ 574 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 575 576 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 577 if (ret) { 578 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 579 return ret; 580 } 581 582 /* We do all byte-swapping on the host */ 583 ret = ath10k_bmi_write32(ar, hi_be, 0); 584 if (ret) { 585 ath10k_err(ar, "setting host CPU BE mode failed\n"); 586 return ret; 587 } 588 589 /* FW descriptor/Data swap flags */ 590 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 591 592 if (ret) { 593 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 594 return ret; 595 } 596 597 /* Some devices have a special sanity check that verifies the PCI 598 * Device ID is written to this host interest var. It is known to be 599 * required to boot QCA6164. 600 */ 601 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 602 ar->dev_id); 603 if (ret) { 604 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 605 return ret; 606 } 607 608 return 0; 609 } 610 611 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 612 const char *dir, 613 const char *file) 614 { 615 char filename[100]; 616 const struct firmware *fw; 617 int ret; 618 619 if (file == NULL) 620 return ERR_PTR(-ENOENT); 621 622 if (dir == NULL) 623 dir = "."; 624 625 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 626 ret = request_firmware(&fw, filename, ar->dev); 627 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n", 628 filename, ret); 629 630 if (ret) 631 return ERR_PTR(ret); 632 633 return fw; 634 } 635 636 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 637 size_t data_len) 638 { 639 u32 board_data_size = ar->hw_params.fw.board_size; 640 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 641 u32 board_ext_data_addr; 642 int ret; 643 644 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 645 if (ret) { 646 ath10k_err(ar, "could not read board ext data addr (%d)\n", 647 ret); 648 return ret; 649 } 650 651 ath10k_dbg(ar, ATH10K_DBG_BOOT, 652 "boot push board extended data addr 0x%x\n", 653 board_ext_data_addr); 654 655 if (board_ext_data_addr == 0) 656 return 0; 657 658 if (data_len != (board_data_size + board_ext_data_size)) { 659 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 660 data_len, board_data_size, board_ext_data_size); 661 return -EINVAL; 662 } 663 664 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 665 data + board_data_size, 666 board_ext_data_size); 667 if (ret) { 668 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 669 return ret; 670 } 671 672 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 673 (board_ext_data_size << 16) | 1); 674 if (ret) { 675 ath10k_err(ar, "could not write board ext data bit (%d)\n", 676 ret); 677 return ret; 678 } 679 680 return 0; 681 } 682 683 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 684 size_t data_len) 685 { 686 u32 board_data_size = ar->hw_params.fw.board_size; 687 u32 address; 688 int ret; 689 690 ret = ath10k_push_board_ext_data(ar, data, data_len); 691 if (ret) { 692 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 693 goto exit; 694 } 695 696 ret = ath10k_bmi_read32(ar, hi_board_data, &address); 697 if (ret) { 698 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 699 goto exit; 700 } 701 702 ret = ath10k_bmi_write_memory(ar, address, data, 703 min_t(u32, board_data_size, 704 data_len)); 705 if (ret) { 706 ath10k_err(ar, "could not write board data (%d)\n", ret); 707 goto exit; 708 } 709 710 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 711 if (ret) { 712 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 713 goto exit; 714 } 715 716 exit: 717 return ret; 718 } 719 720 static int ath10k_download_cal_file(struct ath10k *ar, 721 const struct firmware *file) 722 { 723 int ret; 724 725 if (!file) 726 return -ENOENT; 727 728 if (IS_ERR(file)) 729 return PTR_ERR(file); 730 731 ret = ath10k_download_board_data(ar, file->data, file->size); 732 if (ret) { 733 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 734 return ret; 735 } 736 737 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 738 739 return 0; 740 } 741 742 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name) 743 { 744 struct device_node *node; 745 int data_len; 746 void *data; 747 int ret; 748 749 node = ar->dev->of_node; 750 if (!node) 751 /* Device Tree is optional, don't print any warnings if 752 * there's no node for ath10k. 753 */ 754 return -ENOENT; 755 756 if (!of_get_property(node, dt_name, &data_len)) { 757 /* The calibration data node is optional */ 758 return -ENOENT; 759 } 760 761 if (data_len != ar->hw_params.cal_data_len) { 762 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 763 data_len); 764 ret = -EMSGSIZE; 765 goto out; 766 } 767 768 data = kmalloc(data_len, GFP_KERNEL); 769 if (!data) { 770 ret = -ENOMEM; 771 goto out; 772 } 773 774 ret = of_property_read_u8_array(node, dt_name, data, data_len); 775 if (ret) { 776 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 777 ret); 778 goto out_free; 779 } 780 781 ret = ath10k_download_board_data(ar, data, data_len); 782 if (ret) { 783 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 784 ret); 785 goto out_free; 786 } 787 788 ret = 0; 789 790 out_free: 791 kfree(data); 792 793 out: 794 return ret; 795 } 796 797 static int ath10k_download_cal_eeprom(struct ath10k *ar) 798 { 799 size_t data_len; 800 void *data = NULL; 801 int ret; 802 803 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len); 804 if (ret) { 805 if (ret != -EOPNOTSUPP) 806 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n", 807 ret); 808 goto out_free; 809 } 810 811 ret = ath10k_download_board_data(ar, data, data_len); 812 if (ret) { 813 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n", 814 ret); 815 goto out_free; 816 } 817 818 ret = 0; 819 820 out_free: 821 kfree(data); 822 823 return ret; 824 } 825 826 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) 827 { 828 u32 result, address; 829 u8 board_id, chip_id; 830 int ret, bmi_board_id_param; 831 832 address = ar->hw_params.patch_load_addr; 833 834 if (!ar->normal_mode_fw.fw_file.otp_data || 835 !ar->normal_mode_fw.fw_file.otp_len) { 836 ath10k_warn(ar, 837 "failed to retrieve board id because of invalid otp\n"); 838 return -ENODATA; 839 } 840 841 ath10k_dbg(ar, ATH10K_DBG_BOOT, 842 "boot upload otp to 0x%x len %zd for board id\n", 843 address, ar->normal_mode_fw.fw_file.otp_len); 844 845 ret = ath10k_bmi_fast_download(ar, address, 846 ar->normal_mode_fw.fw_file.otp_data, 847 ar->normal_mode_fw.fw_file.otp_len); 848 if (ret) { 849 ath10k_err(ar, "could not write otp for board id check: %d\n", 850 ret); 851 return ret; 852 } 853 854 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 855 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 856 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID; 857 else 858 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID; 859 860 ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result); 861 if (ret) { 862 ath10k_err(ar, "could not execute otp for board id check: %d\n", 863 ret); 864 return ret; 865 } 866 867 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); 868 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); 869 870 ath10k_dbg(ar, ATH10K_DBG_BOOT, 871 "boot get otp board id result 0x%08x board_id %d chip_id %d\n", 872 result, board_id, chip_id); 873 874 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 || 875 (board_id == 0)) { 876 ath10k_dbg(ar, ATH10K_DBG_BOOT, 877 "board id does not exist in otp, ignore it\n"); 878 return -EOPNOTSUPP; 879 } 880 881 ar->id.bmi_ids_valid = true; 882 ar->id.bmi_board_id = board_id; 883 ar->id.bmi_chip_id = chip_id; 884 885 return 0; 886 } 887 888 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data) 889 { 890 struct ath10k *ar = data; 891 const char *bdf_ext; 892 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC; 893 u8 bdf_enabled; 894 int i; 895 896 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE) 897 return; 898 899 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) { 900 ath10k_dbg(ar, ATH10K_DBG_BOOT, 901 "wrong smbios bdf ext type length (%d).\n", 902 hdr->length); 903 return; 904 } 905 906 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET); 907 if (!bdf_enabled) { 908 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n"); 909 return; 910 } 911 912 /* Only one string exists (per spec) */ 913 bdf_ext = (char *)hdr + hdr->length; 914 915 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) { 916 ath10k_dbg(ar, ATH10K_DBG_BOOT, 917 "bdf variant magic does not match.\n"); 918 return; 919 } 920 921 for (i = 0; i < strlen(bdf_ext); i++) { 922 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) { 923 ath10k_dbg(ar, ATH10K_DBG_BOOT, 924 "bdf variant name contains non ascii chars.\n"); 925 return; 926 } 927 } 928 929 /* Copy extension name without magic suffix */ 930 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic), 931 sizeof(ar->id.bdf_ext)) < 0) { 932 ath10k_dbg(ar, ATH10K_DBG_BOOT, 933 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 934 bdf_ext); 935 return; 936 } 937 938 ath10k_dbg(ar, ATH10K_DBG_BOOT, 939 "found and validated bdf variant smbios_type 0x%x bdf %s\n", 940 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext); 941 } 942 943 static int ath10k_core_check_smbios(struct ath10k *ar) 944 { 945 ar->id.bdf_ext[0] = '\0'; 946 dmi_walk(ath10k_core_check_bdfext, ar); 947 948 if (ar->id.bdf_ext[0] == '\0') 949 return -ENODATA; 950 951 return 0; 952 } 953 954 static int ath10k_core_check_dt(struct ath10k *ar) 955 { 956 struct device_node *node; 957 const char *variant = NULL; 958 959 node = ar->dev->of_node; 960 if (!node) 961 return -ENOENT; 962 963 of_property_read_string(node, "qcom,ath10k-calibration-variant", 964 &variant); 965 if (!variant) 966 return -ENODATA; 967 968 if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0) 969 ath10k_dbg(ar, ATH10K_DBG_BOOT, 970 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 971 variant); 972 973 return 0; 974 } 975 976 static int ath10k_download_and_run_otp(struct ath10k *ar) 977 { 978 u32 result, address = ar->hw_params.patch_load_addr; 979 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 980 int ret; 981 982 ret = ath10k_download_board_data(ar, 983 ar->running_fw->board_data, 984 ar->running_fw->board_len); 985 if (ret) { 986 ath10k_err(ar, "failed to download board data: %d\n", ret); 987 return ret; 988 } 989 990 /* OTP is optional */ 991 992 if (!ar->running_fw->fw_file.otp_data || 993 !ar->running_fw->fw_file.otp_len) { 994 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n", 995 ar->running_fw->fw_file.otp_data, 996 ar->running_fw->fw_file.otp_len); 997 return 0; 998 } 999 1000 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 1001 address, ar->running_fw->fw_file.otp_len); 1002 1003 ret = ath10k_bmi_fast_download(ar, address, 1004 ar->running_fw->fw_file.otp_data, 1005 ar->running_fw->fw_file.otp_len); 1006 if (ret) { 1007 ath10k_err(ar, "could not write otp (%d)\n", ret); 1008 return ret; 1009 } 1010 1011 /* As of now pre-cal is valid for 10_4 variants */ 1012 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 1013 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 1014 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL; 1015 1016 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 1017 if (ret) { 1018 ath10k_err(ar, "could not execute otp (%d)\n", ret); 1019 return ret; 1020 } 1021 1022 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 1023 1024 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 1025 ar->running_fw->fw_file.fw_features)) && 1026 result != 0) { 1027 ath10k_err(ar, "otp calibration failed: %d", result); 1028 return -EINVAL; 1029 } 1030 1031 return 0; 1032 } 1033 1034 static int ath10k_download_fw(struct ath10k *ar) 1035 { 1036 u32 address, data_len; 1037 const void *data; 1038 int ret; 1039 1040 address = ar->hw_params.patch_load_addr; 1041 1042 data = ar->running_fw->fw_file.firmware_data; 1043 data_len = ar->running_fw->fw_file.firmware_len; 1044 1045 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file); 1046 if (ret) { 1047 ath10k_err(ar, "failed to configure fw code swap: %d\n", 1048 ret); 1049 return ret; 1050 } 1051 1052 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1053 "boot uploading firmware image %pK len %d\n", 1054 data, data_len); 1055 1056 ret = ath10k_bmi_fast_download(ar, address, data, data_len); 1057 if (ret) { 1058 ath10k_err(ar, "failed to download firmware: %d\n", 1059 ret); 1060 return ret; 1061 } 1062 1063 return ret; 1064 } 1065 1066 static void ath10k_core_free_board_files(struct ath10k *ar) 1067 { 1068 if (!IS_ERR(ar->normal_mode_fw.board)) 1069 release_firmware(ar->normal_mode_fw.board); 1070 1071 ar->normal_mode_fw.board = NULL; 1072 ar->normal_mode_fw.board_data = NULL; 1073 ar->normal_mode_fw.board_len = 0; 1074 } 1075 1076 static void ath10k_core_free_firmware_files(struct ath10k *ar) 1077 { 1078 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware)) 1079 release_firmware(ar->normal_mode_fw.fw_file.firmware); 1080 1081 if (!IS_ERR(ar->cal_file)) 1082 release_firmware(ar->cal_file); 1083 1084 if (!IS_ERR(ar->pre_cal_file)) 1085 release_firmware(ar->pre_cal_file); 1086 1087 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file); 1088 1089 ar->normal_mode_fw.fw_file.otp_data = NULL; 1090 ar->normal_mode_fw.fw_file.otp_len = 0; 1091 1092 ar->normal_mode_fw.fw_file.firmware = NULL; 1093 ar->normal_mode_fw.fw_file.firmware_data = NULL; 1094 ar->normal_mode_fw.fw_file.firmware_len = 0; 1095 1096 ar->cal_file = NULL; 1097 ar->pre_cal_file = NULL; 1098 } 1099 1100 static int ath10k_fetch_cal_file(struct ath10k *ar) 1101 { 1102 char filename[100]; 1103 1104 /* pre-cal-<bus>-<id>.bin */ 1105 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin", 1106 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1107 1108 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1109 if (!IS_ERR(ar->pre_cal_file)) 1110 goto success; 1111 1112 /* cal-<bus>-<id>.bin */ 1113 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 1114 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1115 1116 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1117 if (IS_ERR(ar->cal_file)) 1118 /* calibration file is optional, don't print any warnings */ 1119 return PTR_ERR(ar->cal_file); 1120 success: 1121 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 1122 ATH10K_FW_DIR, filename); 1123 1124 return 0; 1125 } 1126 1127 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar) 1128 { 1129 if (!ar->hw_params.fw.board) { 1130 ath10k_err(ar, "failed to find board file fw entry\n"); 1131 return -EINVAL; 1132 } 1133 1134 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1135 ar->hw_params.fw.dir, 1136 ar->hw_params.fw.board); 1137 if (IS_ERR(ar->normal_mode_fw.board)) 1138 return PTR_ERR(ar->normal_mode_fw.board); 1139 1140 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data; 1141 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size; 1142 1143 return 0; 1144 } 1145 1146 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, 1147 const void *buf, size_t buf_len, 1148 const char *boardname) 1149 { 1150 const struct ath10k_fw_ie *hdr; 1151 bool name_match_found; 1152 int ret, board_ie_id; 1153 size_t board_ie_len; 1154 const void *board_ie_data; 1155 1156 name_match_found = false; 1157 1158 /* go through ATH10K_BD_IE_BOARD_ elements */ 1159 while (buf_len > sizeof(struct ath10k_fw_ie)) { 1160 hdr = buf; 1161 board_ie_id = le32_to_cpu(hdr->id); 1162 board_ie_len = le32_to_cpu(hdr->len); 1163 board_ie_data = hdr->data; 1164 1165 buf_len -= sizeof(*hdr); 1166 buf += sizeof(*hdr); 1167 1168 if (buf_len < ALIGN(board_ie_len, 4)) { 1169 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", 1170 buf_len, ALIGN(board_ie_len, 4)); 1171 ret = -EINVAL; 1172 goto out; 1173 } 1174 1175 switch (board_ie_id) { 1176 case ATH10K_BD_IE_BOARD_NAME: 1177 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", 1178 board_ie_data, board_ie_len); 1179 1180 if (board_ie_len != strlen(boardname)) 1181 break; 1182 1183 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 1184 if (ret) 1185 break; 1186 1187 name_match_found = true; 1188 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1189 "boot found match for name '%s'", 1190 boardname); 1191 break; 1192 case ATH10K_BD_IE_BOARD_DATA: 1193 if (!name_match_found) 1194 /* no match found */ 1195 break; 1196 1197 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1198 "boot found board data for '%s'", 1199 boardname); 1200 1201 ar->normal_mode_fw.board_data = board_ie_data; 1202 ar->normal_mode_fw.board_len = board_ie_len; 1203 1204 ret = 0; 1205 goto out; 1206 default: 1207 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", 1208 board_ie_id); 1209 break; 1210 } 1211 1212 /* jump over the padding */ 1213 board_ie_len = ALIGN(board_ie_len, 4); 1214 1215 buf_len -= board_ie_len; 1216 buf += board_ie_len; 1217 } 1218 1219 /* no match found */ 1220 ret = -ENOENT; 1221 1222 out: 1223 return ret; 1224 } 1225 1226 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, 1227 const char *boardname, 1228 const char *filename) 1229 { 1230 size_t len, magic_len, ie_len; 1231 struct ath10k_fw_ie *hdr; 1232 const u8 *data; 1233 int ret, ie_id; 1234 1235 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1236 ar->hw_params.fw.dir, 1237 filename); 1238 if (IS_ERR(ar->normal_mode_fw.board)) 1239 return PTR_ERR(ar->normal_mode_fw.board); 1240 1241 data = ar->normal_mode_fw.board->data; 1242 len = ar->normal_mode_fw.board->size; 1243 1244 /* magic has extra null byte padded */ 1245 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; 1246 if (len < magic_len) { 1247 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", 1248 ar->hw_params.fw.dir, filename, len); 1249 ret = -EINVAL; 1250 goto err; 1251 } 1252 1253 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { 1254 ath10k_err(ar, "found invalid board magic\n"); 1255 ret = -EINVAL; 1256 goto err; 1257 } 1258 1259 /* magic is padded to 4 bytes */ 1260 magic_len = ALIGN(magic_len, 4); 1261 if (len < magic_len) { 1262 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", 1263 ar->hw_params.fw.dir, filename, len); 1264 ret = -EINVAL; 1265 goto err; 1266 } 1267 1268 data += magic_len; 1269 len -= magic_len; 1270 1271 while (len > sizeof(struct ath10k_fw_ie)) { 1272 hdr = (struct ath10k_fw_ie *)data; 1273 ie_id = le32_to_cpu(hdr->id); 1274 ie_len = le32_to_cpu(hdr->len); 1275 1276 len -= sizeof(*hdr); 1277 data = hdr->data; 1278 1279 if (len < ALIGN(ie_len, 4)) { 1280 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", 1281 ie_id, ie_len, len); 1282 ret = -EINVAL; 1283 goto err; 1284 } 1285 1286 switch (ie_id) { 1287 case ATH10K_BD_IE_BOARD: 1288 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1289 boardname); 1290 if (ret == -ENOENT && ar->id.bdf_ext[0] != '\0') { 1291 /* try default bdf if variant was not found */ 1292 char *s, *v = ",variant="; 1293 char boardname2[100]; 1294 1295 strlcpy(boardname2, boardname, 1296 sizeof(boardname2)); 1297 1298 s = strstr(boardname2, v); 1299 if (s) 1300 *s = '\0'; /* strip ",variant=%s" */ 1301 1302 ret = ath10k_core_parse_bd_ie_board(ar, data, 1303 ie_len, 1304 boardname2); 1305 } 1306 1307 if (ret == -ENOENT) 1308 /* no match found, continue */ 1309 break; 1310 else if (ret) 1311 /* there was an error, bail out */ 1312 goto err; 1313 1314 /* board data found */ 1315 goto out; 1316 } 1317 1318 /* jump over the padding */ 1319 ie_len = ALIGN(ie_len, 4); 1320 1321 len -= ie_len; 1322 data += ie_len; 1323 } 1324 1325 out: 1326 if (!ar->normal_mode_fw.board_data || !ar->normal_mode_fw.board_len) { 1327 ath10k_err(ar, 1328 "failed to fetch board data for %s from %s/%s\n", 1329 boardname, ar->hw_params.fw.dir, filename); 1330 ret = -ENODATA; 1331 goto err; 1332 } 1333 1334 return 0; 1335 1336 err: 1337 ath10k_core_free_board_files(ar); 1338 return ret; 1339 } 1340 1341 static int ath10k_core_create_board_name(struct ath10k *ar, char *name, 1342 size_t name_len) 1343 { 1344 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */ 1345 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 }; 1346 1347 if (ar->id.bdf_ext[0] != '\0') 1348 scnprintf(variant, sizeof(variant), ",variant=%s", 1349 ar->id.bdf_ext); 1350 1351 if (ar->id.bmi_ids_valid) { 1352 scnprintf(name, name_len, 1353 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s", 1354 ath10k_bus_str(ar->hif.bus), 1355 ar->id.bmi_chip_id, 1356 ar->id.bmi_board_id, variant); 1357 goto out; 1358 } 1359 1360 scnprintf(name, name_len, 1361 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s", 1362 ath10k_bus_str(ar->hif.bus), 1363 ar->id.vendor, ar->id.device, 1364 ar->id.subsystem_vendor, ar->id.subsystem_device, variant); 1365 out: 1366 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); 1367 1368 return 0; 1369 } 1370 1371 static int ath10k_core_fetch_board_file(struct ath10k *ar) 1372 { 1373 char boardname[100]; 1374 int ret; 1375 1376 ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname)); 1377 if (ret) { 1378 ath10k_err(ar, "failed to create board name: %d", ret); 1379 return ret; 1380 } 1381 1382 ar->bd_api = 2; 1383 ret = ath10k_core_fetch_board_data_api_n(ar, boardname, 1384 ATH10K_BOARD_API2_FILE); 1385 if (!ret) 1386 goto success; 1387 1388 ar->bd_api = 1; 1389 ret = ath10k_core_fetch_board_data_api_1(ar); 1390 if (ret) { 1391 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n", 1392 ar->hw_params.fw.dir); 1393 return ret; 1394 } 1395 1396 success: 1397 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); 1398 return 0; 1399 } 1400 1401 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1402 struct ath10k_fw_file *fw_file) 1403 { 1404 size_t magic_len, len, ie_len; 1405 int ie_id, i, index, bit, ret; 1406 struct ath10k_fw_ie *hdr; 1407 const u8 *data; 1408 __le32 *timestamp, *version; 1409 1410 /* first fetch the firmware file (firmware-*.bin) */ 1411 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1412 name); 1413 if (IS_ERR(fw_file->firmware)) 1414 return PTR_ERR(fw_file->firmware); 1415 1416 data = fw_file->firmware->data; 1417 len = fw_file->firmware->size; 1418 1419 /* magic also includes the null byte, check that as well */ 1420 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 1421 1422 if (len < magic_len) { 1423 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 1424 ar->hw_params.fw.dir, name, len); 1425 ret = -EINVAL; 1426 goto err; 1427 } 1428 1429 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 1430 ath10k_err(ar, "invalid firmware magic\n"); 1431 ret = -EINVAL; 1432 goto err; 1433 } 1434 1435 /* jump over the padding */ 1436 magic_len = ALIGN(magic_len, 4); 1437 1438 len -= magic_len; 1439 data += magic_len; 1440 1441 /* loop elements */ 1442 while (len > sizeof(struct ath10k_fw_ie)) { 1443 hdr = (struct ath10k_fw_ie *)data; 1444 1445 ie_id = le32_to_cpu(hdr->id); 1446 ie_len = le32_to_cpu(hdr->len); 1447 1448 len -= sizeof(*hdr); 1449 data += sizeof(*hdr); 1450 1451 if (len < ie_len) { 1452 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 1453 ie_id, len, ie_len); 1454 ret = -EINVAL; 1455 goto err; 1456 } 1457 1458 switch (ie_id) { 1459 case ATH10K_FW_IE_FW_VERSION: 1460 if (ie_len > sizeof(fw_file->fw_version) - 1) 1461 break; 1462 1463 memcpy(fw_file->fw_version, data, ie_len); 1464 fw_file->fw_version[ie_len] = '\0'; 1465 1466 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1467 "found fw version %s\n", 1468 fw_file->fw_version); 1469 break; 1470 case ATH10K_FW_IE_TIMESTAMP: 1471 if (ie_len != sizeof(u32)) 1472 break; 1473 1474 timestamp = (__le32 *)data; 1475 1476 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 1477 le32_to_cpup(timestamp)); 1478 break; 1479 case ATH10K_FW_IE_FEATURES: 1480 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1481 "found firmware features ie (%zd B)\n", 1482 ie_len); 1483 1484 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 1485 index = i / 8; 1486 bit = i % 8; 1487 1488 if (index == ie_len) 1489 break; 1490 1491 if (data[index] & (1 << bit)) { 1492 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1493 "Enabling feature bit: %i\n", 1494 i); 1495 __set_bit(i, fw_file->fw_features); 1496 } 1497 } 1498 1499 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 1500 fw_file->fw_features, 1501 sizeof(fw_file->fw_features)); 1502 break; 1503 case ATH10K_FW_IE_FW_IMAGE: 1504 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1505 "found fw image ie (%zd B)\n", 1506 ie_len); 1507 1508 fw_file->firmware_data = data; 1509 fw_file->firmware_len = ie_len; 1510 1511 break; 1512 case ATH10K_FW_IE_OTP_IMAGE: 1513 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1514 "found otp image ie (%zd B)\n", 1515 ie_len); 1516 1517 fw_file->otp_data = data; 1518 fw_file->otp_len = ie_len; 1519 1520 break; 1521 case ATH10K_FW_IE_WMI_OP_VERSION: 1522 if (ie_len != sizeof(u32)) 1523 break; 1524 1525 version = (__le32 *)data; 1526 1527 fw_file->wmi_op_version = le32_to_cpup(version); 1528 1529 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 1530 fw_file->wmi_op_version); 1531 break; 1532 case ATH10K_FW_IE_HTT_OP_VERSION: 1533 if (ie_len != sizeof(u32)) 1534 break; 1535 1536 version = (__le32 *)data; 1537 1538 fw_file->htt_op_version = le32_to_cpup(version); 1539 1540 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 1541 fw_file->htt_op_version); 1542 break; 1543 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 1544 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1545 "found fw code swap image ie (%zd B)\n", 1546 ie_len); 1547 fw_file->codeswap_data = data; 1548 fw_file->codeswap_len = ie_len; 1549 break; 1550 default: 1551 ath10k_warn(ar, "Unknown FW IE: %u\n", 1552 le32_to_cpu(hdr->id)); 1553 break; 1554 } 1555 1556 /* jump over the padding */ 1557 ie_len = ALIGN(ie_len, 4); 1558 1559 len -= ie_len; 1560 data += ie_len; 1561 } 1562 1563 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) && 1564 (!fw_file->firmware_data || !fw_file->firmware_len)) { 1565 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 1566 ar->hw_params.fw.dir, name); 1567 ret = -ENOMEDIUM; 1568 goto err; 1569 } 1570 1571 return 0; 1572 1573 err: 1574 ath10k_core_free_firmware_files(ar); 1575 return ret; 1576 } 1577 1578 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name, 1579 size_t fw_name_len, int fw_api) 1580 { 1581 switch (ar->hif.bus) { 1582 case ATH10K_BUS_SDIO: 1583 case ATH10K_BUS_USB: 1584 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin", 1585 ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus), 1586 fw_api); 1587 break; 1588 case ATH10K_BUS_PCI: 1589 case ATH10K_BUS_AHB: 1590 case ATH10K_BUS_SNOC: 1591 scnprintf(fw_name, fw_name_len, "%s-%d.bin", 1592 ATH10K_FW_FILE_BASE, fw_api); 1593 break; 1594 } 1595 } 1596 1597 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 1598 { 1599 int ret, i; 1600 char fw_name[100]; 1601 1602 /* calibration file is optional, don't check for any errors */ 1603 ath10k_fetch_cal_file(ar); 1604 1605 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) { 1606 ar->fw_api = i; 1607 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", 1608 ar->fw_api); 1609 1610 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api); 1611 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name, 1612 &ar->normal_mode_fw.fw_file); 1613 if (!ret) 1614 goto success; 1615 } 1616 1617 /* we end up here if we couldn't fetch any firmware */ 1618 1619 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d", 1620 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir, 1621 ret); 1622 1623 return ret; 1624 1625 success: 1626 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1627 1628 return 0; 1629 } 1630 1631 static int ath10k_core_pre_cal_download(struct ath10k *ar) 1632 { 1633 int ret; 1634 1635 ret = ath10k_download_cal_file(ar, ar->pre_cal_file); 1636 if (ret == 0) { 1637 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE; 1638 goto success; 1639 } 1640 1641 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1642 "boot did not find a pre calibration file, try DT next: %d\n", 1643 ret); 1644 1645 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data"); 1646 if (ret) { 1647 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1648 "unable to load pre cal data from DT: %d\n", ret); 1649 return ret; 1650 } 1651 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT; 1652 1653 success: 1654 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1655 ath10k_cal_mode_str(ar->cal_mode)); 1656 1657 return 0; 1658 } 1659 1660 static int ath10k_core_pre_cal_config(struct ath10k *ar) 1661 { 1662 int ret; 1663 1664 ret = ath10k_core_pre_cal_download(ar); 1665 if (ret) { 1666 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1667 "failed to load pre cal data: %d\n", ret); 1668 return ret; 1669 } 1670 1671 ret = ath10k_core_get_board_id_from_otp(ar); 1672 if (ret) { 1673 ath10k_err(ar, "failed to get board id: %d\n", ret); 1674 return ret; 1675 } 1676 1677 ret = ath10k_download_and_run_otp(ar); 1678 if (ret) { 1679 ath10k_err(ar, "failed to run otp: %d\n", ret); 1680 return ret; 1681 } 1682 1683 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1684 "pre cal configuration done successfully\n"); 1685 1686 return 0; 1687 } 1688 1689 static int ath10k_download_cal_data(struct ath10k *ar) 1690 { 1691 int ret; 1692 1693 ret = ath10k_core_pre_cal_config(ar); 1694 if (ret == 0) 1695 return 0; 1696 1697 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1698 "pre cal download procedure failed, try cal file: %d\n", 1699 ret); 1700 1701 ret = ath10k_download_cal_file(ar, ar->cal_file); 1702 if (ret == 0) { 1703 ar->cal_mode = ATH10K_CAL_MODE_FILE; 1704 goto done; 1705 } 1706 1707 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1708 "boot did not find a calibration file, try DT next: %d\n", 1709 ret); 1710 1711 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data"); 1712 if (ret == 0) { 1713 ar->cal_mode = ATH10K_CAL_MODE_DT; 1714 goto done; 1715 } 1716 1717 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1718 "boot did not find DT entry, try target EEPROM next: %d\n", 1719 ret); 1720 1721 ret = ath10k_download_cal_eeprom(ar); 1722 if (ret == 0) { 1723 ar->cal_mode = ATH10K_CAL_MODE_EEPROM; 1724 goto done; 1725 } 1726 1727 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1728 "boot did not find target EEPROM entry, try OTP next: %d\n", 1729 ret); 1730 1731 ret = ath10k_download_and_run_otp(ar); 1732 if (ret) { 1733 ath10k_err(ar, "failed to run otp: %d\n", ret); 1734 return ret; 1735 } 1736 1737 ar->cal_mode = ATH10K_CAL_MODE_OTP; 1738 1739 done: 1740 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1741 ath10k_cal_mode_str(ar->cal_mode)); 1742 return 0; 1743 } 1744 1745 static int ath10k_init_uart(struct ath10k *ar) 1746 { 1747 int ret; 1748 1749 /* 1750 * Explicitly setting UART prints to zero as target turns it on 1751 * based on scratch registers. 1752 */ 1753 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 1754 if (ret) { 1755 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 1756 return ret; 1757 } 1758 1759 if (!uart_print) 1760 return 0; 1761 1762 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 1763 if (ret) { 1764 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1765 return ret; 1766 } 1767 1768 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 1769 if (ret) { 1770 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1771 return ret; 1772 } 1773 1774 /* Set the UART baud rate to 19200. */ 1775 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 1776 if (ret) { 1777 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 1778 return ret; 1779 } 1780 1781 ath10k_info(ar, "UART prints enabled\n"); 1782 return 0; 1783 } 1784 1785 static int ath10k_init_hw_params(struct ath10k *ar) 1786 { 1787 const struct ath10k_hw_params *uninitialized_var(hw_params); 1788 int i; 1789 1790 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 1791 hw_params = &ath10k_hw_params_list[i]; 1792 1793 if (hw_params->id == ar->target_version && 1794 hw_params->dev_id == ar->dev_id) 1795 break; 1796 } 1797 1798 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 1799 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 1800 ar->target_version); 1801 return -EINVAL; 1802 } 1803 1804 ar->hw_params = *hw_params; 1805 1806 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 1807 ar->hw_params.name, ar->target_version); 1808 1809 return 0; 1810 } 1811 1812 static void ath10k_core_restart(struct work_struct *work) 1813 { 1814 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 1815 int ret; 1816 1817 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1818 1819 /* Place a barrier to make sure the compiler doesn't reorder 1820 * CRASH_FLUSH and calling other functions. 1821 */ 1822 barrier(); 1823 1824 ieee80211_stop_queues(ar->hw); 1825 ath10k_drain_tx(ar); 1826 complete(&ar->scan.started); 1827 complete(&ar->scan.completed); 1828 complete(&ar->scan.on_channel); 1829 complete(&ar->offchan_tx_completed); 1830 complete(&ar->install_key_done); 1831 complete(&ar->vdev_setup_done); 1832 complete(&ar->thermal.wmi_sync); 1833 complete(&ar->bss_survey_done); 1834 wake_up(&ar->htt.empty_tx_wq); 1835 wake_up(&ar->wmi.tx_credits_wq); 1836 wake_up(&ar->peer_mapping_wq); 1837 1838 /* TODO: We can have one instance of cancelling coverage_class_work by 1839 * moving it to ath10k_halt(), so that both stop() and restart() would 1840 * call that but it takes conf_mutex() and if we call cancel_work_sync() 1841 * with conf_mutex it will deadlock. 1842 */ 1843 cancel_work_sync(&ar->set_coverage_class_work); 1844 1845 mutex_lock(&ar->conf_mutex); 1846 1847 switch (ar->state) { 1848 case ATH10K_STATE_ON: 1849 ar->state = ATH10K_STATE_RESTARTING; 1850 ath10k_halt(ar); 1851 ath10k_scan_finish(ar); 1852 ieee80211_restart_hw(ar->hw); 1853 break; 1854 case ATH10K_STATE_OFF: 1855 /* this can happen if driver is being unloaded 1856 * or if the crash happens during FW probing 1857 */ 1858 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 1859 break; 1860 case ATH10K_STATE_RESTARTING: 1861 /* hw restart might be requested from multiple places */ 1862 break; 1863 case ATH10K_STATE_RESTARTED: 1864 ar->state = ATH10K_STATE_WEDGED; 1865 /* fall through */ 1866 case ATH10K_STATE_WEDGED: 1867 ath10k_warn(ar, "device is wedged, will not restart\n"); 1868 break; 1869 case ATH10K_STATE_UTF: 1870 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 1871 break; 1872 } 1873 1874 mutex_unlock(&ar->conf_mutex); 1875 1876 ret = ath10k_coredump_submit(ar); 1877 if (ret) 1878 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d", 1879 ret); 1880 } 1881 1882 static void ath10k_core_set_coverage_class_work(struct work_struct *work) 1883 { 1884 struct ath10k *ar = container_of(work, struct ath10k, 1885 set_coverage_class_work); 1886 1887 if (ar->hw_params.hw_ops->set_coverage_class) 1888 ar->hw_params.hw_ops->set_coverage_class(ar, -1); 1889 } 1890 1891 static int ath10k_core_init_firmware_features(struct ath10k *ar) 1892 { 1893 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 1894 1895 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) && 1896 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 1897 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 1898 return -EINVAL; 1899 } 1900 1901 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 1902 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 1903 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version); 1904 return -EINVAL; 1905 } 1906 1907 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 1908 switch (ath10k_cryptmode_param) { 1909 case ATH10K_CRYPT_MODE_HW: 1910 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1911 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1912 break; 1913 case ATH10K_CRYPT_MODE_SW: 1914 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1915 fw_file->fw_features)) { 1916 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 1917 return -EINVAL; 1918 } 1919 1920 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1921 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1922 break; 1923 default: 1924 ath10k_info(ar, "invalid cryptmode: %d\n", 1925 ath10k_cryptmode_param); 1926 return -EINVAL; 1927 } 1928 1929 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 1930 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 1931 1932 if (rawmode) { 1933 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1934 fw_file->fw_features)) { 1935 ath10k_err(ar, "rawmode = 1 requires support from firmware"); 1936 return -EINVAL; 1937 } 1938 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1939 } 1940 1941 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 1942 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 1943 1944 /* Workaround: 1945 * 1946 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 1947 * and causes enormous performance issues (malformed frames, 1948 * etc). 1949 * 1950 * Disabling A-MSDU makes RAW mode stable with heavy traffic 1951 * albeit a bit slower compared to regular operation. 1952 */ 1953 ar->htt.max_num_amsdu = 1; 1954 } 1955 1956 /* Backwards compatibility for firmwares without 1957 * ATH10K_FW_IE_WMI_OP_VERSION. 1958 */ 1959 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 1960 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 1961 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 1962 fw_file->fw_features)) 1963 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 1964 else 1965 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 1966 } else { 1967 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 1968 } 1969 } 1970 1971 switch (fw_file->wmi_op_version) { 1972 case ATH10K_FW_WMI_OP_VERSION_MAIN: 1973 ar->max_num_peers = TARGET_NUM_PEERS; 1974 ar->max_num_stations = TARGET_NUM_STATIONS; 1975 ar->max_num_vdevs = TARGET_NUM_VDEVS; 1976 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 1977 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1978 WMI_STAT_PEER; 1979 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1980 break; 1981 case ATH10K_FW_WMI_OP_VERSION_10_1: 1982 case ATH10K_FW_WMI_OP_VERSION_10_2: 1983 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 1984 if (ath10k_peer_stats_enabled(ar)) { 1985 ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS; 1986 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS; 1987 } else { 1988 ar->max_num_peers = TARGET_10X_NUM_PEERS; 1989 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 1990 } 1991 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 1992 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 1993 ar->fw_stats_req_mask = WMI_STAT_PEER; 1994 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1995 break; 1996 case ATH10K_FW_WMI_OP_VERSION_TLV: 1997 ar->max_num_peers = TARGET_TLV_NUM_PEERS; 1998 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 1999 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 2000 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 2001 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 2002 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 2003 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 2004 WMI_STAT_PEER; 2005 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2006 break; 2007 case ATH10K_FW_WMI_OP_VERSION_10_4: 2008 ar->max_num_peers = TARGET_10_4_NUM_PEERS; 2009 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 2010 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 2011 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 2012 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 2013 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER | 2014 WMI_10_4_STAT_PEER_EXTD; 2015 ar->max_spatial_stream = ar->hw_params.max_spatial_stream; 2016 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS; 2017 2018 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, 2019 fw_file->fw_features)) 2020 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC; 2021 else 2022 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 2023 break; 2024 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2025 case ATH10K_FW_WMI_OP_VERSION_MAX: 2026 WARN_ON(1); 2027 return -EINVAL; 2028 } 2029 2030 /* Backwards compatibility for firmwares without 2031 * ATH10K_FW_IE_HTT_OP_VERSION. 2032 */ 2033 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 2034 switch (fw_file->wmi_op_version) { 2035 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2036 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 2037 break; 2038 case ATH10K_FW_WMI_OP_VERSION_10_1: 2039 case ATH10K_FW_WMI_OP_VERSION_10_2: 2040 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2041 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 2042 break; 2043 case ATH10K_FW_WMI_OP_VERSION_TLV: 2044 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 2045 break; 2046 case ATH10K_FW_WMI_OP_VERSION_10_4: 2047 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2048 case ATH10K_FW_WMI_OP_VERSION_MAX: 2049 ath10k_err(ar, "htt op version not found from fw meta data"); 2050 return -EINVAL; 2051 } 2052 } 2053 2054 return 0; 2055 } 2056 2057 static int ath10k_core_reset_rx_filter(struct ath10k *ar) 2058 { 2059 int ret; 2060 int vdev_id; 2061 int vdev_type; 2062 int vdev_subtype; 2063 const u8 *vdev_addr; 2064 2065 vdev_id = 0; 2066 vdev_type = WMI_VDEV_TYPE_STA; 2067 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE); 2068 vdev_addr = ar->mac_addr; 2069 2070 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype, 2071 vdev_addr); 2072 if (ret) { 2073 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret); 2074 return ret; 2075 } 2076 2077 ret = ath10k_wmi_vdev_delete(ar, vdev_id); 2078 if (ret) { 2079 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret); 2080 return ret; 2081 } 2082 2083 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be 2084 * serialized properly implicitly. 2085 * 2086 * Moreover (most) WMI commands have no explicit acknowledges. It is 2087 * possible to infer it implicitly by poking firmware with echo 2088 * command - getting a reply means all preceding comments have been 2089 * (mostly) processed. 2090 * 2091 * In case of vdev create/delete this is sufficient. 2092 * 2093 * Without this it's possible to end up with a race when HTT Rx ring is 2094 * started before vdev create/delete hack is complete allowing a short 2095 * window of opportunity to receive (and Tx ACK) a bunch of frames. 2096 */ 2097 ret = ath10k_wmi_barrier(ar); 2098 if (ret) { 2099 ath10k_err(ar, "failed to ping firmware: %d\n", ret); 2100 return ret; 2101 } 2102 2103 return 0; 2104 } 2105 2106 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 2107 const struct ath10k_fw_components *fw) 2108 { 2109 int status; 2110 u32 val; 2111 2112 lockdep_assert_held(&ar->conf_mutex); 2113 2114 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2115 2116 ar->running_fw = fw; 2117 2118 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2119 ar->running_fw->fw_file.fw_features)) { 2120 ath10k_bmi_start(ar); 2121 2122 if (ath10k_init_configure_target(ar)) { 2123 status = -EINVAL; 2124 goto err; 2125 } 2126 2127 status = ath10k_download_cal_data(ar); 2128 if (status) 2129 goto err; 2130 2131 /* Some of of qca988x solutions are having global reset issue 2132 * during target initialization. Bypassing PLL setting before 2133 * downloading firmware and letting the SoC run on REF_CLK is 2134 * fixing the problem. Corresponding firmware change is also 2135 * needed to set the clock source once the target is 2136 * initialized. 2137 */ 2138 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 2139 ar->running_fw->fw_file.fw_features)) { 2140 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 2141 if (status) { 2142 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 2143 status); 2144 goto err; 2145 } 2146 } 2147 2148 status = ath10k_download_fw(ar); 2149 if (status) 2150 goto err; 2151 2152 status = ath10k_init_uart(ar); 2153 if (status) 2154 goto err; 2155 2156 if (ar->hif.bus == ATH10K_BUS_SDIO) 2157 ath10k_init_sdio(ar); 2158 } 2159 2160 ar->htc.htc_ops.target_send_suspend_complete = 2161 ath10k_send_suspend_complete; 2162 2163 status = ath10k_htc_init(ar); 2164 if (status) { 2165 ath10k_err(ar, "could not init HTC (%d)\n", status); 2166 goto err; 2167 } 2168 2169 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2170 ar->running_fw->fw_file.fw_features)) { 2171 status = ath10k_bmi_done(ar); 2172 if (status) 2173 goto err; 2174 } 2175 2176 status = ath10k_wmi_attach(ar); 2177 if (status) { 2178 ath10k_err(ar, "WMI attach failed: %d\n", status); 2179 goto err; 2180 } 2181 2182 status = ath10k_htt_init(ar); 2183 if (status) { 2184 ath10k_err(ar, "failed to init htt: %d\n", status); 2185 goto err_wmi_detach; 2186 } 2187 2188 status = ath10k_htt_tx_start(&ar->htt); 2189 if (status) { 2190 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 2191 goto err_wmi_detach; 2192 } 2193 2194 /* If firmware indicates Full Rx Reorder support it must be used in a 2195 * slightly different manner. Let HTT code know. 2196 */ 2197 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 2198 ar->wmi.svc_map)); 2199 2200 status = ath10k_htt_rx_alloc(&ar->htt); 2201 if (status) { 2202 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 2203 goto err_htt_tx_detach; 2204 } 2205 2206 status = ath10k_hif_start(ar); 2207 if (status) { 2208 ath10k_err(ar, "could not start HIF: %d\n", status); 2209 goto err_htt_rx_detach; 2210 } 2211 2212 status = ath10k_htc_wait_target(&ar->htc); 2213 if (status) { 2214 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 2215 goto err_hif_stop; 2216 } 2217 2218 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2219 status = ath10k_htt_connect(&ar->htt); 2220 if (status) { 2221 ath10k_err(ar, "failed to connect htt (%d)\n", status); 2222 goto err_hif_stop; 2223 } 2224 } 2225 2226 status = ath10k_wmi_connect(ar); 2227 if (status) { 2228 ath10k_err(ar, "could not connect wmi: %d\n", status); 2229 goto err_hif_stop; 2230 } 2231 2232 status = ath10k_htc_start(&ar->htc); 2233 if (status) { 2234 ath10k_err(ar, "failed to start htc: %d\n", status); 2235 goto err_hif_stop; 2236 } 2237 2238 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2239 status = ath10k_wmi_wait_for_service_ready(ar); 2240 if (status) { 2241 ath10k_warn(ar, "wmi service ready event not received"); 2242 goto err_hif_stop; 2243 } 2244 } 2245 2246 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 2247 ar->hw->wiphy->fw_version); 2248 2249 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) && 2250 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2251 val = 0; 2252 if (ath10k_peer_stats_enabled(ar)) 2253 val = WMI_10_4_PEER_STATS; 2254 2255 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) 2256 val |= WMI_10_4_BSS_CHANNEL_INFO_64; 2257 2258 /* 10.4 firmware supports BT-Coex without reloading firmware 2259 * via pdev param. To support Bluetooth coexistence pdev param, 2260 * WMI_COEX_GPIO_SUPPORT of extended resource config should be 2261 * enabled always. 2262 */ 2263 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 2264 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 2265 ar->running_fw->fw_file.fw_features)) 2266 val |= WMI_10_4_COEX_GPIO_SUPPORT; 2267 2268 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, 2269 ar->wmi.svc_map)) 2270 val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY; 2271 2272 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, 2273 ar->wmi.svc_map)) 2274 val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA; 2275 2276 status = ath10k_mac_ext_resource_config(ar, val); 2277 if (status) { 2278 ath10k_err(ar, 2279 "failed to send ext resource cfg command : %d\n", 2280 status); 2281 goto err_hif_stop; 2282 } 2283 } 2284 2285 status = ath10k_wmi_cmd_init(ar); 2286 if (status) { 2287 ath10k_err(ar, "could not send WMI init command (%d)\n", 2288 status); 2289 goto err_hif_stop; 2290 } 2291 2292 status = ath10k_wmi_wait_for_unified_ready(ar); 2293 if (status) { 2294 ath10k_err(ar, "wmi unified ready event not received\n"); 2295 goto err_hif_stop; 2296 } 2297 2298 /* Some firmware revisions do not properly set up hardware rx filter 2299 * registers. 2300 * 2301 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK 2302 * is filled with 0s instead of 1s allowing HW to respond with ACKs to 2303 * any frames that matches MAC_PCU_RX_FILTER which is also 2304 * misconfigured to accept anything. 2305 * 2306 * The ADDR1 is programmed using internal firmware structure field and 2307 * can't be (easily/sanely) reached from the driver explicitly. It is 2308 * possible to implicitly make it correct by creating a dummy vdev and 2309 * then deleting it. 2310 */ 2311 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2312 status = ath10k_core_reset_rx_filter(ar); 2313 if (status) { 2314 ath10k_err(ar, 2315 "failed to reset rx filter: %d\n", status); 2316 goto err_hif_stop; 2317 } 2318 } 2319 2320 status = ath10k_htt_rx_ring_refill(ar); 2321 if (status) { 2322 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 2323 goto err_hif_stop; 2324 } 2325 2326 if (ar->max_num_vdevs >= 64) 2327 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL; 2328 else 2329 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 2330 2331 INIT_LIST_HEAD(&ar->arvifs); 2332 2333 /* we don't care about HTT in UTF mode */ 2334 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2335 status = ath10k_htt_setup(&ar->htt); 2336 if (status) { 2337 ath10k_err(ar, "failed to setup htt: %d\n", status); 2338 goto err_hif_stop; 2339 } 2340 } 2341 2342 status = ath10k_debug_start(ar); 2343 if (status) 2344 goto err_hif_stop; 2345 2346 return 0; 2347 2348 err_hif_stop: 2349 ath10k_hif_stop(ar); 2350 err_htt_rx_detach: 2351 ath10k_htt_rx_free(&ar->htt); 2352 err_htt_tx_detach: 2353 ath10k_htt_tx_free(&ar->htt); 2354 err_wmi_detach: 2355 ath10k_wmi_detach(ar); 2356 err: 2357 return status; 2358 } 2359 EXPORT_SYMBOL(ath10k_core_start); 2360 2361 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 2362 { 2363 int ret; 2364 unsigned long time_left; 2365 2366 reinit_completion(&ar->target_suspend); 2367 2368 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 2369 if (ret) { 2370 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 2371 return ret; 2372 } 2373 2374 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 2375 2376 if (!time_left) { 2377 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 2378 return -ETIMEDOUT; 2379 } 2380 2381 return 0; 2382 } 2383 2384 void ath10k_core_stop(struct ath10k *ar) 2385 { 2386 lockdep_assert_held(&ar->conf_mutex); 2387 ath10k_debug_stop(ar); 2388 2389 /* try to suspend target */ 2390 if (ar->state != ATH10K_STATE_RESTARTING && 2391 ar->state != ATH10K_STATE_UTF) 2392 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 2393 2394 ath10k_hif_stop(ar); 2395 ath10k_htt_tx_stop(&ar->htt); 2396 ath10k_htt_rx_free(&ar->htt); 2397 ath10k_wmi_detach(ar); 2398 } 2399 EXPORT_SYMBOL(ath10k_core_stop); 2400 2401 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 2402 * order to know what hw capabilities should be advertised to mac80211 it is 2403 * necessary to load the firmware (and tear it down immediately since start 2404 * hook will try to init it again) before registering 2405 */ 2406 static int ath10k_core_probe_fw(struct ath10k *ar) 2407 { 2408 struct bmi_target_info target_info; 2409 int ret = 0; 2410 2411 ret = ath10k_hif_power_up(ar); 2412 if (ret) { 2413 ath10k_err(ar, "could not start pci hif (%d)\n", ret); 2414 return ret; 2415 } 2416 2417 switch (ar->hif.bus) { 2418 case ATH10K_BUS_SDIO: 2419 memset(&target_info, 0, sizeof(target_info)); 2420 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info); 2421 if (ret) { 2422 ath10k_err(ar, "could not get target info (%d)\n", ret); 2423 goto err_power_down; 2424 } 2425 ar->target_version = target_info.version; 2426 ar->hw->wiphy->hw_version = target_info.version; 2427 break; 2428 case ATH10K_BUS_PCI: 2429 case ATH10K_BUS_AHB: 2430 memset(&target_info, 0, sizeof(target_info)); 2431 ret = ath10k_bmi_get_target_info(ar, &target_info); 2432 if (ret) { 2433 ath10k_err(ar, "could not get target info (%d)\n", ret); 2434 goto err_power_down; 2435 } 2436 ar->target_version = target_info.version; 2437 ar->hw->wiphy->hw_version = target_info.version; 2438 break; 2439 case ATH10K_BUS_SNOC: 2440 break; 2441 default: 2442 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus); 2443 } 2444 2445 ret = ath10k_init_hw_params(ar); 2446 if (ret) { 2447 ath10k_err(ar, "could not get hw params (%d)\n", ret); 2448 goto err_power_down; 2449 } 2450 2451 ret = ath10k_core_fetch_firmware_files(ar); 2452 if (ret) { 2453 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 2454 goto err_power_down; 2455 } 2456 2457 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) != 2458 sizeof(ar->normal_mode_fw.fw_file.fw_version)); 2459 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version, 2460 sizeof(ar->hw->wiphy->fw_version)); 2461 2462 ath10k_debug_print_hwfw_info(ar); 2463 2464 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2465 ar->normal_mode_fw.fw_file.fw_features)) { 2466 ret = ath10k_core_pre_cal_download(ar); 2467 if (ret) { 2468 /* pre calibration data download is not necessary 2469 * for all the chipsets. Ignore failures and continue. 2470 */ 2471 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2472 "could not load pre cal data: %d\n", ret); 2473 } 2474 2475 ret = ath10k_core_get_board_id_from_otp(ar); 2476 if (ret && ret != -EOPNOTSUPP) { 2477 ath10k_err(ar, "failed to get board id from otp: %d\n", 2478 ret); 2479 goto err_free_firmware_files; 2480 } 2481 2482 ret = ath10k_core_check_smbios(ar); 2483 if (ret) 2484 ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n"); 2485 2486 ret = ath10k_core_check_dt(ar); 2487 if (ret) 2488 ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n"); 2489 2490 ret = ath10k_core_fetch_board_file(ar); 2491 if (ret) { 2492 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 2493 goto err_free_firmware_files; 2494 } 2495 2496 ath10k_debug_print_board_info(ar); 2497 } 2498 2499 ret = ath10k_core_init_firmware_features(ar); 2500 if (ret) { 2501 ath10k_err(ar, "fatal problem with firmware features: %d\n", 2502 ret); 2503 goto err_free_firmware_files; 2504 } 2505 2506 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2507 ar->normal_mode_fw.fw_file.fw_features)) { 2508 ret = ath10k_swap_code_seg_init(ar, 2509 &ar->normal_mode_fw.fw_file); 2510 if (ret) { 2511 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 2512 ret); 2513 goto err_free_firmware_files; 2514 } 2515 } 2516 2517 mutex_lock(&ar->conf_mutex); 2518 2519 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL, 2520 &ar->normal_mode_fw); 2521 if (ret) { 2522 ath10k_err(ar, "could not init core (%d)\n", ret); 2523 goto err_unlock; 2524 } 2525 2526 ath10k_debug_print_boot_info(ar); 2527 ath10k_core_stop(ar); 2528 2529 mutex_unlock(&ar->conf_mutex); 2530 2531 ath10k_hif_power_down(ar); 2532 return 0; 2533 2534 err_unlock: 2535 mutex_unlock(&ar->conf_mutex); 2536 2537 err_free_firmware_files: 2538 ath10k_core_free_firmware_files(ar); 2539 2540 err_power_down: 2541 ath10k_hif_power_down(ar); 2542 2543 return ret; 2544 } 2545 2546 static void ath10k_core_register_work(struct work_struct *work) 2547 { 2548 struct ath10k *ar = container_of(work, struct ath10k, register_work); 2549 int status; 2550 2551 /* peer stats are enabled by default */ 2552 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags); 2553 2554 status = ath10k_core_probe_fw(ar); 2555 if (status) { 2556 ath10k_err(ar, "could not probe fw (%d)\n", status); 2557 goto err; 2558 } 2559 2560 status = ath10k_mac_register(ar); 2561 if (status) { 2562 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 2563 goto err_release_fw; 2564 } 2565 2566 status = ath10k_coredump_register(ar); 2567 if (status) { 2568 ath10k_err(ar, "unable to register coredump\n"); 2569 goto err_unregister_mac; 2570 } 2571 2572 status = ath10k_debug_register(ar); 2573 if (status) { 2574 ath10k_err(ar, "unable to initialize debugfs\n"); 2575 goto err_unregister_coredump; 2576 } 2577 2578 status = ath10k_spectral_create(ar); 2579 if (status) { 2580 ath10k_err(ar, "failed to initialize spectral\n"); 2581 goto err_debug_destroy; 2582 } 2583 2584 status = ath10k_thermal_register(ar); 2585 if (status) { 2586 ath10k_err(ar, "could not register thermal device: %d\n", 2587 status); 2588 goto err_spectral_destroy; 2589 } 2590 2591 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 2592 return; 2593 2594 err_spectral_destroy: 2595 ath10k_spectral_destroy(ar); 2596 err_debug_destroy: 2597 ath10k_debug_destroy(ar); 2598 err_unregister_coredump: 2599 ath10k_coredump_unregister(ar); 2600 err_unregister_mac: 2601 ath10k_mac_unregister(ar); 2602 err_release_fw: 2603 ath10k_core_free_firmware_files(ar); 2604 err: 2605 /* TODO: It's probably a good idea to release device from the driver 2606 * but calling device_release_driver() here will cause a deadlock. 2607 */ 2608 return; 2609 } 2610 2611 int ath10k_core_register(struct ath10k *ar, u32 chip_id) 2612 { 2613 ar->chip_id = chip_id; 2614 queue_work(ar->workqueue, &ar->register_work); 2615 2616 return 0; 2617 } 2618 EXPORT_SYMBOL(ath10k_core_register); 2619 2620 void ath10k_core_unregister(struct ath10k *ar) 2621 { 2622 cancel_work_sync(&ar->register_work); 2623 2624 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 2625 return; 2626 2627 ath10k_thermal_unregister(ar); 2628 /* Stop spectral before unregistering from mac80211 to remove the 2629 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 2630 * would be already be free'd recursively, leading to a double free. 2631 */ 2632 ath10k_spectral_destroy(ar); 2633 2634 /* We must unregister from mac80211 before we stop HTC and HIF. 2635 * Otherwise we will fail to submit commands to FW and mac80211 will be 2636 * unhappy about callback failures. 2637 */ 2638 ath10k_mac_unregister(ar); 2639 2640 ath10k_testmode_destroy(ar); 2641 2642 ath10k_core_free_firmware_files(ar); 2643 ath10k_core_free_board_files(ar); 2644 2645 ath10k_debug_unregister(ar); 2646 } 2647 EXPORT_SYMBOL(ath10k_core_unregister); 2648 2649 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 2650 enum ath10k_bus bus, 2651 enum ath10k_hw_rev hw_rev, 2652 const struct ath10k_hif_ops *hif_ops) 2653 { 2654 struct ath10k *ar; 2655 int ret; 2656 2657 ar = ath10k_mac_create(priv_size); 2658 if (!ar) 2659 return NULL; 2660 2661 ar->ath_common.priv = ar; 2662 ar->ath_common.hw = ar->hw; 2663 ar->dev = dev; 2664 ar->hw_rev = hw_rev; 2665 ar->hif.ops = hif_ops; 2666 ar->hif.bus = bus; 2667 2668 switch (hw_rev) { 2669 case ATH10K_HW_QCA988X: 2670 case ATH10K_HW_QCA9887: 2671 ar->regs = &qca988x_regs; 2672 ar->hw_ce_regs = &qcax_ce_regs; 2673 ar->hw_values = &qca988x_values; 2674 break; 2675 case ATH10K_HW_QCA6174: 2676 case ATH10K_HW_QCA9377: 2677 ar->regs = &qca6174_regs; 2678 ar->hw_ce_regs = &qcax_ce_regs; 2679 ar->hw_values = &qca6174_values; 2680 break; 2681 case ATH10K_HW_QCA99X0: 2682 case ATH10K_HW_QCA9984: 2683 ar->regs = &qca99x0_regs; 2684 ar->hw_ce_regs = &qcax_ce_regs; 2685 ar->hw_values = &qca99x0_values; 2686 break; 2687 case ATH10K_HW_QCA9888: 2688 ar->regs = &qca99x0_regs; 2689 ar->hw_ce_regs = &qcax_ce_regs; 2690 ar->hw_values = &qca9888_values; 2691 break; 2692 case ATH10K_HW_QCA4019: 2693 ar->regs = &qca4019_regs; 2694 ar->hw_ce_regs = &qcax_ce_regs; 2695 ar->hw_values = &qca4019_values; 2696 break; 2697 case ATH10K_HW_WCN3990: 2698 ar->regs = &wcn3990_regs; 2699 ar->hw_ce_regs = &wcn3990_ce_regs; 2700 ar->hw_values = &wcn3990_values; 2701 break; 2702 default: 2703 ath10k_err(ar, "unsupported core hardware revision %d\n", 2704 hw_rev); 2705 ret = -ENOTSUPP; 2706 goto err_free_mac; 2707 } 2708 2709 init_completion(&ar->scan.started); 2710 init_completion(&ar->scan.completed); 2711 init_completion(&ar->scan.on_channel); 2712 init_completion(&ar->target_suspend); 2713 init_completion(&ar->wow.wakeup_completed); 2714 2715 init_completion(&ar->install_key_done); 2716 init_completion(&ar->vdev_setup_done); 2717 init_completion(&ar->thermal.wmi_sync); 2718 init_completion(&ar->bss_survey_done); 2719 2720 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 2721 2722 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 2723 if (!ar->workqueue) 2724 goto err_free_mac; 2725 2726 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 2727 if (!ar->workqueue_aux) 2728 goto err_free_wq; 2729 2730 mutex_init(&ar->conf_mutex); 2731 spin_lock_init(&ar->data_lock); 2732 spin_lock_init(&ar->txqs_lock); 2733 2734 INIT_LIST_HEAD(&ar->txqs); 2735 INIT_LIST_HEAD(&ar->peers); 2736 init_waitqueue_head(&ar->peer_mapping_wq); 2737 init_waitqueue_head(&ar->htt.empty_tx_wq); 2738 init_waitqueue_head(&ar->wmi.tx_credits_wq); 2739 2740 init_completion(&ar->offchan_tx_completed); 2741 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 2742 skb_queue_head_init(&ar->offchan_tx_queue); 2743 2744 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 2745 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 2746 2747 INIT_WORK(&ar->register_work, ath10k_core_register_work); 2748 INIT_WORK(&ar->restart_work, ath10k_core_restart); 2749 INIT_WORK(&ar->set_coverage_class_work, 2750 ath10k_core_set_coverage_class_work); 2751 2752 init_dummy_netdev(&ar->napi_dev); 2753 2754 ret = ath10k_coredump_create(ar); 2755 if (ret) 2756 goto err_free_aux_wq; 2757 2758 ret = ath10k_debug_create(ar); 2759 if (ret) 2760 goto err_free_coredump; 2761 2762 return ar; 2763 2764 err_free_coredump: 2765 ath10k_coredump_destroy(ar); 2766 2767 err_free_aux_wq: 2768 destroy_workqueue(ar->workqueue_aux); 2769 err_free_wq: 2770 destroy_workqueue(ar->workqueue); 2771 2772 err_free_mac: 2773 ath10k_mac_destroy(ar); 2774 2775 return NULL; 2776 } 2777 EXPORT_SYMBOL(ath10k_core_create); 2778 2779 void ath10k_core_destroy(struct ath10k *ar) 2780 { 2781 flush_workqueue(ar->workqueue); 2782 destroy_workqueue(ar->workqueue); 2783 2784 flush_workqueue(ar->workqueue_aux); 2785 destroy_workqueue(ar->workqueue_aux); 2786 2787 ath10k_debug_destroy(ar); 2788 ath10k_coredump_destroy(ar); 2789 ath10k_htt_tx_destroy(&ar->htt); 2790 ath10k_wmi_free_host_mem(ar); 2791 ath10k_mac_destroy(ar); 2792 } 2793 EXPORT_SYMBOL(ath10k_core_destroy); 2794 2795 MODULE_AUTHOR("Qualcomm Atheros"); 2796 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards."); 2797 MODULE_LICENSE("Dual BSD/GPL"); 2798