1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (c) 2005-2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. 6 */ 7 8 #include <linux/module.h> 9 #include <linux/firmware.h> 10 #include <linux/of.h> 11 #include <linux/property.h> 12 #include <linux/dmi.h> 13 #include <linux/ctype.h> 14 #include <linux/pm_qos.h> 15 #include <linux/nvmem-consumer.h> 16 #include <asm/byteorder.h> 17 18 #include "core.h" 19 #include "mac.h" 20 #include "htc.h" 21 #include "hif.h" 22 #include "wmi.h" 23 #include "bmi.h" 24 #include "debug.h" 25 #include "htt.h" 26 #include "testmode.h" 27 #include "wmi-ops.h" 28 #include "coredump.h" 29 30 unsigned int ath10k_debug_mask; 31 EXPORT_SYMBOL(ath10k_debug_mask); 32 33 static unsigned int ath10k_cryptmode_param; 34 static bool uart_print; 35 static bool skip_otp; 36 static bool fw_diag_log; 37 38 /* frame mode values are mapped as per enum ath10k_hw_txrx_mode */ 39 unsigned int ath10k_frame_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 40 41 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) | 42 BIT(ATH10K_FW_CRASH_DUMP_CE_DATA); 43 44 /* FIXME: most of these should be readonly */ 45 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 46 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 47 module_param(uart_print, bool, 0644); 48 module_param(skip_otp, bool, 0644); 49 module_param(fw_diag_log, bool, 0644); 50 module_param_named(frame_mode, ath10k_frame_mode, uint, 0644); 51 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444); 52 53 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 54 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 55 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 56 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 57 MODULE_PARM_DESC(frame_mode, 58 "Datapath frame mode (0: raw, 1: native wifi (default), 2: ethernet)"); 59 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file"); 60 MODULE_PARM_DESC(fw_diag_log, "Diag based fw log debugging"); 61 62 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 63 { 64 .id = QCA988X_HW_2_0_VERSION, 65 .dev_id = QCA988X_2_0_DEVICE_ID, 66 .bus = ATH10K_BUS_PCI, 67 .name = "qca988x hw2.0", 68 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 69 .uart_pin = 7, 70 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 71 .otp_exe_param = 0, 72 .channel_counters_freq_hz = 88000, 73 .max_probe_resp_desc_thres = 0, 74 .cal_data_len = 2116, 75 .fw = { 76 .dir = QCA988X_HW_2_0_FW_DIR, 77 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 78 .board_size = QCA988X_BOARD_DATA_SZ, 79 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 80 }, 81 .rx_desc_ops = &qca988x_rx_desc_ops, 82 .hw_ops = &qca988x_ops, 83 .decap_align_bytes = 4, 84 .spectral_bin_discard = 0, 85 .spectral_bin_offset = 0, 86 .vht160_mcs_rx_highest = 0, 87 .vht160_mcs_tx_highest = 0, 88 .n_cipher_suites = 8, 89 .ast_skid_limit = 0x10, 90 .num_wds_entries = 0x20, 91 .target_64bit = false, 92 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 93 .shadow_reg_support = false, 94 .rri_on_ddr = false, 95 .hw_filter_reset_required = true, 96 .fw_diag_ce_download = false, 97 .credit_size_workaround = false, 98 .tx_stats_over_pktlog = true, 99 .dynamic_sar_support = false, 100 .hw_restart_disconnect = false, 101 }, 102 { 103 .id = QCA988X_HW_2_0_VERSION, 104 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT, 105 .name = "qca988x hw2.0 ubiquiti", 106 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 107 .uart_pin = 7, 108 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 109 .otp_exe_param = 0, 110 .channel_counters_freq_hz = 88000, 111 .max_probe_resp_desc_thres = 0, 112 .cal_data_len = 2116, 113 .fw = { 114 .dir = QCA988X_HW_2_0_FW_DIR, 115 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 116 .board_size = QCA988X_BOARD_DATA_SZ, 117 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 118 }, 119 .rx_desc_ops = &qca988x_rx_desc_ops, 120 .hw_ops = &qca988x_ops, 121 .decap_align_bytes = 4, 122 .spectral_bin_discard = 0, 123 .spectral_bin_offset = 0, 124 .vht160_mcs_rx_highest = 0, 125 .vht160_mcs_tx_highest = 0, 126 .n_cipher_suites = 8, 127 .ast_skid_limit = 0x10, 128 .num_wds_entries = 0x20, 129 .target_64bit = false, 130 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 131 .shadow_reg_support = false, 132 .rri_on_ddr = false, 133 .hw_filter_reset_required = true, 134 .fw_diag_ce_download = false, 135 .credit_size_workaround = false, 136 .tx_stats_over_pktlog = true, 137 .dynamic_sar_support = false, 138 .hw_restart_disconnect = false, 139 }, 140 { 141 .id = QCA9887_HW_1_0_VERSION, 142 .dev_id = QCA9887_1_0_DEVICE_ID, 143 .bus = ATH10K_BUS_PCI, 144 .name = "qca9887 hw1.0", 145 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR, 146 .uart_pin = 7, 147 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 148 .otp_exe_param = 0, 149 .channel_counters_freq_hz = 88000, 150 .max_probe_resp_desc_thres = 0, 151 .cal_data_len = 2116, 152 .fw = { 153 .dir = QCA9887_HW_1_0_FW_DIR, 154 .board = QCA9887_HW_1_0_BOARD_DATA_FILE, 155 .board_size = QCA9887_BOARD_DATA_SZ, 156 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ, 157 }, 158 .rx_desc_ops = &qca988x_rx_desc_ops, 159 .hw_ops = &qca988x_ops, 160 .decap_align_bytes = 4, 161 .spectral_bin_discard = 0, 162 .spectral_bin_offset = 0, 163 .vht160_mcs_rx_highest = 0, 164 .vht160_mcs_tx_highest = 0, 165 .n_cipher_suites = 8, 166 .ast_skid_limit = 0x10, 167 .num_wds_entries = 0x20, 168 .target_64bit = false, 169 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 170 .shadow_reg_support = false, 171 .rri_on_ddr = false, 172 .hw_filter_reset_required = true, 173 .fw_diag_ce_download = false, 174 .credit_size_workaround = false, 175 .tx_stats_over_pktlog = false, 176 .dynamic_sar_support = false, 177 .hw_restart_disconnect = false, 178 }, 179 { 180 .id = QCA6174_HW_3_2_VERSION, 181 .dev_id = QCA6174_3_2_DEVICE_ID, 182 .bus = ATH10K_BUS_SDIO, 183 .name = "qca6174 hw3.2 sdio", 184 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 185 .uart_pin = 19, 186 .otp_exe_param = 0, 187 .channel_counters_freq_hz = 88000, 188 .max_probe_resp_desc_thres = 0, 189 .cal_data_len = 0, 190 .fw = { 191 .dir = QCA6174_HW_3_0_FW_DIR, 192 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 193 .board_size = QCA6174_BOARD_DATA_SZ, 194 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 195 }, 196 .rx_desc_ops = &qca988x_rx_desc_ops, 197 .hw_ops = &qca6174_sdio_ops, 198 .hw_clk = qca6174_clk, 199 .target_cpu_freq = 176000000, 200 .decap_align_bytes = 4, 201 .n_cipher_suites = 8, 202 .num_peers = 10, 203 .ast_skid_limit = 0x10, 204 .num_wds_entries = 0x20, 205 .uart_pin_workaround = true, 206 .tx_stats_over_pktlog = false, 207 .credit_size_workaround = false, 208 .bmi_large_size_download = true, 209 .supports_peer_stats_info = true, 210 .dynamic_sar_support = true, 211 .hw_restart_disconnect = false, 212 }, 213 { 214 .id = QCA6174_HW_2_1_VERSION, 215 .dev_id = QCA6164_2_1_DEVICE_ID, 216 .bus = ATH10K_BUS_PCI, 217 .name = "qca6164 hw2.1", 218 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 219 .uart_pin = 6, 220 .otp_exe_param = 0, 221 .channel_counters_freq_hz = 88000, 222 .max_probe_resp_desc_thres = 0, 223 .cal_data_len = 8124, 224 .fw = { 225 .dir = QCA6174_HW_2_1_FW_DIR, 226 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 227 .board_size = QCA6174_BOARD_DATA_SZ, 228 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 229 }, 230 .rx_desc_ops = &qca988x_rx_desc_ops, 231 .hw_ops = &qca988x_ops, 232 .decap_align_bytes = 4, 233 .spectral_bin_discard = 0, 234 .spectral_bin_offset = 0, 235 .vht160_mcs_rx_highest = 0, 236 .vht160_mcs_tx_highest = 0, 237 .n_cipher_suites = 8, 238 .ast_skid_limit = 0x10, 239 .num_wds_entries = 0x20, 240 .target_64bit = false, 241 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 242 .shadow_reg_support = false, 243 .rri_on_ddr = false, 244 .hw_filter_reset_required = true, 245 .fw_diag_ce_download = false, 246 .credit_size_workaround = false, 247 .tx_stats_over_pktlog = false, 248 .dynamic_sar_support = false, 249 .hw_restart_disconnect = false, 250 }, 251 { 252 .id = QCA6174_HW_2_1_VERSION, 253 .dev_id = QCA6174_2_1_DEVICE_ID, 254 .bus = ATH10K_BUS_PCI, 255 .name = "qca6174 hw2.1", 256 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 257 .uart_pin = 6, 258 .otp_exe_param = 0, 259 .channel_counters_freq_hz = 88000, 260 .max_probe_resp_desc_thres = 0, 261 .cal_data_len = 8124, 262 .fw = { 263 .dir = QCA6174_HW_2_1_FW_DIR, 264 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 265 .board_size = QCA6174_BOARD_DATA_SZ, 266 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 267 }, 268 .rx_desc_ops = &qca988x_rx_desc_ops, 269 .hw_ops = &qca988x_ops, 270 .decap_align_bytes = 4, 271 .spectral_bin_discard = 0, 272 .spectral_bin_offset = 0, 273 .vht160_mcs_rx_highest = 0, 274 .vht160_mcs_tx_highest = 0, 275 .n_cipher_suites = 8, 276 .ast_skid_limit = 0x10, 277 .num_wds_entries = 0x20, 278 .target_64bit = false, 279 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 280 .shadow_reg_support = false, 281 .rri_on_ddr = false, 282 .hw_filter_reset_required = true, 283 .fw_diag_ce_download = false, 284 .credit_size_workaround = false, 285 .tx_stats_over_pktlog = false, 286 .dynamic_sar_support = false, 287 .hw_restart_disconnect = false, 288 }, 289 { 290 .id = QCA6174_HW_3_0_VERSION, 291 .dev_id = QCA6174_2_1_DEVICE_ID, 292 .bus = ATH10K_BUS_PCI, 293 .name = "qca6174 hw3.0", 294 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 295 .uart_pin = 6, 296 .otp_exe_param = 0, 297 .channel_counters_freq_hz = 88000, 298 .max_probe_resp_desc_thres = 0, 299 .cal_data_len = 8124, 300 .fw = { 301 .dir = QCA6174_HW_3_0_FW_DIR, 302 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 303 .board_size = QCA6174_BOARD_DATA_SZ, 304 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 305 }, 306 .rx_desc_ops = &qca988x_rx_desc_ops, 307 .hw_ops = &qca988x_ops, 308 .decap_align_bytes = 4, 309 .spectral_bin_discard = 0, 310 .spectral_bin_offset = 0, 311 .vht160_mcs_rx_highest = 0, 312 .vht160_mcs_tx_highest = 0, 313 .n_cipher_suites = 8, 314 .ast_skid_limit = 0x10, 315 .num_wds_entries = 0x20, 316 .target_64bit = false, 317 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 318 .shadow_reg_support = false, 319 .rri_on_ddr = false, 320 .hw_filter_reset_required = true, 321 .fw_diag_ce_download = false, 322 .credit_size_workaround = false, 323 .tx_stats_over_pktlog = false, 324 .dynamic_sar_support = false, 325 .hw_restart_disconnect = false, 326 }, 327 { 328 .id = QCA6174_HW_3_2_VERSION, 329 .dev_id = QCA6174_2_1_DEVICE_ID, 330 .bus = ATH10K_BUS_PCI, 331 .name = "qca6174 hw3.2", 332 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 333 .uart_pin = 6, 334 .otp_exe_param = 0, 335 .channel_counters_freq_hz = 88000, 336 .max_probe_resp_desc_thres = 0, 337 .cal_data_len = 8124, 338 .fw = { 339 /* uses same binaries as hw3.0 */ 340 .dir = QCA6174_HW_3_0_FW_DIR, 341 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 342 .board_size = QCA6174_BOARD_DATA_SZ, 343 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 344 }, 345 .rx_desc_ops = &qca988x_rx_desc_ops, 346 .hw_ops = &qca6174_ops, 347 .hw_clk = qca6174_clk, 348 .target_cpu_freq = 176000000, 349 .decap_align_bytes = 4, 350 .spectral_bin_discard = 0, 351 .spectral_bin_offset = 0, 352 .vht160_mcs_rx_highest = 0, 353 .vht160_mcs_tx_highest = 0, 354 .n_cipher_suites = 8, 355 .ast_skid_limit = 0x10, 356 .num_wds_entries = 0x20, 357 .target_64bit = false, 358 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 359 .shadow_reg_support = false, 360 .rri_on_ddr = false, 361 .hw_filter_reset_required = true, 362 .fw_diag_ce_download = true, 363 .credit_size_workaround = false, 364 .tx_stats_over_pktlog = false, 365 .supports_peer_stats_info = true, 366 .dynamic_sar_support = true, 367 .hw_restart_disconnect = false, 368 }, 369 { 370 .id = QCA99X0_HW_2_0_DEV_VERSION, 371 .dev_id = QCA99X0_2_0_DEVICE_ID, 372 .bus = ATH10K_BUS_PCI, 373 .name = "qca99x0 hw2.0", 374 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 375 .uart_pin = 7, 376 .otp_exe_param = 0x00000700, 377 .continuous_frag_desc = true, 378 .cck_rate_map_rev2 = true, 379 .channel_counters_freq_hz = 150000, 380 .max_probe_resp_desc_thres = 24, 381 .tx_chain_mask = 0xf, 382 .rx_chain_mask = 0xf, 383 .max_spatial_stream = 4, 384 .cal_data_len = 12064, 385 .fw = { 386 .dir = QCA99X0_HW_2_0_FW_DIR, 387 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 388 .board_size = QCA99X0_BOARD_DATA_SZ, 389 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 390 }, 391 .sw_decrypt_mcast_mgmt = true, 392 .rx_desc_ops = &qca99x0_rx_desc_ops, 393 .hw_ops = &qca99x0_ops, 394 .decap_align_bytes = 1, 395 .spectral_bin_discard = 4, 396 .spectral_bin_offset = 0, 397 .vht160_mcs_rx_highest = 0, 398 .vht160_mcs_tx_highest = 0, 399 .n_cipher_suites = 11, 400 .ast_skid_limit = 0x10, 401 .num_wds_entries = 0x20, 402 .target_64bit = false, 403 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 404 .shadow_reg_support = false, 405 .rri_on_ddr = false, 406 .hw_filter_reset_required = true, 407 .fw_diag_ce_download = false, 408 .credit_size_workaround = false, 409 .tx_stats_over_pktlog = false, 410 .dynamic_sar_support = false, 411 .hw_restart_disconnect = false, 412 }, 413 { 414 .id = QCA9984_HW_1_0_DEV_VERSION, 415 .dev_id = QCA9984_1_0_DEVICE_ID, 416 .bus = ATH10K_BUS_PCI, 417 .name = "qca9984/qca9994 hw1.0", 418 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR, 419 .uart_pin = 7, 420 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 421 .otp_exe_param = 0x00000700, 422 .continuous_frag_desc = true, 423 .cck_rate_map_rev2 = true, 424 .channel_counters_freq_hz = 150000, 425 .max_probe_resp_desc_thres = 24, 426 .tx_chain_mask = 0xf, 427 .rx_chain_mask = 0xf, 428 .max_spatial_stream = 4, 429 .cal_data_len = 12064, 430 .fw = { 431 .dir = QCA9984_HW_1_0_FW_DIR, 432 .board = QCA9984_HW_1_0_BOARD_DATA_FILE, 433 .eboard = QCA9984_HW_1_0_EBOARD_DATA_FILE, 434 .board_size = QCA99X0_BOARD_DATA_SZ, 435 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 436 .ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ, 437 }, 438 .sw_decrypt_mcast_mgmt = true, 439 .rx_desc_ops = &qca99x0_rx_desc_ops, 440 .hw_ops = &qca99x0_ops, 441 .decap_align_bytes = 1, 442 .spectral_bin_discard = 12, 443 .spectral_bin_offset = 8, 444 445 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz 446 * or 2x2 160Mhz, long-guard-interval. 447 */ 448 .vht160_mcs_rx_highest = 1560, 449 .vht160_mcs_tx_highest = 1560, 450 .n_cipher_suites = 11, 451 .ast_skid_limit = 0x10, 452 .num_wds_entries = 0x20, 453 .target_64bit = false, 454 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 455 .shadow_reg_support = false, 456 .rri_on_ddr = false, 457 .hw_filter_reset_required = true, 458 .fw_diag_ce_download = false, 459 .credit_size_workaround = false, 460 .tx_stats_over_pktlog = false, 461 .dynamic_sar_support = false, 462 .hw_restart_disconnect = false, 463 }, 464 { 465 .id = QCA9888_HW_2_0_DEV_VERSION, 466 .dev_id = QCA9888_2_0_DEVICE_ID, 467 .bus = ATH10K_BUS_PCI, 468 .name = "qca9888 hw2.0", 469 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR, 470 .uart_pin = 7, 471 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 472 .otp_exe_param = 0x00000700, 473 .continuous_frag_desc = true, 474 .channel_counters_freq_hz = 150000, 475 .max_probe_resp_desc_thres = 24, 476 .tx_chain_mask = 3, 477 .rx_chain_mask = 3, 478 .max_spatial_stream = 2, 479 .cal_data_len = 12064, 480 .fw = { 481 .dir = QCA9888_HW_2_0_FW_DIR, 482 .board = QCA9888_HW_2_0_BOARD_DATA_FILE, 483 .board_size = QCA99X0_BOARD_DATA_SZ, 484 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 485 }, 486 .sw_decrypt_mcast_mgmt = true, 487 .rx_desc_ops = &qca99x0_rx_desc_ops, 488 .hw_ops = &qca99x0_ops, 489 .decap_align_bytes = 1, 490 .spectral_bin_discard = 12, 491 .spectral_bin_offset = 8, 492 493 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or 494 * 1x1 160Mhz, long-guard-interval. 495 */ 496 .vht160_mcs_rx_highest = 780, 497 .vht160_mcs_tx_highest = 780, 498 .n_cipher_suites = 11, 499 .ast_skid_limit = 0x10, 500 .num_wds_entries = 0x20, 501 .target_64bit = false, 502 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 503 .shadow_reg_support = false, 504 .rri_on_ddr = false, 505 .hw_filter_reset_required = true, 506 .fw_diag_ce_download = false, 507 .credit_size_workaround = false, 508 .tx_stats_over_pktlog = false, 509 .dynamic_sar_support = false, 510 .hw_restart_disconnect = false, 511 }, 512 { 513 .id = QCA9377_HW_1_0_DEV_VERSION, 514 .dev_id = QCA9377_1_0_DEVICE_ID, 515 .bus = ATH10K_BUS_PCI, 516 .name = "qca9377 hw1.0", 517 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 518 .uart_pin = 6, 519 .otp_exe_param = 0, 520 .channel_counters_freq_hz = 88000, 521 .max_probe_resp_desc_thres = 0, 522 .cal_data_len = 8124, 523 .fw = { 524 .dir = QCA9377_HW_1_0_FW_DIR, 525 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 526 .board_size = QCA9377_BOARD_DATA_SZ, 527 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 528 }, 529 .rx_desc_ops = &qca988x_rx_desc_ops, 530 .hw_ops = &qca988x_ops, 531 .decap_align_bytes = 4, 532 .spectral_bin_discard = 0, 533 .spectral_bin_offset = 0, 534 .vht160_mcs_rx_highest = 0, 535 .vht160_mcs_tx_highest = 0, 536 .n_cipher_suites = 8, 537 .ast_skid_limit = 0x10, 538 .num_wds_entries = 0x20, 539 .target_64bit = false, 540 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 541 .shadow_reg_support = false, 542 .rri_on_ddr = false, 543 .hw_filter_reset_required = true, 544 .fw_diag_ce_download = false, 545 .credit_size_workaround = false, 546 .tx_stats_over_pktlog = false, 547 .dynamic_sar_support = false, 548 .hw_restart_disconnect = false, 549 }, 550 { 551 .id = QCA9377_HW_1_1_DEV_VERSION, 552 .dev_id = QCA9377_1_0_DEVICE_ID, 553 .bus = ATH10K_BUS_PCI, 554 .name = "qca9377 hw1.1", 555 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 556 .uart_pin = 6, 557 .otp_exe_param = 0, 558 .channel_counters_freq_hz = 88000, 559 .max_probe_resp_desc_thres = 0, 560 .cal_data_len = 8124, 561 .fw = { 562 .dir = QCA9377_HW_1_0_FW_DIR, 563 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 564 .board_size = QCA9377_BOARD_DATA_SZ, 565 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 566 }, 567 .rx_desc_ops = &qca988x_rx_desc_ops, 568 .hw_ops = &qca6174_ops, 569 .hw_clk = qca6174_clk, 570 .target_cpu_freq = 176000000, 571 .decap_align_bytes = 4, 572 .spectral_bin_discard = 0, 573 .spectral_bin_offset = 0, 574 .vht160_mcs_rx_highest = 0, 575 .vht160_mcs_tx_highest = 0, 576 .n_cipher_suites = 8, 577 .ast_skid_limit = 0x10, 578 .num_wds_entries = 0x20, 579 .target_64bit = false, 580 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 581 .shadow_reg_support = false, 582 .rri_on_ddr = false, 583 .hw_filter_reset_required = true, 584 .fw_diag_ce_download = true, 585 .credit_size_workaround = false, 586 .tx_stats_over_pktlog = false, 587 .dynamic_sar_support = false, 588 .hw_restart_disconnect = false, 589 }, 590 { 591 .id = QCA9377_HW_1_1_DEV_VERSION, 592 .dev_id = QCA9377_1_0_DEVICE_ID, 593 .bus = ATH10K_BUS_SDIO, 594 .name = "qca9377 hw1.1 sdio", 595 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 596 .uart_pin = 19, 597 .otp_exe_param = 0, 598 .channel_counters_freq_hz = 88000, 599 .max_probe_resp_desc_thres = 0, 600 .cal_data_len = 8124, 601 .fw = { 602 .dir = QCA9377_HW_1_0_FW_DIR, 603 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 604 .board_size = QCA9377_BOARD_DATA_SZ, 605 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 606 }, 607 .rx_desc_ops = &qca988x_rx_desc_ops, 608 .hw_ops = &qca6174_ops, 609 .hw_clk = qca6174_clk, 610 .target_cpu_freq = 176000000, 611 .decap_align_bytes = 4, 612 .n_cipher_suites = 8, 613 .num_peers = TARGET_QCA9377_HL_NUM_PEERS, 614 .ast_skid_limit = 0x10, 615 .num_wds_entries = 0x20, 616 .uart_pin_workaround = true, 617 .credit_size_workaround = true, 618 .dynamic_sar_support = false, 619 .hw_restart_disconnect = false, 620 }, 621 { 622 .id = QCA4019_HW_1_0_DEV_VERSION, 623 .dev_id = 0, 624 .bus = ATH10K_BUS_AHB, 625 .name = "qca4019 hw1.0", 626 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR, 627 .uart_pin = 7, 628 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 629 .otp_exe_param = 0x0010000, 630 .continuous_frag_desc = true, 631 .cck_rate_map_rev2 = true, 632 .channel_counters_freq_hz = 125000, 633 .max_probe_resp_desc_thres = 24, 634 .tx_chain_mask = 0x3, 635 .rx_chain_mask = 0x3, 636 .max_spatial_stream = 2, 637 .cal_data_len = 12064, 638 .fw = { 639 .dir = QCA4019_HW_1_0_FW_DIR, 640 .board = QCA4019_HW_1_0_BOARD_DATA_FILE, 641 .board_size = QCA4019_BOARD_DATA_SZ, 642 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, 643 }, 644 .sw_decrypt_mcast_mgmt = true, 645 .rx_desc_ops = &qca99x0_rx_desc_ops, 646 .hw_ops = &qca99x0_ops, 647 .decap_align_bytes = 1, 648 .spectral_bin_discard = 4, 649 .spectral_bin_offset = 0, 650 .vht160_mcs_rx_highest = 0, 651 .vht160_mcs_tx_highest = 0, 652 .n_cipher_suites = 11, 653 .ast_skid_limit = 0x10, 654 .num_wds_entries = 0x20, 655 .target_64bit = false, 656 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 657 .shadow_reg_support = false, 658 .rri_on_ddr = false, 659 .hw_filter_reset_required = true, 660 .fw_diag_ce_download = false, 661 .credit_size_workaround = false, 662 .tx_stats_over_pktlog = false, 663 .dynamic_sar_support = false, 664 .hw_restart_disconnect = false, 665 }, 666 { 667 .id = WCN3990_HW_1_0_DEV_VERSION, 668 .dev_id = 0, 669 .bus = ATH10K_BUS_SNOC, 670 .name = "wcn3990 hw1.0", 671 .continuous_frag_desc = true, 672 .tx_chain_mask = 0x7, 673 .rx_chain_mask = 0x7, 674 .max_spatial_stream = 4, 675 .fw = { 676 .dir = WCN3990_HW_1_0_FW_DIR, 677 }, 678 .sw_decrypt_mcast_mgmt = true, 679 .rx_desc_ops = &wcn3990_rx_desc_ops, 680 .hw_ops = &wcn3990_ops, 681 .decap_align_bytes = 1, 682 .num_peers = TARGET_HL_TLV_NUM_PEERS, 683 .n_cipher_suites = 11, 684 .ast_skid_limit = TARGET_HL_TLV_AST_SKID_LIMIT, 685 .num_wds_entries = TARGET_HL_TLV_NUM_WDS_ENTRIES, 686 .target_64bit = true, 687 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC, 688 .shadow_reg_support = true, 689 .rri_on_ddr = true, 690 .hw_filter_reset_required = false, 691 .fw_diag_ce_download = false, 692 .credit_size_workaround = false, 693 .tx_stats_over_pktlog = false, 694 .dynamic_sar_support = true, 695 .hw_restart_disconnect = true, 696 }, 697 }; 698 699 static const char *const ath10k_core_fw_feature_str[] = { 700 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 701 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 702 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 703 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 704 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 705 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 706 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 707 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 708 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 709 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 710 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 711 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 712 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", 713 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl", 714 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param", 715 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war", 716 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast", 717 [ATH10K_FW_FEATURE_NO_PS] = "no-ps", 718 [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference", 719 [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi", 720 [ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL] = "single-chan-info-per-channel", 721 [ATH10K_FW_FEATURE_PEER_FIXED_RATE] = "peer-fixed-rate", 722 [ATH10K_FW_FEATURE_IRAM_RECOVERY] = "iram-recovery", 723 }; 724 725 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 726 size_t buf_len, 727 enum ath10k_fw_features feat) 728 { 729 /* make sure that ath10k_core_fw_feature_str[] gets updated */ 730 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != 731 ATH10K_FW_FEATURE_COUNT); 732 733 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 734 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 735 return scnprintf(buf, buf_len, "bit%d", feat); 736 } 737 738 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 739 } 740 741 void ath10k_core_get_fw_features_str(struct ath10k *ar, 742 char *buf, 743 size_t buf_len) 744 { 745 size_t len = 0; 746 int i; 747 748 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 749 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) { 750 if (len > 0) 751 len += scnprintf(buf + len, buf_len - len, ","); 752 753 len += ath10k_core_get_fw_feature_str(buf + len, 754 buf_len - len, 755 i); 756 } 757 } 758 } 759 760 static void ath10k_send_suspend_complete(struct ath10k *ar) 761 { 762 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 763 764 complete(&ar->target_suspend); 765 } 766 767 static int ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode) 768 { 769 bool mtu_workaround = ar->hw_params.credit_size_workaround; 770 int ret; 771 u32 param = 0; 772 773 ret = ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256); 774 if (ret) 775 return ret; 776 777 ret = ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99); 778 if (ret) 779 return ret; 780 781 ret = ath10k_bmi_read32(ar, hi_acs_flags, ¶m); 782 if (ret) 783 return ret; 784 785 param |= HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET; 786 787 if (mode == ATH10K_FIRMWARE_MODE_NORMAL && !mtu_workaround) 788 param |= HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE; 789 else 790 param &= ~HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE; 791 792 if (mode == ATH10K_FIRMWARE_MODE_UTF) 793 param &= ~HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET; 794 else 795 param |= HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET; 796 797 ret = ath10k_bmi_write32(ar, hi_acs_flags, param); 798 if (ret) 799 return ret; 800 801 ret = ath10k_bmi_read32(ar, hi_option_flag2, ¶m); 802 if (ret) 803 return ret; 804 805 param |= HI_OPTION_SDIO_CRASH_DUMP_ENHANCEMENT_HOST; 806 807 ret = ath10k_bmi_write32(ar, hi_option_flag2, param); 808 if (ret) 809 return ret; 810 811 return 0; 812 } 813 814 static int ath10k_init_configure_target(struct ath10k *ar) 815 { 816 u32 param_host; 817 int ret; 818 819 /* tell target which HTC version it is used*/ 820 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 821 HTC_PROTOCOL_VERSION); 822 if (ret) { 823 ath10k_err(ar, "settings HTC version failed\n"); 824 return ret; 825 } 826 827 /* set the firmware mode to STA/IBSS/AP */ 828 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 829 if (ret) { 830 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 831 return ret; 832 } 833 834 /* TODO following parameters need to be re-visited. */ 835 /* num_device */ 836 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 837 /* Firmware mode */ 838 /* FIXME: Why FW_MODE_AP ??.*/ 839 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 840 /* mac_addr_method */ 841 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 842 /* firmware_bridge */ 843 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 844 /* fwsubmode */ 845 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 846 847 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 848 if (ret) { 849 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 850 return ret; 851 } 852 853 /* We do all byte-swapping on the host */ 854 ret = ath10k_bmi_write32(ar, hi_be, 0); 855 if (ret) { 856 ath10k_err(ar, "setting host CPU BE mode failed\n"); 857 return ret; 858 } 859 860 /* FW descriptor/Data swap flags */ 861 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 862 863 if (ret) { 864 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 865 return ret; 866 } 867 868 /* Some devices have a special sanity check that verifies the PCI 869 * Device ID is written to this host interest var. It is known to be 870 * required to boot QCA6164. 871 */ 872 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 873 ar->dev_id); 874 if (ret) { 875 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 876 return ret; 877 } 878 879 return 0; 880 } 881 882 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 883 const char *dir, 884 const char *file) 885 { 886 char filename[100]; 887 const struct firmware *fw; 888 int ret; 889 890 if (file == NULL) 891 return ERR_PTR(-ENOENT); 892 893 if (dir == NULL) 894 dir = "."; 895 896 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 897 ret = firmware_request_nowarn(&fw, filename, ar->dev); 898 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n", 899 filename, ret); 900 901 if (ret) 902 return ERR_PTR(ret); 903 904 return fw; 905 } 906 907 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 908 size_t data_len) 909 { 910 u32 board_data_size = ar->hw_params.fw.board_size; 911 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 912 u32 board_ext_data_addr; 913 int ret; 914 915 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 916 if (ret) { 917 ath10k_err(ar, "could not read board ext data addr (%d)\n", 918 ret); 919 return ret; 920 } 921 922 ath10k_dbg(ar, ATH10K_DBG_BOOT, 923 "boot push board extended data addr 0x%x\n", 924 board_ext_data_addr); 925 926 if (board_ext_data_addr == 0) 927 return 0; 928 929 if (data_len != (board_data_size + board_ext_data_size)) { 930 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 931 data_len, board_data_size, board_ext_data_size); 932 return -EINVAL; 933 } 934 935 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 936 data + board_data_size, 937 board_ext_data_size); 938 if (ret) { 939 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 940 return ret; 941 } 942 943 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 944 (board_ext_data_size << 16) | 1); 945 if (ret) { 946 ath10k_err(ar, "could not write board ext data bit (%d)\n", 947 ret); 948 return ret; 949 } 950 951 return 0; 952 } 953 954 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) 955 { 956 u32 result, address; 957 u8 board_id, chip_id; 958 bool ext_bid_support; 959 int ret, bmi_board_id_param; 960 961 address = ar->hw_params.patch_load_addr; 962 963 if (!ar->normal_mode_fw.fw_file.otp_data || 964 !ar->normal_mode_fw.fw_file.otp_len) { 965 ath10k_warn(ar, 966 "failed to retrieve board id because of invalid otp\n"); 967 return -ENODATA; 968 } 969 970 if (ar->id.bmi_ids_valid) { 971 ath10k_dbg(ar, ATH10K_DBG_BOOT, 972 "boot already acquired valid otp board id,skip download, board_id %d chip_id %d\n", 973 ar->id.bmi_board_id, ar->id.bmi_chip_id); 974 goto skip_otp_download; 975 } 976 977 ath10k_dbg(ar, ATH10K_DBG_BOOT, 978 "boot upload otp to 0x%x len %zd for board id\n", 979 address, ar->normal_mode_fw.fw_file.otp_len); 980 981 ret = ath10k_bmi_fast_download(ar, address, 982 ar->normal_mode_fw.fw_file.otp_data, 983 ar->normal_mode_fw.fw_file.otp_len); 984 if (ret) { 985 ath10k_err(ar, "could not write otp for board id check: %d\n", 986 ret); 987 return ret; 988 } 989 990 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 991 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE || 992 ar->cal_mode == ATH10K_PRE_CAL_MODE_NVMEM) 993 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID; 994 else 995 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID; 996 997 ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result); 998 if (ret) { 999 ath10k_err(ar, "could not execute otp for board id check: %d\n", 1000 ret); 1001 return ret; 1002 } 1003 1004 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); 1005 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); 1006 ext_bid_support = (result & ATH10K_BMI_EXT_BOARD_ID_SUPPORT); 1007 1008 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1009 "boot get otp board id result 0x%08x board_id %d chip_id %d ext_bid_support %d\n", 1010 result, board_id, chip_id, ext_bid_support); 1011 1012 ar->id.ext_bid_supported = ext_bid_support; 1013 1014 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 || 1015 (board_id == 0)) { 1016 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1017 "board id does not exist in otp, ignore it\n"); 1018 return -EOPNOTSUPP; 1019 } 1020 1021 ar->id.bmi_ids_valid = true; 1022 ar->id.bmi_board_id = board_id; 1023 ar->id.bmi_chip_id = chip_id; 1024 1025 skip_otp_download: 1026 1027 return 0; 1028 } 1029 1030 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data) 1031 { 1032 struct ath10k *ar = data; 1033 const char *bdf_ext; 1034 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC; 1035 u8 bdf_enabled; 1036 int i; 1037 1038 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE) 1039 return; 1040 1041 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) { 1042 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1043 "wrong smbios bdf ext type length (%d).\n", 1044 hdr->length); 1045 return; 1046 } 1047 1048 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET); 1049 if (!bdf_enabled) { 1050 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n"); 1051 return; 1052 } 1053 1054 /* Only one string exists (per spec) */ 1055 bdf_ext = (char *)hdr + hdr->length; 1056 1057 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) { 1058 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1059 "bdf variant magic does not match.\n"); 1060 return; 1061 } 1062 1063 for (i = 0; i < strlen(bdf_ext); i++) { 1064 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) { 1065 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1066 "bdf variant name contains non ascii chars.\n"); 1067 return; 1068 } 1069 } 1070 1071 /* Copy extension name without magic suffix */ 1072 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic), 1073 sizeof(ar->id.bdf_ext)) < 0) { 1074 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1075 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 1076 bdf_ext); 1077 return; 1078 } 1079 1080 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1081 "found and validated bdf variant smbios_type 0x%x bdf %s\n", 1082 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext); 1083 } 1084 1085 static int ath10k_core_check_smbios(struct ath10k *ar) 1086 { 1087 ar->id.bdf_ext[0] = '\0'; 1088 dmi_walk(ath10k_core_check_bdfext, ar); 1089 1090 if (ar->id.bdf_ext[0] == '\0') 1091 return -ENODATA; 1092 1093 return 0; 1094 } 1095 1096 int ath10k_core_check_dt(struct ath10k *ar) 1097 { 1098 struct device_node *node; 1099 const char *variant = NULL; 1100 1101 node = ar->dev->of_node; 1102 if (!node) 1103 return -ENOENT; 1104 1105 of_property_read_string(node, "qcom,ath10k-calibration-variant", 1106 &variant); 1107 if (!variant) 1108 return -ENODATA; 1109 1110 if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0) 1111 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1112 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 1113 variant); 1114 1115 return 0; 1116 } 1117 EXPORT_SYMBOL(ath10k_core_check_dt); 1118 1119 static int ath10k_download_fw(struct ath10k *ar) 1120 { 1121 u32 address, data_len; 1122 const void *data; 1123 int ret; 1124 struct pm_qos_request latency_qos; 1125 1126 address = ar->hw_params.patch_load_addr; 1127 1128 data = ar->running_fw->fw_file.firmware_data; 1129 data_len = ar->running_fw->fw_file.firmware_len; 1130 1131 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file); 1132 if (ret) { 1133 ath10k_err(ar, "failed to configure fw code swap: %d\n", 1134 ret); 1135 return ret; 1136 } 1137 1138 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1139 "boot uploading firmware image %pK len %d\n", 1140 data, data_len); 1141 1142 /* Check if device supports to download firmware via 1143 * diag copy engine. Downloading firmware via diag CE 1144 * greatly reduces the time to download firmware. 1145 */ 1146 if (ar->hw_params.fw_diag_ce_download) { 1147 ret = ath10k_hw_diag_fast_download(ar, address, 1148 data, data_len); 1149 if (ret == 0) 1150 /* firmware upload via diag ce was successful */ 1151 return 0; 1152 1153 ath10k_warn(ar, 1154 "failed to upload firmware via diag ce, trying BMI: %d", 1155 ret); 1156 } 1157 1158 memset(&latency_qos, 0, sizeof(latency_qos)); 1159 cpu_latency_qos_add_request(&latency_qos, 0); 1160 1161 ret = ath10k_bmi_fast_download(ar, address, data, data_len); 1162 1163 cpu_latency_qos_remove_request(&latency_qos); 1164 1165 return ret; 1166 } 1167 1168 void ath10k_core_free_board_files(struct ath10k *ar) 1169 { 1170 if (!IS_ERR(ar->normal_mode_fw.board)) 1171 release_firmware(ar->normal_mode_fw.board); 1172 1173 if (!IS_ERR(ar->normal_mode_fw.ext_board)) 1174 release_firmware(ar->normal_mode_fw.ext_board); 1175 1176 ar->normal_mode_fw.board = NULL; 1177 ar->normal_mode_fw.board_data = NULL; 1178 ar->normal_mode_fw.board_len = 0; 1179 ar->normal_mode_fw.ext_board = NULL; 1180 ar->normal_mode_fw.ext_board_data = NULL; 1181 ar->normal_mode_fw.ext_board_len = 0; 1182 } 1183 EXPORT_SYMBOL(ath10k_core_free_board_files); 1184 1185 static void ath10k_core_free_firmware_files(struct ath10k *ar) 1186 { 1187 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware)) 1188 release_firmware(ar->normal_mode_fw.fw_file.firmware); 1189 1190 if (!IS_ERR(ar->cal_file)) 1191 release_firmware(ar->cal_file); 1192 1193 if (!IS_ERR(ar->pre_cal_file)) 1194 release_firmware(ar->pre_cal_file); 1195 1196 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file); 1197 1198 ar->normal_mode_fw.fw_file.otp_data = NULL; 1199 ar->normal_mode_fw.fw_file.otp_len = 0; 1200 1201 ar->normal_mode_fw.fw_file.firmware = NULL; 1202 ar->normal_mode_fw.fw_file.firmware_data = NULL; 1203 ar->normal_mode_fw.fw_file.firmware_len = 0; 1204 1205 ar->cal_file = NULL; 1206 ar->pre_cal_file = NULL; 1207 } 1208 1209 static int ath10k_fetch_cal_file(struct ath10k *ar) 1210 { 1211 char filename[100]; 1212 1213 /* pre-cal-<bus>-<id>.bin */ 1214 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin", 1215 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1216 1217 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1218 if (!IS_ERR(ar->pre_cal_file)) 1219 goto success; 1220 1221 /* cal-<bus>-<id>.bin */ 1222 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 1223 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1224 1225 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1226 if (IS_ERR(ar->cal_file)) 1227 /* calibration file is optional, don't print any warnings */ 1228 return PTR_ERR(ar->cal_file); 1229 success: 1230 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 1231 ATH10K_FW_DIR, filename); 1232 1233 return 0; 1234 } 1235 1236 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar, int bd_ie_type) 1237 { 1238 const struct firmware *fw; 1239 char boardname[100]; 1240 1241 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1242 if (!ar->hw_params.fw.board) { 1243 ath10k_err(ar, "failed to find board file fw entry\n"); 1244 return -EINVAL; 1245 } 1246 1247 scnprintf(boardname, sizeof(boardname), "board-%s-%s.bin", 1248 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1249 1250 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1251 ar->hw_params.fw.dir, 1252 boardname); 1253 if (IS_ERR(ar->normal_mode_fw.board)) { 1254 fw = ath10k_fetch_fw_file(ar, 1255 ar->hw_params.fw.dir, 1256 ar->hw_params.fw.board); 1257 ar->normal_mode_fw.board = fw; 1258 } 1259 1260 if (IS_ERR(ar->normal_mode_fw.board)) 1261 return PTR_ERR(ar->normal_mode_fw.board); 1262 1263 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data; 1264 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size; 1265 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1266 if (!ar->hw_params.fw.eboard) { 1267 ath10k_err(ar, "failed to find eboard file fw entry\n"); 1268 return -EINVAL; 1269 } 1270 1271 fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1272 ar->hw_params.fw.eboard); 1273 ar->normal_mode_fw.ext_board = fw; 1274 if (IS_ERR(ar->normal_mode_fw.ext_board)) 1275 return PTR_ERR(ar->normal_mode_fw.ext_board); 1276 1277 ar->normal_mode_fw.ext_board_data = ar->normal_mode_fw.ext_board->data; 1278 ar->normal_mode_fw.ext_board_len = ar->normal_mode_fw.ext_board->size; 1279 } 1280 1281 return 0; 1282 } 1283 1284 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, 1285 const void *buf, size_t buf_len, 1286 const char *boardname, 1287 int bd_ie_type) 1288 { 1289 const struct ath10k_fw_ie *hdr; 1290 bool name_match_found; 1291 int ret, board_ie_id; 1292 size_t board_ie_len; 1293 const void *board_ie_data; 1294 1295 name_match_found = false; 1296 1297 /* go through ATH10K_BD_IE_BOARD_ elements */ 1298 while (buf_len > sizeof(struct ath10k_fw_ie)) { 1299 hdr = buf; 1300 board_ie_id = le32_to_cpu(hdr->id); 1301 board_ie_len = le32_to_cpu(hdr->len); 1302 board_ie_data = hdr->data; 1303 1304 buf_len -= sizeof(*hdr); 1305 buf += sizeof(*hdr); 1306 1307 if (buf_len < ALIGN(board_ie_len, 4)) { 1308 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", 1309 buf_len, ALIGN(board_ie_len, 4)); 1310 ret = -EINVAL; 1311 goto out; 1312 } 1313 1314 switch (board_ie_id) { 1315 case ATH10K_BD_IE_BOARD_NAME: 1316 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", 1317 board_ie_data, board_ie_len); 1318 1319 if (board_ie_len != strlen(boardname)) 1320 break; 1321 1322 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 1323 if (ret) 1324 break; 1325 1326 name_match_found = true; 1327 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1328 "boot found match for name '%s'", 1329 boardname); 1330 break; 1331 case ATH10K_BD_IE_BOARD_DATA: 1332 if (!name_match_found) 1333 /* no match found */ 1334 break; 1335 1336 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1337 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1338 "boot found board data for '%s'", 1339 boardname); 1340 1341 ar->normal_mode_fw.board_data = board_ie_data; 1342 ar->normal_mode_fw.board_len = board_ie_len; 1343 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1344 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1345 "boot found eboard data for '%s'", 1346 boardname); 1347 1348 ar->normal_mode_fw.ext_board_data = board_ie_data; 1349 ar->normal_mode_fw.ext_board_len = board_ie_len; 1350 } 1351 1352 ret = 0; 1353 goto out; 1354 default: 1355 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", 1356 board_ie_id); 1357 break; 1358 } 1359 1360 /* jump over the padding */ 1361 board_ie_len = ALIGN(board_ie_len, 4); 1362 1363 buf_len -= board_ie_len; 1364 buf += board_ie_len; 1365 } 1366 1367 /* no match found */ 1368 ret = -ENOENT; 1369 1370 out: 1371 return ret; 1372 } 1373 1374 static int ath10k_core_search_bd(struct ath10k *ar, 1375 const char *boardname, 1376 const u8 *data, 1377 size_t len) 1378 { 1379 size_t ie_len; 1380 struct ath10k_fw_ie *hdr; 1381 int ret = -ENOENT, ie_id; 1382 1383 while (len > sizeof(struct ath10k_fw_ie)) { 1384 hdr = (struct ath10k_fw_ie *)data; 1385 ie_id = le32_to_cpu(hdr->id); 1386 ie_len = le32_to_cpu(hdr->len); 1387 1388 len -= sizeof(*hdr); 1389 data = hdr->data; 1390 1391 if (len < ALIGN(ie_len, 4)) { 1392 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", 1393 ie_id, ie_len, len); 1394 return -EINVAL; 1395 } 1396 1397 switch (ie_id) { 1398 case ATH10K_BD_IE_BOARD: 1399 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1400 boardname, 1401 ATH10K_BD_IE_BOARD); 1402 if (ret == -ENOENT) 1403 /* no match found, continue */ 1404 break; 1405 1406 /* either found or error, so stop searching */ 1407 goto out; 1408 case ATH10K_BD_IE_BOARD_EXT: 1409 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1410 boardname, 1411 ATH10K_BD_IE_BOARD_EXT); 1412 if (ret == -ENOENT) 1413 /* no match found, continue */ 1414 break; 1415 1416 /* either found or error, so stop searching */ 1417 goto out; 1418 } 1419 1420 /* jump over the padding */ 1421 ie_len = ALIGN(ie_len, 4); 1422 1423 len -= ie_len; 1424 data += ie_len; 1425 } 1426 1427 out: 1428 /* return result of parse_bd_ie_board() or -ENOENT */ 1429 return ret; 1430 } 1431 1432 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, 1433 const char *boardname, 1434 const char *fallback_boardname1, 1435 const char *fallback_boardname2, 1436 const char *filename) 1437 { 1438 size_t len, magic_len; 1439 const u8 *data; 1440 int ret; 1441 1442 /* Skip if already fetched during board data download */ 1443 if (!ar->normal_mode_fw.board) 1444 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1445 ar->hw_params.fw.dir, 1446 filename); 1447 if (IS_ERR(ar->normal_mode_fw.board)) 1448 return PTR_ERR(ar->normal_mode_fw.board); 1449 1450 data = ar->normal_mode_fw.board->data; 1451 len = ar->normal_mode_fw.board->size; 1452 1453 /* magic has extra null byte padded */ 1454 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; 1455 if (len < magic_len) { 1456 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", 1457 ar->hw_params.fw.dir, filename, len); 1458 ret = -EINVAL; 1459 goto err; 1460 } 1461 1462 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { 1463 ath10k_err(ar, "found invalid board magic\n"); 1464 ret = -EINVAL; 1465 goto err; 1466 } 1467 1468 /* magic is padded to 4 bytes */ 1469 magic_len = ALIGN(magic_len, 4); 1470 if (len < magic_len) { 1471 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", 1472 ar->hw_params.fw.dir, filename, len); 1473 ret = -EINVAL; 1474 goto err; 1475 } 1476 1477 data += magic_len; 1478 len -= magic_len; 1479 1480 /* attempt to find boardname in the IE list */ 1481 ret = ath10k_core_search_bd(ar, boardname, data, len); 1482 1483 /* if we didn't find it and have a fallback name, try that */ 1484 if (ret == -ENOENT && fallback_boardname1) 1485 ret = ath10k_core_search_bd(ar, fallback_boardname1, data, len); 1486 1487 if (ret == -ENOENT && fallback_boardname2) 1488 ret = ath10k_core_search_bd(ar, fallback_boardname2, data, len); 1489 1490 if (ret == -ENOENT) { 1491 ath10k_err(ar, 1492 "failed to fetch board data for %s from %s/%s\n", 1493 boardname, ar->hw_params.fw.dir, filename); 1494 ret = -ENODATA; 1495 } 1496 1497 if (ret) 1498 goto err; 1499 1500 return 0; 1501 1502 err: 1503 ath10k_core_free_board_files(ar); 1504 return ret; 1505 } 1506 1507 static int ath10k_core_create_board_name(struct ath10k *ar, char *name, 1508 size_t name_len, bool with_variant, 1509 bool with_chip_id) 1510 { 1511 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */ 1512 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 }; 1513 1514 if (with_variant && ar->id.bdf_ext[0] != '\0') 1515 scnprintf(variant, sizeof(variant), ",variant=%s", 1516 ar->id.bdf_ext); 1517 1518 if (ar->id.bmi_ids_valid) { 1519 scnprintf(name, name_len, 1520 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s", 1521 ath10k_bus_str(ar->hif.bus), 1522 ar->id.bmi_chip_id, 1523 ar->id.bmi_board_id, variant); 1524 goto out; 1525 } 1526 1527 if (ar->id.qmi_ids_valid) { 1528 if (with_chip_id) 1529 scnprintf(name, name_len, 1530 "bus=%s,qmi-board-id=%x,qmi-chip-id=%x%s", 1531 ath10k_bus_str(ar->hif.bus), 1532 ar->id.qmi_board_id, ar->id.qmi_chip_id, 1533 variant); 1534 else 1535 scnprintf(name, name_len, 1536 "bus=%s,qmi-board-id=%x", 1537 ath10k_bus_str(ar->hif.bus), 1538 ar->id.qmi_board_id); 1539 goto out; 1540 } 1541 1542 scnprintf(name, name_len, 1543 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s", 1544 ath10k_bus_str(ar->hif.bus), 1545 ar->id.vendor, ar->id.device, 1546 ar->id.subsystem_vendor, ar->id.subsystem_device, variant); 1547 out: 1548 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); 1549 1550 return 0; 1551 } 1552 1553 static int ath10k_core_create_eboard_name(struct ath10k *ar, char *name, 1554 size_t name_len) 1555 { 1556 if (ar->id.bmi_ids_valid) { 1557 scnprintf(name, name_len, 1558 "bus=%s,bmi-chip-id=%d,bmi-eboard-id=%d", 1559 ath10k_bus_str(ar->hif.bus), 1560 ar->id.bmi_chip_id, 1561 ar->id.bmi_eboard_id); 1562 1563 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using eboard name '%s'\n", name); 1564 return 0; 1565 } 1566 /* Fallback if returned board id is zero */ 1567 return -1; 1568 } 1569 1570 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type) 1571 { 1572 char boardname[100], fallback_boardname1[100], fallback_boardname2[100]; 1573 int ret; 1574 1575 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1576 /* With variant and chip id */ 1577 ret = ath10k_core_create_board_name(ar, boardname, 1578 sizeof(boardname), true, 1579 true); 1580 if (ret) { 1581 ath10k_err(ar, "failed to create board name: %d", ret); 1582 return ret; 1583 } 1584 1585 /* Without variant and only chip-id */ 1586 ret = ath10k_core_create_board_name(ar, fallback_boardname1, 1587 sizeof(boardname), false, 1588 true); 1589 if (ret) { 1590 ath10k_err(ar, "failed to create 1st fallback board name: %d", 1591 ret); 1592 return ret; 1593 } 1594 1595 /* Without variant and without chip-id */ 1596 ret = ath10k_core_create_board_name(ar, fallback_boardname2, 1597 sizeof(boardname), false, 1598 false); 1599 if (ret) { 1600 ath10k_err(ar, "failed to create 2nd fallback board name: %d", 1601 ret); 1602 return ret; 1603 } 1604 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1605 ret = ath10k_core_create_eboard_name(ar, boardname, 1606 sizeof(boardname)); 1607 if (ret) { 1608 ath10k_err(ar, "fallback to eboard.bin since board id 0"); 1609 goto fallback; 1610 } 1611 } 1612 1613 ar->bd_api = 2; 1614 ret = ath10k_core_fetch_board_data_api_n(ar, boardname, 1615 fallback_boardname1, 1616 fallback_boardname2, 1617 ATH10K_BOARD_API2_FILE); 1618 if (!ret) 1619 goto success; 1620 1621 fallback: 1622 ar->bd_api = 1; 1623 ret = ath10k_core_fetch_board_data_api_1(ar, bd_ie_type); 1624 if (ret) { 1625 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n", 1626 ar->hw_params.fw.dir); 1627 return ret; 1628 } 1629 1630 success: 1631 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); 1632 return 0; 1633 } 1634 EXPORT_SYMBOL(ath10k_core_fetch_board_file); 1635 1636 static int ath10k_core_get_ext_board_id_from_otp(struct ath10k *ar) 1637 { 1638 u32 result, address; 1639 u8 ext_board_id; 1640 int ret; 1641 1642 address = ar->hw_params.patch_load_addr; 1643 1644 if (!ar->normal_mode_fw.fw_file.otp_data || 1645 !ar->normal_mode_fw.fw_file.otp_len) { 1646 ath10k_warn(ar, 1647 "failed to retrieve extended board id due to otp binary missing\n"); 1648 return -ENODATA; 1649 } 1650 1651 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1652 "boot upload otp to 0x%x len %zd for ext board id\n", 1653 address, ar->normal_mode_fw.fw_file.otp_len); 1654 1655 ret = ath10k_bmi_fast_download(ar, address, 1656 ar->normal_mode_fw.fw_file.otp_data, 1657 ar->normal_mode_fw.fw_file.otp_len); 1658 if (ret) { 1659 ath10k_err(ar, "could not write otp for ext board id check: %d\n", 1660 ret); 1661 return ret; 1662 } 1663 1664 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EXT_BOARD_ID, &result); 1665 if (ret) { 1666 ath10k_err(ar, "could not execute otp for ext board id check: %d\n", 1667 ret); 1668 return ret; 1669 } 1670 1671 if (!result) { 1672 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1673 "ext board id does not exist in otp, ignore it\n"); 1674 return -EOPNOTSUPP; 1675 } 1676 1677 ext_board_id = result & ATH10K_BMI_EBOARD_ID_STATUS_MASK; 1678 1679 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1680 "boot get otp ext board id result 0x%08x ext_board_id %d\n", 1681 result, ext_board_id); 1682 1683 ar->id.bmi_eboard_id = ext_board_id; 1684 1685 return 0; 1686 } 1687 1688 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 1689 size_t data_len) 1690 { 1691 u32 board_data_size = ar->hw_params.fw.board_size; 1692 u32 eboard_data_size = ar->hw_params.fw.ext_board_size; 1693 u32 board_address; 1694 u32 ext_board_address; 1695 int ret; 1696 1697 ret = ath10k_push_board_ext_data(ar, data, data_len); 1698 if (ret) { 1699 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 1700 goto exit; 1701 } 1702 1703 ret = ath10k_bmi_read32(ar, hi_board_data, &board_address); 1704 if (ret) { 1705 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 1706 goto exit; 1707 } 1708 1709 ret = ath10k_bmi_write_memory(ar, board_address, data, 1710 min_t(u32, board_data_size, 1711 data_len)); 1712 if (ret) { 1713 ath10k_err(ar, "could not write board data (%d)\n", ret); 1714 goto exit; 1715 } 1716 1717 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 1718 if (ret) { 1719 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 1720 goto exit; 1721 } 1722 1723 if (!ar->id.ext_bid_supported) 1724 goto exit; 1725 1726 /* Extended board data download */ 1727 ret = ath10k_core_get_ext_board_id_from_otp(ar); 1728 if (ret == -EOPNOTSUPP) { 1729 /* Not fetching ext_board_data if ext board id is 0 */ 1730 ath10k_dbg(ar, ATH10K_DBG_BOOT, "otp returned ext board id 0\n"); 1731 return 0; 1732 } else if (ret) { 1733 ath10k_err(ar, "failed to get extended board id: %d\n", ret); 1734 goto exit; 1735 } 1736 1737 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD_EXT); 1738 if (ret) 1739 goto exit; 1740 1741 if (ar->normal_mode_fw.ext_board_data) { 1742 ext_board_address = board_address + EXT_BOARD_ADDRESS_OFFSET; 1743 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1744 "boot writing ext board data to addr 0x%x", 1745 ext_board_address); 1746 ret = ath10k_bmi_write_memory(ar, ext_board_address, 1747 ar->normal_mode_fw.ext_board_data, 1748 min_t(u32, eboard_data_size, data_len)); 1749 if (ret) 1750 ath10k_err(ar, "failed to write ext board data: %d\n", ret); 1751 } 1752 1753 exit: 1754 return ret; 1755 } 1756 1757 static int ath10k_download_and_run_otp(struct ath10k *ar) 1758 { 1759 u32 result, address = ar->hw_params.patch_load_addr; 1760 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 1761 int ret; 1762 1763 ret = ath10k_download_board_data(ar, 1764 ar->running_fw->board_data, 1765 ar->running_fw->board_len); 1766 if (ret) { 1767 ath10k_err(ar, "failed to download board data: %d\n", ret); 1768 return ret; 1769 } 1770 1771 /* OTP is optional */ 1772 1773 if (!ar->running_fw->fw_file.otp_data || 1774 !ar->running_fw->fw_file.otp_len) { 1775 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n", 1776 ar->running_fw->fw_file.otp_data, 1777 ar->running_fw->fw_file.otp_len); 1778 return 0; 1779 } 1780 1781 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 1782 address, ar->running_fw->fw_file.otp_len); 1783 1784 ret = ath10k_bmi_fast_download(ar, address, 1785 ar->running_fw->fw_file.otp_data, 1786 ar->running_fw->fw_file.otp_len); 1787 if (ret) { 1788 ath10k_err(ar, "could not write otp (%d)\n", ret); 1789 return ret; 1790 } 1791 1792 /* As of now pre-cal is valid for 10_4 variants */ 1793 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 1794 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE || 1795 ar->cal_mode == ATH10K_PRE_CAL_MODE_NVMEM) 1796 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL; 1797 1798 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 1799 if (ret) { 1800 ath10k_err(ar, "could not execute otp (%d)\n", ret); 1801 return ret; 1802 } 1803 1804 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 1805 1806 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 1807 ar->running_fw->fw_file.fw_features)) && 1808 result != 0) { 1809 ath10k_err(ar, "otp calibration failed: %d", result); 1810 return -EINVAL; 1811 } 1812 1813 return 0; 1814 } 1815 1816 static int ath10k_download_cal_file(struct ath10k *ar, 1817 const struct firmware *file) 1818 { 1819 int ret; 1820 1821 if (!file) 1822 return -ENOENT; 1823 1824 if (IS_ERR(file)) 1825 return PTR_ERR(file); 1826 1827 ret = ath10k_download_board_data(ar, file->data, file->size); 1828 if (ret) { 1829 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 1830 return ret; 1831 } 1832 1833 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 1834 1835 return 0; 1836 } 1837 1838 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name) 1839 { 1840 struct device_node *node; 1841 int data_len; 1842 void *data; 1843 int ret; 1844 1845 node = ar->dev->of_node; 1846 if (!node) 1847 /* Device Tree is optional, don't print any warnings if 1848 * there's no node for ath10k. 1849 */ 1850 return -ENOENT; 1851 1852 if (!of_get_property(node, dt_name, &data_len)) { 1853 /* The calibration data node is optional */ 1854 return -ENOENT; 1855 } 1856 1857 if (data_len != ar->hw_params.cal_data_len) { 1858 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 1859 data_len); 1860 ret = -EMSGSIZE; 1861 goto out; 1862 } 1863 1864 data = kmalloc(data_len, GFP_KERNEL); 1865 if (!data) { 1866 ret = -ENOMEM; 1867 goto out; 1868 } 1869 1870 ret = of_property_read_u8_array(node, dt_name, data, data_len); 1871 if (ret) { 1872 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 1873 ret); 1874 goto out_free; 1875 } 1876 1877 ret = ath10k_download_board_data(ar, data, data_len); 1878 if (ret) { 1879 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 1880 ret); 1881 goto out_free; 1882 } 1883 1884 ret = 0; 1885 1886 out_free: 1887 kfree(data); 1888 1889 out: 1890 return ret; 1891 } 1892 1893 static int ath10k_download_cal_eeprom(struct ath10k *ar) 1894 { 1895 size_t data_len; 1896 void *data = NULL; 1897 int ret; 1898 1899 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len); 1900 if (ret) { 1901 if (ret != -EOPNOTSUPP) 1902 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n", 1903 ret); 1904 goto out_free; 1905 } 1906 1907 ret = ath10k_download_board_data(ar, data, data_len); 1908 if (ret) { 1909 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n", 1910 ret); 1911 goto out_free; 1912 } 1913 1914 ret = 0; 1915 1916 out_free: 1917 kfree(data); 1918 1919 return ret; 1920 } 1921 1922 static int ath10k_download_cal_nvmem(struct ath10k *ar, const char *cell_name) 1923 { 1924 struct nvmem_cell *cell; 1925 void *buf; 1926 size_t len; 1927 int ret; 1928 1929 cell = devm_nvmem_cell_get(ar->dev, cell_name); 1930 if (IS_ERR(cell)) { 1931 ret = PTR_ERR(cell); 1932 return ret; 1933 } 1934 1935 buf = nvmem_cell_read(cell, &len); 1936 if (IS_ERR(buf)) 1937 return PTR_ERR(buf); 1938 1939 if (ar->hw_params.cal_data_len != len) { 1940 kfree(buf); 1941 ath10k_warn(ar, "invalid calibration data length in nvmem-cell '%s': %zu != %u\n", 1942 cell_name, len, ar->hw_params.cal_data_len); 1943 return -EMSGSIZE; 1944 } 1945 1946 ret = ath10k_download_board_data(ar, buf, len); 1947 kfree(buf); 1948 if (ret) 1949 ath10k_warn(ar, "failed to download calibration data from nvmem-cell '%s': %d\n", 1950 cell_name, ret); 1951 1952 return ret; 1953 } 1954 1955 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1956 struct ath10k_fw_file *fw_file) 1957 { 1958 size_t magic_len, len, ie_len; 1959 int ie_id, i, index, bit, ret; 1960 struct ath10k_fw_ie *hdr; 1961 const u8 *data; 1962 __le32 *timestamp, *version; 1963 1964 /* first fetch the firmware file (firmware-*.bin) */ 1965 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1966 name); 1967 if (IS_ERR(fw_file->firmware)) 1968 return PTR_ERR(fw_file->firmware); 1969 1970 data = fw_file->firmware->data; 1971 len = fw_file->firmware->size; 1972 1973 /* magic also includes the null byte, check that as well */ 1974 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 1975 1976 if (len < magic_len) { 1977 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 1978 ar->hw_params.fw.dir, name, len); 1979 ret = -EINVAL; 1980 goto err; 1981 } 1982 1983 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 1984 ath10k_err(ar, "invalid firmware magic\n"); 1985 ret = -EINVAL; 1986 goto err; 1987 } 1988 1989 /* jump over the padding */ 1990 magic_len = ALIGN(magic_len, 4); 1991 1992 len -= magic_len; 1993 data += magic_len; 1994 1995 /* loop elements */ 1996 while (len > sizeof(struct ath10k_fw_ie)) { 1997 hdr = (struct ath10k_fw_ie *)data; 1998 1999 ie_id = le32_to_cpu(hdr->id); 2000 ie_len = le32_to_cpu(hdr->len); 2001 2002 len -= sizeof(*hdr); 2003 data += sizeof(*hdr); 2004 2005 if (len < ie_len) { 2006 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 2007 ie_id, len, ie_len); 2008 ret = -EINVAL; 2009 goto err; 2010 } 2011 2012 switch (ie_id) { 2013 case ATH10K_FW_IE_FW_VERSION: 2014 if (ie_len > sizeof(fw_file->fw_version) - 1) 2015 break; 2016 2017 memcpy(fw_file->fw_version, data, ie_len); 2018 fw_file->fw_version[ie_len] = '\0'; 2019 2020 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2021 "found fw version %s\n", 2022 fw_file->fw_version); 2023 break; 2024 case ATH10K_FW_IE_TIMESTAMP: 2025 if (ie_len != sizeof(u32)) 2026 break; 2027 2028 timestamp = (__le32 *)data; 2029 2030 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 2031 le32_to_cpup(timestamp)); 2032 break; 2033 case ATH10K_FW_IE_FEATURES: 2034 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2035 "found firmware features ie (%zd B)\n", 2036 ie_len); 2037 2038 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 2039 index = i / 8; 2040 bit = i % 8; 2041 2042 if (index == ie_len) 2043 break; 2044 2045 if (data[index] & (1 << bit)) { 2046 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2047 "Enabling feature bit: %i\n", 2048 i); 2049 __set_bit(i, fw_file->fw_features); 2050 } 2051 } 2052 2053 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 2054 fw_file->fw_features, 2055 sizeof(fw_file->fw_features)); 2056 break; 2057 case ATH10K_FW_IE_FW_IMAGE: 2058 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2059 "found fw image ie (%zd B)\n", 2060 ie_len); 2061 2062 fw_file->firmware_data = data; 2063 fw_file->firmware_len = ie_len; 2064 2065 break; 2066 case ATH10K_FW_IE_OTP_IMAGE: 2067 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2068 "found otp image ie (%zd B)\n", 2069 ie_len); 2070 2071 fw_file->otp_data = data; 2072 fw_file->otp_len = ie_len; 2073 2074 break; 2075 case ATH10K_FW_IE_WMI_OP_VERSION: 2076 if (ie_len != sizeof(u32)) 2077 break; 2078 2079 version = (__le32 *)data; 2080 2081 fw_file->wmi_op_version = le32_to_cpup(version); 2082 2083 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 2084 fw_file->wmi_op_version); 2085 break; 2086 case ATH10K_FW_IE_HTT_OP_VERSION: 2087 if (ie_len != sizeof(u32)) 2088 break; 2089 2090 version = (__le32 *)data; 2091 2092 fw_file->htt_op_version = le32_to_cpup(version); 2093 2094 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 2095 fw_file->htt_op_version); 2096 break; 2097 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 2098 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2099 "found fw code swap image ie (%zd B)\n", 2100 ie_len); 2101 fw_file->codeswap_data = data; 2102 fw_file->codeswap_len = ie_len; 2103 break; 2104 default: 2105 ath10k_warn(ar, "Unknown FW IE: %u\n", 2106 le32_to_cpu(hdr->id)); 2107 break; 2108 } 2109 2110 /* jump over the padding */ 2111 ie_len = ALIGN(ie_len, 4); 2112 2113 len -= ie_len; 2114 data += ie_len; 2115 } 2116 2117 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) && 2118 (!fw_file->firmware_data || !fw_file->firmware_len)) { 2119 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 2120 ar->hw_params.fw.dir, name); 2121 ret = -ENOMEDIUM; 2122 goto err; 2123 } 2124 2125 return 0; 2126 2127 err: 2128 ath10k_core_free_firmware_files(ar); 2129 return ret; 2130 } 2131 2132 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name, 2133 size_t fw_name_len, int fw_api) 2134 { 2135 switch (ar->hif.bus) { 2136 case ATH10K_BUS_SDIO: 2137 case ATH10K_BUS_USB: 2138 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin", 2139 ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus), 2140 fw_api); 2141 break; 2142 case ATH10K_BUS_PCI: 2143 case ATH10K_BUS_AHB: 2144 case ATH10K_BUS_SNOC: 2145 scnprintf(fw_name, fw_name_len, "%s-%d.bin", 2146 ATH10K_FW_FILE_BASE, fw_api); 2147 break; 2148 } 2149 } 2150 2151 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 2152 { 2153 int ret, i; 2154 char fw_name[100]; 2155 2156 /* calibration file is optional, don't check for any errors */ 2157 ath10k_fetch_cal_file(ar); 2158 2159 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) { 2160 ar->fw_api = i; 2161 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", 2162 ar->fw_api); 2163 2164 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api); 2165 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name, 2166 &ar->normal_mode_fw.fw_file); 2167 if (!ret) 2168 goto success; 2169 } 2170 2171 /* we end up here if we couldn't fetch any firmware */ 2172 2173 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d", 2174 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir, 2175 ret); 2176 2177 return ret; 2178 2179 success: 2180 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 2181 2182 return 0; 2183 } 2184 2185 static int ath10k_core_pre_cal_download(struct ath10k *ar) 2186 { 2187 int ret; 2188 2189 ret = ath10k_download_cal_nvmem(ar, "pre-calibration"); 2190 if (ret == 0) { 2191 ar->cal_mode = ATH10K_PRE_CAL_MODE_NVMEM; 2192 goto success; 2193 } else if (ret == -EPROBE_DEFER) { 2194 return ret; 2195 } 2196 2197 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2198 "boot did not find a pre-calibration nvmem-cell, try file next: %d\n", 2199 ret); 2200 2201 ret = ath10k_download_cal_file(ar, ar->pre_cal_file); 2202 if (ret == 0) { 2203 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE; 2204 goto success; 2205 } 2206 2207 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2208 "boot did not find a pre calibration file, try DT next: %d\n", 2209 ret); 2210 2211 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data"); 2212 if (ret) { 2213 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2214 "unable to load pre cal data from DT: %d\n", ret); 2215 return ret; 2216 } 2217 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT; 2218 2219 success: 2220 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 2221 ath10k_cal_mode_str(ar->cal_mode)); 2222 2223 return 0; 2224 } 2225 2226 static int ath10k_core_pre_cal_config(struct ath10k *ar) 2227 { 2228 int ret; 2229 2230 ret = ath10k_core_pre_cal_download(ar); 2231 if (ret) { 2232 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2233 "failed to load pre cal data: %d\n", ret); 2234 return ret; 2235 } 2236 2237 ret = ath10k_core_get_board_id_from_otp(ar); 2238 if (ret) { 2239 ath10k_err(ar, "failed to get board id: %d\n", ret); 2240 return ret; 2241 } 2242 2243 ret = ath10k_download_and_run_otp(ar); 2244 if (ret) { 2245 ath10k_err(ar, "failed to run otp: %d\n", ret); 2246 return ret; 2247 } 2248 2249 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2250 "pre cal configuration done successfully\n"); 2251 2252 return 0; 2253 } 2254 2255 static int ath10k_download_cal_data(struct ath10k *ar) 2256 { 2257 int ret; 2258 2259 ret = ath10k_core_pre_cal_config(ar); 2260 if (ret == 0) 2261 return 0; 2262 2263 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2264 "pre cal download procedure failed, try cal file: %d\n", 2265 ret); 2266 2267 ret = ath10k_download_cal_nvmem(ar, "calibration"); 2268 if (ret == 0) { 2269 ar->cal_mode = ATH10K_CAL_MODE_NVMEM; 2270 goto done; 2271 } else if (ret == -EPROBE_DEFER) { 2272 return ret; 2273 } 2274 2275 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2276 "boot did not find a calibration nvmem-cell, try file next: %d\n", 2277 ret); 2278 2279 ret = ath10k_download_cal_file(ar, ar->cal_file); 2280 if (ret == 0) { 2281 ar->cal_mode = ATH10K_CAL_MODE_FILE; 2282 goto done; 2283 } 2284 2285 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2286 "boot did not find a calibration file, try DT next: %d\n", 2287 ret); 2288 2289 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data"); 2290 if (ret == 0) { 2291 ar->cal_mode = ATH10K_CAL_MODE_DT; 2292 goto done; 2293 } 2294 2295 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2296 "boot did not find DT entry, try target EEPROM next: %d\n", 2297 ret); 2298 2299 ret = ath10k_download_cal_eeprom(ar); 2300 if (ret == 0) { 2301 ar->cal_mode = ATH10K_CAL_MODE_EEPROM; 2302 goto done; 2303 } 2304 2305 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2306 "boot did not find target EEPROM entry, try OTP next: %d\n", 2307 ret); 2308 2309 ret = ath10k_download_and_run_otp(ar); 2310 if (ret) { 2311 ath10k_err(ar, "failed to run otp: %d\n", ret); 2312 return ret; 2313 } 2314 2315 ar->cal_mode = ATH10K_CAL_MODE_OTP; 2316 2317 done: 2318 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 2319 ath10k_cal_mode_str(ar->cal_mode)); 2320 return 0; 2321 } 2322 2323 static void ath10k_core_fetch_btcoex_dt(struct ath10k *ar) 2324 { 2325 struct device_node *node; 2326 u8 coex_support = 0; 2327 int ret; 2328 2329 node = ar->dev->of_node; 2330 if (!node) 2331 goto out; 2332 2333 ret = of_property_read_u8(node, "qcom,coexist-support", &coex_support); 2334 if (ret) { 2335 ar->coex_support = true; 2336 goto out; 2337 } 2338 2339 if (coex_support) { 2340 ar->coex_support = true; 2341 } else { 2342 ar->coex_support = false; 2343 ar->coex_gpio_pin = -1; 2344 goto out; 2345 } 2346 2347 ret = of_property_read_u32(node, "qcom,coexist-gpio-pin", 2348 &ar->coex_gpio_pin); 2349 if (ret) 2350 ar->coex_gpio_pin = -1; 2351 2352 out: 2353 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot coex_support %d coex_gpio_pin %d\n", 2354 ar->coex_support, ar->coex_gpio_pin); 2355 } 2356 2357 static int ath10k_init_uart(struct ath10k *ar) 2358 { 2359 int ret; 2360 2361 /* 2362 * Explicitly setting UART prints to zero as target turns it on 2363 * based on scratch registers. 2364 */ 2365 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 2366 if (ret) { 2367 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 2368 return ret; 2369 } 2370 2371 if (!uart_print) { 2372 if (ar->hw_params.uart_pin_workaround) { 2373 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 2374 ar->hw_params.uart_pin); 2375 if (ret) { 2376 ath10k_warn(ar, "failed to set UART TX pin: %d", 2377 ret); 2378 return ret; 2379 } 2380 } 2381 2382 return 0; 2383 } 2384 2385 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 2386 if (ret) { 2387 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 2388 return ret; 2389 } 2390 2391 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 2392 if (ret) { 2393 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 2394 return ret; 2395 } 2396 2397 /* Set the UART baud rate to 19200. */ 2398 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 2399 if (ret) { 2400 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 2401 return ret; 2402 } 2403 2404 ath10k_info(ar, "UART prints enabled\n"); 2405 return 0; 2406 } 2407 2408 static int ath10k_init_hw_params(struct ath10k *ar) 2409 { 2410 const struct ath10k_hw_params *hw_params; 2411 int i; 2412 2413 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 2414 hw_params = &ath10k_hw_params_list[i]; 2415 2416 if (hw_params->bus == ar->hif.bus && 2417 hw_params->id == ar->target_version && 2418 hw_params->dev_id == ar->dev_id) 2419 break; 2420 } 2421 2422 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 2423 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 2424 ar->target_version); 2425 return -EINVAL; 2426 } 2427 2428 ar->hw_params = *hw_params; 2429 2430 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 2431 ar->hw_params.name, ar->target_version); 2432 2433 return 0; 2434 } 2435 2436 void ath10k_core_start_recovery(struct ath10k *ar) 2437 { 2438 if (test_and_set_bit(ATH10K_FLAG_RESTARTING, &ar->dev_flags)) { 2439 ath10k_warn(ar, "already restarting\n"); 2440 return; 2441 } 2442 2443 queue_work(ar->workqueue, &ar->restart_work); 2444 } 2445 EXPORT_SYMBOL(ath10k_core_start_recovery); 2446 2447 void ath10k_core_napi_enable(struct ath10k *ar) 2448 { 2449 lockdep_assert_held(&ar->conf_mutex); 2450 2451 if (test_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags)) 2452 return; 2453 2454 napi_enable(&ar->napi); 2455 set_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags); 2456 } 2457 EXPORT_SYMBOL(ath10k_core_napi_enable); 2458 2459 void ath10k_core_napi_sync_disable(struct ath10k *ar) 2460 { 2461 lockdep_assert_held(&ar->conf_mutex); 2462 2463 if (!test_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags)) 2464 return; 2465 2466 napi_synchronize(&ar->napi); 2467 napi_disable(&ar->napi); 2468 clear_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags); 2469 } 2470 EXPORT_SYMBOL(ath10k_core_napi_sync_disable); 2471 2472 static void ath10k_core_restart(struct work_struct *work) 2473 { 2474 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 2475 struct ath10k_vif *arvif; 2476 int ret; 2477 2478 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2479 2480 /* Place a barrier to make sure the compiler doesn't reorder 2481 * CRASH_FLUSH and calling other functions. 2482 */ 2483 barrier(); 2484 2485 ieee80211_stop_queues(ar->hw); 2486 ath10k_drain_tx(ar); 2487 complete(&ar->scan.started); 2488 complete(&ar->scan.completed); 2489 complete(&ar->scan.on_channel); 2490 complete(&ar->offchan_tx_completed); 2491 complete(&ar->install_key_done); 2492 complete(&ar->vdev_setup_done); 2493 complete(&ar->vdev_delete_done); 2494 complete(&ar->thermal.wmi_sync); 2495 complete(&ar->bss_survey_done); 2496 wake_up(&ar->htt.empty_tx_wq); 2497 wake_up(&ar->wmi.tx_credits_wq); 2498 wake_up(&ar->peer_mapping_wq); 2499 2500 /* TODO: We can have one instance of cancelling coverage_class_work by 2501 * moving it to ath10k_halt(), so that both stop() and restart() would 2502 * call that but it takes conf_mutex() and if we call cancel_work_sync() 2503 * with conf_mutex it will deadlock. 2504 */ 2505 cancel_work_sync(&ar->set_coverage_class_work); 2506 2507 mutex_lock(&ar->conf_mutex); 2508 2509 switch (ar->state) { 2510 case ATH10K_STATE_ON: 2511 ar->state = ATH10K_STATE_RESTARTING; 2512 ath10k_halt(ar); 2513 ath10k_scan_finish(ar); 2514 if (ar->hw_params.hw_restart_disconnect) { 2515 list_for_each_entry(arvif, &ar->arvifs, list) { 2516 if (arvif->is_up && 2517 arvif->vdev_type == WMI_VDEV_TYPE_STA) 2518 ieee80211_hw_restart_disconnect(arvif->vif); 2519 } 2520 } 2521 2522 ieee80211_restart_hw(ar->hw); 2523 break; 2524 case ATH10K_STATE_OFF: 2525 /* this can happen if driver is being unloaded 2526 * or if the crash happens during FW probing 2527 */ 2528 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 2529 break; 2530 case ATH10K_STATE_RESTARTING: 2531 /* hw restart might be requested from multiple places */ 2532 break; 2533 case ATH10K_STATE_RESTARTED: 2534 ar->state = ATH10K_STATE_WEDGED; 2535 fallthrough; 2536 case ATH10K_STATE_WEDGED: 2537 ath10k_warn(ar, "device is wedged, will not restart\n"); 2538 break; 2539 case ATH10K_STATE_UTF: 2540 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 2541 break; 2542 } 2543 2544 mutex_unlock(&ar->conf_mutex); 2545 2546 ret = ath10k_coredump_submit(ar); 2547 if (ret) 2548 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d", 2549 ret); 2550 2551 complete(&ar->driver_recovery); 2552 } 2553 2554 static void ath10k_core_set_coverage_class_work(struct work_struct *work) 2555 { 2556 struct ath10k *ar = container_of(work, struct ath10k, 2557 set_coverage_class_work); 2558 2559 if (ar->hw_params.hw_ops->set_coverage_class) 2560 ar->hw_params.hw_ops->set_coverage_class(ar, -1); 2561 } 2562 2563 static int ath10k_core_init_firmware_features(struct ath10k *ar) 2564 { 2565 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 2566 int max_num_peers; 2567 2568 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) && 2569 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 2570 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 2571 return -EINVAL; 2572 } 2573 2574 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 2575 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 2576 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version); 2577 return -EINVAL; 2578 } 2579 2580 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 2581 switch (ath10k_cryptmode_param) { 2582 case ATH10K_CRYPT_MODE_HW: 2583 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2584 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 2585 break; 2586 case ATH10K_CRYPT_MODE_SW: 2587 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 2588 fw_file->fw_features)) { 2589 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 2590 return -EINVAL; 2591 } 2592 2593 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2594 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 2595 break; 2596 default: 2597 ath10k_info(ar, "invalid cryptmode: %d\n", 2598 ath10k_cryptmode_param); 2599 return -EINVAL; 2600 } 2601 2602 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 2603 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 2604 2605 if (ath10k_frame_mode == ATH10K_HW_TXRX_RAW) { 2606 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 2607 fw_file->fw_features)) { 2608 ath10k_err(ar, "rawmode = 1 requires support from firmware"); 2609 return -EINVAL; 2610 } 2611 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2612 } 2613 2614 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 2615 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 2616 2617 /* Workaround: 2618 * 2619 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 2620 * and causes enormous performance issues (malformed frames, 2621 * etc). 2622 * 2623 * Disabling A-MSDU makes RAW mode stable with heavy traffic 2624 * albeit a bit slower compared to regular operation. 2625 */ 2626 ar->htt.max_num_amsdu = 1; 2627 } 2628 2629 /* Backwards compatibility for firmwares without 2630 * ATH10K_FW_IE_WMI_OP_VERSION. 2631 */ 2632 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 2633 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 2634 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 2635 fw_file->fw_features)) 2636 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 2637 else 2638 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 2639 } else { 2640 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 2641 } 2642 } 2643 2644 switch (fw_file->wmi_op_version) { 2645 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2646 max_num_peers = TARGET_NUM_PEERS; 2647 ar->max_num_stations = TARGET_NUM_STATIONS; 2648 ar->max_num_vdevs = TARGET_NUM_VDEVS; 2649 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 2650 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 2651 WMI_STAT_PEER; 2652 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2653 break; 2654 case ATH10K_FW_WMI_OP_VERSION_10_1: 2655 case ATH10K_FW_WMI_OP_VERSION_10_2: 2656 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2657 if (ath10k_peer_stats_enabled(ar)) { 2658 max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS; 2659 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS; 2660 } else { 2661 max_num_peers = TARGET_10X_NUM_PEERS; 2662 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 2663 } 2664 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 2665 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 2666 ar->fw_stats_req_mask = WMI_STAT_PEER; 2667 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2668 break; 2669 case ATH10K_FW_WMI_OP_VERSION_TLV: 2670 max_num_peers = TARGET_TLV_NUM_PEERS; 2671 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 2672 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 2673 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 2674 if (ar->hif.bus == ATH10K_BUS_SDIO) 2675 ar->htt.max_num_pending_tx = 2676 TARGET_TLV_NUM_MSDU_DESC_HL; 2677 else 2678 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 2679 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 2680 ar->fw_stats_req_mask = WMI_TLV_STAT_PDEV | WMI_TLV_STAT_VDEV | 2681 WMI_TLV_STAT_PEER | WMI_TLV_STAT_PEER_EXTD; 2682 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2683 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC; 2684 break; 2685 case ATH10K_FW_WMI_OP_VERSION_10_4: 2686 max_num_peers = TARGET_10_4_NUM_PEERS; 2687 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 2688 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 2689 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 2690 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 2691 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER | 2692 WMI_10_4_STAT_PEER_EXTD | 2693 WMI_10_4_STAT_VDEV_EXTD; 2694 ar->max_spatial_stream = ar->hw_params.max_spatial_stream; 2695 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS; 2696 2697 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, 2698 fw_file->fw_features)) 2699 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC; 2700 else 2701 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 2702 break; 2703 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2704 case ATH10K_FW_WMI_OP_VERSION_MAX: 2705 default: 2706 WARN_ON(1); 2707 return -EINVAL; 2708 } 2709 2710 if (ar->hw_params.num_peers) 2711 ar->max_num_peers = ar->hw_params.num_peers; 2712 else 2713 ar->max_num_peers = max_num_peers; 2714 2715 /* Backwards compatibility for firmwares without 2716 * ATH10K_FW_IE_HTT_OP_VERSION. 2717 */ 2718 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 2719 switch (fw_file->wmi_op_version) { 2720 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2721 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 2722 break; 2723 case ATH10K_FW_WMI_OP_VERSION_10_1: 2724 case ATH10K_FW_WMI_OP_VERSION_10_2: 2725 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2726 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 2727 break; 2728 case ATH10K_FW_WMI_OP_VERSION_TLV: 2729 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 2730 break; 2731 case ATH10K_FW_WMI_OP_VERSION_10_4: 2732 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2733 case ATH10K_FW_WMI_OP_VERSION_MAX: 2734 ath10k_err(ar, "htt op version not found from fw meta data"); 2735 return -EINVAL; 2736 } 2737 } 2738 2739 return 0; 2740 } 2741 2742 static int ath10k_core_reset_rx_filter(struct ath10k *ar) 2743 { 2744 int ret; 2745 int vdev_id; 2746 int vdev_type; 2747 int vdev_subtype; 2748 const u8 *vdev_addr; 2749 2750 vdev_id = 0; 2751 vdev_type = WMI_VDEV_TYPE_STA; 2752 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE); 2753 vdev_addr = ar->mac_addr; 2754 2755 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype, 2756 vdev_addr); 2757 if (ret) { 2758 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret); 2759 return ret; 2760 } 2761 2762 ret = ath10k_wmi_vdev_delete(ar, vdev_id); 2763 if (ret) { 2764 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret); 2765 return ret; 2766 } 2767 2768 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be 2769 * serialized properly implicitly. 2770 * 2771 * Moreover (most) WMI commands have no explicit acknowledges. It is 2772 * possible to infer it implicitly by poking firmware with echo 2773 * command - getting a reply means all preceding comments have been 2774 * (mostly) processed. 2775 * 2776 * In case of vdev create/delete this is sufficient. 2777 * 2778 * Without this it's possible to end up with a race when HTT Rx ring is 2779 * started before vdev create/delete hack is complete allowing a short 2780 * window of opportunity to receive (and Tx ACK) a bunch of frames. 2781 */ 2782 ret = ath10k_wmi_barrier(ar); 2783 if (ret) { 2784 ath10k_err(ar, "failed to ping firmware: %d\n", ret); 2785 return ret; 2786 } 2787 2788 return 0; 2789 } 2790 2791 static int ath10k_core_compat_services(struct ath10k *ar) 2792 { 2793 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 2794 2795 /* all 10.x firmware versions support thermal throttling but don't 2796 * advertise the support via service flags so we have to hardcode 2797 * it here 2798 */ 2799 switch (fw_file->wmi_op_version) { 2800 case ATH10K_FW_WMI_OP_VERSION_10_1: 2801 case ATH10K_FW_WMI_OP_VERSION_10_2: 2802 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2803 case ATH10K_FW_WMI_OP_VERSION_10_4: 2804 set_bit(WMI_SERVICE_THERM_THROT, ar->wmi.svc_map); 2805 break; 2806 default: 2807 break; 2808 } 2809 2810 return 0; 2811 } 2812 2813 #define TGT_IRAM_READ_PER_ITR (8 * 1024) 2814 2815 static int ath10k_core_copy_target_iram(struct ath10k *ar) 2816 { 2817 const struct ath10k_hw_mem_layout *hw_mem; 2818 const struct ath10k_mem_region *tmp, *mem_region = NULL; 2819 dma_addr_t paddr; 2820 void *vaddr = NULL; 2821 u8 num_read_itr; 2822 int i, ret; 2823 u32 len, remaining_len; 2824 2825 /* copy target iram feature must work also when 2826 * ATH10K_FW_CRASH_DUMP_RAM_DATA is disabled, so 2827 * _ath10k_coredump_get_mem_layout() to accomplist that 2828 */ 2829 hw_mem = _ath10k_coredump_get_mem_layout(ar); 2830 if (!hw_mem) 2831 /* if CONFIG_DEV_COREDUMP is disabled we get NULL, then 2832 * just silently disable the feature by doing nothing 2833 */ 2834 return 0; 2835 2836 for (i = 0; i < hw_mem->region_table.size; i++) { 2837 tmp = &hw_mem->region_table.regions[i]; 2838 if (tmp->type == ATH10K_MEM_REGION_TYPE_REG) { 2839 mem_region = tmp; 2840 break; 2841 } 2842 } 2843 2844 if (!mem_region) 2845 return -ENOMEM; 2846 2847 for (i = 0; i < ar->wmi.num_mem_chunks; i++) { 2848 if (ar->wmi.mem_chunks[i].req_id == 2849 WMI_IRAM_RECOVERY_HOST_MEM_REQ_ID) { 2850 vaddr = ar->wmi.mem_chunks[i].vaddr; 2851 len = ar->wmi.mem_chunks[i].len; 2852 break; 2853 } 2854 } 2855 2856 if (!vaddr || !len) { 2857 ath10k_warn(ar, "No allocated memory for IRAM back up"); 2858 return -ENOMEM; 2859 } 2860 2861 len = (len < mem_region->len) ? len : mem_region->len; 2862 paddr = mem_region->start; 2863 num_read_itr = len / TGT_IRAM_READ_PER_ITR; 2864 remaining_len = len % TGT_IRAM_READ_PER_ITR; 2865 for (i = 0; i < num_read_itr; i++) { 2866 ret = ath10k_hif_diag_read(ar, paddr, vaddr, 2867 TGT_IRAM_READ_PER_ITR); 2868 if (ret) { 2869 ath10k_warn(ar, "failed to copy firmware IRAM contents: %d", 2870 ret); 2871 return ret; 2872 } 2873 2874 paddr += TGT_IRAM_READ_PER_ITR; 2875 vaddr += TGT_IRAM_READ_PER_ITR; 2876 } 2877 2878 if (remaining_len) { 2879 ret = ath10k_hif_diag_read(ar, paddr, vaddr, remaining_len); 2880 if (ret) { 2881 ath10k_warn(ar, "failed to copy firmware IRAM contents: %d", 2882 ret); 2883 return ret; 2884 } 2885 } 2886 2887 ath10k_dbg(ar, ATH10K_DBG_BOOT, "target IRAM back up completed\n"); 2888 2889 return 0; 2890 } 2891 2892 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 2893 const struct ath10k_fw_components *fw) 2894 { 2895 int status; 2896 u32 val; 2897 2898 lockdep_assert_held(&ar->conf_mutex); 2899 2900 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2901 2902 ar->running_fw = fw; 2903 2904 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2905 ar->running_fw->fw_file.fw_features)) { 2906 ath10k_bmi_start(ar); 2907 2908 /* Enable hardware clock to speed up firmware download */ 2909 if (ar->hw_params.hw_ops->enable_pll_clk) { 2910 status = ar->hw_params.hw_ops->enable_pll_clk(ar); 2911 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot enable pll ret %d\n", 2912 status); 2913 } 2914 2915 if (ath10k_init_configure_target(ar)) { 2916 status = -EINVAL; 2917 goto err; 2918 } 2919 2920 status = ath10k_download_cal_data(ar); 2921 if (status) 2922 goto err; 2923 2924 /* Some of qca988x solutions are having global reset issue 2925 * during target initialization. Bypassing PLL setting before 2926 * downloading firmware and letting the SoC run on REF_CLK is 2927 * fixing the problem. Corresponding firmware change is also 2928 * needed to set the clock source once the target is 2929 * initialized. 2930 */ 2931 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 2932 ar->running_fw->fw_file.fw_features)) { 2933 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 2934 if (status) { 2935 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 2936 status); 2937 goto err; 2938 } 2939 } 2940 2941 status = ath10k_download_fw(ar); 2942 if (status) 2943 goto err; 2944 2945 status = ath10k_init_uart(ar); 2946 if (status) 2947 goto err; 2948 2949 if (ar->hif.bus == ATH10K_BUS_SDIO) { 2950 status = ath10k_init_sdio(ar, mode); 2951 if (status) { 2952 ath10k_err(ar, "failed to init SDIO: %d\n", status); 2953 goto err; 2954 } 2955 } 2956 } 2957 2958 ar->htc.htc_ops.target_send_suspend_complete = 2959 ath10k_send_suspend_complete; 2960 2961 status = ath10k_htc_init(ar); 2962 if (status) { 2963 ath10k_err(ar, "could not init HTC (%d)\n", status); 2964 goto err; 2965 } 2966 2967 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2968 ar->running_fw->fw_file.fw_features)) { 2969 status = ath10k_bmi_done(ar); 2970 if (status) 2971 goto err; 2972 } 2973 2974 status = ath10k_wmi_attach(ar); 2975 if (status) { 2976 ath10k_err(ar, "WMI attach failed: %d\n", status); 2977 goto err; 2978 } 2979 2980 status = ath10k_htt_init(ar); 2981 if (status) { 2982 ath10k_err(ar, "failed to init htt: %d\n", status); 2983 goto err_wmi_detach; 2984 } 2985 2986 status = ath10k_htt_tx_start(&ar->htt); 2987 if (status) { 2988 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 2989 goto err_wmi_detach; 2990 } 2991 2992 /* If firmware indicates Full Rx Reorder support it must be used in a 2993 * slightly different manner. Let HTT code know. 2994 */ 2995 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 2996 ar->wmi.svc_map)); 2997 2998 status = ath10k_htt_rx_alloc(&ar->htt); 2999 if (status) { 3000 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 3001 goto err_htt_tx_detach; 3002 } 3003 3004 status = ath10k_hif_start(ar); 3005 if (status) { 3006 ath10k_err(ar, "could not start HIF: %d\n", status); 3007 goto err_htt_rx_detach; 3008 } 3009 3010 status = ath10k_htc_wait_target(&ar->htc); 3011 if (status) { 3012 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 3013 goto err_hif_stop; 3014 } 3015 3016 status = ath10k_hif_start_post(ar); 3017 if (status) { 3018 ath10k_err(ar, "failed to swap mailbox: %d\n", status); 3019 goto err_hif_stop; 3020 } 3021 3022 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 3023 status = ath10k_htt_connect(&ar->htt); 3024 if (status) { 3025 ath10k_err(ar, "failed to connect htt (%d)\n", status); 3026 goto err_hif_stop; 3027 } 3028 } 3029 3030 status = ath10k_wmi_connect(ar); 3031 if (status) { 3032 ath10k_err(ar, "could not connect wmi: %d\n", status); 3033 goto err_hif_stop; 3034 } 3035 3036 status = ath10k_htc_start(&ar->htc); 3037 if (status) { 3038 ath10k_err(ar, "failed to start htc: %d\n", status); 3039 goto err_hif_stop; 3040 } 3041 3042 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 3043 status = ath10k_wmi_wait_for_service_ready(ar); 3044 if (status) { 3045 ath10k_warn(ar, "wmi service ready event not received"); 3046 goto err_hif_stop; 3047 } 3048 } 3049 3050 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 3051 ar->hw->wiphy->fw_version); 3052 3053 if (test_bit(ATH10K_FW_FEATURE_IRAM_RECOVERY, 3054 ar->running_fw->fw_file.fw_features)) { 3055 status = ath10k_core_copy_target_iram(ar); 3056 if (status) { 3057 ath10k_warn(ar, "failed to copy target iram contents: %d", 3058 status); 3059 goto err_hif_stop; 3060 } 3061 } 3062 3063 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) && 3064 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 3065 val = 0; 3066 if (ath10k_peer_stats_enabled(ar)) 3067 val = WMI_10_4_PEER_STATS; 3068 3069 /* Enable vdev stats by default */ 3070 val |= WMI_10_4_VDEV_STATS; 3071 3072 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) 3073 val |= WMI_10_4_BSS_CHANNEL_INFO_64; 3074 3075 ath10k_core_fetch_btcoex_dt(ar); 3076 3077 /* 10.4 firmware supports BT-Coex without reloading firmware 3078 * via pdev param. To support Bluetooth coexistence pdev param, 3079 * WMI_COEX_GPIO_SUPPORT of extended resource config should be 3080 * enabled always. 3081 * 3082 * We can still enable BTCOEX if firmware has the support 3083 * eventhough btceox_support value is 3084 * ATH10K_DT_BTCOEX_NOT_FOUND 3085 */ 3086 3087 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 3088 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 3089 ar->running_fw->fw_file.fw_features) && 3090 ar->coex_support) 3091 val |= WMI_10_4_COEX_GPIO_SUPPORT; 3092 3093 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, 3094 ar->wmi.svc_map)) 3095 val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY; 3096 3097 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, 3098 ar->wmi.svc_map)) 3099 val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA; 3100 3101 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI, 3102 ar->wmi.svc_map)) 3103 val |= WMI_10_4_TX_DATA_ACK_RSSI; 3104 3105 if (test_bit(WMI_SERVICE_REPORT_AIRTIME, ar->wmi.svc_map)) 3106 val |= WMI_10_4_REPORT_AIRTIME; 3107 3108 if (test_bit(WMI_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT, 3109 ar->wmi.svc_map)) 3110 val |= WMI_10_4_EXT_PEER_TID_CONFIGS_SUPPORT; 3111 3112 status = ath10k_mac_ext_resource_config(ar, val); 3113 if (status) { 3114 ath10k_err(ar, 3115 "failed to send ext resource cfg command : %d\n", 3116 status); 3117 goto err_hif_stop; 3118 } 3119 } 3120 3121 status = ath10k_wmi_cmd_init(ar); 3122 if (status) { 3123 ath10k_err(ar, "could not send WMI init command (%d)\n", 3124 status); 3125 goto err_hif_stop; 3126 } 3127 3128 status = ath10k_wmi_wait_for_unified_ready(ar); 3129 if (status) { 3130 ath10k_err(ar, "wmi unified ready event not received\n"); 3131 goto err_hif_stop; 3132 } 3133 3134 status = ath10k_core_compat_services(ar); 3135 if (status) { 3136 ath10k_err(ar, "compat services failed: %d\n", status); 3137 goto err_hif_stop; 3138 } 3139 3140 status = ath10k_wmi_pdev_set_base_macaddr(ar, ar->mac_addr); 3141 if (status && status != -EOPNOTSUPP) { 3142 ath10k_err(ar, 3143 "failed to set base mac address: %d\n", status); 3144 goto err_hif_stop; 3145 } 3146 3147 /* Some firmware revisions do not properly set up hardware rx filter 3148 * registers. 3149 * 3150 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK 3151 * is filled with 0s instead of 1s allowing HW to respond with ACKs to 3152 * any frames that matches MAC_PCU_RX_FILTER which is also 3153 * misconfigured to accept anything. 3154 * 3155 * The ADDR1 is programmed using internal firmware structure field and 3156 * can't be (easily/sanely) reached from the driver explicitly. It is 3157 * possible to implicitly make it correct by creating a dummy vdev and 3158 * then deleting it. 3159 */ 3160 if (ar->hw_params.hw_filter_reset_required && 3161 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 3162 status = ath10k_core_reset_rx_filter(ar); 3163 if (status) { 3164 ath10k_err(ar, 3165 "failed to reset rx filter: %d\n", status); 3166 goto err_hif_stop; 3167 } 3168 } 3169 3170 status = ath10k_htt_rx_ring_refill(ar); 3171 if (status) { 3172 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 3173 goto err_hif_stop; 3174 } 3175 3176 if (ar->max_num_vdevs >= 64) 3177 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL; 3178 else 3179 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 3180 3181 INIT_LIST_HEAD(&ar->arvifs); 3182 3183 /* we don't care about HTT in UTF mode */ 3184 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 3185 status = ath10k_htt_setup(&ar->htt); 3186 if (status) { 3187 ath10k_err(ar, "failed to setup htt: %d\n", status); 3188 goto err_hif_stop; 3189 } 3190 } 3191 3192 status = ath10k_debug_start(ar); 3193 if (status) 3194 goto err_hif_stop; 3195 3196 status = ath10k_hif_set_target_log_mode(ar, fw_diag_log); 3197 if (status && status != -EOPNOTSUPP) { 3198 ath10k_warn(ar, "set target log mode failed: %d\n", status); 3199 goto err_hif_stop; 3200 } 3201 3202 return 0; 3203 3204 err_hif_stop: 3205 ath10k_hif_stop(ar); 3206 err_htt_rx_detach: 3207 ath10k_htt_rx_free(&ar->htt); 3208 err_htt_tx_detach: 3209 ath10k_htt_tx_free(&ar->htt); 3210 err_wmi_detach: 3211 ath10k_wmi_detach(ar); 3212 err: 3213 return status; 3214 } 3215 EXPORT_SYMBOL(ath10k_core_start); 3216 3217 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 3218 { 3219 int ret; 3220 unsigned long time_left; 3221 3222 reinit_completion(&ar->target_suspend); 3223 3224 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 3225 if (ret) { 3226 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 3227 return ret; 3228 } 3229 3230 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 3231 3232 if (!time_left) { 3233 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 3234 return -ETIMEDOUT; 3235 } 3236 3237 return 0; 3238 } 3239 3240 void ath10k_core_stop(struct ath10k *ar) 3241 { 3242 lockdep_assert_held(&ar->conf_mutex); 3243 ath10k_debug_stop(ar); 3244 3245 /* try to suspend target */ 3246 if (ar->state != ATH10K_STATE_RESTARTING && 3247 ar->state != ATH10K_STATE_UTF) 3248 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 3249 3250 ath10k_hif_stop(ar); 3251 ath10k_htt_tx_stop(&ar->htt); 3252 ath10k_htt_rx_free(&ar->htt); 3253 ath10k_wmi_detach(ar); 3254 3255 ar->id.bmi_ids_valid = false; 3256 } 3257 EXPORT_SYMBOL(ath10k_core_stop); 3258 3259 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 3260 * order to know what hw capabilities should be advertised to mac80211 it is 3261 * necessary to load the firmware (and tear it down immediately since start 3262 * hook will try to init it again) before registering 3263 */ 3264 static int ath10k_core_probe_fw(struct ath10k *ar) 3265 { 3266 struct bmi_target_info target_info; 3267 int ret = 0; 3268 3269 ret = ath10k_hif_power_up(ar, ATH10K_FIRMWARE_MODE_NORMAL); 3270 if (ret) { 3271 ath10k_err(ar, "could not power on hif bus (%d)\n", ret); 3272 return ret; 3273 } 3274 3275 switch (ar->hif.bus) { 3276 case ATH10K_BUS_SDIO: 3277 memset(&target_info, 0, sizeof(target_info)); 3278 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info); 3279 if (ret) { 3280 ath10k_err(ar, "could not get target info (%d)\n", ret); 3281 goto err_power_down; 3282 } 3283 ar->target_version = target_info.version; 3284 ar->hw->wiphy->hw_version = target_info.version; 3285 break; 3286 case ATH10K_BUS_PCI: 3287 case ATH10K_BUS_AHB: 3288 case ATH10K_BUS_USB: 3289 memset(&target_info, 0, sizeof(target_info)); 3290 ret = ath10k_bmi_get_target_info(ar, &target_info); 3291 if (ret) { 3292 ath10k_err(ar, "could not get target info (%d)\n", ret); 3293 goto err_power_down; 3294 } 3295 ar->target_version = target_info.version; 3296 ar->hw->wiphy->hw_version = target_info.version; 3297 break; 3298 case ATH10K_BUS_SNOC: 3299 memset(&target_info, 0, sizeof(target_info)); 3300 ret = ath10k_hif_get_target_info(ar, &target_info); 3301 if (ret) { 3302 ath10k_err(ar, "could not get target info (%d)\n", ret); 3303 goto err_power_down; 3304 } 3305 ar->target_version = target_info.version; 3306 ar->hw->wiphy->hw_version = target_info.version; 3307 break; 3308 default: 3309 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus); 3310 } 3311 3312 ret = ath10k_init_hw_params(ar); 3313 if (ret) { 3314 ath10k_err(ar, "could not get hw params (%d)\n", ret); 3315 goto err_power_down; 3316 } 3317 3318 ret = ath10k_core_fetch_firmware_files(ar); 3319 if (ret) { 3320 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 3321 goto err_power_down; 3322 } 3323 3324 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) != 3325 sizeof(ar->normal_mode_fw.fw_file.fw_version)); 3326 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version, 3327 sizeof(ar->hw->wiphy->fw_version)); 3328 3329 ath10k_debug_print_hwfw_info(ar); 3330 3331 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 3332 ar->normal_mode_fw.fw_file.fw_features)) { 3333 ret = ath10k_core_pre_cal_download(ar); 3334 if (ret) { 3335 /* pre calibration data download is not necessary 3336 * for all the chipsets. Ignore failures and continue. 3337 */ 3338 ath10k_dbg(ar, ATH10K_DBG_BOOT, 3339 "could not load pre cal data: %d\n", ret); 3340 } 3341 3342 ret = ath10k_core_get_board_id_from_otp(ar); 3343 if (ret && ret != -EOPNOTSUPP) { 3344 ath10k_err(ar, "failed to get board id from otp: %d\n", 3345 ret); 3346 goto err_free_firmware_files; 3347 } 3348 3349 ret = ath10k_core_check_smbios(ar); 3350 if (ret) 3351 ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n"); 3352 3353 ret = ath10k_core_check_dt(ar); 3354 if (ret) 3355 ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n"); 3356 3357 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD); 3358 if (ret) { 3359 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 3360 goto err_free_firmware_files; 3361 } 3362 3363 ath10k_debug_print_board_info(ar); 3364 } 3365 3366 device_get_mac_address(ar->dev, ar->mac_addr); 3367 3368 ret = ath10k_core_init_firmware_features(ar); 3369 if (ret) { 3370 ath10k_err(ar, "fatal problem with firmware features: %d\n", 3371 ret); 3372 goto err_free_firmware_files; 3373 } 3374 3375 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 3376 ar->normal_mode_fw.fw_file.fw_features)) { 3377 ret = ath10k_swap_code_seg_init(ar, 3378 &ar->normal_mode_fw.fw_file); 3379 if (ret) { 3380 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 3381 ret); 3382 goto err_free_firmware_files; 3383 } 3384 } 3385 3386 mutex_lock(&ar->conf_mutex); 3387 3388 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL, 3389 &ar->normal_mode_fw); 3390 if (ret) { 3391 ath10k_err(ar, "could not init core (%d)\n", ret); 3392 goto err_unlock; 3393 } 3394 3395 ath10k_debug_print_boot_info(ar); 3396 ath10k_core_stop(ar); 3397 3398 mutex_unlock(&ar->conf_mutex); 3399 3400 ath10k_hif_power_down(ar); 3401 return 0; 3402 3403 err_unlock: 3404 mutex_unlock(&ar->conf_mutex); 3405 3406 err_free_firmware_files: 3407 ath10k_core_free_firmware_files(ar); 3408 3409 err_power_down: 3410 ath10k_hif_power_down(ar); 3411 3412 return ret; 3413 } 3414 3415 static void ath10k_core_register_work(struct work_struct *work) 3416 { 3417 struct ath10k *ar = container_of(work, struct ath10k, register_work); 3418 int status; 3419 3420 /* peer stats are enabled by default */ 3421 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags); 3422 3423 status = ath10k_core_probe_fw(ar); 3424 if (status) { 3425 ath10k_err(ar, "could not probe fw (%d)\n", status); 3426 goto err; 3427 } 3428 3429 status = ath10k_mac_register(ar); 3430 if (status) { 3431 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 3432 goto err_release_fw; 3433 } 3434 3435 status = ath10k_coredump_register(ar); 3436 if (status) { 3437 ath10k_err(ar, "unable to register coredump\n"); 3438 goto err_unregister_mac; 3439 } 3440 3441 status = ath10k_debug_register(ar); 3442 if (status) { 3443 ath10k_err(ar, "unable to initialize debugfs\n"); 3444 goto err_unregister_coredump; 3445 } 3446 3447 status = ath10k_spectral_create(ar); 3448 if (status) { 3449 ath10k_err(ar, "failed to initialize spectral\n"); 3450 goto err_debug_destroy; 3451 } 3452 3453 status = ath10k_thermal_register(ar); 3454 if (status) { 3455 ath10k_err(ar, "could not register thermal device: %d\n", 3456 status); 3457 goto err_spectral_destroy; 3458 } 3459 3460 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 3461 return; 3462 3463 err_spectral_destroy: 3464 ath10k_spectral_destroy(ar); 3465 err_debug_destroy: 3466 ath10k_debug_destroy(ar); 3467 err_unregister_coredump: 3468 ath10k_coredump_unregister(ar); 3469 err_unregister_mac: 3470 ath10k_mac_unregister(ar); 3471 err_release_fw: 3472 ath10k_core_free_firmware_files(ar); 3473 err: 3474 /* TODO: It's probably a good idea to release device from the driver 3475 * but calling device_release_driver() here will cause a deadlock. 3476 */ 3477 return; 3478 } 3479 3480 int ath10k_core_register(struct ath10k *ar, 3481 const struct ath10k_bus_params *bus_params) 3482 { 3483 ar->bus_param = *bus_params; 3484 3485 queue_work(ar->workqueue, &ar->register_work); 3486 3487 return 0; 3488 } 3489 EXPORT_SYMBOL(ath10k_core_register); 3490 3491 void ath10k_core_unregister(struct ath10k *ar) 3492 { 3493 cancel_work_sync(&ar->register_work); 3494 3495 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 3496 return; 3497 3498 ath10k_thermal_unregister(ar); 3499 /* Stop spectral before unregistering from mac80211 to remove the 3500 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 3501 * would be already be free'd recursively, leading to a double free. 3502 */ 3503 ath10k_spectral_destroy(ar); 3504 3505 /* We must unregister from mac80211 before we stop HTC and HIF. 3506 * Otherwise we will fail to submit commands to FW and mac80211 will be 3507 * unhappy about callback failures. 3508 */ 3509 ath10k_mac_unregister(ar); 3510 3511 ath10k_testmode_destroy(ar); 3512 3513 ath10k_core_free_firmware_files(ar); 3514 ath10k_core_free_board_files(ar); 3515 3516 ath10k_debug_unregister(ar); 3517 } 3518 EXPORT_SYMBOL(ath10k_core_unregister); 3519 3520 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 3521 enum ath10k_bus bus, 3522 enum ath10k_hw_rev hw_rev, 3523 const struct ath10k_hif_ops *hif_ops) 3524 { 3525 struct ath10k *ar; 3526 int ret; 3527 3528 ar = ath10k_mac_create(priv_size); 3529 if (!ar) 3530 return NULL; 3531 3532 ar->ath_common.priv = ar; 3533 ar->ath_common.hw = ar->hw; 3534 ar->dev = dev; 3535 ar->hw_rev = hw_rev; 3536 ar->hif.ops = hif_ops; 3537 ar->hif.bus = bus; 3538 3539 switch (hw_rev) { 3540 case ATH10K_HW_QCA988X: 3541 case ATH10K_HW_QCA9887: 3542 ar->regs = &qca988x_regs; 3543 ar->hw_ce_regs = &qcax_ce_regs; 3544 ar->hw_values = &qca988x_values; 3545 break; 3546 case ATH10K_HW_QCA6174: 3547 case ATH10K_HW_QCA9377: 3548 ar->regs = &qca6174_regs; 3549 ar->hw_ce_regs = &qcax_ce_regs; 3550 ar->hw_values = &qca6174_values; 3551 break; 3552 case ATH10K_HW_QCA99X0: 3553 case ATH10K_HW_QCA9984: 3554 ar->regs = &qca99x0_regs; 3555 ar->hw_ce_regs = &qcax_ce_regs; 3556 ar->hw_values = &qca99x0_values; 3557 break; 3558 case ATH10K_HW_QCA9888: 3559 ar->regs = &qca99x0_regs; 3560 ar->hw_ce_regs = &qcax_ce_regs; 3561 ar->hw_values = &qca9888_values; 3562 break; 3563 case ATH10K_HW_QCA4019: 3564 ar->regs = &qca4019_regs; 3565 ar->hw_ce_regs = &qcax_ce_regs; 3566 ar->hw_values = &qca4019_values; 3567 break; 3568 case ATH10K_HW_WCN3990: 3569 ar->regs = &wcn3990_regs; 3570 ar->hw_ce_regs = &wcn3990_ce_regs; 3571 ar->hw_values = &wcn3990_values; 3572 break; 3573 default: 3574 ath10k_err(ar, "unsupported core hardware revision %d\n", 3575 hw_rev); 3576 ret = -ENOTSUPP; 3577 goto err_free_mac; 3578 } 3579 3580 init_completion(&ar->scan.started); 3581 init_completion(&ar->scan.completed); 3582 init_completion(&ar->scan.on_channel); 3583 init_completion(&ar->target_suspend); 3584 init_completion(&ar->driver_recovery); 3585 init_completion(&ar->wow.wakeup_completed); 3586 3587 init_completion(&ar->install_key_done); 3588 init_completion(&ar->vdev_setup_done); 3589 init_completion(&ar->vdev_delete_done); 3590 init_completion(&ar->thermal.wmi_sync); 3591 init_completion(&ar->bss_survey_done); 3592 init_completion(&ar->peer_delete_done); 3593 init_completion(&ar->peer_stats_info_complete); 3594 3595 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 3596 3597 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 3598 if (!ar->workqueue) 3599 goto err_free_mac; 3600 3601 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 3602 if (!ar->workqueue_aux) 3603 goto err_free_wq; 3604 3605 ar->workqueue_tx_complete = 3606 create_singlethread_workqueue("ath10k_tx_complete_wq"); 3607 if (!ar->workqueue_tx_complete) 3608 goto err_free_aux_wq; 3609 3610 mutex_init(&ar->conf_mutex); 3611 mutex_init(&ar->dump_mutex); 3612 spin_lock_init(&ar->data_lock); 3613 3614 INIT_LIST_HEAD(&ar->peers); 3615 init_waitqueue_head(&ar->peer_mapping_wq); 3616 init_waitqueue_head(&ar->htt.empty_tx_wq); 3617 init_waitqueue_head(&ar->wmi.tx_credits_wq); 3618 3619 skb_queue_head_init(&ar->htt.rx_indication_head); 3620 3621 init_completion(&ar->offchan_tx_completed); 3622 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 3623 skb_queue_head_init(&ar->offchan_tx_queue); 3624 3625 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 3626 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 3627 3628 INIT_WORK(&ar->register_work, ath10k_core_register_work); 3629 INIT_WORK(&ar->restart_work, ath10k_core_restart); 3630 INIT_WORK(&ar->set_coverage_class_work, 3631 ath10k_core_set_coverage_class_work); 3632 3633 init_dummy_netdev(&ar->napi_dev); 3634 3635 ret = ath10k_coredump_create(ar); 3636 if (ret) 3637 goto err_free_tx_complete; 3638 3639 ret = ath10k_debug_create(ar); 3640 if (ret) 3641 goto err_free_coredump; 3642 3643 return ar; 3644 3645 err_free_coredump: 3646 ath10k_coredump_destroy(ar); 3647 err_free_tx_complete: 3648 destroy_workqueue(ar->workqueue_tx_complete); 3649 err_free_aux_wq: 3650 destroy_workqueue(ar->workqueue_aux); 3651 err_free_wq: 3652 destroy_workqueue(ar->workqueue); 3653 err_free_mac: 3654 ath10k_mac_destroy(ar); 3655 3656 return NULL; 3657 } 3658 EXPORT_SYMBOL(ath10k_core_create); 3659 3660 void ath10k_core_destroy(struct ath10k *ar) 3661 { 3662 destroy_workqueue(ar->workqueue); 3663 3664 destroy_workqueue(ar->workqueue_aux); 3665 3666 destroy_workqueue(ar->workqueue_tx_complete); 3667 3668 ath10k_debug_destroy(ar); 3669 ath10k_coredump_destroy(ar); 3670 ath10k_htt_tx_destroy(&ar->htt); 3671 ath10k_wmi_free_host_mem(ar); 3672 ath10k_mac_destroy(ar); 3673 } 3674 EXPORT_SYMBOL(ath10k_core_destroy); 3675 3676 MODULE_AUTHOR("Qualcomm Atheros"); 3677 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards."); 3678 MODULE_LICENSE("Dual BSD/GPL"); 3679