1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include <linux/module.h> 19 #include <linux/firmware.h> 20 #include <linux/of.h> 21 #include <linux/dmi.h> 22 #include <linux/ctype.h> 23 #include <asm/byteorder.h> 24 25 #include "core.h" 26 #include "mac.h" 27 #include "htc.h" 28 #include "hif.h" 29 #include "wmi.h" 30 #include "bmi.h" 31 #include "debug.h" 32 #include "htt.h" 33 #include "testmode.h" 34 #include "wmi-ops.h" 35 36 unsigned int ath10k_debug_mask; 37 static unsigned int ath10k_cryptmode_param; 38 static bool uart_print; 39 static bool skip_otp; 40 static bool rawmode; 41 42 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 43 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 44 module_param(uart_print, bool, 0644); 45 module_param(skip_otp, bool, 0644); 46 module_param(rawmode, bool, 0644); 47 48 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 49 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 50 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 51 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 52 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); 53 54 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 55 { 56 .id = QCA988X_HW_2_0_VERSION, 57 .dev_id = QCA988X_2_0_DEVICE_ID, 58 .name = "qca988x hw2.0", 59 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 60 .uart_pin = 7, 61 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 62 .otp_exe_param = 0, 63 .channel_counters_freq_hz = 88000, 64 .max_probe_resp_desc_thres = 0, 65 .cal_data_len = 2116, 66 .fw = { 67 .dir = QCA988X_HW_2_0_FW_DIR, 68 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 69 .board_size = QCA988X_BOARD_DATA_SZ, 70 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 71 }, 72 .hw_ops = &qca988x_ops, 73 .decap_align_bytes = 4, 74 .spectral_bin_discard = 0, 75 .vht160_mcs_rx_highest = 0, 76 .vht160_mcs_tx_highest = 0, 77 .n_cipher_suites = 8, 78 .num_peers = TARGET_TLV_NUM_PEERS, 79 .ast_skid_limit = 0x10, 80 .num_wds_entries = 0x20, 81 .target_64bit = false, 82 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 83 }, 84 { 85 .id = QCA9887_HW_1_0_VERSION, 86 .dev_id = QCA9887_1_0_DEVICE_ID, 87 .name = "qca9887 hw1.0", 88 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR, 89 .uart_pin = 7, 90 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 91 .otp_exe_param = 0, 92 .channel_counters_freq_hz = 88000, 93 .max_probe_resp_desc_thres = 0, 94 .cal_data_len = 2116, 95 .fw = { 96 .dir = QCA9887_HW_1_0_FW_DIR, 97 .board = QCA9887_HW_1_0_BOARD_DATA_FILE, 98 .board_size = QCA9887_BOARD_DATA_SZ, 99 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ, 100 }, 101 .hw_ops = &qca988x_ops, 102 .decap_align_bytes = 4, 103 .spectral_bin_discard = 0, 104 .vht160_mcs_rx_highest = 0, 105 .vht160_mcs_tx_highest = 0, 106 .n_cipher_suites = 8, 107 .num_peers = TARGET_TLV_NUM_PEERS, 108 .ast_skid_limit = 0x10, 109 .num_wds_entries = 0x20, 110 .target_64bit = false, 111 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 112 }, 113 { 114 .id = QCA6174_HW_2_1_VERSION, 115 .dev_id = QCA6164_2_1_DEVICE_ID, 116 .name = "qca6164 hw2.1", 117 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 118 .uart_pin = 6, 119 .otp_exe_param = 0, 120 .channel_counters_freq_hz = 88000, 121 .max_probe_resp_desc_thres = 0, 122 .cal_data_len = 8124, 123 .fw = { 124 .dir = QCA6174_HW_2_1_FW_DIR, 125 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 126 .board_size = QCA6174_BOARD_DATA_SZ, 127 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 128 }, 129 .hw_ops = &qca988x_ops, 130 .decap_align_bytes = 4, 131 .spectral_bin_discard = 0, 132 .vht160_mcs_rx_highest = 0, 133 .vht160_mcs_tx_highest = 0, 134 .n_cipher_suites = 8, 135 .num_peers = TARGET_TLV_NUM_PEERS, 136 .ast_skid_limit = 0x10, 137 .num_wds_entries = 0x20, 138 .target_64bit = false, 139 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 140 }, 141 { 142 .id = QCA6174_HW_2_1_VERSION, 143 .dev_id = QCA6174_2_1_DEVICE_ID, 144 .name = "qca6174 hw2.1", 145 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 146 .uart_pin = 6, 147 .otp_exe_param = 0, 148 .channel_counters_freq_hz = 88000, 149 .max_probe_resp_desc_thres = 0, 150 .cal_data_len = 8124, 151 .fw = { 152 .dir = QCA6174_HW_2_1_FW_DIR, 153 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 154 .board_size = QCA6174_BOARD_DATA_SZ, 155 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 156 }, 157 .hw_ops = &qca988x_ops, 158 .decap_align_bytes = 4, 159 .spectral_bin_discard = 0, 160 .vht160_mcs_rx_highest = 0, 161 .vht160_mcs_tx_highest = 0, 162 .n_cipher_suites = 8, 163 .num_peers = TARGET_TLV_NUM_PEERS, 164 .ast_skid_limit = 0x10, 165 .num_wds_entries = 0x20, 166 .target_64bit = false, 167 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 168 }, 169 { 170 .id = QCA6174_HW_3_0_VERSION, 171 .dev_id = QCA6174_2_1_DEVICE_ID, 172 .name = "qca6174 hw3.0", 173 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 174 .uart_pin = 6, 175 .otp_exe_param = 0, 176 .channel_counters_freq_hz = 88000, 177 .max_probe_resp_desc_thres = 0, 178 .cal_data_len = 8124, 179 .fw = { 180 .dir = QCA6174_HW_3_0_FW_DIR, 181 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 182 .board_size = QCA6174_BOARD_DATA_SZ, 183 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 184 }, 185 .hw_ops = &qca988x_ops, 186 .decap_align_bytes = 4, 187 .spectral_bin_discard = 0, 188 .vht160_mcs_rx_highest = 0, 189 .vht160_mcs_tx_highest = 0, 190 .n_cipher_suites = 8, 191 .num_peers = TARGET_TLV_NUM_PEERS, 192 .ast_skid_limit = 0x10, 193 .num_wds_entries = 0x20, 194 .target_64bit = false, 195 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 196 }, 197 { 198 .id = QCA6174_HW_3_2_VERSION, 199 .dev_id = QCA6174_2_1_DEVICE_ID, 200 .name = "qca6174 hw3.2", 201 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 202 .uart_pin = 6, 203 .otp_exe_param = 0, 204 .channel_counters_freq_hz = 88000, 205 .max_probe_resp_desc_thres = 0, 206 .cal_data_len = 8124, 207 .fw = { 208 /* uses same binaries as hw3.0 */ 209 .dir = QCA6174_HW_3_0_FW_DIR, 210 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 211 .board_size = QCA6174_BOARD_DATA_SZ, 212 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 213 }, 214 .hw_ops = &qca6174_ops, 215 .hw_clk = qca6174_clk, 216 .target_cpu_freq = 176000000, 217 .decap_align_bytes = 4, 218 .spectral_bin_discard = 0, 219 .vht160_mcs_rx_highest = 0, 220 .vht160_mcs_tx_highest = 0, 221 .n_cipher_suites = 8, 222 .num_peers = TARGET_TLV_NUM_PEERS, 223 .ast_skid_limit = 0x10, 224 .num_wds_entries = 0x20, 225 .target_64bit = false, 226 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 227 }, 228 { 229 .id = QCA99X0_HW_2_0_DEV_VERSION, 230 .dev_id = QCA99X0_2_0_DEVICE_ID, 231 .name = "qca99x0 hw2.0", 232 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 233 .uart_pin = 7, 234 .otp_exe_param = 0x00000700, 235 .continuous_frag_desc = true, 236 .cck_rate_map_rev2 = true, 237 .channel_counters_freq_hz = 150000, 238 .max_probe_resp_desc_thres = 24, 239 .tx_chain_mask = 0xf, 240 .rx_chain_mask = 0xf, 241 .max_spatial_stream = 4, 242 .cal_data_len = 12064, 243 .fw = { 244 .dir = QCA99X0_HW_2_0_FW_DIR, 245 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 246 .board_size = QCA99X0_BOARD_DATA_SZ, 247 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 248 }, 249 .sw_decrypt_mcast_mgmt = true, 250 .hw_ops = &qca99x0_ops, 251 .decap_align_bytes = 1, 252 .spectral_bin_discard = 4, 253 .vht160_mcs_rx_highest = 0, 254 .vht160_mcs_tx_highest = 0, 255 .n_cipher_suites = 11, 256 .num_peers = TARGET_TLV_NUM_PEERS, 257 .ast_skid_limit = 0x10, 258 .num_wds_entries = 0x20, 259 .target_64bit = false, 260 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 261 }, 262 { 263 .id = QCA9984_HW_1_0_DEV_VERSION, 264 .dev_id = QCA9984_1_0_DEVICE_ID, 265 .name = "qca9984/qca9994 hw1.0", 266 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR, 267 .uart_pin = 7, 268 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 269 .otp_exe_param = 0x00000700, 270 .continuous_frag_desc = true, 271 .cck_rate_map_rev2 = true, 272 .channel_counters_freq_hz = 150000, 273 .max_probe_resp_desc_thres = 24, 274 .tx_chain_mask = 0xf, 275 .rx_chain_mask = 0xf, 276 .max_spatial_stream = 4, 277 .cal_data_len = 12064, 278 .fw = { 279 .dir = QCA9984_HW_1_0_FW_DIR, 280 .board = QCA9984_HW_1_0_BOARD_DATA_FILE, 281 .board_size = QCA99X0_BOARD_DATA_SZ, 282 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 283 }, 284 .sw_decrypt_mcast_mgmt = true, 285 .hw_ops = &qca99x0_ops, 286 .decap_align_bytes = 1, 287 .spectral_bin_discard = 12, 288 289 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz 290 * or 2x2 160Mhz, long-guard-interval. 291 */ 292 .vht160_mcs_rx_highest = 1560, 293 .vht160_mcs_tx_highest = 1560, 294 .n_cipher_suites = 11, 295 .num_peers = TARGET_TLV_NUM_PEERS, 296 .ast_skid_limit = 0x10, 297 .num_wds_entries = 0x20, 298 .target_64bit = false, 299 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 300 }, 301 { 302 .id = QCA9888_HW_2_0_DEV_VERSION, 303 .dev_id = QCA9888_2_0_DEVICE_ID, 304 .name = "qca9888 hw2.0", 305 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR, 306 .uart_pin = 7, 307 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 308 .otp_exe_param = 0x00000700, 309 .continuous_frag_desc = true, 310 .channel_counters_freq_hz = 150000, 311 .max_probe_resp_desc_thres = 24, 312 .tx_chain_mask = 3, 313 .rx_chain_mask = 3, 314 .max_spatial_stream = 2, 315 .cal_data_len = 12064, 316 .fw = { 317 .dir = QCA9888_HW_2_0_FW_DIR, 318 .board = QCA9888_HW_2_0_BOARD_DATA_FILE, 319 .board_size = QCA99X0_BOARD_DATA_SZ, 320 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 321 }, 322 .sw_decrypt_mcast_mgmt = true, 323 .hw_ops = &qca99x0_ops, 324 .decap_align_bytes = 1, 325 .spectral_bin_discard = 12, 326 327 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or 328 * 1x1 160Mhz, long-guard-interval. 329 */ 330 .vht160_mcs_rx_highest = 780, 331 .vht160_mcs_tx_highest = 780, 332 .n_cipher_suites = 11, 333 .num_peers = TARGET_TLV_NUM_PEERS, 334 .ast_skid_limit = 0x10, 335 .num_wds_entries = 0x20, 336 .target_64bit = false, 337 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 338 }, 339 { 340 .id = QCA9377_HW_1_0_DEV_VERSION, 341 .dev_id = QCA9377_1_0_DEVICE_ID, 342 .name = "qca9377 hw1.0", 343 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 344 .uart_pin = 6, 345 .otp_exe_param = 0, 346 .channel_counters_freq_hz = 88000, 347 .max_probe_resp_desc_thres = 0, 348 .cal_data_len = 8124, 349 .fw = { 350 .dir = QCA9377_HW_1_0_FW_DIR, 351 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 352 .board_size = QCA9377_BOARD_DATA_SZ, 353 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 354 }, 355 .hw_ops = &qca988x_ops, 356 .decap_align_bytes = 4, 357 .spectral_bin_discard = 0, 358 .vht160_mcs_rx_highest = 0, 359 .vht160_mcs_tx_highest = 0, 360 .n_cipher_suites = 8, 361 .num_peers = TARGET_TLV_NUM_PEERS, 362 .ast_skid_limit = 0x10, 363 .num_wds_entries = 0x20, 364 .target_64bit = false, 365 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 366 }, 367 { 368 .id = QCA9377_HW_1_1_DEV_VERSION, 369 .dev_id = QCA9377_1_0_DEVICE_ID, 370 .name = "qca9377 hw1.1", 371 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 372 .uart_pin = 6, 373 .otp_exe_param = 0, 374 .channel_counters_freq_hz = 88000, 375 .max_probe_resp_desc_thres = 0, 376 .cal_data_len = 8124, 377 .fw = { 378 .dir = QCA9377_HW_1_0_FW_DIR, 379 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 380 .board_size = QCA9377_BOARD_DATA_SZ, 381 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 382 }, 383 .hw_ops = &qca6174_ops, 384 .hw_clk = qca6174_clk, 385 .target_cpu_freq = 176000000, 386 .decap_align_bytes = 4, 387 .spectral_bin_discard = 0, 388 .vht160_mcs_rx_highest = 0, 389 .vht160_mcs_tx_highest = 0, 390 .n_cipher_suites = 8, 391 .num_peers = TARGET_TLV_NUM_PEERS, 392 .ast_skid_limit = 0x10, 393 .num_wds_entries = 0x20, 394 .target_64bit = false, 395 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 396 }, 397 { 398 .id = QCA4019_HW_1_0_DEV_VERSION, 399 .dev_id = 0, 400 .name = "qca4019 hw1.0", 401 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR, 402 .uart_pin = 7, 403 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 404 .otp_exe_param = 0x0010000, 405 .continuous_frag_desc = true, 406 .cck_rate_map_rev2 = true, 407 .channel_counters_freq_hz = 125000, 408 .max_probe_resp_desc_thres = 24, 409 .tx_chain_mask = 0x3, 410 .rx_chain_mask = 0x3, 411 .max_spatial_stream = 2, 412 .cal_data_len = 12064, 413 .fw = { 414 .dir = QCA4019_HW_1_0_FW_DIR, 415 .board = QCA4019_HW_1_0_BOARD_DATA_FILE, 416 .board_size = QCA4019_BOARD_DATA_SZ, 417 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, 418 }, 419 .sw_decrypt_mcast_mgmt = true, 420 .hw_ops = &qca99x0_ops, 421 .decap_align_bytes = 1, 422 .spectral_bin_discard = 4, 423 .vht160_mcs_rx_highest = 0, 424 .vht160_mcs_tx_highest = 0, 425 .n_cipher_suites = 11, 426 .num_peers = TARGET_TLV_NUM_PEERS, 427 .ast_skid_limit = 0x10, 428 .num_wds_entries = 0x20, 429 .target_64bit = false, 430 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 431 }, 432 { 433 .id = WCN3990_HW_1_0_DEV_VERSION, 434 .dev_id = 0, 435 .name = "wcn3990 hw1.0", 436 .continuous_frag_desc = true, 437 .tx_chain_mask = 0x7, 438 .rx_chain_mask = 0x7, 439 .max_spatial_stream = 4, 440 .fw = { 441 .dir = WCN3990_HW_1_0_FW_DIR, 442 }, 443 .sw_decrypt_mcast_mgmt = true, 444 .hw_ops = &wcn3990_ops, 445 .decap_align_bytes = 1, 446 .num_peers = TARGET_HL_10_TLV_NUM_PEERS, 447 .ast_skid_limit = TARGET_HL_10_TLV_AST_SKID_LIMIT, 448 .num_wds_entries = TARGET_HL_10_TLV_NUM_WDS_ENTRIES, 449 .target_64bit = true, 450 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC, 451 }, 452 }; 453 454 static const char *const ath10k_core_fw_feature_str[] = { 455 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 456 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 457 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 458 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 459 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 460 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 461 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 462 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 463 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 464 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 465 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 466 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 467 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", 468 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl", 469 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param", 470 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war", 471 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast", 472 [ATH10K_FW_FEATURE_NO_PS] = "no-ps", 473 [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference", 474 }; 475 476 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 477 size_t buf_len, 478 enum ath10k_fw_features feat) 479 { 480 /* make sure that ath10k_core_fw_feature_str[] gets updated */ 481 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != 482 ATH10K_FW_FEATURE_COUNT); 483 484 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 485 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 486 return scnprintf(buf, buf_len, "bit%d", feat); 487 } 488 489 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 490 } 491 492 void ath10k_core_get_fw_features_str(struct ath10k *ar, 493 char *buf, 494 size_t buf_len) 495 { 496 size_t len = 0; 497 int i; 498 499 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 500 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) { 501 if (len > 0) 502 len += scnprintf(buf + len, buf_len - len, ","); 503 504 len += ath10k_core_get_fw_feature_str(buf + len, 505 buf_len - len, 506 i); 507 } 508 } 509 } 510 511 static void ath10k_send_suspend_complete(struct ath10k *ar) 512 { 513 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 514 515 complete(&ar->target_suspend); 516 } 517 518 static void ath10k_init_sdio(struct ath10k *ar) 519 { 520 u32 param = 0; 521 522 ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256); 523 ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99); 524 ath10k_bmi_read32(ar, hi_acs_flags, ¶m); 525 526 param |= (HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET | 527 HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET | 528 HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE); 529 530 ath10k_bmi_write32(ar, hi_acs_flags, param); 531 } 532 533 static int ath10k_init_configure_target(struct ath10k *ar) 534 { 535 u32 param_host; 536 int ret; 537 538 /* tell target which HTC version it is used*/ 539 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 540 HTC_PROTOCOL_VERSION); 541 if (ret) { 542 ath10k_err(ar, "settings HTC version failed\n"); 543 return ret; 544 } 545 546 /* set the firmware mode to STA/IBSS/AP */ 547 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 548 if (ret) { 549 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 550 return ret; 551 } 552 553 /* TODO following parameters need to be re-visited. */ 554 /* num_device */ 555 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 556 /* Firmware mode */ 557 /* FIXME: Why FW_MODE_AP ??.*/ 558 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 559 /* mac_addr_method */ 560 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 561 /* firmware_bridge */ 562 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 563 /* fwsubmode */ 564 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 565 566 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 567 if (ret) { 568 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 569 return ret; 570 } 571 572 /* We do all byte-swapping on the host */ 573 ret = ath10k_bmi_write32(ar, hi_be, 0); 574 if (ret) { 575 ath10k_err(ar, "setting host CPU BE mode failed\n"); 576 return ret; 577 } 578 579 /* FW descriptor/Data swap flags */ 580 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 581 582 if (ret) { 583 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 584 return ret; 585 } 586 587 /* Some devices have a special sanity check that verifies the PCI 588 * Device ID is written to this host interest var. It is known to be 589 * required to boot QCA6164. 590 */ 591 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 592 ar->dev_id); 593 if (ret) { 594 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 595 return ret; 596 } 597 598 return 0; 599 } 600 601 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 602 const char *dir, 603 const char *file) 604 { 605 char filename[100]; 606 const struct firmware *fw; 607 int ret; 608 609 if (file == NULL) 610 return ERR_PTR(-ENOENT); 611 612 if (dir == NULL) 613 dir = "."; 614 615 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 616 ret = request_firmware(&fw, filename, ar->dev); 617 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n", 618 filename, ret); 619 620 if (ret) 621 return ERR_PTR(ret); 622 623 return fw; 624 } 625 626 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 627 size_t data_len) 628 { 629 u32 board_data_size = ar->hw_params.fw.board_size; 630 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 631 u32 board_ext_data_addr; 632 int ret; 633 634 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 635 if (ret) { 636 ath10k_err(ar, "could not read board ext data addr (%d)\n", 637 ret); 638 return ret; 639 } 640 641 ath10k_dbg(ar, ATH10K_DBG_BOOT, 642 "boot push board extended data addr 0x%x\n", 643 board_ext_data_addr); 644 645 if (board_ext_data_addr == 0) 646 return 0; 647 648 if (data_len != (board_data_size + board_ext_data_size)) { 649 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 650 data_len, board_data_size, board_ext_data_size); 651 return -EINVAL; 652 } 653 654 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 655 data + board_data_size, 656 board_ext_data_size); 657 if (ret) { 658 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 659 return ret; 660 } 661 662 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 663 (board_ext_data_size << 16) | 1); 664 if (ret) { 665 ath10k_err(ar, "could not write board ext data bit (%d)\n", 666 ret); 667 return ret; 668 } 669 670 return 0; 671 } 672 673 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 674 size_t data_len) 675 { 676 u32 board_data_size = ar->hw_params.fw.board_size; 677 u32 address; 678 int ret; 679 680 ret = ath10k_push_board_ext_data(ar, data, data_len); 681 if (ret) { 682 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 683 goto exit; 684 } 685 686 ret = ath10k_bmi_read32(ar, hi_board_data, &address); 687 if (ret) { 688 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 689 goto exit; 690 } 691 692 ret = ath10k_bmi_write_memory(ar, address, data, 693 min_t(u32, board_data_size, 694 data_len)); 695 if (ret) { 696 ath10k_err(ar, "could not write board data (%d)\n", ret); 697 goto exit; 698 } 699 700 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 701 if (ret) { 702 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 703 goto exit; 704 } 705 706 exit: 707 return ret; 708 } 709 710 static int ath10k_download_cal_file(struct ath10k *ar, 711 const struct firmware *file) 712 { 713 int ret; 714 715 if (!file) 716 return -ENOENT; 717 718 if (IS_ERR(file)) 719 return PTR_ERR(file); 720 721 ret = ath10k_download_board_data(ar, file->data, file->size); 722 if (ret) { 723 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 724 return ret; 725 } 726 727 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 728 729 return 0; 730 } 731 732 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name) 733 { 734 struct device_node *node; 735 int data_len; 736 void *data; 737 int ret; 738 739 node = ar->dev->of_node; 740 if (!node) 741 /* Device Tree is optional, don't print any warnings if 742 * there's no node for ath10k. 743 */ 744 return -ENOENT; 745 746 if (!of_get_property(node, dt_name, &data_len)) { 747 /* The calibration data node is optional */ 748 return -ENOENT; 749 } 750 751 if (data_len != ar->hw_params.cal_data_len) { 752 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 753 data_len); 754 ret = -EMSGSIZE; 755 goto out; 756 } 757 758 data = kmalloc(data_len, GFP_KERNEL); 759 if (!data) { 760 ret = -ENOMEM; 761 goto out; 762 } 763 764 ret = of_property_read_u8_array(node, dt_name, data, data_len); 765 if (ret) { 766 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 767 ret); 768 goto out_free; 769 } 770 771 ret = ath10k_download_board_data(ar, data, data_len); 772 if (ret) { 773 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 774 ret); 775 goto out_free; 776 } 777 778 ret = 0; 779 780 out_free: 781 kfree(data); 782 783 out: 784 return ret; 785 } 786 787 static int ath10k_download_cal_eeprom(struct ath10k *ar) 788 { 789 size_t data_len; 790 void *data = NULL; 791 int ret; 792 793 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len); 794 if (ret) { 795 if (ret != -EOPNOTSUPP) 796 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n", 797 ret); 798 goto out_free; 799 } 800 801 ret = ath10k_download_board_data(ar, data, data_len); 802 if (ret) { 803 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n", 804 ret); 805 goto out_free; 806 } 807 808 ret = 0; 809 810 out_free: 811 kfree(data); 812 813 return ret; 814 } 815 816 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) 817 { 818 u32 result, address; 819 u8 board_id, chip_id; 820 int ret, bmi_board_id_param; 821 822 address = ar->hw_params.patch_load_addr; 823 824 if (!ar->normal_mode_fw.fw_file.otp_data || 825 !ar->normal_mode_fw.fw_file.otp_len) { 826 ath10k_warn(ar, 827 "failed to retrieve board id because of invalid otp\n"); 828 return -ENODATA; 829 } 830 831 ath10k_dbg(ar, ATH10K_DBG_BOOT, 832 "boot upload otp to 0x%x len %zd for board id\n", 833 address, ar->normal_mode_fw.fw_file.otp_len); 834 835 ret = ath10k_bmi_fast_download(ar, address, 836 ar->normal_mode_fw.fw_file.otp_data, 837 ar->normal_mode_fw.fw_file.otp_len); 838 if (ret) { 839 ath10k_err(ar, "could not write otp for board id check: %d\n", 840 ret); 841 return ret; 842 } 843 844 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 845 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 846 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID; 847 else 848 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID; 849 850 ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result); 851 if (ret) { 852 ath10k_err(ar, "could not execute otp for board id check: %d\n", 853 ret); 854 return ret; 855 } 856 857 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); 858 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); 859 860 ath10k_dbg(ar, ATH10K_DBG_BOOT, 861 "boot get otp board id result 0x%08x board_id %d chip_id %d\n", 862 result, board_id, chip_id); 863 864 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 || 865 (board_id == 0)) { 866 ath10k_dbg(ar, ATH10K_DBG_BOOT, 867 "board id does not exist in otp, ignore it\n"); 868 return -EOPNOTSUPP; 869 } 870 871 ar->id.bmi_ids_valid = true; 872 ar->id.bmi_board_id = board_id; 873 ar->id.bmi_chip_id = chip_id; 874 875 return 0; 876 } 877 878 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data) 879 { 880 struct ath10k *ar = data; 881 const char *bdf_ext; 882 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC; 883 u8 bdf_enabled; 884 int i; 885 886 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE) 887 return; 888 889 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) { 890 ath10k_dbg(ar, ATH10K_DBG_BOOT, 891 "wrong smbios bdf ext type length (%d).\n", 892 hdr->length); 893 return; 894 } 895 896 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET); 897 if (!bdf_enabled) { 898 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n"); 899 return; 900 } 901 902 /* Only one string exists (per spec) */ 903 bdf_ext = (char *)hdr + hdr->length; 904 905 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) { 906 ath10k_dbg(ar, ATH10K_DBG_BOOT, 907 "bdf variant magic does not match.\n"); 908 return; 909 } 910 911 for (i = 0; i < strlen(bdf_ext); i++) { 912 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) { 913 ath10k_dbg(ar, ATH10K_DBG_BOOT, 914 "bdf variant name contains non ascii chars.\n"); 915 return; 916 } 917 } 918 919 /* Copy extension name without magic suffix */ 920 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic), 921 sizeof(ar->id.bdf_ext)) < 0) { 922 ath10k_dbg(ar, ATH10K_DBG_BOOT, 923 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 924 bdf_ext); 925 return; 926 } 927 928 ath10k_dbg(ar, ATH10K_DBG_BOOT, 929 "found and validated bdf variant smbios_type 0x%x bdf %s\n", 930 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext); 931 } 932 933 static int ath10k_core_check_smbios(struct ath10k *ar) 934 { 935 ar->id.bdf_ext[0] = '\0'; 936 dmi_walk(ath10k_core_check_bdfext, ar); 937 938 if (ar->id.bdf_ext[0] == '\0') 939 return -ENODATA; 940 941 return 0; 942 } 943 944 static int ath10k_core_check_dt(struct ath10k *ar) 945 { 946 struct device_node *node; 947 const char *variant = NULL; 948 949 node = ar->dev->of_node; 950 if (!node) 951 return -ENOENT; 952 953 of_property_read_string(node, "qcom,ath10k-calibration-variant", 954 &variant); 955 if (!variant) 956 return -ENODATA; 957 958 if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0) 959 ath10k_dbg(ar, ATH10K_DBG_BOOT, 960 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 961 variant); 962 963 return 0; 964 } 965 966 static int ath10k_download_and_run_otp(struct ath10k *ar) 967 { 968 u32 result, address = ar->hw_params.patch_load_addr; 969 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 970 int ret; 971 972 ret = ath10k_download_board_data(ar, 973 ar->running_fw->board_data, 974 ar->running_fw->board_len); 975 if (ret) { 976 ath10k_err(ar, "failed to download board data: %d\n", ret); 977 return ret; 978 } 979 980 /* OTP is optional */ 981 982 if (!ar->running_fw->fw_file.otp_data || 983 !ar->running_fw->fw_file.otp_len) { 984 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n", 985 ar->running_fw->fw_file.otp_data, 986 ar->running_fw->fw_file.otp_len); 987 return 0; 988 } 989 990 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 991 address, ar->running_fw->fw_file.otp_len); 992 993 ret = ath10k_bmi_fast_download(ar, address, 994 ar->running_fw->fw_file.otp_data, 995 ar->running_fw->fw_file.otp_len); 996 if (ret) { 997 ath10k_err(ar, "could not write otp (%d)\n", ret); 998 return ret; 999 } 1000 1001 /* As of now pre-cal is valid for 10_4 variants */ 1002 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 1003 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 1004 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL; 1005 1006 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 1007 if (ret) { 1008 ath10k_err(ar, "could not execute otp (%d)\n", ret); 1009 return ret; 1010 } 1011 1012 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 1013 1014 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 1015 ar->running_fw->fw_file.fw_features)) && 1016 result != 0) { 1017 ath10k_err(ar, "otp calibration failed: %d", result); 1018 return -EINVAL; 1019 } 1020 1021 return 0; 1022 } 1023 1024 static int ath10k_download_fw(struct ath10k *ar) 1025 { 1026 u32 address, data_len; 1027 const void *data; 1028 int ret; 1029 1030 address = ar->hw_params.patch_load_addr; 1031 1032 data = ar->running_fw->fw_file.firmware_data; 1033 data_len = ar->running_fw->fw_file.firmware_len; 1034 1035 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file); 1036 if (ret) { 1037 ath10k_err(ar, "failed to configure fw code swap: %d\n", 1038 ret); 1039 return ret; 1040 } 1041 1042 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1043 "boot uploading firmware image %pK len %d\n", 1044 data, data_len); 1045 1046 ret = ath10k_bmi_fast_download(ar, address, data, data_len); 1047 if (ret) { 1048 ath10k_err(ar, "failed to download firmware: %d\n", 1049 ret); 1050 return ret; 1051 } 1052 1053 return ret; 1054 } 1055 1056 static void ath10k_core_free_board_files(struct ath10k *ar) 1057 { 1058 if (!IS_ERR(ar->normal_mode_fw.board)) 1059 release_firmware(ar->normal_mode_fw.board); 1060 1061 ar->normal_mode_fw.board = NULL; 1062 ar->normal_mode_fw.board_data = NULL; 1063 ar->normal_mode_fw.board_len = 0; 1064 } 1065 1066 static void ath10k_core_free_firmware_files(struct ath10k *ar) 1067 { 1068 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware)) 1069 release_firmware(ar->normal_mode_fw.fw_file.firmware); 1070 1071 if (!IS_ERR(ar->cal_file)) 1072 release_firmware(ar->cal_file); 1073 1074 if (!IS_ERR(ar->pre_cal_file)) 1075 release_firmware(ar->pre_cal_file); 1076 1077 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file); 1078 1079 ar->normal_mode_fw.fw_file.otp_data = NULL; 1080 ar->normal_mode_fw.fw_file.otp_len = 0; 1081 1082 ar->normal_mode_fw.fw_file.firmware = NULL; 1083 ar->normal_mode_fw.fw_file.firmware_data = NULL; 1084 ar->normal_mode_fw.fw_file.firmware_len = 0; 1085 1086 ar->cal_file = NULL; 1087 ar->pre_cal_file = NULL; 1088 } 1089 1090 static int ath10k_fetch_cal_file(struct ath10k *ar) 1091 { 1092 char filename[100]; 1093 1094 /* pre-cal-<bus>-<id>.bin */ 1095 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin", 1096 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1097 1098 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1099 if (!IS_ERR(ar->pre_cal_file)) 1100 goto success; 1101 1102 /* cal-<bus>-<id>.bin */ 1103 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 1104 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1105 1106 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1107 if (IS_ERR(ar->cal_file)) 1108 /* calibration file is optional, don't print any warnings */ 1109 return PTR_ERR(ar->cal_file); 1110 success: 1111 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 1112 ATH10K_FW_DIR, filename); 1113 1114 return 0; 1115 } 1116 1117 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar) 1118 { 1119 if (!ar->hw_params.fw.board) { 1120 ath10k_err(ar, "failed to find board file fw entry\n"); 1121 return -EINVAL; 1122 } 1123 1124 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1125 ar->hw_params.fw.dir, 1126 ar->hw_params.fw.board); 1127 if (IS_ERR(ar->normal_mode_fw.board)) 1128 return PTR_ERR(ar->normal_mode_fw.board); 1129 1130 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data; 1131 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size; 1132 1133 return 0; 1134 } 1135 1136 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, 1137 const void *buf, size_t buf_len, 1138 const char *boardname) 1139 { 1140 const struct ath10k_fw_ie *hdr; 1141 bool name_match_found; 1142 int ret, board_ie_id; 1143 size_t board_ie_len; 1144 const void *board_ie_data; 1145 1146 name_match_found = false; 1147 1148 /* go through ATH10K_BD_IE_BOARD_ elements */ 1149 while (buf_len > sizeof(struct ath10k_fw_ie)) { 1150 hdr = buf; 1151 board_ie_id = le32_to_cpu(hdr->id); 1152 board_ie_len = le32_to_cpu(hdr->len); 1153 board_ie_data = hdr->data; 1154 1155 buf_len -= sizeof(*hdr); 1156 buf += sizeof(*hdr); 1157 1158 if (buf_len < ALIGN(board_ie_len, 4)) { 1159 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", 1160 buf_len, ALIGN(board_ie_len, 4)); 1161 ret = -EINVAL; 1162 goto out; 1163 } 1164 1165 switch (board_ie_id) { 1166 case ATH10K_BD_IE_BOARD_NAME: 1167 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", 1168 board_ie_data, board_ie_len); 1169 1170 if (board_ie_len != strlen(boardname)) 1171 break; 1172 1173 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 1174 if (ret) 1175 break; 1176 1177 name_match_found = true; 1178 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1179 "boot found match for name '%s'", 1180 boardname); 1181 break; 1182 case ATH10K_BD_IE_BOARD_DATA: 1183 if (!name_match_found) 1184 /* no match found */ 1185 break; 1186 1187 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1188 "boot found board data for '%s'", 1189 boardname); 1190 1191 ar->normal_mode_fw.board_data = board_ie_data; 1192 ar->normal_mode_fw.board_len = board_ie_len; 1193 1194 ret = 0; 1195 goto out; 1196 default: 1197 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", 1198 board_ie_id); 1199 break; 1200 } 1201 1202 /* jump over the padding */ 1203 board_ie_len = ALIGN(board_ie_len, 4); 1204 1205 buf_len -= board_ie_len; 1206 buf += board_ie_len; 1207 } 1208 1209 /* no match found */ 1210 ret = -ENOENT; 1211 1212 out: 1213 return ret; 1214 } 1215 1216 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, 1217 const char *boardname, 1218 const char *filename) 1219 { 1220 size_t len, magic_len, ie_len; 1221 struct ath10k_fw_ie *hdr; 1222 const u8 *data; 1223 int ret, ie_id; 1224 1225 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1226 ar->hw_params.fw.dir, 1227 filename); 1228 if (IS_ERR(ar->normal_mode_fw.board)) 1229 return PTR_ERR(ar->normal_mode_fw.board); 1230 1231 data = ar->normal_mode_fw.board->data; 1232 len = ar->normal_mode_fw.board->size; 1233 1234 /* magic has extra null byte padded */ 1235 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; 1236 if (len < magic_len) { 1237 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", 1238 ar->hw_params.fw.dir, filename, len); 1239 ret = -EINVAL; 1240 goto err; 1241 } 1242 1243 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { 1244 ath10k_err(ar, "found invalid board magic\n"); 1245 ret = -EINVAL; 1246 goto err; 1247 } 1248 1249 /* magic is padded to 4 bytes */ 1250 magic_len = ALIGN(magic_len, 4); 1251 if (len < magic_len) { 1252 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", 1253 ar->hw_params.fw.dir, filename, len); 1254 ret = -EINVAL; 1255 goto err; 1256 } 1257 1258 data += magic_len; 1259 len -= magic_len; 1260 1261 while (len > sizeof(struct ath10k_fw_ie)) { 1262 hdr = (struct ath10k_fw_ie *)data; 1263 ie_id = le32_to_cpu(hdr->id); 1264 ie_len = le32_to_cpu(hdr->len); 1265 1266 len -= sizeof(*hdr); 1267 data = hdr->data; 1268 1269 if (len < ALIGN(ie_len, 4)) { 1270 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", 1271 ie_id, ie_len, len); 1272 ret = -EINVAL; 1273 goto err; 1274 } 1275 1276 switch (ie_id) { 1277 case ATH10K_BD_IE_BOARD: 1278 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1279 boardname); 1280 if (ret == -ENOENT && ar->id.bdf_ext[0] != '\0') { 1281 /* try default bdf if variant was not found */ 1282 char *s, *v = ",variant="; 1283 char boardname2[100]; 1284 1285 strlcpy(boardname2, boardname, 1286 sizeof(boardname2)); 1287 1288 s = strstr(boardname2, v); 1289 if (s) 1290 *s = '\0'; /* strip ",variant=%s" */ 1291 1292 ret = ath10k_core_parse_bd_ie_board(ar, data, 1293 ie_len, 1294 boardname2); 1295 } 1296 1297 if (ret == -ENOENT) 1298 /* no match found, continue */ 1299 break; 1300 else if (ret) 1301 /* there was an error, bail out */ 1302 goto err; 1303 1304 /* board data found */ 1305 goto out; 1306 } 1307 1308 /* jump over the padding */ 1309 ie_len = ALIGN(ie_len, 4); 1310 1311 len -= ie_len; 1312 data += ie_len; 1313 } 1314 1315 out: 1316 if (!ar->normal_mode_fw.board_data || !ar->normal_mode_fw.board_len) { 1317 ath10k_err(ar, 1318 "failed to fetch board data for %s from %s/%s\n", 1319 boardname, ar->hw_params.fw.dir, filename); 1320 ret = -ENODATA; 1321 goto err; 1322 } 1323 1324 return 0; 1325 1326 err: 1327 ath10k_core_free_board_files(ar); 1328 return ret; 1329 } 1330 1331 static int ath10k_core_create_board_name(struct ath10k *ar, char *name, 1332 size_t name_len) 1333 { 1334 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */ 1335 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 }; 1336 1337 if (ar->id.bdf_ext[0] != '\0') 1338 scnprintf(variant, sizeof(variant), ",variant=%s", 1339 ar->id.bdf_ext); 1340 1341 if (ar->id.bmi_ids_valid) { 1342 scnprintf(name, name_len, 1343 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s", 1344 ath10k_bus_str(ar->hif.bus), 1345 ar->id.bmi_chip_id, 1346 ar->id.bmi_board_id, variant); 1347 goto out; 1348 } 1349 1350 scnprintf(name, name_len, 1351 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s", 1352 ath10k_bus_str(ar->hif.bus), 1353 ar->id.vendor, ar->id.device, 1354 ar->id.subsystem_vendor, ar->id.subsystem_device, variant); 1355 out: 1356 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); 1357 1358 return 0; 1359 } 1360 1361 static int ath10k_core_fetch_board_file(struct ath10k *ar) 1362 { 1363 char boardname[100]; 1364 int ret; 1365 1366 ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname)); 1367 if (ret) { 1368 ath10k_err(ar, "failed to create board name: %d", ret); 1369 return ret; 1370 } 1371 1372 ar->bd_api = 2; 1373 ret = ath10k_core_fetch_board_data_api_n(ar, boardname, 1374 ATH10K_BOARD_API2_FILE); 1375 if (!ret) 1376 goto success; 1377 1378 ar->bd_api = 1; 1379 ret = ath10k_core_fetch_board_data_api_1(ar); 1380 if (ret) { 1381 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n", 1382 ar->hw_params.fw.dir); 1383 return ret; 1384 } 1385 1386 success: 1387 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); 1388 return 0; 1389 } 1390 1391 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1392 struct ath10k_fw_file *fw_file) 1393 { 1394 size_t magic_len, len, ie_len; 1395 int ie_id, i, index, bit, ret; 1396 struct ath10k_fw_ie *hdr; 1397 const u8 *data; 1398 __le32 *timestamp, *version; 1399 1400 /* first fetch the firmware file (firmware-*.bin) */ 1401 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1402 name); 1403 if (IS_ERR(fw_file->firmware)) 1404 return PTR_ERR(fw_file->firmware); 1405 1406 data = fw_file->firmware->data; 1407 len = fw_file->firmware->size; 1408 1409 /* magic also includes the null byte, check that as well */ 1410 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 1411 1412 if (len < magic_len) { 1413 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 1414 ar->hw_params.fw.dir, name, len); 1415 ret = -EINVAL; 1416 goto err; 1417 } 1418 1419 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 1420 ath10k_err(ar, "invalid firmware magic\n"); 1421 ret = -EINVAL; 1422 goto err; 1423 } 1424 1425 /* jump over the padding */ 1426 magic_len = ALIGN(magic_len, 4); 1427 1428 len -= magic_len; 1429 data += magic_len; 1430 1431 /* loop elements */ 1432 while (len > sizeof(struct ath10k_fw_ie)) { 1433 hdr = (struct ath10k_fw_ie *)data; 1434 1435 ie_id = le32_to_cpu(hdr->id); 1436 ie_len = le32_to_cpu(hdr->len); 1437 1438 len -= sizeof(*hdr); 1439 data += sizeof(*hdr); 1440 1441 if (len < ie_len) { 1442 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 1443 ie_id, len, ie_len); 1444 ret = -EINVAL; 1445 goto err; 1446 } 1447 1448 switch (ie_id) { 1449 case ATH10K_FW_IE_FW_VERSION: 1450 if (ie_len > sizeof(fw_file->fw_version) - 1) 1451 break; 1452 1453 memcpy(fw_file->fw_version, data, ie_len); 1454 fw_file->fw_version[ie_len] = '\0'; 1455 1456 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1457 "found fw version %s\n", 1458 fw_file->fw_version); 1459 break; 1460 case ATH10K_FW_IE_TIMESTAMP: 1461 if (ie_len != sizeof(u32)) 1462 break; 1463 1464 timestamp = (__le32 *)data; 1465 1466 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 1467 le32_to_cpup(timestamp)); 1468 break; 1469 case ATH10K_FW_IE_FEATURES: 1470 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1471 "found firmware features ie (%zd B)\n", 1472 ie_len); 1473 1474 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 1475 index = i / 8; 1476 bit = i % 8; 1477 1478 if (index == ie_len) 1479 break; 1480 1481 if (data[index] & (1 << bit)) { 1482 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1483 "Enabling feature bit: %i\n", 1484 i); 1485 __set_bit(i, fw_file->fw_features); 1486 } 1487 } 1488 1489 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 1490 fw_file->fw_features, 1491 sizeof(fw_file->fw_features)); 1492 break; 1493 case ATH10K_FW_IE_FW_IMAGE: 1494 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1495 "found fw image ie (%zd B)\n", 1496 ie_len); 1497 1498 fw_file->firmware_data = data; 1499 fw_file->firmware_len = ie_len; 1500 1501 break; 1502 case ATH10K_FW_IE_OTP_IMAGE: 1503 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1504 "found otp image ie (%zd B)\n", 1505 ie_len); 1506 1507 fw_file->otp_data = data; 1508 fw_file->otp_len = ie_len; 1509 1510 break; 1511 case ATH10K_FW_IE_WMI_OP_VERSION: 1512 if (ie_len != sizeof(u32)) 1513 break; 1514 1515 version = (__le32 *)data; 1516 1517 fw_file->wmi_op_version = le32_to_cpup(version); 1518 1519 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 1520 fw_file->wmi_op_version); 1521 break; 1522 case ATH10K_FW_IE_HTT_OP_VERSION: 1523 if (ie_len != sizeof(u32)) 1524 break; 1525 1526 version = (__le32 *)data; 1527 1528 fw_file->htt_op_version = le32_to_cpup(version); 1529 1530 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 1531 fw_file->htt_op_version); 1532 break; 1533 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 1534 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1535 "found fw code swap image ie (%zd B)\n", 1536 ie_len); 1537 fw_file->codeswap_data = data; 1538 fw_file->codeswap_len = ie_len; 1539 break; 1540 default: 1541 ath10k_warn(ar, "Unknown FW IE: %u\n", 1542 le32_to_cpu(hdr->id)); 1543 break; 1544 } 1545 1546 /* jump over the padding */ 1547 ie_len = ALIGN(ie_len, 4); 1548 1549 len -= ie_len; 1550 data += ie_len; 1551 } 1552 1553 if (!fw_file->firmware_data || 1554 !fw_file->firmware_len) { 1555 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 1556 ar->hw_params.fw.dir, name); 1557 ret = -ENOMEDIUM; 1558 goto err; 1559 } 1560 1561 return 0; 1562 1563 err: 1564 ath10k_core_free_firmware_files(ar); 1565 return ret; 1566 } 1567 1568 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name, 1569 size_t fw_name_len, int fw_api) 1570 { 1571 switch (ar->hif.bus) { 1572 case ATH10K_BUS_SDIO: 1573 case ATH10K_BUS_USB: 1574 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin", 1575 ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus), 1576 fw_api); 1577 break; 1578 case ATH10K_BUS_PCI: 1579 case ATH10K_BUS_AHB: 1580 case ATH10K_BUS_SNOC: 1581 scnprintf(fw_name, fw_name_len, "%s-%d.bin", 1582 ATH10K_FW_FILE_BASE, fw_api); 1583 break; 1584 } 1585 } 1586 1587 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 1588 { 1589 int ret, i; 1590 char fw_name[100]; 1591 1592 /* calibration file is optional, don't check for any errors */ 1593 ath10k_fetch_cal_file(ar); 1594 1595 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) { 1596 ar->fw_api = i; 1597 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", 1598 ar->fw_api); 1599 1600 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api); 1601 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name, 1602 &ar->normal_mode_fw.fw_file); 1603 if (!ret) 1604 goto success; 1605 } 1606 1607 /* we end up here if we couldn't fetch any firmware */ 1608 1609 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d", 1610 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir, 1611 ret); 1612 1613 return ret; 1614 1615 success: 1616 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1617 1618 return 0; 1619 } 1620 1621 static int ath10k_core_pre_cal_download(struct ath10k *ar) 1622 { 1623 int ret; 1624 1625 ret = ath10k_download_cal_file(ar, ar->pre_cal_file); 1626 if (ret == 0) { 1627 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE; 1628 goto success; 1629 } 1630 1631 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1632 "boot did not find a pre calibration file, try DT next: %d\n", 1633 ret); 1634 1635 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data"); 1636 if (ret) { 1637 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1638 "unable to load pre cal data from DT: %d\n", ret); 1639 return ret; 1640 } 1641 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT; 1642 1643 success: 1644 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1645 ath10k_cal_mode_str(ar->cal_mode)); 1646 1647 return 0; 1648 } 1649 1650 static int ath10k_core_pre_cal_config(struct ath10k *ar) 1651 { 1652 int ret; 1653 1654 ret = ath10k_core_pre_cal_download(ar); 1655 if (ret) { 1656 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1657 "failed to load pre cal data: %d\n", ret); 1658 return ret; 1659 } 1660 1661 ret = ath10k_core_get_board_id_from_otp(ar); 1662 if (ret) { 1663 ath10k_err(ar, "failed to get board id: %d\n", ret); 1664 return ret; 1665 } 1666 1667 ret = ath10k_download_and_run_otp(ar); 1668 if (ret) { 1669 ath10k_err(ar, "failed to run otp: %d\n", ret); 1670 return ret; 1671 } 1672 1673 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1674 "pre cal configuration done successfully\n"); 1675 1676 return 0; 1677 } 1678 1679 static int ath10k_download_cal_data(struct ath10k *ar) 1680 { 1681 int ret; 1682 1683 ret = ath10k_core_pre_cal_config(ar); 1684 if (ret == 0) 1685 return 0; 1686 1687 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1688 "pre cal download procedure failed, try cal file: %d\n", 1689 ret); 1690 1691 ret = ath10k_download_cal_file(ar, ar->cal_file); 1692 if (ret == 0) { 1693 ar->cal_mode = ATH10K_CAL_MODE_FILE; 1694 goto done; 1695 } 1696 1697 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1698 "boot did not find a calibration file, try DT next: %d\n", 1699 ret); 1700 1701 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data"); 1702 if (ret == 0) { 1703 ar->cal_mode = ATH10K_CAL_MODE_DT; 1704 goto done; 1705 } 1706 1707 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1708 "boot did not find DT entry, try target EEPROM next: %d\n", 1709 ret); 1710 1711 ret = ath10k_download_cal_eeprom(ar); 1712 if (ret == 0) { 1713 ar->cal_mode = ATH10K_CAL_MODE_EEPROM; 1714 goto done; 1715 } 1716 1717 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1718 "boot did not find target EEPROM entry, try OTP next: %d\n", 1719 ret); 1720 1721 ret = ath10k_download_and_run_otp(ar); 1722 if (ret) { 1723 ath10k_err(ar, "failed to run otp: %d\n", ret); 1724 return ret; 1725 } 1726 1727 ar->cal_mode = ATH10K_CAL_MODE_OTP; 1728 1729 done: 1730 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1731 ath10k_cal_mode_str(ar->cal_mode)); 1732 return 0; 1733 } 1734 1735 static int ath10k_init_uart(struct ath10k *ar) 1736 { 1737 int ret; 1738 1739 /* 1740 * Explicitly setting UART prints to zero as target turns it on 1741 * based on scratch registers. 1742 */ 1743 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 1744 if (ret) { 1745 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 1746 return ret; 1747 } 1748 1749 if (!uart_print) 1750 return 0; 1751 1752 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 1753 if (ret) { 1754 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1755 return ret; 1756 } 1757 1758 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 1759 if (ret) { 1760 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1761 return ret; 1762 } 1763 1764 /* Set the UART baud rate to 19200. */ 1765 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 1766 if (ret) { 1767 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 1768 return ret; 1769 } 1770 1771 ath10k_info(ar, "UART prints enabled\n"); 1772 return 0; 1773 } 1774 1775 static int ath10k_init_hw_params(struct ath10k *ar) 1776 { 1777 const struct ath10k_hw_params *uninitialized_var(hw_params); 1778 int i; 1779 1780 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 1781 hw_params = &ath10k_hw_params_list[i]; 1782 1783 if (hw_params->id == ar->target_version && 1784 hw_params->dev_id == ar->dev_id) 1785 break; 1786 } 1787 1788 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 1789 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 1790 ar->target_version); 1791 return -EINVAL; 1792 } 1793 1794 ar->hw_params = *hw_params; 1795 1796 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 1797 ar->hw_params.name, ar->target_version); 1798 1799 return 0; 1800 } 1801 1802 static void ath10k_core_restart(struct work_struct *work) 1803 { 1804 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 1805 int ret; 1806 1807 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1808 1809 /* Place a barrier to make sure the compiler doesn't reorder 1810 * CRASH_FLUSH and calling other functions. 1811 */ 1812 barrier(); 1813 1814 ieee80211_stop_queues(ar->hw); 1815 ath10k_drain_tx(ar); 1816 complete(&ar->scan.started); 1817 complete(&ar->scan.completed); 1818 complete(&ar->scan.on_channel); 1819 complete(&ar->offchan_tx_completed); 1820 complete(&ar->install_key_done); 1821 complete(&ar->vdev_setup_done); 1822 complete(&ar->thermal.wmi_sync); 1823 complete(&ar->bss_survey_done); 1824 wake_up(&ar->htt.empty_tx_wq); 1825 wake_up(&ar->wmi.tx_credits_wq); 1826 wake_up(&ar->peer_mapping_wq); 1827 1828 /* TODO: We can have one instance of cancelling coverage_class_work by 1829 * moving it to ath10k_halt(), so that both stop() and restart() would 1830 * call that but it takes conf_mutex() and if we call cancel_work_sync() 1831 * with conf_mutex it will deadlock. 1832 */ 1833 cancel_work_sync(&ar->set_coverage_class_work); 1834 1835 mutex_lock(&ar->conf_mutex); 1836 1837 switch (ar->state) { 1838 case ATH10K_STATE_ON: 1839 ar->state = ATH10K_STATE_RESTARTING; 1840 ath10k_halt(ar); 1841 ath10k_scan_finish(ar); 1842 ieee80211_restart_hw(ar->hw); 1843 break; 1844 case ATH10K_STATE_OFF: 1845 /* this can happen if driver is being unloaded 1846 * or if the crash happens during FW probing 1847 */ 1848 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 1849 break; 1850 case ATH10K_STATE_RESTARTING: 1851 /* hw restart might be requested from multiple places */ 1852 break; 1853 case ATH10K_STATE_RESTARTED: 1854 ar->state = ATH10K_STATE_WEDGED; 1855 /* fall through */ 1856 case ATH10K_STATE_WEDGED: 1857 ath10k_warn(ar, "device is wedged, will not restart\n"); 1858 break; 1859 case ATH10K_STATE_UTF: 1860 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 1861 break; 1862 } 1863 1864 mutex_unlock(&ar->conf_mutex); 1865 1866 ret = ath10k_debug_fw_devcoredump(ar); 1867 if (ret) 1868 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d", 1869 ret); 1870 } 1871 1872 static void ath10k_core_set_coverage_class_work(struct work_struct *work) 1873 { 1874 struct ath10k *ar = container_of(work, struct ath10k, 1875 set_coverage_class_work); 1876 1877 if (ar->hw_params.hw_ops->set_coverage_class) 1878 ar->hw_params.hw_ops->set_coverage_class(ar, -1); 1879 } 1880 1881 static int ath10k_core_init_firmware_features(struct ath10k *ar) 1882 { 1883 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 1884 1885 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) && 1886 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 1887 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 1888 return -EINVAL; 1889 } 1890 1891 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 1892 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 1893 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version); 1894 return -EINVAL; 1895 } 1896 1897 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 1898 switch (ath10k_cryptmode_param) { 1899 case ATH10K_CRYPT_MODE_HW: 1900 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1901 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1902 break; 1903 case ATH10K_CRYPT_MODE_SW: 1904 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1905 fw_file->fw_features)) { 1906 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 1907 return -EINVAL; 1908 } 1909 1910 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1911 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1912 break; 1913 default: 1914 ath10k_info(ar, "invalid cryptmode: %d\n", 1915 ath10k_cryptmode_param); 1916 return -EINVAL; 1917 } 1918 1919 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 1920 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 1921 1922 if (rawmode) { 1923 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1924 fw_file->fw_features)) { 1925 ath10k_err(ar, "rawmode = 1 requires support from firmware"); 1926 return -EINVAL; 1927 } 1928 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1929 } 1930 1931 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 1932 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 1933 1934 /* Workaround: 1935 * 1936 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 1937 * and causes enormous performance issues (malformed frames, 1938 * etc). 1939 * 1940 * Disabling A-MSDU makes RAW mode stable with heavy traffic 1941 * albeit a bit slower compared to regular operation. 1942 */ 1943 ar->htt.max_num_amsdu = 1; 1944 } 1945 1946 /* Backwards compatibility for firmwares without 1947 * ATH10K_FW_IE_WMI_OP_VERSION. 1948 */ 1949 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 1950 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 1951 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 1952 fw_file->fw_features)) 1953 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 1954 else 1955 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 1956 } else { 1957 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 1958 } 1959 } 1960 1961 switch (fw_file->wmi_op_version) { 1962 case ATH10K_FW_WMI_OP_VERSION_MAIN: 1963 ar->max_num_peers = TARGET_NUM_PEERS; 1964 ar->max_num_stations = TARGET_NUM_STATIONS; 1965 ar->max_num_vdevs = TARGET_NUM_VDEVS; 1966 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 1967 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1968 WMI_STAT_PEER; 1969 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1970 break; 1971 case ATH10K_FW_WMI_OP_VERSION_10_1: 1972 case ATH10K_FW_WMI_OP_VERSION_10_2: 1973 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 1974 if (ath10k_peer_stats_enabled(ar)) { 1975 ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS; 1976 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS; 1977 } else { 1978 ar->max_num_peers = TARGET_10X_NUM_PEERS; 1979 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 1980 } 1981 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 1982 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 1983 ar->fw_stats_req_mask = WMI_STAT_PEER; 1984 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1985 break; 1986 case ATH10K_FW_WMI_OP_VERSION_TLV: 1987 ar->max_num_peers = TARGET_TLV_NUM_PEERS; 1988 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 1989 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 1990 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 1991 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 1992 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 1993 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1994 WMI_STAT_PEER; 1995 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1996 break; 1997 case ATH10K_FW_WMI_OP_VERSION_10_4: 1998 ar->max_num_peers = TARGET_10_4_NUM_PEERS; 1999 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 2000 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 2001 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 2002 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 2003 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER | 2004 WMI_10_4_STAT_PEER_EXTD; 2005 ar->max_spatial_stream = ar->hw_params.max_spatial_stream; 2006 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS; 2007 2008 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, 2009 fw_file->fw_features)) 2010 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC; 2011 else 2012 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 2013 break; 2014 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2015 case ATH10K_FW_WMI_OP_VERSION_MAX: 2016 WARN_ON(1); 2017 return -EINVAL; 2018 } 2019 2020 /* Backwards compatibility for firmwares without 2021 * ATH10K_FW_IE_HTT_OP_VERSION. 2022 */ 2023 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 2024 switch (fw_file->wmi_op_version) { 2025 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2026 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 2027 break; 2028 case ATH10K_FW_WMI_OP_VERSION_10_1: 2029 case ATH10K_FW_WMI_OP_VERSION_10_2: 2030 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2031 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 2032 break; 2033 case ATH10K_FW_WMI_OP_VERSION_TLV: 2034 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 2035 break; 2036 case ATH10K_FW_WMI_OP_VERSION_10_4: 2037 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2038 case ATH10K_FW_WMI_OP_VERSION_MAX: 2039 ath10k_err(ar, "htt op version not found from fw meta data"); 2040 return -EINVAL; 2041 } 2042 } 2043 2044 return 0; 2045 } 2046 2047 static int ath10k_core_reset_rx_filter(struct ath10k *ar) 2048 { 2049 int ret; 2050 int vdev_id; 2051 int vdev_type; 2052 int vdev_subtype; 2053 const u8 *vdev_addr; 2054 2055 vdev_id = 0; 2056 vdev_type = WMI_VDEV_TYPE_STA; 2057 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE); 2058 vdev_addr = ar->mac_addr; 2059 2060 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype, 2061 vdev_addr); 2062 if (ret) { 2063 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret); 2064 return ret; 2065 } 2066 2067 ret = ath10k_wmi_vdev_delete(ar, vdev_id); 2068 if (ret) { 2069 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret); 2070 return ret; 2071 } 2072 2073 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be 2074 * serialized properly implicitly. 2075 * 2076 * Moreover (most) WMI commands have no explicit acknowledges. It is 2077 * possible to infer it implicitly by poking firmware with echo 2078 * command - getting a reply means all preceding comments have been 2079 * (mostly) processed. 2080 * 2081 * In case of vdev create/delete this is sufficient. 2082 * 2083 * Without this it's possible to end up with a race when HTT Rx ring is 2084 * started before vdev create/delete hack is complete allowing a short 2085 * window of opportunity to receive (and Tx ACK) a bunch of frames. 2086 */ 2087 ret = ath10k_wmi_barrier(ar); 2088 if (ret) { 2089 ath10k_err(ar, "failed to ping firmware: %d\n", ret); 2090 return ret; 2091 } 2092 2093 return 0; 2094 } 2095 2096 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 2097 const struct ath10k_fw_components *fw) 2098 { 2099 int status; 2100 u32 val; 2101 2102 lockdep_assert_held(&ar->conf_mutex); 2103 2104 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2105 2106 ar->running_fw = fw; 2107 2108 ath10k_bmi_start(ar); 2109 2110 if (ath10k_init_configure_target(ar)) { 2111 status = -EINVAL; 2112 goto err; 2113 } 2114 2115 status = ath10k_download_cal_data(ar); 2116 if (status) 2117 goto err; 2118 2119 /* Some of of qca988x solutions are having global reset issue 2120 * during target initialization. Bypassing PLL setting before 2121 * downloading firmware and letting the SoC run on REF_CLK is 2122 * fixing the problem. Corresponding firmware change is also needed 2123 * to set the clock source once the target is initialized. 2124 */ 2125 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 2126 ar->running_fw->fw_file.fw_features)) { 2127 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 2128 if (status) { 2129 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 2130 status); 2131 goto err; 2132 } 2133 } 2134 2135 status = ath10k_download_fw(ar); 2136 if (status) 2137 goto err; 2138 2139 status = ath10k_init_uart(ar); 2140 if (status) 2141 goto err; 2142 2143 if (ar->hif.bus == ATH10K_BUS_SDIO) 2144 ath10k_init_sdio(ar); 2145 2146 ar->htc.htc_ops.target_send_suspend_complete = 2147 ath10k_send_suspend_complete; 2148 2149 status = ath10k_htc_init(ar); 2150 if (status) { 2151 ath10k_err(ar, "could not init HTC (%d)\n", status); 2152 goto err; 2153 } 2154 2155 status = ath10k_bmi_done(ar); 2156 if (status) 2157 goto err; 2158 2159 status = ath10k_wmi_attach(ar); 2160 if (status) { 2161 ath10k_err(ar, "WMI attach failed: %d\n", status); 2162 goto err; 2163 } 2164 2165 status = ath10k_htt_init(ar); 2166 if (status) { 2167 ath10k_err(ar, "failed to init htt: %d\n", status); 2168 goto err_wmi_detach; 2169 } 2170 2171 status = ath10k_htt_tx_start(&ar->htt); 2172 if (status) { 2173 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 2174 goto err_wmi_detach; 2175 } 2176 2177 /* If firmware indicates Full Rx Reorder support it must be used in a 2178 * slightly different manner. Let HTT code know. 2179 */ 2180 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 2181 ar->wmi.svc_map)); 2182 2183 status = ath10k_htt_rx_alloc(&ar->htt); 2184 if (status) { 2185 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 2186 goto err_htt_tx_detach; 2187 } 2188 2189 status = ath10k_hif_start(ar); 2190 if (status) { 2191 ath10k_err(ar, "could not start HIF: %d\n", status); 2192 goto err_htt_rx_detach; 2193 } 2194 2195 status = ath10k_htc_wait_target(&ar->htc); 2196 if (status) { 2197 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 2198 goto err_hif_stop; 2199 } 2200 2201 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2202 status = ath10k_htt_connect(&ar->htt); 2203 if (status) { 2204 ath10k_err(ar, "failed to connect htt (%d)\n", status); 2205 goto err_hif_stop; 2206 } 2207 } 2208 2209 status = ath10k_wmi_connect(ar); 2210 if (status) { 2211 ath10k_err(ar, "could not connect wmi: %d\n", status); 2212 goto err_hif_stop; 2213 } 2214 2215 status = ath10k_htc_start(&ar->htc); 2216 if (status) { 2217 ath10k_err(ar, "failed to start htc: %d\n", status); 2218 goto err_hif_stop; 2219 } 2220 2221 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2222 status = ath10k_wmi_wait_for_service_ready(ar); 2223 if (status) { 2224 ath10k_warn(ar, "wmi service ready event not received"); 2225 goto err_hif_stop; 2226 } 2227 } 2228 2229 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 2230 ar->hw->wiphy->fw_version); 2231 2232 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) && 2233 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2234 val = 0; 2235 if (ath10k_peer_stats_enabled(ar)) 2236 val = WMI_10_4_PEER_STATS; 2237 2238 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) 2239 val |= WMI_10_4_BSS_CHANNEL_INFO_64; 2240 2241 /* 10.4 firmware supports BT-Coex without reloading firmware 2242 * via pdev param. To support Bluetooth coexistence pdev param, 2243 * WMI_COEX_GPIO_SUPPORT of extended resource config should be 2244 * enabled always. 2245 */ 2246 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 2247 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 2248 ar->running_fw->fw_file.fw_features)) 2249 val |= WMI_10_4_COEX_GPIO_SUPPORT; 2250 2251 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, 2252 ar->wmi.svc_map)) 2253 val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY; 2254 2255 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, 2256 ar->wmi.svc_map)) 2257 val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA; 2258 2259 status = ath10k_mac_ext_resource_config(ar, val); 2260 if (status) { 2261 ath10k_err(ar, 2262 "failed to send ext resource cfg command : %d\n", 2263 status); 2264 goto err_hif_stop; 2265 } 2266 } 2267 2268 status = ath10k_wmi_cmd_init(ar); 2269 if (status) { 2270 ath10k_err(ar, "could not send WMI init command (%d)\n", 2271 status); 2272 goto err_hif_stop; 2273 } 2274 2275 status = ath10k_wmi_wait_for_unified_ready(ar); 2276 if (status) { 2277 ath10k_err(ar, "wmi unified ready event not received\n"); 2278 goto err_hif_stop; 2279 } 2280 2281 /* Some firmware revisions do not properly set up hardware rx filter 2282 * registers. 2283 * 2284 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK 2285 * is filled with 0s instead of 1s allowing HW to respond with ACKs to 2286 * any frames that matches MAC_PCU_RX_FILTER which is also 2287 * misconfigured to accept anything. 2288 * 2289 * The ADDR1 is programmed using internal firmware structure field and 2290 * can't be (easily/sanely) reached from the driver explicitly. It is 2291 * possible to implicitly make it correct by creating a dummy vdev and 2292 * then deleting it. 2293 */ 2294 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2295 status = ath10k_core_reset_rx_filter(ar); 2296 if (status) { 2297 ath10k_err(ar, 2298 "failed to reset rx filter: %d\n", status); 2299 goto err_hif_stop; 2300 } 2301 } 2302 2303 status = ath10k_htt_rx_ring_refill(ar); 2304 if (status) { 2305 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 2306 goto err_hif_stop; 2307 } 2308 2309 if (ar->max_num_vdevs >= 64) 2310 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL; 2311 else 2312 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 2313 2314 INIT_LIST_HEAD(&ar->arvifs); 2315 2316 /* we don't care about HTT in UTF mode */ 2317 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2318 status = ath10k_htt_setup(&ar->htt); 2319 if (status) { 2320 ath10k_err(ar, "failed to setup htt: %d\n", status); 2321 goto err_hif_stop; 2322 } 2323 } 2324 2325 status = ath10k_debug_start(ar); 2326 if (status) 2327 goto err_hif_stop; 2328 2329 return 0; 2330 2331 err_hif_stop: 2332 ath10k_hif_stop(ar); 2333 err_htt_rx_detach: 2334 ath10k_htt_rx_free(&ar->htt); 2335 err_htt_tx_detach: 2336 ath10k_htt_tx_free(&ar->htt); 2337 err_wmi_detach: 2338 ath10k_wmi_detach(ar); 2339 err: 2340 return status; 2341 } 2342 EXPORT_SYMBOL(ath10k_core_start); 2343 2344 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 2345 { 2346 int ret; 2347 unsigned long time_left; 2348 2349 reinit_completion(&ar->target_suspend); 2350 2351 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 2352 if (ret) { 2353 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 2354 return ret; 2355 } 2356 2357 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 2358 2359 if (!time_left) { 2360 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 2361 return -ETIMEDOUT; 2362 } 2363 2364 return 0; 2365 } 2366 2367 void ath10k_core_stop(struct ath10k *ar) 2368 { 2369 lockdep_assert_held(&ar->conf_mutex); 2370 ath10k_debug_stop(ar); 2371 2372 /* try to suspend target */ 2373 if (ar->state != ATH10K_STATE_RESTARTING && 2374 ar->state != ATH10K_STATE_UTF) 2375 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 2376 2377 ath10k_hif_stop(ar); 2378 ath10k_htt_tx_stop(&ar->htt); 2379 ath10k_htt_rx_free(&ar->htt); 2380 ath10k_wmi_detach(ar); 2381 } 2382 EXPORT_SYMBOL(ath10k_core_stop); 2383 2384 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 2385 * order to know what hw capabilities should be advertised to mac80211 it is 2386 * necessary to load the firmware (and tear it down immediately since start 2387 * hook will try to init it again) before registering 2388 */ 2389 static int ath10k_core_probe_fw(struct ath10k *ar) 2390 { 2391 struct bmi_target_info target_info; 2392 int ret = 0; 2393 2394 ret = ath10k_hif_power_up(ar); 2395 if (ret) { 2396 ath10k_err(ar, "could not start pci hif (%d)\n", ret); 2397 return ret; 2398 } 2399 2400 memset(&target_info, 0, sizeof(target_info)); 2401 if (ar->hif.bus == ATH10K_BUS_SDIO) 2402 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info); 2403 else 2404 ret = ath10k_bmi_get_target_info(ar, &target_info); 2405 if (ret) { 2406 ath10k_err(ar, "could not get target info (%d)\n", ret); 2407 goto err_power_down; 2408 } 2409 2410 ar->target_version = target_info.version; 2411 ar->hw->wiphy->hw_version = target_info.version; 2412 2413 ret = ath10k_init_hw_params(ar); 2414 if (ret) { 2415 ath10k_err(ar, "could not get hw params (%d)\n", ret); 2416 goto err_power_down; 2417 } 2418 2419 ret = ath10k_core_fetch_firmware_files(ar); 2420 if (ret) { 2421 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 2422 goto err_power_down; 2423 } 2424 2425 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) != 2426 sizeof(ar->normal_mode_fw.fw_file.fw_version)); 2427 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version, 2428 sizeof(ar->hw->wiphy->fw_version)); 2429 2430 ath10k_debug_print_hwfw_info(ar); 2431 2432 ret = ath10k_core_pre_cal_download(ar); 2433 if (ret) { 2434 /* pre calibration data download is not necessary 2435 * for all the chipsets. Ignore failures and continue. 2436 */ 2437 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2438 "could not load pre cal data: %d\n", ret); 2439 } 2440 2441 ret = ath10k_core_get_board_id_from_otp(ar); 2442 if (ret && ret != -EOPNOTSUPP) { 2443 ath10k_err(ar, "failed to get board id from otp: %d\n", 2444 ret); 2445 goto err_free_firmware_files; 2446 } 2447 2448 ret = ath10k_core_check_smbios(ar); 2449 if (ret) 2450 ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n"); 2451 2452 ret = ath10k_core_check_dt(ar); 2453 if (ret) 2454 ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n"); 2455 2456 ret = ath10k_core_fetch_board_file(ar); 2457 if (ret) { 2458 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 2459 goto err_free_firmware_files; 2460 } 2461 2462 ath10k_debug_print_board_info(ar); 2463 2464 ret = ath10k_core_init_firmware_features(ar); 2465 if (ret) { 2466 ath10k_err(ar, "fatal problem with firmware features: %d\n", 2467 ret); 2468 goto err_free_firmware_files; 2469 } 2470 2471 ret = ath10k_swap_code_seg_init(ar, &ar->normal_mode_fw.fw_file); 2472 if (ret) { 2473 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 2474 ret); 2475 goto err_free_firmware_files; 2476 } 2477 2478 mutex_lock(&ar->conf_mutex); 2479 2480 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL, 2481 &ar->normal_mode_fw); 2482 if (ret) { 2483 ath10k_err(ar, "could not init core (%d)\n", ret); 2484 goto err_unlock; 2485 } 2486 2487 ath10k_debug_print_boot_info(ar); 2488 ath10k_core_stop(ar); 2489 2490 mutex_unlock(&ar->conf_mutex); 2491 2492 ath10k_hif_power_down(ar); 2493 return 0; 2494 2495 err_unlock: 2496 mutex_unlock(&ar->conf_mutex); 2497 2498 err_free_firmware_files: 2499 ath10k_core_free_firmware_files(ar); 2500 2501 err_power_down: 2502 ath10k_hif_power_down(ar); 2503 2504 return ret; 2505 } 2506 2507 static void ath10k_core_register_work(struct work_struct *work) 2508 { 2509 struct ath10k *ar = container_of(work, struct ath10k, register_work); 2510 int status; 2511 2512 /* peer stats are enabled by default */ 2513 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags); 2514 2515 status = ath10k_core_probe_fw(ar); 2516 if (status) { 2517 ath10k_err(ar, "could not probe fw (%d)\n", status); 2518 goto err; 2519 } 2520 2521 status = ath10k_mac_register(ar); 2522 if (status) { 2523 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 2524 goto err_release_fw; 2525 } 2526 2527 status = ath10k_debug_register(ar); 2528 if (status) { 2529 ath10k_err(ar, "unable to initialize debugfs\n"); 2530 goto err_unregister_mac; 2531 } 2532 2533 status = ath10k_spectral_create(ar); 2534 if (status) { 2535 ath10k_err(ar, "failed to initialize spectral\n"); 2536 goto err_debug_destroy; 2537 } 2538 2539 status = ath10k_thermal_register(ar); 2540 if (status) { 2541 ath10k_err(ar, "could not register thermal device: %d\n", 2542 status); 2543 goto err_spectral_destroy; 2544 } 2545 2546 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 2547 return; 2548 2549 err_spectral_destroy: 2550 ath10k_spectral_destroy(ar); 2551 err_debug_destroy: 2552 ath10k_debug_destroy(ar); 2553 err_unregister_mac: 2554 ath10k_mac_unregister(ar); 2555 err_release_fw: 2556 ath10k_core_free_firmware_files(ar); 2557 err: 2558 /* TODO: It's probably a good idea to release device from the driver 2559 * but calling device_release_driver() here will cause a deadlock. 2560 */ 2561 return; 2562 } 2563 2564 int ath10k_core_register(struct ath10k *ar, u32 chip_id) 2565 { 2566 ar->chip_id = chip_id; 2567 queue_work(ar->workqueue, &ar->register_work); 2568 2569 return 0; 2570 } 2571 EXPORT_SYMBOL(ath10k_core_register); 2572 2573 void ath10k_core_unregister(struct ath10k *ar) 2574 { 2575 cancel_work_sync(&ar->register_work); 2576 2577 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 2578 return; 2579 2580 ath10k_thermal_unregister(ar); 2581 /* Stop spectral before unregistering from mac80211 to remove the 2582 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 2583 * would be already be free'd recursively, leading to a double free. 2584 */ 2585 ath10k_spectral_destroy(ar); 2586 2587 /* We must unregister from mac80211 before we stop HTC and HIF. 2588 * Otherwise we will fail to submit commands to FW and mac80211 will be 2589 * unhappy about callback failures. 2590 */ 2591 ath10k_mac_unregister(ar); 2592 2593 ath10k_testmode_destroy(ar); 2594 2595 ath10k_core_free_firmware_files(ar); 2596 ath10k_core_free_board_files(ar); 2597 2598 ath10k_debug_unregister(ar); 2599 } 2600 EXPORT_SYMBOL(ath10k_core_unregister); 2601 2602 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 2603 enum ath10k_bus bus, 2604 enum ath10k_hw_rev hw_rev, 2605 const struct ath10k_hif_ops *hif_ops) 2606 { 2607 struct ath10k *ar; 2608 int ret; 2609 2610 ar = ath10k_mac_create(priv_size); 2611 if (!ar) 2612 return NULL; 2613 2614 ar->ath_common.priv = ar; 2615 ar->ath_common.hw = ar->hw; 2616 ar->dev = dev; 2617 ar->hw_rev = hw_rev; 2618 ar->hif.ops = hif_ops; 2619 ar->hif.bus = bus; 2620 2621 switch (hw_rev) { 2622 case ATH10K_HW_QCA988X: 2623 case ATH10K_HW_QCA9887: 2624 ar->regs = &qca988x_regs; 2625 ar->hw_ce_regs = &qcax_ce_regs; 2626 ar->hw_values = &qca988x_values; 2627 break; 2628 case ATH10K_HW_QCA6174: 2629 case ATH10K_HW_QCA9377: 2630 ar->regs = &qca6174_regs; 2631 ar->hw_ce_regs = &qcax_ce_regs; 2632 ar->hw_values = &qca6174_values; 2633 break; 2634 case ATH10K_HW_QCA99X0: 2635 case ATH10K_HW_QCA9984: 2636 ar->regs = &qca99x0_regs; 2637 ar->hw_ce_regs = &qcax_ce_regs; 2638 ar->hw_values = &qca99x0_values; 2639 break; 2640 case ATH10K_HW_QCA9888: 2641 ar->regs = &qca99x0_regs; 2642 ar->hw_ce_regs = &qcax_ce_regs; 2643 ar->hw_values = &qca9888_values; 2644 break; 2645 case ATH10K_HW_QCA4019: 2646 ar->regs = &qca4019_regs; 2647 ar->hw_ce_regs = &qcax_ce_regs; 2648 ar->hw_values = &qca4019_values; 2649 break; 2650 case ATH10K_HW_WCN3990: 2651 ar->regs = &wcn3990_regs; 2652 ar->hw_ce_regs = &wcn3990_ce_regs; 2653 ar->hw_values = &wcn3990_values; 2654 break; 2655 default: 2656 ath10k_err(ar, "unsupported core hardware revision %d\n", 2657 hw_rev); 2658 ret = -ENOTSUPP; 2659 goto err_free_mac; 2660 } 2661 2662 init_completion(&ar->scan.started); 2663 init_completion(&ar->scan.completed); 2664 init_completion(&ar->scan.on_channel); 2665 init_completion(&ar->target_suspend); 2666 init_completion(&ar->wow.wakeup_completed); 2667 2668 init_completion(&ar->install_key_done); 2669 init_completion(&ar->vdev_setup_done); 2670 init_completion(&ar->thermal.wmi_sync); 2671 init_completion(&ar->bss_survey_done); 2672 2673 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 2674 2675 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 2676 if (!ar->workqueue) 2677 goto err_free_mac; 2678 2679 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 2680 if (!ar->workqueue_aux) 2681 goto err_free_wq; 2682 2683 mutex_init(&ar->conf_mutex); 2684 spin_lock_init(&ar->data_lock); 2685 spin_lock_init(&ar->txqs_lock); 2686 2687 INIT_LIST_HEAD(&ar->txqs); 2688 INIT_LIST_HEAD(&ar->peers); 2689 init_waitqueue_head(&ar->peer_mapping_wq); 2690 init_waitqueue_head(&ar->htt.empty_tx_wq); 2691 init_waitqueue_head(&ar->wmi.tx_credits_wq); 2692 2693 init_completion(&ar->offchan_tx_completed); 2694 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 2695 skb_queue_head_init(&ar->offchan_tx_queue); 2696 2697 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 2698 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 2699 2700 INIT_WORK(&ar->register_work, ath10k_core_register_work); 2701 INIT_WORK(&ar->restart_work, ath10k_core_restart); 2702 INIT_WORK(&ar->set_coverage_class_work, 2703 ath10k_core_set_coverage_class_work); 2704 2705 init_dummy_netdev(&ar->napi_dev); 2706 2707 ret = ath10k_debug_create(ar); 2708 if (ret) 2709 goto err_free_aux_wq; 2710 2711 return ar; 2712 2713 err_free_aux_wq: 2714 destroy_workqueue(ar->workqueue_aux); 2715 err_free_wq: 2716 destroy_workqueue(ar->workqueue); 2717 2718 err_free_mac: 2719 ath10k_mac_destroy(ar); 2720 2721 return NULL; 2722 } 2723 EXPORT_SYMBOL(ath10k_core_create); 2724 2725 void ath10k_core_destroy(struct ath10k *ar) 2726 { 2727 flush_workqueue(ar->workqueue); 2728 destroy_workqueue(ar->workqueue); 2729 2730 flush_workqueue(ar->workqueue_aux); 2731 destroy_workqueue(ar->workqueue_aux); 2732 2733 ath10k_debug_destroy(ar); 2734 ath10k_htt_tx_destroy(&ar->htt); 2735 ath10k_wmi_free_host_mem(ar); 2736 ath10k_mac_destroy(ar); 2737 } 2738 EXPORT_SYMBOL(ath10k_core_destroy); 2739 2740 MODULE_AUTHOR("Qualcomm Atheros"); 2741 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards."); 2742 MODULE_LICENSE("Dual BSD/GPL"); 2743