1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 4 * Copyright (c) 2018, The Linux Foundation. All rights reserved. 5 * 6 * Permission to use, copy, modify, and/or distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #include <linux/module.h> 20 #include <linux/firmware.h> 21 #include <linux/of.h> 22 #include <linux/dmi.h> 23 #include <linux/ctype.h> 24 #include <asm/byteorder.h> 25 26 #include "core.h" 27 #include "mac.h" 28 #include "htc.h" 29 #include "hif.h" 30 #include "wmi.h" 31 #include "bmi.h" 32 #include "debug.h" 33 #include "htt.h" 34 #include "testmode.h" 35 #include "wmi-ops.h" 36 #include "coredump.h" 37 38 unsigned int ath10k_debug_mask; 39 static unsigned int ath10k_cryptmode_param; 40 static bool uart_print; 41 static bool skip_otp; 42 static bool rawmode; 43 44 /* Enable ATH10K_FW_CRASH_DUMP_REGISTERS and ATH10K_FW_CRASH_DUMP_CE_DATA 45 * by default. 46 */ 47 unsigned long ath10k_coredump_mask = 0x3; 48 49 /* FIXME: most of these should be readonly */ 50 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 51 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 52 module_param(uart_print, bool, 0644); 53 module_param(skip_otp, bool, 0644); 54 module_param(rawmode, bool, 0644); 55 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444); 56 57 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 58 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 59 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 60 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 61 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); 62 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file"); 63 64 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 65 { 66 .id = QCA988X_HW_2_0_VERSION, 67 .dev_id = QCA988X_2_0_DEVICE_ID, 68 .name = "qca988x hw2.0", 69 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 70 .uart_pin = 7, 71 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 72 .otp_exe_param = 0, 73 .channel_counters_freq_hz = 88000, 74 .max_probe_resp_desc_thres = 0, 75 .cal_data_len = 2116, 76 .fw = { 77 .dir = QCA988X_HW_2_0_FW_DIR, 78 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 79 .board_size = QCA988X_BOARD_DATA_SZ, 80 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 81 }, 82 .hw_ops = &qca988x_ops, 83 .decap_align_bytes = 4, 84 .spectral_bin_discard = 0, 85 .vht160_mcs_rx_highest = 0, 86 .vht160_mcs_tx_highest = 0, 87 .n_cipher_suites = 8, 88 .num_peers = TARGET_TLV_NUM_PEERS, 89 .ast_skid_limit = 0x10, 90 .num_wds_entries = 0x20, 91 .target_64bit = false, 92 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 93 }, 94 { 95 .id = QCA988X_HW_2_0_VERSION, 96 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT, 97 .name = "qca988x hw2.0 ubiquiti", 98 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 99 .uart_pin = 7, 100 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 101 .otp_exe_param = 0, 102 .channel_counters_freq_hz = 88000, 103 .max_probe_resp_desc_thres = 0, 104 .cal_data_len = 2116, 105 .fw = { 106 .dir = QCA988X_HW_2_0_FW_DIR, 107 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 108 .board_size = QCA988X_BOARD_DATA_SZ, 109 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 110 }, 111 .hw_ops = &qca988x_ops, 112 .decap_align_bytes = 4, 113 .spectral_bin_discard = 0, 114 .vht160_mcs_rx_highest = 0, 115 .vht160_mcs_tx_highest = 0, 116 .n_cipher_suites = 8, 117 .num_peers = TARGET_TLV_NUM_PEERS, 118 .ast_skid_limit = 0x10, 119 .num_wds_entries = 0x20, 120 .target_64bit = false, 121 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 122 }, 123 { 124 .id = QCA9887_HW_1_0_VERSION, 125 .dev_id = QCA9887_1_0_DEVICE_ID, 126 .name = "qca9887 hw1.0", 127 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR, 128 .uart_pin = 7, 129 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 130 .otp_exe_param = 0, 131 .channel_counters_freq_hz = 88000, 132 .max_probe_resp_desc_thres = 0, 133 .cal_data_len = 2116, 134 .fw = { 135 .dir = QCA9887_HW_1_0_FW_DIR, 136 .board = QCA9887_HW_1_0_BOARD_DATA_FILE, 137 .board_size = QCA9887_BOARD_DATA_SZ, 138 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ, 139 }, 140 .hw_ops = &qca988x_ops, 141 .decap_align_bytes = 4, 142 .spectral_bin_discard = 0, 143 .vht160_mcs_rx_highest = 0, 144 .vht160_mcs_tx_highest = 0, 145 .n_cipher_suites = 8, 146 .num_peers = TARGET_TLV_NUM_PEERS, 147 .ast_skid_limit = 0x10, 148 .num_wds_entries = 0x20, 149 .target_64bit = false, 150 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 151 }, 152 { 153 .id = QCA6174_HW_2_1_VERSION, 154 .dev_id = QCA6164_2_1_DEVICE_ID, 155 .name = "qca6164 hw2.1", 156 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 157 .uart_pin = 6, 158 .otp_exe_param = 0, 159 .channel_counters_freq_hz = 88000, 160 .max_probe_resp_desc_thres = 0, 161 .cal_data_len = 8124, 162 .fw = { 163 .dir = QCA6174_HW_2_1_FW_DIR, 164 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 165 .board_size = QCA6174_BOARD_DATA_SZ, 166 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 167 }, 168 .hw_ops = &qca988x_ops, 169 .decap_align_bytes = 4, 170 .spectral_bin_discard = 0, 171 .vht160_mcs_rx_highest = 0, 172 .vht160_mcs_tx_highest = 0, 173 .n_cipher_suites = 8, 174 .num_peers = TARGET_TLV_NUM_PEERS, 175 .ast_skid_limit = 0x10, 176 .num_wds_entries = 0x20, 177 .target_64bit = false, 178 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 179 }, 180 { 181 .id = QCA6174_HW_2_1_VERSION, 182 .dev_id = QCA6174_2_1_DEVICE_ID, 183 .name = "qca6174 hw2.1", 184 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 185 .uart_pin = 6, 186 .otp_exe_param = 0, 187 .channel_counters_freq_hz = 88000, 188 .max_probe_resp_desc_thres = 0, 189 .cal_data_len = 8124, 190 .fw = { 191 .dir = QCA6174_HW_2_1_FW_DIR, 192 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 193 .board_size = QCA6174_BOARD_DATA_SZ, 194 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 195 }, 196 .hw_ops = &qca988x_ops, 197 .decap_align_bytes = 4, 198 .spectral_bin_discard = 0, 199 .vht160_mcs_rx_highest = 0, 200 .vht160_mcs_tx_highest = 0, 201 .n_cipher_suites = 8, 202 .num_peers = TARGET_TLV_NUM_PEERS, 203 .ast_skid_limit = 0x10, 204 .num_wds_entries = 0x20, 205 .target_64bit = false, 206 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 207 }, 208 { 209 .id = QCA6174_HW_3_0_VERSION, 210 .dev_id = QCA6174_2_1_DEVICE_ID, 211 .name = "qca6174 hw3.0", 212 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 213 .uart_pin = 6, 214 .otp_exe_param = 0, 215 .channel_counters_freq_hz = 88000, 216 .max_probe_resp_desc_thres = 0, 217 .cal_data_len = 8124, 218 .fw = { 219 .dir = QCA6174_HW_3_0_FW_DIR, 220 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 221 .board_size = QCA6174_BOARD_DATA_SZ, 222 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 223 }, 224 .hw_ops = &qca988x_ops, 225 .decap_align_bytes = 4, 226 .spectral_bin_discard = 0, 227 .vht160_mcs_rx_highest = 0, 228 .vht160_mcs_tx_highest = 0, 229 .n_cipher_suites = 8, 230 .num_peers = TARGET_TLV_NUM_PEERS, 231 .ast_skid_limit = 0x10, 232 .num_wds_entries = 0x20, 233 .target_64bit = false, 234 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 235 }, 236 { 237 .id = QCA6174_HW_3_2_VERSION, 238 .dev_id = QCA6174_2_1_DEVICE_ID, 239 .name = "qca6174 hw3.2", 240 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 241 .uart_pin = 6, 242 .otp_exe_param = 0, 243 .channel_counters_freq_hz = 88000, 244 .max_probe_resp_desc_thres = 0, 245 .cal_data_len = 8124, 246 .fw = { 247 /* uses same binaries as hw3.0 */ 248 .dir = QCA6174_HW_3_0_FW_DIR, 249 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 250 .board_size = QCA6174_BOARD_DATA_SZ, 251 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 252 }, 253 .hw_ops = &qca6174_ops, 254 .hw_clk = qca6174_clk, 255 .target_cpu_freq = 176000000, 256 .decap_align_bytes = 4, 257 .spectral_bin_discard = 0, 258 .vht160_mcs_rx_highest = 0, 259 .vht160_mcs_tx_highest = 0, 260 .n_cipher_suites = 8, 261 .num_peers = TARGET_TLV_NUM_PEERS, 262 .ast_skid_limit = 0x10, 263 .num_wds_entries = 0x20, 264 .target_64bit = false, 265 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 266 }, 267 { 268 .id = QCA99X0_HW_2_0_DEV_VERSION, 269 .dev_id = QCA99X0_2_0_DEVICE_ID, 270 .name = "qca99x0 hw2.0", 271 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 272 .uart_pin = 7, 273 .otp_exe_param = 0x00000700, 274 .continuous_frag_desc = true, 275 .cck_rate_map_rev2 = true, 276 .channel_counters_freq_hz = 150000, 277 .max_probe_resp_desc_thres = 24, 278 .tx_chain_mask = 0xf, 279 .rx_chain_mask = 0xf, 280 .max_spatial_stream = 4, 281 .cal_data_len = 12064, 282 .fw = { 283 .dir = QCA99X0_HW_2_0_FW_DIR, 284 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 285 .board_size = QCA99X0_BOARD_DATA_SZ, 286 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 287 }, 288 .sw_decrypt_mcast_mgmt = true, 289 .hw_ops = &qca99x0_ops, 290 .decap_align_bytes = 1, 291 .spectral_bin_discard = 4, 292 .vht160_mcs_rx_highest = 0, 293 .vht160_mcs_tx_highest = 0, 294 .n_cipher_suites = 11, 295 .num_peers = TARGET_TLV_NUM_PEERS, 296 .ast_skid_limit = 0x10, 297 .num_wds_entries = 0x20, 298 .target_64bit = false, 299 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 300 }, 301 { 302 .id = QCA9984_HW_1_0_DEV_VERSION, 303 .dev_id = QCA9984_1_0_DEVICE_ID, 304 .name = "qca9984/qca9994 hw1.0", 305 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR, 306 .uart_pin = 7, 307 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 308 .otp_exe_param = 0x00000700, 309 .continuous_frag_desc = true, 310 .cck_rate_map_rev2 = true, 311 .channel_counters_freq_hz = 150000, 312 .max_probe_resp_desc_thres = 24, 313 .tx_chain_mask = 0xf, 314 .rx_chain_mask = 0xf, 315 .max_spatial_stream = 4, 316 .cal_data_len = 12064, 317 .fw = { 318 .dir = QCA9984_HW_1_0_FW_DIR, 319 .board = QCA9984_HW_1_0_BOARD_DATA_FILE, 320 .board_size = QCA99X0_BOARD_DATA_SZ, 321 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 322 }, 323 .sw_decrypt_mcast_mgmt = true, 324 .hw_ops = &qca99x0_ops, 325 .decap_align_bytes = 1, 326 .spectral_bin_discard = 12, 327 328 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz 329 * or 2x2 160Mhz, long-guard-interval. 330 */ 331 .vht160_mcs_rx_highest = 1560, 332 .vht160_mcs_tx_highest = 1560, 333 .n_cipher_suites = 11, 334 .num_peers = TARGET_TLV_NUM_PEERS, 335 .ast_skid_limit = 0x10, 336 .num_wds_entries = 0x20, 337 .target_64bit = false, 338 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 339 }, 340 { 341 .id = QCA9888_HW_2_0_DEV_VERSION, 342 .dev_id = QCA9888_2_0_DEVICE_ID, 343 .name = "qca9888 hw2.0", 344 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR, 345 .uart_pin = 7, 346 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 347 .otp_exe_param = 0x00000700, 348 .continuous_frag_desc = true, 349 .channel_counters_freq_hz = 150000, 350 .max_probe_resp_desc_thres = 24, 351 .tx_chain_mask = 3, 352 .rx_chain_mask = 3, 353 .max_spatial_stream = 2, 354 .cal_data_len = 12064, 355 .fw = { 356 .dir = QCA9888_HW_2_0_FW_DIR, 357 .board = QCA9888_HW_2_0_BOARD_DATA_FILE, 358 .board_size = QCA99X0_BOARD_DATA_SZ, 359 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 360 }, 361 .sw_decrypt_mcast_mgmt = true, 362 .hw_ops = &qca99x0_ops, 363 .decap_align_bytes = 1, 364 .spectral_bin_discard = 12, 365 366 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or 367 * 1x1 160Mhz, long-guard-interval. 368 */ 369 .vht160_mcs_rx_highest = 780, 370 .vht160_mcs_tx_highest = 780, 371 .n_cipher_suites = 11, 372 .num_peers = TARGET_TLV_NUM_PEERS, 373 .ast_skid_limit = 0x10, 374 .num_wds_entries = 0x20, 375 .target_64bit = false, 376 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 377 }, 378 { 379 .id = QCA9377_HW_1_0_DEV_VERSION, 380 .dev_id = QCA9377_1_0_DEVICE_ID, 381 .name = "qca9377 hw1.0", 382 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 383 .uart_pin = 6, 384 .otp_exe_param = 0, 385 .channel_counters_freq_hz = 88000, 386 .max_probe_resp_desc_thres = 0, 387 .cal_data_len = 8124, 388 .fw = { 389 .dir = QCA9377_HW_1_0_FW_DIR, 390 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 391 .board_size = QCA9377_BOARD_DATA_SZ, 392 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 393 }, 394 .hw_ops = &qca988x_ops, 395 .decap_align_bytes = 4, 396 .spectral_bin_discard = 0, 397 .vht160_mcs_rx_highest = 0, 398 .vht160_mcs_tx_highest = 0, 399 .n_cipher_suites = 8, 400 .num_peers = TARGET_TLV_NUM_PEERS, 401 .ast_skid_limit = 0x10, 402 .num_wds_entries = 0x20, 403 .target_64bit = false, 404 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 405 }, 406 { 407 .id = QCA9377_HW_1_1_DEV_VERSION, 408 .dev_id = QCA9377_1_0_DEVICE_ID, 409 .name = "qca9377 hw1.1", 410 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 411 .uart_pin = 6, 412 .otp_exe_param = 0, 413 .channel_counters_freq_hz = 88000, 414 .max_probe_resp_desc_thres = 0, 415 .cal_data_len = 8124, 416 .fw = { 417 .dir = QCA9377_HW_1_0_FW_DIR, 418 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 419 .board_size = QCA9377_BOARD_DATA_SZ, 420 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 421 }, 422 .hw_ops = &qca6174_ops, 423 .hw_clk = qca6174_clk, 424 .target_cpu_freq = 176000000, 425 .decap_align_bytes = 4, 426 .spectral_bin_discard = 0, 427 .vht160_mcs_rx_highest = 0, 428 .vht160_mcs_tx_highest = 0, 429 .n_cipher_suites = 8, 430 .num_peers = TARGET_TLV_NUM_PEERS, 431 .ast_skid_limit = 0x10, 432 .num_wds_entries = 0x20, 433 .target_64bit = false, 434 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 435 }, 436 { 437 .id = QCA4019_HW_1_0_DEV_VERSION, 438 .dev_id = 0, 439 .name = "qca4019 hw1.0", 440 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR, 441 .uart_pin = 7, 442 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 443 .otp_exe_param = 0x0010000, 444 .continuous_frag_desc = true, 445 .cck_rate_map_rev2 = true, 446 .channel_counters_freq_hz = 125000, 447 .max_probe_resp_desc_thres = 24, 448 .tx_chain_mask = 0x3, 449 .rx_chain_mask = 0x3, 450 .max_spatial_stream = 2, 451 .cal_data_len = 12064, 452 .fw = { 453 .dir = QCA4019_HW_1_0_FW_DIR, 454 .board = QCA4019_HW_1_0_BOARD_DATA_FILE, 455 .board_size = QCA4019_BOARD_DATA_SZ, 456 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, 457 }, 458 .sw_decrypt_mcast_mgmt = true, 459 .hw_ops = &qca99x0_ops, 460 .decap_align_bytes = 1, 461 .spectral_bin_discard = 4, 462 .vht160_mcs_rx_highest = 0, 463 .vht160_mcs_tx_highest = 0, 464 .n_cipher_suites = 11, 465 .num_peers = TARGET_TLV_NUM_PEERS, 466 .ast_skid_limit = 0x10, 467 .num_wds_entries = 0x20, 468 .target_64bit = false, 469 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 470 }, 471 { 472 .id = WCN3990_HW_1_0_DEV_VERSION, 473 .dev_id = 0, 474 .name = "wcn3990 hw1.0", 475 .continuous_frag_desc = true, 476 .tx_chain_mask = 0x7, 477 .rx_chain_mask = 0x7, 478 .max_spatial_stream = 4, 479 .fw = { 480 .dir = WCN3990_HW_1_0_FW_DIR, 481 }, 482 .sw_decrypt_mcast_mgmt = true, 483 .hw_ops = &wcn3990_ops, 484 .decap_align_bytes = 1, 485 .num_peers = TARGET_HL_10_TLV_NUM_PEERS, 486 .ast_skid_limit = TARGET_HL_10_TLV_AST_SKID_LIMIT, 487 .num_wds_entries = TARGET_HL_10_TLV_NUM_WDS_ENTRIES, 488 .target_64bit = true, 489 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC, 490 }, 491 }; 492 493 static const char *const ath10k_core_fw_feature_str[] = { 494 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 495 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 496 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 497 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 498 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 499 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 500 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 501 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 502 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 503 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 504 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 505 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 506 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", 507 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl", 508 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param", 509 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war", 510 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast", 511 [ATH10K_FW_FEATURE_NO_PS] = "no-ps", 512 [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference", 513 [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi", 514 }; 515 516 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 517 size_t buf_len, 518 enum ath10k_fw_features feat) 519 { 520 /* make sure that ath10k_core_fw_feature_str[] gets updated */ 521 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != 522 ATH10K_FW_FEATURE_COUNT); 523 524 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 525 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 526 return scnprintf(buf, buf_len, "bit%d", feat); 527 } 528 529 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 530 } 531 532 void ath10k_core_get_fw_features_str(struct ath10k *ar, 533 char *buf, 534 size_t buf_len) 535 { 536 size_t len = 0; 537 int i; 538 539 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 540 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) { 541 if (len > 0) 542 len += scnprintf(buf + len, buf_len - len, ","); 543 544 len += ath10k_core_get_fw_feature_str(buf + len, 545 buf_len - len, 546 i); 547 } 548 } 549 } 550 551 static void ath10k_send_suspend_complete(struct ath10k *ar) 552 { 553 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 554 555 complete(&ar->target_suspend); 556 } 557 558 static void ath10k_init_sdio(struct ath10k *ar) 559 { 560 u32 param = 0; 561 562 ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256); 563 ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99); 564 ath10k_bmi_read32(ar, hi_acs_flags, ¶m); 565 566 param |= (HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET | 567 HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET | 568 HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE); 569 570 ath10k_bmi_write32(ar, hi_acs_flags, param); 571 } 572 573 static int ath10k_init_configure_target(struct ath10k *ar) 574 { 575 u32 param_host; 576 int ret; 577 578 /* tell target which HTC version it is used*/ 579 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 580 HTC_PROTOCOL_VERSION); 581 if (ret) { 582 ath10k_err(ar, "settings HTC version failed\n"); 583 return ret; 584 } 585 586 /* set the firmware mode to STA/IBSS/AP */ 587 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 588 if (ret) { 589 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 590 return ret; 591 } 592 593 /* TODO following parameters need to be re-visited. */ 594 /* num_device */ 595 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 596 /* Firmware mode */ 597 /* FIXME: Why FW_MODE_AP ??.*/ 598 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 599 /* mac_addr_method */ 600 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 601 /* firmware_bridge */ 602 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 603 /* fwsubmode */ 604 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 605 606 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 607 if (ret) { 608 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 609 return ret; 610 } 611 612 /* We do all byte-swapping on the host */ 613 ret = ath10k_bmi_write32(ar, hi_be, 0); 614 if (ret) { 615 ath10k_err(ar, "setting host CPU BE mode failed\n"); 616 return ret; 617 } 618 619 /* FW descriptor/Data swap flags */ 620 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 621 622 if (ret) { 623 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 624 return ret; 625 } 626 627 /* Some devices have a special sanity check that verifies the PCI 628 * Device ID is written to this host interest var. It is known to be 629 * required to boot QCA6164. 630 */ 631 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 632 ar->dev_id); 633 if (ret) { 634 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 635 return ret; 636 } 637 638 return 0; 639 } 640 641 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 642 const char *dir, 643 const char *file) 644 { 645 char filename[100]; 646 const struct firmware *fw; 647 int ret; 648 649 if (file == NULL) 650 return ERR_PTR(-ENOENT); 651 652 if (dir == NULL) 653 dir = "."; 654 655 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 656 ret = request_firmware(&fw, filename, ar->dev); 657 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n", 658 filename, ret); 659 660 if (ret) 661 return ERR_PTR(ret); 662 663 return fw; 664 } 665 666 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 667 size_t data_len) 668 { 669 u32 board_data_size = ar->hw_params.fw.board_size; 670 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 671 u32 board_ext_data_addr; 672 int ret; 673 674 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 675 if (ret) { 676 ath10k_err(ar, "could not read board ext data addr (%d)\n", 677 ret); 678 return ret; 679 } 680 681 ath10k_dbg(ar, ATH10K_DBG_BOOT, 682 "boot push board extended data addr 0x%x\n", 683 board_ext_data_addr); 684 685 if (board_ext_data_addr == 0) 686 return 0; 687 688 if (data_len != (board_data_size + board_ext_data_size)) { 689 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 690 data_len, board_data_size, board_ext_data_size); 691 return -EINVAL; 692 } 693 694 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 695 data + board_data_size, 696 board_ext_data_size); 697 if (ret) { 698 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 699 return ret; 700 } 701 702 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 703 (board_ext_data_size << 16) | 1); 704 if (ret) { 705 ath10k_err(ar, "could not write board ext data bit (%d)\n", 706 ret); 707 return ret; 708 } 709 710 return 0; 711 } 712 713 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 714 size_t data_len) 715 { 716 u32 board_data_size = ar->hw_params.fw.board_size; 717 u32 address; 718 int ret; 719 720 ret = ath10k_push_board_ext_data(ar, data, data_len); 721 if (ret) { 722 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 723 goto exit; 724 } 725 726 ret = ath10k_bmi_read32(ar, hi_board_data, &address); 727 if (ret) { 728 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 729 goto exit; 730 } 731 732 ret = ath10k_bmi_write_memory(ar, address, data, 733 min_t(u32, board_data_size, 734 data_len)); 735 if (ret) { 736 ath10k_err(ar, "could not write board data (%d)\n", ret); 737 goto exit; 738 } 739 740 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 741 if (ret) { 742 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 743 goto exit; 744 } 745 746 exit: 747 return ret; 748 } 749 750 static int ath10k_download_cal_file(struct ath10k *ar, 751 const struct firmware *file) 752 { 753 int ret; 754 755 if (!file) 756 return -ENOENT; 757 758 if (IS_ERR(file)) 759 return PTR_ERR(file); 760 761 ret = ath10k_download_board_data(ar, file->data, file->size); 762 if (ret) { 763 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 764 return ret; 765 } 766 767 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 768 769 return 0; 770 } 771 772 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name) 773 { 774 struct device_node *node; 775 int data_len; 776 void *data; 777 int ret; 778 779 node = ar->dev->of_node; 780 if (!node) 781 /* Device Tree is optional, don't print any warnings if 782 * there's no node for ath10k. 783 */ 784 return -ENOENT; 785 786 if (!of_get_property(node, dt_name, &data_len)) { 787 /* The calibration data node is optional */ 788 return -ENOENT; 789 } 790 791 if (data_len != ar->hw_params.cal_data_len) { 792 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 793 data_len); 794 ret = -EMSGSIZE; 795 goto out; 796 } 797 798 data = kmalloc(data_len, GFP_KERNEL); 799 if (!data) { 800 ret = -ENOMEM; 801 goto out; 802 } 803 804 ret = of_property_read_u8_array(node, dt_name, data, data_len); 805 if (ret) { 806 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 807 ret); 808 goto out_free; 809 } 810 811 ret = ath10k_download_board_data(ar, data, data_len); 812 if (ret) { 813 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 814 ret); 815 goto out_free; 816 } 817 818 ret = 0; 819 820 out_free: 821 kfree(data); 822 823 out: 824 return ret; 825 } 826 827 static int ath10k_download_cal_eeprom(struct ath10k *ar) 828 { 829 size_t data_len; 830 void *data = NULL; 831 int ret; 832 833 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len); 834 if (ret) { 835 if (ret != -EOPNOTSUPP) 836 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n", 837 ret); 838 goto out_free; 839 } 840 841 ret = ath10k_download_board_data(ar, data, data_len); 842 if (ret) { 843 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n", 844 ret); 845 goto out_free; 846 } 847 848 ret = 0; 849 850 out_free: 851 kfree(data); 852 853 return ret; 854 } 855 856 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) 857 { 858 u32 result, address; 859 u8 board_id, chip_id; 860 int ret, bmi_board_id_param; 861 862 address = ar->hw_params.patch_load_addr; 863 864 if (!ar->normal_mode_fw.fw_file.otp_data || 865 !ar->normal_mode_fw.fw_file.otp_len) { 866 ath10k_warn(ar, 867 "failed to retrieve board id because of invalid otp\n"); 868 return -ENODATA; 869 } 870 871 ath10k_dbg(ar, ATH10K_DBG_BOOT, 872 "boot upload otp to 0x%x len %zd for board id\n", 873 address, ar->normal_mode_fw.fw_file.otp_len); 874 875 ret = ath10k_bmi_fast_download(ar, address, 876 ar->normal_mode_fw.fw_file.otp_data, 877 ar->normal_mode_fw.fw_file.otp_len); 878 if (ret) { 879 ath10k_err(ar, "could not write otp for board id check: %d\n", 880 ret); 881 return ret; 882 } 883 884 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 885 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 886 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID; 887 else 888 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID; 889 890 ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result); 891 if (ret) { 892 ath10k_err(ar, "could not execute otp for board id check: %d\n", 893 ret); 894 return ret; 895 } 896 897 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); 898 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); 899 900 ath10k_dbg(ar, ATH10K_DBG_BOOT, 901 "boot get otp board id result 0x%08x board_id %d chip_id %d\n", 902 result, board_id, chip_id); 903 904 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 || 905 (board_id == 0)) { 906 ath10k_dbg(ar, ATH10K_DBG_BOOT, 907 "board id does not exist in otp, ignore it\n"); 908 return -EOPNOTSUPP; 909 } 910 911 ar->id.bmi_ids_valid = true; 912 ar->id.bmi_board_id = board_id; 913 ar->id.bmi_chip_id = chip_id; 914 915 return 0; 916 } 917 918 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data) 919 { 920 struct ath10k *ar = data; 921 const char *bdf_ext; 922 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC; 923 u8 bdf_enabled; 924 int i; 925 926 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE) 927 return; 928 929 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) { 930 ath10k_dbg(ar, ATH10K_DBG_BOOT, 931 "wrong smbios bdf ext type length (%d).\n", 932 hdr->length); 933 return; 934 } 935 936 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET); 937 if (!bdf_enabled) { 938 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n"); 939 return; 940 } 941 942 /* Only one string exists (per spec) */ 943 bdf_ext = (char *)hdr + hdr->length; 944 945 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) { 946 ath10k_dbg(ar, ATH10K_DBG_BOOT, 947 "bdf variant magic does not match.\n"); 948 return; 949 } 950 951 for (i = 0; i < strlen(bdf_ext); i++) { 952 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) { 953 ath10k_dbg(ar, ATH10K_DBG_BOOT, 954 "bdf variant name contains non ascii chars.\n"); 955 return; 956 } 957 } 958 959 /* Copy extension name without magic suffix */ 960 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic), 961 sizeof(ar->id.bdf_ext)) < 0) { 962 ath10k_dbg(ar, ATH10K_DBG_BOOT, 963 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 964 bdf_ext); 965 return; 966 } 967 968 ath10k_dbg(ar, ATH10K_DBG_BOOT, 969 "found and validated bdf variant smbios_type 0x%x bdf %s\n", 970 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext); 971 } 972 973 static int ath10k_core_check_smbios(struct ath10k *ar) 974 { 975 ar->id.bdf_ext[0] = '\0'; 976 dmi_walk(ath10k_core_check_bdfext, ar); 977 978 if (ar->id.bdf_ext[0] == '\0') 979 return -ENODATA; 980 981 return 0; 982 } 983 984 static int ath10k_core_check_dt(struct ath10k *ar) 985 { 986 struct device_node *node; 987 const char *variant = NULL; 988 989 node = ar->dev->of_node; 990 if (!node) 991 return -ENOENT; 992 993 of_property_read_string(node, "qcom,ath10k-calibration-variant", 994 &variant); 995 if (!variant) 996 return -ENODATA; 997 998 if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0) 999 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1000 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 1001 variant); 1002 1003 return 0; 1004 } 1005 1006 static int ath10k_download_and_run_otp(struct ath10k *ar) 1007 { 1008 u32 result, address = ar->hw_params.patch_load_addr; 1009 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 1010 int ret; 1011 1012 ret = ath10k_download_board_data(ar, 1013 ar->running_fw->board_data, 1014 ar->running_fw->board_len); 1015 if (ret) { 1016 ath10k_err(ar, "failed to download board data: %d\n", ret); 1017 return ret; 1018 } 1019 1020 /* OTP is optional */ 1021 1022 if (!ar->running_fw->fw_file.otp_data || 1023 !ar->running_fw->fw_file.otp_len) { 1024 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n", 1025 ar->running_fw->fw_file.otp_data, 1026 ar->running_fw->fw_file.otp_len); 1027 return 0; 1028 } 1029 1030 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 1031 address, ar->running_fw->fw_file.otp_len); 1032 1033 ret = ath10k_bmi_fast_download(ar, address, 1034 ar->running_fw->fw_file.otp_data, 1035 ar->running_fw->fw_file.otp_len); 1036 if (ret) { 1037 ath10k_err(ar, "could not write otp (%d)\n", ret); 1038 return ret; 1039 } 1040 1041 /* As of now pre-cal is valid for 10_4 variants */ 1042 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 1043 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 1044 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL; 1045 1046 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 1047 if (ret) { 1048 ath10k_err(ar, "could not execute otp (%d)\n", ret); 1049 return ret; 1050 } 1051 1052 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 1053 1054 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 1055 ar->running_fw->fw_file.fw_features)) && 1056 result != 0) { 1057 ath10k_err(ar, "otp calibration failed: %d", result); 1058 return -EINVAL; 1059 } 1060 1061 return 0; 1062 } 1063 1064 static int ath10k_download_fw(struct ath10k *ar) 1065 { 1066 u32 address, data_len; 1067 const void *data; 1068 int ret; 1069 1070 address = ar->hw_params.patch_load_addr; 1071 1072 data = ar->running_fw->fw_file.firmware_data; 1073 data_len = ar->running_fw->fw_file.firmware_len; 1074 1075 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file); 1076 if (ret) { 1077 ath10k_err(ar, "failed to configure fw code swap: %d\n", 1078 ret); 1079 return ret; 1080 } 1081 1082 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1083 "boot uploading firmware image %pK len %d\n", 1084 data, data_len); 1085 1086 ret = ath10k_bmi_fast_download(ar, address, data, data_len); 1087 if (ret) { 1088 ath10k_err(ar, "failed to download firmware: %d\n", 1089 ret); 1090 return ret; 1091 } 1092 1093 return ret; 1094 } 1095 1096 static void ath10k_core_free_board_files(struct ath10k *ar) 1097 { 1098 if (!IS_ERR(ar->normal_mode_fw.board)) 1099 release_firmware(ar->normal_mode_fw.board); 1100 1101 ar->normal_mode_fw.board = NULL; 1102 ar->normal_mode_fw.board_data = NULL; 1103 ar->normal_mode_fw.board_len = 0; 1104 } 1105 1106 static void ath10k_core_free_firmware_files(struct ath10k *ar) 1107 { 1108 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware)) 1109 release_firmware(ar->normal_mode_fw.fw_file.firmware); 1110 1111 if (!IS_ERR(ar->cal_file)) 1112 release_firmware(ar->cal_file); 1113 1114 if (!IS_ERR(ar->pre_cal_file)) 1115 release_firmware(ar->pre_cal_file); 1116 1117 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file); 1118 1119 ar->normal_mode_fw.fw_file.otp_data = NULL; 1120 ar->normal_mode_fw.fw_file.otp_len = 0; 1121 1122 ar->normal_mode_fw.fw_file.firmware = NULL; 1123 ar->normal_mode_fw.fw_file.firmware_data = NULL; 1124 ar->normal_mode_fw.fw_file.firmware_len = 0; 1125 1126 ar->cal_file = NULL; 1127 ar->pre_cal_file = NULL; 1128 } 1129 1130 static int ath10k_fetch_cal_file(struct ath10k *ar) 1131 { 1132 char filename[100]; 1133 1134 /* pre-cal-<bus>-<id>.bin */ 1135 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin", 1136 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1137 1138 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1139 if (!IS_ERR(ar->pre_cal_file)) 1140 goto success; 1141 1142 /* cal-<bus>-<id>.bin */ 1143 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 1144 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1145 1146 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1147 if (IS_ERR(ar->cal_file)) 1148 /* calibration file is optional, don't print any warnings */ 1149 return PTR_ERR(ar->cal_file); 1150 success: 1151 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 1152 ATH10K_FW_DIR, filename); 1153 1154 return 0; 1155 } 1156 1157 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar) 1158 { 1159 if (!ar->hw_params.fw.board) { 1160 ath10k_err(ar, "failed to find board file fw entry\n"); 1161 return -EINVAL; 1162 } 1163 1164 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1165 ar->hw_params.fw.dir, 1166 ar->hw_params.fw.board); 1167 if (IS_ERR(ar->normal_mode_fw.board)) 1168 return PTR_ERR(ar->normal_mode_fw.board); 1169 1170 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data; 1171 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size; 1172 1173 return 0; 1174 } 1175 1176 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, 1177 const void *buf, size_t buf_len, 1178 const char *boardname) 1179 { 1180 const struct ath10k_fw_ie *hdr; 1181 bool name_match_found; 1182 int ret, board_ie_id; 1183 size_t board_ie_len; 1184 const void *board_ie_data; 1185 1186 name_match_found = false; 1187 1188 /* go through ATH10K_BD_IE_BOARD_ elements */ 1189 while (buf_len > sizeof(struct ath10k_fw_ie)) { 1190 hdr = buf; 1191 board_ie_id = le32_to_cpu(hdr->id); 1192 board_ie_len = le32_to_cpu(hdr->len); 1193 board_ie_data = hdr->data; 1194 1195 buf_len -= sizeof(*hdr); 1196 buf += sizeof(*hdr); 1197 1198 if (buf_len < ALIGN(board_ie_len, 4)) { 1199 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", 1200 buf_len, ALIGN(board_ie_len, 4)); 1201 ret = -EINVAL; 1202 goto out; 1203 } 1204 1205 switch (board_ie_id) { 1206 case ATH10K_BD_IE_BOARD_NAME: 1207 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", 1208 board_ie_data, board_ie_len); 1209 1210 if (board_ie_len != strlen(boardname)) 1211 break; 1212 1213 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 1214 if (ret) 1215 break; 1216 1217 name_match_found = true; 1218 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1219 "boot found match for name '%s'", 1220 boardname); 1221 break; 1222 case ATH10K_BD_IE_BOARD_DATA: 1223 if (!name_match_found) 1224 /* no match found */ 1225 break; 1226 1227 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1228 "boot found board data for '%s'", 1229 boardname); 1230 1231 ar->normal_mode_fw.board_data = board_ie_data; 1232 ar->normal_mode_fw.board_len = board_ie_len; 1233 1234 ret = 0; 1235 goto out; 1236 default: 1237 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", 1238 board_ie_id); 1239 break; 1240 } 1241 1242 /* jump over the padding */ 1243 board_ie_len = ALIGN(board_ie_len, 4); 1244 1245 buf_len -= board_ie_len; 1246 buf += board_ie_len; 1247 } 1248 1249 /* no match found */ 1250 ret = -ENOENT; 1251 1252 out: 1253 return ret; 1254 } 1255 1256 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, 1257 const char *boardname, 1258 const char *filename) 1259 { 1260 size_t len, magic_len, ie_len; 1261 struct ath10k_fw_ie *hdr; 1262 const u8 *data; 1263 int ret, ie_id; 1264 1265 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1266 ar->hw_params.fw.dir, 1267 filename); 1268 if (IS_ERR(ar->normal_mode_fw.board)) 1269 return PTR_ERR(ar->normal_mode_fw.board); 1270 1271 data = ar->normal_mode_fw.board->data; 1272 len = ar->normal_mode_fw.board->size; 1273 1274 /* magic has extra null byte padded */ 1275 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; 1276 if (len < magic_len) { 1277 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", 1278 ar->hw_params.fw.dir, filename, len); 1279 ret = -EINVAL; 1280 goto err; 1281 } 1282 1283 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { 1284 ath10k_err(ar, "found invalid board magic\n"); 1285 ret = -EINVAL; 1286 goto err; 1287 } 1288 1289 /* magic is padded to 4 bytes */ 1290 magic_len = ALIGN(magic_len, 4); 1291 if (len < magic_len) { 1292 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", 1293 ar->hw_params.fw.dir, filename, len); 1294 ret = -EINVAL; 1295 goto err; 1296 } 1297 1298 data += magic_len; 1299 len -= magic_len; 1300 1301 while (len > sizeof(struct ath10k_fw_ie)) { 1302 hdr = (struct ath10k_fw_ie *)data; 1303 ie_id = le32_to_cpu(hdr->id); 1304 ie_len = le32_to_cpu(hdr->len); 1305 1306 len -= sizeof(*hdr); 1307 data = hdr->data; 1308 1309 if (len < ALIGN(ie_len, 4)) { 1310 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", 1311 ie_id, ie_len, len); 1312 ret = -EINVAL; 1313 goto err; 1314 } 1315 1316 switch (ie_id) { 1317 case ATH10K_BD_IE_BOARD: 1318 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1319 boardname); 1320 if (ret == -ENOENT && ar->id.bdf_ext[0] != '\0') { 1321 /* try default bdf if variant was not found */ 1322 char *s, *v = ",variant="; 1323 char boardname2[100]; 1324 1325 strlcpy(boardname2, boardname, 1326 sizeof(boardname2)); 1327 1328 s = strstr(boardname2, v); 1329 if (s) 1330 *s = '\0'; /* strip ",variant=%s" */ 1331 1332 ret = ath10k_core_parse_bd_ie_board(ar, data, 1333 ie_len, 1334 boardname2); 1335 } 1336 1337 if (ret == -ENOENT) 1338 /* no match found, continue */ 1339 break; 1340 else if (ret) 1341 /* there was an error, bail out */ 1342 goto err; 1343 1344 /* board data found */ 1345 goto out; 1346 } 1347 1348 /* jump over the padding */ 1349 ie_len = ALIGN(ie_len, 4); 1350 1351 len -= ie_len; 1352 data += ie_len; 1353 } 1354 1355 out: 1356 if (!ar->normal_mode_fw.board_data || !ar->normal_mode_fw.board_len) { 1357 ath10k_err(ar, 1358 "failed to fetch board data for %s from %s/%s\n", 1359 boardname, ar->hw_params.fw.dir, filename); 1360 ret = -ENODATA; 1361 goto err; 1362 } 1363 1364 return 0; 1365 1366 err: 1367 ath10k_core_free_board_files(ar); 1368 return ret; 1369 } 1370 1371 static int ath10k_core_create_board_name(struct ath10k *ar, char *name, 1372 size_t name_len) 1373 { 1374 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */ 1375 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 }; 1376 1377 if (ar->id.bdf_ext[0] != '\0') 1378 scnprintf(variant, sizeof(variant), ",variant=%s", 1379 ar->id.bdf_ext); 1380 1381 if (ar->id.bmi_ids_valid) { 1382 scnprintf(name, name_len, 1383 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s", 1384 ath10k_bus_str(ar->hif.bus), 1385 ar->id.bmi_chip_id, 1386 ar->id.bmi_board_id, variant); 1387 goto out; 1388 } 1389 1390 scnprintf(name, name_len, 1391 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s", 1392 ath10k_bus_str(ar->hif.bus), 1393 ar->id.vendor, ar->id.device, 1394 ar->id.subsystem_vendor, ar->id.subsystem_device, variant); 1395 out: 1396 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); 1397 1398 return 0; 1399 } 1400 1401 static int ath10k_core_fetch_board_file(struct ath10k *ar) 1402 { 1403 char boardname[100]; 1404 int ret; 1405 1406 ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname)); 1407 if (ret) { 1408 ath10k_err(ar, "failed to create board name: %d", ret); 1409 return ret; 1410 } 1411 1412 ar->bd_api = 2; 1413 ret = ath10k_core_fetch_board_data_api_n(ar, boardname, 1414 ATH10K_BOARD_API2_FILE); 1415 if (!ret) 1416 goto success; 1417 1418 ar->bd_api = 1; 1419 ret = ath10k_core_fetch_board_data_api_1(ar); 1420 if (ret) { 1421 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n", 1422 ar->hw_params.fw.dir); 1423 return ret; 1424 } 1425 1426 success: 1427 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); 1428 return 0; 1429 } 1430 1431 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1432 struct ath10k_fw_file *fw_file) 1433 { 1434 size_t magic_len, len, ie_len; 1435 int ie_id, i, index, bit, ret; 1436 struct ath10k_fw_ie *hdr; 1437 const u8 *data; 1438 __le32 *timestamp, *version; 1439 1440 /* first fetch the firmware file (firmware-*.bin) */ 1441 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1442 name); 1443 if (IS_ERR(fw_file->firmware)) 1444 return PTR_ERR(fw_file->firmware); 1445 1446 data = fw_file->firmware->data; 1447 len = fw_file->firmware->size; 1448 1449 /* magic also includes the null byte, check that as well */ 1450 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 1451 1452 if (len < magic_len) { 1453 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 1454 ar->hw_params.fw.dir, name, len); 1455 ret = -EINVAL; 1456 goto err; 1457 } 1458 1459 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 1460 ath10k_err(ar, "invalid firmware magic\n"); 1461 ret = -EINVAL; 1462 goto err; 1463 } 1464 1465 /* jump over the padding */ 1466 magic_len = ALIGN(magic_len, 4); 1467 1468 len -= magic_len; 1469 data += magic_len; 1470 1471 /* loop elements */ 1472 while (len > sizeof(struct ath10k_fw_ie)) { 1473 hdr = (struct ath10k_fw_ie *)data; 1474 1475 ie_id = le32_to_cpu(hdr->id); 1476 ie_len = le32_to_cpu(hdr->len); 1477 1478 len -= sizeof(*hdr); 1479 data += sizeof(*hdr); 1480 1481 if (len < ie_len) { 1482 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 1483 ie_id, len, ie_len); 1484 ret = -EINVAL; 1485 goto err; 1486 } 1487 1488 switch (ie_id) { 1489 case ATH10K_FW_IE_FW_VERSION: 1490 if (ie_len > sizeof(fw_file->fw_version) - 1) 1491 break; 1492 1493 memcpy(fw_file->fw_version, data, ie_len); 1494 fw_file->fw_version[ie_len] = '\0'; 1495 1496 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1497 "found fw version %s\n", 1498 fw_file->fw_version); 1499 break; 1500 case ATH10K_FW_IE_TIMESTAMP: 1501 if (ie_len != sizeof(u32)) 1502 break; 1503 1504 timestamp = (__le32 *)data; 1505 1506 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 1507 le32_to_cpup(timestamp)); 1508 break; 1509 case ATH10K_FW_IE_FEATURES: 1510 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1511 "found firmware features ie (%zd B)\n", 1512 ie_len); 1513 1514 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 1515 index = i / 8; 1516 bit = i % 8; 1517 1518 if (index == ie_len) 1519 break; 1520 1521 if (data[index] & (1 << bit)) { 1522 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1523 "Enabling feature bit: %i\n", 1524 i); 1525 __set_bit(i, fw_file->fw_features); 1526 } 1527 } 1528 1529 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 1530 fw_file->fw_features, 1531 sizeof(fw_file->fw_features)); 1532 break; 1533 case ATH10K_FW_IE_FW_IMAGE: 1534 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1535 "found fw image ie (%zd B)\n", 1536 ie_len); 1537 1538 fw_file->firmware_data = data; 1539 fw_file->firmware_len = ie_len; 1540 1541 break; 1542 case ATH10K_FW_IE_OTP_IMAGE: 1543 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1544 "found otp image ie (%zd B)\n", 1545 ie_len); 1546 1547 fw_file->otp_data = data; 1548 fw_file->otp_len = ie_len; 1549 1550 break; 1551 case ATH10K_FW_IE_WMI_OP_VERSION: 1552 if (ie_len != sizeof(u32)) 1553 break; 1554 1555 version = (__le32 *)data; 1556 1557 fw_file->wmi_op_version = le32_to_cpup(version); 1558 1559 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 1560 fw_file->wmi_op_version); 1561 break; 1562 case ATH10K_FW_IE_HTT_OP_VERSION: 1563 if (ie_len != sizeof(u32)) 1564 break; 1565 1566 version = (__le32 *)data; 1567 1568 fw_file->htt_op_version = le32_to_cpup(version); 1569 1570 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 1571 fw_file->htt_op_version); 1572 break; 1573 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 1574 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1575 "found fw code swap image ie (%zd B)\n", 1576 ie_len); 1577 fw_file->codeswap_data = data; 1578 fw_file->codeswap_len = ie_len; 1579 break; 1580 default: 1581 ath10k_warn(ar, "Unknown FW IE: %u\n", 1582 le32_to_cpu(hdr->id)); 1583 break; 1584 } 1585 1586 /* jump over the padding */ 1587 ie_len = ALIGN(ie_len, 4); 1588 1589 len -= ie_len; 1590 data += ie_len; 1591 } 1592 1593 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) && 1594 (!fw_file->firmware_data || !fw_file->firmware_len)) { 1595 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 1596 ar->hw_params.fw.dir, name); 1597 ret = -ENOMEDIUM; 1598 goto err; 1599 } 1600 1601 return 0; 1602 1603 err: 1604 ath10k_core_free_firmware_files(ar); 1605 return ret; 1606 } 1607 1608 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name, 1609 size_t fw_name_len, int fw_api) 1610 { 1611 switch (ar->hif.bus) { 1612 case ATH10K_BUS_SDIO: 1613 case ATH10K_BUS_USB: 1614 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin", 1615 ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus), 1616 fw_api); 1617 break; 1618 case ATH10K_BUS_PCI: 1619 case ATH10K_BUS_AHB: 1620 case ATH10K_BUS_SNOC: 1621 scnprintf(fw_name, fw_name_len, "%s-%d.bin", 1622 ATH10K_FW_FILE_BASE, fw_api); 1623 break; 1624 } 1625 } 1626 1627 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 1628 { 1629 int ret, i; 1630 char fw_name[100]; 1631 1632 /* calibration file is optional, don't check for any errors */ 1633 ath10k_fetch_cal_file(ar); 1634 1635 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) { 1636 ar->fw_api = i; 1637 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", 1638 ar->fw_api); 1639 1640 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api); 1641 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name, 1642 &ar->normal_mode_fw.fw_file); 1643 if (!ret) 1644 goto success; 1645 } 1646 1647 /* we end up here if we couldn't fetch any firmware */ 1648 1649 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d", 1650 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir, 1651 ret); 1652 1653 return ret; 1654 1655 success: 1656 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1657 1658 return 0; 1659 } 1660 1661 static int ath10k_core_pre_cal_download(struct ath10k *ar) 1662 { 1663 int ret; 1664 1665 ret = ath10k_download_cal_file(ar, ar->pre_cal_file); 1666 if (ret == 0) { 1667 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE; 1668 goto success; 1669 } 1670 1671 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1672 "boot did not find a pre calibration file, try DT next: %d\n", 1673 ret); 1674 1675 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data"); 1676 if (ret) { 1677 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1678 "unable to load pre cal data from DT: %d\n", ret); 1679 return ret; 1680 } 1681 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT; 1682 1683 success: 1684 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1685 ath10k_cal_mode_str(ar->cal_mode)); 1686 1687 return 0; 1688 } 1689 1690 static int ath10k_core_pre_cal_config(struct ath10k *ar) 1691 { 1692 int ret; 1693 1694 ret = ath10k_core_pre_cal_download(ar); 1695 if (ret) { 1696 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1697 "failed to load pre cal data: %d\n", ret); 1698 return ret; 1699 } 1700 1701 ret = ath10k_core_get_board_id_from_otp(ar); 1702 if (ret) { 1703 ath10k_err(ar, "failed to get board id: %d\n", ret); 1704 return ret; 1705 } 1706 1707 ret = ath10k_download_and_run_otp(ar); 1708 if (ret) { 1709 ath10k_err(ar, "failed to run otp: %d\n", ret); 1710 return ret; 1711 } 1712 1713 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1714 "pre cal configuration done successfully\n"); 1715 1716 return 0; 1717 } 1718 1719 static int ath10k_download_cal_data(struct ath10k *ar) 1720 { 1721 int ret; 1722 1723 ret = ath10k_core_pre_cal_config(ar); 1724 if (ret == 0) 1725 return 0; 1726 1727 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1728 "pre cal download procedure failed, try cal file: %d\n", 1729 ret); 1730 1731 ret = ath10k_download_cal_file(ar, ar->cal_file); 1732 if (ret == 0) { 1733 ar->cal_mode = ATH10K_CAL_MODE_FILE; 1734 goto done; 1735 } 1736 1737 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1738 "boot did not find a calibration file, try DT next: %d\n", 1739 ret); 1740 1741 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data"); 1742 if (ret == 0) { 1743 ar->cal_mode = ATH10K_CAL_MODE_DT; 1744 goto done; 1745 } 1746 1747 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1748 "boot did not find DT entry, try target EEPROM next: %d\n", 1749 ret); 1750 1751 ret = ath10k_download_cal_eeprom(ar); 1752 if (ret == 0) { 1753 ar->cal_mode = ATH10K_CAL_MODE_EEPROM; 1754 goto done; 1755 } 1756 1757 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1758 "boot did not find target EEPROM entry, try OTP next: %d\n", 1759 ret); 1760 1761 ret = ath10k_download_and_run_otp(ar); 1762 if (ret) { 1763 ath10k_err(ar, "failed to run otp: %d\n", ret); 1764 return ret; 1765 } 1766 1767 ar->cal_mode = ATH10K_CAL_MODE_OTP; 1768 1769 done: 1770 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1771 ath10k_cal_mode_str(ar->cal_mode)); 1772 return 0; 1773 } 1774 1775 static int ath10k_init_uart(struct ath10k *ar) 1776 { 1777 int ret; 1778 1779 /* 1780 * Explicitly setting UART prints to zero as target turns it on 1781 * based on scratch registers. 1782 */ 1783 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 1784 if (ret) { 1785 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 1786 return ret; 1787 } 1788 1789 if (!uart_print) 1790 return 0; 1791 1792 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 1793 if (ret) { 1794 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1795 return ret; 1796 } 1797 1798 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 1799 if (ret) { 1800 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1801 return ret; 1802 } 1803 1804 /* Set the UART baud rate to 19200. */ 1805 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 1806 if (ret) { 1807 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 1808 return ret; 1809 } 1810 1811 ath10k_info(ar, "UART prints enabled\n"); 1812 return 0; 1813 } 1814 1815 static int ath10k_init_hw_params(struct ath10k *ar) 1816 { 1817 const struct ath10k_hw_params *uninitialized_var(hw_params); 1818 int i; 1819 1820 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 1821 hw_params = &ath10k_hw_params_list[i]; 1822 1823 if (hw_params->id == ar->target_version && 1824 hw_params->dev_id == ar->dev_id) 1825 break; 1826 } 1827 1828 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 1829 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 1830 ar->target_version); 1831 return -EINVAL; 1832 } 1833 1834 ar->hw_params = *hw_params; 1835 1836 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 1837 ar->hw_params.name, ar->target_version); 1838 1839 return 0; 1840 } 1841 1842 static void ath10k_core_restart(struct work_struct *work) 1843 { 1844 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 1845 int ret; 1846 1847 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1848 1849 /* Place a barrier to make sure the compiler doesn't reorder 1850 * CRASH_FLUSH and calling other functions. 1851 */ 1852 barrier(); 1853 1854 ieee80211_stop_queues(ar->hw); 1855 ath10k_drain_tx(ar); 1856 complete(&ar->scan.started); 1857 complete(&ar->scan.completed); 1858 complete(&ar->scan.on_channel); 1859 complete(&ar->offchan_tx_completed); 1860 complete(&ar->install_key_done); 1861 complete(&ar->vdev_setup_done); 1862 complete(&ar->thermal.wmi_sync); 1863 complete(&ar->bss_survey_done); 1864 wake_up(&ar->htt.empty_tx_wq); 1865 wake_up(&ar->wmi.tx_credits_wq); 1866 wake_up(&ar->peer_mapping_wq); 1867 1868 /* TODO: We can have one instance of cancelling coverage_class_work by 1869 * moving it to ath10k_halt(), so that both stop() and restart() would 1870 * call that but it takes conf_mutex() and if we call cancel_work_sync() 1871 * with conf_mutex it will deadlock. 1872 */ 1873 cancel_work_sync(&ar->set_coverage_class_work); 1874 1875 mutex_lock(&ar->conf_mutex); 1876 1877 switch (ar->state) { 1878 case ATH10K_STATE_ON: 1879 ar->state = ATH10K_STATE_RESTARTING; 1880 ath10k_halt(ar); 1881 ath10k_scan_finish(ar); 1882 ieee80211_restart_hw(ar->hw); 1883 break; 1884 case ATH10K_STATE_OFF: 1885 /* this can happen if driver is being unloaded 1886 * or if the crash happens during FW probing 1887 */ 1888 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 1889 break; 1890 case ATH10K_STATE_RESTARTING: 1891 /* hw restart might be requested from multiple places */ 1892 break; 1893 case ATH10K_STATE_RESTARTED: 1894 ar->state = ATH10K_STATE_WEDGED; 1895 /* fall through */ 1896 case ATH10K_STATE_WEDGED: 1897 ath10k_warn(ar, "device is wedged, will not restart\n"); 1898 break; 1899 case ATH10K_STATE_UTF: 1900 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 1901 break; 1902 } 1903 1904 mutex_unlock(&ar->conf_mutex); 1905 1906 ret = ath10k_coredump_submit(ar); 1907 if (ret) 1908 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d", 1909 ret); 1910 } 1911 1912 static void ath10k_core_set_coverage_class_work(struct work_struct *work) 1913 { 1914 struct ath10k *ar = container_of(work, struct ath10k, 1915 set_coverage_class_work); 1916 1917 if (ar->hw_params.hw_ops->set_coverage_class) 1918 ar->hw_params.hw_ops->set_coverage_class(ar, -1); 1919 } 1920 1921 static int ath10k_core_init_firmware_features(struct ath10k *ar) 1922 { 1923 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 1924 1925 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) && 1926 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 1927 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 1928 return -EINVAL; 1929 } 1930 1931 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 1932 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 1933 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version); 1934 return -EINVAL; 1935 } 1936 1937 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 1938 switch (ath10k_cryptmode_param) { 1939 case ATH10K_CRYPT_MODE_HW: 1940 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1941 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1942 break; 1943 case ATH10K_CRYPT_MODE_SW: 1944 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1945 fw_file->fw_features)) { 1946 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 1947 return -EINVAL; 1948 } 1949 1950 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1951 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1952 break; 1953 default: 1954 ath10k_info(ar, "invalid cryptmode: %d\n", 1955 ath10k_cryptmode_param); 1956 return -EINVAL; 1957 } 1958 1959 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 1960 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 1961 1962 if (rawmode) { 1963 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1964 fw_file->fw_features)) { 1965 ath10k_err(ar, "rawmode = 1 requires support from firmware"); 1966 return -EINVAL; 1967 } 1968 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1969 } 1970 1971 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 1972 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 1973 1974 /* Workaround: 1975 * 1976 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 1977 * and causes enormous performance issues (malformed frames, 1978 * etc). 1979 * 1980 * Disabling A-MSDU makes RAW mode stable with heavy traffic 1981 * albeit a bit slower compared to regular operation. 1982 */ 1983 ar->htt.max_num_amsdu = 1; 1984 } 1985 1986 /* Backwards compatibility for firmwares without 1987 * ATH10K_FW_IE_WMI_OP_VERSION. 1988 */ 1989 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 1990 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 1991 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 1992 fw_file->fw_features)) 1993 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 1994 else 1995 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 1996 } else { 1997 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 1998 } 1999 } 2000 2001 switch (fw_file->wmi_op_version) { 2002 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2003 ar->max_num_peers = TARGET_NUM_PEERS; 2004 ar->max_num_stations = TARGET_NUM_STATIONS; 2005 ar->max_num_vdevs = TARGET_NUM_VDEVS; 2006 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 2007 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 2008 WMI_STAT_PEER; 2009 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2010 break; 2011 case ATH10K_FW_WMI_OP_VERSION_10_1: 2012 case ATH10K_FW_WMI_OP_VERSION_10_2: 2013 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2014 if (ath10k_peer_stats_enabled(ar)) { 2015 ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS; 2016 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS; 2017 } else { 2018 ar->max_num_peers = TARGET_10X_NUM_PEERS; 2019 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 2020 } 2021 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 2022 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 2023 ar->fw_stats_req_mask = WMI_STAT_PEER; 2024 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2025 break; 2026 case ATH10K_FW_WMI_OP_VERSION_TLV: 2027 ar->max_num_peers = TARGET_TLV_NUM_PEERS; 2028 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 2029 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 2030 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 2031 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 2032 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 2033 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 2034 WMI_STAT_PEER; 2035 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2036 break; 2037 case ATH10K_FW_WMI_OP_VERSION_10_4: 2038 ar->max_num_peers = TARGET_10_4_NUM_PEERS; 2039 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 2040 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 2041 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 2042 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 2043 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER | 2044 WMI_10_4_STAT_PEER_EXTD | 2045 WMI_10_4_STAT_VDEV_EXTD; 2046 ar->max_spatial_stream = ar->hw_params.max_spatial_stream; 2047 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS; 2048 2049 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, 2050 fw_file->fw_features)) 2051 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC; 2052 else 2053 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 2054 break; 2055 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2056 case ATH10K_FW_WMI_OP_VERSION_MAX: 2057 WARN_ON(1); 2058 return -EINVAL; 2059 } 2060 2061 /* Backwards compatibility for firmwares without 2062 * ATH10K_FW_IE_HTT_OP_VERSION. 2063 */ 2064 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 2065 switch (fw_file->wmi_op_version) { 2066 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2067 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 2068 break; 2069 case ATH10K_FW_WMI_OP_VERSION_10_1: 2070 case ATH10K_FW_WMI_OP_VERSION_10_2: 2071 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2072 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 2073 break; 2074 case ATH10K_FW_WMI_OP_VERSION_TLV: 2075 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 2076 break; 2077 case ATH10K_FW_WMI_OP_VERSION_10_4: 2078 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2079 case ATH10K_FW_WMI_OP_VERSION_MAX: 2080 ath10k_err(ar, "htt op version not found from fw meta data"); 2081 return -EINVAL; 2082 } 2083 } 2084 2085 return 0; 2086 } 2087 2088 static int ath10k_core_reset_rx_filter(struct ath10k *ar) 2089 { 2090 int ret; 2091 int vdev_id; 2092 int vdev_type; 2093 int vdev_subtype; 2094 const u8 *vdev_addr; 2095 2096 vdev_id = 0; 2097 vdev_type = WMI_VDEV_TYPE_STA; 2098 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE); 2099 vdev_addr = ar->mac_addr; 2100 2101 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype, 2102 vdev_addr); 2103 if (ret) { 2104 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret); 2105 return ret; 2106 } 2107 2108 ret = ath10k_wmi_vdev_delete(ar, vdev_id); 2109 if (ret) { 2110 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret); 2111 return ret; 2112 } 2113 2114 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be 2115 * serialized properly implicitly. 2116 * 2117 * Moreover (most) WMI commands have no explicit acknowledges. It is 2118 * possible to infer it implicitly by poking firmware with echo 2119 * command - getting a reply means all preceding comments have been 2120 * (mostly) processed. 2121 * 2122 * In case of vdev create/delete this is sufficient. 2123 * 2124 * Without this it's possible to end up with a race when HTT Rx ring is 2125 * started before vdev create/delete hack is complete allowing a short 2126 * window of opportunity to receive (and Tx ACK) a bunch of frames. 2127 */ 2128 ret = ath10k_wmi_barrier(ar); 2129 if (ret) { 2130 ath10k_err(ar, "failed to ping firmware: %d\n", ret); 2131 return ret; 2132 } 2133 2134 return 0; 2135 } 2136 2137 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 2138 const struct ath10k_fw_components *fw) 2139 { 2140 int status; 2141 u32 val; 2142 2143 lockdep_assert_held(&ar->conf_mutex); 2144 2145 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2146 2147 ar->running_fw = fw; 2148 2149 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2150 ar->running_fw->fw_file.fw_features)) { 2151 ath10k_bmi_start(ar); 2152 2153 if (ath10k_init_configure_target(ar)) { 2154 status = -EINVAL; 2155 goto err; 2156 } 2157 2158 status = ath10k_download_cal_data(ar); 2159 if (status) 2160 goto err; 2161 2162 /* Some of of qca988x solutions are having global reset issue 2163 * during target initialization. Bypassing PLL setting before 2164 * downloading firmware and letting the SoC run on REF_CLK is 2165 * fixing the problem. Corresponding firmware change is also 2166 * needed to set the clock source once the target is 2167 * initialized. 2168 */ 2169 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 2170 ar->running_fw->fw_file.fw_features)) { 2171 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 2172 if (status) { 2173 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 2174 status); 2175 goto err; 2176 } 2177 } 2178 2179 status = ath10k_download_fw(ar); 2180 if (status) 2181 goto err; 2182 2183 status = ath10k_init_uart(ar); 2184 if (status) 2185 goto err; 2186 2187 if (ar->hif.bus == ATH10K_BUS_SDIO) 2188 ath10k_init_sdio(ar); 2189 } 2190 2191 ar->htc.htc_ops.target_send_suspend_complete = 2192 ath10k_send_suspend_complete; 2193 2194 status = ath10k_htc_init(ar); 2195 if (status) { 2196 ath10k_err(ar, "could not init HTC (%d)\n", status); 2197 goto err; 2198 } 2199 2200 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2201 ar->running_fw->fw_file.fw_features)) { 2202 status = ath10k_bmi_done(ar); 2203 if (status) 2204 goto err; 2205 } 2206 2207 status = ath10k_wmi_attach(ar); 2208 if (status) { 2209 ath10k_err(ar, "WMI attach failed: %d\n", status); 2210 goto err; 2211 } 2212 2213 status = ath10k_htt_init(ar); 2214 if (status) { 2215 ath10k_err(ar, "failed to init htt: %d\n", status); 2216 goto err_wmi_detach; 2217 } 2218 2219 status = ath10k_htt_tx_start(&ar->htt); 2220 if (status) { 2221 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 2222 goto err_wmi_detach; 2223 } 2224 2225 /* If firmware indicates Full Rx Reorder support it must be used in a 2226 * slightly different manner. Let HTT code know. 2227 */ 2228 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 2229 ar->wmi.svc_map)); 2230 2231 status = ath10k_htt_rx_alloc(&ar->htt); 2232 if (status) { 2233 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 2234 goto err_htt_tx_detach; 2235 } 2236 2237 status = ath10k_hif_start(ar); 2238 if (status) { 2239 ath10k_err(ar, "could not start HIF: %d\n", status); 2240 goto err_htt_rx_detach; 2241 } 2242 2243 status = ath10k_htc_wait_target(&ar->htc); 2244 if (status) { 2245 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 2246 goto err_hif_stop; 2247 } 2248 2249 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2250 status = ath10k_htt_connect(&ar->htt); 2251 if (status) { 2252 ath10k_err(ar, "failed to connect htt (%d)\n", status); 2253 goto err_hif_stop; 2254 } 2255 } 2256 2257 status = ath10k_wmi_connect(ar); 2258 if (status) { 2259 ath10k_err(ar, "could not connect wmi: %d\n", status); 2260 goto err_hif_stop; 2261 } 2262 2263 status = ath10k_htc_start(&ar->htc); 2264 if (status) { 2265 ath10k_err(ar, "failed to start htc: %d\n", status); 2266 goto err_hif_stop; 2267 } 2268 2269 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2270 status = ath10k_wmi_wait_for_service_ready(ar); 2271 if (status) { 2272 ath10k_warn(ar, "wmi service ready event not received"); 2273 goto err_hif_stop; 2274 } 2275 } 2276 2277 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 2278 ar->hw->wiphy->fw_version); 2279 2280 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) && 2281 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2282 val = 0; 2283 if (ath10k_peer_stats_enabled(ar)) 2284 val = WMI_10_4_PEER_STATS; 2285 2286 /* Enable vdev stats by default */ 2287 val |= WMI_10_4_VDEV_STATS; 2288 2289 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) 2290 val |= WMI_10_4_BSS_CHANNEL_INFO_64; 2291 2292 /* 10.4 firmware supports BT-Coex without reloading firmware 2293 * via pdev param. To support Bluetooth coexistence pdev param, 2294 * WMI_COEX_GPIO_SUPPORT of extended resource config should be 2295 * enabled always. 2296 */ 2297 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 2298 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 2299 ar->running_fw->fw_file.fw_features)) 2300 val |= WMI_10_4_COEX_GPIO_SUPPORT; 2301 2302 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, 2303 ar->wmi.svc_map)) 2304 val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY; 2305 2306 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, 2307 ar->wmi.svc_map)) 2308 val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA; 2309 2310 status = ath10k_mac_ext_resource_config(ar, val); 2311 if (status) { 2312 ath10k_err(ar, 2313 "failed to send ext resource cfg command : %d\n", 2314 status); 2315 goto err_hif_stop; 2316 } 2317 } 2318 2319 status = ath10k_wmi_cmd_init(ar); 2320 if (status) { 2321 ath10k_err(ar, "could not send WMI init command (%d)\n", 2322 status); 2323 goto err_hif_stop; 2324 } 2325 2326 status = ath10k_wmi_wait_for_unified_ready(ar); 2327 if (status) { 2328 ath10k_err(ar, "wmi unified ready event not received\n"); 2329 goto err_hif_stop; 2330 } 2331 2332 /* Some firmware revisions do not properly set up hardware rx filter 2333 * registers. 2334 * 2335 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK 2336 * is filled with 0s instead of 1s allowing HW to respond with ACKs to 2337 * any frames that matches MAC_PCU_RX_FILTER which is also 2338 * misconfigured to accept anything. 2339 * 2340 * The ADDR1 is programmed using internal firmware structure field and 2341 * can't be (easily/sanely) reached from the driver explicitly. It is 2342 * possible to implicitly make it correct by creating a dummy vdev and 2343 * then deleting it. 2344 */ 2345 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2346 status = ath10k_core_reset_rx_filter(ar); 2347 if (status) { 2348 ath10k_err(ar, 2349 "failed to reset rx filter: %d\n", status); 2350 goto err_hif_stop; 2351 } 2352 } 2353 2354 status = ath10k_htt_rx_ring_refill(ar); 2355 if (status) { 2356 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 2357 goto err_hif_stop; 2358 } 2359 2360 if (ar->max_num_vdevs >= 64) 2361 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL; 2362 else 2363 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 2364 2365 INIT_LIST_HEAD(&ar->arvifs); 2366 2367 /* we don't care about HTT in UTF mode */ 2368 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2369 status = ath10k_htt_setup(&ar->htt); 2370 if (status) { 2371 ath10k_err(ar, "failed to setup htt: %d\n", status); 2372 goto err_hif_stop; 2373 } 2374 } 2375 2376 status = ath10k_debug_start(ar); 2377 if (status) 2378 goto err_hif_stop; 2379 2380 return 0; 2381 2382 err_hif_stop: 2383 ath10k_hif_stop(ar); 2384 err_htt_rx_detach: 2385 ath10k_htt_rx_free(&ar->htt); 2386 err_htt_tx_detach: 2387 ath10k_htt_tx_free(&ar->htt); 2388 err_wmi_detach: 2389 ath10k_wmi_detach(ar); 2390 err: 2391 return status; 2392 } 2393 EXPORT_SYMBOL(ath10k_core_start); 2394 2395 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 2396 { 2397 int ret; 2398 unsigned long time_left; 2399 2400 reinit_completion(&ar->target_suspend); 2401 2402 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 2403 if (ret) { 2404 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 2405 return ret; 2406 } 2407 2408 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 2409 2410 if (!time_left) { 2411 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 2412 return -ETIMEDOUT; 2413 } 2414 2415 return 0; 2416 } 2417 2418 void ath10k_core_stop(struct ath10k *ar) 2419 { 2420 lockdep_assert_held(&ar->conf_mutex); 2421 ath10k_debug_stop(ar); 2422 2423 /* try to suspend target */ 2424 if (ar->state != ATH10K_STATE_RESTARTING && 2425 ar->state != ATH10K_STATE_UTF) 2426 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 2427 2428 ath10k_hif_stop(ar); 2429 ath10k_htt_tx_stop(&ar->htt); 2430 ath10k_htt_rx_free(&ar->htt); 2431 ath10k_wmi_detach(ar); 2432 } 2433 EXPORT_SYMBOL(ath10k_core_stop); 2434 2435 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 2436 * order to know what hw capabilities should be advertised to mac80211 it is 2437 * necessary to load the firmware (and tear it down immediately since start 2438 * hook will try to init it again) before registering 2439 */ 2440 static int ath10k_core_probe_fw(struct ath10k *ar) 2441 { 2442 struct bmi_target_info target_info; 2443 int ret = 0; 2444 2445 ret = ath10k_hif_power_up(ar); 2446 if (ret) { 2447 ath10k_err(ar, "could not power on hif bus (%d)\n", ret); 2448 return ret; 2449 } 2450 2451 switch (ar->hif.bus) { 2452 case ATH10K_BUS_SDIO: 2453 memset(&target_info, 0, sizeof(target_info)); 2454 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info); 2455 if (ret) { 2456 ath10k_err(ar, "could not get target info (%d)\n", ret); 2457 goto err_power_down; 2458 } 2459 ar->target_version = target_info.version; 2460 ar->hw->wiphy->hw_version = target_info.version; 2461 break; 2462 case ATH10K_BUS_PCI: 2463 case ATH10K_BUS_AHB: 2464 case ATH10K_BUS_USB: 2465 memset(&target_info, 0, sizeof(target_info)); 2466 ret = ath10k_bmi_get_target_info(ar, &target_info); 2467 if (ret) { 2468 ath10k_err(ar, "could not get target info (%d)\n", ret); 2469 goto err_power_down; 2470 } 2471 ar->target_version = target_info.version; 2472 ar->hw->wiphy->hw_version = target_info.version; 2473 break; 2474 case ATH10K_BUS_SNOC: 2475 break; 2476 default: 2477 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus); 2478 } 2479 2480 ret = ath10k_init_hw_params(ar); 2481 if (ret) { 2482 ath10k_err(ar, "could not get hw params (%d)\n", ret); 2483 goto err_power_down; 2484 } 2485 2486 ret = ath10k_core_fetch_firmware_files(ar); 2487 if (ret) { 2488 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 2489 goto err_power_down; 2490 } 2491 2492 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) != 2493 sizeof(ar->normal_mode_fw.fw_file.fw_version)); 2494 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version, 2495 sizeof(ar->hw->wiphy->fw_version)); 2496 2497 ath10k_debug_print_hwfw_info(ar); 2498 2499 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2500 ar->normal_mode_fw.fw_file.fw_features)) { 2501 ret = ath10k_core_pre_cal_download(ar); 2502 if (ret) { 2503 /* pre calibration data download is not necessary 2504 * for all the chipsets. Ignore failures and continue. 2505 */ 2506 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2507 "could not load pre cal data: %d\n", ret); 2508 } 2509 2510 ret = ath10k_core_get_board_id_from_otp(ar); 2511 if (ret && ret != -EOPNOTSUPP) { 2512 ath10k_err(ar, "failed to get board id from otp: %d\n", 2513 ret); 2514 goto err_free_firmware_files; 2515 } 2516 2517 ret = ath10k_core_check_smbios(ar); 2518 if (ret) 2519 ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n"); 2520 2521 ret = ath10k_core_check_dt(ar); 2522 if (ret) 2523 ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n"); 2524 2525 ret = ath10k_core_fetch_board_file(ar); 2526 if (ret) { 2527 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 2528 goto err_free_firmware_files; 2529 } 2530 2531 ath10k_debug_print_board_info(ar); 2532 } 2533 2534 ret = ath10k_core_init_firmware_features(ar); 2535 if (ret) { 2536 ath10k_err(ar, "fatal problem with firmware features: %d\n", 2537 ret); 2538 goto err_free_firmware_files; 2539 } 2540 2541 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2542 ar->normal_mode_fw.fw_file.fw_features)) { 2543 ret = ath10k_swap_code_seg_init(ar, 2544 &ar->normal_mode_fw.fw_file); 2545 if (ret) { 2546 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 2547 ret); 2548 goto err_free_firmware_files; 2549 } 2550 } 2551 2552 mutex_lock(&ar->conf_mutex); 2553 2554 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL, 2555 &ar->normal_mode_fw); 2556 if (ret) { 2557 ath10k_err(ar, "could not init core (%d)\n", ret); 2558 goto err_unlock; 2559 } 2560 2561 ath10k_debug_print_boot_info(ar); 2562 ath10k_core_stop(ar); 2563 2564 mutex_unlock(&ar->conf_mutex); 2565 2566 ath10k_hif_power_down(ar); 2567 return 0; 2568 2569 err_unlock: 2570 mutex_unlock(&ar->conf_mutex); 2571 2572 err_free_firmware_files: 2573 ath10k_core_free_firmware_files(ar); 2574 2575 err_power_down: 2576 ath10k_hif_power_down(ar); 2577 2578 return ret; 2579 } 2580 2581 static void ath10k_core_register_work(struct work_struct *work) 2582 { 2583 struct ath10k *ar = container_of(work, struct ath10k, register_work); 2584 int status; 2585 2586 /* peer stats are enabled by default */ 2587 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags); 2588 2589 status = ath10k_core_probe_fw(ar); 2590 if (status) { 2591 ath10k_err(ar, "could not probe fw (%d)\n", status); 2592 goto err; 2593 } 2594 2595 status = ath10k_mac_register(ar); 2596 if (status) { 2597 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 2598 goto err_release_fw; 2599 } 2600 2601 status = ath10k_coredump_register(ar); 2602 if (status) { 2603 ath10k_err(ar, "unable to register coredump\n"); 2604 goto err_unregister_mac; 2605 } 2606 2607 status = ath10k_debug_register(ar); 2608 if (status) { 2609 ath10k_err(ar, "unable to initialize debugfs\n"); 2610 goto err_unregister_coredump; 2611 } 2612 2613 status = ath10k_spectral_create(ar); 2614 if (status) { 2615 ath10k_err(ar, "failed to initialize spectral\n"); 2616 goto err_debug_destroy; 2617 } 2618 2619 status = ath10k_thermal_register(ar); 2620 if (status) { 2621 ath10k_err(ar, "could not register thermal device: %d\n", 2622 status); 2623 goto err_spectral_destroy; 2624 } 2625 2626 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 2627 return; 2628 2629 err_spectral_destroy: 2630 ath10k_spectral_destroy(ar); 2631 err_debug_destroy: 2632 ath10k_debug_destroy(ar); 2633 err_unregister_coredump: 2634 ath10k_coredump_unregister(ar); 2635 err_unregister_mac: 2636 ath10k_mac_unregister(ar); 2637 err_release_fw: 2638 ath10k_core_free_firmware_files(ar); 2639 err: 2640 /* TODO: It's probably a good idea to release device from the driver 2641 * but calling device_release_driver() here will cause a deadlock. 2642 */ 2643 return; 2644 } 2645 2646 int ath10k_core_register(struct ath10k *ar, u32 chip_id) 2647 { 2648 ar->chip_id = chip_id; 2649 queue_work(ar->workqueue, &ar->register_work); 2650 2651 return 0; 2652 } 2653 EXPORT_SYMBOL(ath10k_core_register); 2654 2655 void ath10k_core_unregister(struct ath10k *ar) 2656 { 2657 cancel_work_sync(&ar->register_work); 2658 2659 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 2660 return; 2661 2662 ath10k_thermal_unregister(ar); 2663 /* Stop spectral before unregistering from mac80211 to remove the 2664 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 2665 * would be already be free'd recursively, leading to a double free. 2666 */ 2667 ath10k_spectral_destroy(ar); 2668 2669 /* We must unregister from mac80211 before we stop HTC and HIF. 2670 * Otherwise we will fail to submit commands to FW and mac80211 will be 2671 * unhappy about callback failures. 2672 */ 2673 ath10k_mac_unregister(ar); 2674 2675 ath10k_testmode_destroy(ar); 2676 2677 ath10k_core_free_firmware_files(ar); 2678 ath10k_core_free_board_files(ar); 2679 2680 ath10k_debug_unregister(ar); 2681 } 2682 EXPORT_SYMBOL(ath10k_core_unregister); 2683 2684 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 2685 enum ath10k_bus bus, 2686 enum ath10k_hw_rev hw_rev, 2687 const struct ath10k_hif_ops *hif_ops) 2688 { 2689 struct ath10k *ar; 2690 int ret; 2691 2692 ar = ath10k_mac_create(priv_size); 2693 if (!ar) 2694 return NULL; 2695 2696 ar->ath_common.priv = ar; 2697 ar->ath_common.hw = ar->hw; 2698 ar->dev = dev; 2699 ar->hw_rev = hw_rev; 2700 ar->hif.ops = hif_ops; 2701 ar->hif.bus = bus; 2702 2703 switch (hw_rev) { 2704 case ATH10K_HW_QCA988X: 2705 case ATH10K_HW_QCA9887: 2706 ar->regs = &qca988x_regs; 2707 ar->hw_ce_regs = &qcax_ce_regs; 2708 ar->hw_values = &qca988x_values; 2709 break; 2710 case ATH10K_HW_QCA6174: 2711 case ATH10K_HW_QCA9377: 2712 ar->regs = &qca6174_regs; 2713 ar->hw_ce_regs = &qcax_ce_regs; 2714 ar->hw_values = &qca6174_values; 2715 break; 2716 case ATH10K_HW_QCA99X0: 2717 case ATH10K_HW_QCA9984: 2718 ar->regs = &qca99x0_regs; 2719 ar->hw_ce_regs = &qcax_ce_regs; 2720 ar->hw_values = &qca99x0_values; 2721 break; 2722 case ATH10K_HW_QCA9888: 2723 ar->regs = &qca99x0_regs; 2724 ar->hw_ce_regs = &qcax_ce_regs; 2725 ar->hw_values = &qca9888_values; 2726 break; 2727 case ATH10K_HW_QCA4019: 2728 ar->regs = &qca4019_regs; 2729 ar->hw_ce_regs = &qcax_ce_regs; 2730 ar->hw_values = &qca4019_values; 2731 break; 2732 case ATH10K_HW_WCN3990: 2733 ar->regs = &wcn3990_regs; 2734 ar->hw_ce_regs = &wcn3990_ce_regs; 2735 ar->hw_values = &wcn3990_values; 2736 break; 2737 default: 2738 ath10k_err(ar, "unsupported core hardware revision %d\n", 2739 hw_rev); 2740 ret = -ENOTSUPP; 2741 goto err_free_mac; 2742 } 2743 2744 init_completion(&ar->scan.started); 2745 init_completion(&ar->scan.completed); 2746 init_completion(&ar->scan.on_channel); 2747 init_completion(&ar->target_suspend); 2748 init_completion(&ar->wow.wakeup_completed); 2749 2750 init_completion(&ar->install_key_done); 2751 init_completion(&ar->vdev_setup_done); 2752 init_completion(&ar->thermal.wmi_sync); 2753 init_completion(&ar->bss_survey_done); 2754 2755 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 2756 2757 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 2758 if (!ar->workqueue) 2759 goto err_free_mac; 2760 2761 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 2762 if (!ar->workqueue_aux) 2763 goto err_free_wq; 2764 2765 mutex_init(&ar->conf_mutex); 2766 spin_lock_init(&ar->data_lock); 2767 spin_lock_init(&ar->txqs_lock); 2768 2769 INIT_LIST_HEAD(&ar->txqs); 2770 INIT_LIST_HEAD(&ar->peers); 2771 init_waitqueue_head(&ar->peer_mapping_wq); 2772 init_waitqueue_head(&ar->htt.empty_tx_wq); 2773 init_waitqueue_head(&ar->wmi.tx_credits_wq); 2774 2775 init_completion(&ar->offchan_tx_completed); 2776 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 2777 skb_queue_head_init(&ar->offchan_tx_queue); 2778 2779 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 2780 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 2781 2782 INIT_WORK(&ar->register_work, ath10k_core_register_work); 2783 INIT_WORK(&ar->restart_work, ath10k_core_restart); 2784 INIT_WORK(&ar->set_coverage_class_work, 2785 ath10k_core_set_coverage_class_work); 2786 2787 init_dummy_netdev(&ar->napi_dev); 2788 2789 ret = ath10k_coredump_create(ar); 2790 if (ret) 2791 goto err_free_aux_wq; 2792 2793 ret = ath10k_debug_create(ar); 2794 if (ret) 2795 goto err_free_coredump; 2796 2797 return ar; 2798 2799 err_free_coredump: 2800 ath10k_coredump_destroy(ar); 2801 2802 err_free_aux_wq: 2803 destroy_workqueue(ar->workqueue_aux); 2804 err_free_wq: 2805 destroy_workqueue(ar->workqueue); 2806 2807 err_free_mac: 2808 ath10k_mac_destroy(ar); 2809 2810 return NULL; 2811 } 2812 EXPORT_SYMBOL(ath10k_core_create); 2813 2814 void ath10k_core_destroy(struct ath10k *ar) 2815 { 2816 flush_workqueue(ar->workqueue); 2817 destroy_workqueue(ar->workqueue); 2818 2819 flush_workqueue(ar->workqueue_aux); 2820 destroy_workqueue(ar->workqueue_aux); 2821 2822 ath10k_debug_destroy(ar); 2823 ath10k_coredump_destroy(ar); 2824 ath10k_htt_tx_destroy(&ar->htt); 2825 ath10k_wmi_free_host_mem(ar); 2826 ath10k_mac_destroy(ar); 2827 } 2828 EXPORT_SYMBOL(ath10k_core_destroy); 2829 2830 MODULE_AUTHOR("Qualcomm Atheros"); 2831 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards."); 2832 MODULE_LICENSE("Dual BSD/GPL"); 2833