1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include <linux/module.h> 19 #include <linux/firmware.h> 20 #include <linux/of.h> 21 #include <asm/byteorder.h> 22 23 #include "core.h" 24 #include "mac.h" 25 #include "htc.h" 26 #include "hif.h" 27 #include "wmi.h" 28 #include "bmi.h" 29 #include "debug.h" 30 #include "htt.h" 31 #include "testmode.h" 32 #include "wmi-ops.h" 33 34 unsigned int ath10k_debug_mask; 35 static unsigned int ath10k_cryptmode_param; 36 static bool uart_print; 37 static bool skip_otp; 38 static bool rawmode; 39 40 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 41 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 42 module_param(uart_print, bool, 0644); 43 module_param(skip_otp, bool, 0644); 44 module_param(rawmode, bool, 0644); 45 46 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 47 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 48 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 49 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 50 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); 51 52 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 53 { 54 .id = QCA988X_HW_2_0_VERSION, 55 .dev_id = QCA988X_2_0_DEVICE_ID, 56 .name = "qca988x hw2.0", 57 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 58 .uart_pin = 7, 59 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 60 .otp_exe_param = 0, 61 .channel_counters_freq_hz = 88000, 62 .max_probe_resp_desc_thres = 0, 63 .cal_data_len = 2116, 64 .fw = { 65 .dir = QCA988X_HW_2_0_FW_DIR, 66 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 67 .board_size = QCA988X_BOARD_DATA_SZ, 68 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 69 }, 70 .hw_ops = &qca988x_ops, 71 .decap_align_bytes = 4, 72 }, 73 { 74 .id = QCA9887_HW_1_0_VERSION, 75 .dev_id = QCA9887_1_0_DEVICE_ID, 76 .name = "qca9887 hw1.0", 77 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR, 78 .uart_pin = 7, 79 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 80 .otp_exe_param = 0, 81 .channel_counters_freq_hz = 88000, 82 .max_probe_resp_desc_thres = 0, 83 .cal_data_len = 2116, 84 .fw = { 85 .dir = QCA9887_HW_1_0_FW_DIR, 86 .board = QCA9887_HW_1_0_BOARD_DATA_FILE, 87 .board_size = QCA9887_BOARD_DATA_SZ, 88 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ, 89 }, 90 .hw_ops = &qca988x_ops, 91 .decap_align_bytes = 4, 92 }, 93 { 94 .id = QCA6174_HW_2_1_VERSION, 95 .dev_id = QCA6164_2_1_DEVICE_ID, 96 .name = "qca6164 hw2.1", 97 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 98 .uart_pin = 6, 99 .otp_exe_param = 0, 100 .channel_counters_freq_hz = 88000, 101 .max_probe_resp_desc_thres = 0, 102 .cal_data_len = 8124, 103 .fw = { 104 .dir = QCA6174_HW_2_1_FW_DIR, 105 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 106 .board_size = QCA6174_BOARD_DATA_SZ, 107 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 108 }, 109 .hw_ops = &qca988x_ops, 110 .decap_align_bytes = 4, 111 }, 112 { 113 .id = QCA6174_HW_2_1_VERSION, 114 .dev_id = QCA6174_2_1_DEVICE_ID, 115 .name = "qca6174 hw2.1", 116 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 117 .uart_pin = 6, 118 .otp_exe_param = 0, 119 .channel_counters_freq_hz = 88000, 120 .max_probe_resp_desc_thres = 0, 121 .cal_data_len = 8124, 122 .fw = { 123 .dir = QCA6174_HW_2_1_FW_DIR, 124 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 125 .board_size = QCA6174_BOARD_DATA_SZ, 126 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 127 }, 128 .hw_ops = &qca988x_ops, 129 .decap_align_bytes = 4, 130 }, 131 { 132 .id = QCA6174_HW_3_0_VERSION, 133 .dev_id = QCA6174_2_1_DEVICE_ID, 134 .name = "qca6174 hw3.0", 135 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 136 .uart_pin = 6, 137 .otp_exe_param = 0, 138 .channel_counters_freq_hz = 88000, 139 .max_probe_resp_desc_thres = 0, 140 .cal_data_len = 8124, 141 .fw = { 142 .dir = QCA6174_HW_3_0_FW_DIR, 143 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 144 .board_size = QCA6174_BOARD_DATA_SZ, 145 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 146 }, 147 .hw_ops = &qca988x_ops, 148 .decap_align_bytes = 4, 149 }, 150 { 151 .id = QCA6174_HW_3_2_VERSION, 152 .dev_id = QCA6174_2_1_DEVICE_ID, 153 .name = "qca6174 hw3.2", 154 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 155 .uart_pin = 6, 156 .otp_exe_param = 0, 157 .channel_counters_freq_hz = 88000, 158 .max_probe_resp_desc_thres = 0, 159 .cal_data_len = 8124, 160 .fw = { 161 /* uses same binaries as hw3.0 */ 162 .dir = QCA6174_HW_3_0_FW_DIR, 163 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 164 .board_size = QCA6174_BOARD_DATA_SZ, 165 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 166 }, 167 .hw_ops = &qca988x_ops, 168 .decap_align_bytes = 4, 169 }, 170 { 171 .id = QCA99X0_HW_2_0_DEV_VERSION, 172 .dev_id = QCA99X0_2_0_DEVICE_ID, 173 .name = "qca99x0 hw2.0", 174 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 175 .uart_pin = 7, 176 .otp_exe_param = 0x00000700, 177 .continuous_frag_desc = true, 178 .cck_rate_map_rev2 = true, 179 .channel_counters_freq_hz = 150000, 180 .max_probe_resp_desc_thres = 24, 181 .tx_chain_mask = 0xf, 182 .rx_chain_mask = 0xf, 183 .max_spatial_stream = 4, 184 .cal_data_len = 12064, 185 .fw = { 186 .dir = QCA99X0_HW_2_0_FW_DIR, 187 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 188 .board_size = QCA99X0_BOARD_DATA_SZ, 189 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 190 }, 191 .sw_decrypt_mcast_mgmt = true, 192 .hw_ops = &qca99x0_ops, 193 .decap_align_bytes = 1, 194 }, 195 { 196 .id = QCA9984_HW_1_0_DEV_VERSION, 197 .dev_id = QCA9984_1_0_DEVICE_ID, 198 .name = "qca9984/qca9994 hw1.0", 199 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR, 200 .uart_pin = 7, 201 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 202 .otp_exe_param = 0x00000700, 203 .continuous_frag_desc = true, 204 .cck_rate_map_rev2 = true, 205 .channel_counters_freq_hz = 150000, 206 .max_probe_resp_desc_thres = 24, 207 .tx_chain_mask = 0xf, 208 .rx_chain_mask = 0xf, 209 .max_spatial_stream = 4, 210 .cal_data_len = 12064, 211 .fw = { 212 .dir = QCA9984_HW_1_0_FW_DIR, 213 .board = QCA9984_HW_1_0_BOARD_DATA_FILE, 214 .board_size = QCA99X0_BOARD_DATA_SZ, 215 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 216 }, 217 .sw_decrypt_mcast_mgmt = true, 218 .hw_ops = &qca99x0_ops, 219 .decap_align_bytes = 1, 220 }, 221 { 222 .id = QCA9888_HW_2_0_DEV_VERSION, 223 .dev_id = QCA9888_2_0_DEVICE_ID, 224 .name = "qca9888 hw2.0", 225 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR, 226 .uart_pin = 7, 227 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 228 .otp_exe_param = 0x00000700, 229 .continuous_frag_desc = true, 230 .channel_counters_freq_hz = 150000, 231 .max_probe_resp_desc_thres = 24, 232 .tx_chain_mask = 3, 233 .rx_chain_mask = 3, 234 .max_spatial_stream = 2, 235 .cal_data_len = 12064, 236 .fw = { 237 .dir = QCA9888_HW_2_0_FW_DIR, 238 .board = QCA9888_HW_2_0_BOARD_DATA_FILE, 239 .board_size = QCA99X0_BOARD_DATA_SZ, 240 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 241 }, 242 .sw_decrypt_mcast_mgmt = true, 243 .hw_ops = &qca99x0_ops, 244 .decap_align_bytes = 1, 245 }, 246 { 247 .id = QCA9377_HW_1_0_DEV_VERSION, 248 .dev_id = QCA9377_1_0_DEVICE_ID, 249 .name = "qca9377 hw1.0", 250 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 251 .uart_pin = 6, 252 .otp_exe_param = 0, 253 .channel_counters_freq_hz = 88000, 254 .max_probe_resp_desc_thres = 0, 255 .cal_data_len = 8124, 256 .fw = { 257 .dir = QCA9377_HW_1_0_FW_DIR, 258 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 259 .board_size = QCA9377_BOARD_DATA_SZ, 260 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 261 }, 262 .hw_ops = &qca988x_ops, 263 .decap_align_bytes = 4, 264 }, 265 { 266 .id = QCA9377_HW_1_1_DEV_VERSION, 267 .dev_id = QCA9377_1_0_DEVICE_ID, 268 .name = "qca9377 hw1.1", 269 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 270 .uart_pin = 6, 271 .otp_exe_param = 0, 272 .channel_counters_freq_hz = 88000, 273 .max_probe_resp_desc_thres = 0, 274 .cal_data_len = 8124, 275 .fw = { 276 .dir = QCA9377_HW_1_0_FW_DIR, 277 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 278 .board_size = QCA9377_BOARD_DATA_SZ, 279 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 280 }, 281 .hw_ops = &qca988x_ops, 282 .decap_align_bytes = 4, 283 }, 284 { 285 .id = QCA4019_HW_1_0_DEV_VERSION, 286 .dev_id = 0, 287 .name = "qca4019 hw1.0", 288 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR, 289 .uart_pin = 7, 290 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 291 .otp_exe_param = 0x0010000, 292 .continuous_frag_desc = true, 293 .cck_rate_map_rev2 = true, 294 .channel_counters_freq_hz = 125000, 295 .max_probe_resp_desc_thres = 24, 296 .tx_chain_mask = 0x3, 297 .rx_chain_mask = 0x3, 298 .max_spatial_stream = 2, 299 .cal_data_len = 12064, 300 .fw = { 301 .dir = QCA4019_HW_1_0_FW_DIR, 302 .board = QCA4019_HW_1_0_BOARD_DATA_FILE, 303 .board_size = QCA4019_BOARD_DATA_SZ, 304 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, 305 }, 306 .sw_decrypt_mcast_mgmt = true, 307 .hw_ops = &qca99x0_ops, 308 .decap_align_bytes = 1, 309 }, 310 }; 311 312 static const char *const ath10k_core_fw_feature_str[] = { 313 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 314 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 315 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 316 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 317 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 318 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 319 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 320 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 321 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 322 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 323 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 324 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 325 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", 326 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl", 327 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param", 328 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war", 329 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast", 330 }; 331 332 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 333 size_t buf_len, 334 enum ath10k_fw_features feat) 335 { 336 /* make sure that ath10k_core_fw_feature_str[] gets updated */ 337 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != 338 ATH10K_FW_FEATURE_COUNT); 339 340 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 341 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 342 return scnprintf(buf, buf_len, "bit%d", feat); 343 } 344 345 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 346 } 347 348 void ath10k_core_get_fw_features_str(struct ath10k *ar, 349 char *buf, 350 size_t buf_len) 351 { 352 size_t len = 0; 353 int i; 354 355 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 356 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) { 357 if (len > 0) 358 len += scnprintf(buf + len, buf_len - len, ","); 359 360 len += ath10k_core_get_fw_feature_str(buf + len, 361 buf_len - len, 362 i); 363 } 364 } 365 } 366 367 static void ath10k_send_suspend_complete(struct ath10k *ar) 368 { 369 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 370 371 complete(&ar->target_suspend); 372 } 373 374 static int ath10k_init_configure_target(struct ath10k *ar) 375 { 376 u32 param_host; 377 int ret; 378 379 /* tell target which HTC version it is used*/ 380 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 381 HTC_PROTOCOL_VERSION); 382 if (ret) { 383 ath10k_err(ar, "settings HTC version failed\n"); 384 return ret; 385 } 386 387 /* set the firmware mode to STA/IBSS/AP */ 388 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 389 if (ret) { 390 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 391 return ret; 392 } 393 394 /* TODO following parameters need to be re-visited. */ 395 /* num_device */ 396 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 397 /* Firmware mode */ 398 /* FIXME: Why FW_MODE_AP ??.*/ 399 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 400 /* mac_addr_method */ 401 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 402 /* firmware_bridge */ 403 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 404 /* fwsubmode */ 405 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 406 407 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 408 if (ret) { 409 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 410 return ret; 411 } 412 413 /* We do all byte-swapping on the host */ 414 ret = ath10k_bmi_write32(ar, hi_be, 0); 415 if (ret) { 416 ath10k_err(ar, "setting host CPU BE mode failed\n"); 417 return ret; 418 } 419 420 /* FW descriptor/Data swap flags */ 421 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 422 423 if (ret) { 424 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 425 return ret; 426 } 427 428 /* Some devices have a special sanity check that verifies the PCI 429 * Device ID is written to this host interest var. It is known to be 430 * required to boot QCA6164. 431 */ 432 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 433 ar->dev_id); 434 if (ret) { 435 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 436 return ret; 437 } 438 439 return 0; 440 } 441 442 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 443 const char *dir, 444 const char *file) 445 { 446 char filename[100]; 447 const struct firmware *fw; 448 int ret; 449 450 if (file == NULL) 451 return ERR_PTR(-ENOENT); 452 453 if (dir == NULL) 454 dir = "."; 455 456 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 457 ret = request_firmware_direct(&fw, filename, ar->dev); 458 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n", 459 filename, ret); 460 461 if (ret) 462 return ERR_PTR(ret); 463 464 return fw; 465 } 466 467 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 468 size_t data_len) 469 { 470 u32 board_data_size = ar->hw_params.fw.board_size; 471 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 472 u32 board_ext_data_addr; 473 int ret; 474 475 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 476 if (ret) { 477 ath10k_err(ar, "could not read board ext data addr (%d)\n", 478 ret); 479 return ret; 480 } 481 482 ath10k_dbg(ar, ATH10K_DBG_BOOT, 483 "boot push board extended data addr 0x%x\n", 484 board_ext_data_addr); 485 486 if (board_ext_data_addr == 0) 487 return 0; 488 489 if (data_len != (board_data_size + board_ext_data_size)) { 490 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 491 data_len, board_data_size, board_ext_data_size); 492 return -EINVAL; 493 } 494 495 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 496 data + board_data_size, 497 board_ext_data_size); 498 if (ret) { 499 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 500 return ret; 501 } 502 503 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 504 (board_ext_data_size << 16) | 1); 505 if (ret) { 506 ath10k_err(ar, "could not write board ext data bit (%d)\n", 507 ret); 508 return ret; 509 } 510 511 return 0; 512 } 513 514 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 515 size_t data_len) 516 { 517 u32 board_data_size = ar->hw_params.fw.board_size; 518 u32 address; 519 int ret; 520 521 ret = ath10k_push_board_ext_data(ar, data, data_len); 522 if (ret) { 523 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 524 goto exit; 525 } 526 527 ret = ath10k_bmi_read32(ar, hi_board_data, &address); 528 if (ret) { 529 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 530 goto exit; 531 } 532 533 ret = ath10k_bmi_write_memory(ar, address, data, 534 min_t(u32, board_data_size, 535 data_len)); 536 if (ret) { 537 ath10k_err(ar, "could not write board data (%d)\n", ret); 538 goto exit; 539 } 540 541 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 542 if (ret) { 543 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 544 goto exit; 545 } 546 547 exit: 548 return ret; 549 } 550 551 static int ath10k_download_cal_file(struct ath10k *ar, 552 const struct firmware *file) 553 { 554 int ret; 555 556 if (!file) 557 return -ENOENT; 558 559 if (IS_ERR(file)) 560 return PTR_ERR(file); 561 562 ret = ath10k_download_board_data(ar, file->data, file->size); 563 if (ret) { 564 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 565 return ret; 566 } 567 568 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 569 570 return 0; 571 } 572 573 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name) 574 { 575 struct device_node *node; 576 int data_len; 577 void *data; 578 int ret; 579 580 node = ar->dev->of_node; 581 if (!node) 582 /* Device Tree is optional, don't print any warnings if 583 * there's no node for ath10k. 584 */ 585 return -ENOENT; 586 587 if (!of_get_property(node, dt_name, &data_len)) { 588 /* The calibration data node is optional */ 589 return -ENOENT; 590 } 591 592 if (data_len != ar->hw_params.cal_data_len) { 593 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 594 data_len); 595 ret = -EMSGSIZE; 596 goto out; 597 } 598 599 data = kmalloc(data_len, GFP_KERNEL); 600 if (!data) { 601 ret = -ENOMEM; 602 goto out; 603 } 604 605 ret = of_property_read_u8_array(node, dt_name, data, data_len); 606 if (ret) { 607 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 608 ret); 609 goto out_free; 610 } 611 612 ret = ath10k_download_board_data(ar, data, data_len); 613 if (ret) { 614 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 615 ret); 616 goto out_free; 617 } 618 619 ret = 0; 620 621 out_free: 622 kfree(data); 623 624 out: 625 return ret; 626 } 627 628 static int ath10k_download_cal_eeprom(struct ath10k *ar) 629 { 630 size_t data_len; 631 void *data = NULL; 632 int ret; 633 634 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len); 635 if (ret) { 636 if (ret != -EOPNOTSUPP) 637 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n", 638 ret); 639 goto out_free; 640 } 641 642 ret = ath10k_download_board_data(ar, data, data_len); 643 if (ret) { 644 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n", 645 ret); 646 goto out_free; 647 } 648 649 ret = 0; 650 651 out_free: 652 kfree(data); 653 654 return ret; 655 } 656 657 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) 658 { 659 u32 result, address; 660 u8 board_id, chip_id; 661 int ret; 662 663 address = ar->hw_params.patch_load_addr; 664 665 if (!ar->normal_mode_fw.fw_file.otp_data || 666 !ar->normal_mode_fw.fw_file.otp_len) { 667 ath10k_warn(ar, 668 "failed to retrieve board id because of invalid otp\n"); 669 return -ENODATA; 670 } 671 672 ath10k_dbg(ar, ATH10K_DBG_BOOT, 673 "boot upload otp to 0x%x len %zd for board id\n", 674 address, ar->normal_mode_fw.fw_file.otp_len); 675 676 ret = ath10k_bmi_fast_download(ar, address, 677 ar->normal_mode_fw.fw_file.otp_data, 678 ar->normal_mode_fw.fw_file.otp_len); 679 if (ret) { 680 ath10k_err(ar, "could not write otp for board id check: %d\n", 681 ret); 682 return ret; 683 } 684 685 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EEPROM_BOARD_ID, 686 &result); 687 if (ret) { 688 ath10k_err(ar, "could not execute otp for board id check: %d\n", 689 ret); 690 return ret; 691 } 692 693 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); 694 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); 695 696 ath10k_dbg(ar, ATH10K_DBG_BOOT, 697 "boot get otp board id result 0x%08x board_id %d chip_id %d\n", 698 result, board_id, chip_id); 699 700 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 || 701 (board_id == 0)) { 702 ath10k_dbg(ar, ATH10K_DBG_BOOT, 703 "board id does not exist in otp, ignore it\n"); 704 return -EOPNOTSUPP; 705 } 706 707 ar->id.bmi_ids_valid = true; 708 ar->id.bmi_board_id = board_id; 709 ar->id.bmi_chip_id = chip_id; 710 711 return 0; 712 } 713 714 static int ath10k_download_and_run_otp(struct ath10k *ar) 715 { 716 u32 result, address = ar->hw_params.patch_load_addr; 717 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 718 int ret; 719 720 ret = ath10k_download_board_data(ar, 721 ar->running_fw->board_data, 722 ar->running_fw->board_len); 723 if (ret) { 724 ath10k_err(ar, "failed to download board data: %d\n", ret); 725 return ret; 726 } 727 728 /* OTP is optional */ 729 730 if (!ar->running_fw->fw_file.otp_data || 731 !ar->running_fw->fw_file.otp_len) { 732 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n", 733 ar->running_fw->fw_file.otp_data, 734 ar->running_fw->fw_file.otp_len); 735 return 0; 736 } 737 738 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 739 address, ar->running_fw->fw_file.otp_len); 740 741 ret = ath10k_bmi_fast_download(ar, address, 742 ar->running_fw->fw_file.otp_data, 743 ar->running_fw->fw_file.otp_len); 744 if (ret) { 745 ath10k_err(ar, "could not write otp (%d)\n", ret); 746 return ret; 747 } 748 749 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 750 if (ret) { 751 ath10k_err(ar, "could not execute otp (%d)\n", ret); 752 return ret; 753 } 754 755 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 756 757 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 758 ar->running_fw->fw_file.fw_features)) && 759 result != 0) { 760 ath10k_err(ar, "otp calibration failed: %d", result); 761 return -EINVAL; 762 } 763 764 return 0; 765 } 766 767 static int ath10k_download_fw(struct ath10k *ar) 768 { 769 u32 address, data_len; 770 const void *data; 771 int ret; 772 773 address = ar->hw_params.patch_load_addr; 774 775 data = ar->running_fw->fw_file.firmware_data; 776 data_len = ar->running_fw->fw_file.firmware_len; 777 778 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file); 779 if (ret) { 780 ath10k_err(ar, "failed to configure fw code swap: %d\n", 781 ret); 782 return ret; 783 } 784 785 ath10k_dbg(ar, ATH10K_DBG_BOOT, 786 "boot uploading firmware image %pK len %d\n", 787 data, data_len); 788 789 ret = ath10k_bmi_fast_download(ar, address, data, data_len); 790 if (ret) { 791 ath10k_err(ar, "failed to download firmware: %d\n", 792 ret); 793 return ret; 794 } 795 796 return ret; 797 } 798 799 static void ath10k_core_free_board_files(struct ath10k *ar) 800 { 801 if (!IS_ERR(ar->normal_mode_fw.board)) 802 release_firmware(ar->normal_mode_fw.board); 803 804 ar->normal_mode_fw.board = NULL; 805 ar->normal_mode_fw.board_data = NULL; 806 ar->normal_mode_fw.board_len = 0; 807 } 808 809 static void ath10k_core_free_firmware_files(struct ath10k *ar) 810 { 811 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware)) 812 release_firmware(ar->normal_mode_fw.fw_file.firmware); 813 814 if (!IS_ERR(ar->cal_file)) 815 release_firmware(ar->cal_file); 816 817 if (!IS_ERR(ar->pre_cal_file)) 818 release_firmware(ar->pre_cal_file); 819 820 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file); 821 822 ar->normal_mode_fw.fw_file.otp_data = NULL; 823 ar->normal_mode_fw.fw_file.otp_len = 0; 824 825 ar->normal_mode_fw.fw_file.firmware = NULL; 826 ar->normal_mode_fw.fw_file.firmware_data = NULL; 827 ar->normal_mode_fw.fw_file.firmware_len = 0; 828 829 ar->cal_file = NULL; 830 ar->pre_cal_file = NULL; 831 } 832 833 static int ath10k_fetch_cal_file(struct ath10k *ar) 834 { 835 char filename[100]; 836 837 /* pre-cal-<bus>-<id>.bin */ 838 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin", 839 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 840 841 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 842 if (!IS_ERR(ar->pre_cal_file)) 843 goto success; 844 845 /* cal-<bus>-<id>.bin */ 846 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 847 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 848 849 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 850 if (IS_ERR(ar->cal_file)) 851 /* calibration file is optional, don't print any warnings */ 852 return PTR_ERR(ar->cal_file); 853 success: 854 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 855 ATH10K_FW_DIR, filename); 856 857 return 0; 858 } 859 860 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar) 861 { 862 if (!ar->hw_params.fw.board) { 863 ath10k_err(ar, "failed to find board file fw entry\n"); 864 return -EINVAL; 865 } 866 867 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 868 ar->hw_params.fw.dir, 869 ar->hw_params.fw.board); 870 if (IS_ERR(ar->normal_mode_fw.board)) 871 return PTR_ERR(ar->normal_mode_fw.board); 872 873 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data; 874 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size; 875 876 return 0; 877 } 878 879 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, 880 const void *buf, size_t buf_len, 881 const char *boardname) 882 { 883 const struct ath10k_fw_ie *hdr; 884 bool name_match_found; 885 int ret, board_ie_id; 886 size_t board_ie_len; 887 const void *board_ie_data; 888 889 name_match_found = false; 890 891 /* go through ATH10K_BD_IE_BOARD_ elements */ 892 while (buf_len > sizeof(struct ath10k_fw_ie)) { 893 hdr = buf; 894 board_ie_id = le32_to_cpu(hdr->id); 895 board_ie_len = le32_to_cpu(hdr->len); 896 board_ie_data = hdr->data; 897 898 buf_len -= sizeof(*hdr); 899 buf += sizeof(*hdr); 900 901 if (buf_len < ALIGN(board_ie_len, 4)) { 902 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", 903 buf_len, ALIGN(board_ie_len, 4)); 904 ret = -EINVAL; 905 goto out; 906 } 907 908 switch (board_ie_id) { 909 case ATH10K_BD_IE_BOARD_NAME: 910 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", 911 board_ie_data, board_ie_len); 912 913 if (board_ie_len != strlen(boardname)) 914 break; 915 916 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 917 if (ret) 918 break; 919 920 name_match_found = true; 921 ath10k_dbg(ar, ATH10K_DBG_BOOT, 922 "boot found match for name '%s'", 923 boardname); 924 break; 925 case ATH10K_BD_IE_BOARD_DATA: 926 if (!name_match_found) 927 /* no match found */ 928 break; 929 930 ath10k_dbg(ar, ATH10K_DBG_BOOT, 931 "boot found board data for '%s'", 932 boardname); 933 934 ar->normal_mode_fw.board_data = board_ie_data; 935 ar->normal_mode_fw.board_len = board_ie_len; 936 937 ret = 0; 938 goto out; 939 default: 940 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", 941 board_ie_id); 942 break; 943 } 944 945 /* jump over the padding */ 946 board_ie_len = ALIGN(board_ie_len, 4); 947 948 buf_len -= board_ie_len; 949 buf += board_ie_len; 950 } 951 952 /* no match found */ 953 ret = -ENOENT; 954 955 out: 956 return ret; 957 } 958 959 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, 960 const char *boardname, 961 const char *filename) 962 { 963 size_t len, magic_len, ie_len; 964 struct ath10k_fw_ie *hdr; 965 const u8 *data; 966 int ret, ie_id; 967 968 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 969 ar->hw_params.fw.dir, 970 filename); 971 if (IS_ERR(ar->normal_mode_fw.board)) 972 return PTR_ERR(ar->normal_mode_fw.board); 973 974 data = ar->normal_mode_fw.board->data; 975 len = ar->normal_mode_fw.board->size; 976 977 /* magic has extra null byte padded */ 978 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; 979 if (len < magic_len) { 980 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", 981 ar->hw_params.fw.dir, filename, len); 982 ret = -EINVAL; 983 goto err; 984 } 985 986 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { 987 ath10k_err(ar, "found invalid board magic\n"); 988 ret = -EINVAL; 989 goto err; 990 } 991 992 /* magic is padded to 4 bytes */ 993 magic_len = ALIGN(magic_len, 4); 994 if (len < magic_len) { 995 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", 996 ar->hw_params.fw.dir, filename, len); 997 ret = -EINVAL; 998 goto err; 999 } 1000 1001 data += magic_len; 1002 len -= magic_len; 1003 1004 while (len > sizeof(struct ath10k_fw_ie)) { 1005 hdr = (struct ath10k_fw_ie *)data; 1006 ie_id = le32_to_cpu(hdr->id); 1007 ie_len = le32_to_cpu(hdr->len); 1008 1009 len -= sizeof(*hdr); 1010 data = hdr->data; 1011 1012 if (len < ALIGN(ie_len, 4)) { 1013 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", 1014 ie_id, ie_len, len); 1015 ret = -EINVAL; 1016 goto err; 1017 } 1018 1019 switch (ie_id) { 1020 case ATH10K_BD_IE_BOARD: 1021 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1022 boardname); 1023 if (ret == -ENOENT) 1024 /* no match found, continue */ 1025 break; 1026 else if (ret) 1027 /* there was an error, bail out */ 1028 goto err; 1029 1030 /* board data found */ 1031 goto out; 1032 } 1033 1034 /* jump over the padding */ 1035 ie_len = ALIGN(ie_len, 4); 1036 1037 len -= ie_len; 1038 data += ie_len; 1039 } 1040 1041 out: 1042 if (!ar->normal_mode_fw.board_data || !ar->normal_mode_fw.board_len) { 1043 ath10k_err(ar, 1044 "failed to fetch board data for %s from %s/%s\n", 1045 boardname, ar->hw_params.fw.dir, filename); 1046 ret = -ENODATA; 1047 goto err; 1048 } 1049 1050 return 0; 1051 1052 err: 1053 ath10k_core_free_board_files(ar); 1054 return ret; 1055 } 1056 1057 static int ath10k_core_create_board_name(struct ath10k *ar, char *name, 1058 size_t name_len) 1059 { 1060 if (ar->id.bmi_ids_valid) { 1061 scnprintf(name, name_len, 1062 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d", 1063 ath10k_bus_str(ar->hif.bus), 1064 ar->id.bmi_chip_id, 1065 ar->id.bmi_board_id); 1066 goto out; 1067 } 1068 1069 scnprintf(name, name_len, 1070 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x", 1071 ath10k_bus_str(ar->hif.bus), 1072 ar->id.vendor, ar->id.device, 1073 ar->id.subsystem_vendor, ar->id.subsystem_device); 1074 1075 out: 1076 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); 1077 1078 return 0; 1079 } 1080 1081 static int ath10k_core_fetch_board_file(struct ath10k *ar) 1082 { 1083 char boardname[100]; 1084 int ret; 1085 1086 ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname)); 1087 if (ret) { 1088 ath10k_err(ar, "failed to create board name: %d", ret); 1089 return ret; 1090 } 1091 1092 ar->bd_api = 2; 1093 ret = ath10k_core_fetch_board_data_api_n(ar, boardname, 1094 ATH10K_BOARD_API2_FILE); 1095 if (!ret) 1096 goto success; 1097 1098 ar->bd_api = 1; 1099 ret = ath10k_core_fetch_board_data_api_1(ar); 1100 if (ret) { 1101 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n", 1102 ar->hw_params.fw.dir); 1103 return ret; 1104 } 1105 1106 success: 1107 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); 1108 return 0; 1109 } 1110 1111 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1112 struct ath10k_fw_file *fw_file) 1113 { 1114 size_t magic_len, len, ie_len; 1115 int ie_id, i, index, bit, ret; 1116 struct ath10k_fw_ie *hdr; 1117 const u8 *data; 1118 __le32 *timestamp, *version; 1119 1120 /* first fetch the firmware file (firmware-*.bin) */ 1121 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1122 name); 1123 if (IS_ERR(fw_file->firmware)) 1124 return PTR_ERR(fw_file->firmware); 1125 1126 data = fw_file->firmware->data; 1127 len = fw_file->firmware->size; 1128 1129 /* magic also includes the null byte, check that as well */ 1130 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 1131 1132 if (len < magic_len) { 1133 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 1134 ar->hw_params.fw.dir, name, len); 1135 ret = -EINVAL; 1136 goto err; 1137 } 1138 1139 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 1140 ath10k_err(ar, "invalid firmware magic\n"); 1141 ret = -EINVAL; 1142 goto err; 1143 } 1144 1145 /* jump over the padding */ 1146 magic_len = ALIGN(magic_len, 4); 1147 1148 len -= magic_len; 1149 data += magic_len; 1150 1151 /* loop elements */ 1152 while (len > sizeof(struct ath10k_fw_ie)) { 1153 hdr = (struct ath10k_fw_ie *)data; 1154 1155 ie_id = le32_to_cpu(hdr->id); 1156 ie_len = le32_to_cpu(hdr->len); 1157 1158 len -= sizeof(*hdr); 1159 data += sizeof(*hdr); 1160 1161 if (len < ie_len) { 1162 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 1163 ie_id, len, ie_len); 1164 ret = -EINVAL; 1165 goto err; 1166 } 1167 1168 switch (ie_id) { 1169 case ATH10K_FW_IE_FW_VERSION: 1170 if (ie_len > sizeof(fw_file->fw_version) - 1) 1171 break; 1172 1173 memcpy(fw_file->fw_version, data, ie_len); 1174 fw_file->fw_version[ie_len] = '\0'; 1175 1176 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1177 "found fw version %s\n", 1178 fw_file->fw_version); 1179 break; 1180 case ATH10K_FW_IE_TIMESTAMP: 1181 if (ie_len != sizeof(u32)) 1182 break; 1183 1184 timestamp = (__le32 *)data; 1185 1186 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 1187 le32_to_cpup(timestamp)); 1188 break; 1189 case ATH10K_FW_IE_FEATURES: 1190 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1191 "found firmware features ie (%zd B)\n", 1192 ie_len); 1193 1194 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 1195 index = i / 8; 1196 bit = i % 8; 1197 1198 if (index == ie_len) 1199 break; 1200 1201 if (data[index] & (1 << bit)) { 1202 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1203 "Enabling feature bit: %i\n", 1204 i); 1205 __set_bit(i, fw_file->fw_features); 1206 } 1207 } 1208 1209 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 1210 fw_file->fw_features, 1211 sizeof(fw_file->fw_features)); 1212 break; 1213 case ATH10K_FW_IE_FW_IMAGE: 1214 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1215 "found fw image ie (%zd B)\n", 1216 ie_len); 1217 1218 fw_file->firmware_data = data; 1219 fw_file->firmware_len = ie_len; 1220 1221 break; 1222 case ATH10K_FW_IE_OTP_IMAGE: 1223 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1224 "found otp image ie (%zd B)\n", 1225 ie_len); 1226 1227 fw_file->otp_data = data; 1228 fw_file->otp_len = ie_len; 1229 1230 break; 1231 case ATH10K_FW_IE_WMI_OP_VERSION: 1232 if (ie_len != sizeof(u32)) 1233 break; 1234 1235 version = (__le32 *)data; 1236 1237 fw_file->wmi_op_version = le32_to_cpup(version); 1238 1239 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 1240 fw_file->wmi_op_version); 1241 break; 1242 case ATH10K_FW_IE_HTT_OP_VERSION: 1243 if (ie_len != sizeof(u32)) 1244 break; 1245 1246 version = (__le32 *)data; 1247 1248 fw_file->htt_op_version = le32_to_cpup(version); 1249 1250 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 1251 fw_file->htt_op_version); 1252 break; 1253 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 1254 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1255 "found fw code swap image ie (%zd B)\n", 1256 ie_len); 1257 fw_file->codeswap_data = data; 1258 fw_file->codeswap_len = ie_len; 1259 break; 1260 default: 1261 ath10k_warn(ar, "Unknown FW IE: %u\n", 1262 le32_to_cpu(hdr->id)); 1263 break; 1264 } 1265 1266 /* jump over the padding */ 1267 ie_len = ALIGN(ie_len, 4); 1268 1269 len -= ie_len; 1270 data += ie_len; 1271 } 1272 1273 if (!fw_file->firmware_data || 1274 !fw_file->firmware_len) { 1275 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 1276 ar->hw_params.fw.dir, name); 1277 ret = -ENOMEDIUM; 1278 goto err; 1279 } 1280 1281 return 0; 1282 1283 err: 1284 ath10k_core_free_firmware_files(ar); 1285 return ret; 1286 } 1287 1288 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name, 1289 size_t fw_name_len, int fw_api) 1290 { 1291 scnprintf(fw_name, fw_name_len, "%s-%d.bin", ATH10K_FW_FILE_BASE, fw_api); 1292 } 1293 1294 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 1295 { 1296 int ret, i; 1297 char fw_name[100]; 1298 1299 /* calibration file is optional, don't check for any errors */ 1300 ath10k_fetch_cal_file(ar); 1301 1302 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) { 1303 ar->fw_api = i; 1304 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", 1305 ar->fw_api); 1306 1307 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api); 1308 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name, 1309 &ar->normal_mode_fw.fw_file); 1310 if (!ret) 1311 goto success; 1312 } 1313 1314 /* we end up here if we couldn't fetch any firmware */ 1315 1316 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d", 1317 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir, 1318 ret); 1319 1320 return ret; 1321 1322 success: 1323 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1324 1325 return 0; 1326 } 1327 1328 static int ath10k_core_pre_cal_download(struct ath10k *ar) 1329 { 1330 int ret; 1331 1332 ret = ath10k_download_cal_file(ar, ar->pre_cal_file); 1333 if (ret == 0) { 1334 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE; 1335 goto success; 1336 } 1337 1338 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1339 "boot did not find a pre calibration file, try DT next: %d\n", 1340 ret); 1341 1342 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data"); 1343 if (ret) { 1344 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1345 "unable to load pre cal data from DT: %d\n", ret); 1346 return ret; 1347 } 1348 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT; 1349 1350 success: 1351 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1352 ath10k_cal_mode_str(ar->cal_mode)); 1353 1354 return 0; 1355 } 1356 1357 static int ath10k_core_pre_cal_config(struct ath10k *ar) 1358 { 1359 int ret; 1360 1361 ret = ath10k_core_pre_cal_download(ar); 1362 if (ret) { 1363 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1364 "failed to load pre cal data: %d\n", ret); 1365 return ret; 1366 } 1367 1368 ret = ath10k_core_get_board_id_from_otp(ar); 1369 if (ret) { 1370 ath10k_err(ar, "failed to get board id: %d\n", ret); 1371 return ret; 1372 } 1373 1374 ret = ath10k_download_and_run_otp(ar); 1375 if (ret) { 1376 ath10k_err(ar, "failed to run otp: %d\n", ret); 1377 return ret; 1378 } 1379 1380 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1381 "pre cal configuration done successfully\n"); 1382 1383 return 0; 1384 } 1385 1386 static int ath10k_download_cal_data(struct ath10k *ar) 1387 { 1388 int ret; 1389 1390 ret = ath10k_core_pre_cal_config(ar); 1391 if (ret == 0) 1392 return 0; 1393 1394 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1395 "pre cal download procedure failed, try cal file: %d\n", 1396 ret); 1397 1398 ret = ath10k_download_cal_file(ar, ar->cal_file); 1399 if (ret == 0) { 1400 ar->cal_mode = ATH10K_CAL_MODE_FILE; 1401 goto done; 1402 } 1403 1404 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1405 "boot did not find a calibration file, try DT next: %d\n", 1406 ret); 1407 1408 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data"); 1409 if (ret == 0) { 1410 ar->cal_mode = ATH10K_CAL_MODE_DT; 1411 goto done; 1412 } 1413 1414 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1415 "boot did not find DT entry, try target EEPROM next: %d\n", 1416 ret); 1417 1418 ret = ath10k_download_cal_eeprom(ar); 1419 if (ret == 0) { 1420 ar->cal_mode = ATH10K_CAL_MODE_EEPROM; 1421 goto done; 1422 } 1423 1424 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1425 "boot did not find target EEPROM entry, try OTP next: %d\n", 1426 ret); 1427 1428 ret = ath10k_download_and_run_otp(ar); 1429 if (ret) { 1430 ath10k_err(ar, "failed to run otp: %d\n", ret); 1431 return ret; 1432 } 1433 1434 ar->cal_mode = ATH10K_CAL_MODE_OTP; 1435 1436 done: 1437 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1438 ath10k_cal_mode_str(ar->cal_mode)); 1439 return 0; 1440 } 1441 1442 static int ath10k_init_uart(struct ath10k *ar) 1443 { 1444 int ret; 1445 1446 /* 1447 * Explicitly setting UART prints to zero as target turns it on 1448 * based on scratch registers. 1449 */ 1450 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 1451 if (ret) { 1452 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 1453 return ret; 1454 } 1455 1456 if (!uart_print) 1457 return 0; 1458 1459 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 1460 if (ret) { 1461 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1462 return ret; 1463 } 1464 1465 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 1466 if (ret) { 1467 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1468 return ret; 1469 } 1470 1471 /* Set the UART baud rate to 19200. */ 1472 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 1473 if (ret) { 1474 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 1475 return ret; 1476 } 1477 1478 ath10k_info(ar, "UART prints enabled\n"); 1479 return 0; 1480 } 1481 1482 static int ath10k_init_hw_params(struct ath10k *ar) 1483 { 1484 const struct ath10k_hw_params *uninitialized_var(hw_params); 1485 int i; 1486 1487 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 1488 hw_params = &ath10k_hw_params_list[i]; 1489 1490 if (hw_params->id == ar->target_version && 1491 hw_params->dev_id == ar->dev_id) 1492 break; 1493 } 1494 1495 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 1496 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 1497 ar->target_version); 1498 return -EINVAL; 1499 } 1500 1501 ar->hw_params = *hw_params; 1502 1503 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 1504 ar->hw_params.name, ar->target_version); 1505 1506 return 0; 1507 } 1508 1509 static void ath10k_core_restart(struct work_struct *work) 1510 { 1511 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 1512 int ret; 1513 1514 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1515 1516 /* Place a barrier to make sure the compiler doesn't reorder 1517 * CRASH_FLUSH and calling other functions. 1518 */ 1519 barrier(); 1520 1521 ieee80211_stop_queues(ar->hw); 1522 ath10k_drain_tx(ar); 1523 complete(&ar->scan.started); 1524 complete(&ar->scan.completed); 1525 complete(&ar->scan.on_channel); 1526 complete(&ar->offchan_tx_completed); 1527 complete(&ar->install_key_done); 1528 complete(&ar->vdev_setup_done); 1529 complete(&ar->thermal.wmi_sync); 1530 complete(&ar->bss_survey_done); 1531 wake_up(&ar->htt.empty_tx_wq); 1532 wake_up(&ar->wmi.tx_credits_wq); 1533 wake_up(&ar->peer_mapping_wq); 1534 1535 mutex_lock(&ar->conf_mutex); 1536 1537 switch (ar->state) { 1538 case ATH10K_STATE_ON: 1539 ar->state = ATH10K_STATE_RESTARTING; 1540 ath10k_halt(ar); 1541 ath10k_scan_finish(ar); 1542 ieee80211_restart_hw(ar->hw); 1543 break; 1544 case ATH10K_STATE_OFF: 1545 /* this can happen if driver is being unloaded 1546 * or if the crash happens during FW probing */ 1547 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 1548 break; 1549 case ATH10K_STATE_RESTARTING: 1550 /* hw restart might be requested from multiple places */ 1551 break; 1552 case ATH10K_STATE_RESTARTED: 1553 ar->state = ATH10K_STATE_WEDGED; 1554 /* fall through */ 1555 case ATH10K_STATE_WEDGED: 1556 ath10k_warn(ar, "device is wedged, will not restart\n"); 1557 break; 1558 case ATH10K_STATE_UTF: 1559 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 1560 break; 1561 } 1562 1563 mutex_unlock(&ar->conf_mutex); 1564 1565 ret = ath10k_debug_fw_devcoredump(ar); 1566 if (ret) 1567 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d", 1568 ret); 1569 } 1570 1571 static void ath10k_core_set_coverage_class_work(struct work_struct *work) 1572 { 1573 struct ath10k *ar = container_of(work, struct ath10k, 1574 set_coverage_class_work); 1575 1576 if (ar->hw_params.hw_ops->set_coverage_class) 1577 ar->hw_params.hw_ops->set_coverage_class(ar, -1); 1578 } 1579 1580 static int ath10k_core_init_firmware_features(struct ath10k *ar) 1581 { 1582 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 1583 1584 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) && 1585 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 1586 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 1587 return -EINVAL; 1588 } 1589 1590 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 1591 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 1592 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version); 1593 return -EINVAL; 1594 } 1595 1596 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 1597 switch (ath10k_cryptmode_param) { 1598 case ATH10K_CRYPT_MODE_HW: 1599 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1600 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1601 break; 1602 case ATH10K_CRYPT_MODE_SW: 1603 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1604 fw_file->fw_features)) { 1605 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 1606 return -EINVAL; 1607 } 1608 1609 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1610 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1611 break; 1612 default: 1613 ath10k_info(ar, "invalid cryptmode: %d\n", 1614 ath10k_cryptmode_param); 1615 return -EINVAL; 1616 } 1617 1618 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 1619 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 1620 1621 if (rawmode) { 1622 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1623 fw_file->fw_features)) { 1624 ath10k_err(ar, "rawmode = 1 requires support from firmware"); 1625 return -EINVAL; 1626 } 1627 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1628 } 1629 1630 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 1631 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 1632 1633 /* Workaround: 1634 * 1635 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 1636 * and causes enormous performance issues (malformed frames, 1637 * etc). 1638 * 1639 * Disabling A-MSDU makes RAW mode stable with heavy traffic 1640 * albeit a bit slower compared to regular operation. 1641 */ 1642 ar->htt.max_num_amsdu = 1; 1643 } 1644 1645 /* Backwards compatibility for firmwares without 1646 * ATH10K_FW_IE_WMI_OP_VERSION. 1647 */ 1648 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 1649 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 1650 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 1651 fw_file->fw_features)) 1652 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 1653 else 1654 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 1655 } else { 1656 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 1657 } 1658 } 1659 1660 switch (fw_file->wmi_op_version) { 1661 case ATH10K_FW_WMI_OP_VERSION_MAIN: 1662 ar->max_num_peers = TARGET_NUM_PEERS; 1663 ar->max_num_stations = TARGET_NUM_STATIONS; 1664 ar->max_num_vdevs = TARGET_NUM_VDEVS; 1665 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 1666 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1667 WMI_STAT_PEER; 1668 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1669 break; 1670 case ATH10K_FW_WMI_OP_VERSION_10_1: 1671 case ATH10K_FW_WMI_OP_VERSION_10_2: 1672 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 1673 if (ath10k_peer_stats_enabled(ar)) { 1674 ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS; 1675 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS; 1676 } else { 1677 ar->max_num_peers = TARGET_10X_NUM_PEERS; 1678 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 1679 } 1680 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 1681 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 1682 ar->fw_stats_req_mask = WMI_STAT_PEER; 1683 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1684 break; 1685 case ATH10K_FW_WMI_OP_VERSION_TLV: 1686 ar->max_num_peers = TARGET_TLV_NUM_PEERS; 1687 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 1688 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 1689 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 1690 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 1691 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 1692 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1693 WMI_STAT_PEER; 1694 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1695 break; 1696 case ATH10K_FW_WMI_OP_VERSION_10_4: 1697 ar->max_num_peers = TARGET_10_4_NUM_PEERS; 1698 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 1699 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 1700 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 1701 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 1702 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER | 1703 WMI_10_4_STAT_PEER_EXTD; 1704 ar->max_spatial_stream = ar->hw_params.max_spatial_stream; 1705 1706 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, 1707 fw_file->fw_features)) 1708 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC; 1709 else 1710 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 1711 break; 1712 case ATH10K_FW_WMI_OP_VERSION_UNSET: 1713 case ATH10K_FW_WMI_OP_VERSION_MAX: 1714 WARN_ON(1); 1715 return -EINVAL; 1716 } 1717 1718 /* Backwards compatibility for firmwares without 1719 * ATH10K_FW_IE_HTT_OP_VERSION. 1720 */ 1721 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 1722 switch (fw_file->wmi_op_version) { 1723 case ATH10K_FW_WMI_OP_VERSION_MAIN: 1724 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 1725 break; 1726 case ATH10K_FW_WMI_OP_VERSION_10_1: 1727 case ATH10K_FW_WMI_OP_VERSION_10_2: 1728 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 1729 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 1730 break; 1731 case ATH10K_FW_WMI_OP_VERSION_TLV: 1732 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 1733 break; 1734 case ATH10K_FW_WMI_OP_VERSION_10_4: 1735 case ATH10K_FW_WMI_OP_VERSION_UNSET: 1736 case ATH10K_FW_WMI_OP_VERSION_MAX: 1737 ath10k_err(ar, "htt op version not found from fw meta data"); 1738 return -EINVAL; 1739 } 1740 } 1741 1742 return 0; 1743 } 1744 1745 static int ath10k_core_reset_rx_filter(struct ath10k *ar) 1746 { 1747 int ret; 1748 int vdev_id; 1749 int vdev_type; 1750 int vdev_subtype; 1751 const u8 *vdev_addr; 1752 1753 vdev_id = 0; 1754 vdev_type = WMI_VDEV_TYPE_STA; 1755 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE); 1756 vdev_addr = ar->mac_addr; 1757 1758 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype, 1759 vdev_addr); 1760 if (ret) { 1761 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret); 1762 return ret; 1763 } 1764 1765 ret = ath10k_wmi_vdev_delete(ar, vdev_id); 1766 if (ret) { 1767 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret); 1768 return ret; 1769 } 1770 1771 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be 1772 * serialized properly implicitly. 1773 * 1774 * Moreover (most) WMI commands have no explicit acknowledges. It is 1775 * possible to infer it implicitly by poking firmware with echo 1776 * command - getting a reply means all preceding comments have been 1777 * (mostly) processed. 1778 * 1779 * In case of vdev create/delete this is sufficient. 1780 * 1781 * Without this it's possible to end up with a race when HTT Rx ring is 1782 * started before vdev create/delete hack is complete allowing a short 1783 * window of opportunity to receive (and Tx ACK) a bunch of frames. 1784 */ 1785 ret = ath10k_wmi_barrier(ar); 1786 if (ret) { 1787 ath10k_err(ar, "failed to ping firmware: %d\n", ret); 1788 return ret; 1789 } 1790 1791 return 0; 1792 } 1793 1794 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 1795 const struct ath10k_fw_components *fw) 1796 { 1797 int status; 1798 u32 val; 1799 1800 lockdep_assert_held(&ar->conf_mutex); 1801 1802 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1803 1804 ar->running_fw = fw; 1805 1806 ath10k_bmi_start(ar); 1807 1808 if (ath10k_init_configure_target(ar)) { 1809 status = -EINVAL; 1810 goto err; 1811 } 1812 1813 status = ath10k_download_cal_data(ar); 1814 if (status) 1815 goto err; 1816 1817 /* Some of of qca988x solutions are having global reset issue 1818 * during target initialization. Bypassing PLL setting before 1819 * downloading firmware and letting the SoC run on REF_CLK is 1820 * fixing the problem. Corresponding firmware change is also needed 1821 * to set the clock source once the target is initialized. 1822 */ 1823 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 1824 ar->running_fw->fw_file.fw_features)) { 1825 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 1826 if (status) { 1827 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 1828 status); 1829 goto err; 1830 } 1831 } 1832 1833 status = ath10k_download_fw(ar); 1834 if (status) 1835 goto err; 1836 1837 status = ath10k_init_uart(ar); 1838 if (status) 1839 goto err; 1840 1841 ar->htc.htc_ops.target_send_suspend_complete = 1842 ath10k_send_suspend_complete; 1843 1844 status = ath10k_htc_init(ar); 1845 if (status) { 1846 ath10k_err(ar, "could not init HTC (%d)\n", status); 1847 goto err; 1848 } 1849 1850 status = ath10k_bmi_done(ar); 1851 if (status) 1852 goto err; 1853 1854 status = ath10k_wmi_attach(ar); 1855 if (status) { 1856 ath10k_err(ar, "WMI attach failed: %d\n", status); 1857 goto err; 1858 } 1859 1860 status = ath10k_htt_init(ar); 1861 if (status) { 1862 ath10k_err(ar, "failed to init htt: %d\n", status); 1863 goto err_wmi_detach; 1864 } 1865 1866 status = ath10k_htt_tx_start(&ar->htt); 1867 if (status) { 1868 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 1869 goto err_wmi_detach; 1870 } 1871 1872 status = ath10k_htt_rx_alloc(&ar->htt); 1873 if (status) { 1874 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 1875 goto err_htt_tx_detach; 1876 } 1877 1878 status = ath10k_hif_start(ar); 1879 if (status) { 1880 ath10k_err(ar, "could not start HIF: %d\n", status); 1881 goto err_htt_rx_detach; 1882 } 1883 1884 status = ath10k_htc_wait_target(&ar->htc); 1885 if (status) { 1886 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 1887 goto err_hif_stop; 1888 } 1889 1890 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 1891 status = ath10k_htt_connect(&ar->htt); 1892 if (status) { 1893 ath10k_err(ar, "failed to connect htt (%d)\n", status); 1894 goto err_hif_stop; 1895 } 1896 } 1897 1898 status = ath10k_wmi_connect(ar); 1899 if (status) { 1900 ath10k_err(ar, "could not connect wmi: %d\n", status); 1901 goto err_hif_stop; 1902 } 1903 1904 status = ath10k_htc_start(&ar->htc); 1905 if (status) { 1906 ath10k_err(ar, "failed to start htc: %d\n", status); 1907 goto err_hif_stop; 1908 } 1909 1910 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 1911 status = ath10k_wmi_wait_for_service_ready(ar); 1912 if (status) { 1913 ath10k_warn(ar, "wmi service ready event not received"); 1914 goto err_hif_stop; 1915 } 1916 } 1917 1918 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 1919 ar->hw->wiphy->fw_version); 1920 1921 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) && 1922 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 1923 val = 0; 1924 if (ath10k_peer_stats_enabled(ar)) 1925 val = WMI_10_4_PEER_STATS; 1926 1927 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) 1928 val |= WMI_10_4_BSS_CHANNEL_INFO_64; 1929 1930 /* 10.4 firmware supports BT-Coex without reloading firmware 1931 * via pdev param. To support Bluetooth coexistence pdev param, 1932 * WMI_COEX_GPIO_SUPPORT of extended resource config should be 1933 * enabled always. 1934 */ 1935 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 1936 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 1937 ar->running_fw->fw_file.fw_features)) 1938 val |= WMI_10_4_COEX_GPIO_SUPPORT; 1939 1940 status = ath10k_mac_ext_resource_config(ar, val); 1941 if (status) { 1942 ath10k_err(ar, 1943 "failed to send ext resource cfg command : %d\n", 1944 status); 1945 goto err_hif_stop; 1946 } 1947 } 1948 1949 status = ath10k_wmi_cmd_init(ar); 1950 if (status) { 1951 ath10k_err(ar, "could not send WMI init command (%d)\n", 1952 status); 1953 goto err_hif_stop; 1954 } 1955 1956 status = ath10k_wmi_wait_for_unified_ready(ar); 1957 if (status) { 1958 ath10k_err(ar, "wmi unified ready event not received\n"); 1959 goto err_hif_stop; 1960 } 1961 1962 /* Some firmware revisions do not properly set up hardware rx filter 1963 * registers. 1964 * 1965 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK 1966 * is filled with 0s instead of 1s allowing HW to respond with ACKs to 1967 * any frames that matches MAC_PCU_RX_FILTER which is also 1968 * misconfigured to accept anything. 1969 * 1970 * The ADDR1 is programmed using internal firmware structure field and 1971 * can't be (easily/sanely) reached from the driver explicitly. It is 1972 * possible to implicitly make it correct by creating a dummy vdev and 1973 * then deleting it. 1974 */ 1975 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 1976 status = ath10k_core_reset_rx_filter(ar); 1977 if (status) { 1978 ath10k_err(ar, 1979 "failed to reset rx filter: %d\n", status); 1980 goto err_hif_stop; 1981 } 1982 } 1983 1984 /* If firmware indicates Full Rx Reorder support it must be used in a 1985 * slightly different manner. Let HTT code know. 1986 */ 1987 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 1988 ar->wmi.svc_map)); 1989 1990 status = ath10k_htt_rx_ring_refill(ar); 1991 if (status) { 1992 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 1993 goto err_hif_stop; 1994 } 1995 1996 if (ar->max_num_vdevs >= 64) 1997 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL; 1998 else 1999 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 2000 2001 INIT_LIST_HEAD(&ar->arvifs); 2002 2003 /* we don't care about HTT in UTF mode */ 2004 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2005 status = ath10k_htt_setup(&ar->htt); 2006 if (status) { 2007 ath10k_err(ar, "failed to setup htt: %d\n", status); 2008 goto err_hif_stop; 2009 } 2010 } 2011 2012 status = ath10k_debug_start(ar); 2013 if (status) 2014 goto err_hif_stop; 2015 2016 return 0; 2017 2018 err_hif_stop: 2019 ath10k_hif_stop(ar); 2020 err_htt_rx_detach: 2021 ath10k_htt_rx_free(&ar->htt); 2022 err_htt_tx_detach: 2023 ath10k_htt_tx_free(&ar->htt); 2024 err_wmi_detach: 2025 ath10k_wmi_detach(ar); 2026 err: 2027 return status; 2028 } 2029 EXPORT_SYMBOL(ath10k_core_start); 2030 2031 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 2032 { 2033 int ret; 2034 unsigned long time_left; 2035 2036 reinit_completion(&ar->target_suspend); 2037 2038 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 2039 if (ret) { 2040 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 2041 return ret; 2042 } 2043 2044 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 2045 2046 if (!time_left) { 2047 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 2048 return -ETIMEDOUT; 2049 } 2050 2051 return 0; 2052 } 2053 2054 void ath10k_core_stop(struct ath10k *ar) 2055 { 2056 lockdep_assert_held(&ar->conf_mutex); 2057 ath10k_debug_stop(ar); 2058 2059 /* try to suspend target */ 2060 if (ar->state != ATH10K_STATE_RESTARTING && 2061 ar->state != ATH10K_STATE_UTF) 2062 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 2063 2064 ath10k_hif_stop(ar); 2065 ath10k_htt_tx_stop(&ar->htt); 2066 ath10k_htt_rx_free(&ar->htt); 2067 ath10k_wmi_detach(ar); 2068 } 2069 EXPORT_SYMBOL(ath10k_core_stop); 2070 2071 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 2072 * order to know what hw capabilities should be advertised to mac80211 it is 2073 * necessary to load the firmware (and tear it down immediately since start 2074 * hook will try to init it again) before registering */ 2075 static int ath10k_core_probe_fw(struct ath10k *ar) 2076 { 2077 struct bmi_target_info target_info; 2078 int ret = 0; 2079 2080 ret = ath10k_hif_power_up(ar); 2081 if (ret) { 2082 ath10k_err(ar, "could not start pci hif (%d)\n", ret); 2083 return ret; 2084 } 2085 2086 memset(&target_info, 0, sizeof(target_info)); 2087 ret = ath10k_bmi_get_target_info(ar, &target_info); 2088 if (ret) { 2089 ath10k_err(ar, "could not get target info (%d)\n", ret); 2090 goto err_power_down; 2091 } 2092 2093 ar->target_version = target_info.version; 2094 ar->hw->wiphy->hw_version = target_info.version; 2095 2096 ret = ath10k_init_hw_params(ar); 2097 if (ret) { 2098 ath10k_err(ar, "could not get hw params (%d)\n", ret); 2099 goto err_power_down; 2100 } 2101 2102 ret = ath10k_core_fetch_firmware_files(ar); 2103 if (ret) { 2104 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 2105 goto err_power_down; 2106 } 2107 2108 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) != 2109 sizeof(ar->normal_mode_fw.fw_file.fw_version)); 2110 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version, 2111 sizeof(ar->hw->wiphy->fw_version)); 2112 2113 ath10k_debug_print_hwfw_info(ar); 2114 2115 ret = ath10k_core_pre_cal_download(ar); 2116 if (ret) { 2117 /* pre calibration data download is not necessary 2118 * for all the chipsets. Ignore failures and continue. 2119 */ 2120 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2121 "could not load pre cal data: %d\n", ret); 2122 } 2123 2124 ret = ath10k_core_get_board_id_from_otp(ar); 2125 if (ret && ret != -EOPNOTSUPP) { 2126 ath10k_err(ar, "failed to get board id from otp: %d\n", 2127 ret); 2128 goto err_free_firmware_files; 2129 } 2130 2131 ret = ath10k_core_fetch_board_file(ar); 2132 if (ret) { 2133 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 2134 goto err_free_firmware_files; 2135 } 2136 2137 ath10k_debug_print_board_info(ar); 2138 2139 ret = ath10k_core_init_firmware_features(ar); 2140 if (ret) { 2141 ath10k_err(ar, "fatal problem with firmware features: %d\n", 2142 ret); 2143 goto err_free_firmware_files; 2144 } 2145 2146 ret = ath10k_swap_code_seg_init(ar, &ar->normal_mode_fw.fw_file); 2147 if (ret) { 2148 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 2149 ret); 2150 goto err_free_firmware_files; 2151 } 2152 2153 mutex_lock(&ar->conf_mutex); 2154 2155 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL, 2156 &ar->normal_mode_fw); 2157 if (ret) { 2158 ath10k_err(ar, "could not init core (%d)\n", ret); 2159 goto err_unlock; 2160 } 2161 2162 ath10k_debug_print_boot_info(ar); 2163 ath10k_core_stop(ar); 2164 2165 mutex_unlock(&ar->conf_mutex); 2166 2167 ath10k_hif_power_down(ar); 2168 return 0; 2169 2170 err_unlock: 2171 mutex_unlock(&ar->conf_mutex); 2172 2173 err_free_firmware_files: 2174 ath10k_core_free_firmware_files(ar); 2175 2176 err_power_down: 2177 ath10k_hif_power_down(ar); 2178 2179 return ret; 2180 } 2181 2182 static void ath10k_core_register_work(struct work_struct *work) 2183 { 2184 struct ath10k *ar = container_of(work, struct ath10k, register_work); 2185 int status; 2186 2187 /* peer stats are enabled by default */ 2188 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags); 2189 2190 status = ath10k_core_probe_fw(ar); 2191 if (status) { 2192 ath10k_err(ar, "could not probe fw (%d)\n", status); 2193 goto err; 2194 } 2195 2196 status = ath10k_mac_register(ar); 2197 if (status) { 2198 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 2199 goto err_release_fw; 2200 } 2201 2202 status = ath10k_debug_register(ar); 2203 if (status) { 2204 ath10k_err(ar, "unable to initialize debugfs\n"); 2205 goto err_unregister_mac; 2206 } 2207 2208 status = ath10k_spectral_create(ar); 2209 if (status) { 2210 ath10k_err(ar, "failed to initialize spectral\n"); 2211 goto err_debug_destroy; 2212 } 2213 2214 status = ath10k_thermal_register(ar); 2215 if (status) { 2216 ath10k_err(ar, "could not register thermal device: %d\n", 2217 status); 2218 goto err_spectral_destroy; 2219 } 2220 2221 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 2222 return; 2223 2224 err_spectral_destroy: 2225 ath10k_spectral_destroy(ar); 2226 err_debug_destroy: 2227 ath10k_debug_destroy(ar); 2228 err_unregister_mac: 2229 ath10k_mac_unregister(ar); 2230 err_release_fw: 2231 ath10k_core_free_firmware_files(ar); 2232 err: 2233 /* TODO: It's probably a good idea to release device from the driver 2234 * but calling device_release_driver() here will cause a deadlock. 2235 */ 2236 return; 2237 } 2238 2239 int ath10k_core_register(struct ath10k *ar, u32 chip_id) 2240 { 2241 ar->chip_id = chip_id; 2242 queue_work(ar->workqueue, &ar->register_work); 2243 2244 return 0; 2245 } 2246 EXPORT_SYMBOL(ath10k_core_register); 2247 2248 void ath10k_core_unregister(struct ath10k *ar) 2249 { 2250 cancel_work_sync(&ar->register_work); 2251 2252 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 2253 return; 2254 2255 ath10k_thermal_unregister(ar); 2256 /* Stop spectral before unregistering from mac80211 to remove the 2257 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 2258 * would be already be free'd recursively, leading to a double free. 2259 */ 2260 ath10k_spectral_destroy(ar); 2261 2262 /* We must unregister from mac80211 before we stop HTC and HIF. 2263 * Otherwise we will fail to submit commands to FW and mac80211 will be 2264 * unhappy about callback failures. */ 2265 ath10k_mac_unregister(ar); 2266 2267 ath10k_testmode_destroy(ar); 2268 2269 ath10k_core_free_firmware_files(ar); 2270 ath10k_core_free_board_files(ar); 2271 2272 ath10k_debug_unregister(ar); 2273 } 2274 EXPORT_SYMBOL(ath10k_core_unregister); 2275 2276 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 2277 enum ath10k_bus bus, 2278 enum ath10k_hw_rev hw_rev, 2279 const struct ath10k_hif_ops *hif_ops) 2280 { 2281 struct ath10k *ar; 2282 int ret; 2283 2284 ar = ath10k_mac_create(priv_size); 2285 if (!ar) 2286 return NULL; 2287 2288 ar->ath_common.priv = ar; 2289 ar->ath_common.hw = ar->hw; 2290 ar->dev = dev; 2291 ar->hw_rev = hw_rev; 2292 ar->hif.ops = hif_ops; 2293 ar->hif.bus = bus; 2294 2295 switch (hw_rev) { 2296 case ATH10K_HW_QCA988X: 2297 case ATH10K_HW_QCA9887: 2298 ar->regs = &qca988x_regs; 2299 ar->hw_values = &qca988x_values; 2300 break; 2301 case ATH10K_HW_QCA6174: 2302 case ATH10K_HW_QCA9377: 2303 ar->regs = &qca6174_regs; 2304 ar->hw_values = &qca6174_values; 2305 break; 2306 case ATH10K_HW_QCA99X0: 2307 case ATH10K_HW_QCA9984: 2308 ar->regs = &qca99x0_regs; 2309 ar->hw_values = &qca99x0_values; 2310 break; 2311 case ATH10K_HW_QCA9888: 2312 ar->regs = &qca99x0_regs; 2313 ar->hw_values = &qca9888_values; 2314 break; 2315 case ATH10K_HW_QCA4019: 2316 ar->regs = &qca4019_regs; 2317 ar->hw_values = &qca4019_values; 2318 break; 2319 default: 2320 ath10k_err(ar, "unsupported core hardware revision %d\n", 2321 hw_rev); 2322 ret = -ENOTSUPP; 2323 goto err_free_mac; 2324 } 2325 2326 init_completion(&ar->scan.started); 2327 init_completion(&ar->scan.completed); 2328 init_completion(&ar->scan.on_channel); 2329 init_completion(&ar->target_suspend); 2330 init_completion(&ar->wow.wakeup_completed); 2331 2332 init_completion(&ar->install_key_done); 2333 init_completion(&ar->vdev_setup_done); 2334 init_completion(&ar->thermal.wmi_sync); 2335 init_completion(&ar->bss_survey_done); 2336 2337 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 2338 2339 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 2340 if (!ar->workqueue) 2341 goto err_free_mac; 2342 2343 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 2344 if (!ar->workqueue_aux) 2345 goto err_free_wq; 2346 2347 mutex_init(&ar->conf_mutex); 2348 spin_lock_init(&ar->data_lock); 2349 spin_lock_init(&ar->txqs_lock); 2350 2351 INIT_LIST_HEAD(&ar->txqs); 2352 INIT_LIST_HEAD(&ar->peers); 2353 init_waitqueue_head(&ar->peer_mapping_wq); 2354 init_waitqueue_head(&ar->htt.empty_tx_wq); 2355 init_waitqueue_head(&ar->wmi.tx_credits_wq); 2356 2357 init_completion(&ar->offchan_tx_completed); 2358 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 2359 skb_queue_head_init(&ar->offchan_tx_queue); 2360 2361 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 2362 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 2363 2364 INIT_WORK(&ar->register_work, ath10k_core_register_work); 2365 INIT_WORK(&ar->restart_work, ath10k_core_restart); 2366 INIT_WORK(&ar->set_coverage_class_work, 2367 ath10k_core_set_coverage_class_work); 2368 2369 init_dummy_netdev(&ar->napi_dev); 2370 2371 ret = ath10k_debug_create(ar); 2372 if (ret) 2373 goto err_free_aux_wq; 2374 2375 return ar; 2376 2377 err_free_aux_wq: 2378 destroy_workqueue(ar->workqueue_aux); 2379 err_free_wq: 2380 destroy_workqueue(ar->workqueue); 2381 2382 err_free_mac: 2383 ath10k_mac_destroy(ar); 2384 2385 return NULL; 2386 } 2387 EXPORT_SYMBOL(ath10k_core_create); 2388 2389 void ath10k_core_destroy(struct ath10k *ar) 2390 { 2391 flush_workqueue(ar->workqueue); 2392 destroy_workqueue(ar->workqueue); 2393 2394 flush_workqueue(ar->workqueue_aux); 2395 destroy_workqueue(ar->workqueue_aux); 2396 2397 ath10k_debug_destroy(ar); 2398 ath10k_htt_tx_destroy(&ar->htt); 2399 ath10k_wmi_free_host_mem(ar); 2400 ath10k_mac_destroy(ar); 2401 } 2402 EXPORT_SYMBOL(ath10k_core_destroy); 2403 2404 MODULE_AUTHOR("Qualcomm Atheros"); 2405 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards."); 2406 MODULE_LICENSE("Dual BSD/GPL"); 2407