1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include <linux/module.h> 19 #include <linux/firmware.h> 20 #include <linux/of.h> 21 #include <linux/dmi.h> 22 #include <linux/ctype.h> 23 #include <asm/byteorder.h> 24 25 #include "core.h" 26 #include "mac.h" 27 #include "htc.h" 28 #include "hif.h" 29 #include "wmi.h" 30 #include "bmi.h" 31 #include "debug.h" 32 #include "htt.h" 33 #include "testmode.h" 34 #include "wmi-ops.h" 35 36 unsigned int ath10k_debug_mask; 37 static unsigned int ath10k_cryptmode_param; 38 static bool uart_print; 39 static bool skip_otp; 40 static bool rawmode; 41 42 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 43 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 44 module_param(uart_print, bool, 0644); 45 module_param(skip_otp, bool, 0644); 46 module_param(rawmode, bool, 0644); 47 48 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 49 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 50 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 51 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 52 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); 53 54 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 55 { 56 .id = QCA988X_HW_2_0_VERSION, 57 .dev_id = QCA988X_2_0_DEVICE_ID, 58 .name = "qca988x hw2.0", 59 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 60 .uart_pin = 7, 61 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 62 .otp_exe_param = 0, 63 .channel_counters_freq_hz = 88000, 64 .max_probe_resp_desc_thres = 0, 65 .cal_data_len = 2116, 66 .fw = { 67 .dir = QCA988X_HW_2_0_FW_DIR, 68 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 69 .board_size = QCA988X_BOARD_DATA_SZ, 70 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 71 }, 72 .hw_ops = &qca988x_ops, 73 .decap_align_bytes = 4, 74 .spectral_bin_discard = 0, 75 .vht160_mcs_rx_highest = 0, 76 .vht160_mcs_tx_highest = 0, 77 .n_cipher_suites = 8, 78 }, 79 { 80 .id = QCA9887_HW_1_0_VERSION, 81 .dev_id = QCA9887_1_0_DEVICE_ID, 82 .name = "qca9887 hw1.0", 83 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR, 84 .uart_pin = 7, 85 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 86 .otp_exe_param = 0, 87 .channel_counters_freq_hz = 88000, 88 .max_probe_resp_desc_thres = 0, 89 .cal_data_len = 2116, 90 .fw = { 91 .dir = QCA9887_HW_1_0_FW_DIR, 92 .board = QCA9887_HW_1_0_BOARD_DATA_FILE, 93 .board_size = QCA9887_BOARD_DATA_SZ, 94 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ, 95 }, 96 .hw_ops = &qca988x_ops, 97 .decap_align_bytes = 4, 98 .spectral_bin_discard = 0, 99 .vht160_mcs_rx_highest = 0, 100 .vht160_mcs_tx_highest = 0, 101 .n_cipher_suites = 8, 102 }, 103 { 104 .id = QCA6174_HW_2_1_VERSION, 105 .dev_id = QCA6164_2_1_DEVICE_ID, 106 .name = "qca6164 hw2.1", 107 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 108 .uart_pin = 6, 109 .otp_exe_param = 0, 110 .channel_counters_freq_hz = 88000, 111 .max_probe_resp_desc_thres = 0, 112 .cal_data_len = 8124, 113 .fw = { 114 .dir = QCA6174_HW_2_1_FW_DIR, 115 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 116 .board_size = QCA6174_BOARD_DATA_SZ, 117 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 118 }, 119 .hw_ops = &qca988x_ops, 120 .decap_align_bytes = 4, 121 .spectral_bin_discard = 0, 122 .vht160_mcs_rx_highest = 0, 123 .vht160_mcs_tx_highest = 0, 124 .n_cipher_suites = 8, 125 }, 126 { 127 .id = QCA6174_HW_2_1_VERSION, 128 .dev_id = QCA6174_2_1_DEVICE_ID, 129 .name = "qca6174 hw2.1", 130 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 131 .uart_pin = 6, 132 .otp_exe_param = 0, 133 .channel_counters_freq_hz = 88000, 134 .max_probe_resp_desc_thres = 0, 135 .cal_data_len = 8124, 136 .fw = { 137 .dir = QCA6174_HW_2_1_FW_DIR, 138 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 139 .board_size = QCA6174_BOARD_DATA_SZ, 140 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 141 }, 142 .hw_ops = &qca988x_ops, 143 .decap_align_bytes = 4, 144 .spectral_bin_discard = 0, 145 .vht160_mcs_rx_highest = 0, 146 .vht160_mcs_tx_highest = 0, 147 .n_cipher_suites = 8, 148 }, 149 { 150 .id = QCA6174_HW_3_0_VERSION, 151 .dev_id = QCA6174_2_1_DEVICE_ID, 152 .name = "qca6174 hw3.0", 153 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 154 .uart_pin = 6, 155 .otp_exe_param = 0, 156 .channel_counters_freq_hz = 88000, 157 .max_probe_resp_desc_thres = 0, 158 .cal_data_len = 8124, 159 .fw = { 160 .dir = QCA6174_HW_3_0_FW_DIR, 161 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 162 .board_size = QCA6174_BOARD_DATA_SZ, 163 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 164 }, 165 .hw_ops = &qca988x_ops, 166 .decap_align_bytes = 4, 167 .spectral_bin_discard = 0, 168 .vht160_mcs_rx_highest = 0, 169 .vht160_mcs_tx_highest = 0, 170 .n_cipher_suites = 8, 171 }, 172 { 173 .id = QCA6174_HW_3_2_VERSION, 174 .dev_id = QCA6174_2_1_DEVICE_ID, 175 .name = "qca6174 hw3.2", 176 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 177 .uart_pin = 6, 178 .otp_exe_param = 0, 179 .channel_counters_freq_hz = 88000, 180 .max_probe_resp_desc_thres = 0, 181 .cal_data_len = 8124, 182 .fw = { 183 /* uses same binaries as hw3.0 */ 184 .dir = QCA6174_HW_3_0_FW_DIR, 185 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 186 .board_size = QCA6174_BOARD_DATA_SZ, 187 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 188 }, 189 .hw_ops = &qca6174_ops, 190 .hw_clk = qca6174_clk, 191 .target_cpu_freq = 176000000, 192 .decap_align_bytes = 4, 193 .spectral_bin_discard = 0, 194 .vht160_mcs_rx_highest = 0, 195 .vht160_mcs_tx_highest = 0, 196 .n_cipher_suites = 8, 197 }, 198 { 199 .id = QCA99X0_HW_2_0_DEV_VERSION, 200 .dev_id = QCA99X0_2_0_DEVICE_ID, 201 .name = "qca99x0 hw2.0", 202 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 203 .uart_pin = 7, 204 .otp_exe_param = 0x00000700, 205 .continuous_frag_desc = true, 206 .cck_rate_map_rev2 = true, 207 .channel_counters_freq_hz = 150000, 208 .max_probe_resp_desc_thres = 24, 209 .tx_chain_mask = 0xf, 210 .rx_chain_mask = 0xf, 211 .max_spatial_stream = 4, 212 .cal_data_len = 12064, 213 .fw = { 214 .dir = QCA99X0_HW_2_0_FW_DIR, 215 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 216 .board_size = QCA99X0_BOARD_DATA_SZ, 217 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 218 }, 219 .sw_decrypt_mcast_mgmt = true, 220 .hw_ops = &qca99x0_ops, 221 .decap_align_bytes = 1, 222 .spectral_bin_discard = 4, 223 .vht160_mcs_rx_highest = 0, 224 .vht160_mcs_tx_highest = 0, 225 .n_cipher_suites = 11, 226 }, 227 { 228 .id = QCA9984_HW_1_0_DEV_VERSION, 229 .dev_id = QCA9984_1_0_DEVICE_ID, 230 .name = "qca9984/qca9994 hw1.0", 231 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR, 232 .uart_pin = 7, 233 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 234 .otp_exe_param = 0x00000700, 235 .continuous_frag_desc = true, 236 .cck_rate_map_rev2 = true, 237 .channel_counters_freq_hz = 150000, 238 .max_probe_resp_desc_thres = 24, 239 .tx_chain_mask = 0xf, 240 .rx_chain_mask = 0xf, 241 .max_spatial_stream = 4, 242 .cal_data_len = 12064, 243 .fw = { 244 .dir = QCA9984_HW_1_0_FW_DIR, 245 .board = QCA9984_HW_1_0_BOARD_DATA_FILE, 246 .board_size = QCA99X0_BOARD_DATA_SZ, 247 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 248 }, 249 .sw_decrypt_mcast_mgmt = true, 250 .hw_ops = &qca99x0_ops, 251 .decap_align_bytes = 1, 252 .spectral_bin_discard = 12, 253 254 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz 255 * or 2x2 160Mhz, long-guard-interval. 256 */ 257 .vht160_mcs_rx_highest = 1560, 258 .vht160_mcs_tx_highest = 1560, 259 .n_cipher_suites = 11, 260 }, 261 { 262 .id = QCA9888_HW_2_0_DEV_VERSION, 263 .dev_id = QCA9888_2_0_DEVICE_ID, 264 .name = "qca9888 hw2.0", 265 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR, 266 .uart_pin = 7, 267 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 268 .otp_exe_param = 0x00000700, 269 .continuous_frag_desc = true, 270 .channel_counters_freq_hz = 150000, 271 .max_probe_resp_desc_thres = 24, 272 .tx_chain_mask = 3, 273 .rx_chain_mask = 3, 274 .max_spatial_stream = 2, 275 .cal_data_len = 12064, 276 .fw = { 277 .dir = QCA9888_HW_2_0_FW_DIR, 278 .board = QCA9888_HW_2_0_BOARD_DATA_FILE, 279 .board_size = QCA99X0_BOARD_DATA_SZ, 280 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 281 }, 282 .sw_decrypt_mcast_mgmt = true, 283 .hw_ops = &qca99x0_ops, 284 .decap_align_bytes = 1, 285 .spectral_bin_discard = 12, 286 287 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or 288 * 1x1 160Mhz, long-guard-interval. 289 */ 290 .vht160_mcs_rx_highest = 780, 291 .vht160_mcs_tx_highest = 780, 292 .n_cipher_suites = 11, 293 }, 294 { 295 .id = QCA9377_HW_1_0_DEV_VERSION, 296 .dev_id = QCA9377_1_0_DEVICE_ID, 297 .name = "qca9377 hw1.0", 298 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 299 .uart_pin = 6, 300 .otp_exe_param = 0, 301 .channel_counters_freq_hz = 88000, 302 .max_probe_resp_desc_thres = 0, 303 .cal_data_len = 8124, 304 .fw = { 305 .dir = QCA9377_HW_1_0_FW_DIR, 306 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 307 .board_size = QCA9377_BOARD_DATA_SZ, 308 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 309 }, 310 .hw_ops = &qca988x_ops, 311 .decap_align_bytes = 4, 312 .spectral_bin_discard = 0, 313 .vht160_mcs_rx_highest = 0, 314 .vht160_mcs_tx_highest = 0, 315 .n_cipher_suites = 8, 316 }, 317 { 318 .id = QCA9377_HW_1_1_DEV_VERSION, 319 .dev_id = QCA9377_1_0_DEVICE_ID, 320 .name = "qca9377 hw1.1", 321 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 322 .uart_pin = 6, 323 .otp_exe_param = 0, 324 .channel_counters_freq_hz = 88000, 325 .max_probe_resp_desc_thres = 0, 326 .cal_data_len = 8124, 327 .fw = { 328 .dir = QCA9377_HW_1_0_FW_DIR, 329 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 330 .board_size = QCA9377_BOARD_DATA_SZ, 331 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 332 }, 333 .hw_ops = &qca6174_ops, 334 .hw_clk = qca6174_clk, 335 .target_cpu_freq = 176000000, 336 .decap_align_bytes = 4, 337 .spectral_bin_discard = 0, 338 .vht160_mcs_rx_highest = 0, 339 .vht160_mcs_tx_highest = 0, 340 .n_cipher_suites = 8, 341 }, 342 { 343 .id = QCA4019_HW_1_0_DEV_VERSION, 344 .dev_id = 0, 345 .name = "qca4019 hw1.0", 346 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR, 347 .uart_pin = 7, 348 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 349 .otp_exe_param = 0x0010000, 350 .continuous_frag_desc = true, 351 .cck_rate_map_rev2 = true, 352 .channel_counters_freq_hz = 125000, 353 .max_probe_resp_desc_thres = 24, 354 .tx_chain_mask = 0x3, 355 .rx_chain_mask = 0x3, 356 .max_spatial_stream = 2, 357 .cal_data_len = 12064, 358 .fw = { 359 .dir = QCA4019_HW_1_0_FW_DIR, 360 .board = QCA4019_HW_1_0_BOARD_DATA_FILE, 361 .board_size = QCA4019_BOARD_DATA_SZ, 362 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, 363 }, 364 .sw_decrypt_mcast_mgmt = true, 365 .hw_ops = &qca99x0_ops, 366 .decap_align_bytes = 1, 367 .spectral_bin_discard = 4, 368 .vht160_mcs_rx_highest = 0, 369 .vht160_mcs_tx_highest = 0, 370 .n_cipher_suites = 11, 371 }, 372 }; 373 374 static const char *const ath10k_core_fw_feature_str[] = { 375 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 376 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 377 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 378 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 379 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 380 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 381 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 382 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 383 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 384 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 385 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 386 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 387 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", 388 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl", 389 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param", 390 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war", 391 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast", 392 [ATH10K_FW_FEATURE_NO_PS] = "no-ps", 393 }; 394 395 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 396 size_t buf_len, 397 enum ath10k_fw_features feat) 398 { 399 /* make sure that ath10k_core_fw_feature_str[] gets updated */ 400 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != 401 ATH10K_FW_FEATURE_COUNT); 402 403 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 404 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 405 return scnprintf(buf, buf_len, "bit%d", feat); 406 } 407 408 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 409 } 410 411 void ath10k_core_get_fw_features_str(struct ath10k *ar, 412 char *buf, 413 size_t buf_len) 414 { 415 size_t len = 0; 416 int i; 417 418 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 419 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) { 420 if (len > 0) 421 len += scnprintf(buf + len, buf_len - len, ","); 422 423 len += ath10k_core_get_fw_feature_str(buf + len, 424 buf_len - len, 425 i); 426 } 427 } 428 } 429 430 static void ath10k_send_suspend_complete(struct ath10k *ar) 431 { 432 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 433 434 complete(&ar->target_suspend); 435 } 436 437 static void ath10k_init_sdio(struct ath10k *ar) 438 { 439 u32 param = 0; 440 441 ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256); 442 ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99); 443 ath10k_bmi_read32(ar, hi_acs_flags, ¶m); 444 445 param |= (HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET | 446 HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET | 447 HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE); 448 449 ath10k_bmi_write32(ar, hi_acs_flags, param); 450 } 451 452 static int ath10k_init_configure_target(struct ath10k *ar) 453 { 454 u32 param_host; 455 int ret; 456 457 /* tell target which HTC version it is used*/ 458 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 459 HTC_PROTOCOL_VERSION); 460 if (ret) { 461 ath10k_err(ar, "settings HTC version failed\n"); 462 return ret; 463 } 464 465 /* set the firmware mode to STA/IBSS/AP */ 466 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 467 if (ret) { 468 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 469 return ret; 470 } 471 472 /* TODO following parameters need to be re-visited. */ 473 /* num_device */ 474 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 475 /* Firmware mode */ 476 /* FIXME: Why FW_MODE_AP ??.*/ 477 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 478 /* mac_addr_method */ 479 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 480 /* firmware_bridge */ 481 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 482 /* fwsubmode */ 483 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 484 485 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 486 if (ret) { 487 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 488 return ret; 489 } 490 491 /* We do all byte-swapping on the host */ 492 ret = ath10k_bmi_write32(ar, hi_be, 0); 493 if (ret) { 494 ath10k_err(ar, "setting host CPU BE mode failed\n"); 495 return ret; 496 } 497 498 /* FW descriptor/Data swap flags */ 499 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 500 501 if (ret) { 502 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 503 return ret; 504 } 505 506 /* Some devices have a special sanity check that verifies the PCI 507 * Device ID is written to this host interest var. It is known to be 508 * required to boot QCA6164. 509 */ 510 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 511 ar->dev_id); 512 if (ret) { 513 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 514 return ret; 515 } 516 517 return 0; 518 } 519 520 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 521 const char *dir, 522 const char *file) 523 { 524 char filename[100]; 525 const struct firmware *fw; 526 int ret; 527 528 if (file == NULL) 529 return ERR_PTR(-ENOENT); 530 531 if (dir == NULL) 532 dir = "."; 533 534 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 535 ret = request_firmware(&fw, filename, ar->dev); 536 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n", 537 filename, ret); 538 539 if (ret) 540 return ERR_PTR(ret); 541 542 return fw; 543 } 544 545 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 546 size_t data_len) 547 { 548 u32 board_data_size = ar->hw_params.fw.board_size; 549 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 550 u32 board_ext_data_addr; 551 int ret; 552 553 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 554 if (ret) { 555 ath10k_err(ar, "could not read board ext data addr (%d)\n", 556 ret); 557 return ret; 558 } 559 560 ath10k_dbg(ar, ATH10K_DBG_BOOT, 561 "boot push board extended data addr 0x%x\n", 562 board_ext_data_addr); 563 564 if (board_ext_data_addr == 0) 565 return 0; 566 567 if (data_len != (board_data_size + board_ext_data_size)) { 568 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 569 data_len, board_data_size, board_ext_data_size); 570 return -EINVAL; 571 } 572 573 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 574 data + board_data_size, 575 board_ext_data_size); 576 if (ret) { 577 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 578 return ret; 579 } 580 581 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 582 (board_ext_data_size << 16) | 1); 583 if (ret) { 584 ath10k_err(ar, "could not write board ext data bit (%d)\n", 585 ret); 586 return ret; 587 } 588 589 return 0; 590 } 591 592 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 593 size_t data_len) 594 { 595 u32 board_data_size = ar->hw_params.fw.board_size; 596 u32 address; 597 int ret; 598 599 ret = ath10k_push_board_ext_data(ar, data, data_len); 600 if (ret) { 601 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 602 goto exit; 603 } 604 605 ret = ath10k_bmi_read32(ar, hi_board_data, &address); 606 if (ret) { 607 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 608 goto exit; 609 } 610 611 ret = ath10k_bmi_write_memory(ar, address, data, 612 min_t(u32, board_data_size, 613 data_len)); 614 if (ret) { 615 ath10k_err(ar, "could not write board data (%d)\n", ret); 616 goto exit; 617 } 618 619 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 620 if (ret) { 621 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 622 goto exit; 623 } 624 625 exit: 626 return ret; 627 } 628 629 static int ath10k_download_cal_file(struct ath10k *ar, 630 const struct firmware *file) 631 { 632 int ret; 633 634 if (!file) 635 return -ENOENT; 636 637 if (IS_ERR(file)) 638 return PTR_ERR(file); 639 640 ret = ath10k_download_board_data(ar, file->data, file->size); 641 if (ret) { 642 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 643 return ret; 644 } 645 646 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 647 648 return 0; 649 } 650 651 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name) 652 { 653 struct device_node *node; 654 int data_len; 655 void *data; 656 int ret; 657 658 node = ar->dev->of_node; 659 if (!node) 660 /* Device Tree is optional, don't print any warnings if 661 * there's no node for ath10k. 662 */ 663 return -ENOENT; 664 665 if (!of_get_property(node, dt_name, &data_len)) { 666 /* The calibration data node is optional */ 667 return -ENOENT; 668 } 669 670 if (data_len != ar->hw_params.cal_data_len) { 671 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 672 data_len); 673 ret = -EMSGSIZE; 674 goto out; 675 } 676 677 data = kmalloc(data_len, GFP_KERNEL); 678 if (!data) { 679 ret = -ENOMEM; 680 goto out; 681 } 682 683 ret = of_property_read_u8_array(node, dt_name, data, data_len); 684 if (ret) { 685 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 686 ret); 687 goto out_free; 688 } 689 690 ret = ath10k_download_board_data(ar, data, data_len); 691 if (ret) { 692 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 693 ret); 694 goto out_free; 695 } 696 697 ret = 0; 698 699 out_free: 700 kfree(data); 701 702 out: 703 return ret; 704 } 705 706 static int ath10k_download_cal_eeprom(struct ath10k *ar) 707 { 708 size_t data_len; 709 void *data = NULL; 710 int ret; 711 712 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len); 713 if (ret) { 714 if (ret != -EOPNOTSUPP) 715 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n", 716 ret); 717 goto out_free; 718 } 719 720 ret = ath10k_download_board_data(ar, data, data_len); 721 if (ret) { 722 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n", 723 ret); 724 goto out_free; 725 } 726 727 ret = 0; 728 729 out_free: 730 kfree(data); 731 732 return ret; 733 } 734 735 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) 736 { 737 u32 result, address; 738 u8 board_id, chip_id; 739 int ret, bmi_board_id_param; 740 741 address = ar->hw_params.patch_load_addr; 742 743 if (!ar->normal_mode_fw.fw_file.otp_data || 744 !ar->normal_mode_fw.fw_file.otp_len) { 745 ath10k_warn(ar, 746 "failed to retrieve board id because of invalid otp\n"); 747 return -ENODATA; 748 } 749 750 ath10k_dbg(ar, ATH10K_DBG_BOOT, 751 "boot upload otp to 0x%x len %zd for board id\n", 752 address, ar->normal_mode_fw.fw_file.otp_len); 753 754 ret = ath10k_bmi_fast_download(ar, address, 755 ar->normal_mode_fw.fw_file.otp_data, 756 ar->normal_mode_fw.fw_file.otp_len); 757 if (ret) { 758 ath10k_err(ar, "could not write otp for board id check: %d\n", 759 ret); 760 return ret; 761 } 762 763 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 764 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 765 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID; 766 else 767 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID; 768 769 ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result); 770 if (ret) { 771 ath10k_err(ar, "could not execute otp for board id check: %d\n", 772 ret); 773 return ret; 774 } 775 776 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); 777 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); 778 779 ath10k_dbg(ar, ATH10K_DBG_BOOT, 780 "boot get otp board id result 0x%08x board_id %d chip_id %d\n", 781 result, board_id, chip_id); 782 783 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 || 784 (board_id == 0)) { 785 ath10k_dbg(ar, ATH10K_DBG_BOOT, 786 "board id does not exist in otp, ignore it\n"); 787 return -EOPNOTSUPP; 788 } 789 790 ar->id.bmi_ids_valid = true; 791 ar->id.bmi_board_id = board_id; 792 ar->id.bmi_chip_id = chip_id; 793 794 return 0; 795 } 796 797 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data) 798 { 799 struct ath10k *ar = data; 800 const char *bdf_ext; 801 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC; 802 u8 bdf_enabled; 803 int i; 804 805 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE) 806 return; 807 808 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) { 809 ath10k_dbg(ar, ATH10K_DBG_BOOT, 810 "wrong smbios bdf ext type length (%d).\n", 811 hdr->length); 812 return; 813 } 814 815 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET); 816 if (!bdf_enabled) { 817 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n"); 818 return; 819 } 820 821 /* Only one string exists (per spec) */ 822 bdf_ext = (char *)hdr + hdr->length; 823 824 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) { 825 ath10k_dbg(ar, ATH10K_DBG_BOOT, 826 "bdf variant magic does not match.\n"); 827 return; 828 } 829 830 for (i = 0; i < strlen(bdf_ext); i++) { 831 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) { 832 ath10k_dbg(ar, ATH10K_DBG_BOOT, 833 "bdf variant name contains non ascii chars.\n"); 834 return; 835 } 836 } 837 838 /* Copy extension name without magic suffix */ 839 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic), 840 sizeof(ar->id.bdf_ext)) < 0) { 841 ath10k_dbg(ar, ATH10K_DBG_BOOT, 842 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 843 bdf_ext); 844 return; 845 } 846 847 ath10k_dbg(ar, ATH10K_DBG_BOOT, 848 "found and validated bdf variant smbios_type 0x%x bdf %s\n", 849 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext); 850 } 851 852 static int ath10k_core_check_smbios(struct ath10k *ar) 853 { 854 ar->id.bdf_ext[0] = '\0'; 855 dmi_walk(ath10k_core_check_bdfext, ar); 856 857 if (ar->id.bdf_ext[0] == '\0') 858 return -ENODATA; 859 860 return 0; 861 } 862 863 static int ath10k_download_and_run_otp(struct ath10k *ar) 864 { 865 u32 result, address = ar->hw_params.patch_load_addr; 866 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 867 int ret; 868 869 ret = ath10k_download_board_data(ar, 870 ar->running_fw->board_data, 871 ar->running_fw->board_len); 872 if (ret) { 873 ath10k_err(ar, "failed to download board data: %d\n", ret); 874 return ret; 875 } 876 877 /* OTP is optional */ 878 879 if (!ar->running_fw->fw_file.otp_data || 880 !ar->running_fw->fw_file.otp_len) { 881 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n", 882 ar->running_fw->fw_file.otp_data, 883 ar->running_fw->fw_file.otp_len); 884 return 0; 885 } 886 887 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 888 address, ar->running_fw->fw_file.otp_len); 889 890 ret = ath10k_bmi_fast_download(ar, address, 891 ar->running_fw->fw_file.otp_data, 892 ar->running_fw->fw_file.otp_len); 893 if (ret) { 894 ath10k_err(ar, "could not write otp (%d)\n", ret); 895 return ret; 896 } 897 898 /* As of now pre-cal is valid for 10_4 variants */ 899 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 900 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 901 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL; 902 903 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 904 if (ret) { 905 ath10k_err(ar, "could not execute otp (%d)\n", ret); 906 return ret; 907 } 908 909 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 910 911 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 912 ar->running_fw->fw_file.fw_features)) && 913 result != 0) { 914 ath10k_err(ar, "otp calibration failed: %d", result); 915 return -EINVAL; 916 } 917 918 return 0; 919 } 920 921 static int ath10k_download_fw(struct ath10k *ar) 922 { 923 u32 address, data_len; 924 const void *data; 925 int ret; 926 927 address = ar->hw_params.patch_load_addr; 928 929 data = ar->running_fw->fw_file.firmware_data; 930 data_len = ar->running_fw->fw_file.firmware_len; 931 932 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file); 933 if (ret) { 934 ath10k_err(ar, "failed to configure fw code swap: %d\n", 935 ret); 936 return ret; 937 } 938 939 ath10k_dbg(ar, ATH10K_DBG_BOOT, 940 "boot uploading firmware image %pK len %d\n", 941 data, data_len); 942 943 ret = ath10k_bmi_fast_download(ar, address, data, data_len); 944 if (ret) { 945 ath10k_err(ar, "failed to download firmware: %d\n", 946 ret); 947 return ret; 948 } 949 950 return ret; 951 } 952 953 static void ath10k_core_free_board_files(struct ath10k *ar) 954 { 955 if (!IS_ERR(ar->normal_mode_fw.board)) 956 release_firmware(ar->normal_mode_fw.board); 957 958 ar->normal_mode_fw.board = NULL; 959 ar->normal_mode_fw.board_data = NULL; 960 ar->normal_mode_fw.board_len = 0; 961 } 962 963 static void ath10k_core_free_firmware_files(struct ath10k *ar) 964 { 965 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware)) 966 release_firmware(ar->normal_mode_fw.fw_file.firmware); 967 968 if (!IS_ERR(ar->cal_file)) 969 release_firmware(ar->cal_file); 970 971 if (!IS_ERR(ar->pre_cal_file)) 972 release_firmware(ar->pre_cal_file); 973 974 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file); 975 976 ar->normal_mode_fw.fw_file.otp_data = NULL; 977 ar->normal_mode_fw.fw_file.otp_len = 0; 978 979 ar->normal_mode_fw.fw_file.firmware = NULL; 980 ar->normal_mode_fw.fw_file.firmware_data = NULL; 981 ar->normal_mode_fw.fw_file.firmware_len = 0; 982 983 ar->cal_file = NULL; 984 ar->pre_cal_file = NULL; 985 } 986 987 static int ath10k_fetch_cal_file(struct ath10k *ar) 988 { 989 char filename[100]; 990 991 /* pre-cal-<bus>-<id>.bin */ 992 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin", 993 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 994 995 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 996 if (!IS_ERR(ar->pre_cal_file)) 997 goto success; 998 999 /* cal-<bus>-<id>.bin */ 1000 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 1001 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1002 1003 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1004 if (IS_ERR(ar->cal_file)) 1005 /* calibration file is optional, don't print any warnings */ 1006 return PTR_ERR(ar->cal_file); 1007 success: 1008 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 1009 ATH10K_FW_DIR, filename); 1010 1011 return 0; 1012 } 1013 1014 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar) 1015 { 1016 if (!ar->hw_params.fw.board) { 1017 ath10k_err(ar, "failed to find board file fw entry\n"); 1018 return -EINVAL; 1019 } 1020 1021 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1022 ar->hw_params.fw.dir, 1023 ar->hw_params.fw.board); 1024 if (IS_ERR(ar->normal_mode_fw.board)) 1025 return PTR_ERR(ar->normal_mode_fw.board); 1026 1027 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data; 1028 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size; 1029 1030 return 0; 1031 } 1032 1033 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, 1034 const void *buf, size_t buf_len, 1035 const char *boardname) 1036 { 1037 const struct ath10k_fw_ie *hdr; 1038 bool name_match_found; 1039 int ret, board_ie_id; 1040 size_t board_ie_len; 1041 const void *board_ie_data; 1042 1043 name_match_found = false; 1044 1045 /* go through ATH10K_BD_IE_BOARD_ elements */ 1046 while (buf_len > sizeof(struct ath10k_fw_ie)) { 1047 hdr = buf; 1048 board_ie_id = le32_to_cpu(hdr->id); 1049 board_ie_len = le32_to_cpu(hdr->len); 1050 board_ie_data = hdr->data; 1051 1052 buf_len -= sizeof(*hdr); 1053 buf += sizeof(*hdr); 1054 1055 if (buf_len < ALIGN(board_ie_len, 4)) { 1056 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", 1057 buf_len, ALIGN(board_ie_len, 4)); 1058 ret = -EINVAL; 1059 goto out; 1060 } 1061 1062 switch (board_ie_id) { 1063 case ATH10K_BD_IE_BOARD_NAME: 1064 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", 1065 board_ie_data, board_ie_len); 1066 1067 if (board_ie_len != strlen(boardname)) 1068 break; 1069 1070 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 1071 if (ret) 1072 break; 1073 1074 name_match_found = true; 1075 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1076 "boot found match for name '%s'", 1077 boardname); 1078 break; 1079 case ATH10K_BD_IE_BOARD_DATA: 1080 if (!name_match_found) 1081 /* no match found */ 1082 break; 1083 1084 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1085 "boot found board data for '%s'", 1086 boardname); 1087 1088 ar->normal_mode_fw.board_data = board_ie_data; 1089 ar->normal_mode_fw.board_len = board_ie_len; 1090 1091 ret = 0; 1092 goto out; 1093 default: 1094 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", 1095 board_ie_id); 1096 break; 1097 } 1098 1099 /* jump over the padding */ 1100 board_ie_len = ALIGN(board_ie_len, 4); 1101 1102 buf_len -= board_ie_len; 1103 buf += board_ie_len; 1104 } 1105 1106 /* no match found */ 1107 ret = -ENOENT; 1108 1109 out: 1110 return ret; 1111 } 1112 1113 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, 1114 const char *boardname, 1115 const char *filename) 1116 { 1117 size_t len, magic_len, ie_len; 1118 struct ath10k_fw_ie *hdr; 1119 const u8 *data; 1120 int ret, ie_id; 1121 1122 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1123 ar->hw_params.fw.dir, 1124 filename); 1125 if (IS_ERR(ar->normal_mode_fw.board)) 1126 return PTR_ERR(ar->normal_mode_fw.board); 1127 1128 data = ar->normal_mode_fw.board->data; 1129 len = ar->normal_mode_fw.board->size; 1130 1131 /* magic has extra null byte padded */ 1132 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; 1133 if (len < magic_len) { 1134 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", 1135 ar->hw_params.fw.dir, filename, len); 1136 ret = -EINVAL; 1137 goto err; 1138 } 1139 1140 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { 1141 ath10k_err(ar, "found invalid board magic\n"); 1142 ret = -EINVAL; 1143 goto err; 1144 } 1145 1146 /* magic is padded to 4 bytes */ 1147 magic_len = ALIGN(magic_len, 4); 1148 if (len < magic_len) { 1149 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", 1150 ar->hw_params.fw.dir, filename, len); 1151 ret = -EINVAL; 1152 goto err; 1153 } 1154 1155 data += magic_len; 1156 len -= magic_len; 1157 1158 while (len > sizeof(struct ath10k_fw_ie)) { 1159 hdr = (struct ath10k_fw_ie *)data; 1160 ie_id = le32_to_cpu(hdr->id); 1161 ie_len = le32_to_cpu(hdr->len); 1162 1163 len -= sizeof(*hdr); 1164 data = hdr->data; 1165 1166 if (len < ALIGN(ie_len, 4)) { 1167 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", 1168 ie_id, ie_len, len); 1169 ret = -EINVAL; 1170 goto err; 1171 } 1172 1173 switch (ie_id) { 1174 case ATH10K_BD_IE_BOARD: 1175 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1176 boardname); 1177 if (ret == -ENOENT && ar->id.bdf_ext[0] != '\0') { 1178 /* try default bdf if variant was not found */ 1179 char *s, *v = ",variant="; 1180 char boardname2[100]; 1181 1182 strlcpy(boardname2, boardname, 1183 sizeof(boardname2)); 1184 1185 s = strstr(boardname2, v); 1186 if (s) 1187 *s = '\0'; /* strip ",variant=%s" */ 1188 1189 ret = ath10k_core_parse_bd_ie_board(ar, data, 1190 ie_len, 1191 boardname2); 1192 } 1193 1194 if (ret == -ENOENT) 1195 /* no match found, continue */ 1196 break; 1197 else if (ret) 1198 /* there was an error, bail out */ 1199 goto err; 1200 1201 /* board data found */ 1202 goto out; 1203 } 1204 1205 /* jump over the padding */ 1206 ie_len = ALIGN(ie_len, 4); 1207 1208 len -= ie_len; 1209 data += ie_len; 1210 } 1211 1212 out: 1213 if (!ar->normal_mode_fw.board_data || !ar->normal_mode_fw.board_len) { 1214 ath10k_err(ar, 1215 "failed to fetch board data for %s from %s/%s\n", 1216 boardname, ar->hw_params.fw.dir, filename); 1217 ret = -ENODATA; 1218 goto err; 1219 } 1220 1221 return 0; 1222 1223 err: 1224 ath10k_core_free_board_files(ar); 1225 return ret; 1226 } 1227 1228 static int ath10k_core_create_board_name(struct ath10k *ar, char *name, 1229 size_t name_len) 1230 { 1231 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */ 1232 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 }; 1233 1234 if (ar->id.bmi_ids_valid) { 1235 scnprintf(name, name_len, 1236 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d", 1237 ath10k_bus_str(ar->hif.bus), 1238 ar->id.bmi_chip_id, 1239 ar->id.bmi_board_id); 1240 goto out; 1241 } 1242 1243 if (ar->id.bdf_ext[0] != '\0') 1244 scnprintf(variant, sizeof(variant), ",variant=%s", 1245 ar->id.bdf_ext); 1246 1247 scnprintf(name, name_len, 1248 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s", 1249 ath10k_bus_str(ar->hif.bus), 1250 ar->id.vendor, ar->id.device, 1251 ar->id.subsystem_vendor, ar->id.subsystem_device, variant); 1252 out: 1253 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); 1254 1255 return 0; 1256 } 1257 1258 static int ath10k_core_fetch_board_file(struct ath10k *ar) 1259 { 1260 char boardname[100]; 1261 int ret; 1262 1263 ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname)); 1264 if (ret) { 1265 ath10k_err(ar, "failed to create board name: %d", ret); 1266 return ret; 1267 } 1268 1269 ar->bd_api = 2; 1270 ret = ath10k_core_fetch_board_data_api_n(ar, boardname, 1271 ATH10K_BOARD_API2_FILE); 1272 if (!ret) 1273 goto success; 1274 1275 ar->bd_api = 1; 1276 ret = ath10k_core_fetch_board_data_api_1(ar); 1277 if (ret) { 1278 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n", 1279 ar->hw_params.fw.dir); 1280 return ret; 1281 } 1282 1283 success: 1284 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); 1285 return 0; 1286 } 1287 1288 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1289 struct ath10k_fw_file *fw_file) 1290 { 1291 size_t magic_len, len, ie_len; 1292 int ie_id, i, index, bit, ret; 1293 struct ath10k_fw_ie *hdr; 1294 const u8 *data; 1295 __le32 *timestamp, *version; 1296 1297 /* first fetch the firmware file (firmware-*.bin) */ 1298 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1299 name); 1300 if (IS_ERR(fw_file->firmware)) 1301 return PTR_ERR(fw_file->firmware); 1302 1303 data = fw_file->firmware->data; 1304 len = fw_file->firmware->size; 1305 1306 /* magic also includes the null byte, check that as well */ 1307 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 1308 1309 if (len < magic_len) { 1310 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 1311 ar->hw_params.fw.dir, name, len); 1312 ret = -EINVAL; 1313 goto err; 1314 } 1315 1316 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 1317 ath10k_err(ar, "invalid firmware magic\n"); 1318 ret = -EINVAL; 1319 goto err; 1320 } 1321 1322 /* jump over the padding */ 1323 magic_len = ALIGN(magic_len, 4); 1324 1325 len -= magic_len; 1326 data += magic_len; 1327 1328 /* loop elements */ 1329 while (len > sizeof(struct ath10k_fw_ie)) { 1330 hdr = (struct ath10k_fw_ie *)data; 1331 1332 ie_id = le32_to_cpu(hdr->id); 1333 ie_len = le32_to_cpu(hdr->len); 1334 1335 len -= sizeof(*hdr); 1336 data += sizeof(*hdr); 1337 1338 if (len < ie_len) { 1339 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 1340 ie_id, len, ie_len); 1341 ret = -EINVAL; 1342 goto err; 1343 } 1344 1345 switch (ie_id) { 1346 case ATH10K_FW_IE_FW_VERSION: 1347 if (ie_len > sizeof(fw_file->fw_version) - 1) 1348 break; 1349 1350 memcpy(fw_file->fw_version, data, ie_len); 1351 fw_file->fw_version[ie_len] = '\0'; 1352 1353 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1354 "found fw version %s\n", 1355 fw_file->fw_version); 1356 break; 1357 case ATH10K_FW_IE_TIMESTAMP: 1358 if (ie_len != sizeof(u32)) 1359 break; 1360 1361 timestamp = (__le32 *)data; 1362 1363 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 1364 le32_to_cpup(timestamp)); 1365 break; 1366 case ATH10K_FW_IE_FEATURES: 1367 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1368 "found firmware features ie (%zd B)\n", 1369 ie_len); 1370 1371 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 1372 index = i / 8; 1373 bit = i % 8; 1374 1375 if (index == ie_len) 1376 break; 1377 1378 if (data[index] & (1 << bit)) { 1379 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1380 "Enabling feature bit: %i\n", 1381 i); 1382 __set_bit(i, fw_file->fw_features); 1383 } 1384 } 1385 1386 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 1387 fw_file->fw_features, 1388 sizeof(fw_file->fw_features)); 1389 break; 1390 case ATH10K_FW_IE_FW_IMAGE: 1391 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1392 "found fw image ie (%zd B)\n", 1393 ie_len); 1394 1395 fw_file->firmware_data = data; 1396 fw_file->firmware_len = ie_len; 1397 1398 break; 1399 case ATH10K_FW_IE_OTP_IMAGE: 1400 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1401 "found otp image ie (%zd B)\n", 1402 ie_len); 1403 1404 fw_file->otp_data = data; 1405 fw_file->otp_len = ie_len; 1406 1407 break; 1408 case ATH10K_FW_IE_WMI_OP_VERSION: 1409 if (ie_len != sizeof(u32)) 1410 break; 1411 1412 version = (__le32 *)data; 1413 1414 fw_file->wmi_op_version = le32_to_cpup(version); 1415 1416 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 1417 fw_file->wmi_op_version); 1418 break; 1419 case ATH10K_FW_IE_HTT_OP_VERSION: 1420 if (ie_len != sizeof(u32)) 1421 break; 1422 1423 version = (__le32 *)data; 1424 1425 fw_file->htt_op_version = le32_to_cpup(version); 1426 1427 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 1428 fw_file->htt_op_version); 1429 break; 1430 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 1431 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1432 "found fw code swap image ie (%zd B)\n", 1433 ie_len); 1434 fw_file->codeswap_data = data; 1435 fw_file->codeswap_len = ie_len; 1436 break; 1437 default: 1438 ath10k_warn(ar, "Unknown FW IE: %u\n", 1439 le32_to_cpu(hdr->id)); 1440 break; 1441 } 1442 1443 /* jump over the padding */ 1444 ie_len = ALIGN(ie_len, 4); 1445 1446 len -= ie_len; 1447 data += ie_len; 1448 } 1449 1450 if (!fw_file->firmware_data || 1451 !fw_file->firmware_len) { 1452 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 1453 ar->hw_params.fw.dir, name); 1454 ret = -ENOMEDIUM; 1455 goto err; 1456 } 1457 1458 return 0; 1459 1460 err: 1461 ath10k_core_free_firmware_files(ar); 1462 return ret; 1463 } 1464 1465 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name, 1466 size_t fw_name_len, int fw_api) 1467 { 1468 switch (ar->hif.bus) { 1469 case ATH10K_BUS_SDIO: 1470 case ATH10K_BUS_USB: 1471 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin", 1472 ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus), 1473 fw_api); 1474 break; 1475 case ATH10K_BUS_PCI: 1476 case ATH10K_BUS_AHB: 1477 scnprintf(fw_name, fw_name_len, "%s-%d.bin", 1478 ATH10K_FW_FILE_BASE, fw_api); 1479 break; 1480 } 1481 } 1482 1483 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 1484 { 1485 int ret, i; 1486 char fw_name[100]; 1487 1488 /* calibration file is optional, don't check for any errors */ 1489 ath10k_fetch_cal_file(ar); 1490 1491 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) { 1492 ar->fw_api = i; 1493 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", 1494 ar->fw_api); 1495 1496 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api); 1497 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name, 1498 &ar->normal_mode_fw.fw_file); 1499 if (!ret) 1500 goto success; 1501 } 1502 1503 /* we end up here if we couldn't fetch any firmware */ 1504 1505 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d", 1506 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir, 1507 ret); 1508 1509 return ret; 1510 1511 success: 1512 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1513 1514 return 0; 1515 } 1516 1517 static int ath10k_core_pre_cal_download(struct ath10k *ar) 1518 { 1519 int ret; 1520 1521 ret = ath10k_download_cal_file(ar, ar->pre_cal_file); 1522 if (ret == 0) { 1523 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE; 1524 goto success; 1525 } 1526 1527 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1528 "boot did not find a pre calibration file, try DT next: %d\n", 1529 ret); 1530 1531 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data"); 1532 if (ret) { 1533 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1534 "unable to load pre cal data from DT: %d\n", ret); 1535 return ret; 1536 } 1537 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT; 1538 1539 success: 1540 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1541 ath10k_cal_mode_str(ar->cal_mode)); 1542 1543 return 0; 1544 } 1545 1546 static int ath10k_core_pre_cal_config(struct ath10k *ar) 1547 { 1548 int ret; 1549 1550 ret = ath10k_core_pre_cal_download(ar); 1551 if (ret) { 1552 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1553 "failed to load pre cal data: %d\n", ret); 1554 return ret; 1555 } 1556 1557 ret = ath10k_core_get_board_id_from_otp(ar); 1558 if (ret) { 1559 ath10k_err(ar, "failed to get board id: %d\n", ret); 1560 return ret; 1561 } 1562 1563 ret = ath10k_download_and_run_otp(ar); 1564 if (ret) { 1565 ath10k_err(ar, "failed to run otp: %d\n", ret); 1566 return ret; 1567 } 1568 1569 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1570 "pre cal configuration done successfully\n"); 1571 1572 return 0; 1573 } 1574 1575 static int ath10k_download_cal_data(struct ath10k *ar) 1576 { 1577 int ret; 1578 1579 ret = ath10k_core_pre_cal_config(ar); 1580 if (ret == 0) 1581 return 0; 1582 1583 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1584 "pre cal download procedure failed, try cal file: %d\n", 1585 ret); 1586 1587 ret = ath10k_download_cal_file(ar, ar->cal_file); 1588 if (ret == 0) { 1589 ar->cal_mode = ATH10K_CAL_MODE_FILE; 1590 goto done; 1591 } 1592 1593 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1594 "boot did not find a calibration file, try DT next: %d\n", 1595 ret); 1596 1597 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data"); 1598 if (ret == 0) { 1599 ar->cal_mode = ATH10K_CAL_MODE_DT; 1600 goto done; 1601 } 1602 1603 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1604 "boot did not find DT entry, try target EEPROM next: %d\n", 1605 ret); 1606 1607 ret = ath10k_download_cal_eeprom(ar); 1608 if (ret == 0) { 1609 ar->cal_mode = ATH10K_CAL_MODE_EEPROM; 1610 goto done; 1611 } 1612 1613 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1614 "boot did not find target EEPROM entry, try OTP next: %d\n", 1615 ret); 1616 1617 ret = ath10k_download_and_run_otp(ar); 1618 if (ret) { 1619 ath10k_err(ar, "failed to run otp: %d\n", ret); 1620 return ret; 1621 } 1622 1623 ar->cal_mode = ATH10K_CAL_MODE_OTP; 1624 1625 done: 1626 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1627 ath10k_cal_mode_str(ar->cal_mode)); 1628 return 0; 1629 } 1630 1631 static int ath10k_init_uart(struct ath10k *ar) 1632 { 1633 int ret; 1634 1635 /* 1636 * Explicitly setting UART prints to zero as target turns it on 1637 * based on scratch registers. 1638 */ 1639 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 1640 if (ret) { 1641 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 1642 return ret; 1643 } 1644 1645 if (!uart_print) 1646 return 0; 1647 1648 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 1649 if (ret) { 1650 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1651 return ret; 1652 } 1653 1654 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 1655 if (ret) { 1656 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1657 return ret; 1658 } 1659 1660 /* Set the UART baud rate to 19200. */ 1661 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 1662 if (ret) { 1663 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 1664 return ret; 1665 } 1666 1667 ath10k_info(ar, "UART prints enabled\n"); 1668 return 0; 1669 } 1670 1671 static int ath10k_init_hw_params(struct ath10k *ar) 1672 { 1673 const struct ath10k_hw_params *uninitialized_var(hw_params); 1674 int i; 1675 1676 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 1677 hw_params = &ath10k_hw_params_list[i]; 1678 1679 if (hw_params->id == ar->target_version && 1680 hw_params->dev_id == ar->dev_id) 1681 break; 1682 } 1683 1684 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 1685 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 1686 ar->target_version); 1687 return -EINVAL; 1688 } 1689 1690 ar->hw_params = *hw_params; 1691 1692 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 1693 ar->hw_params.name, ar->target_version); 1694 1695 return 0; 1696 } 1697 1698 static void ath10k_core_restart(struct work_struct *work) 1699 { 1700 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 1701 int ret; 1702 1703 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1704 1705 /* Place a barrier to make sure the compiler doesn't reorder 1706 * CRASH_FLUSH and calling other functions. 1707 */ 1708 barrier(); 1709 1710 ieee80211_stop_queues(ar->hw); 1711 ath10k_drain_tx(ar); 1712 complete(&ar->scan.started); 1713 complete(&ar->scan.completed); 1714 complete(&ar->scan.on_channel); 1715 complete(&ar->offchan_tx_completed); 1716 complete(&ar->install_key_done); 1717 complete(&ar->vdev_setup_done); 1718 complete(&ar->thermal.wmi_sync); 1719 complete(&ar->bss_survey_done); 1720 wake_up(&ar->htt.empty_tx_wq); 1721 wake_up(&ar->wmi.tx_credits_wq); 1722 wake_up(&ar->peer_mapping_wq); 1723 1724 /* TODO: We can have one instance of cancelling coverage_class_work by 1725 * moving it to ath10k_halt(), so that both stop() and restart() would 1726 * call that but it takes conf_mutex() and if we call cancel_work_sync() 1727 * with conf_mutex it will deadlock. 1728 */ 1729 cancel_work_sync(&ar->set_coverage_class_work); 1730 1731 mutex_lock(&ar->conf_mutex); 1732 1733 switch (ar->state) { 1734 case ATH10K_STATE_ON: 1735 ar->state = ATH10K_STATE_RESTARTING; 1736 ath10k_halt(ar); 1737 ath10k_scan_finish(ar); 1738 ieee80211_restart_hw(ar->hw); 1739 break; 1740 case ATH10K_STATE_OFF: 1741 /* this can happen if driver is being unloaded 1742 * or if the crash happens during FW probing 1743 */ 1744 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 1745 break; 1746 case ATH10K_STATE_RESTARTING: 1747 /* hw restart might be requested from multiple places */ 1748 break; 1749 case ATH10K_STATE_RESTARTED: 1750 ar->state = ATH10K_STATE_WEDGED; 1751 /* fall through */ 1752 case ATH10K_STATE_WEDGED: 1753 ath10k_warn(ar, "device is wedged, will not restart\n"); 1754 break; 1755 case ATH10K_STATE_UTF: 1756 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 1757 break; 1758 } 1759 1760 mutex_unlock(&ar->conf_mutex); 1761 1762 ret = ath10k_debug_fw_devcoredump(ar); 1763 if (ret) 1764 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d", 1765 ret); 1766 } 1767 1768 static void ath10k_core_set_coverage_class_work(struct work_struct *work) 1769 { 1770 struct ath10k *ar = container_of(work, struct ath10k, 1771 set_coverage_class_work); 1772 1773 if (ar->hw_params.hw_ops->set_coverage_class) 1774 ar->hw_params.hw_ops->set_coverage_class(ar, -1); 1775 } 1776 1777 static int ath10k_core_init_firmware_features(struct ath10k *ar) 1778 { 1779 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 1780 1781 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) && 1782 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 1783 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 1784 return -EINVAL; 1785 } 1786 1787 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 1788 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 1789 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version); 1790 return -EINVAL; 1791 } 1792 1793 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 1794 switch (ath10k_cryptmode_param) { 1795 case ATH10K_CRYPT_MODE_HW: 1796 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1797 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1798 break; 1799 case ATH10K_CRYPT_MODE_SW: 1800 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1801 fw_file->fw_features)) { 1802 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 1803 return -EINVAL; 1804 } 1805 1806 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1807 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1808 break; 1809 default: 1810 ath10k_info(ar, "invalid cryptmode: %d\n", 1811 ath10k_cryptmode_param); 1812 return -EINVAL; 1813 } 1814 1815 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 1816 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 1817 1818 if (rawmode) { 1819 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1820 fw_file->fw_features)) { 1821 ath10k_err(ar, "rawmode = 1 requires support from firmware"); 1822 return -EINVAL; 1823 } 1824 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1825 } 1826 1827 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 1828 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 1829 1830 /* Workaround: 1831 * 1832 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 1833 * and causes enormous performance issues (malformed frames, 1834 * etc). 1835 * 1836 * Disabling A-MSDU makes RAW mode stable with heavy traffic 1837 * albeit a bit slower compared to regular operation. 1838 */ 1839 ar->htt.max_num_amsdu = 1; 1840 } 1841 1842 /* Backwards compatibility for firmwares without 1843 * ATH10K_FW_IE_WMI_OP_VERSION. 1844 */ 1845 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 1846 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 1847 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 1848 fw_file->fw_features)) 1849 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 1850 else 1851 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 1852 } else { 1853 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 1854 } 1855 } 1856 1857 switch (fw_file->wmi_op_version) { 1858 case ATH10K_FW_WMI_OP_VERSION_MAIN: 1859 ar->max_num_peers = TARGET_NUM_PEERS; 1860 ar->max_num_stations = TARGET_NUM_STATIONS; 1861 ar->max_num_vdevs = TARGET_NUM_VDEVS; 1862 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 1863 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1864 WMI_STAT_PEER; 1865 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1866 break; 1867 case ATH10K_FW_WMI_OP_VERSION_10_1: 1868 case ATH10K_FW_WMI_OP_VERSION_10_2: 1869 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 1870 if (ath10k_peer_stats_enabled(ar)) { 1871 ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS; 1872 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS; 1873 } else { 1874 ar->max_num_peers = TARGET_10X_NUM_PEERS; 1875 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 1876 } 1877 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 1878 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 1879 ar->fw_stats_req_mask = WMI_STAT_PEER; 1880 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1881 break; 1882 case ATH10K_FW_WMI_OP_VERSION_TLV: 1883 ar->max_num_peers = TARGET_TLV_NUM_PEERS; 1884 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 1885 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 1886 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 1887 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 1888 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 1889 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1890 WMI_STAT_PEER; 1891 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1892 break; 1893 case ATH10K_FW_WMI_OP_VERSION_10_4: 1894 ar->max_num_peers = TARGET_10_4_NUM_PEERS; 1895 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 1896 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 1897 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 1898 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 1899 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER | 1900 WMI_10_4_STAT_PEER_EXTD; 1901 ar->max_spatial_stream = ar->hw_params.max_spatial_stream; 1902 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS; 1903 1904 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, 1905 fw_file->fw_features)) 1906 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC; 1907 else 1908 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 1909 break; 1910 case ATH10K_FW_WMI_OP_VERSION_UNSET: 1911 case ATH10K_FW_WMI_OP_VERSION_MAX: 1912 WARN_ON(1); 1913 return -EINVAL; 1914 } 1915 1916 /* Backwards compatibility for firmwares without 1917 * ATH10K_FW_IE_HTT_OP_VERSION. 1918 */ 1919 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 1920 switch (fw_file->wmi_op_version) { 1921 case ATH10K_FW_WMI_OP_VERSION_MAIN: 1922 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 1923 break; 1924 case ATH10K_FW_WMI_OP_VERSION_10_1: 1925 case ATH10K_FW_WMI_OP_VERSION_10_2: 1926 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 1927 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 1928 break; 1929 case ATH10K_FW_WMI_OP_VERSION_TLV: 1930 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 1931 break; 1932 case ATH10K_FW_WMI_OP_VERSION_10_4: 1933 case ATH10K_FW_WMI_OP_VERSION_UNSET: 1934 case ATH10K_FW_WMI_OP_VERSION_MAX: 1935 ath10k_err(ar, "htt op version not found from fw meta data"); 1936 return -EINVAL; 1937 } 1938 } 1939 1940 return 0; 1941 } 1942 1943 static int ath10k_core_reset_rx_filter(struct ath10k *ar) 1944 { 1945 int ret; 1946 int vdev_id; 1947 int vdev_type; 1948 int vdev_subtype; 1949 const u8 *vdev_addr; 1950 1951 vdev_id = 0; 1952 vdev_type = WMI_VDEV_TYPE_STA; 1953 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE); 1954 vdev_addr = ar->mac_addr; 1955 1956 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype, 1957 vdev_addr); 1958 if (ret) { 1959 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret); 1960 return ret; 1961 } 1962 1963 ret = ath10k_wmi_vdev_delete(ar, vdev_id); 1964 if (ret) { 1965 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret); 1966 return ret; 1967 } 1968 1969 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be 1970 * serialized properly implicitly. 1971 * 1972 * Moreover (most) WMI commands have no explicit acknowledges. It is 1973 * possible to infer it implicitly by poking firmware with echo 1974 * command - getting a reply means all preceding comments have been 1975 * (mostly) processed. 1976 * 1977 * In case of vdev create/delete this is sufficient. 1978 * 1979 * Without this it's possible to end up with a race when HTT Rx ring is 1980 * started before vdev create/delete hack is complete allowing a short 1981 * window of opportunity to receive (and Tx ACK) a bunch of frames. 1982 */ 1983 ret = ath10k_wmi_barrier(ar); 1984 if (ret) { 1985 ath10k_err(ar, "failed to ping firmware: %d\n", ret); 1986 return ret; 1987 } 1988 1989 return 0; 1990 } 1991 1992 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 1993 const struct ath10k_fw_components *fw) 1994 { 1995 int status; 1996 u32 val; 1997 1998 lockdep_assert_held(&ar->conf_mutex); 1999 2000 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2001 2002 ar->running_fw = fw; 2003 2004 ath10k_bmi_start(ar); 2005 2006 if (ath10k_init_configure_target(ar)) { 2007 status = -EINVAL; 2008 goto err; 2009 } 2010 2011 status = ath10k_download_cal_data(ar); 2012 if (status) 2013 goto err; 2014 2015 /* Some of of qca988x solutions are having global reset issue 2016 * during target initialization. Bypassing PLL setting before 2017 * downloading firmware and letting the SoC run on REF_CLK is 2018 * fixing the problem. Corresponding firmware change is also needed 2019 * to set the clock source once the target is initialized. 2020 */ 2021 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 2022 ar->running_fw->fw_file.fw_features)) { 2023 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 2024 if (status) { 2025 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 2026 status); 2027 goto err; 2028 } 2029 } 2030 2031 status = ath10k_download_fw(ar); 2032 if (status) 2033 goto err; 2034 2035 status = ath10k_init_uart(ar); 2036 if (status) 2037 goto err; 2038 2039 if (ar->hif.bus == ATH10K_BUS_SDIO) 2040 ath10k_init_sdio(ar); 2041 2042 ar->htc.htc_ops.target_send_suspend_complete = 2043 ath10k_send_suspend_complete; 2044 2045 status = ath10k_htc_init(ar); 2046 if (status) { 2047 ath10k_err(ar, "could not init HTC (%d)\n", status); 2048 goto err; 2049 } 2050 2051 status = ath10k_bmi_done(ar); 2052 if (status) 2053 goto err; 2054 2055 status = ath10k_wmi_attach(ar); 2056 if (status) { 2057 ath10k_err(ar, "WMI attach failed: %d\n", status); 2058 goto err; 2059 } 2060 2061 status = ath10k_htt_init(ar); 2062 if (status) { 2063 ath10k_err(ar, "failed to init htt: %d\n", status); 2064 goto err_wmi_detach; 2065 } 2066 2067 status = ath10k_htt_tx_start(&ar->htt); 2068 if (status) { 2069 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 2070 goto err_wmi_detach; 2071 } 2072 2073 /* If firmware indicates Full Rx Reorder support it must be used in a 2074 * slightly different manner. Let HTT code know. 2075 */ 2076 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 2077 ar->wmi.svc_map)); 2078 2079 status = ath10k_htt_rx_alloc(&ar->htt); 2080 if (status) { 2081 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 2082 goto err_htt_tx_detach; 2083 } 2084 2085 status = ath10k_hif_start(ar); 2086 if (status) { 2087 ath10k_err(ar, "could not start HIF: %d\n", status); 2088 goto err_htt_rx_detach; 2089 } 2090 2091 status = ath10k_htc_wait_target(&ar->htc); 2092 if (status) { 2093 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 2094 goto err_hif_stop; 2095 } 2096 2097 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2098 status = ath10k_htt_connect(&ar->htt); 2099 if (status) { 2100 ath10k_err(ar, "failed to connect htt (%d)\n", status); 2101 goto err_hif_stop; 2102 } 2103 } 2104 2105 status = ath10k_wmi_connect(ar); 2106 if (status) { 2107 ath10k_err(ar, "could not connect wmi: %d\n", status); 2108 goto err_hif_stop; 2109 } 2110 2111 status = ath10k_htc_start(&ar->htc); 2112 if (status) { 2113 ath10k_err(ar, "failed to start htc: %d\n", status); 2114 goto err_hif_stop; 2115 } 2116 2117 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2118 status = ath10k_wmi_wait_for_service_ready(ar); 2119 if (status) { 2120 ath10k_warn(ar, "wmi service ready event not received"); 2121 goto err_hif_stop; 2122 } 2123 } 2124 2125 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 2126 ar->hw->wiphy->fw_version); 2127 2128 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) && 2129 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2130 val = 0; 2131 if (ath10k_peer_stats_enabled(ar)) 2132 val = WMI_10_4_PEER_STATS; 2133 2134 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) 2135 val |= WMI_10_4_BSS_CHANNEL_INFO_64; 2136 2137 /* 10.4 firmware supports BT-Coex without reloading firmware 2138 * via pdev param. To support Bluetooth coexistence pdev param, 2139 * WMI_COEX_GPIO_SUPPORT of extended resource config should be 2140 * enabled always. 2141 */ 2142 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 2143 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 2144 ar->running_fw->fw_file.fw_features)) 2145 val |= WMI_10_4_COEX_GPIO_SUPPORT; 2146 2147 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, 2148 ar->wmi.svc_map)) 2149 val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY; 2150 2151 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, 2152 ar->wmi.svc_map)) 2153 val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA; 2154 2155 status = ath10k_mac_ext_resource_config(ar, val); 2156 if (status) { 2157 ath10k_err(ar, 2158 "failed to send ext resource cfg command : %d\n", 2159 status); 2160 goto err_hif_stop; 2161 } 2162 } 2163 2164 status = ath10k_wmi_cmd_init(ar); 2165 if (status) { 2166 ath10k_err(ar, "could not send WMI init command (%d)\n", 2167 status); 2168 goto err_hif_stop; 2169 } 2170 2171 status = ath10k_wmi_wait_for_unified_ready(ar); 2172 if (status) { 2173 ath10k_err(ar, "wmi unified ready event not received\n"); 2174 goto err_hif_stop; 2175 } 2176 2177 /* Some firmware revisions do not properly set up hardware rx filter 2178 * registers. 2179 * 2180 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK 2181 * is filled with 0s instead of 1s allowing HW to respond with ACKs to 2182 * any frames that matches MAC_PCU_RX_FILTER which is also 2183 * misconfigured to accept anything. 2184 * 2185 * The ADDR1 is programmed using internal firmware structure field and 2186 * can't be (easily/sanely) reached from the driver explicitly. It is 2187 * possible to implicitly make it correct by creating a dummy vdev and 2188 * then deleting it. 2189 */ 2190 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2191 status = ath10k_core_reset_rx_filter(ar); 2192 if (status) { 2193 ath10k_err(ar, 2194 "failed to reset rx filter: %d\n", status); 2195 goto err_hif_stop; 2196 } 2197 } 2198 2199 status = ath10k_htt_rx_ring_refill(ar); 2200 if (status) { 2201 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 2202 goto err_hif_stop; 2203 } 2204 2205 if (ar->max_num_vdevs >= 64) 2206 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL; 2207 else 2208 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 2209 2210 INIT_LIST_HEAD(&ar->arvifs); 2211 2212 /* we don't care about HTT in UTF mode */ 2213 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2214 status = ath10k_htt_setup(&ar->htt); 2215 if (status) { 2216 ath10k_err(ar, "failed to setup htt: %d\n", status); 2217 goto err_hif_stop; 2218 } 2219 } 2220 2221 status = ath10k_debug_start(ar); 2222 if (status) 2223 goto err_hif_stop; 2224 2225 return 0; 2226 2227 err_hif_stop: 2228 ath10k_hif_stop(ar); 2229 err_htt_rx_detach: 2230 ath10k_htt_rx_free(&ar->htt); 2231 err_htt_tx_detach: 2232 ath10k_htt_tx_free(&ar->htt); 2233 err_wmi_detach: 2234 ath10k_wmi_detach(ar); 2235 err: 2236 return status; 2237 } 2238 EXPORT_SYMBOL(ath10k_core_start); 2239 2240 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 2241 { 2242 int ret; 2243 unsigned long time_left; 2244 2245 reinit_completion(&ar->target_suspend); 2246 2247 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 2248 if (ret) { 2249 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 2250 return ret; 2251 } 2252 2253 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 2254 2255 if (!time_left) { 2256 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 2257 return -ETIMEDOUT; 2258 } 2259 2260 return 0; 2261 } 2262 2263 void ath10k_core_stop(struct ath10k *ar) 2264 { 2265 lockdep_assert_held(&ar->conf_mutex); 2266 ath10k_debug_stop(ar); 2267 2268 /* try to suspend target */ 2269 if (ar->state != ATH10K_STATE_RESTARTING && 2270 ar->state != ATH10K_STATE_UTF) 2271 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 2272 2273 ath10k_hif_stop(ar); 2274 ath10k_htt_tx_stop(&ar->htt); 2275 ath10k_htt_rx_free(&ar->htt); 2276 ath10k_wmi_detach(ar); 2277 } 2278 EXPORT_SYMBOL(ath10k_core_stop); 2279 2280 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 2281 * order to know what hw capabilities should be advertised to mac80211 it is 2282 * necessary to load the firmware (and tear it down immediately since start 2283 * hook will try to init it again) before registering 2284 */ 2285 static int ath10k_core_probe_fw(struct ath10k *ar) 2286 { 2287 struct bmi_target_info target_info; 2288 int ret = 0; 2289 2290 ret = ath10k_hif_power_up(ar); 2291 if (ret) { 2292 ath10k_err(ar, "could not start pci hif (%d)\n", ret); 2293 return ret; 2294 } 2295 2296 memset(&target_info, 0, sizeof(target_info)); 2297 if (ar->hif.bus == ATH10K_BUS_SDIO) 2298 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info); 2299 else 2300 ret = ath10k_bmi_get_target_info(ar, &target_info); 2301 if (ret) { 2302 ath10k_err(ar, "could not get target info (%d)\n", ret); 2303 goto err_power_down; 2304 } 2305 2306 ar->target_version = target_info.version; 2307 ar->hw->wiphy->hw_version = target_info.version; 2308 2309 ret = ath10k_init_hw_params(ar); 2310 if (ret) { 2311 ath10k_err(ar, "could not get hw params (%d)\n", ret); 2312 goto err_power_down; 2313 } 2314 2315 ret = ath10k_core_fetch_firmware_files(ar); 2316 if (ret) { 2317 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 2318 goto err_power_down; 2319 } 2320 2321 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) != 2322 sizeof(ar->normal_mode_fw.fw_file.fw_version)); 2323 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version, 2324 sizeof(ar->hw->wiphy->fw_version)); 2325 2326 ath10k_debug_print_hwfw_info(ar); 2327 2328 ret = ath10k_core_pre_cal_download(ar); 2329 if (ret) { 2330 /* pre calibration data download is not necessary 2331 * for all the chipsets. Ignore failures and continue. 2332 */ 2333 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2334 "could not load pre cal data: %d\n", ret); 2335 } 2336 2337 ret = ath10k_core_get_board_id_from_otp(ar); 2338 if (ret && ret != -EOPNOTSUPP) { 2339 ath10k_err(ar, "failed to get board id from otp: %d\n", 2340 ret); 2341 goto err_free_firmware_files; 2342 } 2343 2344 ret = ath10k_core_check_smbios(ar); 2345 if (ret) 2346 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not set.\n"); 2347 2348 ret = ath10k_core_fetch_board_file(ar); 2349 if (ret) { 2350 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 2351 goto err_free_firmware_files; 2352 } 2353 2354 ath10k_debug_print_board_info(ar); 2355 2356 ret = ath10k_core_init_firmware_features(ar); 2357 if (ret) { 2358 ath10k_err(ar, "fatal problem with firmware features: %d\n", 2359 ret); 2360 goto err_free_firmware_files; 2361 } 2362 2363 ret = ath10k_swap_code_seg_init(ar, &ar->normal_mode_fw.fw_file); 2364 if (ret) { 2365 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 2366 ret); 2367 goto err_free_firmware_files; 2368 } 2369 2370 mutex_lock(&ar->conf_mutex); 2371 2372 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL, 2373 &ar->normal_mode_fw); 2374 if (ret) { 2375 ath10k_err(ar, "could not init core (%d)\n", ret); 2376 goto err_unlock; 2377 } 2378 2379 ath10k_debug_print_boot_info(ar); 2380 ath10k_core_stop(ar); 2381 2382 mutex_unlock(&ar->conf_mutex); 2383 2384 ath10k_hif_power_down(ar); 2385 return 0; 2386 2387 err_unlock: 2388 mutex_unlock(&ar->conf_mutex); 2389 2390 err_free_firmware_files: 2391 ath10k_core_free_firmware_files(ar); 2392 2393 err_power_down: 2394 ath10k_hif_power_down(ar); 2395 2396 return ret; 2397 } 2398 2399 static void ath10k_core_register_work(struct work_struct *work) 2400 { 2401 struct ath10k *ar = container_of(work, struct ath10k, register_work); 2402 int status; 2403 2404 /* peer stats are enabled by default */ 2405 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags); 2406 2407 status = ath10k_core_probe_fw(ar); 2408 if (status) { 2409 ath10k_err(ar, "could not probe fw (%d)\n", status); 2410 goto err; 2411 } 2412 2413 status = ath10k_mac_register(ar); 2414 if (status) { 2415 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 2416 goto err_release_fw; 2417 } 2418 2419 status = ath10k_debug_register(ar); 2420 if (status) { 2421 ath10k_err(ar, "unable to initialize debugfs\n"); 2422 goto err_unregister_mac; 2423 } 2424 2425 status = ath10k_spectral_create(ar); 2426 if (status) { 2427 ath10k_err(ar, "failed to initialize spectral\n"); 2428 goto err_debug_destroy; 2429 } 2430 2431 status = ath10k_thermal_register(ar); 2432 if (status) { 2433 ath10k_err(ar, "could not register thermal device: %d\n", 2434 status); 2435 goto err_spectral_destroy; 2436 } 2437 2438 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 2439 return; 2440 2441 err_spectral_destroy: 2442 ath10k_spectral_destroy(ar); 2443 err_debug_destroy: 2444 ath10k_debug_destroy(ar); 2445 err_unregister_mac: 2446 ath10k_mac_unregister(ar); 2447 err_release_fw: 2448 ath10k_core_free_firmware_files(ar); 2449 err: 2450 /* TODO: It's probably a good idea to release device from the driver 2451 * but calling device_release_driver() here will cause a deadlock. 2452 */ 2453 return; 2454 } 2455 2456 int ath10k_core_register(struct ath10k *ar, u32 chip_id) 2457 { 2458 ar->chip_id = chip_id; 2459 queue_work(ar->workqueue, &ar->register_work); 2460 2461 return 0; 2462 } 2463 EXPORT_SYMBOL(ath10k_core_register); 2464 2465 void ath10k_core_unregister(struct ath10k *ar) 2466 { 2467 cancel_work_sync(&ar->register_work); 2468 2469 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 2470 return; 2471 2472 ath10k_thermal_unregister(ar); 2473 /* Stop spectral before unregistering from mac80211 to remove the 2474 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 2475 * would be already be free'd recursively, leading to a double free. 2476 */ 2477 ath10k_spectral_destroy(ar); 2478 2479 /* We must unregister from mac80211 before we stop HTC and HIF. 2480 * Otherwise we will fail to submit commands to FW and mac80211 will be 2481 * unhappy about callback failures. 2482 */ 2483 ath10k_mac_unregister(ar); 2484 2485 ath10k_testmode_destroy(ar); 2486 2487 ath10k_core_free_firmware_files(ar); 2488 ath10k_core_free_board_files(ar); 2489 2490 ath10k_debug_unregister(ar); 2491 } 2492 EXPORT_SYMBOL(ath10k_core_unregister); 2493 2494 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 2495 enum ath10k_bus bus, 2496 enum ath10k_hw_rev hw_rev, 2497 const struct ath10k_hif_ops *hif_ops) 2498 { 2499 struct ath10k *ar; 2500 int ret; 2501 2502 ar = ath10k_mac_create(priv_size); 2503 if (!ar) 2504 return NULL; 2505 2506 ar->ath_common.priv = ar; 2507 ar->ath_common.hw = ar->hw; 2508 ar->dev = dev; 2509 ar->hw_rev = hw_rev; 2510 ar->hif.ops = hif_ops; 2511 ar->hif.bus = bus; 2512 2513 switch (hw_rev) { 2514 case ATH10K_HW_QCA988X: 2515 case ATH10K_HW_QCA9887: 2516 ar->regs = &qca988x_regs; 2517 ar->hw_ce_regs = &qcax_ce_regs; 2518 ar->hw_values = &qca988x_values; 2519 break; 2520 case ATH10K_HW_QCA6174: 2521 case ATH10K_HW_QCA9377: 2522 ar->regs = &qca6174_regs; 2523 ar->hw_ce_regs = &qcax_ce_regs; 2524 ar->hw_values = &qca6174_values; 2525 break; 2526 case ATH10K_HW_QCA99X0: 2527 case ATH10K_HW_QCA9984: 2528 ar->regs = &qca99x0_regs; 2529 ar->hw_ce_regs = &qcax_ce_regs; 2530 ar->hw_values = &qca99x0_values; 2531 break; 2532 case ATH10K_HW_QCA9888: 2533 ar->regs = &qca99x0_regs; 2534 ar->hw_ce_regs = &qcax_ce_regs; 2535 ar->hw_values = &qca9888_values; 2536 break; 2537 case ATH10K_HW_QCA4019: 2538 ar->regs = &qca4019_regs; 2539 ar->hw_ce_regs = &qcax_ce_regs; 2540 ar->hw_values = &qca4019_values; 2541 break; 2542 case ATH10K_HW_WCN3990: 2543 ar->regs = &wcn3990_regs; 2544 ar->hw_ce_regs = &wcn3990_ce_regs; 2545 ar->hw_values = &wcn3990_values; 2546 break; 2547 default: 2548 ath10k_err(ar, "unsupported core hardware revision %d\n", 2549 hw_rev); 2550 ret = -ENOTSUPP; 2551 goto err_free_mac; 2552 } 2553 2554 init_completion(&ar->scan.started); 2555 init_completion(&ar->scan.completed); 2556 init_completion(&ar->scan.on_channel); 2557 init_completion(&ar->target_suspend); 2558 init_completion(&ar->wow.wakeup_completed); 2559 2560 init_completion(&ar->install_key_done); 2561 init_completion(&ar->vdev_setup_done); 2562 init_completion(&ar->thermal.wmi_sync); 2563 init_completion(&ar->bss_survey_done); 2564 2565 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 2566 2567 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 2568 if (!ar->workqueue) 2569 goto err_free_mac; 2570 2571 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 2572 if (!ar->workqueue_aux) 2573 goto err_free_wq; 2574 2575 mutex_init(&ar->conf_mutex); 2576 spin_lock_init(&ar->data_lock); 2577 spin_lock_init(&ar->txqs_lock); 2578 2579 INIT_LIST_HEAD(&ar->txqs); 2580 INIT_LIST_HEAD(&ar->peers); 2581 init_waitqueue_head(&ar->peer_mapping_wq); 2582 init_waitqueue_head(&ar->htt.empty_tx_wq); 2583 init_waitqueue_head(&ar->wmi.tx_credits_wq); 2584 2585 init_completion(&ar->offchan_tx_completed); 2586 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 2587 skb_queue_head_init(&ar->offchan_tx_queue); 2588 2589 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 2590 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 2591 2592 INIT_WORK(&ar->register_work, ath10k_core_register_work); 2593 INIT_WORK(&ar->restart_work, ath10k_core_restart); 2594 INIT_WORK(&ar->set_coverage_class_work, 2595 ath10k_core_set_coverage_class_work); 2596 2597 init_dummy_netdev(&ar->napi_dev); 2598 2599 ret = ath10k_debug_create(ar); 2600 if (ret) 2601 goto err_free_aux_wq; 2602 2603 return ar; 2604 2605 err_free_aux_wq: 2606 destroy_workqueue(ar->workqueue_aux); 2607 err_free_wq: 2608 destroy_workqueue(ar->workqueue); 2609 2610 err_free_mac: 2611 ath10k_mac_destroy(ar); 2612 2613 return NULL; 2614 } 2615 EXPORT_SYMBOL(ath10k_core_create); 2616 2617 void ath10k_core_destroy(struct ath10k *ar) 2618 { 2619 flush_workqueue(ar->workqueue); 2620 destroy_workqueue(ar->workqueue); 2621 2622 flush_workqueue(ar->workqueue_aux); 2623 destroy_workqueue(ar->workqueue_aux); 2624 2625 ath10k_debug_destroy(ar); 2626 ath10k_htt_tx_destroy(&ar->htt); 2627 ath10k_wmi_free_host_mem(ar); 2628 ath10k_mac_destroy(ar); 2629 } 2630 EXPORT_SYMBOL(ath10k_core_destroy); 2631 2632 MODULE_AUTHOR("Qualcomm Atheros"); 2633 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards."); 2634 MODULE_LICENSE("Dual BSD/GPL"); 2635