1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * wanXL serial card driver for Linux 4 * definitions common to host driver and card firmware 5 * 6 * Copyright (C) 2003 Krzysztof Halasa <khc@pm.waw.pl> 7 */ 8 9 #define RESET_WHILE_LOADING 0 10 11 /* you must rebuild the firmware if any of the following is changed */ 12 #define DETECT_RAM 0 /* needed for > 4MB RAM, 16 MB maximum */ 13 #define QUICC_MEMCPY_USES_PLX 1 /* must be used if the host has > 256 MB RAM */ 14 15 16 #define STATUS_CABLE_V35 2 17 #define STATUS_CABLE_X21 3 18 #define STATUS_CABLE_V24 4 19 #define STATUS_CABLE_EIA530 5 20 #define STATUS_CABLE_INVALID 6 21 #define STATUS_CABLE_NONE 7 22 23 #define STATUS_CABLE_DCE 0x8000 24 #define STATUS_CABLE_DSR 0x0010 25 #define STATUS_CABLE_DCD 0x0008 26 #define STATUS_CABLE_PM_SHIFT 5 27 28 #define PDM_OFFSET 0x1000 29 30 #define TX_BUFFERS 10 /* per port */ 31 #define RX_BUFFERS 30 32 #define RX_QUEUE_LENGTH 40 /* card->host queue length - per card */ 33 34 #define PACKET_EMPTY 0x00 35 #define PACKET_FULL 0x10 36 #define PACKET_SENT 0x20 /* TX only */ 37 #define PACKET_UNDERRUN 0x30 /* TX only */ 38 #define PACKET_PORT_MASK 0x03 /* RX only */ 39 40 /* bit numbers in PLX9060 doorbell registers */ 41 #define DOORBELL_FROM_CARD_TX_0 0 /* packet sent by the card */ 42 #define DOORBELL_FROM_CARD_TX_1 1 43 #define DOORBELL_FROM_CARD_TX_2 2 44 #define DOORBELL_FROM_CARD_TX_3 3 45 #define DOORBELL_FROM_CARD_RX 4 46 #define DOORBELL_FROM_CARD_CABLE_0 5 /* cable/PM/etc. changed */ 47 #define DOORBELL_FROM_CARD_CABLE_1 6 48 #define DOORBELL_FROM_CARD_CABLE_2 7 49 #define DOORBELL_FROM_CARD_CABLE_3 8 50 51 #define DOORBELL_TO_CARD_OPEN_0 0 52 #define DOORBELL_TO_CARD_OPEN_1 1 53 #define DOORBELL_TO_CARD_OPEN_2 2 54 #define DOORBELL_TO_CARD_OPEN_3 3 55 #define DOORBELL_TO_CARD_CLOSE_0 4 56 #define DOORBELL_TO_CARD_CLOSE_1 5 57 #define DOORBELL_TO_CARD_CLOSE_2 6 58 #define DOORBELL_TO_CARD_CLOSE_3 7 59 #define DOORBELL_TO_CARD_TX_0 8 /* outbound packet queued */ 60 #define DOORBELL_TO_CARD_TX_1 9 61 #define DOORBELL_TO_CARD_TX_2 10 62 #define DOORBELL_TO_CARD_TX_3 11 63 64 /* firmware-only status bits, starting from last DOORBELL_TO_CARD + 1 */ 65 #define TASK_SCC_0 12 66 #define TASK_SCC_1 13 67 #define TASK_SCC_2 14 68 #define TASK_SCC_3 15 69 70 #define ALIGN32(x) (((x) + 3) & 0xFFFFFFFC) 71 #define BUFFER_LENGTH ALIGN32(HDLC_MAX_MRU + 4) /* 4 bytes for 32-bit CRC */ 72 73 /* Address of TX and RX buffers in 68360 address space */ 74 #define BUFFERS_ADDR 0x4000 /* 16 KB */ 75 76 #ifndef __ASSEMBLER__ 77 #define PLX_OFFSET 0 78 #else 79 #define PLX_OFFSET PLX + 0x80 80 #endif 81 82 #define PLX_MAILBOX_0 (PLX_OFFSET + 0x40) 83 #define PLX_MAILBOX_1 (PLX_OFFSET + 0x44) 84 #define PLX_MAILBOX_2 (PLX_OFFSET + 0x48) 85 #define PLX_MAILBOX_3 (PLX_OFFSET + 0x4C) 86 #define PLX_MAILBOX_4 (PLX_OFFSET + 0x50) 87 #define PLX_MAILBOX_5 (PLX_OFFSET + 0x54) 88 #define PLX_MAILBOX_6 (PLX_OFFSET + 0x58) 89 #define PLX_MAILBOX_7 (PLX_OFFSET + 0x5C) 90 #define PLX_DOORBELL_TO_CARD (PLX_OFFSET + 0x60) 91 #define PLX_DOORBELL_FROM_CARD (PLX_OFFSET + 0x64) 92 #define PLX_INTERRUPT_CS (PLX_OFFSET + 0x68) 93 #define PLX_CONTROL (PLX_OFFSET + 0x6C) 94 95 #ifdef __ASSEMBLER__ 96 #define PLX_DMA_0_MODE (PLX + 0x100) 97 #define PLX_DMA_0_PCI (PLX + 0x104) 98 #define PLX_DMA_0_LOCAL (PLX + 0x108) 99 #define PLX_DMA_0_LENGTH (PLX + 0x10C) 100 #define PLX_DMA_0_DESC (PLX + 0x110) 101 #define PLX_DMA_1_MODE (PLX + 0x114) 102 #define PLX_DMA_1_PCI (PLX + 0x118) 103 #define PLX_DMA_1_LOCAL (PLX + 0x11C) 104 #define PLX_DMA_1_LENGTH (PLX + 0x120) 105 #define PLX_DMA_1_DESC (PLX + 0x124) 106 #define PLX_DMA_CMD_STS (PLX + 0x128) 107 #define PLX_DMA_ARBITR_0 (PLX + 0x12C) 108 #define PLX_DMA_ARBITR_1 (PLX + 0x130) 109 #endif 110 111 #define DESC_LENGTH 12 112 113 /* offsets from start of status_t */ 114 /* card to host */ 115 #define STATUS_OPEN 0 116 #define STATUS_CABLE (STATUS_OPEN + 4) 117 #define STATUS_RX_OVERRUNS (STATUS_CABLE + 4) 118 #define STATUS_RX_FRAME_ERRORS (STATUS_RX_OVERRUNS + 4) 119 120 /* host to card */ 121 #define STATUS_PARITY (STATUS_RX_FRAME_ERRORS + 4) 122 #define STATUS_ENCODING (STATUS_PARITY + 4) 123 #define STATUS_CLOCKING (STATUS_ENCODING + 4) 124 #define STATUS_TX_DESCS (STATUS_CLOCKING + 4) 125 126 #ifndef __ASSEMBLER__ 127 128 typedef struct { 129 volatile u32 stat; 130 u32 address; /* PCI address */ 131 volatile u32 length; 132 }desc_t; 133 134 135 typedef struct { 136 // Card to host 137 volatile u32 open; 138 volatile u32 cable; 139 volatile u32 rx_overruns; 140 volatile u32 rx_frame_errors; 141 142 // Host to card 143 u32 parity; 144 u32 encoding; 145 u32 clocking; 146 desc_t tx_descs[TX_BUFFERS]; 147 }port_status_t; 148 149 #endif /* __ASSEMBLER__ */ 150