1 /* 2 * drivers/net/wan/slic_ds26522.c 3 * 4 * Copyright (C) 2016 Freescale Semiconductor, Inc. 5 * 6 * Author:Zhao Qiang<qiang.zhao@nxp.com> 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License as published by the 10 * Free Software Foundation; either version 2 of the License, or (at your 11 * option) any later version. 12 */ 13 14 #include <linux/bitrev.h> 15 #include <linux/module.h> 16 #include <linux/device.h> 17 #include <linux/kernel.h> 18 #include <linux/sched.h> 19 #include <linux/kthread.h> 20 #include <linux/spi/spi.h> 21 #include <linux/wait.h> 22 #include <linux/param.h> 23 #include <linux/delay.h> 24 #include <linux/of.h> 25 #include <linux/of_address.h> 26 #include <linux/io.h> 27 #include "slic_ds26522.h" 28 29 #define DRV_NAME "ds26522" 30 31 #define SLIC_TRANS_LEN 1 32 #define SLIC_TWO_LEN 2 33 #define SLIC_THREE_LEN 3 34 35 static struct spi_device *g_spi; 36 37 MODULE_LICENSE("GPL"); 38 MODULE_AUTHOR("Zhao Qiang<B45475@freescale.com>"); 39 40 /* the read/write format of address is 41 * w/r|A13|A12|A11|A10|A9|A8|A7|A6|A5|A4|A3|A2|A1|A0|x 42 */ 43 static void slic_write(struct spi_device *spi, u16 addr, 44 u8 data) 45 { 46 u8 temp[3]; 47 48 addr = bitrev16(addr) >> 1; 49 data = bitrev8(data); 50 temp[0] = (u8)((addr >> 8) & 0x7f); 51 temp[1] = (u8)(addr & 0xfe); 52 temp[2] = data; 53 54 /* write spi addr and value */ 55 spi_write(spi, &temp[0], SLIC_THREE_LEN); 56 } 57 58 static u8 slic_read(struct spi_device *spi, u16 addr) 59 { 60 u8 temp[2]; 61 u8 data; 62 63 addr = bitrev16(addr) >> 1; 64 temp[0] = (u8)(((addr >> 8) & 0x7f) | 0x80); 65 temp[1] = (u8)(addr & 0xfe); 66 67 spi_write_then_read(spi, &temp[0], SLIC_TWO_LEN, &data, 68 SLIC_TRANS_LEN); 69 70 data = bitrev8(data); 71 return data; 72 } 73 74 static bool get_slic_product_code(struct spi_device *spi) 75 { 76 u8 device_id; 77 78 device_id = slic_read(spi, DS26522_IDR_ADDR); 79 if ((device_id & 0xf8) == 0x68) 80 return true; 81 else 82 return false; 83 } 84 85 static void ds26522_e1_spec_config(struct spi_device *spi) 86 { 87 /* Receive E1 Mode, Framer Disabled */ 88 slic_write(spi, DS26522_RMMR_ADDR, DS26522_RMMR_E1); 89 90 /* Transmit E1 Mode, Framer Disable */ 91 slic_write(spi, DS26522_TMMR_ADDR, DS26522_TMMR_E1); 92 93 /* Receive E1 Mode Framer Enable */ 94 slic_write(spi, DS26522_RMMR_ADDR, 95 slic_read(spi, DS26522_RMMR_ADDR) | DS26522_RMMR_FRM_EN); 96 97 /* Transmit E1 Mode Framer Enable */ 98 slic_write(spi, DS26522_TMMR_ADDR, 99 slic_read(spi, DS26522_TMMR_ADDR) | DS26522_TMMR_FRM_EN); 100 101 /* RCR1, receive E1 B8zs & ESF */ 102 slic_write(spi, DS26522_RCR1_ADDR, 103 DS26522_RCR1_E1_HDB3 | DS26522_RCR1_E1_CCS); 104 105 /* RSYSCLK=2.048MHz, RSYNC-Output */ 106 slic_write(spi, DS26522_RIOCR_ADDR, 107 DS26522_RIOCR_2048KHZ | DS26522_RIOCR_RSIO_OUT); 108 109 /* TCR1 Transmit E1 b8zs */ 110 slic_write(spi, DS26522_TCR1_ADDR, DS26522_TCR1_TB8ZS); 111 112 /* TSYSCLK=2.048MHz, TSYNC-Output */ 113 slic_write(spi, DS26522_TIOCR_ADDR, 114 DS26522_TIOCR_2048KHZ | DS26522_TIOCR_TSIO_OUT); 115 116 /* Set E1TAF */ 117 slic_write(spi, DS26522_E1TAF_ADDR, DS26522_E1TAF_DEFAULT); 118 119 /* Set E1TNAF register */ 120 slic_write(spi, DS26522_E1TNAF_ADDR, DS26522_E1TNAF_DEFAULT); 121 122 /* Receive E1 Mode Framer Enable & init Done */ 123 slic_write(spi, DS26522_RMMR_ADDR, slic_read(spi, DS26522_RMMR_ADDR) | 124 DS26522_RMMR_INIT_DONE); 125 126 /* Transmit E1 Mode Framer Enable & init Done */ 127 slic_write(spi, DS26522_TMMR_ADDR, slic_read(spi, DS26522_TMMR_ADDR) | 128 DS26522_TMMR_INIT_DONE); 129 130 /* Configure LIU E1 mode */ 131 slic_write(spi, DS26522_LTRCR_ADDR, DS26522_LTRCR_E1); 132 133 /* E1 Mode default 75 ohm w/Transmit Impedance Matlinking */ 134 slic_write(spi, DS26522_LTITSR_ADDR, 135 DS26522_LTITSR_TLIS_75OHM | DS26522_LTITSR_LBOS_75OHM); 136 137 /* E1 Mode default 75 ohm Long Haul w/Receive Impedance Matlinking */ 138 slic_write(spi, DS26522_LRISMR_ADDR, 139 DS26522_LRISMR_75OHM | DS26522_LRISMR_MAX); 140 141 /* Enable Transmit output */ 142 slic_write(spi, DS26522_LMCR_ADDR, DS26522_LMCR_TE); 143 } 144 145 static int slic_ds26522_init_configure(struct spi_device *spi) 146 { 147 u16 addr; 148 149 /* set clock */ 150 slic_write(spi, DS26522_GTCCR_ADDR, DS26522_GTCCR_BPREFSEL_REFCLKIN | 151 DS26522_GTCCR_BFREQSEL_2048KHZ | 152 DS26522_GTCCR_FREQSEL_2048KHZ); 153 slic_write(spi, DS26522_GTCR2_ADDR, DS26522_GTCR2_TSSYNCOUT); 154 slic_write(spi, DS26522_GFCR_ADDR, DS26522_GFCR_BPCLK_2048KHZ); 155 156 /* set gtcr */ 157 slic_write(spi, DS26522_GTCR1_ADDR, DS26522_GTCR1); 158 159 /* Global LIU Software Reset Register */ 160 slic_write(spi, DS26522_GLSRR_ADDR, DS26522_GLSRR_RESET); 161 162 /* Global Framer and BERT Software Reset Register */ 163 slic_write(spi, DS26522_GFSRR_ADDR, DS26522_GFSRR_RESET); 164 165 usleep_range(100, 120); 166 167 slic_write(spi, DS26522_GLSRR_ADDR, DS26522_GLSRR_NORMAL); 168 slic_write(spi, DS26522_GFSRR_ADDR, DS26522_GFSRR_NORMAL); 169 170 /* Perform RX/TX SRESET,Reset receiver */ 171 slic_write(spi, DS26522_RMMR_ADDR, DS26522_RMMR_SFTRST); 172 173 /* Reset tranceiver */ 174 slic_write(spi, DS26522_TMMR_ADDR, DS26522_TMMR_SFTRST); 175 176 usleep_range(100, 120); 177 178 /* Zero all Framer Registers */ 179 for (addr = DS26522_RF_ADDR_START; addr <= DS26522_RF_ADDR_END; 180 addr++) 181 slic_write(spi, addr, 0); 182 183 for (addr = DS26522_TF_ADDR_START; addr <= DS26522_TF_ADDR_END; 184 addr++) 185 slic_write(spi, addr, 0); 186 187 for (addr = DS26522_LIU_ADDR_START; addr <= DS26522_LIU_ADDR_END; 188 addr++) 189 slic_write(spi, addr, 0); 190 191 for (addr = DS26522_BERT_ADDR_START; addr <= DS26522_BERT_ADDR_END; 192 addr++) 193 slic_write(spi, addr, 0); 194 195 /* setup ds26522 for E1 specification */ 196 ds26522_e1_spec_config(spi); 197 198 slic_write(spi, DS26522_GTCR1_ADDR, 0x00); 199 200 return 0; 201 } 202 203 static int slic_ds26522_remove(struct spi_device *spi) 204 { 205 pr_info("DS26522 module uninstalled\n"); 206 return 0; 207 } 208 209 static int slic_ds26522_probe(struct spi_device *spi) 210 { 211 int ret = 0; 212 213 g_spi = spi; 214 spi->bits_per_word = 8; 215 216 if (!get_slic_product_code(spi)) 217 return ret; 218 219 ret = slic_ds26522_init_configure(spi); 220 if (ret == 0) 221 pr_info("DS26522 cs%d configured\n", spi->chip_select); 222 223 return ret; 224 } 225 226 static const struct spi_device_id slic_ds26522_id[] = { 227 { .name = "ds26522" }, 228 { /* sentinel */ }, 229 }; 230 MODULE_DEVICE_TABLE(spi, slic_ds26522_id); 231 232 static const struct of_device_id slic_ds26522_match[] = { 233 { 234 .compatible = "maxim,ds26522", 235 }, 236 {}, 237 }; 238 MODULE_DEVICE_TABLE(of, slic_ds26522_match); 239 240 static struct spi_driver slic_ds26522_driver = { 241 .driver = { 242 .name = "ds26522", 243 .bus = &spi_bus_type, 244 .of_match_table = slic_ds26522_match, 245 }, 246 .probe = slic_ds26522_probe, 247 .remove = slic_ds26522_remove, 248 .id_table = slic_ds26522_id, 249 }; 250 251 module_spi_driver(slic_ds26522_driver); 252