1 /* 2 * Goramo PCI200SYN synchronous serial card driver for Linux 3 * 4 * Copyright (C) 2002-2008 Krzysztof Halasa <khc@pm.waw.pl> 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of version 2 of the GNU General Public License 8 * as published by the Free Software Foundation. 9 * 10 * For information see <http://www.kernel.org/pub/linux/utils/net/hdlc/> 11 * 12 * Sources of information: 13 * Hitachi HD64572 SCA-II User's Manual 14 * PLX Technology Inc. PCI9052 Data Book 15 */ 16 17 #include <linux/module.h> 18 #include <linux/kernel.h> 19 #include <linux/slab.h> 20 #include <linux/types.h> 21 #include <linux/fcntl.h> 22 #include <linux/in.h> 23 #include <linux/string.h> 24 #include <linux/errno.h> 25 #include <linux/init.h> 26 #include <linux/ioport.h> 27 #include <linux/moduleparam.h> 28 #include <linux/netdevice.h> 29 #include <linux/hdlc.h> 30 #include <linux/pci.h> 31 #include <linux/delay.h> 32 #include <asm/io.h> 33 34 #include "hd64572.h" 35 36 #undef DEBUG_PKT 37 #define DEBUG_RINGS 38 39 #define PCI200SYN_PLX_SIZE 0x80 /* PLX control window size (128b) */ 40 #define PCI200SYN_SCA_SIZE 0x400 /* SCA window size (1Kb) */ 41 #define MAX_TX_BUFFERS 10 42 43 static int pci_clock_freq = 33000000; 44 #define CLOCK_BASE pci_clock_freq 45 46 /* 47 * PLX PCI9052 local configuration and shared runtime registers. 48 * This structure can be used to access 9052 registers (memory mapped). 49 */ 50 typedef struct { 51 u32 loc_addr_range[4]; /* 00-0Ch : Local Address Ranges */ 52 u32 loc_rom_range; /* 10h : Local ROM Range */ 53 u32 loc_addr_base[4]; /* 14-20h : Local Address Base Addrs */ 54 u32 loc_rom_base; /* 24h : Local ROM Base */ 55 u32 loc_bus_descr[4]; /* 28-34h : Local Bus Descriptors */ 56 u32 rom_bus_descr; /* 38h : ROM Bus Descriptor */ 57 u32 cs_base[4]; /* 3C-48h : Chip Select Base Addrs */ 58 u32 intr_ctrl_stat; /* 4Ch : Interrupt Control/Status */ 59 u32 init_ctrl; /* 50h : EEPROM ctrl, Init Ctrl, etc */ 60 }plx9052; 61 62 63 64 typedef struct port_s { 65 struct napi_struct napi; 66 struct net_device *netdev; 67 struct card_s *card; 68 spinlock_t lock; /* TX lock */ 69 sync_serial_settings settings; 70 int rxpart; /* partial frame received, next frame invalid*/ 71 unsigned short encoding; 72 unsigned short parity; 73 u16 rxin; /* rx ring buffer 'in' pointer */ 74 u16 txin; /* tx ring buffer 'in' and 'last' pointers */ 75 u16 txlast; 76 u8 rxs, txs, tmc; /* SCA registers */ 77 u8 chan; /* physical port # - 0 or 1 */ 78 }port_t; 79 80 81 82 typedef struct card_s { 83 u8 __iomem *rambase; /* buffer memory base (virtual) */ 84 u8 __iomem *scabase; /* SCA memory base (virtual) */ 85 plx9052 __iomem *plxbase;/* PLX registers memory base (virtual) */ 86 u16 rx_ring_buffers; /* number of buffers in a ring */ 87 u16 tx_ring_buffers; 88 u16 buff_offset; /* offset of first buffer of first channel */ 89 u8 irq; /* interrupt request level */ 90 91 port_t ports[2]; 92 }card_t; 93 94 95 #define get_port(card, port) (&card->ports[port]) 96 #define sca_flush(card) (sca_in(IER0, card)); 97 98 static inline void new_memcpy_toio(char __iomem *dest, char *src, int length) 99 { 100 int len; 101 do { 102 len = length > 256 ? 256 : length; 103 memcpy_toio(dest, src, len); 104 dest += len; 105 src += len; 106 length -= len; 107 readb(dest); 108 } while (len); 109 } 110 111 #undef memcpy_toio 112 #define memcpy_toio new_memcpy_toio 113 114 #include "hd64572.c" 115 116 117 static void pci200_set_iface(port_t *port) 118 { 119 card_t *card = port->card; 120 u16 msci = get_msci(port); 121 u8 rxs = port->rxs & CLK_BRG_MASK; 122 u8 txs = port->txs & CLK_BRG_MASK; 123 124 sca_out(EXS_TES1, (port->chan ? MSCI1_OFFSET : MSCI0_OFFSET) + EXS, 125 port->card); 126 switch(port->settings.clock_type) { 127 case CLOCK_INT: 128 rxs |= CLK_BRG; /* BRG output */ 129 txs |= CLK_PIN_OUT | CLK_TX_RXCLK; /* RX clock */ 130 break; 131 132 case CLOCK_TXINT: 133 rxs |= CLK_LINE; /* RXC input */ 134 txs |= CLK_PIN_OUT | CLK_BRG; /* BRG output */ 135 break; 136 137 case CLOCK_TXFROMRX: 138 rxs |= CLK_LINE; /* RXC input */ 139 txs |= CLK_PIN_OUT | CLK_TX_RXCLK; /* RX clock */ 140 break; 141 142 default: /* EXTernal clock */ 143 rxs |= CLK_LINE; /* RXC input */ 144 txs |= CLK_PIN_OUT | CLK_LINE; /* TXC input */ 145 break; 146 } 147 148 port->rxs = rxs; 149 port->txs = txs; 150 sca_out(rxs, msci + RXS, card); 151 sca_out(txs, msci + TXS, card); 152 sca_set_port(port); 153 } 154 155 156 157 static int pci200_open(struct net_device *dev) 158 { 159 port_t *port = dev_to_port(dev); 160 161 int result = hdlc_open(dev); 162 if (result) 163 return result; 164 165 sca_open(dev); 166 pci200_set_iface(port); 167 sca_flush(port->card); 168 return 0; 169 } 170 171 172 173 static int pci200_close(struct net_device *dev) 174 { 175 sca_close(dev); 176 sca_flush(dev_to_port(dev)->card); 177 hdlc_close(dev); 178 return 0; 179 } 180 181 182 183 static int pci200_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 184 { 185 const size_t size = sizeof(sync_serial_settings); 186 sync_serial_settings new_line; 187 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync; 188 port_t *port = dev_to_port(dev); 189 190 #ifdef DEBUG_RINGS 191 if (cmd == SIOCDEVPRIVATE) { 192 sca_dump_rings(dev); 193 return 0; 194 } 195 #endif 196 if (cmd != SIOCWANDEV) 197 return hdlc_ioctl(dev, ifr, cmd); 198 199 switch(ifr->ifr_settings.type) { 200 case IF_GET_IFACE: 201 ifr->ifr_settings.type = IF_IFACE_V35; 202 if (ifr->ifr_settings.size < size) { 203 ifr->ifr_settings.size = size; /* data size wanted */ 204 return -ENOBUFS; 205 } 206 if (copy_to_user(line, &port->settings, size)) 207 return -EFAULT; 208 return 0; 209 210 case IF_IFACE_V35: 211 case IF_IFACE_SYNC_SERIAL: 212 if (!capable(CAP_NET_ADMIN)) 213 return -EPERM; 214 215 if (copy_from_user(&new_line, line, size)) 216 return -EFAULT; 217 218 if (new_line.clock_type != CLOCK_EXT && 219 new_line.clock_type != CLOCK_TXFROMRX && 220 new_line.clock_type != CLOCK_INT && 221 new_line.clock_type != CLOCK_TXINT) 222 return -EINVAL; /* No such clock setting */ 223 224 if (new_line.loopback != 0 && new_line.loopback != 1) 225 return -EINVAL; 226 227 memcpy(&port->settings, &new_line, size); /* Update settings */ 228 pci200_set_iface(port); 229 sca_flush(port->card); 230 return 0; 231 232 default: 233 return hdlc_ioctl(dev, ifr, cmd); 234 } 235 } 236 237 238 239 static void pci200_pci_remove_one(struct pci_dev *pdev) 240 { 241 int i; 242 card_t *card = pci_get_drvdata(pdev); 243 244 for (i = 0; i < 2; i++) 245 if (card->ports[i].card) 246 unregister_hdlc_device(card->ports[i].netdev); 247 248 if (card->irq) 249 free_irq(card->irq, card); 250 251 if (card->rambase) 252 iounmap(card->rambase); 253 if (card->scabase) 254 iounmap(card->scabase); 255 if (card->plxbase) 256 iounmap(card->plxbase); 257 258 pci_release_regions(pdev); 259 pci_disable_device(pdev); 260 pci_set_drvdata(pdev, NULL); 261 if (card->ports[0].netdev) 262 free_netdev(card->ports[0].netdev); 263 if (card->ports[1].netdev) 264 free_netdev(card->ports[1].netdev); 265 kfree(card); 266 } 267 268 static const struct net_device_ops pci200_ops = { 269 .ndo_open = pci200_open, 270 .ndo_stop = pci200_close, 271 .ndo_change_mtu = hdlc_change_mtu, 272 .ndo_start_xmit = hdlc_start_xmit, 273 .ndo_do_ioctl = pci200_ioctl, 274 }; 275 276 static int __devinit pci200_pci_init_one(struct pci_dev *pdev, 277 const struct pci_device_id *ent) 278 { 279 card_t *card; 280 u32 __iomem *p; 281 int i; 282 u32 ramsize; 283 u32 ramphys; /* buffer memory base */ 284 u32 scaphys; /* SCA memory base */ 285 u32 plxphys; /* PLX registers memory base */ 286 287 i = pci_enable_device(pdev); 288 if (i) 289 return i; 290 291 i = pci_request_regions(pdev, "PCI200SYN"); 292 if (i) { 293 pci_disable_device(pdev); 294 return i; 295 } 296 297 card = kzalloc(sizeof(card_t), GFP_KERNEL); 298 if (card == NULL) { 299 printk(KERN_ERR "pci200syn: unable to allocate memory\n"); 300 pci_release_regions(pdev); 301 pci_disable_device(pdev); 302 return -ENOBUFS; 303 } 304 pci_set_drvdata(pdev, card); 305 card->ports[0].netdev = alloc_hdlcdev(&card->ports[0]); 306 card->ports[1].netdev = alloc_hdlcdev(&card->ports[1]); 307 if (!card->ports[0].netdev || !card->ports[1].netdev) { 308 printk(KERN_ERR "pci200syn: unable to allocate memory\n"); 309 pci200_pci_remove_one(pdev); 310 return -ENOMEM; 311 } 312 313 if (pci_resource_len(pdev, 0) != PCI200SYN_PLX_SIZE || 314 pci_resource_len(pdev, 2) != PCI200SYN_SCA_SIZE || 315 pci_resource_len(pdev, 3) < 16384) { 316 printk(KERN_ERR "pci200syn: invalid card EEPROM parameters\n"); 317 pci200_pci_remove_one(pdev); 318 return -EFAULT; 319 } 320 321 plxphys = pci_resource_start(pdev,0) & PCI_BASE_ADDRESS_MEM_MASK; 322 card->plxbase = ioremap(plxphys, PCI200SYN_PLX_SIZE); 323 324 scaphys = pci_resource_start(pdev,2) & PCI_BASE_ADDRESS_MEM_MASK; 325 card->scabase = ioremap(scaphys, PCI200SYN_SCA_SIZE); 326 327 ramphys = pci_resource_start(pdev,3) & PCI_BASE_ADDRESS_MEM_MASK; 328 card->rambase = pci_ioremap_bar(pdev, 3); 329 330 if (card->plxbase == NULL || 331 card->scabase == NULL || 332 card->rambase == NULL) { 333 printk(KERN_ERR "pci200syn: ioremap() failed\n"); 334 pci200_pci_remove_one(pdev); 335 return -EFAULT; 336 } 337 338 /* Reset PLX */ 339 p = &card->plxbase->init_ctrl; 340 writel(readl(p) | 0x40000000, p); 341 readl(p); /* Flush the write - do not use sca_flush */ 342 udelay(1); 343 344 writel(readl(p) & ~0x40000000, p); 345 readl(p); /* Flush the write - do not use sca_flush */ 346 udelay(1); 347 348 ramsize = sca_detect_ram(card, card->rambase, 349 pci_resource_len(pdev, 3)); 350 351 /* number of TX + RX buffers for one port - this is dual port card */ 352 i = ramsize / (2 * (sizeof(pkt_desc) + HDLC_MAX_MRU)); 353 card->tx_ring_buffers = min(i / 2, MAX_TX_BUFFERS); 354 card->rx_ring_buffers = i - card->tx_ring_buffers; 355 356 card->buff_offset = 2 * sizeof(pkt_desc) * (card->tx_ring_buffers + 357 card->rx_ring_buffers); 358 359 printk(KERN_INFO "pci200syn: %u KB RAM at 0x%x, IRQ%u, using %u TX +" 360 " %u RX packets rings\n", ramsize / 1024, ramphys, 361 pdev->irq, card->tx_ring_buffers, card->rx_ring_buffers); 362 363 if (pdev->subsystem_device == PCI_DEVICE_ID_PLX_9050) { 364 printk(KERN_ERR "Detected PCI200SYN card with old " 365 "configuration data.\n"); 366 printk(KERN_ERR "See <http://www.kernel.org/pub/" 367 "linux/utils/net/hdlc/pci200syn/> for update.\n"); 368 printk(KERN_ERR "The card will stop working with" 369 " future versions of Linux if not updated.\n"); 370 } 371 372 if (card->tx_ring_buffers < 1) { 373 printk(KERN_ERR "pci200syn: RAM test failed\n"); 374 pci200_pci_remove_one(pdev); 375 return -EFAULT; 376 } 377 378 /* Enable interrupts on the PCI bridge */ 379 p = &card->plxbase->intr_ctrl_stat; 380 writew(readw(p) | 0x0040, p); 381 382 /* Allocate IRQ */ 383 if (request_irq(pdev->irq, sca_intr, IRQF_SHARED, "pci200syn", card)) { 384 printk(KERN_WARNING "pci200syn: could not allocate IRQ%d.\n", 385 pdev->irq); 386 pci200_pci_remove_one(pdev); 387 return -EBUSY; 388 } 389 card->irq = pdev->irq; 390 391 sca_init(card, 0); 392 393 for (i = 0; i < 2; i++) { 394 port_t *port = &card->ports[i]; 395 struct net_device *dev = port->netdev; 396 hdlc_device *hdlc = dev_to_hdlc(dev); 397 port->chan = i; 398 399 spin_lock_init(&port->lock); 400 dev->irq = card->irq; 401 dev->mem_start = ramphys; 402 dev->mem_end = ramphys + ramsize - 1; 403 dev->tx_queue_len = 50; 404 dev->netdev_ops = &pci200_ops; 405 hdlc->attach = sca_attach; 406 hdlc->xmit = sca_xmit; 407 port->settings.clock_type = CLOCK_EXT; 408 port->card = card; 409 sca_init_port(port); 410 if (register_hdlc_device(dev)) { 411 printk(KERN_ERR "pci200syn: unable to register hdlc " 412 "device\n"); 413 port->card = NULL; 414 pci200_pci_remove_one(pdev); 415 return -ENOBUFS; 416 } 417 418 printk(KERN_INFO "%s: PCI200SYN channel %d\n", 419 dev->name, port->chan); 420 } 421 422 sca_flush(card); 423 return 0; 424 } 425 426 427 428 static struct pci_device_id pci200_pci_tbl[] __devinitdata = { 429 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_PLX, 430 PCI_DEVICE_ID_PLX_9050, 0, 0, 0 }, 431 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_PLX, 432 PCI_DEVICE_ID_PLX_PCI200SYN, 0, 0, 0 }, 433 { 0, } 434 }; 435 436 437 static struct pci_driver pci200_pci_driver = { 438 .name = "PCI200SYN", 439 .id_table = pci200_pci_tbl, 440 .probe = pci200_pci_init_one, 441 .remove = pci200_pci_remove_one, 442 }; 443 444 445 static int __init pci200_init_module(void) 446 { 447 if (pci_clock_freq < 1000000 || pci_clock_freq > 80000000) { 448 printk(KERN_ERR "pci200syn: Invalid PCI clock frequency\n"); 449 return -EINVAL; 450 } 451 return pci_register_driver(&pci200_pci_driver); 452 } 453 454 455 456 static void __exit pci200_cleanup_module(void) 457 { 458 pci_unregister_driver(&pci200_pci_driver); 459 } 460 461 MODULE_AUTHOR("Krzysztof Halasa <khc@pm.waw.pl>"); 462 MODULE_DESCRIPTION("Goramo PCI200SYN serial port driver"); 463 MODULE_LICENSE("GPL v2"); 464 MODULE_DEVICE_TABLE(pci, pci200_pci_tbl); 465 module_param(pci_clock_freq, int, 0444); 466 MODULE_PARM_DESC(pci_clock_freq, "System PCI clock frequency in Hz"); 467 module_init(pci200_init_module); 468 module_exit(pci200_cleanup_module); 469