1 /*
2  * Linux driver for VMware's vmxnet3 ethernet NIC.
3  *
4  * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms of the GNU General Public License as published by the
8  * Free Software Foundation; version 2 of the License and no later version.
9  *
10  * This program is distributed in the hope that it will be useful, but
11  * WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13  * NON INFRINGEMENT.  See the GNU General Public License for more
14  * details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19  *
20  * The full GNU General Public License is included in this distribution in
21  * the file called "COPYING".
22  *
23  * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com>
24  *
25  */
26 
27 #ifndef _VMXNET3_INT_H
28 #define _VMXNET3_INT_H
29 
30 #include <linux/bitops.h>
31 #include <linux/ethtool.h>
32 #include <linux/delay.h>
33 #include <linux/netdevice.h>
34 #include <linux/pci.h>
35 #include <linux/compiler.h>
36 #include <linux/slab.h>
37 #include <linux/spinlock.h>
38 #include <linux/ioport.h>
39 #include <linux/highmem.h>
40 #include <linux/timer.h>
41 #include <linux/skbuff.h>
42 #include <linux/interrupt.h>
43 #include <linux/workqueue.h>
44 #include <linux/uaccess.h>
45 #include <asm/dma.h>
46 #include <asm/page.h>
47 
48 #include <linux/tcp.h>
49 #include <linux/udp.h>
50 #include <linux/ip.h>
51 #include <linux/ipv6.h>
52 #include <linux/in.h>
53 #include <linux/etherdevice.h>
54 #include <asm/checksum.h>
55 #include <linux/if_vlan.h>
56 #include <linux/if_arp.h>
57 #include <linux/inetdevice.h>
58 #include <linux/log2.h>
59 
60 #include "vmxnet3_defs.h"
61 
62 #ifdef DEBUG
63 # define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI(debug)"
64 #else
65 # define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI"
66 #endif
67 
68 
69 /*
70  * Version numbers
71  */
72 #define VMXNET3_DRIVER_VERSION_STRING   "1.4.3.0-k"
73 
74 /* a 32-bit int, each byte encode a verion number in VMXNET3_DRIVER_VERSION */
75 #define VMXNET3_DRIVER_VERSION_NUM      0x01040300
76 
77 #if defined(CONFIG_PCI_MSI)
78 	/* RSS only makes sense if MSI-X is supported. */
79 	#define VMXNET3_RSS
80 #endif
81 
82 /*
83  * Capabilities
84  */
85 
86 enum {
87 	VMNET_CAP_SG	        = 0x0001, /* Can do scatter-gather transmits. */
88 	VMNET_CAP_IP4_CSUM      = 0x0002, /* Can checksum only TCP/UDP over
89 					   * IPv4 */
90 	VMNET_CAP_HW_CSUM       = 0x0004, /* Can checksum all packets. */
91 	VMNET_CAP_HIGH_DMA      = 0x0008, /* Can DMA to high memory. */
92 	VMNET_CAP_TOE	        = 0x0010, /* Supports TCP/IP offload. */
93 	VMNET_CAP_TSO	        = 0x0020, /* Supports TCP Segmentation
94 					   * offload */
95 	VMNET_CAP_SW_TSO        = 0x0040, /* Supports SW TCP Segmentation */
96 	VMNET_CAP_VMXNET_APROM  = 0x0080, /* Vmxnet APROM support */
97 	VMNET_CAP_HW_TX_VLAN    = 0x0100, /* Can we do VLAN tagging in HW */
98 	VMNET_CAP_HW_RX_VLAN    = 0x0200, /* Can we do VLAN untagging in HW */
99 	VMNET_CAP_SW_VLAN       = 0x0400, /* VLAN tagging/untagging in SW */
100 	VMNET_CAP_WAKE_PCKT_RCV = 0x0800, /* Can wake on network packet recv? */
101 	VMNET_CAP_ENABLE_INT_INLINE = 0x1000,  /* Enable Interrupt Inline */
102 	VMNET_CAP_ENABLE_HEADER_COPY = 0x2000,  /* copy header for vmkernel */
103 	VMNET_CAP_TX_CHAIN      = 0x4000, /* Guest can use multiple tx entries
104 					  * for a pkt */
105 	VMNET_CAP_RX_CHAIN      = 0x8000, /* pkt can span multiple rx entries */
106 	VMNET_CAP_LPD           = 0x10000, /* large pkt delivery */
107 	VMNET_CAP_BPF           = 0x20000, /* BPF Support in VMXNET Virtual HW*/
108 	VMNET_CAP_SG_SPAN_PAGES = 0x40000, /* Scatter-gather can span multiple*/
109 					   /* pages transmits */
110 	VMNET_CAP_IP6_CSUM      = 0x80000, /* Can do IPv6 csum offload. */
111 	VMNET_CAP_TSO6         = 0x100000, /* TSO seg. offload for IPv6 pkts. */
112 	VMNET_CAP_TSO256k      = 0x200000, /* Can do TSO seg offload for */
113 					   /* pkts up to 256kB. */
114 	VMNET_CAP_UPT          = 0x400000  /* Support UPT */
115 };
116 
117 /*
118  * PCI vendor and device IDs.
119  */
120 #define PCI_DEVICE_ID_VMWARE_VMXNET3    0x07B0
121 #define MAX_ETHERNET_CARDS		10
122 #define MAX_PCI_PASSTHRU_DEVICE		6
123 
124 struct vmxnet3_cmd_ring {
125 	union Vmxnet3_GenericDesc *base;
126 	u32		size;
127 	u32		next2fill;
128 	u32		next2comp;
129 	u8		gen;
130 	dma_addr_t	basePA;
131 };
132 
133 static inline void
134 vmxnet3_cmd_ring_adv_next2fill(struct vmxnet3_cmd_ring *ring)
135 {
136 	ring->next2fill++;
137 	if (unlikely(ring->next2fill == ring->size)) {
138 		ring->next2fill = 0;
139 		VMXNET3_FLIP_RING_GEN(ring->gen);
140 	}
141 }
142 
143 static inline void
144 vmxnet3_cmd_ring_adv_next2comp(struct vmxnet3_cmd_ring *ring)
145 {
146 	VMXNET3_INC_RING_IDX_ONLY(ring->next2comp, ring->size);
147 }
148 
149 static inline int
150 vmxnet3_cmd_ring_desc_avail(struct vmxnet3_cmd_ring *ring)
151 {
152 	return (ring->next2comp > ring->next2fill ? 0 : ring->size) +
153 		ring->next2comp - ring->next2fill - 1;
154 }
155 
156 struct vmxnet3_comp_ring {
157 	union Vmxnet3_GenericDesc *base;
158 	u32               size;
159 	u32               next2proc;
160 	u8                gen;
161 	u8                intr_idx;
162 	dma_addr_t           basePA;
163 };
164 
165 static inline void
166 vmxnet3_comp_ring_adv_next2proc(struct vmxnet3_comp_ring *ring)
167 {
168 	ring->next2proc++;
169 	if (unlikely(ring->next2proc == ring->size)) {
170 		ring->next2proc = 0;
171 		VMXNET3_FLIP_RING_GEN(ring->gen);
172 	}
173 }
174 
175 struct vmxnet3_tx_data_ring {
176 	struct Vmxnet3_TxDataDesc *base;
177 	u32              size;
178 	dma_addr_t          basePA;
179 };
180 
181 enum vmxnet3_buf_map_type {
182 	VMXNET3_MAP_INVALID = 0,
183 	VMXNET3_MAP_NONE,
184 	VMXNET3_MAP_SINGLE,
185 	VMXNET3_MAP_PAGE,
186 };
187 
188 struct vmxnet3_tx_buf_info {
189 	u32      map_type;
190 	u16      len;
191 	u16      sop_idx;
192 	dma_addr_t  dma_addr;
193 	struct sk_buff *skb;
194 };
195 
196 struct vmxnet3_tq_driver_stats {
197 	u64 drop_total;     /* # of pkts dropped by the driver, the
198 				* counters below track droppings due to
199 				* different reasons
200 				*/
201 	u64 drop_too_many_frags;
202 	u64 drop_oversized_hdr;
203 	u64 drop_hdr_inspect_err;
204 	u64 drop_tso;
205 
206 	u64 tx_ring_full;
207 	u64 linearized;         /* # of pkts linearized */
208 	u64 copy_skb_header;    /* # of times we have to copy skb header */
209 	u64 oversized_hdr;
210 };
211 
212 struct vmxnet3_tx_ctx {
213 	bool   ipv4;
214 	bool   ipv6;
215 	u16 mss;
216 	u32 eth_ip_hdr_size; /* only valid for pkts requesting tso or csum
217 				 * offloading
218 				 */
219 	u32 l4_hdr_size;     /* only valid if mss != 0 */
220 	u32 copy_size;       /* # of bytes copied into the data ring */
221 	union Vmxnet3_GenericDesc *sop_txd;
222 	union Vmxnet3_GenericDesc *eop_txd;
223 };
224 
225 struct vmxnet3_tx_queue {
226 	char			name[IFNAMSIZ+8]; /* To identify interrupt */
227 	struct vmxnet3_adapter		*adapter;
228 	spinlock_t                      tx_lock;
229 	struct vmxnet3_cmd_ring         tx_ring;
230 	struct vmxnet3_tx_buf_info      *buf_info;
231 	dma_addr_t                       buf_info_pa;
232 	struct vmxnet3_tx_data_ring     data_ring;
233 	struct vmxnet3_comp_ring        comp_ring;
234 	struct Vmxnet3_TxQueueCtrl      *shared;
235 	struct vmxnet3_tq_driver_stats  stats;
236 	bool                            stopped;
237 	int                             num_stop;  /* # of times the queue is
238 						    * stopped */
239 	int				qid;
240 } __attribute__((__aligned__(SMP_CACHE_BYTES)));
241 
242 enum vmxnet3_rx_buf_type {
243 	VMXNET3_RX_BUF_NONE = 0,
244 	VMXNET3_RX_BUF_SKB = 1,
245 	VMXNET3_RX_BUF_PAGE = 2
246 };
247 
248 struct vmxnet3_rx_buf_info {
249 	enum vmxnet3_rx_buf_type buf_type;
250 	u16     len;
251 	union {
252 		struct sk_buff *skb;
253 		struct page    *page;
254 	};
255 	dma_addr_t dma_addr;
256 };
257 
258 struct vmxnet3_rx_ctx {
259 	struct sk_buff *skb;
260 	u32 sop_idx;
261 };
262 
263 struct vmxnet3_rq_driver_stats {
264 	u64 drop_total;
265 	u64 drop_err;
266 	u64 drop_fcs;
267 	u64 rx_buf_alloc_failure;
268 };
269 
270 struct vmxnet3_rx_queue {
271 	char			name[IFNAMSIZ + 8]; /* To identify interrupt */
272 	struct vmxnet3_adapter	  *adapter;
273 	struct napi_struct        napi;
274 	struct vmxnet3_cmd_ring   rx_ring[2];
275 	struct vmxnet3_comp_ring  comp_ring;
276 	struct vmxnet3_rx_ctx     rx_ctx;
277 	u32 qid;            /* rqID in RCD for buffer from 1st ring */
278 	u32 qid2;           /* rqID in RCD for buffer from 2nd ring */
279 	struct vmxnet3_rx_buf_info     *buf_info[2];
280 	dma_addr_t                      buf_info_pa;
281 	struct Vmxnet3_RxQueueCtrl            *shared;
282 	struct vmxnet3_rq_driver_stats  stats;
283 } __attribute__((__aligned__(SMP_CACHE_BYTES)));
284 
285 #define VMXNET3_DEVICE_MAX_TX_QUEUES 8
286 #define VMXNET3_DEVICE_MAX_RX_QUEUES 8   /* Keep this value as a power of 2 */
287 
288 /* Should be less than UPT1_RSS_MAX_IND_TABLE_SIZE */
289 #define VMXNET3_RSS_IND_TABLE_SIZE (VMXNET3_DEVICE_MAX_RX_QUEUES * 4)
290 
291 #define VMXNET3_LINUX_MAX_MSIX_VECT     (VMXNET3_DEVICE_MAX_TX_QUEUES + \
292 					 VMXNET3_DEVICE_MAX_RX_QUEUES + 1)
293 #define VMXNET3_LINUX_MIN_MSIX_VECT     2 /* 1 for tx-rx pair and 1 for event */
294 
295 
296 struct vmxnet3_intr {
297 	enum vmxnet3_intr_mask_mode  mask_mode;
298 	enum vmxnet3_intr_type       type;	/* MSI-X, MSI, or INTx? */
299 	u8  num_intrs;			/* # of intr vectors */
300 	u8  event_intr_idx;		/* idx of the intr vector for event */
301 	u8  mod_levels[VMXNET3_LINUX_MAX_MSIX_VECT]; /* moderation level */
302 	char	event_msi_vector_name[IFNAMSIZ+11];
303 #ifdef CONFIG_PCI_MSI
304 	struct msix_entry msix_entries[VMXNET3_LINUX_MAX_MSIX_VECT];
305 #endif
306 };
307 
308 /* Interrupt sharing schemes, share_intr */
309 #define VMXNET3_INTR_BUDDYSHARE 0    /* Corresponding tx,rx queues share irq */
310 #define VMXNET3_INTR_TXSHARE 1	     /* All tx queues share one irq */
311 #define VMXNET3_INTR_DONTSHARE 2     /* each queue has its own irq */
312 
313 
314 #define VMXNET3_STATE_BIT_RESETTING   0
315 #define VMXNET3_STATE_BIT_QUIESCED    1
316 struct vmxnet3_adapter {
317 	struct vmxnet3_tx_queue		tx_queue[VMXNET3_DEVICE_MAX_TX_QUEUES];
318 	struct vmxnet3_rx_queue		rx_queue[VMXNET3_DEVICE_MAX_RX_QUEUES];
319 	unsigned long			active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
320 	struct vmxnet3_intr		intr;
321 	spinlock_t			cmd_lock;
322 	struct Vmxnet3_DriverShared	*shared;
323 	struct Vmxnet3_PMConf		*pm_conf;
324 	struct Vmxnet3_TxQueueDesc	*tqd_start;     /* all tx queue desc */
325 	struct Vmxnet3_RxQueueDesc	*rqd_start;	/* all rx queue desc */
326 	struct net_device		*netdev;
327 	struct pci_dev			*pdev;
328 
329 	u8			__iomem *hw_addr0; /* for BAR 0 */
330 	u8			__iomem *hw_addr1; /* for BAR 1 */
331 	u8                              version;
332 
333 	bool				rxcsum;
334 	bool				lro;
335 
336 #ifdef VMXNET3_RSS
337 	struct UPT1_RSSConf		*rss_conf;
338 	bool				rss;
339 #endif
340 	u32				num_rx_queues;
341 	u32				num_tx_queues;
342 
343 	/* rx buffer related */
344 	unsigned			skb_buf_size;
345 	int		rx_buf_per_pkt;  /* only apply to the 1st ring */
346 	dma_addr_t			shared_pa;
347 	dma_addr_t queue_desc_pa;
348 
349 	/* Wake-on-LAN */
350 	u32     wol;
351 
352 	/* Link speed */
353 	u32     link_speed; /* in mbps */
354 
355 	u64     tx_timeout_count;
356 
357 	/* Ring sizes */
358 	u32 tx_ring_size;
359 	u32 rx_ring_size;
360 	u32 rx_ring2_size;
361 
362 	struct work_struct work;
363 
364 	unsigned long  state;    /* VMXNET3_STATE_BIT_xxx */
365 
366 	int share_intr;
367 
368 	dma_addr_t adapter_pa;
369 	dma_addr_t pm_conf_pa;
370 	dma_addr_t rss_conf_pa;
371 };
372 
373 #define VMXNET3_WRITE_BAR0_REG(adapter, reg, val)  \
374 	writel((val), (adapter)->hw_addr0 + (reg))
375 #define VMXNET3_READ_BAR0_REG(adapter, reg)        \
376 	readl((adapter)->hw_addr0 + (reg))
377 
378 #define VMXNET3_WRITE_BAR1_REG(adapter, reg, val)  \
379 	writel((val), (adapter)->hw_addr1 + (reg))
380 #define VMXNET3_READ_BAR1_REG(adapter, reg)        \
381 	readl((adapter)->hw_addr1 + (reg))
382 
383 #define VMXNET3_WAKE_QUEUE_THRESHOLD(tq)  (5)
384 #define VMXNET3_RX_ALLOC_THRESHOLD(rq, ring_idx, adapter) \
385 	((rq)->rx_ring[ring_idx].size >> 3)
386 
387 #define VMXNET3_GET_ADDR_LO(dma)   ((u32)(dma))
388 #define VMXNET3_GET_ADDR_HI(dma)   ((u32)(((u64)(dma)) >> 32))
389 
390 /* must be a multiple of VMXNET3_RING_SIZE_ALIGN */
391 #define VMXNET3_DEF_TX_RING_SIZE    512
392 #define VMXNET3_DEF_RX_RING_SIZE    256
393 #define VMXNET3_DEF_RX_RING2_SIZE   128
394 
395 #define VMXNET3_MAX_ETH_HDR_SIZE    22
396 #define VMXNET3_MAX_SKB_BUF_SIZE    (3*1024)
397 
398 int
399 vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter);
400 
401 int
402 vmxnet3_activate_dev(struct vmxnet3_adapter *adapter);
403 
404 void
405 vmxnet3_force_close(struct vmxnet3_adapter *adapter);
406 
407 void
408 vmxnet3_reset_dev(struct vmxnet3_adapter *adapter);
409 
410 void
411 vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter);
412 
413 void
414 vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter);
415 
416 int
417 vmxnet3_set_features(struct net_device *netdev, netdev_features_t features);
418 
419 int
420 vmxnet3_create_queues(struct vmxnet3_adapter *adapter,
421 		      u32 tx_ring_size, u32 rx_ring_size, u32 rx_ring2_size);
422 
423 void vmxnet3_set_ethtool_ops(struct net_device *netdev);
424 
425 struct rtnl_link_stats64 *
426 vmxnet3_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats);
427 
428 extern char vmxnet3_driver_name[];
429 #endif
430