1 /* 2 * Linux driver for VMware's vmxnet3 ethernet NIC. 3 * 4 * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; version 2 of the License and no later version. 9 * 10 * This program is distributed in the hope that it will be useful, but 11 * WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 13 * NON INFRINGEMENT. See the GNU General Public License for more 14 * details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 * The full GNU General Public License is included in this distribution in 21 * the file called "COPYING". 22 * 23 * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com> 24 * 25 */ 26 27 #include <net/ip6_checksum.h> 28 29 #include "vmxnet3_int.h" 30 31 char vmxnet3_driver_name[] = "vmxnet3"; 32 #define VMXNET3_DRIVER_DESC "VMware vmxnet3 virtual NIC driver" 33 34 /* 35 * PCI Device ID Table 36 * Last entry must be all 0s 37 */ 38 static DEFINE_PCI_DEVICE_TABLE(vmxnet3_pciid_table) = { 39 {PCI_VDEVICE(VMWARE, PCI_DEVICE_ID_VMWARE_VMXNET3)}, 40 {0} 41 }; 42 43 MODULE_DEVICE_TABLE(pci, vmxnet3_pciid_table); 44 45 static atomic_t devices_found; 46 47 #define VMXNET3_MAX_DEVICES 10 48 static int enable_mq = 1; 49 static int irq_share_mode; 50 51 static void 52 vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac); 53 54 /* 55 * Enable/Disable the given intr 56 */ 57 static void 58 vmxnet3_enable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx) 59 { 60 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 0); 61 } 62 63 64 static void 65 vmxnet3_disable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx) 66 { 67 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 1); 68 } 69 70 71 /* 72 * Enable/Disable all intrs used by the device 73 */ 74 static void 75 vmxnet3_enable_all_intrs(struct vmxnet3_adapter *adapter) 76 { 77 int i; 78 79 for (i = 0; i < adapter->intr.num_intrs; i++) 80 vmxnet3_enable_intr(adapter, i); 81 adapter->shared->devRead.intrConf.intrCtrl &= 82 cpu_to_le32(~VMXNET3_IC_DISABLE_ALL); 83 } 84 85 86 static void 87 vmxnet3_disable_all_intrs(struct vmxnet3_adapter *adapter) 88 { 89 int i; 90 91 adapter->shared->devRead.intrConf.intrCtrl |= 92 cpu_to_le32(VMXNET3_IC_DISABLE_ALL); 93 for (i = 0; i < adapter->intr.num_intrs; i++) 94 vmxnet3_disable_intr(adapter, i); 95 } 96 97 98 static void 99 vmxnet3_ack_events(struct vmxnet3_adapter *adapter, u32 events) 100 { 101 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_ECR, events); 102 } 103 104 105 static bool 106 vmxnet3_tq_stopped(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 107 { 108 return tq->stopped; 109 } 110 111 112 static void 113 vmxnet3_tq_start(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 114 { 115 tq->stopped = false; 116 netif_start_subqueue(adapter->netdev, tq - adapter->tx_queue); 117 } 118 119 120 static void 121 vmxnet3_tq_wake(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 122 { 123 tq->stopped = false; 124 netif_wake_subqueue(adapter->netdev, (tq - adapter->tx_queue)); 125 } 126 127 128 static void 129 vmxnet3_tq_stop(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 130 { 131 tq->stopped = true; 132 tq->num_stop++; 133 netif_stop_subqueue(adapter->netdev, (tq - adapter->tx_queue)); 134 } 135 136 137 /* 138 * Check the link state. This may start or stop the tx queue. 139 */ 140 static void 141 vmxnet3_check_link(struct vmxnet3_adapter *adapter, bool affectTxQueue) 142 { 143 u32 ret; 144 int i; 145 unsigned long flags; 146 147 spin_lock_irqsave(&adapter->cmd_lock, flags); 148 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK); 149 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 150 spin_unlock_irqrestore(&adapter->cmd_lock, flags); 151 152 adapter->link_speed = ret >> 16; 153 if (ret & 1) { /* Link is up. */ 154 printk(KERN_INFO "%s: NIC Link is Up %d Mbps\n", 155 adapter->netdev->name, adapter->link_speed); 156 if (!netif_carrier_ok(adapter->netdev)) 157 netif_carrier_on(adapter->netdev); 158 159 if (affectTxQueue) { 160 for (i = 0; i < adapter->num_tx_queues; i++) 161 vmxnet3_tq_start(&adapter->tx_queue[i], 162 adapter); 163 } 164 } else { 165 printk(KERN_INFO "%s: NIC Link is Down\n", 166 adapter->netdev->name); 167 if (netif_carrier_ok(adapter->netdev)) 168 netif_carrier_off(adapter->netdev); 169 170 if (affectTxQueue) { 171 for (i = 0; i < adapter->num_tx_queues; i++) 172 vmxnet3_tq_stop(&adapter->tx_queue[i], adapter); 173 } 174 } 175 } 176 177 static void 178 vmxnet3_process_events(struct vmxnet3_adapter *adapter) 179 { 180 int i; 181 unsigned long flags; 182 u32 events = le32_to_cpu(adapter->shared->ecr); 183 if (!events) 184 return; 185 186 vmxnet3_ack_events(adapter, events); 187 188 /* Check if link state has changed */ 189 if (events & VMXNET3_ECR_LINK) 190 vmxnet3_check_link(adapter, true); 191 192 /* Check if there is an error on xmit/recv queues */ 193 if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) { 194 spin_lock_irqsave(&adapter->cmd_lock, flags); 195 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 196 VMXNET3_CMD_GET_QUEUE_STATUS); 197 spin_unlock_irqrestore(&adapter->cmd_lock, flags); 198 199 for (i = 0; i < adapter->num_tx_queues; i++) 200 if (adapter->tqd_start[i].status.stopped) 201 dev_err(&adapter->netdev->dev, 202 "%s: tq[%d] error 0x%x\n", 203 adapter->netdev->name, i, le32_to_cpu( 204 adapter->tqd_start[i].status.error)); 205 for (i = 0; i < adapter->num_rx_queues; i++) 206 if (adapter->rqd_start[i].status.stopped) 207 dev_err(&adapter->netdev->dev, 208 "%s: rq[%d] error 0x%x\n", 209 adapter->netdev->name, i, 210 adapter->rqd_start[i].status.error); 211 212 schedule_work(&adapter->work); 213 } 214 } 215 216 #ifdef __BIG_ENDIAN_BITFIELD 217 /* 218 * The device expects the bitfields in shared structures to be written in 219 * little endian. When CPU is big endian, the following routines are used to 220 * correctly read and write into ABI. 221 * The general technique used here is : double word bitfields are defined in 222 * opposite order for big endian architecture. Then before reading them in 223 * driver the complete double word is translated using le32_to_cpu. Similarly 224 * After the driver writes into bitfields, cpu_to_le32 is used to translate the 225 * double words into required format. 226 * In order to avoid touching bits in shared structure more than once, temporary 227 * descriptors are used. These are passed as srcDesc to following functions. 228 */ 229 static void vmxnet3_RxDescToCPU(const struct Vmxnet3_RxDesc *srcDesc, 230 struct Vmxnet3_RxDesc *dstDesc) 231 { 232 u32 *src = (u32 *)srcDesc + 2; 233 u32 *dst = (u32 *)dstDesc + 2; 234 dstDesc->addr = le64_to_cpu(srcDesc->addr); 235 *dst = le32_to_cpu(*src); 236 dstDesc->ext1 = le32_to_cpu(srcDesc->ext1); 237 } 238 239 static void vmxnet3_TxDescToLe(const struct Vmxnet3_TxDesc *srcDesc, 240 struct Vmxnet3_TxDesc *dstDesc) 241 { 242 int i; 243 u32 *src = (u32 *)(srcDesc + 1); 244 u32 *dst = (u32 *)(dstDesc + 1); 245 246 /* Working backwards so that the gen bit is set at the end. */ 247 for (i = 2; i > 0; i--) { 248 src--; 249 dst--; 250 *dst = cpu_to_le32(*src); 251 } 252 } 253 254 255 static void vmxnet3_RxCompToCPU(const struct Vmxnet3_RxCompDesc *srcDesc, 256 struct Vmxnet3_RxCompDesc *dstDesc) 257 { 258 int i = 0; 259 u32 *src = (u32 *)srcDesc; 260 u32 *dst = (u32 *)dstDesc; 261 for (i = 0; i < sizeof(struct Vmxnet3_RxCompDesc) / sizeof(u32); i++) { 262 *dst = le32_to_cpu(*src); 263 src++; 264 dst++; 265 } 266 } 267 268 269 /* Used to read bitfield values from double words. */ 270 static u32 get_bitfield32(const __le32 *bitfield, u32 pos, u32 size) 271 { 272 u32 temp = le32_to_cpu(*bitfield); 273 u32 mask = ((1 << size) - 1) << pos; 274 temp &= mask; 275 temp >>= pos; 276 return temp; 277 } 278 279 280 281 #endif /* __BIG_ENDIAN_BITFIELD */ 282 283 #ifdef __BIG_ENDIAN_BITFIELD 284 285 # define VMXNET3_TXDESC_GET_GEN(txdesc) get_bitfield32(((const __le32 *) \ 286 txdesc) + VMXNET3_TXD_GEN_DWORD_SHIFT, \ 287 VMXNET3_TXD_GEN_SHIFT, VMXNET3_TXD_GEN_SIZE) 288 # define VMXNET3_TXDESC_GET_EOP(txdesc) get_bitfield32(((const __le32 *) \ 289 txdesc) + VMXNET3_TXD_EOP_DWORD_SHIFT, \ 290 VMXNET3_TXD_EOP_SHIFT, VMXNET3_TXD_EOP_SIZE) 291 # define VMXNET3_TCD_GET_GEN(tcd) get_bitfield32(((const __le32 *)tcd) + \ 292 VMXNET3_TCD_GEN_DWORD_SHIFT, VMXNET3_TCD_GEN_SHIFT, \ 293 VMXNET3_TCD_GEN_SIZE) 294 # define VMXNET3_TCD_GET_TXIDX(tcd) get_bitfield32((const __le32 *)tcd, \ 295 VMXNET3_TCD_TXIDX_SHIFT, VMXNET3_TCD_TXIDX_SIZE) 296 # define vmxnet3_getRxComp(dstrcd, rcd, tmp) do { \ 297 (dstrcd) = (tmp); \ 298 vmxnet3_RxCompToCPU((rcd), (tmp)); \ 299 } while (0) 300 # define vmxnet3_getRxDesc(dstrxd, rxd, tmp) do { \ 301 (dstrxd) = (tmp); \ 302 vmxnet3_RxDescToCPU((rxd), (tmp)); \ 303 } while (0) 304 305 #else 306 307 # define VMXNET3_TXDESC_GET_GEN(txdesc) ((txdesc)->gen) 308 # define VMXNET3_TXDESC_GET_EOP(txdesc) ((txdesc)->eop) 309 # define VMXNET3_TCD_GET_GEN(tcd) ((tcd)->gen) 310 # define VMXNET3_TCD_GET_TXIDX(tcd) ((tcd)->txdIdx) 311 # define vmxnet3_getRxComp(dstrcd, rcd, tmp) (dstrcd) = (rcd) 312 # define vmxnet3_getRxDesc(dstrxd, rxd, tmp) (dstrxd) = (rxd) 313 314 #endif /* __BIG_ENDIAN_BITFIELD */ 315 316 317 static void 318 vmxnet3_unmap_tx_buf(struct vmxnet3_tx_buf_info *tbi, 319 struct pci_dev *pdev) 320 { 321 if (tbi->map_type == VMXNET3_MAP_SINGLE) 322 pci_unmap_single(pdev, tbi->dma_addr, tbi->len, 323 PCI_DMA_TODEVICE); 324 else if (tbi->map_type == VMXNET3_MAP_PAGE) 325 pci_unmap_page(pdev, tbi->dma_addr, tbi->len, 326 PCI_DMA_TODEVICE); 327 else 328 BUG_ON(tbi->map_type != VMXNET3_MAP_NONE); 329 330 tbi->map_type = VMXNET3_MAP_NONE; /* to help debugging */ 331 } 332 333 334 static int 335 vmxnet3_unmap_pkt(u32 eop_idx, struct vmxnet3_tx_queue *tq, 336 struct pci_dev *pdev, struct vmxnet3_adapter *adapter) 337 { 338 struct sk_buff *skb; 339 int entries = 0; 340 341 /* no out of order completion */ 342 BUG_ON(tq->buf_info[eop_idx].sop_idx != tq->tx_ring.next2comp); 343 BUG_ON(VMXNET3_TXDESC_GET_EOP(&(tq->tx_ring.base[eop_idx].txd)) != 1); 344 345 skb = tq->buf_info[eop_idx].skb; 346 BUG_ON(skb == NULL); 347 tq->buf_info[eop_idx].skb = NULL; 348 349 VMXNET3_INC_RING_IDX_ONLY(eop_idx, tq->tx_ring.size); 350 351 while (tq->tx_ring.next2comp != eop_idx) { 352 vmxnet3_unmap_tx_buf(tq->buf_info + tq->tx_ring.next2comp, 353 pdev); 354 355 /* update next2comp w/o tx_lock. Since we are marking more, 356 * instead of less, tx ring entries avail, the worst case is 357 * that the tx routine incorrectly re-queues a pkt due to 358 * insufficient tx ring entries. 359 */ 360 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring); 361 entries++; 362 } 363 364 dev_kfree_skb_any(skb); 365 return entries; 366 } 367 368 369 static int 370 vmxnet3_tq_tx_complete(struct vmxnet3_tx_queue *tq, 371 struct vmxnet3_adapter *adapter) 372 { 373 int completed = 0; 374 union Vmxnet3_GenericDesc *gdesc; 375 376 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc; 377 while (VMXNET3_TCD_GET_GEN(&gdesc->tcd) == tq->comp_ring.gen) { 378 completed += vmxnet3_unmap_pkt(VMXNET3_TCD_GET_TXIDX( 379 &gdesc->tcd), tq, adapter->pdev, 380 adapter); 381 382 vmxnet3_comp_ring_adv_next2proc(&tq->comp_ring); 383 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc; 384 } 385 386 if (completed) { 387 spin_lock(&tq->tx_lock); 388 if (unlikely(vmxnet3_tq_stopped(tq, adapter) && 389 vmxnet3_cmd_ring_desc_avail(&tq->tx_ring) > 390 VMXNET3_WAKE_QUEUE_THRESHOLD(tq) && 391 netif_carrier_ok(adapter->netdev))) { 392 vmxnet3_tq_wake(tq, adapter); 393 } 394 spin_unlock(&tq->tx_lock); 395 } 396 return completed; 397 } 398 399 400 static void 401 vmxnet3_tq_cleanup(struct vmxnet3_tx_queue *tq, 402 struct vmxnet3_adapter *adapter) 403 { 404 int i; 405 406 while (tq->tx_ring.next2comp != tq->tx_ring.next2fill) { 407 struct vmxnet3_tx_buf_info *tbi; 408 union Vmxnet3_GenericDesc *gdesc; 409 410 tbi = tq->buf_info + tq->tx_ring.next2comp; 411 gdesc = tq->tx_ring.base + tq->tx_ring.next2comp; 412 413 vmxnet3_unmap_tx_buf(tbi, adapter->pdev); 414 if (tbi->skb) { 415 dev_kfree_skb_any(tbi->skb); 416 tbi->skb = NULL; 417 } 418 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring); 419 } 420 421 /* sanity check, verify all buffers are indeed unmapped and freed */ 422 for (i = 0; i < tq->tx_ring.size; i++) { 423 BUG_ON(tq->buf_info[i].skb != NULL || 424 tq->buf_info[i].map_type != VMXNET3_MAP_NONE); 425 } 426 427 tq->tx_ring.gen = VMXNET3_INIT_GEN; 428 tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0; 429 430 tq->comp_ring.gen = VMXNET3_INIT_GEN; 431 tq->comp_ring.next2proc = 0; 432 } 433 434 435 static void 436 vmxnet3_tq_destroy(struct vmxnet3_tx_queue *tq, 437 struct vmxnet3_adapter *adapter) 438 { 439 if (tq->tx_ring.base) { 440 pci_free_consistent(adapter->pdev, tq->tx_ring.size * 441 sizeof(struct Vmxnet3_TxDesc), 442 tq->tx_ring.base, tq->tx_ring.basePA); 443 tq->tx_ring.base = NULL; 444 } 445 if (tq->data_ring.base) { 446 pci_free_consistent(adapter->pdev, tq->data_ring.size * 447 sizeof(struct Vmxnet3_TxDataDesc), 448 tq->data_ring.base, tq->data_ring.basePA); 449 tq->data_ring.base = NULL; 450 } 451 if (tq->comp_ring.base) { 452 pci_free_consistent(adapter->pdev, tq->comp_ring.size * 453 sizeof(struct Vmxnet3_TxCompDesc), 454 tq->comp_ring.base, tq->comp_ring.basePA); 455 tq->comp_ring.base = NULL; 456 } 457 kfree(tq->buf_info); 458 tq->buf_info = NULL; 459 } 460 461 462 /* Destroy all tx queues */ 463 void 464 vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter) 465 { 466 int i; 467 468 for (i = 0; i < adapter->num_tx_queues; i++) 469 vmxnet3_tq_destroy(&adapter->tx_queue[i], adapter); 470 } 471 472 473 static void 474 vmxnet3_tq_init(struct vmxnet3_tx_queue *tq, 475 struct vmxnet3_adapter *adapter) 476 { 477 int i; 478 479 /* reset the tx ring contents to 0 and reset the tx ring states */ 480 memset(tq->tx_ring.base, 0, tq->tx_ring.size * 481 sizeof(struct Vmxnet3_TxDesc)); 482 tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0; 483 tq->tx_ring.gen = VMXNET3_INIT_GEN; 484 485 memset(tq->data_ring.base, 0, tq->data_ring.size * 486 sizeof(struct Vmxnet3_TxDataDesc)); 487 488 /* reset the tx comp ring contents to 0 and reset comp ring states */ 489 memset(tq->comp_ring.base, 0, tq->comp_ring.size * 490 sizeof(struct Vmxnet3_TxCompDesc)); 491 tq->comp_ring.next2proc = 0; 492 tq->comp_ring.gen = VMXNET3_INIT_GEN; 493 494 /* reset the bookkeeping data */ 495 memset(tq->buf_info, 0, sizeof(tq->buf_info[0]) * tq->tx_ring.size); 496 for (i = 0; i < tq->tx_ring.size; i++) 497 tq->buf_info[i].map_type = VMXNET3_MAP_NONE; 498 499 /* stats are not reset */ 500 } 501 502 503 static int 504 vmxnet3_tq_create(struct vmxnet3_tx_queue *tq, 505 struct vmxnet3_adapter *adapter) 506 { 507 BUG_ON(tq->tx_ring.base || tq->data_ring.base || 508 tq->comp_ring.base || tq->buf_info); 509 510 tq->tx_ring.base = pci_alloc_consistent(adapter->pdev, tq->tx_ring.size 511 * sizeof(struct Vmxnet3_TxDesc), 512 &tq->tx_ring.basePA); 513 if (!tq->tx_ring.base) { 514 printk(KERN_ERR "%s: failed to allocate tx ring\n", 515 adapter->netdev->name); 516 goto err; 517 } 518 519 tq->data_ring.base = pci_alloc_consistent(adapter->pdev, 520 tq->data_ring.size * 521 sizeof(struct Vmxnet3_TxDataDesc), 522 &tq->data_ring.basePA); 523 if (!tq->data_ring.base) { 524 printk(KERN_ERR "%s: failed to allocate data ring\n", 525 adapter->netdev->name); 526 goto err; 527 } 528 529 tq->comp_ring.base = pci_alloc_consistent(adapter->pdev, 530 tq->comp_ring.size * 531 sizeof(struct Vmxnet3_TxCompDesc), 532 &tq->comp_ring.basePA); 533 if (!tq->comp_ring.base) { 534 printk(KERN_ERR "%s: failed to allocate tx comp ring\n", 535 adapter->netdev->name); 536 goto err; 537 } 538 539 tq->buf_info = kcalloc(tq->tx_ring.size, sizeof(tq->buf_info[0]), 540 GFP_KERNEL); 541 if (!tq->buf_info) { 542 printk(KERN_ERR "%s: failed to allocate tx bufinfo\n", 543 adapter->netdev->name); 544 goto err; 545 } 546 547 return 0; 548 549 err: 550 vmxnet3_tq_destroy(tq, adapter); 551 return -ENOMEM; 552 } 553 554 static void 555 vmxnet3_tq_cleanup_all(struct vmxnet3_adapter *adapter) 556 { 557 int i; 558 559 for (i = 0; i < adapter->num_tx_queues; i++) 560 vmxnet3_tq_cleanup(&adapter->tx_queue[i], adapter); 561 } 562 563 /* 564 * starting from ring->next2fill, allocate rx buffers for the given ring 565 * of the rx queue and update the rx desc. stop after @num_to_alloc buffers 566 * are allocated or allocation fails 567 */ 568 569 static int 570 vmxnet3_rq_alloc_rx_buf(struct vmxnet3_rx_queue *rq, u32 ring_idx, 571 int num_to_alloc, struct vmxnet3_adapter *adapter) 572 { 573 int num_allocated = 0; 574 struct vmxnet3_rx_buf_info *rbi_base = rq->buf_info[ring_idx]; 575 struct vmxnet3_cmd_ring *ring = &rq->rx_ring[ring_idx]; 576 u32 val; 577 578 while (num_allocated <= num_to_alloc) { 579 struct vmxnet3_rx_buf_info *rbi; 580 union Vmxnet3_GenericDesc *gd; 581 582 rbi = rbi_base + ring->next2fill; 583 gd = ring->base + ring->next2fill; 584 585 if (rbi->buf_type == VMXNET3_RX_BUF_SKB) { 586 if (rbi->skb == NULL) { 587 rbi->skb = dev_alloc_skb(rbi->len + 588 NET_IP_ALIGN); 589 if (unlikely(rbi->skb == NULL)) { 590 rq->stats.rx_buf_alloc_failure++; 591 break; 592 } 593 rbi->skb->dev = adapter->netdev; 594 595 skb_reserve(rbi->skb, NET_IP_ALIGN); 596 rbi->dma_addr = pci_map_single(adapter->pdev, 597 rbi->skb->data, rbi->len, 598 PCI_DMA_FROMDEVICE); 599 } else { 600 /* rx buffer skipped by the device */ 601 } 602 val = VMXNET3_RXD_BTYPE_HEAD << VMXNET3_RXD_BTYPE_SHIFT; 603 } else { 604 BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE || 605 rbi->len != PAGE_SIZE); 606 607 if (rbi->page == NULL) { 608 rbi->page = alloc_page(GFP_ATOMIC); 609 if (unlikely(rbi->page == NULL)) { 610 rq->stats.rx_buf_alloc_failure++; 611 break; 612 } 613 rbi->dma_addr = pci_map_page(adapter->pdev, 614 rbi->page, 0, PAGE_SIZE, 615 PCI_DMA_FROMDEVICE); 616 } else { 617 /* rx buffers skipped by the device */ 618 } 619 val = VMXNET3_RXD_BTYPE_BODY << VMXNET3_RXD_BTYPE_SHIFT; 620 } 621 622 BUG_ON(rbi->dma_addr == 0); 623 gd->rxd.addr = cpu_to_le64(rbi->dma_addr); 624 gd->dword[2] = cpu_to_le32((!ring->gen << VMXNET3_RXD_GEN_SHIFT) 625 | val | rbi->len); 626 627 /* Fill the last buffer but dont mark it ready, or else the 628 * device will think that the queue is full */ 629 if (num_allocated == num_to_alloc) 630 break; 631 632 gd->dword[2] |= cpu_to_le32(ring->gen << VMXNET3_RXD_GEN_SHIFT); 633 num_allocated++; 634 vmxnet3_cmd_ring_adv_next2fill(ring); 635 } 636 rq->uncommitted[ring_idx] += num_allocated; 637 638 dev_dbg(&adapter->netdev->dev, 639 "alloc_rx_buf: %d allocated, next2fill %u, next2comp " 640 "%u, uncommited %u\n", num_allocated, ring->next2fill, 641 ring->next2comp, rq->uncommitted[ring_idx]); 642 643 /* so that the device can distinguish a full ring and an empty ring */ 644 BUG_ON(num_allocated != 0 && ring->next2fill == ring->next2comp); 645 646 return num_allocated; 647 } 648 649 650 static void 651 vmxnet3_append_frag(struct sk_buff *skb, struct Vmxnet3_RxCompDesc *rcd, 652 struct vmxnet3_rx_buf_info *rbi) 653 { 654 struct skb_frag_struct *frag = skb_shinfo(skb)->frags + 655 skb_shinfo(skb)->nr_frags; 656 657 BUG_ON(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS); 658 659 frag->page = rbi->page; 660 frag->page_offset = 0; 661 frag->size = rcd->len; 662 skb->data_len += frag->size; 663 skb_shinfo(skb)->nr_frags++; 664 } 665 666 667 static void 668 vmxnet3_map_pkt(struct sk_buff *skb, struct vmxnet3_tx_ctx *ctx, 669 struct vmxnet3_tx_queue *tq, struct pci_dev *pdev, 670 struct vmxnet3_adapter *adapter) 671 { 672 u32 dw2, len; 673 unsigned long buf_offset; 674 int i; 675 union Vmxnet3_GenericDesc *gdesc; 676 struct vmxnet3_tx_buf_info *tbi = NULL; 677 678 BUG_ON(ctx->copy_size > skb_headlen(skb)); 679 680 /* use the previous gen bit for the SOP desc */ 681 dw2 = (tq->tx_ring.gen ^ 0x1) << VMXNET3_TXD_GEN_SHIFT; 682 683 ctx->sop_txd = tq->tx_ring.base + tq->tx_ring.next2fill; 684 gdesc = ctx->sop_txd; /* both loops below can be skipped */ 685 686 /* no need to map the buffer if headers are copied */ 687 if (ctx->copy_size) { 688 ctx->sop_txd->txd.addr = cpu_to_le64(tq->data_ring.basePA + 689 tq->tx_ring.next2fill * 690 sizeof(struct Vmxnet3_TxDataDesc)); 691 ctx->sop_txd->dword[2] = cpu_to_le32(dw2 | ctx->copy_size); 692 ctx->sop_txd->dword[3] = 0; 693 694 tbi = tq->buf_info + tq->tx_ring.next2fill; 695 tbi->map_type = VMXNET3_MAP_NONE; 696 697 dev_dbg(&adapter->netdev->dev, 698 "txd[%u]: 0x%Lx 0x%x 0x%x\n", 699 tq->tx_ring.next2fill, 700 le64_to_cpu(ctx->sop_txd->txd.addr), 701 ctx->sop_txd->dword[2], ctx->sop_txd->dword[3]); 702 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); 703 704 /* use the right gen for non-SOP desc */ 705 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; 706 } 707 708 /* linear part can use multiple tx desc if it's big */ 709 len = skb_headlen(skb) - ctx->copy_size; 710 buf_offset = ctx->copy_size; 711 while (len) { 712 u32 buf_size; 713 714 if (len < VMXNET3_MAX_TX_BUF_SIZE) { 715 buf_size = len; 716 dw2 |= len; 717 } else { 718 buf_size = VMXNET3_MAX_TX_BUF_SIZE; 719 /* spec says that for TxDesc.len, 0 == 2^14 */ 720 } 721 722 tbi = tq->buf_info + tq->tx_ring.next2fill; 723 tbi->map_type = VMXNET3_MAP_SINGLE; 724 tbi->dma_addr = pci_map_single(adapter->pdev, 725 skb->data + buf_offset, buf_size, 726 PCI_DMA_TODEVICE); 727 728 tbi->len = buf_size; 729 730 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill; 731 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen); 732 733 gdesc->txd.addr = cpu_to_le64(tbi->dma_addr); 734 gdesc->dword[2] = cpu_to_le32(dw2); 735 gdesc->dword[3] = 0; 736 737 dev_dbg(&adapter->netdev->dev, 738 "txd[%u]: 0x%Lx 0x%x 0x%x\n", 739 tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr), 740 le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]); 741 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); 742 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; 743 744 len -= buf_size; 745 buf_offset += buf_size; 746 } 747 748 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 749 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i]; 750 751 tbi = tq->buf_info + tq->tx_ring.next2fill; 752 tbi->map_type = VMXNET3_MAP_PAGE; 753 tbi->dma_addr = pci_map_page(adapter->pdev, frag->page, 754 frag->page_offset, frag->size, 755 PCI_DMA_TODEVICE); 756 757 tbi->len = frag->size; 758 759 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill; 760 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen); 761 762 gdesc->txd.addr = cpu_to_le64(tbi->dma_addr); 763 gdesc->dword[2] = cpu_to_le32(dw2 | frag->size); 764 gdesc->dword[3] = 0; 765 766 dev_dbg(&adapter->netdev->dev, 767 "txd[%u]: 0x%llu %u %u\n", 768 tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr), 769 le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]); 770 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); 771 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; 772 } 773 774 ctx->eop_txd = gdesc; 775 776 /* set the last buf_info for the pkt */ 777 tbi->skb = skb; 778 tbi->sop_idx = ctx->sop_txd - tq->tx_ring.base; 779 } 780 781 782 /* Init all tx queues */ 783 static void 784 vmxnet3_tq_init_all(struct vmxnet3_adapter *adapter) 785 { 786 int i; 787 788 for (i = 0; i < adapter->num_tx_queues; i++) 789 vmxnet3_tq_init(&adapter->tx_queue[i], adapter); 790 } 791 792 793 /* 794 * parse and copy relevant protocol headers: 795 * For a tso pkt, relevant headers are L2/3/4 including options 796 * For a pkt requesting csum offloading, they are L2/3 and may include L4 797 * if it's a TCP/UDP pkt 798 * 799 * Returns: 800 * -1: error happens during parsing 801 * 0: protocol headers parsed, but too big to be copied 802 * 1: protocol headers parsed and copied 803 * 804 * Other effects: 805 * 1. related *ctx fields are updated. 806 * 2. ctx->copy_size is # of bytes copied 807 * 3. the portion copied is guaranteed to be in the linear part 808 * 809 */ 810 static int 811 vmxnet3_parse_and_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq, 812 struct vmxnet3_tx_ctx *ctx, 813 struct vmxnet3_adapter *adapter) 814 { 815 struct Vmxnet3_TxDataDesc *tdd; 816 817 if (ctx->mss) { /* TSO */ 818 ctx->eth_ip_hdr_size = skb_transport_offset(skb); 819 ctx->l4_hdr_size = ((struct tcphdr *) 820 skb_transport_header(skb))->doff * 4; 821 ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size; 822 } else { 823 if (skb->ip_summed == CHECKSUM_PARTIAL) { 824 ctx->eth_ip_hdr_size = skb_checksum_start_offset(skb); 825 826 if (ctx->ipv4) { 827 struct iphdr *iph = (struct iphdr *) 828 skb_network_header(skb); 829 if (iph->protocol == IPPROTO_TCP) 830 ctx->l4_hdr_size = ((struct tcphdr *) 831 skb_transport_header(skb))->doff * 4; 832 else if (iph->protocol == IPPROTO_UDP) 833 /* 834 * Use tcp header size so that bytes to 835 * be copied are more than required by 836 * the device. 837 */ 838 ctx->l4_hdr_size = 839 sizeof(struct tcphdr); 840 else 841 ctx->l4_hdr_size = 0; 842 } else { 843 /* for simplicity, don't copy L4 headers */ 844 ctx->l4_hdr_size = 0; 845 } 846 ctx->copy_size = ctx->eth_ip_hdr_size + 847 ctx->l4_hdr_size; 848 } else { 849 ctx->eth_ip_hdr_size = 0; 850 ctx->l4_hdr_size = 0; 851 /* copy as much as allowed */ 852 ctx->copy_size = min((unsigned int)VMXNET3_HDR_COPY_SIZE 853 , skb_headlen(skb)); 854 } 855 856 /* make sure headers are accessible directly */ 857 if (unlikely(!pskb_may_pull(skb, ctx->copy_size))) 858 goto err; 859 } 860 861 if (unlikely(ctx->copy_size > VMXNET3_HDR_COPY_SIZE)) { 862 tq->stats.oversized_hdr++; 863 ctx->copy_size = 0; 864 return 0; 865 } 866 867 tdd = tq->data_ring.base + tq->tx_ring.next2fill; 868 869 memcpy(tdd->data, skb->data, ctx->copy_size); 870 dev_dbg(&adapter->netdev->dev, 871 "copy %u bytes to dataRing[%u]\n", 872 ctx->copy_size, tq->tx_ring.next2fill); 873 return 1; 874 875 err: 876 return -1; 877 } 878 879 880 static void 881 vmxnet3_prepare_tso(struct sk_buff *skb, 882 struct vmxnet3_tx_ctx *ctx) 883 { 884 struct tcphdr *tcph = (struct tcphdr *)skb_transport_header(skb); 885 if (ctx->ipv4) { 886 struct iphdr *iph = (struct iphdr *)skb_network_header(skb); 887 iph->check = 0; 888 tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0, 889 IPPROTO_TCP, 0); 890 } else { 891 struct ipv6hdr *iph = (struct ipv6hdr *)skb_network_header(skb); 892 tcph->check = ~csum_ipv6_magic(&iph->saddr, &iph->daddr, 0, 893 IPPROTO_TCP, 0); 894 } 895 } 896 897 898 /* 899 * Transmits a pkt thru a given tq 900 * Returns: 901 * NETDEV_TX_OK: descriptors are setup successfully 902 * NETDEV_TX_OK: error occurred, the pkt is dropped 903 * NETDEV_TX_BUSY: tx ring is full, queue is stopped 904 * 905 * Side-effects: 906 * 1. tx ring may be changed 907 * 2. tq stats may be updated accordingly 908 * 3. shared->txNumDeferred may be updated 909 */ 910 911 static int 912 vmxnet3_tq_xmit(struct sk_buff *skb, struct vmxnet3_tx_queue *tq, 913 struct vmxnet3_adapter *adapter, struct net_device *netdev) 914 { 915 int ret; 916 u32 count; 917 unsigned long flags; 918 struct vmxnet3_tx_ctx ctx; 919 union Vmxnet3_GenericDesc *gdesc; 920 #ifdef __BIG_ENDIAN_BITFIELD 921 /* Use temporary descriptor to avoid touching bits multiple times */ 922 union Vmxnet3_GenericDesc tempTxDesc; 923 #endif 924 925 /* conservatively estimate # of descriptors to use */ 926 count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 927 skb_shinfo(skb)->nr_frags + 1; 928 929 ctx.ipv4 = (skb->protocol == cpu_to_be16(ETH_P_IP)); 930 931 ctx.mss = skb_shinfo(skb)->gso_size; 932 if (ctx.mss) { 933 if (skb_header_cloned(skb)) { 934 if (unlikely(pskb_expand_head(skb, 0, 0, 935 GFP_ATOMIC) != 0)) { 936 tq->stats.drop_tso++; 937 goto drop_pkt; 938 } 939 tq->stats.copy_skb_header++; 940 } 941 vmxnet3_prepare_tso(skb, &ctx); 942 } else { 943 if (unlikely(count > VMXNET3_MAX_TXD_PER_PKT)) { 944 945 /* non-tso pkts must not use more than 946 * VMXNET3_MAX_TXD_PER_PKT entries 947 */ 948 if (skb_linearize(skb) != 0) { 949 tq->stats.drop_too_many_frags++; 950 goto drop_pkt; 951 } 952 tq->stats.linearized++; 953 954 /* recalculate the # of descriptors to use */ 955 count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1; 956 } 957 } 958 959 spin_lock_irqsave(&tq->tx_lock, flags); 960 961 if (count > vmxnet3_cmd_ring_desc_avail(&tq->tx_ring)) { 962 tq->stats.tx_ring_full++; 963 dev_dbg(&adapter->netdev->dev, 964 "tx queue stopped on %s, next2comp %u" 965 " next2fill %u\n", adapter->netdev->name, 966 tq->tx_ring.next2comp, tq->tx_ring.next2fill); 967 968 vmxnet3_tq_stop(tq, adapter); 969 spin_unlock_irqrestore(&tq->tx_lock, flags); 970 return NETDEV_TX_BUSY; 971 } 972 973 974 ret = vmxnet3_parse_and_copy_hdr(skb, tq, &ctx, adapter); 975 if (ret >= 0) { 976 BUG_ON(ret <= 0 && ctx.copy_size != 0); 977 /* hdrs parsed, check against other limits */ 978 if (ctx.mss) { 979 if (unlikely(ctx.eth_ip_hdr_size + ctx.l4_hdr_size > 980 VMXNET3_MAX_TX_BUF_SIZE)) { 981 goto hdr_too_big; 982 } 983 } else { 984 if (skb->ip_summed == CHECKSUM_PARTIAL) { 985 if (unlikely(ctx.eth_ip_hdr_size + 986 skb->csum_offset > 987 VMXNET3_MAX_CSUM_OFFSET)) { 988 goto hdr_too_big; 989 } 990 } 991 } 992 } else { 993 tq->stats.drop_hdr_inspect_err++; 994 goto unlock_drop_pkt; 995 } 996 997 /* fill tx descs related to addr & len */ 998 vmxnet3_map_pkt(skb, &ctx, tq, adapter->pdev, adapter); 999 1000 /* setup the EOP desc */ 1001 ctx.eop_txd->dword[3] = cpu_to_le32(VMXNET3_TXD_CQ | VMXNET3_TXD_EOP); 1002 1003 /* setup the SOP desc */ 1004 #ifdef __BIG_ENDIAN_BITFIELD 1005 gdesc = &tempTxDesc; 1006 gdesc->dword[2] = ctx.sop_txd->dword[2]; 1007 gdesc->dword[3] = ctx.sop_txd->dword[3]; 1008 #else 1009 gdesc = ctx.sop_txd; 1010 #endif 1011 if (ctx.mss) { 1012 gdesc->txd.hlen = ctx.eth_ip_hdr_size + ctx.l4_hdr_size; 1013 gdesc->txd.om = VMXNET3_OM_TSO; 1014 gdesc->txd.msscof = ctx.mss; 1015 le32_add_cpu(&tq->shared->txNumDeferred, (skb->len - 1016 gdesc->txd.hlen + ctx.mss - 1) / ctx.mss); 1017 } else { 1018 if (skb->ip_summed == CHECKSUM_PARTIAL) { 1019 gdesc->txd.hlen = ctx.eth_ip_hdr_size; 1020 gdesc->txd.om = VMXNET3_OM_CSUM; 1021 gdesc->txd.msscof = ctx.eth_ip_hdr_size + 1022 skb->csum_offset; 1023 } else { 1024 gdesc->txd.om = 0; 1025 gdesc->txd.msscof = 0; 1026 } 1027 le32_add_cpu(&tq->shared->txNumDeferred, 1); 1028 } 1029 1030 if (vlan_tx_tag_present(skb)) { 1031 gdesc->txd.ti = 1; 1032 gdesc->txd.tci = vlan_tx_tag_get(skb); 1033 } 1034 1035 /* finally flips the GEN bit of the SOP desc. */ 1036 gdesc->dword[2] = cpu_to_le32(le32_to_cpu(gdesc->dword[2]) ^ 1037 VMXNET3_TXD_GEN); 1038 #ifdef __BIG_ENDIAN_BITFIELD 1039 /* Finished updating in bitfields of Tx Desc, so write them in original 1040 * place. 1041 */ 1042 vmxnet3_TxDescToLe((struct Vmxnet3_TxDesc *)gdesc, 1043 (struct Vmxnet3_TxDesc *)ctx.sop_txd); 1044 gdesc = ctx.sop_txd; 1045 #endif 1046 dev_dbg(&adapter->netdev->dev, 1047 "txd[%u]: SOP 0x%Lx 0x%x 0x%x\n", 1048 (u32)((union Vmxnet3_GenericDesc *)ctx.sop_txd - 1049 tq->tx_ring.base), le64_to_cpu(gdesc->txd.addr), 1050 le32_to_cpu(gdesc->dword[2]), le32_to_cpu(gdesc->dword[3])); 1051 1052 spin_unlock_irqrestore(&tq->tx_lock, flags); 1053 1054 if (le32_to_cpu(tq->shared->txNumDeferred) >= 1055 le32_to_cpu(tq->shared->txThreshold)) { 1056 tq->shared->txNumDeferred = 0; 1057 VMXNET3_WRITE_BAR0_REG(adapter, 1058 VMXNET3_REG_TXPROD + tq->qid * 8, 1059 tq->tx_ring.next2fill); 1060 } 1061 1062 return NETDEV_TX_OK; 1063 1064 hdr_too_big: 1065 tq->stats.drop_oversized_hdr++; 1066 unlock_drop_pkt: 1067 spin_unlock_irqrestore(&tq->tx_lock, flags); 1068 drop_pkt: 1069 tq->stats.drop_total++; 1070 dev_kfree_skb(skb); 1071 return NETDEV_TX_OK; 1072 } 1073 1074 1075 static netdev_tx_t 1076 vmxnet3_xmit_frame(struct sk_buff *skb, struct net_device *netdev) 1077 { 1078 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1079 1080 BUG_ON(skb->queue_mapping > adapter->num_tx_queues); 1081 return vmxnet3_tq_xmit(skb, 1082 &adapter->tx_queue[skb->queue_mapping], 1083 adapter, netdev); 1084 } 1085 1086 1087 static void 1088 vmxnet3_rx_csum(struct vmxnet3_adapter *adapter, 1089 struct sk_buff *skb, 1090 union Vmxnet3_GenericDesc *gdesc) 1091 { 1092 if (!gdesc->rcd.cnc && adapter->netdev->features & NETIF_F_RXCSUM) { 1093 /* typical case: TCP/UDP over IP and both csums are correct */ 1094 if ((le32_to_cpu(gdesc->dword[3]) & VMXNET3_RCD_CSUM_OK) == 1095 VMXNET3_RCD_CSUM_OK) { 1096 skb->ip_summed = CHECKSUM_UNNECESSARY; 1097 BUG_ON(!(gdesc->rcd.tcp || gdesc->rcd.udp)); 1098 BUG_ON(!(gdesc->rcd.v4 || gdesc->rcd.v6)); 1099 BUG_ON(gdesc->rcd.frg); 1100 } else { 1101 if (gdesc->rcd.csum) { 1102 skb->csum = htons(gdesc->rcd.csum); 1103 skb->ip_summed = CHECKSUM_PARTIAL; 1104 } else { 1105 skb_checksum_none_assert(skb); 1106 } 1107 } 1108 } else { 1109 skb_checksum_none_assert(skb); 1110 } 1111 } 1112 1113 1114 static void 1115 vmxnet3_rx_error(struct vmxnet3_rx_queue *rq, struct Vmxnet3_RxCompDesc *rcd, 1116 struct vmxnet3_rx_ctx *ctx, struct vmxnet3_adapter *adapter) 1117 { 1118 rq->stats.drop_err++; 1119 if (!rcd->fcs) 1120 rq->stats.drop_fcs++; 1121 1122 rq->stats.drop_total++; 1123 1124 /* 1125 * We do not unmap and chain the rx buffer to the skb. 1126 * We basically pretend this buffer is not used and will be recycled 1127 * by vmxnet3_rq_alloc_rx_buf() 1128 */ 1129 1130 /* 1131 * ctx->skb may be NULL if this is the first and the only one 1132 * desc for the pkt 1133 */ 1134 if (ctx->skb) 1135 dev_kfree_skb_irq(ctx->skb); 1136 1137 ctx->skb = NULL; 1138 } 1139 1140 1141 static int 1142 vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq, 1143 struct vmxnet3_adapter *adapter, int quota) 1144 { 1145 static const u32 rxprod_reg[2] = { 1146 VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2 1147 }; 1148 u32 num_rxd = 0; 1149 bool skip_page_frags = false; 1150 struct Vmxnet3_RxCompDesc *rcd; 1151 struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx; 1152 #ifdef __BIG_ENDIAN_BITFIELD 1153 struct Vmxnet3_RxDesc rxCmdDesc; 1154 struct Vmxnet3_RxCompDesc rxComp; 1155 #endif 1156 vmxnet3_getRxComp(rcd, &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, 1157 &rxComp); 1158 while (rcd->gen == rq->comp_ring.gen) { 1159 struct vmxnet3_rx_buf_info *rbi; 1160 struct sk_buff *skb, *new_skb = NULL; 1161 struct page *new_page = NULL; 1162 int num_to_alloc; 1163 struct Vmxnet3_RxDesc *rxd; 1164 u32 idx, ring_idx; 1165 struct vmxnet3_cmd_ring *ring = NULL; 1166 if (num_rxd >= quota) { 1167 /* we may stop even before we see the EOP desc of 1168 * the current pkt 1169 */ 1170 break; 1171 } 1172 num_rxd++; 1173 BUG_ON(rcd->rqID != rq->qid && rcd->rqID != rq->qid2); 1174 idx = rcd->rxdIdx; 1175 ring_idx = rcd->rqID < adapter->num_rx_queues ? 0 : 1; 1176 ring = rq->rx_ring + ring_idx; 1177 vmxnet3_getRxDesc(rxd, &rq->rx_ring[ring_idx].base[idx].rxd, 1178 &rxCmdDesc); 1179 rbi = rq->buf_info[ring_idx] + idx; 1180 1181 BUG_ON(rxd->addr != rbi->dma_addr || 1182 rxd->len != rbi->len); 1183 1184 if (unlikely(rcd->eop && rcd->err)) { 1185 vmxnet3_rx_error(rq, rcd, ctx, adapter); 1186 goto rcd_done; 1187 } 1188 1189 if (rcd->sop) { /* first buf of the pkt */ 1190 BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_HEAD || 1191 rcd->rqID != rq->qid); 1192 1193 BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_SKB); 1194 BUG_ON(ctx->skb != NULL || rbi->skb == NULL); 1195 1196 if (unlikely(rcd->len == 0)) { 1197 /* Pretend the rx buffer is skipped. */ 1198 BUG_ON(!(rcd->sop && rcd->eop)); 1199 dev_dbg(&adapter->netdev->dev, 1200 "rxRing[%u][%u] 0 length\n", 1201 ring_idx, idx); 1202 goto rcd_done; 1203 } 1204 1205 skip_page_frags = false; 1206 ctx->skb = rbi->skb; 1207 new_skb = dev_alloc_skb(rbi->len + NET_IP_ALIGN); 1208 if (new_skb == NULL) { 1209 /* Skb allocation failed, do not handover this 1210 * skb to stack. Reuse it. Drop the existing pkt 1211 */ 1212 rq->stats.rx_buf_alloc_failure++; 1213 ctx->skb = NULL; 1214 rq->stats.drop_total++; 1215 skip_page_frags = true; 1216 goto rcd_done; 1217 } 1218 1219 pci_unmap_single(adapter->pdev, rbi->dma_addr, rbi->len, 1220 PCI_DMA_FROMDEVICE); 1221 1222 skb_put(ctx->skb, rcd->len); 1223 1224 /* Immediate refill */ 1225 new_skb->dev = adapter->netdev; 1226 skb_reserve(new_skb, NET_IP_ALIGN); 1227 rbi->skb = new_skb; 1228 rbi->dma_addr = pci_map_single(adapter->pdev, 1229 rbi->skb->data, rbi->len, 1230 PCI_DMA_FROMDEVICE); 1231 rxd->addr = cpu_to_le64(rbi->dma_addr); 1232 rxd->len = rbi->len; 1233 1234 } else { 1235 BUG_ON(ctx->skb == NULL && !skip_page_frags); 1236 1237 /* non SOP buffer must be type 1 in most cases */ 1238 BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE); 1239 BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_BODY); 1240 1241 /* If an sop buffer was dropped, skip all 1242 * following non-sop fragments. They will be reused. 1243 */ 1244 if (skip_page_frags) 1245 goto rcd_done; 1246 1247 new_page = alloc_page(GFP_ATOMIC); 1248 if (unlikely(new_page == NULL)) { 1249 /* Replacement page frag could not be allocated. 1250 * Reuse this page. Drop the pkt and free the 1251 * skb which contained this page as a frag. Skip 1252 * processing all the following non-sop frags. 1253 */ 1254 rq->stats.rx_buf_alloc_failure++; 1255 dev_kfree_skb(ctx->skb); 1256 ctx->skb = NULL; 1257 skip_page_frags = true; 1258 goto rcd_done; 1259 } 1260 1261 if (rcd->len) { 1262 pci_unmap_page(adapter->pdev, 1263 rbi->dma_addr, rbi->len, 1264 PCI_DMA_FROMDEVICE); 1265 1266 vmxnet3_append_frag(ctx->skb, rcd, rbi); 1267 } 1268 1269 /* Immediate refill */ 1270 rbi->page = new_page; 1271 rbi->dma_addr = pci_map_page(adapter->pdev, rbi->page, 1272 0, PAGE_SIZE, 1273 PCI_DMA_FROMDEVICE); 1274 rxd->addr = cpu_to_le64(rbi->dma_addr); 1275 rxd->len = rbi->len; 1276 } 1277 1278 1279 skb = ctx->skb; 1280 if (rcd->eop) { 1281 skb->len += skb->data_len; 1282 skb->truesize += skb->data_len; 1283 1284 vmxnet3_rx_csum(adapter, skb, 1285 (union Vmxnet3_GenericDesc *)rcd); 1286 skb->protocol = eth_type_trans(skb, adapter->netdev); 1287 1288 if (unlikely(adapter->vlan_grp && rcd->ts)) { 1289 vlan_hwaccel_receive_skb(skb, 1290 adapter->vlan_grp, rcd->tci); 1291 } else { 1292 netif_receive_skb(skb); 1293 } 1294 1295 ctx->skb = NULL; 1296 } 1297 1298 rcd_done: 1299 /* device may have skipped some rx descs */ 1300 ring->next2comp = idx; 1301 num_to_alloc = vmxnet3_cmd_ring_desc_avail(ring); 1302 ring = rq->rx_ring + ring_idx; 1303 while (num_to_alloc) { 1304 vmxnet3_getRxDesc(rxd, &ring->base[ring->next2fill].rxd, 1305 &rxCmdDesc); 1306 BUG_ON(!rxd->addr); 1307 1308 /* Recv desc is ready to be used by the device */ 1309 rxd->gen = ring->gen; 1310 vmxnet3_cmd_ring_adv_next2fill(ring); 1311 num_to_alloc--; 1312 } 1313 1314 /* if needed, update the register */ 1315 if (unlikely(rq->shared->updateRxProd)) { 1316 VMXNET3_WRITE_BAR0_REG(adapter, 1317 rxprod_reg[ring_idx] + rq->qid * 8, 1318 ring->next2fill); 1319 rq->uncommitted[ring_idx] = 0; 1320 } 1321 1322 vmxnet3_comp_ring_adv_next2proc(&rq->comp_ring); 1323 vmxnet3_getRxComp(rcd, 1324 &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, &rxComp); 1325 } 1326 1327 return num_rxd; 1328 } 1329 1330 1331 static void 1332 vmxnet3_rq_cleanup(struct vmxnet3_rx_queue *rq, 1333 struct vmxnet3_adapter *adapter) 1334 { 1335 u32 i, ring_idx; 1336 struct Vmxnet3_RxDesc *rxd; 1337 1338 for (ring_idx = 0; ring_idx < 2; ring_idx++) { 1339 for (i = 0; i < rq->rx_ring[ring_idx].size; i++) { 1340 #ifdef __BIG_ENDIAN_BITFIELD 1341 struct Vmxnet3_RxDesc rxDesc; 1342 #endif 1343 vmxnet3_getRxDesc(rxd, 1344 &rq->rx_ring[ring_idx].base[i].rxd, &rxDesc); 1345 1346 if (rxd->btype == VMXNET3_RXD_BTYPE_HEAD && 1347 rq->buf_info[ring_idx][i].skb) { 1348 pci_unmap_single(adapter->pdev, rxd->addr, 1349 rxd->len, PCI_DMA_FROMDEVICE); 1350 dev_kfree_skb(rq->buf_info[ring_idx][i].skb); 1351 rq->buf_info[ring_idx][i].skb = NULL; 1352 } else if (rxd->btype == VMXNET3_RXD_BTYPE_BODY && 1353 rq->buf_info[ring_idx][i].page) { 1354 pci_unmap_page(adapter->pdev, rxd->addr, 1355 rxd->len, PCI_DMA_FROMDEVICE); 1356 put_page(rq->buf_info[ring_idx][i].page); 1357 rq->buf_info[ring_idx][i].page = NULL; 1358 } 1359 } 1360 1361 rq->rx_ring[ring_idx].gen = VMXNET3_INIT_GEN; 1362 rq->rx_ring[ring_idx].next2fill = 1363 rq->rx_ring[ring_idx].next2comp = 0; 1364 rq->uncommitted[ring_idx] = 0; 1365 } 1366 1367 rq->comp_ring.gen = VMXNET3_INIT_GEN; 1368 rq->comp_ring.next2proc = 0; 1369 } 1370 1371 1372 static void 1373 vmxnet3_rq_cleanup_all(struct vmxnet3_adapter *adapter) 1374 { 1375 int i; 1376 1377 for (i = 0; i < adapter->num_rx_queues; i++) 1378 vmxnet3_rq_cleanup(&adapter->rx_queue[i], adapter); 1379 } 1380 1381 1382 void vmxnet3_rq_destroy(struct vmxnet3_rx_queue *rq, 1383 struct vmxnet3_adapter *adapter) 1384 { 1385 int i; 1386 int j; 1387 1388 /* all rx buffers must have already been freed */ 1389 for (i = 0; i < 2; i++) { 1390 if (rq->buf_info[i]) { 1391 for (j = 0; j < rq->rx_ring[i].size; j++) 1392 BUG_ON(rq->buf_info[i][j].page != NULL); 1393 } 1394 } 1395 1396 1397 kfree(rq->buf_info[0]); 1398 1399 for (i = 0; i < 2; i++) { 1400 if (rq->rx_ring[i].base) { 1401 pci_free_consistent(adapter->pdev, rq->rx_ring[i].size 1402 * sizeof(struct Vmxnet3_RxDesc), 1403 rq->rx_ring[i].base, 1404 rq->rx_ring[i].basePA); 1405 rq->rx_ring[i].base = NULL; 1406 } 1407 rq->buf_info[i] = NULL; 1408 } 1409 1410 if (rq->comp_ring.base) { 1411 pci_free_consistent(adapter->pdev, rq->comp_ring.size * 1412 sizeof(struct Vmxnet3_RxCompDesc), 1413 rq->comp_ring.base, rq->comp_ring.basePA); 1414 rq->comp_ring.base = NULL; 1415 } 1416 } 1417 1418 1419 static int 1420 vmxnet3_rq_init(struct vmxnet3_rx_queue *rq, 1421 struct vmxnet3_adapter *adapter) 1422 { 1423 int i; 1424 1425 /* initialize buf_info */ 1426 for (i = 0; i < rq->rx_ring[0].size; i++) { 1427 1428 /* 1st buf for a pkt is skbuff */ 1429 if (i % adapter->rx_buf_per_pkt == 0) { 1430 rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_SKB; 1431 rq->buf_info[0][i].len = adapter->skb_buf_size; 1432 } else { /* subsequent bufs for a pkt is frag */ 1433 rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_PAGE; 1434 rq->buf_info[0][i].len = PAGE_SIZE; 1435 } 1436 } 1437 for (i = 0; i < rq->rx_ring[1].size; i++) { 1438 rq->buf_info[1][i].buf_type = VMXNET3_RX_BUF_PAGE; 1439 rq->buf_info[1][i].len = PAGE_SIZE; 1440 } 1441 1442 /* reset internal state and allocate buffers for both rings */ 1443 for (i = 0; i < 2; i++) { 1444 rq->rx_ring[i].next2fill = rq->rx_ring[i].next2comp = 0; 1445 rq->uncommitted[i] = 0; 1446 1447 memset(rq->rx_ring[i].base, 0, rq->rx_ring[i].size * 1448 sizeof(struct Vmxnet3_RxDesc)); 1449 rq->rx_ring[i].gen = VMXNET3_INIT_GEN; 1450 } 1451 if (vmxnet3_rq_alloc_rx_buf(rq, 0, rq->rx_ring[0].size - 1, 1452 adapter) == 0) { 1453 /* at least has 1 rx buffer for the 1st ring */ 1454 return -ENOMEM; 1455 } 1456 vmxnet3_rq_alloc_rx_buf(rq, 1, rq->rx_ring[1].size - 1, adapter); 1457 1458 /* reset the comp ring */ 1459 rq->comp_ring.next2proc = 0; 1460 memset(rq->comp_ring.base, 0, rq->comp_ring.size * 1461 sizeof(struct Vmxnet3_RxCompDesc)); 1462 rq->comp_ring.gen = VMXNET3_INIT_GEN; 1463 1464 /* reset rxctx */ 1465 rq->rx_ctx.skb = NULL; 1466 1467 /* stats are not reset */ 1468 return 0; 1469 } 1470 1471 1472 static int 1473 vmxnet3_rq_init_all(struct vmxnet3_adapter *adapter) 1474 { 1475 int i, err = 0; 1476 1477 for (i = 0; i < adapter->num_rx_queues; i++) { 1478 err = vmxnet3_rq_init(&adapter->rx_queue[i], adapter); 1479 if (unlikely(err)) { 1480 dev_err(&adapter->netdev->dev, "%s: failed to " 1481 "initialize rx queue%i\n", 1482 adapter->netdev->name, i); 1483 break; 1484 } 1485 } 1486 return err; 1487 1488 } 1489 1490 1491 static int 1492 vmxnet3_rq_create(struct vmxnet3_rx_queue *rq, struct vmxnet3_adapter *adapter) 1493 { 1494 int i; 1495 size_t sz; 1496 struct vmxnet3_rx_buf_info *bi; 1497 1498 for (i = 0; i < 2; i++) { 1499 1500 sz = rq->rx_ring[i].size * sizeof(struct Vmxnet3_RxDesc); 1501 rq->rx_ring[i].base = pci_alloc_consistent(adapter->pdev, sz, 1502 &rq->rx_ring[i].basePA); 1503 if (!rq->rx_ring[i].base) { 1504 printk(KERN_ERR "%s: failed to allocate rx ring %d\n", 1505 adapter->netdev->name, i); 1506 goto err; 1507 } 1508 } 1509 1510 sz = rq->comp_ring.size * sizeof(struct Vmxnet3_RxCompDesc); 1511 rq->comp_ring.base = pci_alloc_consistent(adapter->pdev, sz, 1512 &rq->comp_ring.basePA); 1513 if (!rq->comp_ring.base) { 1514 printk(KERN_ERR "%s: failed to allocate rx comp ring\n", 1515 adapter->netdev->name); 1516 goto err; 1517 } 1518 1519 sz = sizeof(struct vmxnet3_rx_buf_info) * (rq->rx_ring[0].size + 1520 rq->rx_ring[1].size); 1521 bi = kzalloc(sz, GFP_KERNEL); 1522 if (!bi) { 1523 printk(KERN_ERR "%s: failed to allocate rx bufinfo\n", 1524 adapter->netdev->name); 1525 goto err; 1526 } 1527 rq->buf_info[0] = bi; 1528 rq->buf_info[1] = bi + rq->rx_ring[0].size; 1529 1530 return 0; 1531 1532 err: 1533 vmxnet3_rq_destroy(rq, adapter); 1534 return -ENOMEM; 1535 } 1536 1537 1538 static int 1539 vmxnet3_rq_create_all(struct vmxnet3_adapter *adapter) 1540 { 1541 int i, err = 0; 1542 1543 for (i = 0; i < adapter->num_rx_queues; i++) { 1544 err = vmxnet3_rq_create(&adapter->rx_queue[i], adapter); 1545 if (unlikely(err)) { 1546 dev_err(&adapter->netdev->dev, 1547 "%s: failed to create rx queue%i\n", 1548 adapter->netdev->name, i); 1549 goto err_out; 1550 } 1551 } 1552 return err; 1553 err_out: 1554 vmxnet3_rq_destroy_all(adapter); 1555 return err; 1556 1557 } 1558 1559 /* Multiple queue aware polling function for tx and rx */ 1560 1561 static int 1562 vmxnet3_do_poll(struct vmxnet3_adapter *adapter, int budget) 1563 { 1564 int rcd_done = 0, i; 1565 if (unlikely(adapter->shared->ecr)) 1566 vmxnet3_process_events(adapter); 1567 for (i = 0; i < adapter->num_tx_queues; i++) 1568 vmxnet3_tq_tx_complete(&adapter->tx_queue[i], adapter); 1569 1570 for (i = 0; i < adapter->num_rx_queues; i++) 1571 rcd_done += vmxnet3_rq_rx_complete(&adapter->rx_queue[i], 1572 adapter, budget); 1573 return rcd_done; 1574 } 1575 1576 1577 static int 1578 vmxnet3_poll(struct napi_struct *napi, int budget) 1579 { 1580 struct vmxnet3_rx_queue *rx_queue = container_of(napi, 1581 struct vmxnet3_rx_queue, napi); 1582 int rxd_done; 1583 1584 rxd_done = vmxnet3_do_poll(rx_queue->adapter, budget); 1585 1586 if (rxd_done < budget) { 1587 napi_complete(napi); 1588 vmxnet3_enable_all_intrs(rx_queue->adapter); 1589 } 1590 return rxd_done; 1591 } 1592 1593 /* 1594 * NAPI polling function for MSI-X mode with multiple Rx queues 1595 * Returns the # of the NAPI credit consumed (# of rx descriptors processed) 1596 */ 1597 1598 static int 1599 vmxnet3_poll_rx_only(struct napi_struct *napi, int budget) 1600 { 1601 struct vmxnet3_rx_queue *rq = container_of(napi, 1602 struct vmxnet3_rx_queue, napi); 1603 struct vmxnet3_adapter *adapter = rq->adapter; 1604 int rxd_done; 1605 1606 /* When sharing interrupt with corresponding tx queue, process 1607 * tx completions in that queue as well 1608 */ 1609 if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE) { 1610 struct vmxnet3_tx_queue *tq = 1611 &adapter->tx_queue[rq - adapter->rx_queue]; 1612 vmxnet3_tq_tx_complete(tq, adapter); 1613 } 1614 1615 rxd_done = vmxnet3_rq_rx_complete(rq, adapter, budget); 1616 1617 if (rxd_done < budget) { 1618 napi_complete(napi); 1619 vmxnet3_enable_intr(adapter, rq->comp_ring.intr_idx); 1620 } 1621 return rxd_done; 1622 } 1623 1624 1625 #ifdef CONFIG_PCI_MSI 1626 1627 /* 1628 * Handle completion interrupts on tx queues 1629 * Returns whether or not the intr is handled 1630 */ 1631 1632 static irqreturn_t 1633 vmxnet3_msix_tx(int irq, void *data) 1634 { 1635 struct vmxnet3_tx_queue *tq = data; 1636 struct vmxnet3_adapter *adapter = tq->adapter; 1637 1638 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 1639 vmxnet3_disable_intr(adapter, tq->comp_ring.intr_idx); 1640 1641 /* Handle the case where only one irq is allocate for all tx queues */ 1642 if (adapter->share_intr == VMXNET3_INTR_TXSHARE) { 1643 int i; 1644 for (i = 0; i < adapter->num_tx_queues; i++) { 1645 struct vmxnet3_tx_queue *txq = &adapter->tx_queue[i]; 1646 vmxnet3_tq_tx_complete(txq, adapter); 1647 } 1648 } else { 1649 vmxnet3_tq_tx_complete(tq, adapter); 1650 } 1651 vmxnet3_enable_intr(adapter, tq->comp_ring.intr_idx); 1652 1653 return IRQ_HANDLED; 1654 } 1655 1656 1657 /* 1658 * Handle completion interrupts on rx queues. Returns whether or not the 1659 * intr is handled 1660 */ 1661 1662 static irqreturn_t 1663 vmxnet3_msix_rx(int irq, void *data) 1664 { 1665 struct vmxnet3_rx_queue *rq = data; 1666 struct vmxnet3_adapter *adapter = rq->adapter; 1667 1668 /* disable intr if needed */ 1669 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 1670 vmxnet3_disable_intr(adapter, rq->comp_ring.intr_idx); 1671 napi_schedule(&rq->napi); 1672 1673 return IRQ_HANDLED; 1674 } 1675 1676 /* 1677 *---------------------------------------------------------------------------- 1678 * 1679 * vmxnet3_msix_event -- 1680 * 1681 * vmxnet3 msix event intr handler 1682 * 1683 * Result: 1684 * whether or not the intr is handled 1685 * 1686 *---------------------------------------------------------------------------- 1687 */ 1688 1689 static irqreturn_t 1690 vmxnet3_msix_event(int irq, void *data) 1691 { 1692 struct net_device *dev = data; 1693 struct vmxnet3_adapter *adapter = netdev_priv(dev); 1694 1695 /* disable intr if needed */ 1696 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 1697 vmxnet3_disable_intr(adapter, adapter->intr.event_intr_idx); 1698 1699 if (adapter->shared->ecr) 1700 vmxnet3_process_events(adapter); 1701 1702 vmxnet3_enable_intr(adapter, adapter->intr.event_intr_idx); 1703 1704 return IRQ_HANDLED; 1705 } 1706 1707 #endif /* CONFIG_PCI_MSI */ 1708 1709 1710 /* Interrupt handler for vmxnet3 */ 1711 static irqreturn_t 1712 vmxnet3_intr(int irq, void *dev_id) 1713 { 1714 struct net_device *dev = dev_id; 1715 struct vmxnet3_adapter *adapter = netdev_priv(dev); 1716 1717 if (adapter->intr.type == VMXNET3_IT_INTX) { 1718 u32 icr = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_ICR); 1719 if (unlikely(icr == 0)) 1720 /* not ours */ 1721 return IRQ_NONE; 1722 } 1723 1724 1725 /* disable intr if needed */ 1726 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 1727 vmxnet3_disable_all_intrs(adapter); 1728 1729 napi_schedule(&adapter->rx_queue[0].napi); 1730 1731 return IRQ_HANDLED; 1732 } 1733 1734 #ifdef CONFIG_NET_POLL_CONTROLLER 1735 1736 /* netpoll callback. */ 1737 static void 1738 vmxnet3_netpoll(struct net_device *netdev) 1739 { 1740 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1741 1742 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 1743 vmxnet3_disable_all_intrs(adapter); 1744 1745 vmxnet3_do_poll(adapter, adapter->rx_queue[0].rx_ring[0].size); 1746 vmxnet3_enable_all_intrs(adapter); 1747 1748 } 1749 #endif /* CONFIG_NET_POLL_CONTROLLER */ 1750 1751 static int 1752 vmxnet3_request_irqs(struct vmxnet3_adapter *adapter) 1753 { 1754 struct vmxnet3_intr *intr = &adapter->intr; 1755 int err = 0, i; 1756 int vector = 0; 1757 1758 #ifdef CONFIG_PCI_MSI 1759 if (adapter->intr.type == VMXNET3_IT_MSIX) { 1760 for (i = 0; i < adapter->num_tx_queues; i++) { 1761 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) { 1762 sprintf(adapter->tx_queue[i].name, "%s-tx-%d", 1763 adapter->netdev->name, vector); 1764 err = request_irq( 1765 intr->msix_entries[vector].vector, 1766 vmxnet3_msix_tx, 0, 1767 adapter->tx_queue[i].name, 1768 &adapter->tx_queue[i]); 1769 } else { 1770 sprintf(adapter->tx_queue[i].name, "%s-rxtx-%d", 1771 adapter->netdev->name, vector); 1772 } 1773 if (err) { 1774 dev_err(&adapter->netdev->dev, 1775 "Failed to request irq for MSIX, %s, " 1776 "error %d\n", 1777 adapter->tx_queue[i].name, err); 1778 return err; 1779 } 1780 1781 /* Handle the case where only 1 MSIx was allocated for 1782 * all tx queues */ 1783 if (adapter->share_intr == VMXNET3_INTR_TXSHARE) { 1784 for (; i < adapter->num_tx_queues; i++) 1785 adapter->tx_queue[i].comp_ring.intr_idx 1786 = vector; 1787 vector++; 1788 break; 1789 } else { 1790 adapter->tx_queue[i].comp_ring.intr_idx 1791 = vector++; 1792 } 1793 } 1794 if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE) 1795 vector = 0; 1796 1797 for (i = 0; i < adapter->num_rx_queues; i++) { 1798 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) 1799 sprintf(adapter->rx_queue[i].name, "%s-rx-%d", 1800 adapter->netdev->name, vector); 1801 else 1802 sprintf(adapter->rx_queue[i].name, "%s-rxtx-%d", 1803 adapter->netdev->name, vector); 1804 err = request_irq(intr->msix_entries[vector].vector, 1805 vmxnet3_msix_rx, 0, 1806 adapter->rx_queue[i].name, 1807 &(adapter->rx_queue[i])); 1808 if (err) { 1809 printk(KERN_ERR "Failed to request irq for MSIX" 1810 ", %s, error %d\n", 1811 adapter->rx_queue[i].name, err); 1812 return err; 1813 } 1814 1815 adapter->rx_queue[i].comp_ring.intr_idx = vector++; 1816 } 1817 1818 sprintf(intr->event_msi_vector_name, "%s-event-%d", 1819 adapter->netdev->name, vector); 1820 err = request_irq(intr->msix_entries[vector].vector, 1821 vmxnet3_msix_event, 0, 1822 intr->event_msi_vector_name, adapter->netdev); 1823 intr->event_intr_idx = vector; 1824 1825 } else if (intr->type == VMXNET3_IT_MSI) { 1826 adapter->num_rx_queues = 1; 1827 err = request_irq(adapter->pdev->irq, vmxnet3_intr, 0, 1828 adapter->netdev->name, adapter->netdev); 1829 } else { 1830 #endif 1831 adapter->num_rx_queues = 1; 1832 err = request_irq(adapter->pdev->irq, vmxnet3_intr, 1833 IRQF_SHARED, adapter->netdev->name, 1834 adapter->netdev); 1835 #ifdef CONFIG_PCI_MSI 1836 } 1837 #endif 1838 intr->num_intrs = vector + 1; 1839 if (err) { 1840 printk(KERN_ERR "Failed to request irq %s (intr type:%d), error" 1841 ":%d\n", adapter->netdev->name, intr->type, err); 1842 } else { 1843 /* Number of rx queues will not change after this */ 1844 for (i = 0; i < adapter->num_rx_queues; i++) { 1845 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i]; 1846 rq->qid = i; 1847 rq->qid2 = i + adapter->num_rx_queues; 1848 } 1849 1850 1851 1852 /* init our intr settings */ 1853 for (i = 0; i < intr->num_intrs; i++) 1854 intr->mod_levels[i] = UPT1_IML_ADAPTIVE; 1855 if (adapter->intr.type != VMXNET3_IT_MSIX) { 1856 adapter->intr.event_intr_idx = 0; 1857 for (i = 0; i < adapter->num_tx_queues; i++) 1858 adapter->tx_queue[i].comp_ring.intr_idx = 0; 1859 adapter->rx_queue[0].comp_ring.intr_idx = 0; 1860 } 1861 1862 printk(KERN_INFO "%s: intr type %u, mode %u, %u vectors " 1863 "allocated\n", adapter->netdev->name, intr->type, 1864 intr->mask_mode, intr->num_intrs); 1865 } 1866 1867 return err; 1868 } 1869 1870 1871 static void 1872 vmxnet3_free_irqs(struct vmxnet3_adapter *adapter) 1873 { 1874 struct vmxnet3_intr *intr = &adapter->intr; 1875 BUG_ON(intr->type == VMXNET3_IT_AUTO || intr->num_intrs <= 0); 1876 1877 switch (intr->type) { 1878 #ifdef CONFIG_PCI_MSI 1879 case VMXNET3_IT_MSIX: 1880 { 1881 int i, vector = 0; 1882 1883 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) { 1884 for (i = 0; i < adapter->num_tx_queues; i++) { 1885 free_irq(intr->msix_entries[vector++].vector, 1886 &(adapter->tx_queue[i])); 1887 if (adapter->share_intr == VMXNET3_INTR_TXSHARE) 1888 break; 1889 } 1890 } 1891 1892 for (i = 0; i < adapter->num_rx_queues; i++) { 1893 free_irq(intr->msix_entries[vector++].vector, 1894 &(adapter->rx_queue[i])); 1895 } 1896 1897 free_irq(intr->msix_entries[vector].vector, 1898 adapter->netdev); 1899 BUG_ON(vector >= intr->num_intrs); 1900 break; 1901 } 1902 #endif 1903 case VMXNET3_IT_MSI: 1904 free_irq(adapter->pdev->irq, adapter->netdev); 1905 break; 1906 case VMXNET3_IT_INTX: 1907 free_irq(adapter->pdev->irq, adapter->netdev); 1908 break; 1909 default: 1910 BUG_ON(true); 1911 } 1912 } 1913 1914 static void 1915 vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) 1916 { 1917 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1918 struct Vmxnet3_DriverShared *shared = adapter->shared; 1919 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1920 unsigned long flags; 1921 1922 if (grp) { 1923 /* add vlan rx stripping. */ 1924 if (adapter->netdev->features & NETIF_F_HW_VLAN_RX) { 1925 int i; 1926 adapter->vlan_grp = grp; 1927 1928 /* 1929 * Clear entire vfTable; then enable untagged pkts. 1930 * Note: setting one entry in vfTable to non-zero turns 1931 * on VLAN rx filtering. 1932 */ 1933 for (i = 0; i < VMXNET3_VFT_SIZE; i++) 1934 vfTable[i] = 0; 1935 1936 VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0); 1937 spin_lock_irqsave(&adapter->cmd_lock, flags); 1938 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1939 VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1940 spin_unlock_irqrestore(&adapter->cmd_lock, flags); 1941 } else { 1942 printk(KERN_ERR "%s: vlan_rx_register when device has " 1943 "no NETIF_F_HW_VLAN_RX\n", netdev->name); 1944 } 1945 } else { 1946 /* remove vlan rx stripping. */ 1947 struct Vmxnet3_DSDevRead *devRead = &shared->devRead; 1948 adapter->vlan_grp = NULL; 1949 1950 if (devRead->misc.uptFeatures & UPT1_F_RXVLAN) { 1951 int i; 1952 1953 for (i = 0; i < VMXNET3_VFT_SIZE; i++) { 1954 /* clear entire vfTable; this also disables 1955 * VLAN rx filtering 1956 */ 1957 vfTable[i] = 0; 1958 } 1959 spin_lock_irqsave(&adapter->cmd_lock, flags); 1960 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1961 VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1962 spin_unlock_irqrestore(&adapter->cmd_lock, flags); 1963 } 1964 } 1965 } 1966 1967 1968 static void 1969 vmxnet3_restore_vlan(struct vmxnet3_adapter *adapter) 1970 { 1971 if (adapter->vlan_grp) { 1972 u16 vid; 1973 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1974 bool activeVlan = false; 1975 1976 for (vid = 0; vid < VLAN_N_VID; vid++) { 1977 if (vlan_group_get_device(adapter->vlan_grp, vid)) { 1978 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid); 1979 activeVlan = true; 1980 } 1981 } 1982 if (activeVlan) { 1983 /* continue to allow untagged pkts */ 1984 VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0); 1985 } 1986 } 1987 } 1988 1989 1990 static void 1991 vmxnet3_vlan_rx_add_vid(struct net_device *netdev, u16 vid) 1992 { 1993 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1994 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1995 unsigned long flags; 1996 1997 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid); 1998 spin_lock_irqsave(&adapter->cmd_lock, flags); 1999 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2000 VMXNET3_CMD_UPDATE_VLAN_FILTERS); 2001 spin_unlock_irqrestore(&adapter->cmd_lock, flags); 2002 } 2003 2004 2005 static void 2006 vmxnet3_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) 2007 { 2008 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2009 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 2010 unsigned long flags; 2011 2012 VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid); 2013 spin_lock_irqsave(&adapter->cmd_lock, flags); 2014 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2015 VMXNET3_CMD_UPDATE_VLAN_FILTERS); 2016 spin_unlock_irqrestore(&adapter->cmd_lock, flags); 2017 } 2018 2019 2020 static u8 * 2021 vmxnet3_copy_mc(struct net_device *netdev) 2022 { 2023 u8 *buf = NULL; 2024 u32 sz = netdev_mc_count(netdev) * ETH_ALEN; 2025 2026 /* struct Vmxnet3_RxFilterConf.mfTableLen is u16. */ 2027 if (sz <= 0xffff) { 2028 /* We may be called with BH disabled */ 2029 buf = kmalloc(sz, GFP_ATOMIC); 2030 if (buf) { 2031 struct netdev_hw_addr *ha; 2032 int i = 0; 2033 2034 netdev_for_each_mc_addr(ha, netdev) 2035 memcpy(buf + i++ * ETH_ALEN, ha->addr, 2036 ETH_ALEN); 2037 } 2038 } 2039 return buf; 2040 } 2041 2042 2043 static void 2044 vmxnet3_set_mc(struct net_device *netdev) 2045 { 2046 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2047 unsigned long flags; 2048 struct Vmxnet3_RxFilterConf *rxConf = 2049 &adapter->shared->devRead.rxFilterConf; 2050 u8 *new_table = NULL; 2051 u32 new_mode = VMXNET3_RXM_UCAST; 2052 2053 if (netdev->flags & IFF_PROMISC) 2054 new_mode |= VMXNET3_RXM_PROMISC; 2055 2056 if (netdev->flags & IFF_BROADCAST) 2057 new_mode |= VMXNET3_RXM_BCAST; 2058 2059 if (netdev->flags & IFF_ALLMULTI) 2060 new_mode |= VMXNET3_RXM_ALL_MULTI; 2061 else 2062 if (!netdev_mc_empty(netdev)) { 2063 new_table = vmxnet3_copy_mc(netdev); 2064 if (new_table) { 2065 new_mode |= VMXNET3_RXM_MCAST; 2066 rxConf->mfTableLen = cpu_to_le16( 2067 netdev_mc_count(netdev) * ETH_ALEN); 2068 rxConf->mfTablePA = cpu_to_le64(virt_to_phys( 2069 new_table)); 2070 } else { 2071 printk(KERN_INFO "%s: failed to copy mcast list" 2072 ", setting ALL_MULTI\n", netdev->name); 2073 new_mode |= VMXNET3_RXM_ALL_MULTI; 2074 } 2075 } 2076 2077 2078 if (!(new_mode & VMXNET3_RXM_MCAST)) { 2079 rxConf->mfTableLen = 0; 2080 rxConf->mfTablePA = 0; 2081 } 2082 2083 spin_lock_irqsave(&adapter->cmd_lock, flags); 2084 if (new_mode != rxConf->rxMode) { 2085 rxConf->rxMode = cpu_to_le32(new_mode); 2086 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2087 VMXNET3_CMD_UPDATE_RX_MODE); 2088 } 2089 2090 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2091 VMXNET3_CMD_UPDATE_MAC_FILTERS); 2092 spin_unlock_irqrestore(&adapter->cmd_lock, flags); 2093 2094 kfree(new_table); 2095 } 2096 2097 void 2098 vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter) 2099 { 2100 int i; 2101 2102 for (i = 0; i < adapter->num_rx_queues; i++) 2103 vmxnet3_rq_destroy(&adapter->rx_queue[i], adapter); 2104 } 2105 2106 2107 /* 2108 * Set up driver_shared based on settings in adapter. 2109 */ 2110 2111 static void 2112 vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter) 2113 { 2114 struct Vmxnet3_DriverShared *shared = adapter->shared; 2115 struct Vmxnet3_DSDevRead *devRead = &shared->devRead; 2116 struct Vmxnet3_TxQueueConf *tqc; 2117 struct Vmxnet3_RxQueueConf *rqc; 2118 int i; 2119 2120 memset(shared, 0, sizeof(*shared)); 2121 2122 /* driver settings */ 2123 shared->magic = cpu_to_le32(VMXNET3_REV1_MAGIC); 2124 devRead->misc.driverInfo.version = cpu_to_le32( 2125 VMXNET3_DRIVER_VERSION_NUM); 2126 devRead->misc.driverInfo.gos.gosBits = (sizeof(void *) == 4 ? 2127 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64); 2128 devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX; 2129 *((u32 *)&devRead->misc.driverInfo.gos) = cpu_to_le32( 2130 *((u32 *)&devRead->misc.driverInfo.gos)); 2131 devRead->misc.driverInfo.vmxnet3RevSpt = cpu_to_le32(1); 2132 devRead->misc.driverInfo.uptVerSpt = cpu_to_le32(1); 2133 2134 devRead->misc.ddPA = cpu_to_le64(virt_to_phys(adapter)); 2135 devRead->misc.ddLen = cpu_to_le32(sizeof(struct vmxnet3_adapter)); 2136 2137 /* set up feature flags */ 2138 if (adapter->netdev->features & NETIF_F_RXCSUM) 2139 devRead->misc.uptFeatures |= UPT1_F_RXCSUM; 2140 2141 if (adapter->netdev->features & NETIF_F_LRO) { 2142 devRead->misc.uptFeatures |= UPT1_F_LRO; 2143 devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS); 2144 } 2145 if (adapter->netdev->features & NETIF_F_HW_VLAN_RX) 2146 devRead->misc.uptFeatures |= UPT1_F_RXVLAN; 2147 2148 devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu); 2149 devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa); 2150 devRead->misc.queueDescLen = cpu_to_le32( 2151 adapter->num_tx_queues * sizeof(struct Vmxnet3_TxQueueDesc) + 2152 adapter->num_rx_queues * sizeof(struct Vmxnet3_RxQueueDesc)); 2153 2154 /* tx queue settings */ 2155 devRead->misc.numTxQueues = adapter->num_tx_queues; 2156 for (i = 0; i < adapter->num_tx_queues; i++) { 2157 struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i]; 2158 BUG_ON(adapter->tx_queue[i].tx_ring.base == NULL); 2159 tqc = &adapter->tqd_start[i].conf; 2160 tqc->txRingBasePA = cpu_to_le64(tq->tx_ring.basePA); 2161 tqc->dataRingBasePA = cpu_to_le64(tq->data_ring.basePA); 2162 tqc->compRingBasePA = cpu_to_le64(tq->comp_ring.basePA); 2163 tqc->ddPA = cpu_to_le64(virt_to_phys(tq->buf_info)); 2164 tqc->txRingSize = cpu_to_le32(tq->tx_ring.size); 2165 tqc->dataRingSize = cpu_to_le32(tq->data_ring.size); 2166 tqc->compRingSize = cpu_to_le32(tq->comp_ring.size); 2167 tqc->ddLen = cpu_to_le32( 2168 sizeof(struct vmxnet3_tx_buf_info) * 2169 tqc->txRingSize); 2170 tqc->intrIdx = tq->comp_ring.intr_idx; 2171 } 2172 2173 /* rx queue settings */ 2174 devRead->misc.numRxQueues = adapter->num_rx_queues; 2175 for (i = 0; i < adapter->num_rx_queues; i++) { 2176 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i]; 2177 rqc = &adapter->rqd_start[i].conf; 2178 rqc->rxRingBasePA[0] = cpu_to_le64(rq->rx_ring[0].basePA); 2179 rqc->rxRingBasePA[1] = cpu_to_le64(rq->rx_ring[1].basePA); 2180 rqc->compRingBasePA = cpu_to_le64(rq->comp_ring.basePA); 2181 rqc->ddPA = cpu_to_le64(virt_to_phys( 2182 rq->buf_info)); 2183 rqc->rxRingSize[0] = cpu_to_le32(rq->rx_ring[0].size); 2184 rqc->rxRingSize[1] = cpu_to_le32(rq->rx_ring[1].size); 2185 rqc->compRingSize = cpu_to_le32(rq->comp_ring.size); 2186 rqc->ddLen = cpu_to_le32( 2187 sizeof(struct vmxnet3_rx_buf_info) * 2188 (rqc->rxRingSize[0] + 2189 rqc->rxRingSize[1])); 2190 rqc->intrIdx = rq->comp_ring.intr_idx; 2191 } 2192 2193 #ifdef VMXNET3_RSS 2194 memset(adapter->rss_conf, 0, sizeof(*adapter->rss_conf)); 2195 2196 if (adapter->rss) { 2197 struct UPT1_RSSConf *rssConf = adapter->rss_conf; 2198 devRead->misc.uptFeatures |= UPT1_F_RSS; 2199 devRead->misc.numRxQueues = adapter->num_rx_queues; 2200 rssConf->hashType = UPT1_RSS_HASH_TYPE_TCP_IPV4 | 2201 UPT1_RSS_HASH_TYPE_IPV4 | 2202 UPT1_RSS_HASH_TYPE_TCP_IPV6 | 2203 UPT1_RSS_HASH_TYPE_IPV6; 2204 rssConf->hashFunc = UPT1_RSS_HASH_FUNC_TOEPLITZ; 2205 rssConf->hashKeySize = UPT1_RSS_MAX_KEY_SIZE; 2206 rssConf->indTableSize = VMXNET3_RSS_IND_TABLE_SIZE; 2207 get_random_bytes(&rssConf->hashKey[0], rssConf->hashKeySize); 2208 for (i = 0; i < rssConf->indTableSize; i++) 2209 rssConf->indTable[i] = i % adapter->num_rx_queues; 2210 2211 devRead->rssConfDesc.confVer = 1; 2212 devRead->rssConfDesc.confLen = sizeof(*rssConf); 2213 devRead->rssConfDesc.confPA = virt_to_phys(rssConf); 2214 } 2215 2216 #endif /* VMXNET3_RSS */ 2217 2218 /* intr settings */ 2219 devRead->intrConf.autoMask = adapter->intr.mask_mode == 2220 VMXNET3_IMM_AUTO; 2221 devRead->intrConf.numIntrs = adapter->intr.num_intrs; 2222 for (i = 0; i < adapter->intr.num_intrs; i++) 2223 devRead->intrConf.modLevels[i] = adapter->intr.mod_levels[i]; 2224 2225 devRead->intrConf.eventIntrIdx = adapter->intr.event_intr_idx; 2226 devRead->intrConf.intrCtrl |= cpu_to_le32(VMXNET3_IC_DISABLE_ALL); 2227 2228 /* rx filter settings */ 2229 devRead->rxFilterConf.rxMode = 0; 2230 vmxnet3_restore_vlan(adapter); 2231 vmxnet3_write_mac_addr(adapter, adapter->netdev->dev_addr); 2232 2233 /* the rest are already zeroed */ 2234 } 2235 2236 2237 int 2238 vmxnet3_activate_dev(struct vmxnet3_adapter *adapter) 2239 { 2240 int err, i; 2241 u32 ret; 2242 unsigned long flags; 2243 2244 dev_dbg(&adapter->netdev->dev, "%s: skb_buf_size %d, rx_buf_per_pkt %d," 2245 " ring sizes %u %u %u\n", adapter->netdev->name, 2246 adapter->skb_buf_size, adapter->rx_buf_per_pkt, 2247 adapter->tx_queue[0].tx_ring.size, 2248 adapter->rx_queue[0].rx_ring[0].size, 2249 adapter->rx_queue[0].rx_ring[1].size); 2250 2251 vmxnet3_tq_init_all(adapter); 2252 err = vmxnet3_rq_init_all(adapter); 2253 if (err) { 2254 printk(KERN_ERR "Failed to init rx queue for %s: error %d\n", 2255 adapter->netdev->name, err); 2256 goto rq_err; 2257 } 2258 2259 err = vmxnet3_request_irqs(adapter); 2260 if (err) { 2261 printk(KERN_ERR "Failed to setup irq for %s: error %d\n", 2262 adapter->netdev->name, err); 2263 goto irq_err; 2264 } 2265 2266 vmxnet3_setup_driver_shared(adapter); 2267 2268 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, VMXNET3_GET_ADDR_LO( 2269 adapter->shared_pa)); 2270 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI( 2271 adapter->shared_pa)); 2272 spin_lock_irqsave(&adapter->cmd_lock, flags); 2273 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2274 VMXNET3_CMD_ACTIVATE_DEV); 2275 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 2276 spin_unlock_irqrestore(&adapter->cmd_lock, flags); 2277 2278 if (ret != 0) { 2279 printk(KERN_ERR "Failed to activate dev %s: error %u\n", 2280 adapter->netdev->name, ret); 2281 err = -EINVAL; 2282 goto activate_err; 2283 } 2284 2285 for (i = 0; i < adapter->num_rx_queues; i++) { 2286 VMXNET3_WRITE_BAR0_REG(adapter, 2287 VMXNET3_REG_RXPROD + i * VMXNET3_REG_ALIGN, 2288 adapter->rx_queue[i].rx_ring[0].next2fill); 2289 VMXNET3_WRITE_BAR0_REG(adapter, (VMXNET3_REG_RXPROD2 + 2290 (i * VMXNET3_REG_ALIGN)), 2291 adapter->rx_queue[i].rx_ring[1].next2fill); 2292 } 2293 2294 /* Apply the rx filter settins last. */ 2295 vmxnet3_set_mc(adapter->netdev); 2296 2297 /* 2298 * Check link state when first activating device. It will start the 2299 * tx queue if the link is up. 2300 */ 2301 vmxnet3_check_link(adapter, true); 2302 for (i = 0; i < adapter->num_rx_queues; i++) 2303 napi_enable(&adapter->rx_queue[i].napi); 2304 vmxnet3_enable_all_intrs(adapter); 2305 clear_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state); 2306 return 0; 2307 2308 activate_err: 2309 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, 0); 2310 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, 0); 2311 vmxnet3_free_irqs(adapter); 2312 irq_err: 2313 rq_err: 2314 /* free up buffers we allocated */ 2315 vmxnet3_rq_cleanup_all(adapter); 2316 return err; 2317 } 2318 2319 2320 void 2321 vmxnet3_reset_dev(struct vmxnet3_adapter *adapter) 2322 { 2323 unsigned long flags; 2324 spin_lock_irqsave(&adapter->cmd_lock, flags); 2325 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV); 2326 spin_unlock_irqrestore(&adapter->cmd_lock, flags); 2327 } 2328 2329 2330 int 2331 vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter) 2332 { 2333 int i; 2334 unsigned long flags; 2335 if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state)) 2336 return 0; 2337 2338 2339 spin_lock_irqsave(&adapter->cmd_lock, flags); 2340 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2341 VMXNET3_CMD_QUIESCE_DEV); 2342 spin_unlock_irqrestore(&adapter->cmd_lock, flags); 2343 vmxnet3_disable_all_intrs(adapter); 2344 2345 for (i = 0; i < adapter->num_rx_queues; i++) 2346 napi_disable(&adapter->rx_queue[i].napi); 2347 netif_tx_disable(adapter->netdev); 2348 adapter->link_speed = 0; 2349 netif_carrier_off(adapter->netdev); 2350 2351 vmxnet3_tq_cleanup_all(adapter); 2352 vmxnet3_rq_cleanup_all(adapter); 2353 vmxnet3_free_irqs(adapter); 2354 return 0; 2355 } 2356 2357 2358 static void 2359 vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac) 2360 { 2361 u32 tmp; 2362 2363 tmp = *(u32 *)mac; 2364 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACL, tmp); 2365 2366 tmp = (mac[5] << 8) | mac[4]; 2367 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACH, tmp); 2368 } 2369 2370 2371 static int 2372 vmxnet3_set_mac_addr(struct net_device *netdev, void *p) 2373 { 2374 struct sockaddr *addr = p; 2375 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2376 2377 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 2378 vmxnet3_write_mac_addr(adapter, addr->sa_data); 2379 2380 return 0; 2381 } 2382 2383 2384 /* ==================== initialization and cleanup routines ============ */ 2385 2386 static int 2387 vmxnet3_alloc_pci_resources(struct vmxnet3_adapter *adapter, bool *dma64) 2388 { 2389 int err; 2390 unsigned long mmio_start, mmio_len; 2391 struct pci_dev *pdev = adapter->pdev; 2392 2393 err = pci_enable_device(pdev); 2394 if (err) { 2395 printk(KERN_ERR "Failed to enable adapter %s: error %d\n", 2396 pci_name(pdev), err); 2397 return err; 2398 } 2399 2400 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) { 2401 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) { 2402 printk(KERN_ERR "pci_set_consistent_dma_mask failed " 2403 "for adapter %s\n", pci_name(pdev)); 2404 err = -EIO; 2405 goto err_set_mask; 2406 } 2407 *dma64 = true; 2408 } else { 2409 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) { 2410 printk(KERN_ERR "pci_set_dma_mask failed for adapter " 2411 "%s\n", pci_name(pdev)); 2412 err = -EIO; 2413 goto err_set_mask; 2414 } 2415 *dma64 = false; 2416 } 2417 2418 err = pci_request_selected_regions(pdev, (1 << 2) - 1, 2419 vmxnet3_driver_name); 2420 if (err) { 2421 printk(KERN_ERR "Failed to request region for adapter %s: " 2422 "error %d\n", pci_name(pdev), err); 2423 goto err_set_mask; 2424 } 2425 2426 pci_set_master(pdev); 2427 2428 mmio_start = pci_resource_start(pdev, 0); 2429 mmio_len = pci_resource_len(pdev, 0); 2430 adapter->hw_addr0 = ioremap(mmio_start, mmio_len); 2431 if (!adapter->hw_addr0) { 2432 printk(KERN_ERR "Failed to map bar0 for adapter %s\n", 2433 pci_name(pdev)); 2434 err = -EIO; 2435 goto err_ioremap; 2436 } 2437 2438 mmio_start = pci_resource_start(pdev, 1); 2439 mmio_len = pci_resource_len(pdev, 1); 2440 adapter->hw_addr1 = ioremap(mmio_start, mmio_len); 2441 if (!adapter->hw_addr1) { 2442 printk(KERN_ERR "Failed to map bar1 for adapter %s\n", 2443 pci_name(pdev)); 2444 err = -EIO; 2445 goto err_bar1; 2446 } 2447 return 0; 2448 2449 err_bar1: 2450 iounmap(adapter->hw_addr0); 2451 err_ioremap: 2452 pci_release_selected_regions(pdev, (1 << 2) - 1); 2453 err_set_mask: 2454 pci_disable_device(pdev); 2455 return err; 2456 } 2457 2458 2459 static void 2460 vmxnet3_free_pci_resources(struct vmxnet3_adapter *adapter) 2461 { 2462 BUG_ON(!adapter->pdev); 2463 2464 iounmap(adapter->hw_addr0); 2465 iounmap(adapter->hw_addr1); 2466 pci_release_selected_regions(adapter->pdev, (1 << 2) - 1); 2467 pci_disable_device(adapter->pdev); 2468 } 2469 2470 2471 static void 2472 vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter) 2473 { 2474 size_t sz, i, ring0_size, ring1_size, comp_size; 2475 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[0]; 2476 2477 2478 if (adapter->netdev->mtu <= VMXNET3_MAX_SKB_BUF_SIZE - 2479 VMXNET3_MAX_ETH_HDR_SIZE) { 2480 adapter->skb_buf_size = adapter->netdev->mtu + 2481 VMXNET3_MAX_ETH_HDR_SIZE; 2482 if (adapter->skb_buf_size < VMXNET3_MIN_T0_BUF_SIZE) 2483 adapter->skb_buf_size = VMXNET3_MIN_T0_BUF_SIZE; 2484 2485 adapter->rx_buf_per_pkt = 1; 2486 } else { 2487 adapter->skb_buf_size = VMXNET3_MAX_SKB_BUF_SIZE; 2488 sz = adapter->netdev->mtu - VMXNET3_MAX_SKB_BUF_SIZE + 2489 VMXNET3_MAX_ETH_HDR_SIZE; 2490 adapter->rx_buf_per_pkt = 1 + (sz + PAGE_SIZE - 1) / PAGE_SIZE; 2491 } 2492 2493 /* 2494 * for simplicity, force the ring0 size to be a multiple of 2495 * rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN 2496 */ 2497 sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN; 2498 ring0_size = adapter->rx_queue[0].rx_ring[0].size; 2499 ring0_size = (ring0_size + sz - 1) / sz * sz; 2500 ring0_size = min_t(u32, ring0_size, VMXNET3_RX_RING_MAX_SIZE / 2501 sz * sz); 2502 ring1_size = adapter->rx_queue[0].rx_ring[1].size; 2503 comp_size = ring0_size + ring1_size; 2504 2505 for (i = 0; i < adapter->num_rx_queues; i++) { 2506 rq = &adapter->rx_queue[i]; 2507 rq->rx_ring[0].size = ring0_size; 2508 rq->rx_ring[1].size = ring1_size; 2509 rq->comp_ring.size = comp_size; 2510 } 2511 } 2512 2513 2514 int 2515 vmxnet3_create_queues(struct vmxnet3_adapter *adapter, u32 tx_ring_size, 2516 u32 rx_ring_size, u32 rx_ring2_size) 2517 { 2518 int err = 0, i; 2519 2520 for (i = 0; i < adapter->num_tx_queues; i++) { 2521 struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i]; 2522 tq->tx_ring.size = tx_ring_size; 2523 tq->data_ring.size = tx_ring_size; 2524 tq->comp_ring.size = tx_ring_size; 2525 tq->shared = &adapter->tqd_start[i].ctrl; 2526 tq->stopped = true; 2527 tq->adapter = adapter; 2528 tq->qid = i; 2529 err = vmxnet3_tq_create(tq, adapter); 2530 /* 2531 * Too late to change num_tx_queues. We cannot do away with 2532 * lesser number of queues than what we asked for 2533 */ 2534 if (err) 2535 goto queue_err; 2536 } 2537 2538 adapter->rx_queue[0].rx_ring[0].size = rx_ring_size; 2539 adapter->rx_queue[0].rx_ring[1].size = rx_ring2_size; 2540 vmxnet3_adjust_rx_ring_size(adapter); 2541 for (i = 0; i < adapter->num_rx_queues; i++) { 2542 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i]; 2543 /* qid and qid2 for rx queues will be assigned later when num 2544 * of rx queues is finalized after allocating intrs */ 2545 rq->shared = &adapter->rqd_start[i].ctrl; 2546 rq->adapter = adapter; 2547 err = vmxnet3_rq_create(rq, adapter); 2548 if (err) { 2549 if (i == 0) { 2550 printk(KERN_ERR "Could not allocate any rx" 2551 "queues. Aborting.\n"); 2552 goto queue_err; 2553 } else { 2554 printk(KERN_INFO "Number of rx queues changed " 2555 "to : %d.\n", i); 2556 adapter->num_rx_queues = i; 2557 err = 0; 2558 break; 2559 } 2560 } 2561 } 2562 return err; 2563 queue_err: 2564 vmxnet3_tq_destroy_all(adapter); 2565 return err; 2566 } 2567 2568 static int 2569 vmxnet3_open(struct net_device *netdev) 2570 { 2571 struct vmxnet3_adapter *adapter; 2572 int err, i; 2573 2574 adapter = netdev_priv(netdev); 2575 2576 for (i = 0; i < adapter->num_tx_queues; i++) 2577 spin_lock_init(&adapter->tx_queue[i].tx_lock); 2578 2579 err = vmxnet3_create_queues(adapter, VMXNET3_DEF_TX_RING_SIZE, 2580 VMXNET3_DEF_RX_RING_SIZE, 2581 VMXNET3_DEF_RX_RING_SIZE); 2582 if (err) 2583 goto queue_err; 2584 2585 err = vmxnet3_activate_dev(adapter); 2586 if (err) 2587 goto activate_err; 2588 2589 return 0; 2590 2591 activate_err: 2592 vmxnet3_rq_destroy_all(adapter); 2593 vmxnet3_tq_destroy_all(adapter); 2594 queue_err: 2595 return err; 2596 } 2597 2598 2599 static int 2600 vmxnet3_close(struct net_device *netdev) 2601 { 2602 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2603 2604 /* 2605 * Reset_work may be in the middle of resetting the device, wait for its 2606 * completion. 2607 */ 2608 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)) 2609 msleep(1); 2610 2611 vmxnet3_quiesce_dev(adapter); 2612 2613 vmxnet3_rq_destroy_all(adapter); 2614 vmxnet3_tq_destroy_all(adapter); 2615 2616 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state); 2617 2618 2619 return 0; 2620 } 2621 2622 2623 void 2624 vmxnet3_force_close(struct vmxnet3_adapter *adapter) 2625 { 2626 int i; 2627 2628 /* 2629 * we must clear VMXNET3_STATE_BIT_RESETTING, otherwise 2630 * vmxnet3_close() will deadlock. 2631 */ 2632 BUG_ON(test_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)); 2633 2634 /* we need to enable NAPI, otherwise dev_close will deadlock */ 2635 for (i = 0; i < adapter->num_rx_queues; i++) 2636 napi_enable(&adapter->rx_queue[i].napi); 2637 dev_close(adapter->netdev); 2638 } 2639 2640 2641 static int 2642 vmxnet3_change_mtu(struct net_device *netdev, int new_mtu) 2643 { 2644 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2645 int err = 0; 2646 2647 if (new_mtu < VMXNET3_MIN_MTU || new_mtu > VMXNET3_MAX_MTU) 2648 return -EINVAL; 2649 2650 netdev->mtu = new_mtu; 2651 2652 /* 2653 * Reset_work may be in the middle of resetting the device, wait for its 2654 * completion. 2655 */ 2656 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)) 2657 msleep(1); 2658 2659 if (netif_running(netdev)) { 2660 vmxnet3_quiesce_dev(adapter); 2661 vmxnet3_reset_dev(adapter); 2662 2663 /* we need to re-create the rx queue based on the new mtu */ 2664 vmxnet3_rq_destroy_all(adapter); 2665 vmxnet3_adjust_rx_ring_size(adapter); 2666 err = vmxnet3_rq_create_all(adapter); 2667 if (err) { 2668 printk(KERN_ERR "%s: failed to re-create rx queues," 2669 " error %d. Closing it.\n", netdev->name, err); 2670 goto out; 2671 } 2672 2673 err = vmxnet3_activate_dev(adapter); 2674 if (err) { 2675 printk(KERN_ERR "%s: failed to re-activate, error %d. " 2676 "Closing it\n", netdev->name, err); 2677 goto out; 2678 } 2679 } 2680 2681 out: 2682 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state); 2683 if (err) 2684 vmxnet3_force_close(adapter); 2685 2686 return err; 2687 } 2688 2689 2690 static void 2691 vmxnet3_declare_features(struct vmxnet3_adapter *adapter, bool dma64) 2692 { 2693 struct net_device *netdev = adapter->netdev; 2694 2695 netdev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM | 2696 NETIF_F_HW_CSUM | NETIF_F_HW_VLAN_TX | 2697 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_LRO; 2698 if (dma64) 2699 netdev->features |= NETIF_F_HIGHDMA; 2700 netdev->vlan_features = netdev->hw_features & ~NETIF_F_HW_VLAN_TX; 2701 netdev->features = netdev->hw_features | 2702 NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_FILTER; 2703 2704 netdev_info(adapter->netdev, 2705 "features: sg csum vlan jf tso tsoIPv6 lro%s\n", 2706 dma64 ? " highDMA" : ""); 2707 } 2708 2709 2710 static void 2711 vmxnet3_read_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac) 2712 { 2713 u32 tmp; 2714 2715 tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACL); 2716 *(u32 *)mac = tmp; 2717 2718 tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACH); 2719 mac[4] = tmp & 0xff; 2720 mac[5] = (tmp >> 8) & 0xff; 2721 } 2722 2723 #ifdef CONFIG_PCI_MSI 2724 2725 /* 2726 * Enable MSIx vectors. 2727 * Returns : 2728 * 0 on successful enabling of required vectors, 2729 * VMXNET3_LINUX_MIN_MSIX_VECT when only minimum number of vectors required 2730 * could be enabled. 2731 * number of vectors which can be enabled otherwise (this number is smaller 2732 * than VMXNET3_LINUX_MIN_MSIX_VECT) 2733 */ 2734 2735 static int 2736 vmxnet3_acquire_msix_vectors(struct vmxnet3_adapter *adapter, 2737 int vectors) 2738 { 2739 int err = 0, vector_threshold; 2740 vector_threshold = VMXNET3_LINUX_MIN_MSIX_VECT; 2741 2742 while (vectors >= vector_threshold) { 2743 err = pci_enable_msix(adapter->pdev, adapter->intr.msix_entries, 2744 vectors); 2745 if (!err) { 2746 adapter->intr.num_intrs = vectors; 2747 return 0; 2748 } else if (err < 0) { 2749 printk(KERN_ERR "Failed to enable MSI-X for %s, error" 2750 " %d\n", adapter->netdev->name, err); 2751 vectors = 0; 2752 } else if (err < vector_threshold) { 2753 break; 2754 } else { 2755 /* If fails to enable required number of MSI-x vectors 2756 * try enabling minimum number of vectors required. 2757 */ 2758 vectors = vector_threshold; 2759 printk(KERN_ERR "Failed to enable %d MSI-X for %s, try" 2760 " %d instead\n", vectors, adapter->netdev->name, 2761 vector_threshold); 2762 } 2763 } 2764 2765 printk(KERN_INFO "Number of MSI-X interrupts which can be allocatedi" 2766 " are lower than min threshold required.\n"); 2767 return err; 2768 } 2769 2770 2771 #endif /* CONFIG_PCI_MSI */ 2772 2773 static void 2774 vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter) 2775 { 2776 u32 cfg; 2777 unsigned long flags; 2778 2779 /* intr settings */ 2780 spin_lock_irqsave(&adapter->cmd_lock, flags); 2781 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2782 VMXNET3_CMD_GET_CONF_INTR); 2783 cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 2784 spin_unlock_irqrestore(&adapter->cmd_lock, flags); 2785 adapter->intr.type = cfg & 0x3; 2786 adapter->intr.mask_mode = (cfg >> 2) & 0x3; 2787 2788 if (adapter->intr.type == VMXNET3_IT_AUTO) { 2789 adapter->intr.type = VMXNET3_IT_MSIX; 2790 } 2791 2792 #ifdef CONFIG_PCI_MSI 2793 if (adapter->intr.type == VMXNET3_IT_MSIX) { 2794 int vector, err = 0; 2795 2796 adapter->intr.num_intrs = (adapter->share_intr == 2797 VMXNET3_INTR_TXSHARE) ? 1 : 2798 adapter->num_tx_queues; 2799 adapter->intr.num_intrs += (adapter->share_intr == 2800 VMXNET3_INTR_BUDDYSHARE) ? 0 : 2801 adapter->num_rx_queues; 2802 adapter->intr.num_intrs += 1; /* for link event */ 2803 2804 adapter->intr.num_intrs = (adapter->intr.num_intrs > 2805 VMXNET3_LINUX_MIN_MSIX_VECT 2806 ? adapter->intr.num_intrs : 2807 VMXNET3_LINUX_MIN_MSIX_VECT); 2808 2809 for (vector = 0; vector < adapter->intr.num_intrs; vector++) 2810 adapter->intr.msix_entries[vector].entry = vector; 2811 2812 err = vmxnet3_acquire_msix_vectors(adapter, 2813 adapter->intr.num_intrs); 2814 /* If we cannot allocate one MSIx vector per queue 2815 * then limit the number of rx queues to 1 2816 */ 2817 if (err == VMXNET3_LINUX_MIN_MSIX_VECT) { 2818 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE 2819 || adapter->num_rx_queues != 1) { 2820 adapter->share_intr = VMXNET3_INTR_TXSHARE; 2821 printk(KERN_ERR "Number of rx queues : 1\n"); 2822 adapter->num_rx_queues = 1; 2823 adapter->intr.num_intrs = 2824 VMXNET3_LINUX_MIN_MSIX_VECT; 2825 } 2826 return; 2827 } 2828 if (!err) 2829 return; 2830 2831 /* If we cannot allocate MSIx vectors use only one rx queue */ 2832 printk(KERN_INFO "Failed to enable MSI-X for %s, error %d." 2833 "#rx queues : 1, try MSI\n", adapter->netdev->name, err); 2834 2835 adapter->intr.type = VMXNET3_IT_MSI; 2836 } 2837 2838 if (adapter->intr.type == VMXNET3_IT_MSI) { 2839 int err; 2840 err = pci_enable_msi(adapter->pdev); 2841 if (!err) { 2842 adapter->num_rx_queues = 1; 2843 adapter->intr.num_intrs = 1; 2844 return; 2845 } 2846 } 2847 #endif /* CONFIG_PCI_MSI */ 2848 2849 adapter->num_rx_queues = 1; 2850 printk(KERN_INFO "Using INTx interrupt, #Rx queues: 1.\n"); 2851 adapter->intr.type = VMXNET3_IT_INTX; 2852 2853 /* INT-X related setting */ 2854 adapter->intr.num_intrs = 1; 2855 } 2856 2857 2858 static void 2859 vmxnet3_free_intr_resources(struct vmxnet3_adapter *adapter) 2860 { 2861 if (adapter->intr.type == VMXNET3_IT_MSIX) 2862 pci_disable_msix(adapter->pdev); 2863 else if (adapter->intr.type == VMXNET3_IT_MSI) 2864 pci_disable_msi(adapter->pdev); 2865 else 2866 BUG_ON(adapter->intr.type != VMXNET3_IT_INTX); 2867 } 2868 2869 2870 static void 2871 vmxnet3_tx_timeout(struct net_device *netdev) 2872 { 2873 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2874 adapter->tx_timeout_count++; 2875 2876 printk(KERN_ERR "%s: tx hang\n", adapter->netdev->name); 2877 schedule_work(&adapter->work); 2878 netif_wake_queue(adapter->netdev); 2879 } 2880 2881 2882 static void 2883 vmxnet3_reset_work(struct work_struct *data) 2884 { 2885 struct vmxnet3_adapter *adapter; 2886 2887 adapter = container_of(data, struct vmxnet3_adapter, work); 2888 2889 /* if another thread is resetting the device, no need to proceed */ 2890 if (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)) 2891 return; 2892 2893 /* if the device is closed, we must leave it alone */ 2894 rtnl_lock(); 2895 if (netif_running(adapter->netdev)) { 2896 printk(KERN_INFO "%s: resetting\n", adapter->netdev->name); 2897 vmxnet3_quiesce_dev(adapter); 2898 vmxnet3_reset_dev(adapter); 2899 vmxnet3_activate_dev(adapter); 2900 } else { 2901 printk(KERN_INFO "%s: already closed\n", adapter->netdev->name); 2902 } 2903 rtnl_unlock(); 2904 2905 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state); 2906 } 2907 2908 2909 static int __devinit 2910 vmxnet3_probe_device(struct pci_dev *pdev, 2911 const struct pci_device_id *id) 2912 { 2913 static const struct net_device_ops vmxnet3_netdev_ops = { 2914 .ndo_open = vmxnet3_open, 2915 .ndo_stop = vmxnet3_close, 2916 .ndo_start_xmit = vmxnet3_xmit_frame, 2917 .ndo_set_mac_address = vmxnet3_set_mac_addr, 2918 .ndo_change_mtu = vmxnet3_change_mtu, 2919 .ndo_set_features = vmxnet3_set_features, 2920 .ndo_get_stats = vmxnet3_get_stats, 2921 .ndo_tx_timeout = vmxnet3_tx_timeout, 2922 .ndo_set_multicast_list = vmxnet3_set_mc, 2923 .ndo_vlan_rx_register = vmxnet3_vlan_rx_register, 2924 .ndo_vlan_rx_add_vid = vmxnet3_vlan_rx_add_vid, 2925 .ndo_vlan_rx_kill_vid = vmxnet3_vlan_rx_kill_vid, 2926 #ifdef CONFIG_NET_POLL_CONTROLLER 2927 .ndo_poll_controller = vmxnet3_netpoll, 2928 #endif 2929 }; 2930 int err; 2931 bool dma64 = false; /* stupid gcc */ 2932 u32 ver; 2933 struct net_device *netdev; 2934 struct vmxnet3_adapter *adapter; 2935 u8 mac[ETH_ALEN]; 2936 int size; 2937 int num_tx_queues; 2938 int num_rx_queues; 2939 2940 if (!pci_msi_enabled()) 2941 enable_mq = 0; 2942 2943 #ifdef VMXNET3_RSS 2944 if (enable_mq) 2945 num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES, 2946 (int)num_online_cpus()); 2947 else 2948 #endif 2949 num_rx_queues = 1; 2950 2951 if (enable_mq) 2952 num_tx_queues = min(VMXNET3_DEVICE_MAX_TX_QUEUES, 2953 (int)num_online_cpus()); 2954 else 2955 num_tx_queues = 1; 2956 2957 netdev = alloc_etherdev_mq(sizeof(struct vmxnet3_adapter), 2958 max(num_tx_queues, num_rx_queues)); 2959 printk(KERN_INFO "# of Tx queues : %d, # of Rx queues : %d\n", 2960 num_tx_queues, num_rx_queues); 2961 2962 if (!netdev) { 2963 printk(KERN_ERR "Failed to alloc ethernet device for adapter " 2964 "%s\n", pci_name(pdev)); 2965 return -ENOMEM; 2966 } 2967 2968 pci_set_drvdata(pdev, netdev); 2969 adapter = netdev_priv(netdev); 2970 adapter->netdev = netdev; 2971 adapter->pdev = pdev; 2972 2973 spin_lock_init(&adapter->cmd_lock); 2974 adapter->shared = pci_alloc_consistent(adapter->pdev, 2975 sizeof(struct Vmxnet3_DriverShared), 2976 &adapter->shared_pa); 2977 if (!adapter->shared) { 2978 printk(KERN_ERR "Failed to allocate memory for %s\n", 2979 pci_name(pdev)); 2980 err = -ENOMEM; 2981 goto err_alloc_shared; 2982 } 2983 2984 adapter->num_rx_queues = num_rx_queues; 2985 adapter->num_tx_queues = num_tx_queues; 2986 2987 size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues; 2988 size += sizeof(struct Vmxnet3_RxQueueDesc) * adapter->num_rx_queues; 2989 adapter->tqd_start = pci_alloc_consistent(adapter->pdev, size, 2990 &adapter->queue_desc_pa); 2991 2992 if (!adapter->tqd_start) { 2993 printk(KERN_ERR "Failed to allocate memory for %s\n", 2994 pci_name(pdev)); 2995 err = -ENOMEM; 2996 goto err_alloc_queue_desc; 2997 } 2998 adapter->rqd_start = (struct Vmxnet3_RxQueueDesc *)(adapter->tqd_start + 2999 adapter->num_tx_queues); 3000 3001 adapter->pm_conf = kmalloc(sizeof(struct Vmxnet3_PMConf), GFP_KERNEL); 3002 if (adapter->pm_conf == NULL) { 3003 printk(KERN_ERR "Failed to allocate memory for %s\n", 3004 pci_name(pdev)); 3005 err = -ENOMEM; 3006 goto err_alloc_pm; 3007 } 3008 3009 #ifdef VMXNET3_RSS 3010 3011 adapter->rss_conf = kmalloc(sizeof(struct UPT1_RSSConf), GFP_KERNEL); 3012 if (adapter->rss_conf == NULL) { 3013 printk(KERN_ERR "Failed to allocate memory for %s\n", 3014 pci_name(pdev)); 3015 err = -ENOMEM; 3016 goto err_alloc_rss; 3017 } 3018 #endif /* VMXNET3_RSS */ 3019 3020 err = vmxnet3_alloc_pci_resources(adapter, &dma64); 3021 if (err < 0) 3022 goto err_alloc_pci; 3023 3024 ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_VRRS); 3025 if (ver & 1) { 3026 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_VRRS, 1); 3027 } else { 3028 printk(KERN_ERR "Incompatible h/w version (0x%x) for adapter" 3029 " %s\n", ver, pci_name(pdev)); 3030 err = -EBUSY; 3031 goto err_ver; 3032 } 3033 3034 ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_UVRS); 3035 if (ver & 1) { 3036 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_UVRS, 1); 3037 } else { 3038 printk(KERN_ERR "Incompatible upt version (0x%x) for " 3039 "adapter %s\n", ver, pci_name(pdev)); 3040 err = -EBUSY; 3041 goto err_ver; 3042 } 3043 3044 vmxnet3_declare_features(adapter, dma64); 3045 3046 adapter->dev_number = atomic_read(&devices_found); 3047 3048 adapter->share_intr = irq_share_mode; 3049 if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE && 3050 adapter->num_tx_queues != adapter->num_rx_queues) 3051 adapter->share_intr = VMXNET3_INTR_DONTSHARE; 3052 3053 vmxnet3_alloc_intr_resources(adapter); 3054 3055 #ifdef VMXNET3_RSS 3056 if (adapter->num_rx_queues > 1 && 3057 adapter->intr.type == VMXNET3_IT_MSIX) { 3058 adapter->rss = true; 3059 printk(KERN_INFO "RSS is enabled.\n"); 3060 } else { 3061 adapter->rss = false; 3062 } 3063 #endif 3064 3065 vmxnet3_read_mac_addr(adapter, mac); 3066 memcpy(netdev->dev_addr, mac, netdev->addr_len); 3067 3068 netdev->netdev_ops = &vmxnet3_netdev_ops; 3069 vmxnet3_set_ethtool_ops(netdev); 3070 netdev->watchdog_timeo = 5 * HZ; 3071 3072 INIT_WORK(&adapter->work, vmxnet3_reset_work); 3073 3074 if (adapter->intr.type == VMXNET3_IT_MSIX) { 3075 int i; 3076 for (i = 0; i < adapter->num_rx_queues; i++) { 3077 netif_napi_add(adapter->netdev, 3078 &adapter->rx_queue[i].napi, 3079 vmxnet3_poll_rx_only, 64); 3080 } 3081 } else { 3082 netif_napi_add(adapter->netdev, &adapter->rx_queue[0].napi, 3083 vmxnet3_poll, 64); 3084 } 3085 3086 netif_set_real_num_tx_queues(adapter->netdev, adapter->num_tx_queues); 3087 netif_set_real_num_rx_queues(adapter->netdev, adapter->num_rx_queues); 3088 3089 SET_NETDEV_DEV(netdev, &pdev->dev); 3090 err = register_netdev(netdev); 3091 3092 if (err) { 3093 printk(KERN_ERR "Failed to register adapter %s\n", 3094 pci_name(pdev)); 3095 goto err_register; 3096 } 3097 3098 set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state); 3099 vmxnet3_check_link(adapter, false); 3100 atomic_inc(&devices_found); 3101 return 0; 3102 3103 err_register: 3104 vmxnet3_free_intr_resources(adapter); 3105 err_ver: 3106 vmxnet3_free_pci_resources(adapter); 3107 err_alloc_pci: 3108 #ifdef VMXNET3_RSS 3109 kfree(adapter->rss_conf); 3110 err_alloc_rss: 3111 #endif 3112 kfree(adapter->pm_conf); 3113 err_alloc_pm: 3114 pci_free_consistent(adapter->pdev, size, adapter->tqd_start, 3115 adapter->queue_desc_pa); 3116 err_alloc_queue_desc: 3117 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared), 3118 adapter->shared, adapter->shared_pa); 3119 err_alloc_shared: 3120 pci_set_drvdata(pdev, NULL); 3121 free_netdev(netdev); 3122 return err; 3123 } 3124 3125 3126 static void __devexit 3127 vmxnet3_remove_device(struct pci_dev *pdev) 3128 { 3129 struct net_device *netdev = pci_get_drvdata(pdev); 3130 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 3131 int size = 0; 3132 int num_rx_queues; 3133 3134 #ifdef VMXNET3_RSS 3135 if (enable_mq) 3136 num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES, 3137 (int)num_online_cpus()); 3138 else 3139 #endif 3140 num_rx_queues = 1; 3141 3142 cancel_work_sync(&adapter->work); 3143 3144 unregister_netdev(netdev); 3145 3146 vmxnet3_free_intr_resources(adapter); 3147 vmxnet3_free_pci_resources(adapter); 3148 #ifdef VMXNET3_RSS 3149 kfree(adapter->rss_conf); 3150 #endif 3151 kfree(adapter->pm_conf); 3152 3153 size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues; 3154 size += sizeof(struct Vmxnet3_RxQueueDesc) * num_rx_queues; 3155 pci_free_consistent(adapter->pdev, size, adapter->tqd_start, 3156 adapter->queue_desc_pa); 3157 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared), 3158 adapter->shared, adapter->shared_pa); 3159 free_netdev(netdev); 3160 } 3161 3162 3163 #ifdef CONFIG_PM 3164 3165 static int 3166 vmxnet3_suspend(struct device *device) 3167 { 3168 struct pci_dev *pdev = to_pci_dev(device); 3169 struct net_device *netdev = pci_get_drvdata(pdev); 3170 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 3171 struct Vmxnet3_PMConf *pmConf; 3172 struct ethhdr *ehdr; 3173 struct arphdr *ahdr; 3174 u8 *arpreq; 3175 struct in_device *in_dev; 3176 struct in_ifaddr *ifa; 3177 unsigned long flags; 3178 int i = 0; 3179 3180 if (!netif_running(netdev)) 3181 return 0; 3182 3183 for (i = 0; i < adapter->num_rx_queues; i++) 3184 napi_disable(&adapter->rx_queue[i].napi); 3185 3186 vmxnet3_disable_all_intrs(adapter); 3187 vmxnet3_free_irqs(adapter); 3188 vmxnet3_free_intr_resources(adapter); 3189 3190 netif_device_detach(netdev); 3191 netif_tx_stop_all_queues(netdev); 3192 3193 /* Create wake-up filters. */ 3194 pmConf = adapter->pm_conf; 3195 memset(pmConf, 0, sizeof(*pmConf)); 3196 3197 if (adapter->wol & WAKE_UCAST) { 3198 pmConf->filters[i].patternSize = ETH_ALEN; 3199 pmConf->filters[i].maskSize = 1; 3200 memcpy(pmConf->filters[i].pattern, netdev->dev_addr, ETH_ALEN); 3201 pmConf->filters[i].mask[0] = 0x3F; /* LSB ETH_ALEN bits */ 3202 3203 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER; 3204 i++; 3205 } 3206 3207 if (adapter->wol & WAKE_ARP) { 3208 in_dev = in_dev_get(netdev); 3209 if (!in_dev) 3210 goto skip_arp; 3211 3212 ifa = (struct in_ifaddr *)in_dev->ifa_list; 3213 if (!ifa) 3214 goto skip_arp; 3215 3216 pmConf->filters[i].patternSize = ETH_HLEN + /* Ethernet header*/ 3217 sizeof(struct arphdr) + /* ARP header */ 3218 2 * ETH_ALEN + /* 2 Ethernet addresses*/ 3219 2 * sizeof(u32); /*2 IPv4 addresses */ 3220 pmConf->filters[i].maskSize = 3221 (pmConf->filters[i].patternSize - 1) / 8 + 1; 3222 3223 /* ETH_P_ARP in Ethernet header. */ 3224 ehdr = (struct ethhdr *)pmConf->filters[i].pattern; 3225 ehdr->h_proto = htons(ETH_P_ARP); 3226 3227 /* ARPOP_REQUEST in ARP header. */ 3228 ahdr = (struct arphdr *)&pmConf->filters[i].pattern[ETH_HLEN]; 3229 ahdr->ar_op = htons(ARPOP_REQUEST); 3230 arpreq = (u8 *)(ahdr + 1); 3231 3232 /* The Unicast IPv4 address in 'tip' field. */ 3233 arpreq += 2 * ETH_ALEN + sizeof(u32); 3234 *(u32 *)arpreq = ifa->ifa_address; 3235 3236 /* The mask for the relevant bits. */ 3237 pmConf->filters[i].mask[0] = 0x00; 3238 pmConf->filters[i].mask[1] = 0x30; /* ETH_P_ARP */ 3239 pmConf->filters[i].mask[2] = 0x30; /* ARPOP_REQUEST */ 3240 pmConf->filters[i].mask[3] = 0x00; 3241 pmConf->filters[i].mask[4] = 0xC0; /* IPv4 TIP */ 3242 pmConf->filters[i].mask[5] = 0x03; /* IPv4 TIP */ 3243 in_dev_put(in_dev); 3244 3245 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER; 3246 i++; 3247 } 3248 3249 skip_arp: 3250 if (adapter->wol & WAKE_MAGIC) 3251 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_MAGIC; 3252 3253 pmConf->numFilters = i; 3254 3255 adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1); 3256 adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof( 3257 *pmConf)); 3258 adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys( 3259 pmConf)); 3260 3261 spin_lock_irqsave(&adapter->cmd_lock, flags); 3262 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 3263 VMXNET3_CMD_UPDATE_PMCFG); 3264 spin_unlock_irqrestore(&adapter->cmd_lock, flags); 3265 3266 pci_save_state(pdev); 3267 pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND), 3268 adapter->wol); 3269 pci_disable_device(pdev); 3270 pci_set_power_state(pdev, pci_choose_state(pdev, PMSG_SUSPEND)); 3271 3272 return 0; 3273 } 3274 3275 3276 static int 3277 vmxnet3_resume(struct device *device) 3278 { 3279 int err, i = 0; 3280 unsigned long flags; 3281 struct pci_dev *pdev = to_pci_dev(device); 3282 struct net_device *netdev = pci_get_drvdata(pdev); 3283 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 3284 struct Vmxnet3_PMConf *pmConf; 3285 3286 if (!netif_running(netdev)) 3287 return 0; 3288 3289 /* Destroy wake-up filters. */ 3290 pmConf = adapter->pm_conf; 3291 memset(pmConf, 0, sizeof(*pmConf)); 3292 3293 adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1); 3294 adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof( 3295 *pmConf)); 3296 adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys( 3297 pmConf)); 3298 3299 netif_device_attach(netdev); 3300 pci_set_power_state(pdev, PCI_D0); 3301 pci_restore_state(pdev); 3302 err = pci_enable_device_mem(pdev); 3303 if (err != 0) 3304 return err; 3305 3306 pci_enable_wake(pdev, PCI_D0, 0); 3307 3308 spin_lock_irqsave(&adapter->cmd_lock, flags); 3309 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 3310 VMXNET3_CMD_UPDATE_PMCFG); 3311 spin_unlock_irqrestore(&adapter->cmd_lock, flags); 3312 vmxnet3_alloc_intr_resources(adapter); 3313 vmxnet3_request_irqs(adapter); 3314 for (i = 0; i < adapter->num_rx_queues; i++) 3315 napi_enable(&adapter->rx_queue[i].napi); 3316 vmxnet3_enable_all_intrs(adapter); 3317 3318 return 0; 3319 } 3320 3321 static const struct dev_pm_ops vmxnet3_pm_ops = { 3322 .suspend = vmxnet3_suspend, 3323 .resume = vmxnet3_resume, 3324 }; 3325 #endif 3326 3327 static struct pci_driver vmxnet3_driver = { 3328 .name = vmxnet3_driver_name, 3329 .id_table = vmxnet3_pciid_table, 3330 .probe = vmxnet3_probe_device, 3331 .remove = __devexit_p(vmxnet3_remove_device), 3332 #ifdef CONFIG_PM 3333 .driver.pm = &vmxnet3_pm_ops, 3334 #endif 3335 }; 3336 3337 3338 static int __init 3339 vmxnet3_init_module(void) 3340 { 3341 printk(KERN_INFO "%s - version %s\n", VMXNET3_DRIVER_DESC, 3342 VMXNET3_DRIVER_VERSION_REPORT); 3343 return pci_register_driver(&vmxnet3_driver); 3344 } 3345 3346 module_init(vmxnet3_init_module); 3347 3348 3349 static void 3350 vmxnet3_exit_module(void) 3351 { 3352 pci_unregister_driver(&vmxnet3_driver); 3353 } 3354 3355 module_exit(vmxnet3_exit_module); 3356 3357 MODULE_AUTHOR("VMware, Inc."); 3358 MODULE_DESCRIPTION(VMXNET3_DRIVER_DESC); 3359 MODULE_LICENSE("GPL v2"); 3360 MODULE_VERSION(VMXNET3_DRIVER_VERSION_STRING); 3361