1d1a890faSShreyas Bhatewara /* 2d1a890faSShreyas Bhatewara * Linux driver for VMware's vmxnet3 ethernet NIC. 3d1a890faSShreyas Bhatewara * 4d1a890faSShreyas Bhatewara * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved. 5d1a890faSShreyas Bhatewara * 6d1a890faSShreyas Bhatewara * This program is free software; you can redistribute it and/or modify it 7d1a890faSShreyas Bhatewara * under the terms of the GNU General Public License as published by the 8d1a890faSShreyas Bhatewara * Free Software Foundation; version 2 of the License and no later version. 9d1a890faSShreyas Bhatewara * 10d1a890faSShreyas Bhatewara * This program is distributed in the hope that it will be useful, but 11d1a890faSShreyas Bhatewara * WITHOUT ANY WARRANTY; without even the implied warranty of 12d1a890faSShreyas Bhatewara * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 13d1a890faSShreyas Bhatewara * NON INFRINGEMENT. See the GNU General Public License for more 14d1a890faSShreyas Bhatewara * details. 15d1a890faSShreyas Bhatewara * 16d1a890faSShreyas Bhatewara * You should have received a copy of the GNU General Public License 17d1a890faSShreyas Bhatewara * along with this program; if not, write to the Free Software 18d1a890faSShreyas Bhatewara * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19d1a890faSShreyas Bhatewara * 20d1a890faSShreyas Bhatewara * The full GNU General Public License is included in this distribution in 21d1a890faSShreyas Bhatewara * the file called "COPYING". 22d1a890faSShreyas Bhatewara * 23d1a890faSShreyas Bhatewara * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com> 24d1a890faSShreyas Bhatewara * 25d1a890faSShreyas Bhatewara */ 26d1a890faSShreyas Bhatewara 279d9779e7SPaul Gortmaker #include <linux/module.h> 28b038b040SStephen Rothwell #include <net/ip6_checksum.h> 29b038b040SStephen Rothwell 30d1a890faSShreyas Bhatewara #include "vmxnet3_int.h" 31d1a890faSShreyas Bhatewara 32d1a890faSShreyas Bhatewara char vmxnet3_driver_name[] = "vmxnet3"; 33d1a890faSShreyas Bhatewara #define VMXNET3_DRIVER_DESC "VMware vmxnet3 virtual NIC driver" 34d1a890faSShreyas Bhatewara 35d1a890faSShreyas Bhatewara /* 36d1a890faSShreyas Bhatewara * PCI Device ID Table 37d1a890faSShreyas Bhatewara * Last entry must be all 0s 38d1a890faSShreyas Bhatewara */ 39a3aa1884SAlexey Dobriyan static DEFINE_PCI_DEVICE_TABLE(vmxnet3_pciid_table) = { 40d1a890faSShreyas Bhatewara {PCI_VDEVICE(VMWARE, PCI_DEVICE_ID_VMWARE_VMXNET3)}, 41d1a890faSShreyas Bhatewara {0} 42d1a890faSShreyas Bhatewara }; 43d1a890faSShreyas Bhatewara 44d1a890faSShreyas Bhatewara MODULE_DEVICE_TABLE(pci, vmxnet3_pciid_table); 45d1a890faSShreyas Bhatewara 46d1a890faSShreyas Bhatewara static atomic_t devices_found; 47d1a890faSShreyas Bhatewara 4809c5088eSShreyas Bhatewara #define VMXNET3_MAX_DEVICES 10 4909c5088eSShreyas Bhatewara static int enable_mq = 1; 5009c5088eSShreyas Bhatewara static int irq_share_mode; 51d1a890faSShreyas Bhatewara 52f9f25026SShreyas Bhatewara static void 53f9f25026SShreyas Bhatewara vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac); 54f9f25026SShreyas Bhatewara 55d1a890faSShreyas Bhatewara /* 56d1a890faSShreyas Bhatewara * Enable/Disable the given intr 57d1a890faSShreyas Bhatewara */ 58d1a890faSShreyas Bhatewara static void 59d1a890faSShreyas Bhatewara vmxnet3_enable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx) 60d1a890faSShreyas Bhatewara { 61d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 0); 62d1a890faSShreyas Bhatewara } 63d1a890faSShreyas Bhatewara 64d1a890faSShreyas Bhatewara 65d1a890faSShreyas Bhatewara static void 66d1a890faSShreyas Bhatewara vmxnet3_disable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx) 67d1a890faSShreyas Bhatewara { 68d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 1); 69d1a890faSShreyas Bhatewara } 70d1a890faSShreyas Bhatewara 71d1a890faSShreyas Bhatewara 72d1a890faSShreyas Bhatewara /* 73d1a890faSShreyas Bhatewara * Enable/Disable all intrs used by the device 74d1a890faSShreyas Bhatewara */ 75d1a890faSShreyas Bhatewara static void 76d1a890faSShreyas Bhatewara vmxnet3_enable_all_intrs(struct vmxnet3_adapter *adapter) 77d1a890faSShreyas Bhatewara { 78d1a890faSShreyas Bhatewara int i; 79d1a890faSShreyas Bhatewara 80d1a890faSShreyas Bhatewara for (i = 0; i < adapter->intr.num_intrs; i++) 81d1a890faSShreyas Bhatewara vmxnet3_enable_intr(adapter, i); 826929fe8aSRonghua Zang adapter->shared->devRead.intrConf.intrCtrl &= 836929fe8aSRonghua Zang cpu_to_le32(~VMXNET3_IC_DISABLE_ALL); 84d1a890faSShreyas Bhatewara } 85d1a890faSShreyas Bhatewara 86d1a890faSShreyas Bhatewara 87d1a890faSShreyas Bhatewara static void 88d1a890faSShreyas Bhatewara vmxnet3_disable_all_intrs(struct vmxnet3_adapter *adapter) 89d1a890faSShreyas Bhatewara { 90d1a890faSShreyas Bhatewara int i; 91d1a890faSShreyas Bhatewara 926929fe8aSRonghua Zang adapter->shared->devRead.intrConf.intrCtrl |= 936929fe8aSRonghua Zang cpu_to_le32(VMXNET3_IC_DISABLE_ALL); 94d1a890faSShreyas Bhatewara for (i = 0; i < adapter->intr.num_intrs; i++) 95d1a890faSShreyas Bhatewara vmxnet3_disable_intr(adapter, i); 96d1a890faSShreyas Bhatewara } 97d1a890faSShreyas Bhatewara 98d1a890faSShreyas Bhatewara 99d1a890faSShreyas Bhatewara static void 100d1a890faSShreyas Bhatewara vmxnet3_ack_events(struct vmxnet3_adapter *adapter, u32 events) 101d1a890faSShreyas Bhatewara { 102d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_ECR, events); 103d1a890faSShreyas Bhatewara } 104d1a890faSShreyas Bhatewara 105d1a890faSShreyas Bhatewara 106d1a890faSShreyas Bhatewara static bool 107d1a890faSShreyas Bhatewara vmxnet3_tq_stopped(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 108d1a890faSShreyas Bhatewara { 10909c5088eSShreyas Bhatewara return tq->stopped; 110d1a890faSShreyas Bhatewara } 111d1a890faSShreyas Bhatewara 112d1a890faSShreyas Bhatewara 113d1a890faSShreyas Bhatewara static void 114d1a890faSShreyas Bhatewara vmxnet3_tq_start(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 115d1a890faSShreyas Bhatewara { 116d1a890faSShreyas Bhatewara tq->stopped = false; 11709c5088eSShreyas Bhatewara netif_start_subqueue(adapter->netdev, tq - adapter->tx_queue); 118d1a890faSShreyas Bhatewara } 119d1a890faSShreyas Bhatewara 120d1a890faSShreyas Bhatewara 121d1a890faSShreyas Bhatewara static void 122d1a890faSShreyas Bhatewara vmxnet3_tq_wake(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 123d1a890faSShreyas Bhatewara { 124d1a890faSShreyas Bhatewara tq->stopped = false; 12509c5088eSShreyas Bhatewara netif_wake_subqueue(adapter->netdev, (tq - adapter->tx_queue)); 126d1a890faSShreyas Bhatewara } 127d1a890faSShreyas Bhatewara 128d1a890faSShreyas Bhatewara 129d1a890faSShreyas Bhatewara static void 130d1a890faSShreyas Bhatewara vmxnet3_tq_stop(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 131d1a890faSShreyas Bhatewara { 132d1a890faSShreyas Bhatewara tq->stopped = true; 133d1a890faSShreyas Bhatewara tq->num_stop++; 13409c5088eSShreyas Bhatewara netif_stop_subqueue(adapter->netdev, (tq - adapter->tx_queue)); 135d1a890faSShreyas Bhatewara } 136d1a890faSShreyas Bhatewara 137d1a890faSShreyas Bhatewara 138d1a890faSShreyas Bhatewara /* 139d1a890faSShreyas Bhatewara * Check the link state. This may start or stop the tx queue. 140d1a890faSShreyas Bhatewara */ 141d1a890faSShreyas Bhatewara static void 1424a1745fcSShreyas Bhatewara vmxnet3_check_link(struct vmxnet3_adapter *adapter, bool affectTxQueue) 143d1a890faSShreyas Bhatewara { 144d1a890faSShreyas Bhatewara u32 ret; 14509c5088eSShreyas Bhatewara int i; 14683d0feffSShreyas Bhatewara unsigned long flags; 147d1a890faSShreyas Bhatewara 14883d0feffSShreyas Bhatewara spin_lock_irqsave(&adapter->cmd_lock, flags); 149d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK); 150d1a890faSShreyas Bhatewara ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 15183d0feffSShreyas Bhatewara spin_unlock_irqrestore(&adapter->cmd_lock, flags); 15283d0feffSShreyas Bhatewara 153d1a890faSShreyas Bhatewara adapter->link_speed = ret >> 16; 154d1a890faSShreyas Bhatewara if (ret & 1) { /* Link is up. */ 155d1a890faSShreyas Bhatewara printk(KERN_INFO "%s: NIC Link is Up %d Mbps\n", 156d1a890faSShreyas Bhatewara adapter->netdev->name, adapter->link_speed); 157d1a890faSShreyas Bhatewara if (!netif_carrier_ok(adapter->netdev)) 158d1a890faSShreyas Bhatewara netif_carrier_on(adapter->netdev); 159d1a890faSShreyas Bhatewara 16009c5088eSShreyas Bhatewara if (affectTxQueue) { 16109c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 16209c5088eSShreyas Bhatewara vmxnet3_tq_start(&adapter->tx_queue[i], 16309c5088eSShreyas Bhatewara adapter); 16409c5088eSShreyas Bhatewara } 165d1a890faSShreyas Bhatewara } else { 166d1a890faSShreyas Bhatewara printk(KERN_INFO "%s: NIC Link is Down\n", 167d1a890faSShreyas Bhatewara adapter->netdev->name); 168d1a890faSShreyas Bhatewara if (netif_carrier_ok(adapter->netdev)) 169d1a890faSShreyas Bhatewara netif_carrier_off(adapter->netdev); 170d1a890faSShreyas Bhatewara 17109c5088eSShreyas Bhatewara if (affectTxQueue) { 17209c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 17309c5088eSShreyas Bhatewara vmxnet3_tq_stop(&adapter->tx_queue[i], adapter); 17409c5088eSShreyas Bhatewara } 175d1a890faSShreyas Bhatewara } 176d1a890faSShreyas Bhatewara } 177d1a890faSShreyas Bhatewara 178d1a890faSShreyas Bhatewara static void 179d1a890faSShreyas Bhatewara vmxnet3_process_events(struct vmxnet3_adapter *adapter) 180d1a890faSShreyas Bhatewara { 18109c5088eSShreyas Bhatewara int i; 182e328d410SRoland Dreier unsigned long flags; 183115924b6SShreyas Bhatewara u32 events = le32_to_cpu(adapter->shared->ecr); 184d1a890faSShreyas Bhatewara if (!events) 185d1a890faSShreyas Bhatewara return; 186d1a890faSShreyas Bhatewara 187d1a890faSShreyas Bhatewara vmxnet3_ack_events(adapter, events); 188d1a890faSShreyas Bhatewara 189d1a890faSShreyas Bhatewara /* Check if link state has changed */ 190d1a890faSShreyas Bhatewara if (events & VMXNET3_ECR_LINK) 1914a1745fcSShreyas Bhatewara vmxnet3_check_link(adapter, true); 192d1a890faSShreyas Bhatewara 193d1a890faSShreyas Bhatewara /* Check if there is an error on xmit/recv queues */ 194d1a890faSShreyas Bhatewara if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) { 195e328d410SRoland Dreier spin_lock_irqsave(&adapter->cmd_lock, flags); 196d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 197d1a890faSShreyas Bhatewara VMXNET3_CMD_GET_QUEUE_STATUS); 198e328d410SRoland Dreier spin_unlock_irqrestore(&adapter->cmd_lock, flags); 199d1a890faSShreyas Bhatewara 20009c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 20109c5088eSShreyas Bhatewara if (adapter->tqd_start[i].status.stopped) 20209c5088eSShreyas Bhatewara dev_err(&adapter->netdev->dev, 20309c5088eSShreyas Bhatewara "%s: tq[%d] error 0x%x\n", 20409c5088eSShreyas Bhatewara adapter->netdev->name, i, le32_to_cpu( 20509c5088eSShreyas Bhatewara adapter->tqd_start[i].status.error)); 20609c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 20709c5088eSShreyas Bhatewara if (adapter->rqd_start[i].status.stopped) 20809c5088eSShreyas Bhatewara dev_err(&adapter->netdev->dev, 20909c5088eSShreyas Bhatewara "%s: rq[%d] error 0x%x\n", 21009c5088eSShreyas Bhatewara adapter->netdev->name, i, 21109c5088eSShreyas Bhatewara adapter->rqd_start[i].status.error); 212d1a890faSShreyas Bhatewara 213d1a890faSShreyas Bhatewara schedule_work(&adapter->work); 214d1a890faSShreyas Bhatewara } 215d1a890faSShreyas Bhatewara } 216d1a890faSShreyas Bhatewara 217115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 218115924b6SShreyas Bhatewara /* 219115924b6SShreyas Bhatewara * The device expects the bitfields in shared structures to be written in 220115924b6SShreyas Bhatewara * little endian. When CPU is big endian, the following routines are used to 221115924b6SShreyas Bhatewara * correctly read and write into ABI. 222115924b6SShreyas Bhatewara * The general technique used here is : double word bitfields are defined in 223115924b6SShreyas Bhatewara * opposite order for big endian architecture. Then before reading them in 224115924b6SShreyas Bhatewara * driver the complete double word is translated using le32_to_cpu. Similarly 225115924b6SShreyas Bhatewara * After the driver writes into bitfields, cpu_to_le32 is used to translate the 226115924b6SShreyas Bhatewara * double words into required format. 227115924b6SShreyas Bhatewara * In order to avoid touching bits in shared structure more than once, temporary 228115924b6SShreyas Bhatewara * descriptors are used. These are passed as srcDesc to following functions. 229115924b6SShreyas Bhatewara */ 230115924b6SShreyas Bhatewara static void vmxnet3_RxDescToCPU(const struct Vmxnet3_RxDesc *srcDesc, 231115924b6SShreyas Bhatewara struct Vmxnet3_RxDesc *dstDesc) 232115924b6SShreyas Bhatewara { 233115924b6SShreyas Bhatewara u32 *src = (u32 *)srcDesc + 2; 234115924b6SShreyas Bhatewara u32 *dst = (u32 *)dstDesc + 2; 235115924b6SShreyas Bhatewara dstDesc->addr = le64_to_cpu(srcDesc->addr); 236115924b6SShreyas Bhatewara *dst = le32_to_cpu(*src); 237115924b6SShreyas Bhatewara dstDesc->ext1 = le32_to_cpu(srcDesc->ext1); 238115924b6SShreyas Bhatewara } 239115924b6SShreyas Bhatewara 240115924b6SShreyas Bhatewara static void vmxnet3_TxDescToLe(const struct Vmxnet3_TxDesc *srcDesc, 241115924b6SShreyas Bhatewara struct Vmxnet3_TxDesc *dstDesc) 242115924b6SShreyas Bhatewara { 243115924b6SShreyas Bhatewara int i; 244115924b6SShreyas Bhatewara u32 *src = (u32 *)(srcDesc + 1); 245115924b6SShreyas Bhatewara u32 *dst = (u32 *)(dstDesc + 1); 246115924b6SShreyas Bhatewara 247115924b6SShreyas Bhatewara /* Working backwards so that the gen bit is set at the end. */ 248115924b6SShreyas Bhatewara for (i = 2; i > 0; i--) { 249115924b6SShreyas Bhatewara src--; 250115924b6SShreyas Bhatewara dst--; 251115924b6SShreyas Bhatewara *dst = cpu_to_le32(*src); 252115924b6SShreyas Bhatewara } 253115924b6SShreyas Bhatewara } 254115924b6SShreyas Bhatewara 255115924b6SShreyas Bhatewara 256115924b6SShreyas Bhatewara static void vmxnet3_RxCompToCPU(const struct Vmxnet3_RxCompDesc *srcDesc, 257115924b6SShreyas Bhatewara struct Vmxnet3_RxCompDesc *dstDesc) 258115924b6SShreyas Bhatewara { 259115924b6SShreyas Bhatewara int i = 0; 260115924b6SShreyas Bhatewara u32 *src = (u32 *)srcDesc; 261115924b6SShreyas Bhatewara u32 *dst = (u32 *)dstDesc; 262115924b6SShreyas Bhatewara for (i = 0; i < sizeof(struct Vmxnet3_RxCompDesc) / sizeof(u32); i++) { 263115924b6SShreyas Bhatewara *dst = le32_to_cpu(*src); 264115924b6SShreyas Bhatewara src++; 265115924b6SShreyas Bhatewara dst++; 266115924b6SShreyas Bhatewara } 267115924b6SShreyas Bhatewara } 268115924b6SShreyas Bhatewara 269115924b6SShreyas Bhatewara 270115924b6SShreyas Bhatewara /* Used to read bitfield values from double words. */ 271115924b6SShreyas Bhatewara static u32 get_bitfield32(const __le32 *bitfield, u32 pos, u32 size) 272115924b6SShreyas Bhatewara { 273115924b6SShreyas Bhatewara u32 temp = le32_to_cpu(*bitfield); 274115924b6SShreyas Bhatewara u32 mask = ((1 << size) - 1) << pos; 275115924b6SShreyas Bhatewara temp &= mask; 276115924b6SShreyas Bhatewara temp >>= pos; 277115924b6SShreyas Bhatewara return temp; 278115924b6SShreyas Bhatewara } 279115924b6SShreyas Bhatewara 280115924b6SShreyas Bhatewara 281115924b6SShreyas Bhatewara 282115924b6SShreyas Bhatewara #endif /* __BIG_ENDIAN_BITFIELD */ 283115924b6SShreyas Bhatewara 284115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 285115924b6SShreyas Bhatewara 286115924b6SShreyas Bhatewara # define VMXNET3_TXDESC_GET_GEN(txdesc) get_bitfield32(((const __le32 *) \ 287115924b6SShreyas Bhatewara txdesc) + VMXNET3_TXD_GEN_DWORD_SHIFT, \ 288115924b6SShreyas Bhatewara VMXNET3_TXD_GEN_SHIFT, VMXNET3_TXD_GEN_SIZE) 289115924b6SShreyas Bhatewara # define VMXNET3_TXDESC_GET_EOP(txdesc) get_bitfield32(((const __le32 *) \ 290115924b6SShreyas Bhatewara txdesc) + VMXNET3_TXD_EOP_DWORD_SHIFT, \ 291115924b6SShreyas Bhatewara VMXNET3_TXD_EOP_SHIFT, VMXNET3_TXD_EOP_SIZE) 292115924b6SShreyas Bhatewara # define VMXNET3_TCD_GET_GEN(tcd) get_bitfield32(((const __le32 *)tcd) + \ 293115924b6SShreyas Bhatewara VMXNET3_TCD_GEN_DWORD_SHIFT, VMXNET3_TCD_GEN_SHIFT, \ 294115924b6SShreyas Bhatewara VMXNET3_TCD_GEN_SIZE) 295115924b6SShreyas Bhatewara # define VMXNET3_TCD_GET_TXIDX(tcd) get_bitfield32((const __le32 *)tcd, \ 296115924b6SShreyas Bhatewara VMXNET3_TCD_TXIDX_SHIFT, VMXNET3_TCD_TXIDX_SIZE) 297115924b6SShreyas Bhatewara # define vmxnet3_getRxComp(dstrcd, rcd, tmp) do { \ 298115924b6SShreyas Bhatewara (dstrcd) = (tmp); \ 299115924b6SShreyas Bhatewara vmxnet3_RxCompToCPU((rcd), (tmp)); \ 300115924b6SShreyas Bhatewara } while (0) 301115924b6SShreyas Bhatewara # define vmxnet3_getRxDesc(dstrxd, rxd, tmp) do { \ 302115924b6SShreyas Bhatewara (dstrxd) = (tmp); \ 303115924b6SShreyas Bhatewara vmxnet3_RxDescToCPU((rxd), (tmp)); \ 304115924b6SShreyas Bhatewara } while (0) 305115924b6SShreyas Bhatewara 306115924b6SShreyas Bhatewara #else 307115924b6SShreyas Bhatewara 308115924b6SShreyas Bhatewara # define VMXNET3_TXDESC_GET_GEN(txdesc) ((txdesc)->gen) 309115924b6SShreyas Bhatewara # define VMXNET3_TXDESC_GET_EOP(txdesc) ((txdesc)->eop) 310115924b6SShreyas Bhatewara # define VMXNET3_TCD_GET_GEN(tcd) ((tcd)->gen) 311115924b6SShreyas Bhatewara # define VMXNET3_TCD_GET_TXIDX(tcd) ((tcd)->txdIdx) 312115924b6SShreyas Bhatewara # define vmxnet3_getRxComp(dstrcd, rcd, tmp) (dstrcd) = (rcd) 313115924b6SShreyas Bhatewara # define vmxnet3_getRxDesc(dstrxd, rxd, tmp) (dstrxd) = (rxd) 314115924b6SShreyas Bhatewara 315115924b6SShreyas Bhatewara #endif /* __BIG_ENDIAN_BITFIELD */ 316115924b6SShreyas Bhatewara 317d1a890faSShreyas Bhatewara 318d1a890faSShreyas Bhatewara static void 319d1a890faSShreyas Bhatewara vmxnet3_unmap_tx_buf(struct vmxnet3_tx_buf_info *tbi, 320d1a890faSShreyas Bhatewara struct pci_dev *pdev) 321d1a890faSShreyas Bhatewara { 322d1a890faSShreyas Bhatewara if (tbi->map_type == VMXNET3_MAP_SINGLE) 323d1a890faSShreyas Bhatewara pci_unmap_single(pdev, tbi->dma_addr, tbi->len, 324d1a890faSShreyas Bhatewara PCI_DMA_TODEVICE); 325d1a890faSShreyas Bhatewara else if (tbi->map_type == VMXNET3_MAP_PAGE) 326d1a890faSShreyas Bhatewara pci_unmap_page(pdev, tbi->dma_addr, tbi->len, 327d1a890faSShreyas Bhatewara PCI_DMA_TODEVICE); 328d1a890faSShreyas Bhatewara else 329d1a890faSShreyas Bhatewara BUG_ON(tbi->map_type != VMXNET3_MAP_NONE); 330d1a890faSShreyas Bhatewara 331d1a890faSShreyas Bhatewara tbi->map_type = VMXNET3_MAP_NONE; /* to help debugging */ 332d1a890faSShreyas Bhatewara } 333d1a890faSShreyas Bhatewara 334d1a890faSShreyas Bhatewara 335d1a890faSShreyas Bhatewara static int 336d1a890faSShreyas Bhatewara vmxnet3_unmap_pkt(u32 eop_idx, struct vmxnet3_tx_queue *tq, 337d1a890faSShreyas Bhatewara struct pci_dev *pdev, struct vmxnet3_adapter *adapter) 338d1a890faSShreyas Bhatewara { 339d1a890faSShreyas Bhatewara struct sk_buff *skb; 340d1a890faSShreyas Bhatewara int entries = 0; 341d1a890faSShreyas Bhatewara 342d1a890faSShreyas Bhatewara /* no out of order completion */ 343d1a890faSShreyas Bhatewara BUG_ON(tq->buf_info[eop_idx].sop_idx != tq->tx_ring.next2comp); 344115924b6SShreyas Bhatewara BUG_ON(VMXNET3_TXDESC_GET_EOP(&(tq->tx_ring.base[eop_idx].txd)) != 1); 345d1a890faSShreyas Bhatewara 346d1a890faSShreyas Bhatewara skb = tq->buf_info[eop_idx].skb; 347d1a890faSShreyas Bhatewara BUG_ON(skb == NULL); 348d1a890faSShreyas Bhatewara tq->buf_info[eop_idx].skb = NULL; 349d1a890faSShreyas Bhatewara 350d1a890faSShreyas Bhatewara VMXNET3_INC_RING_IDX_ONLY(eop_idx, tq->tx_ring.size); 351d1a890faSShreyas Bhatewara 352d1a890faSShreyas Bhatewara while (tq->tx_ring.next2comp != eop_idx) { 353d1a890faSShreyas Bhatewara vmxnet3_unmap_tx_buf(tq->buf_info + tq->tx_ring.next2comp, 354d1a890faSShreyas Bhatewara pdev); 355d1a890faSShreyas Bhatewara 356d1a890faSShreyas Bhatewara /* update next2comp w/o tx_lock. Since we are marking more, 357d1a890faSShreyas Bhatewara * instead of less, tx ring entries avail, the worst case is 358d1a890faSShreyas Bhatewara * that the tx routine incorrectly re-queues a pkt due to 359d1a890faSShreyas Bhatewara * insufficient tx ring entries. 360d1a890faSShreyas Bhatewara */ 361d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring); 362d1a890faSShreyas Bhatewara entries++; 363d1a890faSShreyas Bhatewara } 364d1a890faSShreyas Bhatewara 365d1a890faSShreyas Bhatewara dev_kfree_skb_any(skb); 366d1a890faSShreyas Bhatewara return entries; 367d1a890faSShreyas Bhatewara } 368d1a890faSShreyas Bhatewara 369d1a890faSShreyas Bhatewara 370d1a890faSShreyas Bhatewara static int 371d1a890faSShreyas Bhatewara vmxnet3_tq_tx_complete(struct vmxnet3_tx_queue *tq, 372d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 373d1a890faSShreyas Bhatewara { 374d1a890faSShreyas Bhatewara int completed = 0; 375d1a890faSShreyas Bhatewara union Vmxnet3_GenericDesc *gdesc; 376d1a890faSShreyas Bhatewara 377d1a890faSShreyas Bhatewara gdesc = tq->comp_ring.base + tq->comp_ring.next2proc; 378115924b6SShreyas Bhatewara while (VMXNET3_TCD_GET_GEN(&gdesc->tcd) == tq->comp_ring.gen) { 379115924b6SShreyas Bhatewara completed += vmxnet3_unmap_pkt(VMXNET3_TCD_GET_TXIDX( 380115924b6SShreyas Bhatewara &gdesc->tcd), tq, adapter->pdev, 381115924b6SShreyas Bhatewara adapter); 382d1a890faSShreyas Bhatewara 383d1a890faSShreyas Bhatewara vmxnet3_comp_ring_adv_next2proc(&tq->comp_ring); 384d1a890faSShreyas Bhatewara gdesc = tq->comp_ring.base + tq->comp_ring.next2proc; 385d1a890faSShreyas Bhatewara } 386d1a890faSShreyas Bhatewara 387d1a890faSShreyas Bhatewara if (completed) { 388d1a890faSShreyas Bhatewara spin_lock(&tq->tx_lock); 389d1a890faSShreyas Bhatewara if (unlikely(vmxnet3_tq_stopped(tq, adapter) && 390d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_desc_avail(&tq->tx_ring) > 391d1a890faSShreyas Bhatewara VMXNET3_WAKE_QUEUE_THRESHOLD(tq) && 392d1a890faSShreyas Bhatewara netif_carrier_ok(adapter->netdev))) { 393d1a890faSShreyas Bhatewara vmxnet3_tq_wake(tq, adapter); 394d1a890faSShreyas Bhatewara } 395d1a890faSShreyas Bhatewara spin_unlock(&tq->tx_lock); 396d1a890faSShreyas Bhatewara } 397d1a890faSShreyas Bhatewara return completed; 398d1a890faSShreyas Bhatewara } 399d1a890faSShreyas Bhatewara 400d1a890faSShreyas Bhatewara 401d1a890faSShreyas Bhatewara static void 402d1a890faSShreyas Bhatewara vmxnet3_tq_cleanup(struct vmxnet3_tx_queue *tq, 403d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 404d1a890faSShreyas Bhatewara { 405d1a890faSShreyas Bhatewara int i; 406d1a890faSShreyas Bhatewara 407d1a890faSShreyas Bhatewara while (tq->tx_ring.next2comp != tq->tx_ring.next2fill) { 408d1a890faSShreyas Bhatewara struct vmxnet3_tx_buf_info *tbi; 409d1a890faSShreyas Bhatewara 410d1a890faSShreyas Bhatewara tbi = tq->buf_info + tq->tx_ring.next2comp; 411d1a890faSShreyas Bhatewara 412d1a890faSShreyas Bhatewara vmxnet3_unmap_tx_buf(tbi, adapter->pdev); 413d1a890faSShreyas Bhatewara if (tbi->skb) { 414d1a890faSShreyas Bhatewara dev_kfree_skb_any(tbi->skb); 415d1a890faSShreyas Bhatewara tbi->skb = NULL; 416d1a890faSShreyas Bhatewara } 417d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring); 418d1a890faSShreyas Bhatewara } 419d1a890faSShreyas Bhatewara 420d1a890faSShreyas Bhatewara /* sanity check, verify all buffers are indeed unmapped and freed */ 421d1a890faSShreyas Bhatewara for (i = 0; i < tq->tx_ring.size; i++) { 422d1a890faSShreyas Bhatewara BUG_ON(tq->buf_info[i].skb != NULL || 423d1a890faSShreyas Bhatewara tq->buf_info[i].map_type != VMXNET3_MAP_NONE); 424d1a890faSShreyas Bhatewara } 425d1a890faSShreyas Bhatewara 426d1a890faSShreyas Bhatewara tq->tx_ring.gen = VMXNET3_INIT_GEN; 427d1a890faSShreyas Bhatewara tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0; 428d1a890faSShreyas Bhatewara 429d1a890faSShreyas Bhatewara tq->comp_ring.gen = VMXNET3_INIT_GEN; 430d1a890faSShreyas Bhatewara tq->comp_ring.next2proc = 0; 431d1a890faSShreyas Bhatewara } 432d1a890faSShreyas Bhatewara 433d1a890faSShreyas Bhatewara 43409c5088eSShreyas Bhatewara static void 435d1a890faSShreyas Bhatewara vmxnet3_tq_destroy(struct vmxnet3_tx_queue *tq, 436d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 437d1a890faSShreyas Bhatewara { 438d1a890faSShreyas Bhatewara if (tq->tx_ring.base) { 439d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, tq->tx_ring.size * 440d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxDesc), 441d1a890faSShreyas Bhatewara tq->tx_ring.base, tq->tx_ring.basePA); 442d1a890faSShreyas Bhatewara tq->tx_ring.base = NULL; 443d1a890faSShreyas Bhatewara } 444d1a890faSShreyas Bhatewara if (tq->data_ring.base) { 445d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, tq->data_ring.size * 446d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxDataDesc), 447d1a890faSShreyas Bhatewara tq->data_ring.base, tq->data_ring.basePA); 448d1a890faSShreyas Bhatewara tq->data_ring.base = NULL; 449d1a890faSShreyas Bhatewara } 450d1a890faSShreyas Bhatewara if (tq->comp_ring.base) { 451d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, tq->comp_ring.size * 452d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxCompDesc), 453d1a890faSShreyas Bhatewara tq->comp_ring.base, tq->comp_ring.basePA); 454d1a890faSShreyas Bhatewara tq->comp_ring.base = NULL; 455d1a890faSShreyas Bhatewara } 456d1a890faSShreyas Bhatewara kfree(tq->buf_info); 457d1a890faSShreyas Bhatewara tq->buf_info = NULL; 458d1a890faSShreyas Bhatewara } 459d1a890faSShreyas Bhatewara 460d1a890faSShreyas Bhatewara 46109c5088eSShreyas Bhatewara /* Destroy all tx queues */ 46209c5088eSShreyas Bhatewara void 46309c5088eSShreyas Bhatewara vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter) 46409c5088eSShreyas Bhatewara { 46509c5088eSShreyas Bhatewara int i; 46609c5088eSShreyas Bhatewara 46709c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 46809c5088eSShreyas Bhatewara vmxnet3_tq_destroy(&adapter->tx_queue[i], adapter); 46909c5088eSShreyas Bhatewara } 47009c5088eSShreyas Bhatewara 47109c5088eSShreyas Bhatewara 472d1a890faSShreyas Bhatewara static void 473d1a890faSShreyas Bhatewara vmxnet3_tq_init(struct vmxnet3_tx_queue *tq, 474d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 475d1a890faSShreyas Bhatewara { 476d1a890faSShreyas Bhatewara int i; 477d1a890faSShreyas Bhatewara 478d1a890faSShreyas Bhatewara /* reset the tx ring contents to 0 and reset the tx ring states */ 479d1a890faSShreyas Bhatewara memset(tq->tx_ring.base, 0, tq->tx_ring.size * 480d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxDesc)); 481d1a890faSShreyas Bhatewara tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0; 482d1a890faSShreyas Bhatewara tq->tx_ring.gen = VMXNET3_INIT_GEN; 483d1a890faSShreyas Bhatewara 484d1a890faSShreyas Bhatewara memset(tq->data_ring.base, 0, tq->data_ring.size * 485d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxDataDesc)); 486d1a890faSShreyas Bhatewara 487d1a890faSShreyas Bhatewara /* reset the tx comp ring contents to 0 and reset comp ring states */ 488d1a890faSShreyas Bhatewara memset(tq->comp_ring.base, 0, tq->comp_ring.size * 489d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxCompDesc)); 490d1a890faSShreyas Bhatewara tq->comp_ring.next2proc = 0; 491d1a890faSShreyas Bhatewara tq->comp_ring.gen = VMXNET3_INIT_GEN; 492d1a890faSShreyas Bhatewara 493d1a890faSShreyas Bhatewara /* reset the bookkeeping data */ 494d1a890faSShreyas Bhatewara memset(tq->buf_info, 0, sizeof(tq->buf_info[0]) * tq->tx_ring.size); 495d1a890faSShreyas Bhatewara for (i = 0; i < tq->tx_ring.size; i++) 496d1a890faSShreyas Bhatewara tq->buf_info[i].map_type = VMXNET3_MAP_NONE; 497d1a890faSShreyas Bhatewara 498d1a890faSShreyas Bhatewara /* stats are not reset */ 499d1a890faSShreyas Bhatewara } 500d1a890faSShreyas Bhatewara 501d1a890faSShreyas Bhatewara 502d1a890faSShreyas Bhatewara static int 503d1a890faSShreyas Bhatewara vmxnet3_tq_create(struct vmxnet3_tx_queue *tq, 504d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 505d1a890faSShreyas Bhatewara { 506d1a890faSShreyas Bhatewara BUG_ON(tq->tx_ring.base || tq->data_ring.base || 507d1a890faSShreyas Bhatewara tq->comp_ring.base || tq->buf_info); 508d1a890faSShreyas Bhatewara 509d1a890faSShreyas Bhatewara tq->tx_ring.base = pci_alloc_consistent(adapter->pdev, tq->tx_ring.size 510d1a890faSShreyas Bhatewara * sizeof(struct Vmxnet3_TxDesc), 511d1a890faSShreyas Bhatewara &tq->tx_ring.basePA); 512d1a890faSShreyas Bhatewara if (!tq->tx_ring.base) { 513d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate tx ring\n", 514d1a890faSShreyas Bhatewara adapter->netdev->name); 515d1a890faSShreyas Bhatewara goto err; 516d1a890faSShreyas Bhatewara } 517d1a890faSShreyas Bhatewara 518d1a890faSShreyas Bhatewara tq->data_ring.base = pci_alloc_consistent(adapter->pdev, 519d1a890faSShreyas Bhatewara tq->data_ring.size * 520d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxDataDesc), 521d1a890faSShreyas Bhatewara &tq->data_ring.basePA); 522d1a890faSShreyas Bhatewara if (!tq->data_ring.base) { 523d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate data ring\n", 524d1a890faSShreyas Bhatewara adapter->netdev->name); 525d1a890faSShreyas Bhatewara goto err; 526d1a890faSShreyas Bhatewara } 527d1a890faSShreyas Bhatewara 528d1a890faSShreyas Bhatewara tq->comp_ring.base = pci_alloc_consistent(adapter->pdev, 529d1a890faSShreyas Bhatewara tq->comp_ring.size * 530d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxCompDesc), 531d1a890faSShreyas Bhatewara &tq->comp_ring.basePA); 532d1a890faSShreyas Bhatewara if (!tq->comp_ring.base) { 533d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate tx comp ring\n", 534d1a890faSShreyas Bhatewara adapter->netdev->name); 535d1a890faSShreyas Bhatewara goto err; 536d1a890faSShreyas Bhatewara } 537d1a890faSShreyas Bhatewara 538d1a890faSShreyas Bhatewara tq->buf_info = kcalloc(tq->tx_ring.size, sizeof(tq->buf_info[0]), 539d1a890faSShreyas Bhatewara GFP_KERNEL); 540e404decbSJoe Perches if (!tq->buf_info) 541d1a890faSShreyas Bhatewara goto err; 542d1a890faSShreyas Bhatewara 543d1a890faSShreyas Bhatewara return 0; 544d1a890faSShreyas Bhatewara 545d1a890faSShreyas Bhatewara err: 546d1a890faSShreyas Bhatewara vmxnet3_tq_destroy(tq, adapter); 547d1a890faSShreyas Bhatewara return -ENOMEM; 548d1a890faSShreyas Bhatewara } 549d1a890faSShreyas Bhatewara 55009c5088eSShreyas Bhatewara static void 55109c5088eSShreyas Bhatewara vmxnet3_tq_cleanup_all(struct vmxnet3_adapter *adapter) 55209c5088eSShreyas Bhatewara { 55309c5088eSShreyas Bhatewara int i; 55409c5088eSShreyas Bhatewara 55509c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 55609c5088eSShreyas Bhatewara vmxnet3_tq_cleanup(&adapter->tx_queue[i], adapter); 55709c5088eSShreyas Bhatewara } 558d1a890faSShreyas Bhatewara 559d1a890faSShreyas Bhatewara /* 560d1a890faSShreyas Bhatewara * starting from ring->next2fill, allocate rx buffers for the given ring 561d1a890faSShreyas Bhatewara * of the rx queue and update the rx desc. stop after @num_to_alloc buffers 562d1a890faSShreyas Bhatewara * are allocated or allocation fails 563d1a890faSShreyas Bhatewara */ 564d1a890faSShreyas Bhatewara 565d1a890faSShreyas Bhatewara static int 566d1a890faSShreyas Bhatewara vmxnet3_rq_alloc_rx_buf(struct vmxnet3_rx_queue *rq, u32 ring_idx, 567d1a890faSShreyas Bhatewara int num_to_alloc, struct vmxnet3_adapter *adapter) 568d1a890faSShreyas Bhatewara { 569d1a890faSShreyas Bhatewara int num_allocated = 0; 570d1a890faSShreyas Bhatewara struct vmxnet3_rx_buf_info *rbi_base = rq->buf_info[ring_idx]; 571d1a890faSShreyas Bhatewara struct vmxnet3_cmd_ring *ring = &rq->rx_ring[ring_idx]; 572d1a890faSShreyas Bhatewara u32 val; 573d1a890faSShreyas Bhatewara 5745318d809SShreyas Bhatewara while (num_allocated <= num_to_alloc) { 575d1a890faSShreyas Bhatewara struct vmxnet3_rx_buf_info *rbi; 576d1a890faSShreyas Bhatewara union Vmxnet3_GenericDesc *gd; 577d1a890faSShreyas Bhatewara 578d1a890faSShreyas Bhatewara rbi = rbi_base + ring->next2fill; 579d1a890faSShreyas Bhatewara gd = ring->base + ring->next2fill; 580d1a890faSShreyas Bhatewara 581d1a890faSShreyas Bhatewara if (rbi->buf_type == VMXNET3_RX_BUF_SKB) { 582d1a890faSShreyas Bhatewara if (rbi->skb == NULL) { 583d1a890faSShreyas Bhatewara rbi->skb = dev_alloc_skb(rbi->len + 584d1a890faSShreyas Bhatewara NET_IP_ALIGN); 585d1a890faSShreyas Bhatewara if (unlikely(rbi->skb == NULL)) { 586d1a890faSShreyas Bhatewara rq->stats.rx_buf_alloc_failure++; 587d1a890faSShreyas Bhatewara break; 588d1a890faSShreyas Bhatewara } 589d1a890faSShreyas Bhatewara rbi->skb->dev = adapter->netdev; 590d1a890faSShreyas Bhatewara 591d1a890faSShreyas Bhatewara skb_reserve(rbi->skb, NET_IP_ALIGN); 592d1a890faSShreyas Bhatewara rbi->dma_addr = pci_map_single(adapter->pdev, 593d1a890faSShreyas Bhatewara rbi->skb->data, rbi->len, 594d1a890faSShreyas Bhatewara PCI_DMA_FROMDEVICE); 595d1a890faSShreyas Bhatewara } else { 596d1a890faSShreyas Bhatewara /* rx buffer skipped by the device */ 597d1a890faSShreyas Bhatewara } 598d1a890faSShreyas Bhatewara val = VMXNET3_RXD_BTYPE_HEAD << VMXNET3_RXD_BTYPE_SHIFT; 599d1a890faSShreyas Bhatewara } else { 600d1a890faSShreyas Bhatewara BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE || 601d1a890faSShreyas Bhatewara rbi->len != PAGE_SIZE); 602d1a890faSShreyas Bhatewara 603d1a890faSShreyas Bhatewara if (rbi->page == NULL) { 604d1a890faSShreyas Bhatewara rbi->page = alloc_page(GFP_ATOMIC); 605d1a890faSShreyas Bhatewara if (unlikely(rbi->page == NULL)) { 606d1a890faSShreyas Bhatewara rq->stats.rx_buf_alloc_failure++; 607d1a890faSShreyas Bhatewara break; 608d1a890faSShreyas Bhatewara } 609d1a890faSShreyas Bhatewara rbi->dma_addr = pci_map_page(adapter->pdev, 610d1a890faSShreyas Bhatewara rbi->page, 0, PAGE_SIZE, 611d1a890faSShreyas Bhatewara PCI_DMA_FROMDEVICE); 612d1a890faSShreyas Bhatewara } else { 613d1a890faSShreyas Bhatewara /* rx buffers skipped by the device */ 614d1a890faSShreyas Bhatewara } 615d1a890faSShreyas Bhatewara val = VMXNET3_RXD_BTYPE_BODY << VMXNET3_RXD_BTYPE_SHIFT; 616d1a890faSShreyas Bhatewara } 617d1a890faSShreyas Bhatewara 618d1a890faSShreyas Bhatewara BUG_ON(rbi->dma_addr == 0); 619115924b6SShreyas Bhatewara gd->rxd.addr = cpu_to_le64(rbi->dma_addr); 6205318d809SShreyas Bhatewara gd->dword[2] = cpu_to_le32((!ring->gen << VMXNET3_RXD_GEN_SHIFT) 621115924b6SShreyas Bhatewara | val | rbi->len); 622d1a890faSShreyas Bhatewara 6235318d809SShreyas Bhatewara /* Fill the last buffer but dont mark it ready, or else the 6245318d809SShreyas Bhatewara * device will think that the queue is full */ 6255318d809SShreyas Bhatewara if (num_allocated == num_to_alloc) 6265318d809SShreyas Bhatewara break; 6275318d809SShreyas Bhatewara 6285318d809SShreyas Bhatewara gd->dword[2] |= cpu_to_le32(ring->gen << VMXNET3_RXD_GEN_SHIFT); 629d1a890faSShreyas Bhatewara num_allocated++; 630d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_adv_next2fill(ring); 631d1a890faSShreyas Bhatewara } 632d1a890faSShreyas Bhatewara rq->uncommitted[ring_idx] += num_allocated; 633d1a890faSShreyas Bhatewara 634f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 635f6965582SRandy Dunlap "alloc_rx_buf: %d allocated, next2fill %u, next2comp " 636c3ca881fSMasanari Iida "%u, uncommitted %u\n", num_allocated, ring->next2fill, 637d1a890faSShreyas Bhatewara ring->next2comp, rq->uncommitted[ring_idx]); 638d1a890faSShreyas Bhatewara 639d1a890faSShreyas Bhatewara /* so that the device can distinguish a full ring and an empty ring */ 640d1a890faSShreyas Bhatewara BUG_ON(num_allocated != 0 && ring->next2fill == ring->next2comp); 641d1a890faSShreyas Bhatewara 642d1a890faSShreyas Bhatewara return num_allocated; 643d1a890faSShreyas Bhatewara } 644d1a890faSShreyas Bhatewara 645d1a890faSShreyas Bhatewara 646d1a890faSShreyas Bhatewara static void 647d1a890faSShreyas Bhatewara vmxnet3_append_frag(struct sk_buff *skb, struct Vmxnet3_RxCompDesc *rcd, 648d1a890faSShreyas Bhatewara struct vmxnet3_rx_buf_info *rbi) 649d1a890faSShreyas Bhatewara { 650d1a890faSShreyas Bhatewara struct skb_frag_struct *frag = skb_shinfo(skb)->frags + 651d1a890faSShreyas Bhatewara skb_shinfo(skb)->nr_frags; 652d1a890faSShreyas Bhatewara 653d1a890faSShreyas Bhatewara BUG_ON(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS); 654d1a890faSShreyas Bhatewara 6550e0634d2SIan Campbell __skb_frag_set_page(frag, rbi->page); 656d1a890faSShreyas Bhatewara frag->page_offset = 0; 6579e903e08SEric Dumazet skb_frag_size_set(frag, rcd->len); 6589e903e08SEric Dumazet skb->data_len += rcd->len; 6595e6c355cSEric Dumazet skb->truesize += PAGE_SIZE; 660d1a890faSShreyas Bhatewara skb_shinfo(skb)->nr_frags++; 661d1a890faSShreyas Bhatewara } 662d1a890faSShreyas Bhatewara 663d1a890faSShreyas Bhatewara 664d1a890faSShreyas Bhatewara static void 665d1a890faSShreyas Bhatewara vmxnet3_map_pkt(struct sk_buff *skb, struct vmxnet3_tx_ctx *ctx, 666d1a890faSShreyas Bhatewara struct vmxnet3_tx_queue *tq, struct pci_dev *pdev, 667d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 668d1a890faSShreyas Bhatewara { 669d1a890faSShreyas Bhatewara u32 dw2, len; 670d1a890faSShreyas Bhatewara unsigned long buf_offset; 671d1a890faSShreyas Bhatewara int i; 672d1a890faSShreyas Bhatewara union Vmxnet3_GenericDesc *gdesc; 673d1a890faSShreyas Bhatewara struct vmxnet3_tx_buf_info *tbi = NULL; 674d1a890faSShreyas Bhatewara 675d1a890faSShreyas Bhatewara BUG_ON(ctx->copy_size > skb_headlen(skb)); 676d1a890faSShreyas Bhatewara 677d1a890faSShreyas Bhatewara /* use the previous gen bit for the SOP desc */ 678d1a890faSShreyas Bhatewara dw2 = (tq->tx_ring.gen ^ 0x1) << VMXNET3_TXD_GEN_SHIFT; 679d1a890faSShreyas Bhatewara 680d1a890faSShreyas Bhatewara ctx->sop_txd = tq->tx_ring.base + tq->tx_ring.next2fill; 681d1a890faSShreyas Bhatewara gdesc = ctx->sop_txd; /* both loops below can be skipped */ 682d1a890faSShreyas Bhatewara 683d1a890faSShreyas Bhatewara /* no need to map the buffer if headers are copied */ 684d1a890faSShreyas Bhatewara if (ctx->copy_size) { 685115924b6SShreyas Bhatewara ctx->sop_txd->txd.addr = cpu_to_le64(tq->data_ring.basePA + 686d1a890faSShreyas Bhatewara tq->tx_ring.next2fill * 687115924b6SShreyas Bhatewara sizeof(struct Vmxnet3_TxDataDesc)); 688115924b6SShreyas Bhatewara ctx->sop_txd->dword[2] = cpu_to_le32(dw2 | ctx->copy_size); 689d1a890faSShreyas Bhatewara ctx->sop_txd->dword[3] = 0; 690d1a890faSShreyas Bhatewara 691d1a890faSShreyas Bhatewara tbi = tq->buf_info + tq->tx_ring.next2fill; 692d1a890faSShreyas Bhatewara tbi->map_type = VMXNET3_MAP_NONE; 693d1a890faSShreyas Bhatewara 694f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 695f6965582SRandy Dunlap "txd[%u]: 0x%Lx 0x%x 0x%x\n", 696115924b6SShreyas Bhatewara tq->tx_ring.next2fill, 697115924b6SShreyas Bhatewara le64_to_cpu(ctx->sop_txd->txd.addr), 698d1a890faSShreyas Bhatewara ctx->sop_txd->dword[2], ctx->sop_txd->dword[3]); 699d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); 700d1a890faSShreyas Bhatewara 701d1a890faSShreyas Bhatewara /* use the right gen for non-SOP desc */ 702d1a890faSShreyas Bhatewara dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; 703d1a890faSShreyas Bhatewara } 704d1a890faSShreyas Bhatewara 705d1a890faSShreyas Bhatewara /* linear part can use multiple tx desc if it's big */ 706d1a890faSShreyas Bhatewara len = skb_headlen(skb) - ctx->copy_size; 707d1a890faSShreyas Bhatewara buf_offset = ctx->copy_size; 708d1a890faSShreyas Bhatewara while (len) { 709d1a890faSShreyas Bhatewara u32 buf_size; 710d1a890faSShreyas Bhatewara 7111f4b1612SBhavesh Davda if (len < VMXNET3_MAX_TX_BUF_SIZE) { 7121f4b1612SBhavesh Davda buf_size = len; 7131f4b1612SBhavesh Davda dw2 |= len; 7141f4b1612SBhavesh Davda } else { 7151f4b1612SBhavesh Davda buf_size = VMXNET3_MAX_TX_BUF_SIZE; 7161f4b1612SBhavesh Davda /* spec says that for TxDesc.len, 0 == 2^14 */ 7171f4b1612SBhavesh Davda } 718d1a890faSShreyas Bhatewara 719d1a890faSShreyas Bhatewara tbi = tq->buf_info + tq->tx_ring.next2fill; 720d1a890faSShreyas Bhatewara tbi->map_type = VMXNET3_MAP_SINGLE; 721d1a890faSShreyas Bhatewara tbi->dma_addr = pci_map_single(adapter->pdev, 722d1a890faSShreyas Bhatewara skb->data + buf_offset, buf_size, 723d1a890faSShreyas Bhatewara PCI_DMA_TODEVICE); 724d1a890faSShreyas Bhatewara 7251f4b1612SBhavesh Davda tbi->len = buf_size; 726d1a890faSShreyas Bhatewara 727d1a890faSShreyas Bhatewara gdesc = tq->tx_ring.base + tq->tx_ring.next2fill; 728d1a890faSShreyas Bhatewara BUG_ON(gdesc->txd.gen == tq->tx_ring.gen); 729d1a890faSShreyas Bhatewara 730115924b6SShreyas Bhatewara gdesc->txd.addr = cpu_to_le64(tbi->dma_addr); 7311f4b1612SBhavesh Davda gdesc->dword[2] = cpu_to_le32(dw2); 732d1a890faSShreyas Bhatewara gdesc->dword[3] = 0; 733d1a890faSShreyas Bhatewara 734f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 735f6965582SRandy Dunlap "txd[%u]: 0x%Lx 0x%x 0x%x\n", 736115924b6SShreyas Bhatewara tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr), 737115924b6SShreyas Bhatewara le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]); 738d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); 739d1a890faSShreyas Bhatewara dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; 740d1a890faSShreyas Bhatewara 741d1a890faSShreyas Bhatewara len -= buf_size; 742d1a890faSShreyas Bhatewara buf_offset += buf_size; 743d1a890faSShreyas Bhatewara } 744d1a890faSShreyas Bhatewara 745d1a890faSShreyas Bhatewara for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 7469e903e08SEric Dumazet const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i]; 747d1a890faSShreyas Bhatewara 748d1a890faSShreyas Bhatewara tbi = tq->buf_info + tq->tx_ring.next2fill; 749d1a890faSShreyas Bhatewara tbi->map_type = VMXNET3_MAP_PAGE; 7500e0634d2SIan Campbell tbi->dma_addr = skb_frag_dma_map(&adapter->pdev->dev, frag, 7519e903e08SEric Dumazet 0, skb_frag_size(frag), 7525d6bcdfeSIan Campbell DMA_TO_DEVICE); 753d1a890faSShreyas Bhatewara 7549e903e08SEric Dumazet tbi->len = skb_frag_size(frag); 755d1a890faSShreyas Bhatewara 756d1a890faSShreyas Bhatewara gdesc = tq->tx_ring.base + tq->tx_ring.next2fill; 757d1a890faSShreyas Bhatewara BUG_ON(gdesc->txd.gen == tq->tx_ring.gen); 758d1a890faSShreyas Bhatewara 759115924b6SShreyas Bhatewara gdesc->txd.addr = cpu_to_le64(tbi->dma_addr); 7609e903e08SEric Dumazet gdesc->dword[2] = cpu_to_le32(dw2 | skb_frag_size(frag)); 761d1a890faSShreyas Bhatewara gdesc->dword[3] = 0; 762d1a890faSShreyas Bhatewara 763f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 764f6965582SRandy Dunlap "txd[%u]: 0x%llu %u %u\n", 765115924b6SShreyas Bhatewara tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr), 766115924b6SShreyas Bhatewara le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]); 767d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); 768d1a890faSShreyas Bhatewara dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; 769d1a890faSShreyas Bhatewara } 770d1a890faSShreyas Bhatewara 771d1a890faSShreyas Bhatewara ctx->eop_txd = gdesc; 772d1a890faSShreyas Bhatewara 773d1a890faSShreyas Bhatewara /* set the last buf_info for the pkt */ 774d1a890faSShreyas Bhatewara tbi->skb = skb; 775d1a890faSShreyas Bhatewara tbi->sop_idx = ctx->sop_txd - tq->tx_ring.base; 776d1a890faSShreyas Bhatewara } 777d1a890faSShreyas Bhatewara 778d1a890faSShreyas Bhatewara 77909c5088eSShreyas Bhatewara /* Init all tx queues */ 78009c5088eSShreyas Bhatewara static void 78109c5088eSShreyas Bhatewara vmxnet3_tq_init_all(struct vmxnet3_adapter *adapter) 78209c5088eSShreyas Bhatewara { 78309c5088eSShreyas Bhatewara int i; 78409c5088eSShreyas Bhatewara 78509c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 78609c5088eSShreyas Bhatewara vmxnet3_tq_init(&adapter->tx_queue[i], adapter); 78709c5088eSShreyas Bhatewara } 78809c5088eSShreyas Bhatewara 78909c5088eSShreyas Bhatewara 790d1a890faSShreyas Bhatewara /* 791d1a890faSShreyas Bhatewara * parse and copy relevant protocol headers: 792d1a890faSShreyas Bhatewara * For a tso pkt, relevant headers are L2/3/4 including options 793d1a890faSShreyas Bhatewara * For a pkt requesting csum offloading, they are L2/3 and may include L4 794d1a890faSShreyas Bhatewara * if it's a TCP/UDP pkt 795d1a890faSShreyas Bhatewara * 796d1a890faSShreyas Bhatewara * Returns: 797d1a890faSShreyas Bhatewara * -1: error happens during parsing 798d1a890faSShreyas Bhatewara * 0: protocol headers parsed, but too big to be copied 799d1a890faSShreyas Bhatewara * 1: protocol headers parsed and copied 800d1a890faSShreyas Bhatewara * 801d1a890faSShreyas Bhatewara * Other effects: 802d1a890faSShreyas Bhatewara * 1. related *ctx fields are updated. 803d1a890faSShreyas Bhatewara * 2. ctx->copy_size is # of bytes copied 804d1a890faSShreyas Bhatewara * 3. the portion copied is guaranteed to be in the linear part 805d1a890faSShreyas Bhatewara * 806d1a890faSShreyas Bhatewara */ 807d1a890faSShreyas Bhatewara static int 808d1a890faSShreyas Bhatewara vmxnet3_parse_and_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq, 809d1a890faSShreyas Bhatewara struct vmxnet3_tx_ctx *ctx, 810d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 811d1a890faSShreyas Bhatewara { 812d1a890faSShreyas Bhatewara struct Vmxnet3_TxDataDesc *tdd; 813d1a890faSShreyas Bhatewara 8140d0b1672SMichał Mirosław if (ctx->mss) { /* TSO */ 815d1a890faSShreyas Bhatewara ctx->eth_ip_hdr_size = skb_transport_offset(skb); 8168bca5d1eSEric Dumazet ctx->l4_hdr_size = tcp_hdrlen(skb); 817d1a890faSShreyas Bhatewara ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size; 818d1a890faSShreyas Bhatewara } else { 819d1a890faSShreyas Bhatewara if (skb->ip_summed == CHECKSUM_PARTIAL) { 8200d0b1672SMichał Mirosław ctx->eth_ip_hdr_size = skb_checksum_start_offset(skb); 821d1a890faSShreyas Bhatewara 822d1a890faSShreyas Bhatewara if (ctx->ipv4) { 8238bca5d1eSEric Dumazet const struct iphdr *iph = ip_hdr(skb); 8248bca5d1eSEric Dumazet 82539d4a96fSShreyas Bhatewara if (iph->protocol == IPPROTO_TCP) 8268bca5d1eSEric Dumazet ctx->l4_hdr_size = tcp_hdrlen(skb); 82739d4a96fSShreyas Bhatewara else if (iph->protocol == IPPROTO_UDP) 828f6a1ad42SDavid S. Miller ctx->l4_hdr_size = sizeof(struct udphdr); 82939d4a96fSShreyas Bhatewara else 830d1a890faSShreyas Bhatewara ctx->l4_hdr_size = 0; 831d1a890faSShreyas Bhatewara } else { 832d1a890faSShreyas Bhatewara /* for simplicity, don't copy L4 headers */ 833d1a890faSShreyas Bhatewara ctx->l4_hdr_size = 0; 834d1a890faSShreyas Bhatewara } 835b203262dSNeil Horman ctx->copy_size = min(ctx->eth_ip_hdr_size + 836b203262dSNeil Horman ctx->l4_hdr_size, skb->len); 837d1a890faSShreyas Bhatewara } else { 838d1a890faSShreyas Bhatewara ctx->eth_ip_hdr_size = 0; 839d1a890faSShreyas Bhatewara ctx->l4_hdr_size = 0; 840d1a890faSShreyas Bhatewara /* copy as much as allowed */ 841d1a890faSShreyas Bhatewara ctx->copy_size = min((unsigned int)VMXNET3_HDR_COPY_SIZE 842d1a890faSShreyas Bhatewara , skb_headlen(skb)); 843d1a890faSShreyas Bhatewara } 844d1a890faSShreyas Bhatewara 845d1a890faSShreyas Bhatewara /* make sure headers are accessible directly */ 846d1a890faSShreyas Bhatewara if (unlikely(!pskb_may_pull(skb, ctx->copy_size))) 847d1a890faSShreyas Bhatewara goto err; 848d1a890faSShreyas Bhatewara } 849d1a890faSShreyas Bhatewara 850d1a890faSShreyas Bhatewara if (unlikely(ctx->copy_size > VMXNET3_HDR_COPY_SIZE)) { 851d1a890faSShreyas Bhatewara tq->stats.oversized_hdr++; 852d1a890faSShreyas Bhatewara ctx->copy_size = 0; 853d1a890faSShreyas Bhatewara return 0; 854d1a890faSShreyas Bhatewara } 855d1a890faSShreyas Bhatewara 856d1a890faSShreyas Bhatewara tdd = tq->data_ring.base + tq->tx_ring.next2fill; 857d1a890faSShreyas Bhatewara 858d1a890faSShreyas Bhatewara memcpy(tdd->data, skb->data, ctx->copy_size); 859f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 860f6965582SRandy Dunlap "copy %u bytes to dataRing[%u]\n", 861d1a890faSShreyas Bhatewara ctx->copy_size, tq->tx_ring.next2fill); 862d1a890faSShreyas Bhatewara return 1; 863d1a890faSShreyas Bhatewara 864d1a890faSShreyas Bhatewara err: 865d1a890faSShreyas Bhatewara return -1; 866d1a890faSShreyas Bhatewara } 867d1a890faSShreyas Bhatewara 868d1a890faSShreyas Bhatewara 869d1a890faSShreyas Bhatewara static void 870d1a890faSShreyas Bhatewara vmxnet3_prepare_tso(struct sk_buff *skb, 871d1a890faSShreyas Bhatewara struct vmxnet3_tx_ctx *ctx) 872d1a890faSShreyas Bhatewara { 8738bca5d1eSEric Dumazet struct tcphdr *tcph = tcp_hdr(skb); 8748bca5d1eSEric Dumazet 875d1a890faSShreyas Bhatewara if (ctx->ipv4) { 8768bca5d1eSEric Dumazet struct iphdr *iph = ip_hdr(skb); 8778bca5d1eSEric Dumazet 878d1a890faSShreyas Bhatewara iph->check = 0; 879d1a890faSShreyas Bhatewara tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0, 880d1a890faSShreyas Bhatewara IPPROTO_TCP, 0); 881d1a890faSShreyas Bhatewara } else { 8828bca5d1eSEric Dumazet struct ipv6hdr *iph = ipv6_hdr(skb); 8838bca5d1eSEric Dumazet 884d1a890faSShreyas Bhatewara tcph->check = ~csum_ipv6_magic(&iph->saddr, &iph->daddr, 0, 885d1a890faSShreyas Bhatewara IPPROTO_TCP, 0); 886d1a890faSShreyas Bhatewara } 887d1a890faSShreyas Bhatewara } 888d1a890faSShreyas Bhatewara 889d1a890faSShreyas Bhatewara 890d1a890faSShreyas Bhatewara /* 891d1a890faSShreyas Bhatewara * Transmits a pkt thru a given tq 892d1a890faSShreyas Bhatewara * Returns: 893d1a890faSShreyas Bhatewara * NETDEV_TX_OK: descriptors are setup successfully 89425985edcSLucas De Marchi * NETDEV_TX_OK: error occurred, the pkt is dropped 895d1a890faSShreyas Bhatewara * NETDEV_TX_BUSY: tx ring is full, queue is stopped 896d1a890faSShreyas Bhatewara * 897d1a890faSShreyas Bhatewara * Side-effects: 898d1a890faSShreyas Bhatewara * 1. tx ring may be changed 899d1a890faSShreyas Bhatewara * 2. tq stats may be updated accordingly 900d1a890faSShreyas Bhatewara * 3. shared->txNumDeferred may be updated 901d1a890faSShreyas Bhatewara */ 902d1a890faSShreyas Bhatewara 903d1a890faSShreyas Bhatewara static int 904d1a890faSShreyas Bhatewara vmxnet3_tq_xmit(struct sk_buff *skb, struct vmxnet3_tx_queue *tq, 905d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter, struct net_device *netdev) 906d1a890faSShreyas Bhatewara { 907d1a890faSShreyas Bhatewara int ret; 908d1a890faSShreyas Bhatewara u32 count; 909d1a890faSShreyas Bhatewara unsigned long flags; 910d1a890faSShreyas Bhatewara struct vmxnet3_tx_ctx ctx; 911d1a890faSShreyas Bhatewara union Vmxnet3_GenericDesc *gdesc; 912115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 913115924b6SShreyas Bhatewara /* Use temporary descriptor to avoid touching bits multiple times */ 914115924b6SShreyas Bhatewara union Vmxnet3_GenericDesc tempTxDesc; 915115924b6SShreyas Bhatewara #endif 916d1a890faSShreyas Bhatewara 917d1a890faSShreyas Bhatewara /* conservatively estimate # of descriptors to use */ 918d1a890faSShreyas Bhatewara count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 919d1a890faSShreyas Bhatewara skb_shinfo(skb)->nr_frags + 1; 920d1a890faSShreyas Bhatewara 92172e85c45SJesse Gross ctx.ipv4 = (vlan_get_protocol(skb) == cpu_to_be16(ETH_P_IP)); 922d1a890faSShreyas Bhatewara 923d1a890faSShreyas Bhatewara ctx.mss = skb_shinfo(skb)->gso_size; 924d1a890faSShreyas Bhatewara if (ctx.mss) { 925d1a890faSShreyas Bhatewara if (skb_header_cloned(skb)) { 926d1a890faSShreyas Bhatewara if (unlikely(pskb_expand_head(skb, 0, 0, 927d1a890faSShreyas Bhatewara GFP_ATOMIC) != 0)) { 928d1a890faSShreyas Bhatewara tq->stats.drop_tso++; 929d1a890faSShreyas Bhatewara goto drop_pkt; 930d1a890faSShreyas Bhatewara } 931d1a890faSShreyas Bhatewara tq->stats.copy_skb_header++; 932d1a890faSShreyas Bhatewara } 933d1a890faSShreyas Bhatewara vmxnet3_prepare_tso(skb, &ctx); 934d1a890faSShreyas Bhatewara } else { 935d1a890faSShreyas Bhatewara if (unlikely(count > VMXNET3_MAX_TXD_PER_PKT)) { 936d1a890faSShreyas Bhatewara 937d1a890faSShreyas Bhatewara /* non-tso pkts must not use more than 938d1a890faSShreyas Bhatewara * VMXNET3_MAX_TXD_PER_PKT entries 939d1a890faSShreyas Bhatewara */ 940d1a890faSShreyas Bhatewara if (skb_linearize(skb) != 0) { 941d1a890faSShreyas Bhatewara tq->stats.drop_too_many_frags++; 942d1a890faSShreyas Bhatewara goto drop_pkt; 943d1a890faSShreyas Bhatewara } 944d1a890faSShreyas Bhatewara tq->stats.linearized++; 945d1a890faSShreyas Bhatewara 946d1a890faSShreyas Bhatewara /* recalculate the # of descriptors to use */ 947d1a890faSShreyas Bhatewara count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1; 948d1a890faSShreyas Bhatewara } 949d1a890faSShreyas Bhatewara } 950d1a890faSShreyas Bhatewara 95109c5088eSShreyas Bhatewara spin_lock_irqsave(&tq->tx_lock, flags); 95209c5088eSShreyas Bhatewara 95309c5088eSShreyas Bhatewara if (count > vmxnet3_cmd_ring_desc_avail(&tq->tx_ring)) { 95409c5088eSShreyas Bhatewara tq->stats.tx_ring_full++; 95509c5088eSShreyas Bhatewara dev_dbg(&adapter->netdev->dev, 95609c5088eSShreyas Bhatewara "tx queue stopped on %s, next2comp %u" 95709c5088eSShreyas Bhatewara " next2fill %u\n", adapter->netdev->name, 95809c5088eSShreyas Bhatewara tq->tx_ring.next2comp, tq->tx_ring.next2fill); 95909c5088eSShreyas Bhatewara 96009c5088eSShreyas Bhatewara vmxnet3_tq_stop(tq, adapter); 96109c5088eSShreyas Bhatewara spin_unlock_irqrestore(&tq->tx_lock, flags); 96209c5088eSShreyas Bhatewara return NETDEV_TX_BUSY; 96309c5088eSShreyas Bhatewara } 96409c5088eSShreyas Bhatewara 96509c5088eSShreyas Bhatewara 966d1a890faSShreyas Bhatewara ret = vmxnet3_parse_and_copy_hdr(skb, tq, &ctx, adapter); 967d1a890faSShreyas Bhatewara if (ret >= 0) { 968d1a890faSShreyas Bhatewara BUG_ON(ret <= 0 && ctx.copy_size != 0); 969d1a890faSShreyas Bhatewara /* hdrs parsed, check against other limits */ 970d1a890faSShreyas Bhatewara if (ctx.mss) { 971d1a890faSShreyas Bhatewara if (unlikely(ctx.eth_ip_hdr_size + ctx.l4_hdr_size > 972d1a890faSShreyas Bhatewara VMXNET3_MAX_TX_BUF_SIZE)) { 973d1a890faSShreyas Bhatewara goto hdr_too_big; 974d1a890faSShreyas Bhatewara } 975d1a890faSShreyas Bhatewara } else { 976d1a890faSShreyas Bhatewara if (skb->ip_summed == CHECKSUM_PARTIAL) { 977d1a890faSShreyas Bhatewara if (unlikely(ctx.eth_ip_hdr_size + 978d1a890faSShreyas Bhatewara skb->csum_offset > 979d1a890faSShreyas Bhatewara VMXNET3_MAX_CSUM_OFFSET)) { 980d1a890faSShreyas Bhatewara goto hdr_too_big; 981d1a890faSShreyas Bhatewara } 982d1a890faSShreyas Bhatewara } 983d1a890faSShreyas Bhatewara } 984d1a890faSShreyas Bhatewara } else { 985d1a890faSShreyas Bhatewara tq->stats.drop_hdr_inspect_err++; 986f955e141SDan Carpenter goto unlock_drop_pkt; 987d1a890faSShreyas Bhatewara } 988d1a890faSShreyas Bhatewara 989d1a890faSShreyas Bhatewara /* fill tx descs related to addr & len */ 990d1a890faSShreyas Bhatewara vmxnet3_map_pkt(skb, &ctx, tq, adapter->pdev, adapter); 991d1a890faSShreyas Bhatewara 992d1a890faSShreyas Bhatewara /* setup the EOP desc */ 993115924b6SShreyas Bhatewara ctx.eop_txd->dword[3] = cpu_to_le32(VMXNET3_TXD_CQ | VMXNET3_TXD_EOP); 994d1a890faSShreyas Bhatewara 995d1a890faSShreyas Bhatewara /* setup the SOP desc */ 996115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 997115924b6SShreyas Bhatewara gdesc = &tempTxDesc; 998115924b6SShreyas Bhatewara gdesc->dword[2] = ctx.sop_txd->dword[2]; 999115924b6SShreyas Bhatewara gdesc->dword[3] = ctx.sop_txd->dword[3]; 1000115924b6SShreyas Bhatewara #else 1001d1a890faSShreyas Bhatewara gdesc = ctx.sop_txd; 1002115924b6SShreyas Bhatewara #endif 1003d1a890faSShreyas Bhatewara if (ctx.mss) { 1004d1a890faSShreyas Bhatewara gdesc->txd.hlen = ctx.eth_ip_hdr_size + ctx.l4_hdr_size; 1005d1a890faSShreyas Bhatewara gdesc->txd.om = VMXNET3_OM_TSO; 1006d1a890faSShreyas Bhatewara gdesc->txd.msscof = ctx.mss; 1007115924b6SShreyas Bhatewara le32_add_cpu(&tq->shared->txNumDeferred, (skb->len - 1008115924b6SShreyas Bhatewara gdesc->txd.hlen + ctx.mss - 1) / ctx.mss); 1009d1a890faSShreyas Bhatewara } else { 1010d1a890faSShreyas Bhatewara if (skb->ip_summed == CHECKSUM_PARTIAL) { 1011d1a890faSShreyas Bhatewara gdesc->txd.hlen = ctx.eth_ip_hdr_size; 1012d1a890faSShreyas Bhatewara gdesc->txd.om = VMXNET3_OM_CSUM; 1013d1a890faSShreyas Bhatewara gdesc->txd.msscof = ctx.eth_ip_hdr_size + 1014d1a890faSShreyas Bhatewara skb->csum_offset; 1015d1a890faSShreyas Bhatewara } else { 1016d1a890faSShreyas Bhatewara gdesc->txd.om = 0; 1017d1a890faSShreyas Bhatewara gdesc->txd.msscof = 0; 1018d1a890faSShreyas Bhatewara } 1019115924b6SShreyas Bhatewara le32_add_cpu(&tq->shared->txNumDeferred, 1); 1020d1a890faSShreyas Bhatewara } 1021d1a890faSShreyas Bhatewara 1022d1a890faSShreyas Bhatewara if (vlan_tx_tag_present(skb)) { 1023d1a890faSShreyas Bhatewara gdesc->txd.ti = 1; 1024d1a890faSShreyas Bhatewara gdesc->txd.tci = vlan_tx_tag_get(skb); 1025d1a890faSShreyas Bhatewara } 1026d1a890faSShreyas Bhatewara 1027115924b6SShreyas Bhatewara /* finally flips the GEN bit of the SOP desc. */ 1028115924b6SShreyas Bhatewara gdesc->dword[2] = cpu_to_le32(le32_to_cpu(gdesc->dword[2]) ^ 1029115924b6SShreyas Bhatewara VMXNET3_TXD_GEN); 1030115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 1031115924b6SShreyas Bhatewara /* Finished updating in bitfields of Tx Desc, so write them in original 1032115924b6SShreyas Bhatewara * place. 1033115924b6SShreyas Bhatewara */ 1034115924b6SShreyas Bhatewara vmxnet3_TxDescToLe((struct Vmxnet3_TxDesc *)gdesc, 1035115924b6SShreyas Bhatewara (struct Vmxnet3_TxDesc *)ctx.sop_txd); 1036115924b6SShreyas Bhatewara gdesc = ctx.sop_txd; 1037115924b6SShreyas Bhatewara #endif 1038f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 1039f6965582SRandy Dunlap "txd[%u]: SOP 0x%Lx 0x%x 0x%x\n", 1040d1a890faSShreyas Bhatewara (u32)((union Vmxnet3_GenericDesc *)ctx.sop_txd - 1041115924b6SShreyas Bhatewara tq->tx_ring.base), le64_to_cpu(gdesc->txd.addr), 1042115924b6SShreyas Bhatewara le32_to_cpu(gdesc->dword[2]), le32_to_cpu(gdesc->dword[3])); 1043d1a890faSShreyas Bhatewara 1044d1a890faSShreyas Bhatewara spin_unlock_irqrestore(&tq->tx_lock, flags); 1045d1a890faSShreyas Bhatewara 1046115924b6SShreyas Bhatewara if (le32_to_cpu(tq->shared->txNumDeferred) >= 1047115924b6SShreyas Bhatewara le32_to_cpu(tq->shared->txThreshold)) { 1048d1a890faSShreyas Bhatewara tq->shared->txNumDeferred = 0; 104909c5088eSShreyas Bhatewara VMXNET3_WRITE_BAR0_REG(adapter, 105009c5088eSShreyas Bhatewara VMXNET3_REG_TXPROD + tq->qid * 8, 1051d1a890faSShreyas Bhatewara tq->tx_ring.next2fill); 1052d1a890faSShreyas Bhatewara } 1053d1a890faSShreyas Bhatewara 1054d1a890faSShreyas Bhatewara return NETDEV_TX_OK; 1055d1a890faSShreyas Bhatewara 1056d1a890faSShreyas Bhatewara hdr_too_big: 1057d1a890faSShreyas Bhatewara tq->stats.drop_oversized_hdr++; 1058f955e141SDan Carpenter unlock_drop_pkt: 1059f955e141SDan Carpenter spin_unlock_irqrestore(&tq->tx_lock, flags); 1060d1a890faSShreyas Bhatewara drop_pkt: 1061d1a890faSShreyas Bhatewara tq->stats.drop_total++; 1062d1a890faSShreyas Bhatewara dev_kfree_skb(skb); 1063d1a890faSShreyas Bhatewara return NETDEV_TX_OK; 1064d1a890faSShreyas Bhatewara } 1065d1a890faSShreyas Bhatewara 1066d1a890faSShreyas Bhatewara 1067d1a890faSShreyas Bhatewara static netdev_tx_t 1068d1a890faSShreyas Bhatewara vmxnet3_xmit_frame(struct sk_buff *skb, struct net_device *netdev) 1069d1a890faSShreyas Bhatewara { 1070d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1071d1a890faSShreyas Bhatewara 107209c5088eSShreyas Bhatewara BUG_ON(skb->queue_mapping > adapter->num_tx_queues); 107309c5088eSShreyas Bhatewara return vmxnet3_tq_xmit(skb, 107409c5088eSShreyas Bhatewara &adapter->tx_queue[skb->queue_mapping], 107509c5088eSShreyas Bhatewara adapter, netdev); 1076d1a890faSShreyas Bhatewara } 1077d1a890faSShreyas Bhatewara 1078d1a890faSShreyas Bhatewara 1079d1a890faSShreyas Bhatewara static void 1080d1a890faSShreyas Bhatewara vmxnet3_rx_csum(struct vmxnet3_adapter *adapter, 1081d1a890faSShreyas Bhatewara struct sk_buff *skb, 1082d1a890faSShreyas Bhatewara union Vmxnet3_GenericDesc *gdesc) 1083d1a890faSShreyas Bhatewara { 1084a0d2730cSMichał Mirosław if (!gdesc->rcd.cnc && adapter->netdev->features & NETIF_F_RXCSUM) { 1085d1a890faSShreyas Bhatewara /* typical case: TCP/UDP over IP and both csums are correct */ 1086115924b6SShreyas Bhatewara if ((le32_to_cpu(gdesc->dword[3]) & VMXNET3_RCD_CSUM_OK) == 1087d1a890faSShreyas Bhatewara VMXNET3_RCD_CSUM_OK) { 1088d1a890faSShreyas Bhatewara skb->ip_summed = CHECKSUM_UNNECESSARY; 1089d1a890faSShreyas Bhatewara BUG_ON(!(gdesc->rcd.tcp || gdesc->rcd.udp)); 1090d1a890faSShreyas Bhatewara BUG_ON(!(gdesc->rcd.v4 || gdesc->rcd.v6)); 1091d1a890faSShreyas Bhatewara BUG_ON(gdesc->rcd.frg); 1092d1a890faSShreyas Bhatewara } else { 1093d1a890faSShreyas Bhatewara if (gdesc->rcd.csum) { 1094d1a890faSShreyas Bhatewara skb->csum = htons(gdesc->rcd.csum); 1095d1a890faSShreyas Bhatewara skb->ip_summed = CHECKSUM_PARTIAL; 1096d1a890faSShreyas Bhatewara } else { 1097bc8acf2cSEric Dumazet skb_checksum_none_assert(skb); 1098d1a890faSShreyas Bhatewara } 1099d1a890faSShreyas Bhatewara } 1100d1a890faSShreyas Bhatewara } else { 1101bc8acf2cSEric Dumazet skb_checksum_none_assert(skb); 1102d1a890faSShreyas Bhatewara } 1103d1a890faSShreyas Bhatewara } 1104d1a890faSShreyas Bhatewara 1105d1a890faSShreyas Bhatewara 1106d1a890faSShreyas Bhatewara static void 1107d1a890faSShreyas Bhatewara vmxnet3_rx_error(struct vmxnet3_rx_queue *rq, struct Vmxnet3_RxCompDesc *rcd, 1108d1a890faSShreyas Bhatewara struct vmxnet3_rx_ctx *ctx, struct vmxnet3_adapter *adapter) 1109d1a890faSShreyas Bhatewara { 1110d1a890faSShreyas Bhatewara rq->stats.drop_err++; 1111d1a890faSShreyas Bhatewara if (!rcd->fcs) 1112d1a890faSShreyas Bhatewara rq->stats.drop_fcs++; 1113d1a890faSShreyas Bhatewara 1114d1a890faSShreyas Bhatewara rq->stats.drop_total++; 1115d1a890faSShreyas Bhatewara 1116d1a890faSShreyas Bhatewara /* 1117d1a890faSShreyas Bhatewara * We do not unmap and chain the rx buffer to the skb. 1118d1a890faSShreyas Bhatewara * We basically pretend this buffer is not used and will be recycled 1119d1a890faSShreyas Bhatewara * by vmxnet3_rq_alloc_rx_buf() 1120d1a890faSShreyas Bhatewara */ 1121d1a890faSShreyas Bhatewara 1122d1a890faSShreyas Bhatewara /* 1123d1a890faSShreyas Bhatewara * ctx->skb may be NULL if this is the first and the only one 1124d1a890faSShreyas Bhatewara * desc for the pkt 1125d1a890faSShreyas Bhatewara */ 1126d1a890faSShreyas Bhatewara if (ctx->skb) 1127d1a890faSShreyas Bhatewara dev_kfree_skb_irq(ctx->skb); 1128d1a890faSShreyas Bhatewara 1129d1a890faSShreyas Bhatewara ctx->skb = NULL; 1130d1a890faSShreyas Bhatewara } 1131d1a890faSShreyas Bhatewara 1132d1a890faSShreyas Bhatewara 1133d1a890faSShreyas Bhatewara static int 1134d1a890faSShreyas Bhatewara vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq, 1135d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter, int quota) 1136d1a890faSShreyas Bhatewara { 1137215faf9cSJoe Perches static const u32 rxprod_reg[2] = { 1138215faf9cSJoe Perches VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2 1139215faf9cSJoe Perches }; 1140d1a890faSShreyas Bhatewara u32 num_rxd = 0; 11415318d809SShreyas Bhatewara bool skip_page_frags = false; 1142d1a890faSShreyas Bhatewara struct Vmxnet3_RxCompDesc *rcd; 1143d1a890faSShreyas Bhatewara struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx; 1144115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 1145115924b6SShreyas Bhatewara struct Vmxnet3_RxDesc rxCmdDesc; 1146115924b6SShreyas Bhatewara struct Vmxnet3_RxCompDesc rxComp; 1147115924b6SShreyas Bhatewara #endif 1148115924b6SShreyas Bhatewara vmxnet3_getRxComp(rcd, &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, 1149115924b6SShreyas Bhatewara &rxComp); 1150d1a890faSShreyas Bhatewara while (rcd->gen == rq->comp_ring.gen) { 1151d1a890faSShreyas Bhatewara struct vmxnet3_rx_buf_info *rbi; 11525318d809SShreyas Bhatewara struct sk_buff *skb, *new_skb = NULL; 11535318d809SShreyas Bhatewara struct page *new_page = NULL; 1154d1a890faSShreyas Bhatewara int num_to_alloc; 1155d1a890faSShreyas Bhatewara struct Vmxnet3_RxDesc *rxd; 1156d1a890faSShreyas Bhatewara u32 idx, ring_idx; 11575318d809SShreyas Bhatewara struct vmxnet3_cmd_ring *ring = NULL; 1158d1a890faSShreyas Bhatewara if (num_rxd >= quota) { 1159d1a890faSShreyas Bhatewara /* we may stop even before we see the EOP desc of 1160d1a890faSShreyas Bhatewara * the current pkt 1161d1a890faSShreyas Bhatewara */ 1162d1a890faSShreyas Bhatewara break; 1163d1a890faSShreyas Bhatewara } 1164d1a890faSShreyas Bhatewara num_rxd++; 116509c5088eSShreyas Bhatewara BUG_ON(rcd->rqID != rq->qid && rcd->rqID != rq->qid2); 1166d1a890faSShreyas Bhatewara idx = rcd->rxdIdx; 116709c5088eSShreyas Bhatewara ring_idx = rcd->rqID < adapter->num_rx_queues ? 0 : 1; 11685318d809SShreyas Bhatewara ring = rq->rx_ring + ring_idx; 1169115924b6SShreyas Bhatewara vmxnet3_getRxDesc(rxd, &rq->rx_ring[ring_idx].base[idx].rxd, 1170115924b6SShreyas Bhatewara &rxCmdDesc); 1171d1a890faSShreyas Bhatewara rbi = rq->buf_info[ring_idx] + idx; 1172d1a890faSShreyas Bhatewara 1173115924b6SShreyas Bhatewara BUG_ON(rxd->addr != rbi->dma_addr || 1174115924b6SShreyas Bhatewara rxd->len != rbi->len); 1175d1a890faSShreyas Bhatewara 1176d1a890faSShreyas Bhatewara if (unlikely(rcd->eop && rcd->err)) { 1177d1a890faSShreyas Bhatewara vmxnet3_rx_error(rq, rcd, ctx, adapter); 1178d1a890faSShreyas Bhatewara goto rcd_done; 1179d1a890faSShreyas Bhatewara } 1180d1a890faSShreyas Bhatewara 1181d1a890faSShreyas Bhatewara if (rcd->sop) { /* first buf of the pkt */ 1182d1a890faSShreyas Bhatewara BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_HEAD || 1183d1a890faSShreyas Bhatewara rcd->rqID != rq->qid); 1184d1a890faSShreyas Bhatewara 1185d1a890faSShreyas Bhatewara BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_SKB); 1186d1a890faSShreyas Bhatewara BUG_ON(ctx->skb != NULL || rbi->skb == NULL); 1187d1a890faSShreyas Bhatewara 1188d1a890faSShreyas Bhatewara if (unlikely(rcd->len == 0)) { 1189d1a890faSShreyas Bhatewara /* Pretend the rx buffer is skipped. */ 1190d1a890faSShreyas Bhatewara BUG_ON(!(rcd->sop && rcd->eop)); 1191f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 1192f6965582SRandy Dunlap "rxRing[%u][%u] 0 length\n", 1193d1a890faSShreyas Bhatewara ring_idx, idx); 1194d1a890faSShreyas Bhatewara goto rcd_done; 1195d1a890faSShreyas Bhatewara } 1196d1a890faSShreyas Bhatewara 11975318d809SShreyas Bhatewara skip_page_frags = false; 1198d1a890faSShreyas Bhatewara ctx->skb = rbi->skb; 11995318d809SShreyas Bhatewara new_skb = dev_alloc_skb(rbi->len + NET_IP_ALIGN); 12005318d809SShreyas Bhatewara if (new_skb == NULL) { 12015318d809SShreyas Bhatewara /* Skb allocation failed, do not handover this 12025318d809SShreyas Bhatewara * skb to stack. Reuse it. Drop the existing pkt 12035318d809SShreyas Bhatewara */ 12045318d809SShreyas Bhatewara rq->stats.rx_buf_alloc_failure++; 12055318d809SShreyas Bhatewara ctx->skb = NULL; 12065318d809SShreyas Bhatewara rq->stats.drop_total++; 12075318d809SShreyas Bhatewara skip_page_frags = true; 12085318d809SShreyas Bhatewara goto rcd_done; 12095318d809SShreyas Bhatewara } 1210d1a890faSShreyas Bhatewara 1211d1a890faSShreyas Bhatewara pci_unmap_single(adapter->pdev, rbi->dma_addr, rbi->len, 1212d1a890faSShreyas Bhatewara PCI_DMA_FROMDEVICE); 1213d1a890faSShreyas Bhatewara 1214d1a890faSShreyas Bhatewara skb_put(ctx->skb, rcd->len); 12155318d809SShreyas Bhatewara 12165318d809SShreyas Bhatewara /* Immediate refill */ 12175318d809SShreyas Bhatewara new_skb->dev = adapter->netdev; 12185318d809SShreyas Bhatewara skb_reserve(new_skb, NET_IP_ALIGN); 12195318d809SShreyas Bhatewara rbi->skb = new_skb; 12205318d809SShreyas Bhatewara rbi->dma_addr = pci_map_single(adapter->pdev, 12215318d809SShreyas Bhatewara rbi->skb->data, rbi->len, 12225318d809SShreyas Bhatewara PCI_DMA_FROMDEVICE); 12235318d809SShreyas Bhatewara rxd->addr = cpu_to_le64(rbi->dma_addr); 12245318d809SShreyas Bhatewara rxd->len = rbi->len; 12255318d809SShreyas Bhatewara 1226d1a890faSShreyas Bhatewara } else { 12275318d809SShreyas Bhatewara BUG_ON(ctx->skb == NULL && !skip_page_frags); 12285318d809SShreyas Bhatewara 1229d1a890faSShreyas Bhatewara /* non SOP buffer must be type 1 in most cases */ 12305318d809SShreyas Bhatewara BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE); 1231d1a890faSShreyas Bhatewara BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_BODY); 1232d1a890faSShreyas Bhatewara 12335318d809SShreyas Bhatewara /* If an sop buffer was dropped, skip all 12345318d809SShreyas Bhatewara * following non-sop fragments. They will be reused. 12355318d809SShreyas Bhatewara */ 12365318d809SShreyas Bhatewara if (skip_page_frags) 12375318d809SShreyas Bhatewara goto rcd_done; 12385318d809SShreyas Bhatewara 12395318d809SShreyas Bhatewara new_page = alloc_page(GFP_ATOMIC); 12405318d809SShreyas Bhatewara if (unlikely(new_page == NULL)) { 12415318d809SShreyas Bhatewara /* Replacement page frag could not be allocated. 12425318d809SShreyas Bhatewara * Reuse this page. Drop the pkt and free the 12435318d809SShreyas Bhatewara * skb which contained this page as a frag. Skip 12445318d809SShreyas Bhatewara * processing all the following non-sop frags. 12455318d809SShreyas Bhatewara */ 12465318d809SShreyas Bhatewara rq->stats.rx_buf_alloc_failure++; 12475318d809SShreyas Bhatewara dev_kfree_skb(ctx->skb); 12485318d809SShreyas Bhatewara ctx->skb = NULL; 12495318d809SShreyas Bhatewara skip_page_frags = true; 12505318d809SShreyas Bhatewara goto rcd_done; 12515318d809SShreyas Bhatewara } 12525318d809SShreyas Bhatewara 1253d1a890faSShreyas Bhatewara if (rcd->len) { 1254d1a890faSShreyas Bhatewara pci_unmap_page(adapter->pdev, 1255d1a890faSShreyas Bhatewara rbi->dma_addr, rbi->len, 1256d1a890faSShreyas Bhatewara PCI_DMA_FROMDEVICE); 1257d1a890faSShreyas Bhatewara 1258d1a890faSShreyas Bhatewara vmxnet3_append_frag(ctx->skb, rcd, rbi); 1259d1a890faSShreyas Bhatewara } 12605318d809SShreyas Bhatewara 12615318d809SShreyas Bhatewara /* Immediate refill */ 12625318d809SShreyas Bhatewara rbi->page = new_page; 12635318d809SShreyas Bhatewara rbi->dma_addr = pci_map_page(adapter->pdev, rbi->page, 12645318d809SShreyas Bhatewara 0, PAGE_SIZE, 12655318d809SShreyas Bhatewara PCI_DMA_FROMDEVICE); 12665318d809SShreyas Bhatewara rxd->addr = cpu_to_le64(rbi->dma_addr); 12675318d809SShreyas Bhatewara rxd->len = rbi->len; 1268d1a890faSShreyas Bhatewara } 12695318d809SShreyas Bhatewara 1270d1a890faSShreyas Bhatewara 1271d1a890faSShreyas Bhatewara skb = ctx->skb; 1272d1a890faSShreyas Bhatewara if (rcd->eop) { 1273d1a890faSShreyas Bhatewara skb->len += skb->data_len; 1274d1a890faSShreyas Bhatewara 1275d1a890faSShreyas Bhatewara vmxnet3_rx_csum(adapter, skb, 1276d1a890faSShreyas Bhatewara (union Vmxnet3_GenericDesc *)rcd); 1277d1a890faSShreyas Bhatewara skb->protocol = eth_type_trans(skb, adapter->netdev); 1278d1a890faSShreyas Bhatewara 127972e85c45SJesse Gross if (unlikely(rcd->ts)) 128072e85c45SJesse Gross __vlan_hwaccel_put_tag(skb, rcd->tci); 128172e85c45SJesse Gross 1282213ade8cSJesse Gross if (adapter->netdev->features & NETIF_F_LRO) 1283d1a890faSShreyas Bhatewara netif_receive_skb(skb); 1284213ade8cSJesse Gross else 1285213ade8cSJesse Gross napi_gro_receive(&rq->napi, skb); 1286d1a890faSShreyas Bhatewara 1287d1a890faSShreyas Bhatewara ctx->skb = NULL; 1288d1a890faSShreyas Bhatewara } 1289d1a890faSShreyas Bhatewara 1290d1a890faSShreyas Bhatewara rcd_done: 12915318d809SShreyas Bhatewara /* device may have skipped some rx descs */ 12925318d809SShreyas Bhatewara ring->next2comp = idx; 12935318d809SShreyas Bhatewara num_to_alloc = vmxnet3_cmd_ring_desc_avail(ring); 12945318d809SShreyas Bhatewara ring = rq->rx_ring + ring_idx; 12955318d809SShreyas Bhatewara while (num_to_alloc) { 12965318d809SShreyas Bhatewara vmxnet3_getRxDesc(rxd, &ring->base[ring->next2fill].rxd, 12975318d809SShreyas Bhatewara &rxCmdDesc); 12985318d809SShreyas Bhatewara BUG_ON(!rxd->addr); 1299d1a890faSShreyas Bhatewara 13005318d809SShreyas Bhatewara /* Recv desc is ready to be used by the device */ 13015318d809SShreyas Bhatewara rxd->gen = ring->gen; 13025318d809SShreyas Bhatewara vmxnet3_cmd_ring_adv_next2fill(ring); 13035318d809SShreyas Bhatewara num_to_alloc--; 13045318d809SShreyas Bhatewara } 1305d1a890faSShreyas Bhatewara 1306d1a890faSShreyas Bhatewara /* if needed, update the register */ 1307d1a890faSShreyas Bhatewara if (unlikely(rq->shared->updateRxProd)) { 1308d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR0_REG(adapter, 1309d1a890faSShreyas Bhatewara rxprod_reg[ring_idx] + rq->qid * 8, 13105318d809SShreyas Bhatewara ring->next2fill); 1311d1a890faSShreyas Bhatewara rq->uncommitted[ring_idx] = 0; 1312d1a890faSShreyas Bhatewara } 1313d1a890faSShreyas Bhatewara 1314d1a890faSShreyas Bhatewara vmxnet3_comp_ring_adv_next2proc(&rq->comp_ring); 1315115924b6SShreyas Bhatewara vmxnet3_getRxComp(rcd, 1316115924b6SShreyas Bhatewara &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, &rxComp); 1317d1a890faSShreyas Bhatewara } 1318d1a890faSShreyas Bhatewara 1319d1a890faSShreyas Bhatewara return num_rxd; 1320d1a890faSShreyas Bhatewara } 1321d1a890faSShreyas Bhatewara 1322d1a890faSShreyas Bhatewara 1323d1a890faSShreyas Bhatewara static void 1324d1a890faSShreyas Bhatewara vmxnet3_rq_cleanup(struct vmxnet3_rx_queue *rq, 1325d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 1326d1a890faSShreyas Bhatewara { 1327d1a890faSShreyas Bhatewara u32 i, ring_idx; 1328d1a890faSShreyas Bhatewara struct Vmxnet3_RxDesc *rxd; 1329d1a890faSShreyas Bhatewara 1330d1a890faSShreyas Bhatewara for (ring_idx = 0; ring_idx < 2; ring_idx++) { 1331d1a890faSShreyas Bhatewara for (i = 0; i < rq->rx_ring[ring_idx].size; i++) { 1332115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 1333115924b6SShreyas Bhatewara struct Vmxnet3_RxDesc rxDesc; 1334115924b6SShreyas Bhatewara #endif 1335115924b6SShreyas Bhatewara vmxnet3_getRxDesc(rxd, 1336115924b6SShreyas Bhatewara &rq->rx_ring[ring_idx].base[i].rxd, &rxDesc); 1337d1a890faSShreyas Bhatewara 1338d1a890faSShreyas Bhatewara if (rxd->btype == VMXNET3_RXD_BTYPE_HEAD && 1339d1a890faSShreyas Bhatewara rq->buf_info[ring_idx][i].skb) { 1340d1a890faSShreyas Bhatewara pci_unmap_single(adapter->pdev, rxd->addr, 1341d1a890faSShreyas Bhatewara rxd->len, PCI_DMA_FROMDEVICE); 1342d1a890faSShreyas Bhatewara dev_kfree_skb(rq->buf_info[ring_idx][i].skb); 1343d1a890faSShreyas Bhatewara rq->buf_info[ring_idx][i].skb = NULL; 1344d1a890faSShreyas Bhatewara } else if (rxd->btype == VMXNET3_RXD_BTYPE_BODY && 1345d1a890faSShreyas Bhatewara rq->buf_info[ring_idx][i].page) { 1346d1a890faSShreyas Bhatewara pci_unmap_page(adapter->pdev, rxd->addr, 1347d1a890faSShreyas Bhatewara rxd->len, PCI_DMA_FROMDEVICE); 1348d1a890faSShreyas Bhatewara put_page(rq->buf_info[ring_idx][i].page); 1349d1a890faSShreyas Bhatewara rq->buf_info[ring_idx][i].page = NULL; 1350d1a890faSShreyas Bhatewara } 1351d1a890faSShreyas Bhatewara } 1352d1a890faSShreyas Bhatewara 1353d1a890faSShreyas Bhatewara rq->rx_ring[ring_idx].gen = VMXNET3_INIT_GEN; 1354d1a890faSShreyas Bhatewara rq->rx_ring[ring_idx].next2fill = 1355d1a890faSShreyas Bhatewara rq->rx_ring[ring_idx].next2comp = 0; 1356d1a890faSShreyas Bhatewara rq->uncommitted[ring_idx] = 0; 1357d1a890faSShreyas Bhatewara } 1358d1a890faSShreyas Bhatewara 1359d1a890faSShreyas Bhatewara rq->comp_ring.gen = VMXNET3_INIT_GEN; 1360d1a890faSShreyas Bhatewara rq->comp_ring.next2proc = 0; 1361d1a890faSShreyas Bhatewara } 1362d1a890faSShreyas Bhatewara 1363d1a890faSShreyas Bhatewara 136409c5088eSShreyas Bhatewara static void 136509c5088eSShreyas Bhatewara vmxnet3_rq_cleanup_all(struct vmxnet3_adapter *adapter) 136609c5088eSShreyas Bhatewara { 136709c5088eSShreyas Bhatewara int i; 136809c5088eSShreyas Bhatewara 136909c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 137009c5088eSShreyas Bhatewara vmxnet3_rq_cleanup(&adapter->rx_queue[i], adapter); 137109c5088eSShreyas Bhatewara } 137209c5088eSShreyas Bhatewara 137309c5088eSShreyas Bhatewara 1374d1a890faSShreyas Bhatewara void vmxnet3_rq_destroy(struct vmxnet3_rx_queue *rq, 1375d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 1376d1a890faSShreyas Bhatewara { 1377d1a890faSShreyas Bhatewara int i; 1378d1a890faSShreyas Bhatewara int j; 1379d1a890faSShreyas Bhatewara 1380d1a890faSShreyas Bhatewara /* all rx buffers must have already been freed */ 1381d1a890faSShreyas Bhatewara for (i = 0; i < 2; i++) { 1382d1a890faSShreyas Bhatewara if (rq->buf_info[i]) { 1383d1a890faSShreyas Bhatewara for (j = 0; j < rq->rx_ring[i].size; j++) 1384d1a890faSShreyas Bhatewara BUG_ON(rq->buf_info[i][j].page != NULL); 1385d1a890faSShreyas Bhatewara } 1386d1a890faSShreyas Bhatewara } 1387d1a890faSShreyas Bhatewara 1388d1a890faSShreyas Bhatewara 1389d1a890faSShreyas Bhatewara kfree(rq->buf_info[0]); 1390d1a890faSShreyas Bhatewara 1391d1a890faSShreyas Bhatewara for (i = 0; i < 2; i++) { 1392d1a890faSShreyas Bhatewara if (rq->rx_ring[i].base) { 1393d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, rq->rx_ring[i].size 1394d1a890faSShreyas Bhatewara * sizeof(struct Vmxnet3_RxDesc), 1395d1a890faSShreyas Bhatewara rq->rx_ring[i].base, 1396d1a890faSShreyas Bhatewara rq->rx_ring[i].basePA); 1397d1a890faSShreyas Bhatewara rq->rx_ring[i].base = NULL; 1398d1a890faSShreyas Bhatewara } 1399d1a890faSShreyas Bhatewara rq->buf_info[i] = NULL; 1400d1a890faSShreyas Bhatewara } 1401d1a890faSShreyas Bhatewara 1402d1a890faSShreyas Bhatewara if (rq->comp_ring.base) { 1403d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, rq->comp_ring.size * 1404d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_RxCompDesc), 1405d1a890faSShreyas Bhatewara rq->comp_ring.base, rq->comp_ring.basePA); 1406d1a890faSShreyas Bhatewara rq->comp_ring.base = NULL; 1407d1a890faSShreyas Bhatewara } 1408d1a890faSShreyas Bhatewara } 1409d1a890faSShreyas Bhatewara 1410d1a890faSShreyas Bhatewara 1411d1a890faSShreyas Bhatewara static int 1412d1a890faSShreyas Bhatewara vmxnet3_rq_init(struct vmxnet3_rx_queue *rq, 1413d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 1414d1a890faSShreyas Bhatewara { 1415d1a890faSShreyas Bhatewara int i; 1416d1a890faSShreyas Bhatewara 1417d1a890faSShreyas Bhatewara /* initialize buf_info */ 1418d1a890faSShreyas Bhatewara for (i = 0; i < rq->rx_ring[0].size; i++) { 1419d1a890faSShreyas Bhatewara 1420d1a890faSShreyas Bhatewara /* 1st buf for a pkt is skbuff */ 1421d1a890faSShreyas Bhatewara if (i % adapter->rx_buf_per_pkt == 0) { 1422d1a890faSShreyas Bhatewara rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_SKB; 1423d1a890faSShreyas Bhatewara rq->buf_info[0][i].len = adapter->skb_buf_size; 1424d1a890faSShreyas Bhatewara } else { /* subsequent bufs for a pkt is frag */ 1425d1a890faSShreyas Bhatewara rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_PAGE; 1426d1a890faSShreyas Bhatewara rq->buf_info[0][i].len = PAGE_SIZE; 1427d1a890faSShreyas Bhatewara } 1428d1a890faSShreyas Bhatewara } 1429d1a890faSShreyas Bhatewara for (i = 0; i < rq->rx_ring[1].size; i++) { 1430d1a890faSShreyas Bhatewara rq->buf_info[1][i].buf_type = VMXNET3_RX_BUF_PAGE; 1431d1a890faSShreyas Bhatewara rq->buf_info[1][i].len = PAGE_SIZE; 1432d1a890faSShreyas Bhatewara } 1433d1a890faSShreyas Bhatewara 1434d1a890faSShreyas Bhatewara /* reset internal state and allocate buffers for both rings */ 1435d1a890faSShreyas Bhatewara for (i = 0; i < 2; i++) { 1436d1a890faSShreyas Bhatewara rq->rx_ring[i].next2fill = rq->rx_ring[i].next2comp = 0; 1437d1a890faSShreyas Bhatewara rq->uncommitted[i] = 0; 1438d1a890faSShreyas Bhatewara 1439d1a890faSShreyas Bhatewara memset(rq->rx_ring[i].base, 0, rq->rx_ring[i].size * 1440d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_RxDesc)); 1441d1a890faSShreyas Bhatewara rq->rx_ring[i].gen = VMXNET3_INIT_GEN; 1442d1a890faSShreyas Bhatewara } 1443d1a890faSShreyas Bhatewara if (vmxnet3_rq_alloc_rx_buf(rq, 0, rq->rx_ring[0].size - 1, 1444d1a890faSShreyas Bhatewara adapter) == 0) { 1445d1a890faSShreyas Bhatewara /* at least has 1 rx buffer for the 1st ring */ 1446d1a890faSShreyas Bhatewara return -ENOMEM; 1447d1a890faSShreyas Bhatewara } 1448d1a890faSShreyas Bhatewara vmxnet3_rq_alloc_rx_buf(rq, 1, rq->rx_ring[1].size - 1, adapter); 1449d1a890faSShreyas Bhatewara 1450d1a890faSShreyas Bhatewara /* reset the comp ring */ 1451d1a890faSShreyas Bhatewara rq->comp_ring.next2proc = 0; 1452d1a890faSShreyas Bhatewara memset(rq->comp_ring.base, 0, rq->comp_ring.size * 1453d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_RxCompDesc)); 1454d1a890faSShreyas Bhatewara rq->comp_ring.gen = VMXNET3_INIT_GEN; 1455d1a890faSShreyas Bhatewara 1456d1a890faSShreyas Bhatewara /* reset rxctx */ 1457d1a890faSShreyas Bhatewara rq->rx_ctx.skb = NULL; 1458d1a890faSShreyas Bhatewara 1459d1a890faSShreyas Bhatewara /* stats are not reset */ 1460d1a890faSShreyas Bhatewara return 0; 1461d1a890faSShreyas Bhatewara } 1462d1a890faSShreyas Bhatewara 1463d1a890faSShreyas Bhatewara 1464d1a890faSShreyas Bhatewara static int 146509c5088eSShreyas Bhatewara vmxnet3_rq_init_all(struct vmxnet3_adapter *adapter) 146609c5088eSShreyas Bhatewara { 146709c5088eSShreyas Bhatewara int i, err = 0; 146809c5088eSShreyas Bhatewara 146909c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 147009c5088eSShreyas Bhatewara err = vmxnet3_rq_init(&adapter->rx_queue[i], adapter); 147109c5088eSShreyas Bhatewara if (unlikely(err)) { 147209c5088eSShreyas Bhatewara dev_err(&adapter->netdev->dev, "%s: failed to " 147309c5088eSShreyas Bhatewara "initialize rx queue%i\n", 147409c5088eSShreyas Bhatewara adapter->netdev->name, i); 147509c5088eSShreyas Bhatewara break; 147609c5088eSShreyas Bhatewara } 147709c5088eSShreyas Bhatewara } 147809c5088eSShreyas Bhatewara return err; 147909c5088eSShreyas Bhatewara 148009c5088eSShreyas Bhatewara } 148109c5088eSShreyas Bhatewara 148209c5088eSShreyas Bhatewara 148309c5088eSShreyas Bhatewara static int 1484d1a890faSShreyas Bhatewara vmxnet3_rq_create(struct vmxnet3_rx_queue *rq, struct vmxnet3_adapter *adapter) 1485d1a890faSShreyas Bhatewara { 1486d1a890faSShreyas Bhatewara int i; 1487d1a890faSShreyas Bhatewara size_t sz; 1488d1a890faSShreyas Bhatewara struct vmxnet3_rx_buf_info *bi; 1489d1a890faSShreyas Bhatewara 1490d1a890faSShreyas Bhatewara for (i = 0; i < 2; i++) { 1491d1a890faSShreyas Bhatewara 1492d1a890faSShreyas Bhatewara sz = rq->rx_ring[i].size * sizeof(struct Vmxnet3_RxDesc); 1493d1a890faSShreyas Bhatewara rq->rx_ring[i].base = pci_alloc_consistent(adapter->pdev, sz, 1494d1a890faSShreyas Bhatewara &rq->rx_ring[i].basePA); 1495d1a890faSShreyas Bhatewara if (!rq->rx_ring[i].base) { 1496d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate rx ring %d\n", 1497d1a890faSShreyas Bhatewara adapter->netdev->name, i); 1498d1a890faSShreyas Bhatewara goto err; 1499d1a890faSShreyas Bhatewara } 1500d1a890faSShreyas Bhatewara } 1501d1a890faSShreyas Bhatewara 1502d1a890faSShreyas Bhatewara sz = rq->comp_ring.size * sizeof(struct Vmxnet3_RxCompDesc); 1503d1a890faSShreyas Bhatewara rq->comp_ring.base = pci_alloc_consistent(adapter->pdev, sz, 1504d1a890faSShreyas Bhatewara &rq->comp_ring.basePA); 1505d1a890faSShreyas Bhatewara if (!rq->comp_ring.base) { 1506d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate rx comp ring\n", 1507d1a890faSShreyas Bhatewara adapter->netdev->name); 1508d1a890faSShreyas Bhatewara goto err; 1509d1a890faSShreyas Bhatewara } 1510d1a890faSShreyas Bhatewara 1511d1a890faSShreyas Bhatewara sz = sizeof(struct vmxnet3_rx_buf_info) * (rq->rx_ring[0].size + 1512d1a890faSShreyas Bhatewara rq->rx_ring[1].size); 1513476c609eSJulia Lawall bi = kzalloc(sz, GFP_KERNEL); 1514e404decbSJoe Perches if (!bi) 1515d1a890faSShreyas Bhatewara goto err; 1516e404decbSJoe Perches 1517d1a890faSShreyas Bhatewara rq->buf_info[0] = bi; 1518d1a890faSShreyas Bhatewara rq->buf_info[1] = bi + rq->rx_ring[0].size; 1519d1a890faSShreyas Bhatewara 1520d1a890faSShreyas Bhatewara return 0; 1521d1a890faSShreyas Bhatewara 1522d1a890faSShreyas Bhatewara err: 1523d1a890faSShreyas Bhatewara vmxnet3_rq_destroy(rq, adapter); 1524d1a890faSShreyas Bhatewara return -ENOMEM; 1525d1a890faSShreyas Bhatewara } 1526d1a890faSShreyas Bhatewara 1527d1a890faSShreyas Bhatewara 1528d1a890faSShreyas Bhatewara static int 152909c5088eSShreyas Bhatewara vmxnet3_rq_create_all(struct vmxnet3_adapter *adapter) 153009c5088eSShreyas Bhatewara { 153109c5088eSShreyas Bhatewara int i, err = 0; 153209c5088eSShreyas Bhatewara 153309c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 153409c5088eSShreyas Bhatewara err = vmxnet3_rq_create(&adapter->rx_queue[i], adapter); 153509c5088eSShreyas Bhatewara if (unlikely(err)) { 153609c5088eSShreyas Bhatewara dev_err(&adapter->netdev->dev, 153709c5088eSShreyas Bhatewara "%s: failed to create rx queue%i\n", 153809c5088eSShreyas Bhatewara adapter->netdev->name, i); 153909c5088eSShreyas Bhatewara goto err_out; 154009c5088eSShreyas Bhatewara } 154109c5088eSShreyas Bhatewara } 154209c5088eSShreyas Bhatewara return err; 154309c5088eSShreyas Bhatewara err_out: 154409c5088eSShreyas Bhatewara vmxnet3_rq_destroy_all(adapter); 154509c5088eSShreyas Bhatewara return err; 154609c5088eSShreyas Bhatewara 154709c5088eSShreyas Bhatewara } 154809c5088eSShreyas Bhatewara 154909c5088eSShreyas Bhatewara /* Multiple queue aware polling function for tx and rx */ 155009c5088eSShreyas Bhatewara 155109c5088eSShreyas Bhatewara static int 1552d1a890faSShreyas Bhatewara vmxnet3_do_poll(struct vmxnet3_adapter *adapter, int budget) 1553d1a890faSShreyas Bhatewara { 155409c5088eSShreyas Bhatewara int rcd_done = 0, i; 1555d1a890faSShreyas Bhatewara if (unlikely(adapter->shared->ecr)) 1556d1a890faSShreyas Bhatewara vmxnet3_process_events(adapter); 155709c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 155809c5088eSShreyas Bhatewara vmxnet3_tq_tx_complete(&adapter->tx_queue[i], adapter); 1559d1a890faSShreyas Bhatewara 156009c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 156109c5088eSShreyas Bhatewara rcd_done += vmxnet3_rq_rx_complete(&adapter->rx_queue[i], 156209c5088eSShreyas Bhatewara adapter, budget); 156309c5088eSShreyas Bhatewara return rcd_done; 1564d1a890faSShreyas Bhatewara } 1565d1a890faSShreyas Bhatewara 1566d1a890faSShreyas Bhatewara 1567d1a890faSShreyas Bhatewara static int 1568d1a890faSShreyas Bhatewara vmxnet3_poll(struct napi_struct *napi, int budget) 1569d1a890faSShreyas Bhatewara { 157009c5088eSShreyas Bhatewara struct vmxnet3_rx_queue *rx_queue = container_of(napi, 157109c5088eSShreyas Bhatewara struct vmxnet3_rx_queue, napi); 1572d1a890faSShreyas Bhatewara int rxd_done; 1573d1a890faSShreyas Bhatewara 157409c5088eSShreyas Bhatewara rxd_done = vmxnet3_do_poll(rx_queue->adapter, budget); 1575d1a890faSShreyas Bhatewara 1576d1a890faSShreyas Bhatewara if (rxd_done < budget) { 1577d1a890faSShreyas Bhatewara napi_complete(napi); 157809c5088eSShreyas Bhatewara vmxnet3_enable_all_intrs(rx_queue->adapter); 1579d1a890faSShreyas Bhatewara } 1580d1a890faSShreyas Bhatewara return rxd_done; 1581d1a890faSShreyas Bhatewara } 1582d1a890faSShreyas Bhatewara 158309c5088eSShreyas Bhatewara /* 158409c5088eSShreyas Bhatewara * NAPI polling function for MSI-X mode with multiple Rx queues 158509c5088eSShreyas Bhatewara * Returns the # of the NAPI credit consumed (# of rx descriptors processed) 158609c5088eSShreyas Bhatewara */ 158709c5088eSShreyas Bhatewara 158809c5088eSShreyas Bhatewara static int 158909c5088eSShreyas Bhatewara vmxnet3_poll_rx_only(struct napi_struct *napi, int budget) 159009c5088eSShreyas Bhatewara { 159109c5088eSShreyas Bhatewara struct vmxnet3_rx_queue *rq = container_of(napi, 159209c5088eSShreyas Bhatewara struct vmxnet3_rx_queue, napi); 159309c5088eSShreyas Bhatewara struct vmxnet3_adapter *adapter = rq->adapter; 159409c5088eSShreyas Bhatewara int rxd_done; 159509c5088eSShreyas Bhatewara 159609c5088eSShreyas Bhatewara /* When sharing interrupt with corresponding tx queue, process 159709c5088eSShreyas Bhatewara * tx completions in that queue as well 159809c5088eSShreyas Bhatewara */ 159909c5088eSShreyas Bhatewara if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE) { 160009c5088eSShreyas Bhatewara struct vmxnet3_tx_queue *tq = 160109c5088eSShreyas Bhatewara &adapter->tx_queue[rq - adapter->rx_queue]; 160209c5088eSShreyas Bhatewara vmxnet3_tq_tx_complete(tq, adapter); 160309c5088eSShreyas Bhatewara } 160409c5088eSShreyas Bhatewara 160509c5088eSShreyas Bhatewara rxd_done = vmxnet3_rq_rx_complete(rq, adapter, budget); 160609c5088eSShreyas Bhatewara 160709c5088eSShreyas Bhatewara if (rxd_done < budget) { 160809c5088eSShreyas Bhatewara napi_complete(napi); 160909c5088eSShreyas Bhatewara vmxnet3_enable_intr(adapter, rq->comp_ring.intr_idx); 161009c5088eSShreyas Bhatewara } 161109c5088eSShreyas Bhatewara return rxd_done; 161209c5088eSShreyas Bhatewara } 161309c5088eSShreyas Bhatewara 161409c5088eSShreyas Bhatewara 161509c5088eSShreyas Bhatewara #ifdef CONFIG_PCI_MSI 161609c5088eSShreyas Bhatewara 161709c5088eSShreyas Bhatewara /* 161809c5088eSShreyas Bhatewara * Handle completion interrupts on tx queues 161909c5088eSShreyas Bhatewara * Returns whether or not the intr is handled 162009c5088eSShreyas Bhatewara */ 162109c5088eSShreyas Bhatewara 162209c5088eSShreyas Bhatewara static irqreturn_t 162309c5088eSShreyas Bhatewara vmxnet3_msix_tx(int irq, void *data) 162409c5088eSShreyas Bhatewara { 162509c5088eSShreyas Bhatewara struct vmxnet3_tx_queue *tq = data; 162609c5088eSShreyas Bhatewara struct vmxnet3_adapter *adapter = tq->adapter; 162709c5088eSShreyas Bhatewara 162809c5088eSShreyas Bhatewara if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 162909c5088eSShreyas Bhatewara vmxnet3_disable_intr(adapter, tq->comp_ring.intr_idx); 163009c5088eSShreyas Bhatewara 163109c5088eSShreyas Bhatewara /* Handle the case where only one irq is allocate for all tx queues */ 163209c5088eSShreyas Bhatewara if (adapter->share_intr == VMXNET3_INTR_TXSHARE) { 163309c5088eSShreyas Bhatewara int i; 163409c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) { 163509c5088eSShreyas Bhatewara struct vmxnet3_tx_queue *txq = &adapter->tx_queue[i]; 163609c5088eSShreyas Bhatewara vmxnet3_tq_tx_complete(txq, adapter); 163709c5088eSShreyas Bhatewara } 163809c5088eSShreyas Bhatewara } else { 163909c5088eSShreyas Bhatewara vmxnet3_tq_tx_complete(tq, adapter); 164009c5088eSShreyas Bhatewara } 164109c5088eSShreyas Bhatewara vmxnet3_enable_intr(adapter, tq->comp_ring.intr_idx); 164209c5088eSShreyas Bhatewara 164309c5088eSShreyas Bhatewara return IRQ_HANDLED; 164409c5088eSShreyas Bhatewara } 164509c5088eSShreyas Bhatewara 164609c5088eSShreyas Bhatewara 164709c5088eSShreyas Bhatewara /* 164809c5088eSShreyas Bhatewara * Handle completion interrupts on rx queues. Returns whether or not the 164909c5088eSShreyas Bhatewara * intr is handled 165009c5088eSShreyas Bhatewara */ 165109c5088eSShreyas Bhatewara 165209c5088eSShreyas Bhatewara static irqreturn_t 165309c5088eSShreyas Bhatewara vmxnet3_msix_rx(int irq, void *data) 165409c5088eSShreyas Bhatewara { 165509c5088eSShreyas Bhatewara struct vmxnet3_rx_queue *rq = data; 165609c5088eSShreyas Bhatewara struct vmxnet3_adapter *adapter = rq->adapter; 165709c5088eSShreyas Bhatewara 165809c5088eSShreyas Bhatewara /* disable intr if needed */ 165909c5088eSShreyas Bhatewara if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 166009c5088eSShreyas Bhatewara vmxnet3_disable_intr(adapter, rq->comp_ring.intr_idx); 166109c5088eSShreyas Bhatewara napi_schedule(&rq->napi); 166209c5088eSShreyas Bhatewara 166309c5088eSShreyas Bhatewara return IRQ_HANDLED; 166409c5088eSShreyas Bhatewara } 166509c5088eSShreyas Bhatewara 166609c5088eSShreyas Bhatewara /* 166709c5088eSShreyas Bhatewara *---------------------------------------------------------------------------- 166809c5088eSShreyas Bhatewara * 166909c5088eSShreyas Bhatewara * vmxnet3_msix_event -- 167009c5088eSShreyas Bhatewara * 167109c5088eSShreyas Bhatewara * vmxnet3 msix event intr handler 167209c5088eSShreyas Bhatewara * 167309c5088eSShreyas Bhatewara * Result: 167409c5088eSShreyas Bhatewara * whether or not the intr is handled 167509c5088eSShreyas Bhatewara * 167609c5088eSShreyas Bhatewara *---------------------------------------------------------------------------- 167709c5088eSShreyas Bhatewara */ 167809c5088eSShreyas Bhatewara 167909c5088eSShreyas Bhatewara static irqreturn_t 168009c5088eSShreyas Bhatewara vmxnet3_msix_event(int irq, void *data) 168109c5088eSShreyas Bhatewara { 168209c5088eSShreyas Bhatewara struct net_device *dev = data; 168309c5088eSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(dev); 168409c5088eSShreyas Bhatewara 168509c5088eSShreyas Bhatewara /* disable intr if needed */ 168609c5088eSShreyas Bhatewara if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 168709c5088eSShreyas Bhatewara vmxnet3_disable_intr(adapter, adapter->intr.event_intr_idx); 168809c5088eSShreyas Bhatewara 168909c5088eSShreyas Bhatewara if (adapter->shared->ecr) 169009c5088eSShreyas Bhatewara vmxnet3_process_events(adapter); 169109c5088eSShreyas Bhatewara 169209c5088eSShreyas Bhatewara vmxnet3_enable_intr(adapter, adapter->intr.event_intr_idx); 169309c5088eSShreyas Bhatewara 169409c5088eSShreyas Bhatewara return IRQ_HANDLED; 169509c5088eSShreyas Bhatewara } 169609c5088eSShreyas Bhatewara 169709c5088eSShreyas Bhatewara #endif /* CONFIG_PCI_MSI */ 169809c5088eSShreyas Bhatewara 1699d1a890faSShreyas Bhatewara 1700d1a890faSShreyas Bhatewara /* Interrupt handler for vmxnet3 */ 1701d1a890faSShreyas Bhatewara static irqreturn_t 1702d1a890faSShreyas Bhatewara vmxnet3_intr(int irq, void *dev_id) 1703d1a890faSShreyas Bhatewara { 1704d1a890faSShreyas Bhatewara struct net_device *dev = dev_id; 1705d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(dev); 1706d1a890faSShreyas Bhatewara 170709c5088eSShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_INTX) { 1708d1a890faSShreyas Bhatewara u32 icr = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_ICR); 1709d1a890faSShreyas Bhatewara if (unlikely(icr == 0)) 1710d1a890faSShreyas Bhatewara /* not ours */ 1711d1a890faSShreyas Bhatewara return IRQ_NONE; 1712d1a890faSShreyas Bhatewara } 1713d1a890faSShreyas Bhatewara 1714d1a890faSShreyas Bhatewara 1715d1a890faSShreyas Bhatewara /* disable intr if needed */ 1716d1a890faSShreyas Bhatewara if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 171709c5088eSShreyas Bhatewara vmxnet3_disable_all_intrs(adapter); 1718d1a890faSShreyas Bhatewara 171909c5088eSShreyas Bhatewara napi_schedule(&adapter->rx_queue[0].napi); 1720d1a890faSShreyas Bhatewara 1721d1a890faSShreyas Bhatewara return IRQ_HANDLED; 1722d1a890faSShreyas Bhatewara } 1723d1a890faSShreyas Bhatewara 1724d1a890faSShreyas Bhatewara #ifdef CONFIG_NET_POLL_CONTROLLER 1725d1a890faSShreyas Bhatewara 1726d1a890faSShreyas Bhatewara /* netpoll callback. */ 1727d1a890faSShreyas Bhatewara static void 1728d1a890faSShreyas Bhatewara vmxnet3_netpoll(struct net_device *netdev) 1729d1a890faSShreyas Bhatewara { 1730d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1731d1a890faSShreyas Bhatewara 173209c5088eSShreyas Bhatewara if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 173309c5088eSShreyas Bhatewara vmxnet3_disable_all_intrs(adapter); 1734d1a890faSShreyas Bhatewara 173509c5088eSShreyas Bhatewara vmxnet3_do_poll(adapter, adapter->rx_queue[0].rx_ring[0].size); 173609c5088eSShreyas Bhatewara vmxnet3_enable_all_intrs(adapter); 173709c5088eSShreyas Bhatewara 1738d1a890faSShreyas Bhatewara } 173909c5088eSShreyas Bhatewara #endif /* CONFIG_NET_POLL_CONTROLLER */ 1740d1a890faSShreyas Bhatewara 1741d1a890faSShreyas Bhatewara static int 1742d1a890faSShreyas Bhatewara vmxnet3_request_irqs(struct vmxnet3_adapter *adapter) 1743d1a890faSShreyas Bhatewara { 174409c5088eSShreyas Bhatewara struct vmxnet3_intr *intr = &adapter->intr; 174509c5088eSShreyas Bhatewara int err = 0, i; 174609c5088eSShreyas Bhatewara int vector = 0; 1747d1a890faSShreyas Bhatewara 17488f7e524cSRandy Dunlap #ifdef CONFIG_PCI_MSI 1749d1a890faSShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_MSIX) { 175009c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) { 175109c5088eSShreyas Bhatewara if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) { 175209c5088eSShreyas Bhatewara sprintf(adapter->tx_queue[i].name, "%s-tx-%d", 175309c5088eSShreyas Bhatewara adapter->netdev->name, vector); 175409c5088eSShreyas Bhatewara err = request_irq( 175509c5088eSShreyas Bhatewara intr->msix_entries[vector].vector, 175609c5088eSShreyas Bhatewara vmxnet3_msix_tx, 0, 175709c5088eSShreyas Bhatewara adapter->tx_queue[i].name, 175809c5088eSShreyas Bhatewara &adapter->tx_queue[i]); 175909c5088eSShreyas Bhatewara } else { 176009c5088eSShreyas Bhatewara sprintf(adapter->tx_queue[i].name, "%s-rxtx-%d", 176109c5088eSShreyas Bhatewara adapter->netdev->name, vector); 176209c5088eSShreyas Bhatewara } 176309c5088eSShreyas Bhatewara if (err) { 176409c5088eSShreyas Bhatewara dev_err(&adapter->netdev->dev, 176509c5088eSShreyas Bhatewara "Failed to request irq for MSIX, %s, " 176609c5088eSShreyas Bhatewara "error %d\n", 176709c5088eSShreyas Bhatewara adapter->tx_queue[i].name, err); 176809c5088eSShreyas Bhatewara return err; 176909c5088eSShreyas Bhatewara } 177009c5088eSShreyas Bhatewara 177109c5088eSShreyas Bhatewara /* Handle the case where only 1 MSIx was allocated for 177209c5088eSShreyas Bhatewara * all tx queues */ 177309c5088eSShreyas Bhatewara if (adapter->share_intr == VMXNET3_INTR_TXSHARE) { 177409c5088eSShreyas Bhatewara for (; i < adapter->num_tx_queues; i++) 177509c5088eSShreyas Bhatewara adapter->tx_queue[i].comp_ring.intr_idx 177609c5088eSShreyas Bhatewara = vector; 177709c5088eSShreyas Bhatewara vector++; 177809c5088eSShreyas Bhatewara break; 177909c5088eSShreyas Bhatewara } else { 178009c5088eSShreyas Bhatewara adapter->tx_queue[i].comp_ring.intr_idx 178109c5088eSShreyas Bhatewara = vector++; 178209c5088eSShreyas Bhatewara } 178309c5088eSShreyas Bhatewara } 178409c5088eSShreyas Bhatewara if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE) 178509c5088eSShreyas Bhatewara vector = 0; 178609c5088eSShreyas Bhatewara 178709c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 178809c5088eSShreyas Bhatewara if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) 178909c5088eSShreyas Bhatewara sprintf(adapter->rx_queue[i].name, "%s-rx-%d", 179009c5088eSShreyas Bhatewara adapter->netdev->name, vector); 179109c5088eSShreyas Bhatewara else 179209c5088eSShreyas Bhatewara sprintf(adapter->rx_queue[i].name, "%s-rxtx-%d", 179309c5088eSShreyas Bhatewara adapter->netdev->name, vector); 179409c5088eSShreyas Bhatewara err = request_irq(intr->msix_entries[vector].vector, 179509c5088eSShreyas Bhatewara vmxnet3_msix_rx, 0, 179609c5088eSShreyas Bhatewara adapter->rx_queue[i].name, 179709c5088eSShreyas Bhatewara &(adapter->rx_queue[i])); 179809c5088eSShreyas Bhatewara if (err) { 179909c5088eSShreyas Bhatewara printk(KERN_ERR "Failed to request irq for MSIX" 180009c5088eSShreyas Bhatewara ", %s, error %d\n", 180109c5088eSShreyas Bhatewara adapter->rx_queue[i].name, err); 180209c5088eSShreyas Bhatewara return err; 180309c5088eSShreyas Bhatewara } 180409c5088eSShreyas Bhatewara 180509c5088eSShreyas Bhatewara adapter->rx_queue[i].comp_ring.intr_idx = vector++; 180609c5088eSShreyas Bhatewara } 180709c5088eSShreyas Bhatewara 180809c5088eSShreyas Bhatewara sprintf(intr->event_msi_vector_name, "%s-event-%d", 180909c5088eSShreyas Bhatewara adapter->netdev->name, vector); 181009c5088eSShreyas Bhatewara err = request_irq(intr->msix_entries[vector].vector, 181109c5088eSShreyas Bhatewara vmxnet3_msix_event, 0, 181209c5088eSShreyas Bhatewara intr->event_msi_vector_name, adapter->netdev); 181309c5088eSShreyas Bhatewara intr->event_intr_idx = vector; 181409c5088eSShreyas Bhatewara 181509c5088eSShreyas Bhatewara } else if (intr->type == VMXNET3_IT_MSI) { 181609c5088eSShreyas Bhatewara adapter->num_rx_queues = 1; 1817d1a890faSShreyas Bhatewara err = request_irq(adapter->pdev->irq, vmxnet3_intr, 0, 1818d1a890faSShreyas Bhatewara adapter->netdev->name, adapter->netdev); 181909c5088eSShreyas Bhatewara } else { 1820115924b6SShreyas Bhatewara #endif 182109c5088eSShreyas Bhatewara adapter->num_rx_queues = 1; 1822d1a890faSShreyas Bhatewara err = request_irq(adapter->pdev->irq, vmxnet3_intr, 1823d1a890faSShreyas Bhatewara IRQF_SHARED, adapter->netdev->name, 1824d1a890faSShreyas Bhatewara adapter->netdev); 182509c5088eSShreyas Bhatewara #ifdef CONFIG_PCI_MSI 182609c5088eSShreyas Bhatewara } 182709c5088eSShreyas Bhatewara #endif 182809c5088eSShreyas Bhatewara intr->num_intrs = vector + 1; 182909c5088eSShreyas Bhatewara if (err) { 183009c5088eSShreyas Bhatewara printk(KERN_ERR "Failed to request irq %s (intr type:%d), error" 183109c5088eSShreyas Bhatewara ":%d\n", adapter->netdev->name, intr->type, err); 183209c5088eSShreyas Bhatewara } else { 183309c5088eSShreyas Bhatewara /* Number of rx queues will not change after this */ 183409c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 183509c5088eSShreyas Bhatewara struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i]; 183609c5088eSShreyas Bhatewara rq->qid = i; 183709c5088eSShreyas Bhatewara rq->qid2 = i + adapter->num_rx_queues; 1838d1a890faSShreyas Bhatewara } 1839d1a890faSShreyas Bhatewara 1840d1a890faSShreyas Bhatewara 1841d1a890faSShreyas Bhatewara 1842d1a890faSShreyas Bhatewara /* init our intr settings */ 184309c5088eSShreyas Bhatewara for (i = 0; i < intr->num_intrs; i++) 184409c5088eSShreyas Bhatewara intr->mod_levels[i] = UPT1_IML_ADAPTIVE; 184509c5088eSShreyas Bhatewara if (adapter->intr.type != VMXNET3_IT_MSIX) { 1846d1a890faSShreyas Bhatewara adapter->intr.event_intr_idx = 0; 184709c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 184809c5088eSShreyas Bhatewara adapter->tx_queue[i].comp_ring.intr_idx = 0; 184909c5088eSShreyas Bhatewara adapter->rx_queue[0].comp_ring.intr_idx = 0; 185009c5088eSShreyas Bhatewara } 1851d1a890faSShreyas Bhatewara 1852d1a890faSShreyas Bhatewara printk(KERN_INFO "%s: intr type %u, mode %u, %u vectors " 185309c5088eSShreyas Bhatewara "allocated\n", adapter->netdev->name, intr->type, 185409c5088eSShreyas Bhatewara intr->mask_mode, intr->num_intrs); 1855d1a890faSShreyas Bhatewara } 1856d1a890faSShreyas Bhatewara 1857d1a890faSShreyas Bhatewara return err; 1858d1a890faSShreyas Bhatewara } 1859d1a890faSShreyas Bhatewara 1860d1a890faSShreyas Bhatewara 1861d1a890faSShreyas Bhatewara static void 1862d1a890faSShreyas Bhatewara vmxnet3_free_irqs(struct vmxnet3_adapter *adapter) 1863d1a890faSShreyas Bhatewara { 186409c5088eSShreyas Bhatewara struct vmxnet3_intr *intr = &adapter->intr; 186509c5088eSShreyas Bhatewara BUG_ON(intr->type == VMXNET3_IT_AUTO || intr->num_intrs <= 0); 1866d1a890faSShreyas Bhatewara 186709c5088eSShreyas Bhatewara switch (intr->type) { 18688f7e524cSRandy Dunlap #ifdef CONFIG_PCI_MSI 1869d1a890faSShreyas Bhatewara case VMXNET3_IT_MSIX: 1870d1a890faSShreyas Bhatewara { 187109c5088eSShreyas Bhatewara int i, vector = 0; 1872d1a890faSShreyas Bhatewara 187309c5088eSShreyas Bhatewara if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) { 187409c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) { 187509c5088eSShreyas Bhatewara free_irq(intr->msix_entries[vector++].vector, 187609c5088eSShreyas Bhatewara &(adapter->tx_queue[i])); 187709c5088eSShreyas Bhatewara if (adapter->share_intr == VMXNET3_INTR_TXSHARE) 187809c5088eSShreyas Bhatewara break; 187909c5088eSShreyas Bhatewara } 188009c5088eSShreyas Bhatewara } 188109c5088eSShreyas Bhatewara 188209c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 188309c5088eSShreyas Bhatewara free_irq(intr->msix_entries[vector++].vector, 188409c5088eSShreyas Bhatewara &(adapter->rx_queue[i])); 188509c5088eSShreyas Bhatewara } 188609c5088eSShreyas Bhatewara 188709c5088eSShreyas Bhatewara free_irq(intr->msix_entries[vector].vector, 1888d1a890faSShreyas Bhatewara adapter->netdev); 188909c5088eSShreyas Bhatewara BUG_ON(vector >= intr->num_intrs); 1890d1a890faSShreyas Bhatewara break; 1891d1a890faSShreyas Bhatewara } 18928f7e524cSRandy Dunlap #endif 1893d1a890faSShreyas Bhatewara case VMXNET3_IT_MSI: 1894d1a890faSShreyas Bhatewara free_irq(adapter->pdev->irq, adapter->netdev); 1895d1a890faSShreyas Bhatewara break; 1896d1a890faSShreyas Bhatewara case VMXNET3_IT_INTX: 1897d1a890faSShreyas Bhatewara free_irq(adapter->pdev->irq, adapter->netdev); 1898d1a890faSShreyas Bhatewara break; 1899d1a890faSShreyas Bhatewara default: 1900d1a890faSShreyas Bhatewara BUG_ON(true); 1901d1a890faSShreyas Bhatewara } 1902d1a890faSShreyas Bhatewara } 1903d1a890faSShreyas Bhatewara 1904d1a890faSShreyas Bhatewara 1905d1a890faSShreyas Bhatewara static void 1906d1a890faSShreyas Bhatewara vmxnet3_restore_vlan(struct vmxnet3_adapter *adapter) 1907d1a890faSShreyas Bhatewara { 1908d1a890faSShreyas Bhatewara u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 190972e85c45SJesse Gross u16 vid; 1910d1a890faSShreyas Bhatewara 191172e85c45SJesse Gross /* allow untagged pkts */ 1912d1a890faSShreyas Bhatewara VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0); 191372e85c45SJesse Gross 191472e85c45SJesse Gross for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID) 191572e85c45SJesse Gross VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid); 1916d1a890faSShreyas Bhatewara } 1917d1a890faSShreyas Bhatewara 1918d1a890faSShreyas Bhatewara 19198e586137SJiri Pirko static int 1920d1a890faSShreyas Bhatewara vmxnet3_vlan_rx_add_vid(struct net_device *netdev, u16 vid) 1921d1a890faSShreyas Bhatewara { 1922d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1923f6957f88SJesse Gross 1924f6957f88SJesse Gross if (!(netdev->flags & IFF_PROMISC)) { 1925d1a890faSShreyas Bhatewara u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 192683d0feffSShreyas Bhatewara unsigned long flags; 1927d1a890faSShreyas Bhatewara 1928d1a890faSShreyas Bhatewara VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid); 192983d0feffSShreyas Bhatewara spin_lock_irqsave(&adapter->cmd_lock, flags); 1930d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1931d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_VLAN_FILTERS); 193283d0feffSShreyas Bhatewara spin_unlock_irqrestore(&adapter->cmd_lock, flags); 1933f6957f88SJesse Gross } 193472e85c45SJesse Gross 193572e85c45SJesse Gross set_bit(vid, adapter->active_vlans); 19368e586137SJiri Pirko 19378e586137SJiri Pirko return 0; 1938d1a890faSShreyas Bhatewara } 1939d1a890faSShreyas Bhatewara 1940d1a890faSShreyas Bhatewara 19418e586137SJiri Pirko static int 1942d1a890faSShreyas Bhatewara vmxnet3_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) 1943d1a890faSShreyas Bhatewara { 1944d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1945f6957f88SJesse Gross 1946f6957f88SJesse Gross if (!(netdev->flags & IFF_PROMISC)) { 1947d1a890faSShreyas Bhatewara u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 194883d0feffSShreyas Bhatewara unsigned long flags; 1949d1a890faSShreyas Bhatewara 1950d1a890faSShreyas Bhatewara VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid); 195183d0feffSShreyas Bhatewara spin_lock_irqsave(&adapter->cmd_lock, flags); 1952d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1953d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_VLAN_FILTERS); 195483d0feffSShreyas Bhatewara spin_unlock_irqrestore(&adapter->cmd_lock, flags); 1955f6957f88SJesse Gross } 195672e85c45SJesse Gross 195772e85c45SJesse Gross clear_bit(vid, adapter->active_vlans); 19588e586137SJiri Pirko 19598e586137SJiri Pirko return 0; 1960d1a890faSShreyas Bhatewara } 1961d1a890faSShreyas Bhatewara 1962d1a890faSShreyas Bhatewara 1963d1a890faSShreyas Bhatewara static u8 * 1964d1a890faSShreyas Bhatewara vmxnet3_copy_mc(struct net_device *netdev) 1965d1a890faSShreyas Bhatewara { 1966d1a890faSShreyas Bhatewara u8 *buf = NULL; 19674cd24eafSJiri Pirko u32 sz = netdev_mc_count(netdev) * ETH_ALEN; 1968d1a890faSShreyas Bhatewara 1969d1a890faSShreyas Bhatewara /* struct Vmxnet3_RxFilterConf.mfTableLen is u16. */ 1970d1a890faSShreyas Bhatewara if (sz <= 0xffff) { 1971d1a890faSShreyas Bhatewara /* We may be called with BH disabled */ 1972d1a890faSShreyas Bhatewara buf = kmalloc(sz, GFP_ATOMIC); 1973d1a890faSShreyas Bhatewara if (buf) { 197422bedad3SJiri Pirko struct netdev_hw_addr *ha; 1975567ec874SJiri Pirko int i = 0; 1976d1a890faSShreyas Bhatewara 197722bedad3SJiri Pirko netdev_for_each_mc_addr(ha, netdev) 197822bedad3SJiri Pirko memcpy(buf + i++ * ETH_ALEN, ha->addr, 1979d1a890faSShreyas Bhatewara ETH_ALEN); 1980d1a890faSShreyas Bhatewara } 1981d1a890faSShreyas Bhatewara } 1982d1a890faSShreyas Bhatewara return buf; 1983d1a890faSShreyas Bhatewara } 1984d1a890faSShreyas Bhatewara 1985d1a890faSShreyas Bhatewara 1986d1a890faSShreyas Bhatewara static void 1987d1a890faSShreyas Bhatewara vmxnet3_set_mc(struct net_device *netdev) 1988d1a890faSShreyas Bhatewara { 1989d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 199083d0feffSShreyas Bhatewara unsigned long flags; 1991d1a890faSShreyas Bhatewara struct Vmxnet3_RxFilterConf *rxConf = 1992d1a890faSShreyas Bhatewara &adapter->shared->devRead.rxFilterConf; 1993d1a890faSShreyas Bhatewara u8 *new_table = NULL; 1994d1a890faSShreyas Bhatewara u32 new_mode = VMXNET3_RXM_UCAST; 1995d1a890faSShreyas Bhatewara 199672e85c45SJesse Gross if (netdev->flags & IFF_PROMISC) { 199772e85c45SJesse Gross u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 199872e85c45SJesse Gross memset(vfTable, 0, VMXNET3_VFT_SIZE * sizeof(*vfTable)); 199972e85c45SJesse Gross 2000d1a890faSShreyas Bhatewara new_mode |= VMXNET3_RXM_PROMISC; 200172e85c45SJesse Gross } else { 200272e85c45SJesse Gross vmxnet3_restore_vlan(adapter); 200372e85c45SJesse Gross } 2004d1a890faSShreyas Bhatewara 2005d1a890faSShreyas Bhatewara if (netdev->flags & IFF_BROADCAST) 2006d1a890faSShreyas Bhatewara new_mode |= VMXNET3_RXM_BCAST; 2007d1a890faSShreyas Bhatewara 2008d1a890faSShreyas Bhatewara if (netdev->flags & IFF_ALLMULTI) 2009d1a890faSShreyas Bhatewara new_mode |= VMXNET3_RXM_ALL_MULTI; 2010d1a890faSShreyas Bhatewara else 20114cd24eafSJiri Pirko if (!netdev_mc_empty(netdev)) { 2012d1a890faSShreyas Bhatewara new_table = vmxnet3_copy_mc(netdev); 2013d1a890faSShreyas Bhatewara if (new_table) { 2014d1a890faSShreyas Bhatewara new_mode |= VMXNET3_RXM_MCAST; 2015115924b6SShreyas Bhatewara rxConf->mfTableLen = cpu_to_le16( 20164cd24eafSJiri Pirko netdev_mc_count(netdev) * ETH_ALEN); 2017115924b6SShreyas Bhatewara rxConf->mfTablePA = cpu_to_le64(virt_to_phys( 2018115924b6SShreyas Bhatewara new_table)); 2019d1a890faSShreyas Bhatewara } else { 2020d1a890faSShreyas Bhatewara printk(KERN_INFO "%s: failed to copy mcast list" 2021d1a890faSShreyas Bhatewara ", setting ALL_MULTI\n", netdev->name); 2022d1a890faSShreyas Bhatewara new_mode |= VMXNET3_RXM_ALL_MULTI; 2023d1a890faSShreyas Bhatewara } 2024d1a890faSShreyas Bhatewara } 2025d1a890faSShreyas Bhatewara 2026d1a890faSShreyas Bhatewara 2027d1a890faSShreyas Bhatewara if (!(new_mode & VMXNET3_RXM_MCAST)) { 2028d1a890faSShreyas Bhatewara rxConf->mfTableLen = 0; 2029d1a890faSShreyas Bhatewara rxConf->mfTablePA = 0; 2030d1a890faSShreyas Bhatewara } 2031d1a890faSShreyas Bhatewara 203283d0feffSShreyas Bhatewara spin_lock_irqsave(&adapter->cmd_lock, flags); 2033d1a890faSShreyas Bhatewara if (new_mode != rxConf->rxMode) { 2034115924b6SShreyas Bhatewara rxConf->rxMode = cpu_to_le32(new_mode); 2035d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2036d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_RX_MODE); 203772e85c45SJesse Gross VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 203872e85c45SJesse Gross VMXNET3_CMD_UPDATE_VLAN_FILTERS); 2039d1a890faSShreyas Bhatewara } 2040d1a890faSShreyas Bhatewara 2041d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2042d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_MAC_FILTERS); 204383d0feffSShreyas Bhatewara spin_unlock_irqrestore(&adapter->cmd_lock, flags); 2044d1a890faSShreyas Bhatewara 2045d1a890faSShreyas Bhatewara kfree(new_table); 2046d1a890faSShreyas Bhatewara } 2047d1a890faSShreyas Bhatewara 204809c5088eSShreyas Bhatewara void 204909c5088eSShreyas Bhatewara vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter) 205009c5088eSShreyas Bhatewara { 205109c5088eSShreyas Bhatewara int i; 205209c5088eSShreyas Bhatewara 205309c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 205409c5088eSShreyas Bhatewara vmxnet3_rq_destroy(&adapter->rx_queue[i], adapter); 205509c5088eSShreyas Bhatewara } 205609c5088eSShreyas Bhatewara 2057d1a890faSShreyas Bhatewara 2058d1a890faSShreyas Bhatewara /* 2059d1a890faSShreyas Bhatewara * Set up driver_shared based on settings in adapter. 2060d1a890faSShreyas Bhatewara */ 2061d1a890faSShreyas Bhatewara 2062d1a890faSShreyas Bhatewara static void 2063d1a890faSShreyas Bhatewara vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter) 2064d1a890faSShreyas Bhatewara { 2065d1a890faSShreyas Bhatewara struct Vmxnet3_DriverShared *shared = adapter->shared; 2066d1a890faSShreyas Bhatewara struct Vmxnet3_DSDevRead *devRead = &shared->devRead; 2067d1a890faSShreyas Bhatewara struct Vmxnet3_TxQueueConf *tqc; 2068d1a890faSShreyas Bhatewara struct Vmxnet3_RxQueueConf *rqc; 2069d1a890faSShreyas Bhatewara int i; 2070d1a890faSShreyas Bhatewara 2071d1a890faSShreyas Bhatewara memset(shared, 0, sizeof(*shared)); 2072d1a890faSShreyas Bhatewara 2073d1a890faSShreyas Bhatewara /* driver settings */ 2074115924b6SShreyas Bhatewara shared->magic = cpu_to_le32(VMXNET3_REV1_MAGIC); 2075115924b6SShreyas Bhatewara devRead->misc.driverInfo.version = cpu_to_le32( 2076115924b6SShreyas Bhatewara VMXNET3_DRIVER_VERSION_NUM); 2077d1a890faSShreyas Bhatewara devRead->misc.driverInfo.gos.gosBits = (sizeof(void *) == 4 ? 2078d1a890faSShreyas Bhatewara VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64); 2079d1a890faSShreyas Bhatewara devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX; 2080115924b6SShreyas Bhatewara *((u32 *)&devRead->misc.driverInfo.gos) = cpu_to_le32( 2081115924b6SShreyas Bhatewara *((u32 *)&devRead->misc.driverInfo.gos)); 2082115924b6SShreyas Bhatewara devRead->misc.driverInfo.vmxnet3RevSpt = cpu_to_le32(1); 2083115924b6SShreyas Bhatewara devRead->misc.driverInfo.uptVerSpt = cpu_to_le32(1); 2084d1a890faSShreyas Bhatewara 2085115924b6SShreyas Bhatewara devRead->misc.ddPA = cpu_to_le64(virt_to_phys(adapter)); 2086115924b6SShreyas Bhatewara devRead->misc.ddLen = cpu_to_le32(sizeof(struct vmxnet3_adapter)); 2087d1a890faSShreyas Bhatewara 2088d1a890faSShreyas Bhatewara /* set up feature flags */ 2089a0d2730cSMichał Mirosław if (adapter->netdev->features & NETIF_F_RXCSUM) 20903843e515SHarvey Harrison devRead->misc.uptFeatures |= UPT1_F_RXCSUM; 2091d1a890faSShreyas Bhatewara 2092a0d2730cSMichał Mirosław if (adapter->netdev->features & NETIF_F_LRO) { 20933843e515SHarvey Harrison devRead->misc.uptFeatures |= UPT1_F_LRO; 2094115924b6SShreyas Bhatewara devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS); 2095d1a890faSShreyas Bhatewara } 209654da3d00SShreyas Bhatewara if (adapter->netdev->features & NETIF_F_HW_VLAN_RX) 20973843e515SHarvey Harrison devRead->misc.uptFeatures |= UPT1_F_RXVLAN; 2098d1a890faSShreyas Bhatewara 2099115924b6SShreyas Bhatewara devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu); 2100115924b6SShreyas Bhatewara devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa); 2101115924b6SShreyas Bhatewara devRead->misc.queueDescLen = cpu_to_le32( 210209c5088eSShreyas Bhatewara adapter->num_tx_queues * sizeof(struct Vmxnet3_TxQueueDesc) + 210309c5088eSShreyas Bhatewara adapter->num_rx_queues * sizeof(struct Vmxnet3_RxQueueDesc)); 2104d1a890faSShreyas Bhatewara 2105d1a890faSShreyas Bhatewara /* tx queue settings */ 210609c5088eSShreyas Bhatewara devRead->misc.numTxQueues = adapter->num_tx_queues; 210709c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) { 210809c5088eSShreyas Bhatewara struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i]; 210909c5088eSShreyas Bhatewara BUG_ON(adapter->tx_queue[i].tx_ring.base == NULL); 211009c5088eSShreyas Bhatewara tqc = &adapter->tqd_start[i].conf; 211109c5088eSShreyas Bhatewara tqc->txRingBasePA = cpu_to_le64(tq->tx_ring.basePA); 211209c5088eSShreyas Bhatewara tqc->dataRingBasePA = cpu_to_le64(tq->data_ring.basePA); 211309c5088eSShreyas Bhatewara tqc->compRingBasePA = cpu_to_le64(tq->comp_ring.basePA); 211409c5088eSShreyas Bhatewara tqc->ddPA = cpu_to_le64(virt_to_phys(tq->buf_info)); 211509c5088eSShreyas Bhatewara tqc->txRingSize = cpu_to_le32(tq->tx_ring.size); 211609c5088eSShreyas Bhatewara tqc->dataRingSize = cpu_to_le32(tq->data_ring.size); 211709c5088eSShreyas Bhatewara tqc->compRingSize = cpu_to_le32(tq->comp_ring.size); 211809c5088eSShreyas Bhatewara tqc->ddLen = cpu_to_le32( 211909c5088eSShreyas Bhatewara sizeof(struct vmxnet3_tx_buf_info) * 2120115924b6SShreyas Bhatewara tqc->txRingSize); 212109c5088eSShreyas Bhatewara tqc->intrIdx = tq->comp_ring.intr_idx; 212209c5088eSShreyas Bhatewara } 2123d1a890faSShreyas Bhatewara 2124d1a890faSShreyas Bhatewara /* rx queue settings */ 212509c5088eSShreyas Bhatewara devRead->misc.numRxQueues = adapter->num_rx_queues; 212609c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 212709c5088eSShreyas Bhatewara struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i]; 212809c5088eSShreyas Bhatewara rqc = &adapter->rqd_start[i].conf; 212909c5088eSShreyas Bhatewara rqc->rxRingBasePA[0] = cpu_to_le64(rq->rx_ring[0].basePA); 213009c5088eSShreyas Bhatewara rqc->rxRingBasePA[1] = cpu_to_le64(rq->rx_ring[1].basePA); 213109c5088eSShreyas Bhatewara rqc->compRingBasePA = cpu_to_le64(rq->comp_ring.basePA); 2132115924b6SShreyas Bhatewara rqc->ddPA = cpu_to_le64(virt_to_phys( 213309c5088eSShreyas Bhatewara rq->buf_info)); 213409c5088eSShreyas Bhatewara rqc->rxRingSize[0] = cpu_to_le32(rq->rx_ring[0].size); 213509c5088eSShreyas Bhatewara rqc->rxRingSize[1] = cpu_to_le32(rq->rx_ring[1].size); 213609c5088eSShreyas Bhatewara rqc->compRingSize = cpu_to_le32(rq->comp_ring.size); 213709c5088eSShreyas Bhatewara rqc->ddLen = cpu_to_le32( 213809c5088eSShreyas Bhatewara sizeof(struct vmxnet3_rx_buf_info) * 213909c5088eSShreyas Bhatewara (rqc->rxRingSize[0] + 214009c5088eSShreyas Bhatewara rqc->rxRingSize[1])); 214109c5088eSShreyas Bhatewara rqc->intrIdx = rq->comp_ring.intr_idx; 214209c5088eSShreyas Bhatewara } 214309c5088eSShreyas Bhatewara 214409c5088eSShreyas Bhatewara #ifdef VMXNET3_RSS 214509c5088eSShreyas Bhatewara memset(adapter->rss_conf, 0, sizeof(*adapter->rss_conf)); 214609c5088eSShreyas Bhatewara 214709c5088eSShreyas Bhatewara if (adapter->rss) { 214809c5088eSShreyas Bhatewara struct UPT1_RSSConf *rssConf = adapter->rss_conf; 214909c5088eSShreyas Bhatewara devRead->misc.uptFeatures |= UPT1_F_RSS; 215009c5088eSShreyas Bhatewara devRead->misc.numRxQueues = adapter->num_rx_queues; 215109c5088eSShreyas Bhatewara rssConf->hashType = UPT1_RSS_HASH_TYPE_TCP_IPV4 | 215209c5088eSShreyas Bhatewara UPT1_RSS_HASH_TYPE_IPV4 | 215309c5088eSShreyas Bhatewara UPT1_RSS_HASH_TYPE_TCP_IPV6 | 215409c5088eSShreyas Bhatewara UPT1_RSS_HASH_TYPE_IPV6; 215509c5088eSShreyas Bhatewara rssConf->hashFunc = UPT1_RSS_HASH_FUNC_TOEPLITZ; 215609c5088eSShreyas Bhatewara rssConf->hashKeySize = UPT1_RSS_MAX_KEY_SIZE; 215709c5088eSShreyas Bhatewara rssConf->indTableSize = VMXNET3_RSS_IND_TABLE_SIZE; 215809c5088eSShreyas Bhatewara get_random_bytes(&rssConf->hashKey[0], rssConf->hashKeySize); 215909c5088eSShreyas Bhatewara for (i = 0; i < rssConf->indTableSize; i++) 2160278bc429SBen Hutchings rssConf->indTable[i] = ethtool_rxfh_indir_default( 2161278bc429SBen Hutchings i, adapter->num_rx_queues); 216209c5088eSShreyas Bhatewara 216309c5088eSShreyas Bhatewara devRead->rssConfDesc.confVer = 1; 216409c5088eSShreyas Bhatewara devRead->rssConfDesc.confLen = sizeof(*rssConf); 216509c5088eSShreyas Bhatewara devRead->rssConfDesc.confPA = virt_to_phys(rssConf); 216609c5088eSShreyas Bhatewara } 216709c5088eSShreyas Bhatewara 216809c5088eSShreyas Bhatewara #endif /* VMXNET3_RSS */ 2169d1a890faSShreyas Bhatewara 2170d1a890faSShreyas Bhatewara /* intr settings */ 2171d1a890faSShreyas Bhatewara devRead->intrConf.autoMask = adapter->intr.mask_mode == 2172d1a890faSShreyas Bhatewara VMXNET3_IMM_AUTO; 2173d1a890faSShreyas Bhatewara devRead->intrConf.numIntrs = adapter->intr.num_intrs; 2174d1a890faSShreyas Bhatewara for (i = 0; i < adapter->intr.num_intrs; i++) 2175d1a890faSShreyas Bhatewara devRead->intrConf.modLevels[i] = adapter->intr.mod_levels[i]; 2176d1a890faSShreyas Bhatewara 2177d1a890faSShreyas Bhatewara devRead->intrConf.eventIntrIdx = adapter->intr.event_intr_idx; 21786929fe8aSRonghua Zang devRead->intrConf.intrCtrl |= cpu_to_le32(VMXNET3_IC_DISABLE_ALL); 2179d1a890faSShreyas Bhatewara 2180d1a890faSShreyas Bhatewara /* rx filter settings */ 2181d1a890faSShreyas Bhatewara devRead->rxFilterConf.rxMode = 0; 2182d1a890faSShreyas Bhatewara vmxnet3_restore_vlan(adapter); 2183f9f25026SShreyas Bhatewara vmxnet3_write_mac_addr(adapter, adapter->netdev->dev_addr); 2184f9f25026SShreyas Bhatewara 2185d1a890faSShreyas Bhatewara /* the rest are already zeroed */ 2186d1a890faSShreyas Bhatewara } 2187d1a890faSShreyas Bhatewara 2188d1a890faSShreyas Bhatewara 2189d1a890faSShreyas Bhatewara int 2190d1a890faSShreyas Bhatewara vmxnet3_activate_dev(struct vmxnet3_adapter *adapter) 2191d1a890faSShreyas Bhatewara { 219209c5088eSShreyas Bhatewara int err, i; 2193d1a890faSShreyas Bhatewara u32 ret; 219483d0feffSShreyas Bhatewara unsigned long flags; 2195d1a890faSShreyas Bhatewara 219609c5088eSShreyas Bhatewara dev_dbg(&adapter->netdev->dev, "%s: skb_buf_size %d, rx_buf_per_pkt %d," 219709c5088eSShreyas Bhatewara " ring sizes %u %u %u\n", adapter->netdev->name, 219809c5088eSShreyas Bhatewara adapter->skb_buf_size, adapter->rx_buf_per_pkt, 219909c5088eSShreyas Bhatewara adapter->tx_queue[0].tx_ring.size, 220009c5088eSShreyas Bhatewara adapter->rx_queue[0].rx_ring[0].size, 220109c5088eSShreyas Bhatewara adapter->rx_queue[0].rx_ring[1].size); 2202d1a890faSShreyas Bhatewara 220309c5088eSShreyas Bhatewara vmxnet3_tq_init_all(adapter); 220409c5088eSShreyas Bhatewara err = vmxnet3_rq_init_all(adapter); 2205d1a890faSShreyas Bhatewara if (err) { 2206d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to init rx queue for %s: error %d\n", 2207d1a890faSShreyas Bhatewara adapter->netdev->name, err); 2208d1a890faSShreyas Bhatewara goto rq_err; 2209d1a890faSShreyas Bhatewara } 2210d1a890faSShreyas Bhatewara 2211d1a890faSShreyas Bhatewara err = vmxnet3_request_irqs(adapter); 2212d1a890faSShreyas Bhatewara if (err) { 2213d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to setup irq for %s: error %d\n", 2214d1a890faSShreyas Bhatewara adapter->netdev->name, err); 2215d1a890faSShreyas Bhatewara goto irq_err; 2216d1a890faSShreyas Bhatewara } 2217d1a890faSShreyas Bhatewara 2218d1a890faSShreyas Bhatewara vmxnet3_setup_driver_shared(adapter); 2219d1a890faSShreyas Bhatewara 2220115924b6SShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, VMXNET3_GET_ADDR_LO( 2221115924b6SShreyas Bhatewara adapter->shared_pa)); 2222115924b6SShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI( 2223115924b6SShreyas Bhatewara adapter->shared_pa)); 222483d0feffSShreyas Bhatewara spin_lock_irqsave(&adapter->cmd_lock, flags); 2225d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2226d1a890faSShreyas Bhatewara VMXNET3_CMD_ACTIVATE_DEV); 2227d1a890faSShreyas Bhatewara ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 222883d0feffSShreyas Bhatewara spin_unlock_irqrestore(&adapter->cmd_lock, flags); 2229d1a890faSShreyas Bhatewara 2230d1a890faSShreyas Bhatewara if (ret != 0) { 2231d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to activate dev %s: error %u\n", 2232d1a890faSShreyas Bhatewara adapter->netdev->name, ret); 2233d1a890faSShreyas Bhatewara err = -EINVAL; 2234d1a890faSShreyas Bhatewara goto activate_err; 2235d1a890faSShreyas Bhatewara } 223609c5088eSShreyas Bhatewara 223709c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 223809c5088eSShreyas Bhatewara VMXNET3_WRITE_BAR0_REG(adapter, 223909c5088eSShreyas Bhatewara VMXNET3_REG_RXPROD + i * VMXNET3_REG_ALIGN, 224009c5088eSShreyas Bhatewara adapter->rx_queue[i].rx_ring[0].next2fill); 224109c5088eSShreyas Bhatewara VMXNET3_WRITE_BAR0_REG(adapter, (VMXNET3_REG_RXPROD2 + 224209c5088eSShreyas Bhatewara (i * VMXNET3_REG_ALIGN)), 224309c5088eSShreyas Bhatewara adapter->rx_queue[i].rx_ring[1].next2fill); 224409c5088eSShreyas Bhatewara } 2245d1a890faSShreyas Bhatewara 2246d1a890faSShreyas Bhatewara /* Apply the rx filter settins last. */ 2247d1a890faSShreyas Bhatewara vmxnet3_set_mc(adapter->netdev); 2248d1a890faSShreyas Bhatewara 2249d1a890faSShreyas Bhatewara /* 2250d1a890faSShreyas Bhatewara * Check link state when first activating device. It will start the 2251d1a890faSShreyas Bhatewara * tx queue if the link is up. 2252d1a890faSShreyas Bhatewara */ 22534a1745fcSShreyas Bhatewara vmxnet3_check_link(adapter, true); 225409c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 225509c5088eSShreyas Bhatewara napi_enable(&adapter->rx_queue[i].napi); 2256d1a890faSShreyas Bhatewara vmxnet3_enable_all_intrs(adapter); 2257d1a890faSShreyas Bhatewara clear_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state); 2258d1a890faSShreyas Bhatewara return 0; 2259d1a890faSShreyas Bhatewara 2260d1a890faSShreyas Bhatewara activate_err: 2261d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, 0); 2262d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, 0); 2263d1a890faSShreyas Bhatewara vmxnet3_free_irqs(adapter); 2264d1a890faSShreyas Bhatewara irq_err: 2265d1a890faSShreyas Bhatewara rq_err: 2266d1a890faSShreyas Bhatewara /* free up buffers we allocated */ 226709c5088eSShreyas Bhatewara vmxnet3_rq_cleanup_all(adapter); 2268d1a890faSShreyas Bhatewara return err; 2269d1a890faSShreyas Bhatewara } 2270d1a890faSShreyas Bhatewara 2271d1a890faSShreyas Bhatewara 2272d1a890faSShreyas Bhatewara void 2273d1a890faSShreyas Bhatewara vmxnet3_reset_dev(struct vmxnet3_adapter *adapter) 2274d1a890faSShreyas Bhatewara { 227583d0feffSShreyas Bhatewara unsigned long flags; 227683d0feffSShreyas Bhatewara spin_lock_irqsave(&adapter->cmd_lock, flags); 2277d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV); 227883d0feffSShreyas Bhatewara spin_unlock_irqrestore(&adapter->cmd_lock, flags); 2279d1a890faSShreyas Bhatewara } 2280d1a890faSShreyas Bhatewara 2281d1a890faSShreyas Bhatewara 2282d1a890faSShreyas Bhatewara int 2283d1a890faSShreyas Bhatewara vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter) 2284d1a890faSShreyas Bhatewara { 228509c5088eSShreyas Bhatewara int i; 228683d0feffSShreyas Bhatewara unsigned long flags; 2287d1a890faSShreyas Bhatewara if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state)) 2288d1a890faSShreyas Bhatewara return 0; 2289d1a890faSShreyas Bhatewara 2290d1a890faSShreyas Bhatewara 229183d0feffSShreyas Bhatewara spin_lock_irqsave(&adapter->cmd_lock, flags); 2292d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2293d1a890faSShreyas Bhatewara VMXNET3_CMD_QUIESCE_DEV); 229483d0feffSShreyas Bhatewara spin_unlock_irqrestore(&adapter->cmd_lock, flags); 2295d1a890faSShreyas Bhatewara vmxnet3_disable_all_intrs(adapter); 2296d1a890faSShreyas Bhatewara 229709c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 229809c5088eSShreyas Bhatewara napi_disable(&adapter->rx_queue[i].napi); 2299d1a890faSShreyas Bhatewara netif_tx_disable(adapter->netdev); 2300d1a890faSShreyas Bhatewara adapter->link_speed = 0; 2301d1a890faSShreyas Bhatewara netif_carrier_off(adapter->netdev); 2302d1a890faSShreyas Bhatewara 230309c5088eSShreyas Bhatewara vmxnet3_tq_cleanup_all(adapter); 230409c5088eSShreyas Bhatewara vmxnet3_rq_cleanup_all(adapter); 2305d1a890faSShreyas Bhatewara vmxnet3_free_irqs(adapter); 2306d1a890faSShreyas Bhatewara return 0; 2307d1a890faSShreyas Bhatewara } 2308d1a890faSShreyas Bhatewara 2309d1a890faSShreyas Bhatewara 2310d1a890faSShreyas Bhatewara static void 2311d1a890faSShreyas Bhatewara vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac) 2312d1a890faSShreyas Bhatewara { 2313d1a890faSShreyas Bhatewara u32 tmp; 2314d1a890faSShreyas Bhatewara 2315d1a890faSShreyas Bhatewara tmp = *(u32 *)mac; 2316d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACL, tmp); 2317d1a890faSShreyas Bhatewara 2318d1a890faSShreyas Bhatewara tmp = (mac[5] << 8) | mac[4]; 2319d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACH, tmp); 2320d1a890faSShreyas Bhatewara } 2321d1a890faSShreyas Bhatewara 2322d1a890faSShreyas Bhatewara 2323d1a890faSShreyas Bhatewara static int 2324d1a890faSShreyas Bhatewara vmxnet3_set_mac_addr(struct net_device *netdev, void *p) 2325d1a890faSShreyas Bhatewara { 2326d1a890faSShreyas Bhatewara struct sockaddr *addr = p; 2327d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2328d1a890faSShreyas Bhatewara 2329d1a890faSShreyas Bhatewara memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 2330d1a890faSShreyas Bhatewara vmxnet3_write_mac_addr(adapter, addr->sa_data); 2331d1a890faSShreyas Bhatewara 2332d1a890faSShreyas Bhatewara return 0; 2333d1a890faSShreyas Bhatewara } 2334d1a890faSShreyas Bhatewara 2335d1a890faSShreyas Bhatewara 2336d1a890faSShreyas Bhatewara /* ==================== initialization and cleanup routines ============ */ 2337d1a890faSShreyas Bhatewara 2338d1a890faSShreyas Bhatewara static int 2339d1a890faSShreyas Bhatewara vmxnet3_alloc_pci_resources(struct vmxnet3_adapter *adapter, bool *dma64) 2340d1a890faSShreyas Bhatewara { 2341d1a890faSShreyas Bhatewara int err; 2342d1a890faSShreyas Bhatewara unsigned long mmio_start, mmio_len; 2343d1a890faSShreyas Bhatewara struct pci_dev *pdev = adapter->pdev; 2344d1a890faSShreyas Bhatewara 2345d1a890faSShreyas Bhatewara err = pci_enable_device(pdev); 2346d1a890faSShreyas Bhatewara if (err) { 2347d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to enable adapter %s: error %d\n", 2348d1a890faSShreyas Bhatewara pci_name(pdev), err); 2349d1a890faSShreyas Bhatewara return err; 2350d1a890faSShreyas Bhatewara } 2351d1a890faSShreyas Bhatewara 2352d1a890faSShreyas Bhatewara if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) { 2353d1a890faSShreyas Bhatewara if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) { 2354d1a890faSShreyas Bhatewara printk(KERN_ERR "pci_set_consistent_dma_mask failed " 2355d1a890faSShreyas Bhatewara "for adapter %s\n", pci_name(pdev)); 2356d1a890faSShreyas Bhatewara err = -EIO; 2357d1a890faSShreyas Bhatewara goto err_set_mask; 2358d1a890faSShreyas Bhatewara } 2359d1a890faSShreyas Bhatewara *dma64 = true; 2360d1a890faSShreyas Bhatewara } else { 2361d1a890faSShreyas Bhatewara if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) { 2362d1a890faSShreyas Bhatewara printk(KERN_ERR "pci_set_dma_mask failed for adapter " 2363d1a890faSShreyas Bhatewara "%s\n", pci_name(pdev)); 2364d1a890faSShreyas Bhatewara err = -EIO; 2365d1a890faSShreyas Bhatewara goto err_set_mask; 2366d1a890faSShreyas Bhatewara } 2367d1a890faSShreyas Bhatewara *dma64 = false; 2368d1a890faSShreyas Bhatewara } 2369d1a890faSShreyas Bhatewara 2370d1a890faSShreyas Bhatewara err = pci_request_selected_regions(pdev, (1 << 2) - 1, 2371d1a890faSShreyas Bhatewara vmxnet3_driver_name); 2372d1a890faSShreyas Bhatewara if (err) { 2373d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to request region for adapter %s: " 2374d1a890faSShreyas Bhatewara "error %d\n", pci_name(pdev), err); 2375d1a890faSShreyas Bhatewara goto err_set_mask; 2376d1a890faSShreyas Bhatewara } 2377d1a890faSShreyas Bhatewara 2378d1a890faSShreyas Bhatewara pci_set_master(pdev); 2379d1a890faSShreyas Bhatewara 2380d1a890faSShreyas Bhatewara mmio_start = pci_resource_start(pdev, 0); 2381d1a890faSShreyas Bhatewara mmio_len = pci_resource_len(pdev, 0); 2382d1a890faSShreyas Bhatewara adapter->hw_addr0 = ioremap(mmio_start, mmio_len); 2383d1a890faSShreyas Bhatewara if (!adapter->hw_addr0) { 2384d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to map bar0 for adapter %s\n", 2385d1a890faSShreyas Bhatewara pci_name(pdev)); 2386d1a890faSShreyas Bhatewara err = -EIO; 2387d1a890faSShreyas Bhatewara goto err_ioremap; 2388d1a890faSShreyas Bhatewara } 2389d1a890faSShreyas Bhatewara 2390d1a890faSShreyas Bhatewara mmio_start = pci_resource_start(pdev, 1); 2391d1a890faSShreyas Bhatewara mmio_len = pci_resource_len(pdev, 1); 2392d1a890faSShreyas Bhatewara adapter->hw_addr1 = ioremap(mmio_start, mmio_len); 2393d1a890faSShreyas Bhatewara if (!adapter->hw_addr1) { 2394d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to map bar1 for adapter %s\n", 2395d1a890faSShreyas Bhatewara pci_name(pdev)); 2396d1a890faSShreyas Bhatewara err = -EIO; 2397d1a890faSShreyas Bhatewara goto err_bar1; 2398d1a890faSShreyas Bhatewara } 2399d1a890faSShreyas Bhatewara return 0; 2400d1a890faSShreyas Bhatewara 2401d1a890faSShreyas Bhatewara err_bar1: 2402d1a890faSShreyas Bhatewara iounmap(adapter->hw_addr0); 2403d1a890faSShreyas Bhatewara err_ioremap: 2404d1a890faSShreyas Bhatewara pci_release_selected_regions(pdev, (1 << 2) - 1); 2405d1a890faSShreyas Bhatewara err_set_mask: 2406d1a890faSShreyas Bhatewara pci_disable_device(pdev); 2407d1a890faSShreyas Bhatewara return err; 2408d1a890faSShreyas Bhatewara } 2409d1a890faSShreyas Bhatewara 2410d1a890faSShreyas Bhatewara 2411d1a890faSShreyas Bhatewara static void 2412d1a890faSShreyas Bhatewara vmxnet3_free_pci_resources(struct vmxnet3_adapter *adapter) 2413d1a890faSShreyas Bhatewara { 2414d1a890faSShreyas Bhatewara BUG_ON(!adapter->pdev); 2415d1a890faSShreyas Bhatewara 2416d1a890faSShreyas Bhatewara iounmap(adapter->hw_addr0); 2417d1a890faSShreyas Bhatewara iounmap(adapter->hw_addr1); 2418d1a890faSShreyas Bhatewara pci_release_selected_regions(adapter->pdev, (1 << 2) - 1); 2419d1a890faSShreyas Bhatewara pci_disable_device(adapter->pdev); 2420d1a890faSShreyas Bhatewara } 2421d1a890faSShreyas Bhatewara 2422d1a890faSShreyas Bhatewara 2423d1a890faSShreyas Bhatewara static void 2424d1a890faSShreyas Bhatewara vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter) 2425d1a890faSShreyas Bhatewara { 242609c5088eSShreyas Bhatewara size_t sz, i, ring0_size, ring1_size, comp_size; 242709c5088eSShreyas Bhatewara struct vmxnet3_rx_queue *rq = &adapter->rx_queue[0]; 242809c5088eSShreyas Bhatewara 2429d1a890faSShreyas Bhatewara 2430d1a890faSShreyas Bhatewara if (adapter->netdev->mtu <= VMXNET3_MAX_SKB_BUF_SIZE - 2431d1a890faSShreyas Bhatewara VMXNET3_MAX_ETH_HDR_SIZE) { 2432d1a890faSShreyas Bhatewara adapter->skb_buf_size = adapter->netdev->mtu + 2433d1a890faSShreyas Bhatewara VMXNET3_MAX_ETH_HDR_SIZE; 2434d1a890faSShreyas Bhatewara if (adapter->skb_buf_size < VMXNET3_MIN_T0_BUF_SIZE) 2435d1a890faSShreyas Bhatewara adapter->skb_buf_size = VMXNET3_MIN_T0_BUF_SIZE; 2436d1a890faSShreyas Bhatewara 2437d1a890faSShreyas Bhatewara adapter->rx_buf_per_pkt = 1; 2438d1a890faSShreyas Bhatewara } else { 2439d1a890faSShreyas Bhatewara adapter->skb_buf_size = VMXNET3_MAX_SKB_BUF_SIZE; 2440d1a890faSShreyas Bhatewara sz = adapter->netdev->mtu - VMXNET3_MAX_SKB_BUF_SIZE + 2441d1a890faSShreyas Bhatewara VMXNET3_MAX_ETH_HDR_SIZE; 2442d1a890faSShreyas Bhatewara adapter->rx_buf_per_pkt = 1 + (sz + PAGE_SIZE - 1) / PAGE_SIZE; 2443d1a890faSShreyas Bhatewara } 2444d1a890faSShreyas Bhatewara 2445d1a890faSShreyas Bhatewara /* 2446d1a890faSShreyas Bhatewara * for simplicity, force the ring0 size to be a multiple of 2447d1a890faSShreyas Bhatewara * rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN 2448d1a890faSShreyas Bhatewara */ 2449d1a890faSShreyas Bhatewara sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN; 245009c5088eSShreyas Bhatewara ring0_size = adapter->rx_queue[0].rx_ring[0].size; 245109c5088eSShreyas Bhatewara ring0_size = (ring0_size + sz - 1) / sz * sz; 2452a53255d3SShreyas Bhatewara ring0_size = min_t(u32, ring0_size, VMXNET3_RX_RING_MAX_SIZE / 245309c5088eSShreyas Bhatewara sz * sz); 245409c5088eSShreyas Bhatewara ring1_size = adapter->rx_queue[0].rx_ring[1].size; 245509c5088eSShreyas Bhatewara comp_size = ring0_size + ring1_size; 245609c5088eSShreyas Bhatewara 245709c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 245809c5088eSShreyas Bhatewara rq = &adapter->rx_queue[i]; 245909c5088eSShreyas Bhatewara rq->rx_ring[0].size = ring0_size; 246009c5088eSShreyas Bhatewara rq->rx_ring[1].size = ring1_size; 246109c5088eSShreyas Bhatewara rq->comp_ring.size = comp_size; 246209c5088eSShreyas Bhatewara } 2463d1a890faSShreyas Bhatewara } 2464d1a890faSShreyas Bhatewara 2465d1a890faSShreyas Bhatewara 2466d1a890faSShreyas Bhatewara int 2467d1a890faSShreyas Bhatewara vmxnet3_create_queues(struct vmxnet3_adapter *adapter, u32 tx_ring_size, 2468d1a890faSShreyas Bhatewara u32 rx_ring_size, u32 rx_ring2_size) 2469d1a890faSShreyas Bhatewara { 247009c5088eSShreyas Bhatewara int err = 0, i; 2471d1a890faSShreyas Bhatewara 247209c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) { 247309c5088eSShreyas Bhatewara struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i]; 247409c5088eSShreyas Bhatewara tq->tx_ring.size = tx_ring_size; 247509c5088eSShreyas Bhatewara tq->data_ring.size = tx_ring_size; 247609c5088eSShreyas Bhatewara tq->comp_ring.size = tx_ring_size; 247709c5088eSShreyas Bhatewara tq->shared = &adapter->tqd_start[i].ctrl; 247809c5088eSShreyas Bhatewara tq->stopped = true; 247909c5088eSShreyas Bhatewara tq->adapter = adapter; 248009c5088eSShreyas Bhatewara tq->qid = i; 248109c5088eSShreyas Bhatewara err = vmxnet3_tq_create(tq, adapter); 248209c5088eSShreyas Bhatewara /* 248309c5088eSShreyas Bhatewara * Too late to change num_tx_queues. We cannot do away with 248409c5088eSShreyas Bhatewara * lesser number of queues than what we asked for 248509c5088eSShreyas Bhatewara */ 2486d1a890faSShreyas Bhatewara if (err) 248709c5088eSShreyas Bhatewara goto queue_err; 248809c5088eSShreyas Bhatewara } 2489d1a890faSShreyas Bhatewara 249009c5088eSShreyas Bhatewara adapter->rx_queue[0].rx_ring[0].size = rx_ring_size; 249109c5088eSShreyas Bhatewara adapter->rx_queue[0].rx_ring[1].size = rx_ring2_size; 2492d1a890faSShreyas Bhatewara vmxnet3_adjust_rx_ring_size(adapter); 249309c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 249409c5088eSShreyas Bhatewara struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i]; 249509c5088eSShreyas Bhatewara /* qid and qid2 for rx queues will be assigned later when num 249609c5088eSShreyas Bhatewara * of rx queues is finalized after allocating intrs */ 249709c5088eSShreyas Bhatewara rq->shared = &adapter->rqd_start[i].ctrl; 249809c5088eSShreyas Bhatewara rq->adapter = adapter; 249909c5088eSShreyas Bhatewara err = vmxnet3_rq_create(rq, adapter); 250009c5088eSShreyas Bhatewara if (err) { 250109c5088eSShreyas Bhatewara if (i == 0) { 250209c5088eSShreyas Bhatewara printk(KERN_ERR "Could not allocate any rx" 250309c5088eSShreyas Bhatewara "queues. Aborting.\n"); 250409c5088eSShreyas Bhatewara goto queue_err; 250509c5088eSShreyas Bhatewara } else { 250609c5088eSShreyas Bhatewara printk(KERN_INFO "Number of rx queues changed " 250709c5088eSShreyas Bhatewara "to : %d.\n", i); 250809c5088eSShreyas Bhatewara adapter->num_rx_queues = i; 250909c5088eSShreyas Bhatewara err = 0; 251009c5088eSShreyas Bhatewara break; 251109c5088eSShreyas Bhatewara } 251209c5088eSShreyas Bhatewara } 251309c5088eSShreyas Bhatewara } 251409c5088eSShreyas Bhatewara return err; 251509c5088eSShreyas Bhatewara queue_err: 251609c5088eSShreyas Bhatewara vmxnet3_tq_destroy_all(adapter); 2517d1a890faSShreyas Bhatewara return err; 2518d1a890faSShreyas Bhatewara } 2519d1a890faSShreyas Bhatewara 2520d1a890faSShreyas Bhatewara static int 2521d1a890faSShreyas Bhatewara vmxnet3_open(struct net_device *netdev) 2522d1a890faSShreyas Bhatewara { 2523d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter; 252409c5088eSShreyas Bhatewara int err, i; 2525d1a890faSShreyas Bhatewara 2526d1a890faSShreyas Bhatewara adapter = netdev_priv(netdev); 2527d1a890faSShreyas Bhatewara 252809c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 252909c5088eSShreyas Bhatewara spin_lock_init(&adapter->tx_queue[i].tx_lock); 2530d1a890faSShreyas Bhatewara 2531d1a890faSShreyas Bhatewara err = vmxnet3_create_queues(adapter, VMXNET3_DEF_TX_RING_SIZE, 2532d1a890faSShreyas Bhatewara VMXNET3_DEF_RX_RING_SIZE, 2533d1a890faSShreyas Bhatewara VMXNET3_DEF_RX_RING_SIZE); 2534d1a890faSShreyas Bhatewara if (err) 2535d1a890faSShreyas Bhatewara goto queue_err; 2536d1a890faSShreyas Bhatewara 2537d1a890faSShreyas Bhatewara err = vmxnet3_activate_dev(adapter); 2538d1a890faSShreyas Bhatewara if (err) 2539d1a890faSShreyas Bhatewara goto activate_err; 2540d1a890faSShreyas Bhatewara 2541d1a890faSShreyas Bhatewara return 0; 2542d1a890faSShreyas Bhatewara 2543d1a890faSShreyas Bhatewara activate_err: 254409c5088eSShreyas Bhatewara vmxnet3_rq_destroy_all(adapter); 254509c5088eSShreyas Bhatewara vmxnet3_tq_destroy_all(adapter); 2546d1a890faSShreyas Bhatewara queue_err: 2547d1a890faSShreyas Bhatewara return err; 2548d1a890faSShreyas Bhatewara } 2549d1a890faSShreyas Bhatewara 2550d1a890faSShreyas Bhatewara 2551d1a890faSShreyas Bhatewara static int 2552d1a890faSShreyas Bhatewara vmxnet3_close(struct net_device *netdev) 2553d1a890faSShreyas Bhatewara { 2554d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2555d1a890faSShreyas Bhatewara 2556d1a890faSShreyas Bhatewara /* 2557d1a890faSShreyas Bhatewara * Reset_work may be in the middle of resetting the device, wait for its 2558d1a890faSShreyas Bhatewara * completion. 2559d1a890faSShreyas Bhatewara */ 2560d1a890faSShreyas Bhatewara while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)) 2561d1a890faSShreyas Bhatewara msleep(1); 2562d1a890faSShreyas Bhatewara 2563d1a890faSShreyas Bhatewara vmxnet3_quiesce_dev(adapter); 2564d1a890faSShreyas Bhatewara 256509c5088eSShreyas Bhatewara vmxnet3_rq_destroy_all(adapter); 256609c5088eSShreyas Bhatewara vmxnet3_tq_destroy_all(adapter); 2567d1a890faSShreyas Bhatewara 2568d1a890faSShreyas Bhatewara clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state); 2569d1a890faSShreyas Bhatewara 2570d1a890faSShreyas Bhatewara 2571d1a890faSShreyas Bhatewara return 0; 2572d1a890faSShreyas Bhatewara } 2573d1a890faSShreyas Bhatewara 2574d1a890faSShreyas Bhatewara 2575d1a890faSShreyas Bhatewara void 2576d1a890faSShreyas Bhatewara vmxnet3_force_close(struct vmxnet3_adapter *adapter) 2577d1a890faSShreyas Bhatewara { 257809c5088eSShreyas Bhatewara int i; 257909c5088eSShreyas Bhatewara 2580d1a890faSShreyas Bhatewara /* 2581d1a890faSShreyas Bhatewara * we must clear VMXNET3_STATE_BIT_RESETTING, otherwise 2582d1a890faSShreyas Bhatewara * vmxnet3_close() will deadlock. 2583d1a890faSShreyas Bhatewara */ 2584d1a890faSShreyas Bhatewara BUG_ON(test_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)); 2585d1a890faSShreyas Bhatewara 2586d1a890faSShreyas Bhatewara /* we need to enable NAPI, otherwise dev_close will deadlock */ 258709c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 258809c5088eSShreyas Bhatewara napi_enable(&adapter->rx_queue[i].napi); 2589d1a890faSShreyas Bhatewara dev_close(adapter->netdev); 2590d1a890faSShreyas Bhatewara } 2591d1a890faSShreyas Bhatewara 2592d1a890faSShreyas Bhatewara 2593d1a890faSShreyas Bhatewara static int 2594d1a890faSShreyas Bhatewara vmxnet3_change_mtu(struct net_device *netdev, int new_mtu) 2595d1a890faSShreyas Bhatewara { 2596d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2597d1a890faSShreyas Bhatewara int err = 0; 2598d1a890faSShreyas Bhatewara 2599d1a890faSShreyas Bhatewara if (new_mtu < VMXNET3_MIN_MTU || new_mtu > VMXNET3_MAX_MTU) 2600d1a890faSShreyas Bhatewara return -EINVAL; 2601d1a890faSShreyas Bhatewara 2602d1a890faSShreyas Bhatewara netdev->mtu = new_mtu; 2603d1a890faSShreyas Bhatewara 2604d1a890faSShreyas Bhatewara /* 2605d1a890faSShreyas Bhatewara * Reset_work may be in the middle of resetting the device, wait for its 2606d1a890faSShreyas Bhatewara * completion. 2607d1a890faSShreyas Bhatewara */ 2608d1a890faSShreyas Bhatewara while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)) 2609d1a890faSShreyas Bhatewara msleep(1); 2610d1a890faSShreyas Bhatewara 2611d1a890faSShreyas Bhatewara if (netif_running(netdev)) { 2612d1a890faSShreyas Bhatewara vmxnet3_quiesce_dev(adapter); 2613d1a890faSShreyas Bhatewara vmxnet3_reset_dev(adapter); 2614d1a890faSShreyas Bhatewara 2615d1a890faSShreyas Bhatewara /* we need to re-create the rx queue based on the new mtu */ 261609c5088eSShreyas Bhatewara vmxnet3_rq_destroy_all(adapter); 2617d1a890faSShreyas Bhatewara vmxnet3_adjust_rx_ring_size(adapter); 261809c5088eSShreyas Bhatewara err = vmxnet3_rq_create_all(adapter); 2619d1a890faSShreyas Bhatewara if (err) { 262009c5088eSShreyas Bhatewara printk(KERN_ERR "%s: failed to re-create rx queues," 2621d1a890faSShreyas Bhatewara " error %d. Closing it.\n", netdev->name, err); 2622d1a890faSShreyas Bhatewara goto out; 2623d1a890faSShreyas Bhatewara } 2624d1a890faSShreyas Bhatewara 2625d1a890faSShreyas Bhatewara err = vmxnet3_activate_dev(adapter); 2626d1a890faSShreyas Bhatewara if (err) { 2627d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to re-activate, error %d. " 2628d1a890faSShreyas Bhatewara "Closing it\n", netdev->name, err); 2629d1a890faSShreyas Bhatewara goto out; 2630d1a890faSShreyas Bhatewara } 2631d1a890faSShreyas Bhatewara } 2632d1a890faSShreyas Bhatewara 2633d1a890faSShreyas Bhatewara out: 2634d1a890faSShreyas Bhatewara clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state); 2635d1a890faSShreyas Bhatewara if (err) 2636d1a890faSShreyas Bhatewara vmxnet3_force_close(adapter); 2637d1a890faSShreyas Bhatewara 2638d1a890faSShreyas Bhatewara return err; 2639d1a890faSShreyas Bhatewara } 2640d1a890faSShreyas Bhatewara 2641d1a890faSShreyas Bhatewara 2642d1a890faSShreyas Bhatewara static void 2643d1a890faSShreyas Bhatewara vmxnet3_declare_features(struct vmxnet3_adapter *adapter, bool dma64) 2644d1a890faSShreyas Bhatewara { 2645d1a890faSShreyas Bhatewara struct net_device *netdev = adapter->netdev; 2646d1a890faSShreyas Bhatewara 2647a0d2730cSMichał Mirosław netdev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM | 2648a0d2730cSMichał Mirosław NETIF_F_HW_CSUM | NETIF_F_HW_VLAN_TX | 264972e85c45SJesse Gross NETIF_F_HW_VLAN_RX | NETIF_F_TSO | NETIF_F_TSO6 | 265072e85c45SJesse Gross NETIF_F_LRO; 2651a0d2730cSMichał Mirosław if (dma64) 2652ebbf9295SShreyas Bhatewara netdev->hw_features |= NETIF_F_HIGHDMA; 265372e85c45SJesse Gross netdev->vlan_features = netdev->hw_features & 265472e85c45SJesse Gross ~(NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX); 265572e85c45SJesse Gross netdev->features = netdev->hw_features | NETIF_F_HW_VLAN_FILTER; 2656d1a890faSShreyas Bhatewara 2657a0d2730cSMichał Mirosław netdev_info(adapter->netdev, 2658a0d2730cSMichał Mirosław "features: sg csum vlan jf tso tsoIPv6 lro%s\n", 2659a0d2730cSMichał Mirosław dma64 ? " highDMA" : ""); 2660d1a890faSShreyas Bhatewara } 2661d1a890faSShreyas Bhatewara 2662d1a890faSShreyas Bhatewara 2663d1a890faSShreyas Bhatewara static void 2664d1a890faSShreyas Bhatewara vmxnet3_read_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac) 2665d1a890faSShreyas Bhatewara { 2666d1a890faSShreyas Bhatewara u32 tmp; 2667d1a890faSShreyas Bhatewara 2668d1a890faSShreyas Bhatewara tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACL); 2669d1a890faSShreyas Bhatewara *(u32 *)mac = tmp; 2670d1a890faSShreyas Bhatewara 2671d1a890faSShreyas Bhatewara tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACH); 2672d1a890faSShreyas Bhatewara mac[4] = tmp & 0xff; 2673d1a890faSShreyas Bhatewara mac[5] = (tmp >> 8) & 0xff; 2674d1a890faSShreyas Bhatewara } 2675d1a890faSShreyas Bhatewara 267609c5088eSShreyas Bhatewara #ifdef CONFIG_PCI_MSI 267709c5088eSShreyas Bhatewara 267809c5088eSShreyas Bhatewara /* 267909c5088eSShreyas Bhatewara * Enable MSIx vectors. 268009c5088eSShreyas Bhatewara * Returns : 268109c5088eSShreyas Bhatewara * 0 on successful enabling of required vectors, 268225985edcSLucas De Marchi * VMXNET3_LINUX_MIN_MSIX_VECT when only minimum number of vectors required 268309c5088eSShreyas Bhatewara * could be enabled. 268409c5088eSShreyas Bhatewara * number of vectors which can be enabled otherwise (this number is smaller 268509c5088eSShreyas Bhatewara * than VMXNET3_LINUX_MIN_MSIX_VECT) 268609c5088eSShreyas Bhatewara */ 268709c5088eSShreyas Bhatewara 268809c5088eSShreyas Bhatewara static int 268909c5088eSShreyas Bhatewara vmxnet3_acquire_msix_vectors(struct vmxnet3_adapter *adapter, 269009c5088eSShreyas Bhatewara int vectors) 269109c5088eSShreyas Bhatewara { 269209c5088eSShreyas Bhatewara int err = 0, vector_threshold; 269309c5088eSShreyas Bhatewara vector_threshold = VMXNET3_LINUX_MIN_MSIX_VECT; 269409c5088eSShreyas Bhatewara 269509c5088eSShreyas Bhatewara while (vectors >= vector_threshold) { 269609c5088eSShreyas Bhatewara err = pci_enable_msix(adapter->pdev, adapter->intr.msix_entries, 269709c5088eSShreyas Bhatewara vectors); 269809c5088eSShreyas Bhatewara if (!err) { 269909c5088eSShreyas Bhatewara adapter->intr.num_intrs = vectors; 270009c5088eSShreyas Bhatewara return 0; 270109c5088eSShreyas Bhatewara } else if (err < 0) { 27024c1dc80aSShreyas Bhatewara netdev_err(adapter->netdev, 27034c1dc80aSShreyas Bhatewara "Failed to enable MSI-X, error: %d\n", err); 270409c5088eSShreyas Bhatewara vectors = 0; 270509c5088eSShreyas Bhatewara } else if (err < vector_threshold) { 270609c5088eSShreyas Bhatewara break; 270709c5088eSShreyas Bhatewara } else { 270809c5088eSShreyas Bhatewara /* If fails to enable required number of MSI-x vectors 27097e96fbf2SShreyas Bhatewara * try enabling minimum number of vectors required. 271009c5088eSShreyas Bhatewara */ 27114c1dc80aSShreyas Bhatewara netdev_err(adapter->netdev, 27124c1dc80aSShreyas Bhatewara "Failed to enable %d MSI-X, trying %d instead\n", 27134c1dc80aSShreyas Bhatewara vectors, vector_threshold); 271409c5088eSShreyas Bhatewara vectors = vector_threshold; 271509c5088eSShreyas Bhatewara } 271609c5088eSShreyas Bhatewara } 271709c5088eSShreyas Bhatewara 27184c1dc80aSShreyas Bhatewara netdev_info(adapter->netdev, 27194c1dc80aSShreyas Bhatewara "Number of MSI-X interrupts which can be allocated are lower than min threshold required.\n"); 272009c5088eSShreyas Bhatewara return err; 272109c5088eSShreyas Bhatewara } 272209c5088eSShreyas Bhatewara 272309c5088eSShreyas Bhatewara 272409c5088eSShreyas Bhatewara #endif /* CONFIG_PCI_MSI */ 2725d1a890faSShreyas Bhatewara 2726d1a890faSShreyas Bhatewara static void 2727d1a890faSShreyas Bhatewara vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter) 2728d1a890faSShreyas Bhatewara { 2729d1a890faSShreyas Bhatewara u32 cfg; 2730e328d410SRoland Dreier unsigned long flags; 2731d1a890faSShreyas Bhatewara 2732d1a890faSShreyas Bhatewara /* intr settings */ 2733e328d410SRoland Dreier spin_lock_irqsave(&adapter->cmd_lock, flags); 2734d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2735d1a890faSShreyas Bhatewara VMXNET3_CMD_GET_CONF_INTR); 2736d1a890faSShreyas Bhatewara cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 2737e328d410SRoland Dreier spin_unlock_irqrestore(&adapter->cmd_lock, flags); 2738d1a890faSShreyas Bhatewara adapter->intr.type = cfg & 0x3; 2739d1a890faSShreyas Bhatewara adapter->intr.mask_mode = (cfg >> 2) & 0x3; 2740d1a890faSShreyas Bhatewara 2741d1a890faSShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_AUTO) { 27420bdc0d70SShreyas Bhatewara adapter->intr.type = VMXNET3_IT_MSIX; 27430bdc0d70SShreyas Bhatewara } 2744d1a890faSShreyas Bhatewara 27458f7e524cSRandy Dunlap #ifdef CONFIG_PCI_MSI 27460bdc0d70SShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_MSIX) { 274709c5088eSShreyas Bhatewara int vector, err = 0; 27480bdc0d70SShreyas Bhatewara 274909c5088eSShreyas Bhatewara adapter->intr.num_intrs = (adapter->share_intr == 275009c5088eSShreyas Bhatewara VMXNET3_INTR_TXSHARE) ? 1 : 275109c5088eSShreyas Bhatewara adapter->num_tx_queues; 275209c5088eSShreyas Bhatewara adapter->intr.num_intrs += (adapter->share_intr == 275309c5088eSShreyas Bhatewara VMXNET3_INTR_BUDDYSHARE) ? 0 : 275409c5088eSShreyas Bhatewara adapter->num_rx_queues; 275509c5088eSShreyas Bhatewara adapter->intr.num_intrs += 1; /* for link event */ 275609c5088eSShreyas Bhatewara 275709c5088eSShreyas Bhatewara adapter->intr.num_intrs = (adapter->intr.num_intrs > 275809c5088eSShreyas Bhatewara VMXNET3_LINUX_MIN_MSIX_VECT 275909c5088eSShreyas Bhatewara ? adapter->intr.num_intrs : 276009c5088eSShreyas Bhatewara VMXNET3_LINUX_MIN_MSIX_VECT); 276109c5088eSShreyas Bhatewara 276209c5088eSShreyas Bhatewara for (vector = 0; vector < adapter->intr.num_intrs; vector++) 276309c5088eSShreyas Bhatewara adapter->intr.msix_entries[vector].entry = vector; 276409c5088eSShreyas Bhatewara 276509c5088eSShreyas Bhatewara err = vmxnet3_acquire_msix_vectors(adapter, 276609c5088eSShreyas Bhatewara adapter->intr.num_intrs); 276709c5088eSShreyas Bhatewara /* If we cannot allocate one MSIx vector per queue 276809c5088eSShreyas Bhatewara * then limit the number of rx queues to 1 276909c5088eSShreyas Bhatewara */ 277009c5088eSShreyas Bhatewara if (err == VMXNET3_LINUX_MIN_MSIX_VECT) { 277109c5088eSShreyas Bhatewara if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE 27727e96fbf2SShreyas Bhatewara || adapter->num_rx_queues != 1) { 277309c5088eSShreyas Bhatewara adapter->share_intr = VMXNET3_INTR_TXSHARE; 277409c5088eSShreyas Bhatewara printk(KERN_ERR "Number of rx queues : 1\n"); 277509c5088eSShreyas Bhatewara adapter->num_rx_queues = 1; 277609c5088eSShreyas Bhatewara adapter->intr.num_intrs = 277709c5088eSShreyas Bhatewara VMXNET3_LINUX_MIN_MSIX_VECT; 277809c5088eSShreyas Bhatewara } 2779d1a890faSShreyas Bhatewara return; 2780d1a890faSShreyas Bhatewara } 278109c5088eSShreyas Bhatewara if (!err) 278209c5088eSShreyas Bhatewara return; 278309c5088eSShreyas Bhatewara 278409c5088eSShreyas Bhatewara /* If we cannot allocate MSIx vectors use only one rx queue */ 27854c1dc80aSShreyas Bhatewara netdev_info(adapter->netdev, 27864c1dc80aSShreyas Bhatewara "Failed to enable MSI-X, error %d . Limiting #rx queues to 1, try MSI.\n", 27874c1dc80aSShreyas Bhatewara err); 278809c5088eSShreyas Bhatewara 27890bdc0d70SShreyas Bhatewara adapter->intr.type = VMXNET3_IT_MSI; 27900bdc0d70SShreyas Bhatewara } 2791d1a890faSShreyas Bhatewara 27920bdc0d70SShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_MSI) { 27930bdc0d70SShreyas Bhatewara int err; 2794d1a890faSShreyas Bhatewara err = pci_enable_msi(adapter->pdev); 2795d1a890faSShreyas Bhatewara if (!err) { 279609c5088eSShreyas Bhatewara adapter->num_rx_queues = 1; 2797d1a890faSShreyas Bhatewara adapter->intr.num_intrs = 1; 2798d1a890faSShreyas Bhatewara return; 2799d1a890faSShreyas Bhatewara } 2800d1a890faSShreyas Bhatewara } 28010bdc0d70SShreyas Bhatewara #endif /* CONFIG_PCI_MSI */ 2802d1a890faSShreyas Bhatewara 280309c5088eSShreyas Bhatewara adapter->num_rx_queues = 1; 280409c5088eSShreyas Bhatewara printk(KERN_INFO "Using INTx interrupt, #Rx queues: 1.\n"); 2805d1a890faSShreyas Bhatewara adapter->intr.type = VMXNET3_IT_INTX; 2806d1a890faSShreyas Bhatewara 2807d1a890faSShreyas Bhatewara /* INT-X related setting */ 2808d1a890faSShreyas Bhatewara adapter->intr.num_intrs = 1; 2809d1a890faSShreyas Bhatewara } 2810d1a890faSShreyas Bhatewara 2811d1a890faSShreyas Bhatewara 2812d1a890faSShreyas Bhatewara static void 2813d1a890faSShreyas Bhatewara vmxnet3_free_intr_resources(struct vmxnet3_adapter *adapter) 2814d1a890faSShreyas Bhatewara { 2815d1a890faSShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_MSIX) 2816d1a890faSShreyas Bhatewara pci_disable_msix(adapter->pdev); 2817d1a890faSShreyas Bhatewara else if (adapter->intr.type == VMXNET3_IT_MSI) 2818d1a890faSShreyas Bhatewara pci_disable_msi(adapter->pdev); 2819d1a890faSShreyas Bhatewara else 2820d1a890faSShreyas Bhatewara BUG_ON(adapter->intr.type != VMXNET3_IT_INTX); 2821d1a890faSShreyas Bhatewara } 2822d1a890faSShreyas Bhatewara 2823d1a890faSShreyas Bhatewara 2824d1a890faSShreyas Bhatewara static void 2825d1a890faSShreyas Bhatewara vmxnet3_tx_timeout(struct net_device *netdev) 2826d1a890faSShreyas Bhatewara { 2827d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2828d1a890faSShreyas Bhatewara adapter->tx_timeout_count++; 2829d1a890faSShreyas Bhatewara 2830d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: tx hang\n", adapter->netdev->name); 2831d1a890faSShreyas Bhatewara schedule_work(&adapter->work); 283209c5088eSShreyas Bhatewara netif_wake_queue(adapter->netdev); 2833d1a890faSShreyas Bhatewara } 2834d1a890faSShreyas Bhatewara 2835d1a890faSShreyas Bhatewara 2836d1a890faSShreyas Bhatewara static void 2837d1a890faSShreyas Bhatewara vmxnet3_reset_work(struct work_struct *data) 2838d1a890faSShreyas Bhatewara { 2839d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter; 2840d1a890faSShreyas Bhatewara 2841d1a890faSShreyas Bhatewara adapter = container_of(data, struct vmxnet3_adapter, work); 2842d1a890faSShreyas Bhatewara 2843d1a890faSShreyas Bhatewara /* if another thread is resetting the device, no need to proceed */ 2844d1a890faSShreyas Bhatewara if (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)) 2845d1a890faSShreyas Bhatewara return; 2846d1a890faSShreyas Bhatewara 2847d1a890faSShreyas Bhatewara /* if the device is closed, we must leave it alone */ 2848d9a5f210SShreyas Bhatewara rtnl_lock(); 2849d1a890faSShreyas Bhatewara if (netif_running(adapter->netdev)) { 2850d1a890faSShreyas Bhatewara printk(KERN_INFO "%s: resetting\n", adapter->netdev->name); 2851d1a890faSShreyas Bhatewara vmxnet3_quiesce_dev(adapter); 2852d1a890faSShreyas Bhatewara vmxnet3_reset_dev(adapter); 2853d1a890faSShreyas Bhatewara vmxnet3_activate_dev(adapter); 2854d1a890faSShreyas Bhatewara } else { 2855d1a890faSShreyas Bhatewara printk(KERN_INFO "%s: already closed\n", adapter->netdev->name); 2856d1a890faSShreyas Bhatewara } 2857d9a5f210SShreyas Bhatewara rtnl_unlock(); 2858d1a890faSShreyas Bhatewara 2859d1a890faSShreyas Bhatewara clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state); 2860d1a890faSShreyas Bhatewara } 2861d1a890faSShreyas Bhatewara 2862d1a890faSShreyas Bhatewara 2863d1a890faSShreyas Bhatewara static int __devinit 2864d1a890faSShreyas Bhatewara vmxnet3_probe_device(struct pci_dev *pdev, 2865d1a890faSShreyas Bhatewara const struct pci_device_id *id) 2866d1a890faSShreyas Bhatewara { 2867d1a890faSShreyas Bhatewara static const struct net_device_ops vmxnet3_netdev_ops = { 2868d1a890faSShreyas Bhatewara .ndo_open = vmxnet3_open, 2869d1a890faSShreyas Bhatewara .ndo_stop = vmxnet3_close, 2870d1a890faSShreyas Bhatewara .ndo_start_xmit = vmxnet3_xmit_frame, 2871d1a890faSShreyas Bhatewara .ndo_set_mac_address = vmxnet3_set_mac_addr, 2872d1a890faSShreyas Bhatewara .ndo_change_mtu = vmxnet3_change_mtu, 2873a0d2730cSMichał Mirosław .ndo_set_features = vmxnet3_set_features, 287495305f6cSstephen hemminger .ndo_get_stats64 = vmxnet3_get_stats64, 2875d1a890faSShreyas Bhatewara .ndo_tx_timeout = vmxnet3_tx_timeout, 2876afc4b13dSJiri Pirko .ndo_set_rx_mode = vmxnet3_set_mc, 2877d1a890faSShreyas Bhatewara .ndo_vlan_rx_add_vid = vmxnet3_vlan_rx_add_vid, 2878d1a890faSShreyas Bhatewara .ndo_vlan_rx_kill_vid = vmxnet3_vlan_rx_kill_vid, 2879d1a890faSShreyas Bhatewara #ifdef CONFIG_NET_POLL_CONTROLLER 2880d1a890faSShreyas Bhatewara .ndo_poll_controller = vmxnet3_netpoll, 2881d1a890faSShreyas Bhatewara #endif 2882d1a890faSShreyas Bhatewara }; 2883d1a890faSShreyas Bhatewara int err; 2884d1a890faSShreyas Bhatewara bool dma64 = false; /* stupid gcc */ 2885d1a890faSShreyas Bhatewara u32 ver; 2886d1a890faSShreyas Bhatewara struct net_device *netdev; 2887d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter; 2888d1a890faSShreyas Bhatewara u8 mac[ETH_ALEN]; 288909c5088eSShreyas Bhatewara int size; 289009c5088eSShreyas Bhatewara int num_tx_queues; 289109c5088eSShreyas Bhatewara int num_rx_queues; 2892d1a890faSShreyas Bhatewara 2893e154b639SShreyas Bhatewara if (!pci_msi_enabled()) 2894e154b639SShreyas Bhatewara enable_mq = 0; 2895e154b639SShreyas Bhatewara 289609c5088eSShreyas Bhatewara #ifdef VMXNET3_RSS 289709c5088eSShreyas Bhatewara if (enable_mq) 289809c5088eSShreyas Bhatewara num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES, 289909c5088eSShreyas Bhatewara (int)num_online_cpus()); 290009c5088eSShreyas Bhatewara else 290109c5088eSShreyas Bhatewara #endif 290209c5088eSShreyas Bhatewara num_rx_queues = 1; 2903eebb02b1SShreyas Bhatewara num_rx_queues = rounddown_pow_of_two(num_rx_queues); 290409c5088eSShreyas Bhatewara 290509c5088eSShreyas Bhatewara if (enable_mq) 290609c5088eSShreyas Bhatewara num_tx_queues = min(VMXNET3_DEVICE_MAX_TX_QUEUES, 290709c5088eSShreyas Bhatewara (int)num_online_cpus()); 290809c5088eSShreyas Bhatewara else 290909c5088eSShreyas Bhatewara num_tx_queues = 1; 291009c5088eSShreyas Bhatewara 2911eebb02b1SShreyas Bhatewara num_tx_queues = rounddown_pow_of_two(num_tx_queues); 291209c5088eSShreyas Bhatewara netdev = alloc_etherdev_mq(sizeof(struct vmxnet3_adapter), 291309c5088eSShreyas Bhatewara max(num_tx_queues, num_rx_queues)); 291409c5088eSShreyas Bhatewara printk(KERN_INFO "# of Tx queues : %d, # of Rx queues : %d\n", 291509c5088eSShreyas Bhatewara num_tx_queues, num_rx_queues); 291609c5088eSShreyas Bhatewara 291741de8d4cSJoe Perches if (!netdev) 2918d1a890faSShreyas Bhatewara return -ENOMEM; 2919d1a890faSShreyas Bhatewara 2920d1a890faSShreyas Bhatewara pci_set_drvdata(pdev, netdev); 2921d1a890faSShreyas Bhatewara adapter = netdev_priv(netdev); 2922d1a890faSShreyas Bhatewara adapter->netdev = netdev; 2923d1a890faSShreyas Bhatewara adapter->pdev = pdev; 2924d1a890faSShreyas Bhatewara 292583d0feffSShreyas Bhatewara spin_lock_init(&adapter->cmd_lock); 2926d1a890faSShreyas Bhatewara adapter->shared = pci_alloc_consistent(adapter->pdev, 2927d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_DriverShared), 2928d1a890faSShreyas Bhatewara &adapter->shared_pa); 2929d1a890faSShreyas Bhatewara if (!adapter->shared) { 2930d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to allocate memory for %s\n", 2931d1a890faSShreyas Bhatewara pci_name(pdev)); 2932d1a890faSShreyas Bhatewara err = -ENOMEM; 2933d1a890faSShreyas Bhatewara goto err_alloc_shared; 2934d1a890faSShreyas Bhatewara } 2935d1a890faSShreyas Bhatewara 293609c5088eSShreyas Bhatewara adapter->num_rx_queues = num_rx_queues; 293709c5088eSShreyas Bhatewara adapter->num_tx_queues = num_tx_queues; 293809c5088eSShreyas Bhatewara 293909c5088eSShreyas Bhatewara size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues; 294009c5088eSShreyas Bhatewara size += sizeof(struct Vmxnet3_RxQueueDesc) * adapter->num_rx_queues; 294109c5088eSShreyas Bhatewara adapter->tqd_start = pci_alloc_consistent(adapter->pdev, size, 2942d1a890faSShreyas Bhatewara &adapter->queue_desc_pa); 2943d1a890faSShreyas Bhatewara 2944d1a890faSShreyas Bhatewara if (!adapter->tqd_start) { 2945d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to allocate memory for %s\n", 2946d1a890faSShreyas Bhatewara pci_name(pdev)); 2947d1a890faSShreyas Bhatewara err = -ENOMEM; 2948d1a890faSShreyas Bhatewara goto err_alloc_queue_desc; 2949d1a890faSShreyas Bhatewara } 295009c5088eSShreyas Bhatewara adapter->rqd_start = (struct Vmxnet3_RxQueueDesc *)(adapter->tqd_start + 295109c5088eSShreyas Bhatewara adapter->num_tx_queues); 2952d1a890faSShreyas Bhatewara 2953d1a890faSShreyas Bhatewara adapter->pm_conf = kmalloc(sizeof(struct Vmxnet3_PMConf), GFP_KERNEL); 2954d1a890faSShreyas Bhatewara if (adapter->pm_conf == NULL) { 2955d1a890faSShreyas Bhatewara err = -ENOMEM; 2956d1a890faSShreyas Bhatewara goto err_alloc_pm; 2957d1a890faSShreyas Bhatewara } 2958d1a890faSShreyas Bhatewara 295909c5088eSShreyas Bhatewara #ifdef VMXNET3_RSS 296009c5088eSShreyas Bhatewara 296109c5088eSShreyas Bhatewara adapter->rss_conf = kmalloc(sizeof(struct UPT1_RSSConf), GFP_KERNEL); 296209c5088eSShreyas Bhatewara if (adapter->rss_conf == NULL) { 296309c5088eSShreyas Bhatewara err = -ENOMEM; 296409c5088eSShreyas Bhatewara goto err_alloc_rss; 296509c5088eSShreyas Bhatewara } 296609c5088eSShreyas Bhatewara #endif /* VMXNET3_RSS */ 296709c5088eSShreyas Bhatewara 2968d1a890faSShreyas Bhatewara err = vmxnet3_alloc_pci_resources(adapter, &dma64); 2969d1a890faSShreyas Bhatewara if (err < 0) 2970d1a890faSShreyas Bhatewara goto err_alloc_pci; 2971d1a890faSShreyas Bhatewara 2972d1a890faSShreyas Bhatewara ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_VRRS); 2973d1a890faSShreyas Bhatewara if (ver & 1) { 2974d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_VRRS, 1); 2975d1a890faSShreyas Bhatewara } else { 2976d1a890faSShreyas Bhatewara printk(KERN_ERR "Incompatible h/w version (0x%x) for adapter" 2977d1a890faSShreyas Bhatewara " %s\n", ver, pci_name(pdev)); 2978d1a890faSShreyas Bhatewara err = -EBUSY; 2979d1a890faSShreyas Bhatewara goto err_ver; 2980d1a890faSShreyas Bhatewara } 2981d1a890faSShreyas Bhatewara 2982d1a890faSShreyas Bhatewara ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_UVRS); 2983d1a890faSShreyas Bhatewara if (ver & 1) { 2984d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_UVRS, 1); 2985d1a890faSShreyas Bhatewara } else { 2986d1a890faSShreyas Bhatewara printk(KERN_ERR "Incompatible upt version (0x%x) for " 2987d1a890faSShreyas Bhatewara "adapter %s\n", ver, pci_name(pdev)); 2988d1a890faSShreyas Bhatewara err = -EBUSY; 2989d1a890faSShreyas Bhatewara goto err_ver; 2990d1a890faSShreyas Bhatewara } 2991d1a890faSShreyas Bhatewara 2992e101e7ddSShreyas Bhatewara SET_NETDEV_DEV(netdev, &pdev->dev); 2993d1a890faSShreyas Bhatewara vmxnet3_declare_features(adapter, dma64); 2994d1a890faSShreyas Bhatewara 2995d1a890faSShreyas Bhatewara adapter->dev_number = atomic_read(&devices_found); 299609c5088eSShreyas Bhatewara 299709c5088eSShreyas Bhatewara adapter->share_intr = irq_share_mode; 299809c5088eSShreyas Bhatewara if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE && 299909c5088eSShreyas Bhatewara adapter->num_tx_queues != adapter->num_rx_queues) 300009c5088eSShreyas Bhatewara adapter->share_intr = VMXNET3_INTR_DONTSHARE; 300109c5088eSShreyas Bhatewara 3002d1a890faSShreyas Bhatewara vmxnet3_alloc_intr_resources(adapter); 3003d1a890faSShreyas Bhatewara 300409c5088eSShreyas Bhatewara #ifdef VMXNET3_RSS 300509c5088eSShreyas Bhatewara if (adapter->num_rx_queues > 1 && 300609c5088eSShreyas Bhatewara adapter->intr.type == VMXNET3_IT_MSIX) { 300709c5088eSShreyas Bhatewara adapter->rss = true; 300809c5088eSShreyas Bhatewara printk(KERN_INFO "RSS is enabled.\n"); 300909c5088eSShreyas Bhatewara } else { 301009c5088eSShreyas Bhatewara adapter->rss = false; 301109c5088eSShreyas Bhatewara } 301209c5088eSShreyas Bhatewara #endif 301309c5088eSShreyas Bhatewara 3014d1a890faSShreyas Bhatewara vmxnet3_read_mac_addr(adapter, mac); 3015d1a890faSShreyas Bhatewara memcpy(netdev->dev_addr, mac, netdev->addr_len); 3016d1a890faSShreyas Bhatewara 3017d1a890faSShreyas Bhatewara netdev->netdev_ops = &vmxnet3_netdev_ops; 3018d1a890faSShreyas Bhatewara vmxnet3_set_ethtool_ops(netdev); 301909c5088eSShreyas Bhatewara netdev->watchdog_timeo = 5 * HZ; 3020d1a890faSShreyas Bhatewara 3021d1a890faSShreyas Bhatewara INIT_WORK(&adapter->work, vmxnet3_reset_work); 3022d1a890faSShreyas Bhatewara 302309c5088eSShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_MSIX) { 302409c5088eSShreyas Bhatewara int i; 302509c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 302609c5088eSShreyas Bhatewara netif_napi_add(adapter->netdev, 302709c5088eSShreyas Bhatewara &adapter->rx_queue[i].napi, 302809c5088eSShreyas Bhatewara vmxnet3_poll_rx_only, 64); 302909c5088eSShreyas Bhatewara } 303009c5088eSShreyas Bhatewara } else { 303109c5088eSShreyas Bhatewara netif_napi_add(adapter->netdev, &adapter->rx_queue[0].napi, 303209c5088eSShreyas Bhatewara vmxnet3_poll, 64); 303309c5088eSShreyas Bhatewara } 303409c5088eSShreyas Bhatewara 303509c5088eSShreyas Bhatewara netif_set_real_num_tx_queues(adapter->netdev, adapter->num_tx_queues); 303609c5088eSShreyas Bhatewara netif_set_real_num_rx_queues(adapter->netdev, adapter->num_rx_queues); 303709c5088eSShreyas Bhatewara 3038d1a890faSShreyas Bhatewara err = register_netdev(netdev); 3039d1a890faSShreyas Bhatewara 3040d1a890faSShreyas Bhatewara if (err) { 3041d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to register adapter %s\n", 3042d1a890faSShreyas Bhatewara pci_name(pdev)); 3043d1a890faSShreyas Bhatewara goto err_register; 3044d1a890faSShreyas Bhatewara } 3045d1a890faSShreyas Bhatewara 3046d1a890faSShreyas Bhatewara set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state); 30474a1745fcSShreyas Bhatewara vmxnet3_check_link(adapter, false); 3048d1a890faSShreyas Bhatewara atomic_inc(&devices_found); 3049d1a890faSShreyas Bhatewara return 0; 3050d1a890faSShreyas Bhatewara 3051d1a890faSShreyas Bhatewara err_register: 3052d1a890faSShreyas Bhatewara vmxnet3_free_intr_resources(adapter); 3053d1a890faSShreyas Bhatewara err_ver: 3054d1a890faSShreyas Bhatewara vmxnet3_free_pci_resources(adapter); 3055d1a890faSShreyas Bhatewara err_alloc_pci: 305609c5088eSShreyas Bhatewara #ifdef VMXNET3_RSS 305709c5088eSShreyas Bhatewara kfree(adapter->rss_conf); 305809c5088eSShreyas Bhatewara err_alloc_rss: 305909c5088eSShreyas Bhatewara #endif 3060d1a890faSShreyas Bhatewara kfree(adapter->pm_conf); 3061d1a890faSShreyas Bhatewara err_alloc_pm: 306209c5088eSShreyas Bhatewara pci_free_consistent(adapter->pdev, size, adapter->tqd_start, 306309c5088eSShreyas Bhatewara adapter->queue_desc_pa); 3064d1a890faSShreyas Bhatewara err_alloc_queue_desc: 3065d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared), 3066d1a890faSShreyas Bhatewara adapter->shared, adapter->shared_pa); 3067d1a890faSShreyas Bhatewara err_alloc_shared: 3068d1a890faSShreyas Bhatewara pci_set_drvdata(pdev, NULL); 3069d1a890faSShreyas Bhatewara free_netdev(netdev); 3070d1a890faSShreyas Bhatewara return err; 3071d1a890faSShreyas Bhatewara } 3072d1a890faSShreyas Bhatewara 3073d1a890faSShreyas Bhatewara 3074d1a890faSShreyas Bhatewara static void __devexit 3075d1a890faSShreyas Bhatewara vmxnet3_remove_device(struct pci_dev *pdev) 3076d1a890faSShreyas Bhatewara { 3077d1a890faSShreyas Bhatewara struct net_device *netdev = pci_get_drvdata(pdev); 3078d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 307909c5088eSShreyas Bhatewara int size = 0; 308009c5088eSShreyas Bhatewara int num_rx_queues; 308109c5088eSShreyas Bhatewara 308209c5088eSShreyas Bhatewara #ifdef VMXNET3_RSS 308309c5088eSShreyas Bhatewara if (enable_mq) 308409c5088eSShreyas Bhatewara num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES, 308509c5088eSShreyas Bhatewara (int)num_online_cpus()); 308609c5088eSShreyas Bhatewara else 308709c5088eSShreyas Bhatewara #endif 308809c5088eSShreyas Bhatewara num_rx_queues = 1; 3089eebb02b1SShreyas Bhatewara num_rx_queues = rounddown_pow_of_two(num_rx_queues); 3090d1a890faSShreyas Bhatewara 309123f333a2STejun Heo cancel_work_sync(&adapter->work); 3092d1a890faSShreyas Bhatewara 3093d1a890faSShreyas Bhatewara unregister_netdev(netdev); 3094d1a890faSShreyas Bhatewara 3095d1a890faSShreyas Bhatewara vmxnet3_free_intr_resources(adapter); 3096d1a890faSShreyas Bhatewara vmxnet3_free_pci_resources(adapter); 309709c5088eSShreyas Bhatewara #ifdef VMXNET3_RSS 309809c5088eSShreyas Bhatewara kfree(adapter->rss_conf); 309909c5088eSShreyas Bhatewara #endif 3100d1a890faSShreyas Bhatewara kfree(adapter->pm_conf); 310109c5088eSShreyas Bhatewara 310209c5088eSShreyas Bhatewara size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues; 310309c5088eSShreyas Bhatewara size += sizeof(struct Vmxnet3_RxQueueDesc) * num_rx_queues; 310409c5088eSShreyas Bhatewara pci_free_consistent(adapter->pdev, size, adapter->tqd_start, 310509c5088eSShreyas Bhatewara adapter->queue_desc_pa); 3106d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared), 3107d1a890faSShreyas Bhatewara adapter->shared, adapter->shared_pa); 3108d1a890faSShreyas Bhatewara free_netdev(netdev); 3109d1a890faSShreyas Bhatewara } 3110d1a890faSShreyas Bhatewara 3111d1a890faSShreyas Bhatewara 3112d1a890faSShreyas Bhatewara #ifdef CONFIG_PM 3113d1a890faSShreyas Bhatewara 3114d1a890faSShreyas Bhatewara static int 3115d1a890faSShreyas Bhatewara vmxnet3_suspend(struct device *device) 3116d1a890faSShreyas Bhatewara { 3117d1a890faSShreyas Bhatewara struct pci_dev *pdev = to_pci_dev(device); 3118d1a890faSShreyas Bhatewara struct net_device *netdev = pci_get_drvdata(pdev); 3119d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 3120d1a890faSShreyas Bhatewara struct Vmxnet3_PMConf *pmConf; 3121d1a890faSShreyas Bhatewara struct ethhdr *ehdr; 3122d1a890faSShreyas Bhatewara struct arphdr *ahdr; 3123d1a890faSShreyas Bhatewara u8 *arpreq; 3124d1a890faSShreyas Bhatewara struct in_device *in_dev; 3125d1a890faSShreyas Bhatewara struct in_ifaddr *ifa; 312683d0feffSShreyas Bhatewara unsigned long flags; 3127d1a890faSShreyas Bhatewara int i = 0; 3128d1a890faSShreyas Bhatewara 3129d1a890faSShreyas Bhatewara if (!netif_running(netdev)) 3130d1a890faSShreyas Bhatewara return 0; 3131d1a890faSShreyas Bhatewara 313251956cd6SShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 313351956cd6SShreyas Bhatewara napi_disable(&adapter->rx_queue[i].napi); 313451956cd6SShreyas Bhatewara 3135d1a890faSShreyas Bhatewara vmxnet3_disable_all_intrs(adapter); 3136d1a890faSShreyas Bhatewara vmxnet3_free_irqs(adapter); 3137d1a890faSShreyas Bhatewara vmxnet3_free_intr_resources(adapter); 3138d1a890faSShreyas Bhatewara 3139d1a890faSShreyas Bhatewara netif_device_detach(netdev); 314009c5088eSShreyas Bhatewara netif_tx_stop_all_queues(netdev); 3141d1a890faSShreyas Bhatewara 3142d1a890faSShreyas Bhatewara /* Create wake-up filters. */ 3143d1a890faSShreyas Bhatewara pmConf = adapter->pm_conf; 3144d1a890faSShreyas Bhatewara memset(pmConf, 0, sizeof(*pmConf)); 3145d1a890faSShreyas Bhatewara 3146d1a890faSShreyas Bhatewara if (adapter->wol & WAKE_UCAST) { 3147d1a890faSShreyas Bhatewara pmConf->filters[i].patternSize = ETH_ALEN; 3148d1a890faSShreyas Bhatewara pmConf->filters[i].maskSize = 1; 3149d1a890faSShreyas Bhatewara memcpy(pmConf->filters[i].pattern, netdev->dev_addr, ETH_ALEN); 3150d1a890faSShreyas Bhatewara pmConf->filters[i].mask[0] = 0x3F; /* LSB ETH_ALEN bits */ 3151d1a890faSShreyas Bhatewara 31523843e515SHarvey Harrison pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER; 3153d1a890faSShreyas Bhatewara i++; 3154d1a890faSShreyas Bhatewara } 3155d1a890faSShreyas Bhatewara 3156d1a890faSShreyas Bhatewara if (adapter->wol & WAKE_ARP) { 3157d1a890faSShreyas Bhatewara in_dev = in_dev_get(netdev); 3158d1a890faSShreyas Bhatewara if (!in_dev) 3159d1a890faSShreyas Bhatewara goto skip_arp; 3160d1a890faSShreyas Bhatewara 3161d1a890faSShreyas Bhatewara ifa = (struct in_ifaddr *)in_dev->ifa_list; 3162d1a890faSShreyas Bhatewara if (!ifa) 3163d1a890faSShreyas Bhatewara goto skip_arp; 3164d1a890faSShreyas Bhatewara 3165d1a890faSShreyas Bhatewara pmConf->filters[i].patternSize = ETH_HLEN + /* Ethernet header*/ 3166d1a890faSShreyas Bhatewara sizeof(struct arphdr) + /* ARP header */ 3167d1a890faSShreyas Bhatewara 2 * ETH_ALEN + /* 2 Ethernet addresses*/ 3168d1a890faSShreyas Bhatewara 2 * sizeof(u32); /*2 IPv4 addresses */ 3169d1a890faSShreyas Bhatewara pmConf->filters[i].maskSize = 3170d1a890faSShreyas Bhatewara (pmConf->filters[i].patternSize - 1) / 8 + 1; 3171d1a890faSShreyas Bhatewara 3172d1a890faSShreyas Bhatewara /* ETH_P_ARP in Ethernet header. */ 3173d1a890faSShreyas Bhatewara ehdr = (struct ethhdr *)pmConf->filters[i].pattern; 3174d1a890faSShreyas Bhatewara ehdr->h_proto = htons(ETH_P_ARP); 3175d1a890faSShreyas Bhatewara 3176d1a890faSShreyas Bhatewara /* ARPOP_REQUEST in ARP header. */ 3177d1a890faSShreyas Bhatewara ahdr = (struct arphdr *)&pmConf->filters[i].pattern[ETH_HLEN]; 3178d1a890faSShreyas Bhatewara ahdr->ar_op = htons(ARPOP_REQUEST); 3179d1a890faSShreyas Bhatewara arpreq = (u8 *)(ahdr + 1); 3180d1a890faSShreyas Bhatewara 3181d1a890faSShreyas Bhatewara /* The Unicast IPv4 address in 'tip' field. */ 3182d1a890faSShreyas Bhatewara arpreq += 2 * ETH_ALEN + sizeof(u32); 3183d1a890faSShreyas Bhatewara *(u32 *)arpreq = ifa->ifa_address; 3184d1a890faSShreyas Bhatewara 3185d1a890faSShreyas Bhatewara /* The mask for the relevant bits. */ 3186d1a890faSShreyas Bhatewara pmConf->filters[i].mask[0] = 0x00; 3187d1a890faSShreyas Bhatewara pmConf->filters[i].mask[1] = 0x30; /* ETH_P_ARP */ 3188d1a890faSShreyas Bhatewara pmConf->filters[i].mask[2] = 0x30; /* ARPOP_REQUEST */ 3189d1a890faSShreyas Bhatewara pmConf->filters[i].mask[3] = 0x00; 3190d1a890faSShreyas Bhatewara pmConf->filters[i].mask[4] = 0xC0; /* IPv4 TIP */ 3191d1a890faSShreyas Bhatewara pmConf->filters[i].mask[5] = 0x03; /* IPv4 TIP */ 3192d1a890faSShreyas Bhatewara in_dev_put(in_dev); 3193d1a890faSShreyas Bhatewara 31943843e515SHarvey Harrison pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER; 3195d1a890faSShreyas Bhatewara i++; 3196d1a890faSShreyas Bhatewara } 3197d1a890faSShreyas Bhatewara 3198d1a890faSShreyas Bhatewara skip_arp: 3199d1a890faSShreyas Bhatewara if (adapter->wol & WAKE_MAGIC) 32003843e515SHarvey Harrison pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_MAGIC; 3201d1a890faSShreyas Bhatewara 3202d1a890faSShreyas Bhatewara pmConf->numFilters = i; 3203d1a890faSShreyas Bhatewara 3204115924b6SShreyas Bhatewara adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1); 3205115924b6SShreyas Bhatewara adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof( 3206115924b6SShreyas Bhatewara *pmConf)); 3207115924b6SShreyas Bhatewara adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys( 3208115924b6SShreyas Bhatewara pmConf)); 3209d1a890faSShreyas Bhatewara 321083d0feffSShreyas Bhatewara spin_lock_irqsave(&adapter->cmd_lock, flags); 3211d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 3212d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_PMCFG); 321383d0feffSShreyas Bhatewara spin_unlock_irqrestore(&adapter->cmd_lock, flags); 3214d1a890faSShreyas Bhatewara 3215d1a890faSShreyas Bhatewara pci_save_state(pdev); 3216d1a890faSShreyas Bhatewara pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND), 3217d1a890faSShreyas Bhatewara adapter->wol); 3218d1a890faSShreyas Bhatewara pci_disable_device(pdev); 3219d1a890faSShreyas Bhatewara pci_set_power_state(pdev, pci_choose_state(pdev, PMSG_SUSPEND)); 3220d1a890faSShreyas Bhatewara 3221d1a890faSShreyas Bhatewara return 0; 3222d1a890faSShreyas Bhatewara } 3223d1a890faSShreyas Bhatewara 3224d1a890faSShreyas Bhatewara 3225d1a890faSShreyas Bhatewara static int 3226d1a890faSShreyas Bhatewara vmxnet3_resume(struct device *device) 3227d1a890faSShreyas Bhatewara { 322851956cd6SShreyas Bhatewara int err, i = 0; 322983d0feffSShreyas Bhatewara unsigned long flags; 3230d1a890faSShreyas Bhatewara struct pci_dev *pdev = to_pci_dev(device); 3231d1a890faSShreyas Bhatewara struct net_device *netdev = pci_get_drvdata(pdev); 3232d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 3233d1a890faSShreyas Bhatewara struct Vmxnet3_PMConf *pmConf; 3234d1a890faSShreyas Bhatewara 3235d1a890faSShreyas Bhatewara if (!netif_running(netdev)) 3236d1a890faSShreyas Bhatewara return 0; 3237d1a890faSShreyas Bhatewara 3238d1a890faSShreyas Bhatewara /* Destroy wake-up filters. */ 3239d1a890faSShreyas Bhatewara pmConf = adapter->pm_conf; 3240d1a890faSShreyas Bhatewara memset(pmConf, 0, sizeof(*pmConf)); 3241d1a890faSShreyas Bhatewara 3242115924b6SShreyas Bhatewara adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1); 3243115924b6SShreyas Bhatewara adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof( 3244115924b6SShreyas Bhatewara *pmConf)); 32450561cf3dSHarvey Harrison adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys( 3246115924b6SShreyas Bhatewara pmConf)); 3247d1a890faSShreyas Bhatewara 3248d1a890faSShreyas Bhatewara netif_device_attach(netdev); 3249d1a890faSShreyas Bhatewara pci_set_power_state(pdev, PCI_D0); 3250d1a890faSShreyas Bhatewara pci_restore_state(pdev); 3251d1a890faSShreyas Bhatewara err = pci_enable_device_mem(pdev); 3252d1a890faSShreyas Bhatewara if (err != 0) 3253d1a890faSShreyas Bhatewara return err; 3254d1a890faSShreyas Bhatewara 3255d1a890faSShreyas Bhatewara pci_enable_wake(pdev, PCI_D0, 0); 3256d1a890faSShreyas Bhatewara 325783d0feffSShreyas Bhatewara spin_lock_irqsave(&adapter->cmd_lock, flags); 3258d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 3259d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_PMCFG); 326083d0feffSShreyas Bhatewara spin_unlock_irqrestore(&adapter->cmd_lock, flags); 3261d1a890faSShreyas Bhatewara vmxnet3_alloc_intr_resources(adapter); 3262d1a890faSShreyas Bhatewara vmxnet3_request_irqs(adapter); 326351956cd6SShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 326451956cd6SShreyas Bhatewara napi_enable(&adapter->rx_queue[i].napi); 3265d1a890faSShreyas Bhatewara vmxnet3_enable_all_intrs(adapter); 3266d1a890faSShreyas Bhatewara 3267d1a890faSShreyas Bhatewara return 0; 3268d1a890faSShreyas Bhatewara } 3269d1a890faSShreyas Bhatewara 327047145210SAlexey Dobriyan static const struct dev_pm_ops vmxnet3_pm_ops = { 3271d1a890faSShreyas Bhatewara .suspend = vmxnet3_suspend, 3272d1a890faSShreyas Bhatewara .resume = vmxnet3_resume, 3273d1a890faSShreyas Bhatewara }; 3274d1a890faSShreyas Bhatewara #endif 3275d1a890faSShreyas Bhatewara 3276d1a890faSShreyas Bhatewara static struct pci_driver vmxnet3_driver = { 3277d1a890faSShreyas Bhatewara .name = vmxnet3_driver_name, 3278d1a890faSShreyas Bhatewara .id_table = vmxnet3_pciid_table, 3279d1a890faSShreyas Bhatewara .probe = vmxnet3_probe_device, 3280d1a890faSShreyas Bhatewara .remove = __devexit_p(vmxnet3_remove_device), 3281d1a890faSShreyas Bhatewara #ifdef CONFIG_PM 3282d1a890faSShreyas Bhatewara .driver.pm = &vmxnet3_pm_ops, 3283d1a890faSShreyas Bhatewara #endif 3284d1a890faSShreyas Bhatewara }; 3285d1a890faSShreyas Bhatewara 3286d1a890faSShreyas Bhatewara 3287d1a890faSShreyas Bhatewara static int __init 3288d1a890faSShreyas Bhatewara vmxnet3_init_module(void) 3289d1a890faSShreyas Bhatewara { 3290d1a890faSShreyas Bhatewara printk(KERN_INFO "%s - version %s\n", VMXNET3_DRIVER_DESC, 3291d1a890faSShreyas Bhatewara VMXNET3_DRIVER_VERSION_REPORT); 3292d1a890faSShreyas Bhatewara return pci_register_driver(&vmxnet3_driver); 3293d1a890faSShreyas Bhatewara } 3294d1a890faSShreyas Bhatewara 3295d1a890faSShreyas Bhatewara module_init(vmxnet3_init_module); 3296d1a890faSShreyas Bhatewara 3297d1a890faSShreyas Bhatewara 3298d1a890faSShreyas Bhatewara static void 3299d1a890faSShreyas Bhatewara vmxnet3_exit_module(void) 3300d1a890faSShreyas Bhatewara { 3301d1a890faSShreyas Bhatewara pci_unregister_driver(&vmxnet3_driver); 3302d1a890faSShreyas Bhatewara } 3303d1a890faSShreyas Bhatewara 3304d1a890faSShreyas Bhatewara module_exit(vmxnet3_exit_module); 3305d1a890faSShreyas Bhatewara 3306d1a890faSShreyas Bhatewara MODULE_AUTHOR("VMware, Inc."); 3307d1a890faSShreyas Bhatewara MODULE_DESCRIPTION(VMXNET3_DRIVER_DESC); 3308d1a890faSShreyas Bhatewara MODULE_LICENSE("GPL v2"); 3309d1a890faSShreyas Bhatewara MODULE_VERSION(VMXNET3_DRIVER_VERSION_STRING); 3310