1d1a890faSShreyas Bhatewara /* 2d1a890faSShreyas Bhatewara * Linux driver for VMware's vmxnet3 ethernet NIC. 3d1a890faSShreyas Bhatewara * 4d1a890faSShreyas Bhatewara * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved. 5d1a890faSShreyas Bhatewara * 6d1a890faSShreyas Bhatewara * This program is free software; you can redistribute it and/or modify it 7d1a890faSShreyas Bhatewara * under the terms of the GNU General Public License as published by the 8d1a890faSShreyas Bhatewara * Free Software Foundation; version 2 of the License and no later version. 9d1a890faSShreyas Bhatewara * 10d1a890faSShreyas Bhatewara * This program is distributed in the hope that it will be useful, but 11d1a890faSShreyas Bhatewara * WITHOUT ANY WARRANTY; without even the implied warranty of 12d1a890faSShreyas Bhatewara * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 13d1a890faSShreyas Bhatewara * NON INFRINGEMENT. See the GNU General Public License for more 14d1a890faSShreyas Bhatewara * details. 15d1a890faSShreyas Bhatewara * 16d1a890faSShreyas Bhatewara * You should have received a copy of the GNU General Public License 17d1a890faSShreyas Bhatewara * along with this program; if not, write to the Free Software 18d1a890faSShreyas Bhatewara * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19d1a890faSShreyas Bhatewara * 20d1a890faSShreyas Bhatewara * The full GNU General Public License is included in this distribution in 21d1a890faSShreyas Bhatewara * the file called "COPYING". 22d1a890faSShreyas Bhatewara * 23d1a890faSShreyas Bhatewara * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com> 24d1a890faSShreyas Bhatewara * 25d1a890faSShreyas Bhatewara */ 26d1a890faSShreyas Bhatewara 27b038b040SStephen Rothwell #include <net/ip6_checksum.h> 28b038b040SStephen Rothwell 29d1a890faSShreyas Bhatewara #include "vmxnet3_int.h" 30d1a890faSShreyas Bhatewara 31d1a890faSShreyas Bhatewara char vmxnet3_driver_name[] = "vmxnet3"; 32d1a890faSShreyas Bhatewara #define VMXNET3_DRIVER_DESC "VMware vmxnet3 virtual NIC driver" 33d1a890faSShreyas Bhatewara 34d1a890faSShreyas Bhatewara /* 35d1a890faSShreyas Bhatewara * PCI Device ID Table 36d1a890faSShreyas Bhatewara * Last entry must be all 0s 37d1a890faSShreyas Bhatewara */ 38a3aa1884SAlexey Dobriyan static DEFINE_PCI_DEVICE_TABLE(vmxnet3_pciid_table) = { 39d1a890faSShreyas Bhatewara {PCI_VDEVICE(VMWARE, PCI_DEVICE_ID_VMWARE_VMXNET3)}, 40d1a890faSShreyas Bhatewara {0} 41d1a890faSShreyas Bhatewara }; 42d1a890faSShreyas Bhatewara 43d1a890faSShreyas Bhatewara MODULE_DEVICE_TABLE(pci, vmxnet3_pciid_table); 44d1a890faSShreyas Bhatewara 45d1a890faSShreyas Bhatewara static atomic_t devices_found; 46d1a890faSShreyas Bhatewara 4709c5088eSShreyas Bhatewara #define VMXNET3_MAX_DEVICES 10 4809c5088eSShreyas Bhatewara static int enable_mq = 1; 4909c5088eSShreyas Bhatewara static int irq_share_mode; 50d1a890faSShreyas Bhatewara 51f9f25026SShreyas Bhatewara static void 52f9f25026SShreyas Bhatewara vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac); 53f9f25026SShreyas Bhatewara 54d1a890faSShreyas Bhatewara /* 55d1a890faSShreyas Bhatewara * Enable/Disable the given intr 56d1a890faSShreyas Bhatewara */ 57d1a890faSShreyas Bhatewara static void 58d1a890faSShreyas Bhatewara vmxnet3_enable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx) 59d1a890faSShreyas Bhatewara { 60d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 0); 61d1a890faSShreyas Bhatewara } 62d1a890faSShreyas Bhatewara 63d1a890faSShreyas Bhatewara 64d1a890faSShreyas Bhatewara static void 65d1a890faSShreyas Bhatewara vmxnet3_disable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx) 66d1a890faSShreyas Bhatewara { 67d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 1); 68d1a890faSShreyas Bhatewara } 69d1a890faSShreyas Bhatewara 70d1a890faSShreyas Bhatewara 71d1a890faSShreyas Bhatewara /* 72d1a890faSShreyas Bhatewara * Enable/Disable all intrs used by the device 73d1a890faSShreyas Bhatewara */ 74d1a890faSShreyas Bhatewara static void 75d1a890faSShreyas Bhatewara vmxnet3_enable_all_intrs(struct vmxnet3_adapter *adapter) 76d1a890faSShreyas Bhatewara { 77d1a890faSShreyas Bhatewara int i; 78d1a890faSShreyas Bhatewara 79d1a890faSShreyas Bhatewara for (i = 0; i < adapter->intr.num_intrs; i++) 80d1a890faSShreyas Bhatewara vmxnet3_enable_intr(adapter, i); 816929fe8aSRonghua Zang adapter->shared->devRead.intrConf.intrCtrl &= 826929fe8aSRonghua Zang cpu_to_le32(~VMXNET3_IC_DISABLE_ALL); 83d1a890faSShreyas Bhatewara } 84d1a890faSShreyas Bhatewara 85d1a890faSShreyas Bhatewara 86d1a890faSShreyas Bhatewara static void 87d1a890faSShreyas Bhatewara vmxnet3_disable_all_intrs(struct vmxnet3_adapter *adapter) 88d1a890faSShreyas Bhatewara { 89d1a890faSShreyas Bhatewara int i; 90d1a890faSShreyas Bhatewara 916929fe8aSRonghua Zang adapter->shared->devRead.intrConf.intrCtrl |= 926929fe8aSRonghua Zang cpu_to_le32(VMXNET3_IC_DISABLE_ALL); 93d1a890faSShreyas Bhatewara for (i = 0; i < adapter->intr.num_intrs; i++) 94d1a890faSShreyas Bhatewara vmxnet3_disable_intr(adapter, i); 95d1a890faSShreyas Bhatewara } 96d1a890faSShreyas Bhatewara 97d1a890faSShreyas Bhatewara 98d1a890faSShreyas Bhatewara static void 99d1a890faSShreyas Bhatewara vmxnet3_ack_events(struct vmxnet3_adapter *adapter, u32 events) 100d1a890faSShreyas Bhatewara { 101d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_ECR, events); 102d1a890faSShreyas Bhatewara } 103d1a890faSShreyas Bhatewara 104d1a890faSShreyas Bhatewara 105d1a890faSShreyas Bhatewara static bool 106d1a890faSShreyas Bhatewara vmxnet3_tq_stopped(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 107d1a890faSShreyas Bhatewara { 10809c5088eSShreyas Bhatewara return tq->stopped; 109d1a890faSShreyas Bhatewara } 110d1a890faSShreyas Bhatewara 111d1a890faSShreyas Bhatewara 112d1a890faSShreyas Bhatewara static void 113d1a890faSShreyas Bhatewara vmxnet3_tq_start(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 114d1a890faSShreyas Bhatewara { 115d1a890faSShreyas Bhatewara tq->stopped = false; 11609c5088eSShreyas Bhatewara netif_start_subqueue(adapter->netdev, tq - adapter->tx_queue); 117d1a890faSShreyas Bhatewara } 118d1a890faSShreyas Bhatewara 119d1a890faSShreyas Bhatewara 120d1a890faSShreyas Bhatewara static void 121d1a890faSShreyas Bhatewara vmxnet3_tq_wake(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 122d1a890faSShreyas Bhatewara { 123d1a890faSShreyas Bhatewara tq->stopped = false; 12409c5088eSShreyas Bhatewara netif_wake_subqueue(adapter->netdev, (tq - adapter->tx_queue)); 125d1a890faSShreyas Bhatewara } 126d1a890faSShreyas Bhatewara 127d1a890faSShreyas Bhatewara 128d1a890faSShreyas Bhatewara static void 129d1a890faSShreyas Bhatewara vmxnet3_tq_stop(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 130d1a890faSShreyas Bhatewara { 131d1a890faSShreyas Bhatewara tq->stopped = true; 132d1a890faSShreyas Bhatewara tq->num_stop++; 13309c5088eSShreyas Bhatewara netif_stop_subqueue(adapter->netdev, (tq - adapter->tx_queue)); 134d1a890faSShreyas Bhatewara } 135d1a890faSShreyas Bhatewara 136d1a890faSShreyas Bhatewara 137d1a890faSShreyas Bhatewara /* 138d1a890faSShreyas Bhatewara * Check the link state. This may start or stop the tx queue. 139d1a890faSShreyas Bhatewara */ 140d1a890faSShreyas Bhatewara static void 1414a1745fcSShreyas Bhatewara vmxnet3_check_link(struct vmxnet3_adapter *adapter, bool affectTxQueue) 142d1a890faSShreyas Bhatewara { 143d1a890faSShreyas Bhatewara u32 ret; 14409c5088eSShreyas Bhatewara int i; 14583d0feffSShreyas Bhatewara unsigned long flags; 146d1a890faSShreyas Bhatewara 14783d0feffSShreyas Bhatewara spin_lock_irqsave(&adapter->cmd_lock, flags); 148d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK); 149d1a890faSShreyas Bhatewara ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 15083d0feffSShreyas Bhatewara spin_unlock_irqrestore(&adapter->cmd_lock, flags); 15183d0feffSShreyas Bhatewara 152d1a890faSShreyas Bhatewara adapter->link_speed = ret >> 16; 153d1a890faSShreyas Bhatewara if (ret & 1) { /* Link is up. */ 154d1a890faSShreyas Bhatewara printk(KERN_INFO "%s: NIC Link is Up %d Mbps\n", 155d1a890faSShreyas Bhatewara adapter->netdev->name, adapter->link_speed); 156d1a890faSShreyas Bhatewara if (!netif_carrier_ok(adapter->netdev)) 157d1a890faSShreyas Bhatewara netif_carrier_on(adapter->netdev); 158d1a890faSShreyas Bhatewara 15909c5088eSShreyas Bhatewara if (affectTxQueue) { 16009c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 16109c5088eSShreyas Bhatewara vmxnet3_tq_start(&adapter->tx_queue[i], 16209c5088eSShreyas Bhatewara adapter); 16309c5088eSShreyas Bhatewara } 164d1a890faSShreyas Bhatewara } else { 165d1a890faSShreyas Bhatewara printk(KERN_INFO "%s: NIC Link is Down\n", 166d1a890faSShreyas Bhatewara adapter->netdev->name); 167d1a890faSShreyas Bhatewara if (netif_carrier_ok(adapter->netdev)) 168d1a890faSShreyas Bhatewara netif_carrier_off(adapter->netdev); 169d1a890faSShreyas Bhatewara 17009c5088eSShreyas Bhatewara if (affectTxQueue) { 17109c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 17209c5088eSShreyas Bhatewara vmxnet3_tq_stop(&adapter->tx_queue[i], adapter); 17309c5088eSShreyas Bhatewara } 174d1a890faSShreyas Bhatewara } 175d1a890faSShreyas Bhatewara } 176d1a890faSShreyas Bhatewara 177d1a890faSShreyas Bhatewara static void 178d1a890faSShreyas Bhatewara vmxnet3_process_events(struct vmxnet3_adapter *adapter) 179d1a890faSShreyas Bhatewara { 18009c5088eSShreyas Bhatewara int i; 181e328d410SRoland Dreier unsigned long flags; 182115924b6SShreyas Bhatewara u32 events = le32_to_cpu(adapter->shared->ecr); 183d1a890faSShreyas Bhatewara if (!events) 184d1a890faSShreyas Bhatewara return; 185d1a890faSShreyas Bhatewara 186d1a890faSShreyas Bhatewara vmxnet3_ack_events(adapter, events); 187d1a890faSShreyas Bhatewara 188d1a890faSShreyas Bhatewara /* Check if link state has changed */ 189d1a890faSShreyas Bhatewara if (events & VMXNET3_ECR_LINK) 1904a1745fcSShreyas Bhatewara vmxnet3_check_link(adapter, true); 191d1a890faSShreyas Bhatewara 192d1a890faSShreyas Bhatewara /* Check if there is an error on xmit/recv queues */ 193d1a890faSShreyas Bhatewara if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) { 194e328d410SRoland Dreier spin_lock_irqsave(&adapter->cmd_lock, flags); 195d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 196d1a890faSShreyas Bhatewara VMXNET3_CMD_GET_QUEUE_STATUS); 197e328d410SRoland Dreier spin_unlock_irqrestore(&adapter->cmd_lock, flags); 198d1a890faSShreyas Bhatewara 19909c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 20009c5088eSShreyas Bhatewara if (adapter->tqd_start[i].status.stopped) 20109c5088eSShreyas Bhatewara dev_err(&adapter->netdev->dev, 20209c5088eSShreyas Bhatewara "%s: tq[%d] error 0x%x\n", 20309c5088eSShreyas Bhatewara adapter->netdev->name, i, le32_to_cpu( 20409c5088eSShreyas Bhatewara adapter->tqd_start[i].status.error)); 20509c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 20609c5088eSShreyas Bhatewara if (adapter->rqd_start[i].status.stopped) 20709c5088eSShreyas Bhatewara dev_err(&adapter->netdev->dev, 20809c5088eSShreyas Bhatewara "%s: rq[%d] error 0x%x\n", 20909c5088eSShreyas Bhatewara adapter->netdev->name, i, 21009c5088eSShreyas Bhatewara adapter->rqd_start[i].status.error); 211d1a890faSShreyas Bhatewara 212d1a890faSShreyas Bhatewara schedule_work(&adapter->work); 213d1a890faSShreyas Bhatewara } 214d1a890faSShreyas Bhatewara } 215d1a890faSShreyas Bhatewara 216115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 217115924b6SShreyas Bhatewara /* 218115924b6SShreyas Bhatewara * The device expects the bitfields in shared structures to be written in 219115924b6SShreyas Bhatewara * little endian. When CPU is big endian, the following routines are used to 220115924b6SShreyas Bhatewara * correctly read and write into ABI. 221115924b6SShreyas Bhatewara * The general technique used here is : double word bitfields are defined in 222115924b6SShreyas Bhatewara * opposite order for big endian architecture. Then before reading them in 223115924b6SShreyas Bhatewara * driver the complete double word is translated using le32_to_cpu. Similarly 224115924b6SShreyas Bhatewara * After the driver writes into bitfields, cpu_to_le32 is used to translate the 225115924b6SShreyas Bhatewara * double words into required format. 226115924b6SShreyas Bhatewara * In order to avoid touching bits in shared structure more than once, temporary 227115924b6SShreyas Bhatewara * descriptors are used. These are passed as srcDesc to following functions. 228115924b6SShreyas Bhatewara */ 229115924b6SShreyas Bhatewara static void vmxnet3_RxDescToCPU(const struct Vmxnet3_RxDesc *srcDesc, 230115924b6SShreyas Bhatewara struct Vmxnet3_RxDesc *dstDesc) 231115924b6SShreyas Bhatewara { 232115924b6SShreyas Bhatewara u32 *src = (u32 *)srcDesc + 2; 233115924b6SShreyas Bhatewara u32 *dst = (u32 *)dstDesc + 2; 234115924b6SShreyas Bhatewara dstDesc->addr = le64_to_cpu(srcDesc->addr); 235115924b6SShreyas Bhatewara *dst = le32_to_cpu(*src); 236115924b6SShreyas Bhatewara dstDesc->ext1 = le32_to_cpu(srcDesc->ext1); 237115924b6SShreyas Bhatewara } 238115924b6SShreyas Bhatewara 239115924b6SShreyas Bhatewara static void vmxnet3_TxDescToLe(const struct Vmxnet3_TxDesc *srcDesc, 240115924b6SShreyas Bhatewara struct Vmxnet3_TxDesc *dstDesc) 241115924b6SShreyas Bhatewara { 242115924b6SShreyas Bhatewara int i; 243115924b6SShreyas Bhatewara u32 *src = (u32 *)(srcDesc + 1); 244115924b6SShreyas Bhatewara u32 *dst = (u32 *)(dstDesc + 1); 245115924b6SShreyas Bhatewara 246115924b6SShreyas Bhatewara /* Working backwards so that the gen bit is set at the end. */ 247115924b6SShreyas Bhatewara for (i = 2; i > 0; i--) { 248115924b6SShreyas Bhatewara src--; 249115924b6SShreyas Bhatewara dst--; 250115924b6SShreyas Bhatewara *dst = cpu_to_le32(*src); 251115924b6SShreyas Bhatewara } 252115924b6SShreyas Bhatewara } 253115924b6SShreyas Bhatewara 254115924b6SShreyas Bhatewara 255115924b6SShreyas Bhatewara static void vmxnet3_RxCompToCPU(const struct Vmxnet3_RxCompDesc *srcDesc, 256115924b6SShreyas Bhatewara struct Vmxnet3_RxCompDesc *dstDesc) 257115924b6SShreyas Bhatewara { 258115924b6SShreyas Bhatewara int i = 0; 259115924b6SShreyas Bhatewara u32 *src = (u32 *)srcDesc; 260115924b6SShreyas Bhatewara u32 *dst = (u32 *)dstDesc; 261115924b6SShreyas Bhatewara for (i = 0; i < sizeof(struct Vmxnet3_RxCompDesc) / sizeof(u32); i++) { 262115924b6SShreyas Bhatewara *dst = le32_to_cpu(*src); 263115924b6SShreyas Bhatewara src++; 264115924b6SShreyas Bhatewara dst++; 265115924b6SShreyas Bhatewara } 266115924b6SShreyas Bhatewara } 267115924b6SShreyas Bhatewara 268115924b6SShreyas Bhatewara 269115924b6SShreyas Bhatewara /* Used to read bitfield values from double words. */ 270115924b6SShreyas Bhatewara static u32 get_bitfield32(const __le32 *bitfield, u32 pos, u32 size) 271115924b6SShreyas Bhatewara { 272115924b6SShreyas Bhatewara u32 temp = le32_to_cpu(*bitfield); 273115924b6SShreyas Bhatewara u32 mask = ((1 << size) - 1) << pos; 274115924b6SShreyas Bhatewara temp &= mask; 275115924b6SShreyas Bhatewara temp >>= pos; 276115924b6SShreyas Bhatewara return temp; 277115924b6SShreyas Bhatewara } 278115924b6SShreyas Bhatewara 279115924b6SShreyas Bhatewara 280115924b6SShreyas Bhatewara 281115924b6SShreyas Bhatewara #endif /* __BIG_ENDIAN_BITFIELD */ 282115924b6SShreyas Bhatewara 283115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 284115924b6SShreyas Bhatewara 285115924b6SShreyas Bhatewara # define VMXNET3_TXDESC_GET_GEN(txdesc) get_bitfield32(((const __le32 *) \ 286115924b6SShreyas Bhatewara txdesc) + VMXNET3_TXD_GEN_DWORD_SHIFT, \ 287115924b6SShreyas Bhatewara VMXNET3_TXD_GEN_SHIFT, VMXNET3_TXD_GEN_SIZE) 288115924b6SShreyas Bhatewara # define VMXNET3_TXDESC_GET_EOP(txdesc) get_bitfield32(((const __le32 *) \ 289115924b6SShreyas Bhatewara txdesc) + VMXNET3_TXD_EOP_DWORD_SHIFT, \ 290115924b6SShreyas Bhatewara VMXNET3_TXD_EOP_SHIFT, VMXNET3_TXD_EOP_SIZE) 291115924b6SShreyas Bhatewara # define VMXNET3_TCD_GET_GEN(tcd) get_bitfield32(((const __le32 *)tcd) + \ 292115924b6SShreyas Bhatewara VMXNET3_TCD_GEN_DWORD_SHIFT, VMXNET3_TCD_GEN_SHIFT, \ 293115924b6SShreyas Bhatewara VMXNET3_TCD_GEN_SIZE) 294115924b6SShreyas Bhatewara # define VMXNET3_TCD_GET_TXIDX(tcd) get_bitfield32((const __le32 *)tcd, \ 295115924b6SShreyas Bhatewara VMXNET3_TCD_TXIDX_SHIFT, VMXNET3_TCD_TXIDX_SIZE) 296115924b6SShreyas Bhatewara # define vmxnet3_getRxComp(dstrcd, rcd, tmp) do { \ 297115924b6SShreyas Bhatewara (dstrcd) = (tmp); \ 298115924b6SShreyas Bhatewara vmxnet3_RxCompToCPU((rcd), (tmp)); \ 299115924b6SShreyas Bhatewara } while (0) 300115924b6SShreyas Bhatewara # define vmxnet3_getRxDesc(dstrxd, rxd, tmp) do { \ 301115924b6SShreyas Bhatewara (dstrxd) = (tmp); \ 302115924b6SShreyas Bhatewara vmxnet3_RxDescToCPU((rxd), (tmp)); \ 303115924b6SShreyas Bhatewara } while (0) 304115924b6SShreyas Bhatewara 305115924b6SShreyas Bhatewara #else 306115924b6SShreyas Bhatewara 307115924b6SShreyas Bhatewara # define VMXNET3_TXDESC_GET_GEN(txdesc) ((txdesc)->gen) 308115924b6SShreyas Bhatewara # define VMXNET3_TXDESC_GET_EOP(txdesc) ((txdesc)->eop) 309115924b6SShreyas Bhatewara # define VMXNET3_TCD_GET_GEN(tcd) ((tcd)->gen) 310115924b6SShreyas Bhatewara # define VMXNET3_TCD_GET_TXIDX(tcd) ((tcd)->txdIdx) 311115924b6SShreyas Bhatewara # define vmxnet3_getRxComp(dstrcd, rcd, tmp) (dstrcd) = (rcd) 312115924b6SShreyas Bhatewara # define vmxnet3_getRxDesc(dstrxd, rxd, tmp) (dstrxd) = (rxd) 313115924b6SShreyas Bhatewara 314115924b6SShreyas Bhatewara #endif /* __BIG_ENDIAN_BITFIELD */ 315115924b6SShreyas Bhatewara 316d1a890faSShreyas Bhatewara 317d1a890faSShreyas Bhatewara static void 318d1a890faSShreyas Bhatewara vmxnet3_unmap_tx_buf(struct vmxnet3_tx_buf_info *tbi, 319d1a890faSShreyas Bhatewara struct pci_dev *pdev) 320d1a890faSShreyas Bhatewara { 321d1a890faSShreyas Bhatewara if (tbi->map_type == VMXNET3_MAP_SINGLE) 322d1a890faSShreyas Bhatewara pci_unmap_single(pdev, tbi->dma_addr, tbi->len, 323d1a890faSShreyas Bhatewara PCI_DMA_TODEVICE); 324d1a890faSShreyas Bhatewara else if (tbi->map_type == VMXNET3_MAP_PAGE) 325d1a890faSShreyas Bhatewara pci_unmap_page(pdev, tbi->dma_addr, tbi->len, 326d1a890faSShreyas Bhatewara PCI_DMA_TODEVICE); 327d1a890faSShreyas Bhatewara else 328d1a890faSShreyas Bhatewara BUG_ON(tbi->map_type != VMXNET3_MAP_NONE); 329d1a890faSShreyas Bhatewara 330d1a890faSShreyas Bhatewara tbi->map_type = VMXNET3_MAP_NONE; /* to help debugging */ 331d1a890faSShreyas Bhatewara } 332d1a890faSShreyas Bhatewara 333d1a890faSShreyas Bhatewara 334d1a890faSShreyas Bhatewara static int 335d1a890faSShreyas Bhatewara vmxnet3_unmap_pkt(u32 eop_idx, struct vmxnet3_tx_queue *tq, 336d1a890faSShreyas Bhatewara struct pci_dev *pdev, struct vmxnet3_adapter *adapter) 337d1a890faSShreyas Bhatewara { 338d1a890faSShreyas Bhatewara struct sk_buff *skb; 339d1a890faSShreyas Bhatewara int entries = 0; 340d1a890faSShreyas Bhatewara 341d1a890faSShreyas Bhatewara /* no out of order completion */ 342d1a890faSShreyas Bhatewara BUG_ON(tq->buf_info[eop_idx].sop_idx != tq->tx_ring.next2comp); 343115924b6SShreyas Bhatewara BUG_ON(VMXNET3_TXDESC_GET_EOP(&(tq->tx_ring.base[eop_idx].txd)) != 1); 344d1a890faSShreyas Bhatewara 345d1a890faSShreyas Bhatewara skb = tq->buf_info[eop_idx].skb; 346d1a890faSShreyas Bhatewara BUG_ON(skb == NULL); 347d1a890faSShreyas Bhatewara tq->buf_info[eop_idx].skb = NULL; 348d1a890faSShreyas Bhatewara 349d1a890faSShreyas Bhatewara VMXNET3_INC_RING_IDX_ONLY(eop_idx, tq->tx_ring.size); 350d1a890faSShreyas Bhatewara 351d1a890faSShreyas Bhatewara while (tq->tx_ring.next2comp != eop_idx) { 352d1a890faSShreyas Bhatewara vmxnet3_unmap_tx_buf(tq->buf_info + tq->tx_ring.next2comp, 353d1a890faSShreyas Bhatewara pdev); 354d1a890faSShreyas Bhatewara 355d1a890faSShreyas Bhatewara /* update next2comp w/o tx_lock. Since we are marking more, 356d1a890faSShreyas Bhatewara * instead of less, tx ring entries avail, the worst case is 357d1a890faSShreyas Bhatewara * that the tx routine incorrectly re-queues a pkt due to 358d1a890faSShreyas Bhatewara * insufficient tx ring entries. 359d1a890faSShreyas Bhatewara */ 360d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring); 361d1a890faSShreyas Bhatewara entries++; 362d1a890faSShreyas Bhatewara } 363d1a890faSShreyas Bhatewara 364d1a890faSShreyas Bhatewara dev_kfree_skb_any(skb); 365d1a890faSShreyas Bhatewara return entries; 366d1a890faSShreyas Bhatewara } 367d1a890faSShreyas Bhatewara 368d1a890faSShreyas Bhatewara 369d1a890faSShreyas Bhatewara static int 370d1a890faSShreyas Bhatewara vmxnet3_tq_tx_complete(struct vmxnet3_tx_queue *tq, 371d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 372d1a890faSShreyas Bhatewara { 373d1a890faSShreyas Bhatewara int completed = 0; 374d1a890faSShreyas Bhatewara union Vmxnet3_GenericDesc *gdesc; 375d1a890faSShreyas Bhatewara 376d1a890faSShreyas Bhatewara gdesc = tq->comp_ring.base + tq->comp_ring.next2proc; 377115924b6SShreyas Bhatewara while (VMXNET3_TCD_GET_GEN(&gdesc->tcd) == tq->comp_ring.gen) { 378115924b6SShreyas Bhatewara completed += vmxnet3_unmap_pkt(VMXNET3_TCD_GET_TXIDX( 379115924b6SShreyas Bhatewara &gdesc->tcd), tq, adapter->pdev, 380115924b6SShreyas Bhatewara adapter); 381d1a890faSShreyas Bhatewara 382d1a890faSShreyas Bhatewara vmxnet3_comp_ring_adv_next2proc(&tq->comp_ring); 383d1a890faSShreyas Bhatewara gdesc = tq->comp_ring.base + tq->comp_ring.next2proc; 384d1a890faSShreyas Bhatewara } 385d1a890faSShreyas Bhatewara 386d1a890faSShreyas Bhatewara if (completed) { 387d1a890faSShreyas Bhatewara spin_lock(&tq->tx_lock); 388d1a890faSShreyas Bhatewara if (unlikely(vmxnet3_tq_stopped(tq, adapter) && 389d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_desc_avail(&tq->tx_ring) > 390d1a890faSShreyas Bhatewara VMXNET3_WAKE_QUEUE_THRESHOLD(tq) && 391d1a890faSShreyas Bhatewara netif_carrier_ok(adapter->netdev))) { 392d1a890faSShreyas Bhatewara vmxnet3_tq_wake(tq, adapter); 393d1a890faSShreyas Bhatewara } 394d1a890faSShreyas Bhatewara spin_unlock(&tq->tx_lock); 395d1a890faSShreyas Bhatewara } 396d1a890faSShreyas Bhatewara return completed; 397d1a890faSShreyas Bhatewara } 398d1a890faSShreyas Bhatewara 399d1a890faSShreyas Bhatewara 400d1a890faSShreyas Bhatewara static void 401d1a890faSShreyas Bhatewara vmxnet3_tq_cleanup(struct vmxnet3_tx_queue *tq, 402d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 403d1a890faSShreyas Bhatewara { 404d1a890faSShreyas Bhatewara int i; 405d1a890faSShreyas Bhatewara 406d1a890faSShreyas Bhatewara while (tq->tx_ring.next2comp != tq->tx_ring.next2fill) { 407d1a890faSShreyas Bhatewara struct vmxnet3_tx_buf_info *tbi; 408d1a890faSShreyas Bhatewara union Vmxnet3_GenericDesc *gdesc; 409d1a890faSShreyas Bhatewara 410d1a890faSShreyas Bhatewara tbi = tq->buf_info + tq->tx_ring.next2comp; 411d1a890faSShreyas Bhatewara gdesc = tq->tx_ring.base + tq->tx_ring.next2comp; 412d1a890faSShreyas Bhatewara 413d1a890faSShreyas Bhatewara vmxnet3_unmap_tx_buf(tbi, adapter->pdev); 414d1a890faSShreyas Bhatewara if (tbi->skb) { 415d1a890faSShreyas Bhatewara dev_kfree_skb_any(tbi->skb); 416d1a890faSShreyas Bhatewara tbi->skb = NULL; 417d1a890faSShreyas Bhatewara } 418d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring); 419d1a890faSShreyas Bhatewara } 420d1a890faSShreyas Bhatewara 421d1a890faSShreyas Bhatewara /* sanity check, verify all buffers are indeed unmapped and freed */ 422d1a890faSShreyas Bhatewara for (i = 0; i < tq->tx_ring.size; i++) { 423d1a890faSShreyas Bhatewara BUG_ON(tq->buf_info[i].skb != NULL || 424d1a890faSShreyas Bhatewara tq->buf_info[i].map_type != VMXNET3_MAP_NONE); 425d1a890faSShreyas Bhatewara } 426d1a890faSShreyas Bhatewara 427d1a890faSShreyas Bhatewara tq->tx_ring.gen = VMXNET3_INIT_GEN; 428d1a890faSShreyas Bhatewara tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0; 429d1a890faSShreyas Bhatewara 430d1a890faSShreyas Bhatewara tq->comp_ring.gen = VMXNET3_INIT_GEN; 431d1a890faSShreyas Bhatewara tq->comp_ring.next2proc = 0; 432d1a890faSShreyas Bhatewara } 433d1a890faSShreyas Bhatewara 434d1a890faSShreyas Bhatewara 43509c5088eSShreyas Bhatewara static void 436d1a890faSShreyas Bhatewara vmxnet3_tq_destroy(struct vmxnet3_tx_queue *tq, 437d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 438d1a890faSShreyas Bhatewara { 439d1a890faSShreyas Bhatewara if (tq->tx_ring.base) { 440d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, tq->tx_ring.size * 441d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxDesc), 442d1a890faSShreyas Bhatewara tq->tx_ring.base, tq->tx_ring.basePA); 443d1a890faSShreyas Bhatewara tq->tx_ring.base = NULL; 444d1a890faSShreyas Bhatewara } 445d1a890faSShreyas Bhatewara if (tq->data_ring.base) { 446d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, tq->data_ring.size * 447d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxDataDesc), 448d1a890faSShreyas Bhatewara tq->data_ring.base, tq->data_ring.basePA); 449d1a890faSShreyas Bhatewara tq->data_ring.base = NULL; 450d1a890faSShreyas Bhatewara } 451d1a890faSShreyas Bhatewara if (tq->comp_ring.base) { 452d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, tq->comp_ring.size * 453d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxCompDesc), 454d1a890faSShreyas Bhatewara tq->comp_ring.base, tq->comp_ring.basePA); 455d1a890faSShreyas Bhatewara tq->comp_ring.base = NULL; 456d1a890faSShreyas Bhatewara } 457d1a890faSShreyas Bhatewara kfree(tq->buf_info); 458d1a890faSShreyas Bhatewara tq->buf_info = NULL; 459d1a890faSShreyas Bhatewara } 460d1a890faSShreyas Bhatewara 461d1a890faSShreyas Bhatewara 46209c5088eSShreyas Bhatewara /* Destroy all tx queues */ 46309c5088eSShreyas Bhatewara void 46409c5088eSShreyas Bhatewara vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter) 46509c5088eSShreyas Bhatewara { 46609c5088eSShreyas Bhatewara int i; 46709c5088eSShreyas Bhatewara 46809c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 46909c5088eSShreyas Bhatewara vmxnet3_tq_destroy(&adapter->tx_queue[i], adapter); 47009c5088eSShreyas Bhatewara } 47109c5088eSShreyas Bhatewara 47209c5088eSShreyas Bhatewara 473d1a890faSShreyas Bhatewara static void 474d1a890faSShreyas Bhatewara vmxnet3_tq_init(struct vmxnet3_tx_queue *tq, 475d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 476d1a890faSShreyas Bhatewara { 477d1a890faSShreyas Bhatewara int i; 478d1a890faSShreyas Bhatewara 479d1a890faSShreyas Bhatewara /* reset the tx ring contents to 0 and reset the tx ring states */ 480d1a890faSShreyas Bhatewara memset(tq->tx_ring.base, 0, tq->tx_ring.size * 481d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxDesc)); 482d1a890faSShreyas Bhatewara tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0; 483d1a890faSShreyas Bhatewara tq->tx_ring.gen = VMXNET3_INIT_GEN; 484d1a890faSShreyas Bhatewara 485d1a890faSShreyas Bhatewara memset(tq->data_ring.base, 0, tq->data_ring.size * 486d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxDataDesc)); 487d1a890faSShreyas Bhatewara 488d1a890faSShreyas Bhatewara /* reset the tx comp ring contents to 0 and reset comp ring states */ 489d1a890faSShreyas Bhatewara memset(tq->comp_ring.base, 0, tq->comp_ring.size * 490d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxCompDesc)); 491d1a890faSShreyas Bhatewara tq->comp_ring.next2proc = 0; 492d1a890faSShreyas Bhatewara tq->comp_ring.gen = VMXNET3_INIT_GEN; 493d1a890faSShreyas Bhatewara 494d1a890faSShreyas Bhatewara /* reset the bookkeeping data */ 495d1a890faSShreyas Bhatewara memset(tq->buf_info, 0, sizeof(tq->buf_info[0]) * tq->tx_ring.size); 496d1a890faSShreyas Bhatewara for (i = 0; i < tq->tx_ring.size; i++) 497d1a890faSShreyas Bhatewara tq->buf_info[i].map_type = VMXNET3_MAP_NONE; 498d1a890faSShreyas Bhatewara 499d1a890faSShreyas Bhatewara /* stats are not reset */ 500d1a890faSShreyas Bhatewara } 501d1a890faSShreyas Bhatewara 502d1a890faSShreyas Bhatewara 503d1a890faSShreyas Bhatewara static int 504d1a890faSShreyas Bhatewara vmxnet3_tq_create(struct vmxnet3_tx_queue *tq, 505d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 506d1a890faSShreyas Bhatewara { 507d1a890faSShreyas Bhatewara BUG_ON(tq->tx_ring.base || tq->data_ring.base || 508d1a890faSShreyas Bhatewara tq->comp_ring.base || tq->buf_info); 509d1a890faSShreyas Bhatewara 510d1a890faSShreyas Bhatewara tq->tx_ring.base = pci_alloc_consistent(adapter->pdev, tq->tx_ring.size 511d1a890faSShreyas Bhatewara * sizeof(struct Vmxnet3_TxDesc), 512d1a890faSShreyas Bhatewara &tq->tx_ring.basePA); 513d1a890faSShreyas Bhatewara if (!tq->tx_ring.base) { 514d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate tx ring\n", 515d1a890faSShreyas Bhatewara adapter->netdev->name); 516d1a890faSShreyas Bhatewara goto err; 517d1a890faSShreyas Bhatewara } 518d1a890faSShreyas Bhatewara 519d1a890faSShreyas Bhatewara tq->data_ring.base = pci_alloc_consistent(adapter->pdev, 520d1a890faSShreyas Bhatewara tq->data_ring.size * 521d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxDataDesc), 522d1a890faSShreyas Bhatewara &tq->data_ring.basePA); 523d1a890faSShreyas Bhatewara if (!tq->data_ring.base) { 524d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate data ring\n", 525d1a890faSShreyas Bhatewara adapter->netdev->name); 526d1a890faSShreyas Bhatewara goto err; 527d1a890faSShreyas Bhatewara } 528d1a890faSShreyas Bhatewara 529d1a890faSShreyas Bhatewara tq->comp_ring.base = pci_alloc_consistent(adapter->pdev, 530d1a890faSShreyas Bhatewara tq->comp_ring.size * 531d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxCompDesc), 532d1a890faSShreyas Bhatewara &tq->comp_ring.basePA); 533d1a890faSShreyas Bhatewara if (!tq->comp_ring.base) { 534d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate tx comp ring\n", 535d1a890faSShreyas Bhatewara adapter->netdev->name); 536d1a890faSShreyas Bhatewara goto err; 537d1a890faSShreyas Bhatewara } 538d1a890faSShreyas Bhatewara 539d1a890faSShreyas Bhatewara tq->buf_info = kcalloc(tq->tx_ring.size, sizeof(tq->buf_info[0]), 540d1a890faSShreyas Bhatewara GFP_KERNEL); 541d1a890faSShreyas Bhatewara if (!tq->buf_info) { 542d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate tx bufinfo\n", 543d1a890faSShreyas Bhatewara adapter->netdev->name); 544d1a890faSShreyas Bhatewara goto err; 545d1a890faSShreyas Bhatewara } 546d1a890faSShreyas Bhatewara 547d1a890faSShreyas Bhatewara return 0; 548d1a890faSShreyas Bhatewara 549d1a890faSShreyas Bhatewara err: 550d1a890faSShreyas Bhatewara vmxnet3_tq_destroy(tq, adapter); 551d1a890faSShreyas Bhatewara return -ENOMEM; 552d1a890faSShreyas Bhatewara } 553d1a890faSShreyas Bhatewara 55409c5088eSShreyas Bhatewara static void 55509c5088eSShreyas Bhatewara vmxnet3_tq_cleanup_all(struct vmxnet3_adapter *adapter) 55609c5088eSShreyas Bhatewara { 55709c5088eSShreyas Bhatewara int i; 55809c5088eSShreyas Bhatewara 55909c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 56009c5088eSShreyas Bhatewara vmxnet3_tq_cleanup(&adapter->tx_queue[i], adapter); 56109c5088eSShreyas Bhatewara } 562d1a890faSShreyas Bhatewara 563d1a890faSShreyas Bhatewara /* 564d1a890faSShreyas Bhatewara * starting from ring->next2fill, allocate rx buffers for the given ring 565d1a890faSShreyas Bhatewara * of the rx queue and update the rx desc. stop after @num_to_alloc buffers 566d1a890faSShreyas Bhatewara * are allocated or allocation fails 567d1a890faSShreyas Bhatewara */ 568d1a890faSShreyas Bhatewara 569d1a890faSShreyas Bhatewara static int 570d1a890faSShreyas Bhatewara vmxnet3_rq_alloc_rx_buf(struct vmxnet3_rx_queue *rq, u32 ring_idx, 571d1a890faSShreyas Bhatewara int num_to_alloc, struct vmxnet3_adapter *adapter) 572d1a890faSShreyas Bhatewara { 573d1a890faSShreyas Bhatewara int num_allocated = 0; 574d1a890faSShreyas Bhatewara struct vmxnet3_rx_buf_info *rbi_base = rq->buf_info[ring_idx]; 575d1a890faSShreyas Bhatewara struct vmxnet3_cmd_ring *ring = &rq->rx_ring[ring_idx]; 576d1a890faSShreyas Bhatewara u32 val; 577d1a890faSShreyas Bhatewara 578d1a890faSShreyas Bhatewara while (num_allocated < num_to_alloc) { 579d1a890faSShreyas Bhatewara struct vmxnet3_rx_buf_info *rbi; 580d1a890faSShreyas Bhatewara union Vmxnet3_GenericDesc *gd; 581d1a890faSShreyas Bhatewara 582d1a890faSShreyas Bhatewara rbi = rbi_base + ring->next2fill; 583d1a890faSShreyas Bhatewara gd = ring->base + ring->next2fill; 584d1a890faSShreyas Bhatewara 585d1a890faSShreyas Bhatewara if (rbi->buf_type == VMXNET3_RX_BUF_SKB) { 586d1a890faSShreyas Bhatewara if (rbi->skb == NULL) { 587d1a890faSShreyas Bhatewara rbi->skb = dev_alloc_skb(rbi->len + 588d1a890faSShreyas Bhatewara NET_IP_ALIGN); 589d1a890faSShreyas Bhatewara if (unlikely(rbi->skb == NULL)) { 590d1a890faSShreyas Bhatewara rq->stats.rx_buf_alloc_failure++; 591d1a890faSShreyas Bhatewara break; 592d1a890faSShreyas Bhatewara } 593d1a890faSShreyas Bhatewara rbi->skb->dev = adapter->netdev; 594d1a890faSShreyas Bhatewara 595d1a890faSShreyas Bhatewara skb_reserve(rbi->skb, NET_IP_ALIGN); 596d1a890faSShreyas Bhatewara rbi->dma_addr = pci_map_single(adapter->pdev, 597d1a890faSShreyas Bhatewara rbi->skb->data, rbi->len, 598d1a890faSShreyas Bhatewara PCI_DMA_FROMDEVICE); 599d1a890faSShreyas Bhatewara } else { 600d1a890faSShreyas Bhatewara /* rx buffer skipped by the device */ 601d1a890faSShreyas Bhatewara } 602d1a890faSShreyas Bhatewara val = VMXNET3_RXD_BTYPE_HEAD << VMXNET3_RXD_BTYPE_SHIFT; 603d1a890faSShreyas Bhatewara } else { 604d1a890faSShreyas Bhatewara BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE || 605d1a890faSShreyas Bhatewara rbi->len != PAGE_SIZE); 606d1a890faSShreyas Bhatewara 607d1a890faSShreyas Bhatewara if (rbi->page == NULL) { 608d1a890faSShreyas Bhatewara rbi->page = alloc_page(GFP_ATOMIC); 609d1a890faSShreyas Bhatewara if (unlikely(rbi->page == NULL)) { 610d1a890faSShreyas Bhatewara rq->stats.rx_buf_alloc_failure++; 611d1a890faSShreyas Bhatewara break; 612d1a890faSShreyas Bhatewara } 613d1a890faSShreyas Bhatewara rbi->dma_addr = pci_map_page(adapter->pdev, 614d1a890faSShreyas Bhatewara rbi->page, 0, PAGE_SIZE, 615d1a890faSShreyas Bhatewara PCI_DMA_FROMDEVICE); 616d1a890faSShreyas Bhatewara } else { 617d1a890faSShreyas Bhatewara /* rx buffers skipped by the device */ 618d1a890faSShreyas Bhatewara } 619d1a890faSShreyas Bhatewara val = VMXNET3_RXD_BTYPE_BODY << VMXNET3_RXD_BTYPE_SHIFT; 620d1a890faSShreyas Bhatewara } 621d1a890faSShreyas Bhatewara 622d1a890faSShreyas Bhatewara BUG_ON(rbi->dma_addr == 0); 623115924b6SShreyas Bhatewara gd->rxd.addr = cpu_to_le64(rbi->dma_addr); 624115924b6SShreyas Bhatewara gd->dword[2] = cpu_to_le32((ring->gen << VMXNET3_RXD_GEN_SHIFT) 625115924b6SShreyas Bhatewara | val | rbi->len); 626d1a890faSShreyas Bhatewara 627d1a890faSShreyas Bhatewara num_allocated++; 628d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_adv_next2fill(ring); 629d1a890faSShreyas Bhatewara } 630d1a890faSShreyas Bhatewara rq->uncommitted[ring_idx] += num_allocated; 631d1a890faSShreyas Bhatewara 632f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 633f6965582SRandy Dunlap "alloc_rx_buf: %d allocated, next2fill %u, next2comp " 634d1a890faSShreyas Bhatewara "%u, uncommited %u\n", num_allocated, ring->next2fill, 635d1a890faSShreyas Bhatewara ring->next2comp, rq->uncommitted[ring_idx]); 636d1a890faSShreyas Bhatewara 637d1a890faSShreyas Bhatewara /* so that the device can distinguish a full ring and an empty ring */ 638d1a890faSShreyas Bhatewara BUG_ON(num_allocated != 0 && ring->next2fill == ring->next2comp); 639d1a890faSShreyas Bhatewara 640d1a890faSShreyas Bhatewara return num_allocated; 641d1a890faSShreyas Bhatewara } 642d1a890faSShreyas Bhatewara 643d1a890faSShreyas Bhatewara 644d1a890faSShreyas Bhatewara static void 645d1a890faSShreyas Bhatewara vmxnet3_append_frag(struct sk_buff *skb, struct Vmxnet3_RxCompDesc *rcd, 646d1a890faSShreyas Bhatewara struct vmxnet3_rx_buf_info *rbi) 647d1a890faSShreyas Bhatewara { 648d1a890faSShreyas Bhatewara struct skb_frag_struct *frag = skb_shinfo(skb)->frags + 649d1a890faSShreyas Bhatewara skb_shinfo(skb)->nr_frags; 650d1a890faSShreyas Bhatewara 651d1a890faSShreyas Bhatewara BUG_ON(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS); 652d1a890faSShreyas Bhatewara 653d1a890faSShreyas Bhatewara frag->page = rbi->page; 654d1a890faSShreyas Bhatewara frag->page_offset = 0; 655d1a890faSShreyas Bhatewara frag->size = rcd->len; 656d1a890faSShreyas Bhatewara skb->data_len += frag->size; 657d1a890faSShreyas Bhatewara skb_shinfo(skb)->nr_frags++; 658d1a890faSShreyas Bhatewara } 659d1a890faSShreyas Bhatewara 660d1a890faSShreyas Bhatewara 661d1a890faSShreyas Bhatewara static void 662d1a890faSShreyas Bhatewara vmxnet3_map_pkt(struct sk_buff *skb, struct vmxnet3_tx_ctx *ctx, 663d1a890faSShreyas Bhatewara struct vmxnet3_tx_queue *tq, struct pci_dev *pdev, 664d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 665d1a890faSShreyas Bhatewara { 666d1a890faSShreyas Bhatewara u32 dw2, len; 667d1a890faSShreyas Bhatewara unsigned long buf_offset; 668d1a890faSShreyas Bhatewara int i; 669d1a890faSShreyas Bhatewara union Vmxnet3_GenericDesc *gdesc; 670d1a890faSShreyas Bhatewara struct vmxnet3_tx_buf_info *tbi = NULL; 671d1a890faSShreyas Bhatewara 672d1a890faSShreyas Bhatewara BUG_ON(ctx->copy_size > skb_headlen(skb)); 673d1a890faSShreyas Bhatewara 674d1a890faSShreyas Bhatewara /* use the previous gen bit for the SOP desc */ 675d1a890faSShreyas Bhatewara dw2 = (tq->tx_ring.gen ^ 0x1) << VMXNET3_TXD_GEN_SHIFT; 676d1a890faSShreyas Bhatewara 677d1a890faSShreyas Bhatewara ctx->sop_txd = tq->tx_ring.base + tq->tx_ring.next2fill; 678d1a890faSShreyas Bhatewara gdesc = ctx->sop_txd; /* both loops below can be skipped */ 679d1a890faSShreyas Bhatewara 680d1a890faSShreyas Bhatewara /* no need to map the buffer if headers are copied */ 681d1a890faSShreyas Bhatewara if (ctx->copy_size) { 682115924b6SShreyas Bhatewara ctx->sop_txd->txd.addr = cpu_to_le64(tq->data_ring.basePA + 683d1a890faSShreyas Bhatewara tq->tx_ring.next2fill * 684115924b6SShreyas Bhatewara sizeof(struct Vmxnet3_TxDataDesc)); 685115924b6SShreyas Bhatewara ctx->sop_txd->dword[2] = cpu_to_le32(dw2 | ctx->copy_size); 686d1a890faSShreyas Bhatewara ctx->sop_txd->dword[3] = 0; 687d1a890faSShreyas Bhatewara 688d1a890faSShreyas Bhatewara tbi = tq->buf_info + tq->tx_ring.next2fill; 689d1a890faSShreyas Bhatewara tbi->map_type = VMXNET3_MAP_NONE; 690d1a890faSShreyas Bhatewara 691f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 692f6965582SRandy Dunlap "txd[%u]: 0x%Lx 0x%x 0x%x\n", 693115924b6SShreyas Bhatewara tq->tx_ring.next2fill, 694115924b6SShreyas Bhatewara le64_to_cpu(ctx->sop_txd->txd.addr), 695d1a890faSShreyas Bhatewara ctx->sop_txd->dword[2], ctx->sop_txd->dword[3]); 696d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); 697d1a890faSShreyas Bhatewara 698d1a890faSShreyas Bhatewara /* use the right gen for non-SOP desc */ 699d1a890faSShreyas Bhatewara dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; 700d1a890faSShreyas Bhatewara } 701d1a890faSShreyas Bhatewara 702d1a890faSShreyas Bhatewara /* linear part can use multiple tx desc if it's big */ 703d1a890faSShreyas Bhatewara len = skb_headlen(skb) - ctx->copy_size; 704d1a890faSShreyas Bhatewara buf_offset = ctx->copy_size; 705d1a890faSShreyas Bhatewara while (len) { 706d1a890faSShreyas Bhatewara u32 buf_size; 707d1a890faSShreyas Bhatewara 7081f4b1612SBhavesh Davda if (len < VMXNET3_MAX_TX_BUF_SIZE) { 7091f4b1612SBhavesh Davda buf_size = len; 7101f4b1612SBhavesh Davda dw2 |= len; 7111f4b1612SBhavesh Davda } else { 7121f4b1612SBhavesh Davda buf_size = VMXNET3_MAX_TX_BUF_SIZE; 7131f4b1612SBhavesh Davda /* spec says that for TxDesc.len, 0 == 2^14 */ 7141f4b1612SBhavesh Davda } 715d1a890faSShreyas Bhatewara 716d1a890faSShreyas Bhatewara tbi = tq->buf_info + tq->tx_ring.next2fill; 717d1a890faSShreyas Bhatewara tbi->map_type = VMXNET3_MAP_SINGLE; 718d1a890faSShreyas Bhatewara tbi->dma_addr = pci_map_single(adapter->pdev, 719d1a890faSShreyas Bhatewara skb->data + buf_offset, buf_size, 720d1a890faSShreyas Bhatewara PCI_DMA_TODEVICE); 721d1a890faSShreyas Bhatewara 7221f4b1612SBhavesh Davda tbi->len = buf_size; 723d1a890faSShreyas Bhatewara 724d1a890faSShreyas Bhatewara gdesc = tq->tx_ring.base + tq->tx_ring.next2fill; 725d1a890faSShreyas Bhatewara BUG_ON(gdesc->txd.gen == tq->tx_ring.gen); 726d1a890faSShreyas Bhatewara 727115924b6SShreyas Bhatewara gdesc->txd.addr = cpu_to_le64(tbi->dma_addr); 7281f4b1612SBhavesh Davda gdesc->dword[2] = cpu_to_le32(dw2); 729d1a890faSShreyas Bhatewara gdesc->dword[3] = 0; 730d1a890faSShreyas Bhatewara 731f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 732f6965582SRandy Dunlap "txd[%u]: 0x%Lx 0x%x 0x%x\n", 733115924b6SShreyas Bhatewara tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr), 734115924b6SShreyas Bhatewara le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]); 735d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); 736d1a890faSShreyas Bhatewara dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; 737d1a890faSShreyas Bhatewara 738d1a890faSShreyas Bhatewara len -= buf_size; 739d1a890faSShreyas Bhatewara buf_offset += buf_size; 740d1a890faSShreyas Bhatewara } 741d1a890faSShreyas Bhatewara 742d1a890faSShreyas Bhatewara for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 743d1a890faSShreyas Bhatewara struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i]; 744d1a890faSShreyas Bhatewara 745d1a890faSShreyas Bhatewara tbi = tq->buf_info + tq->tx_ring.next2fill; 746d1a890faSShreyas Bhatewara tbi->map_type = VMXNET3_MAP_PAGE; 747d1a890faSShreyas Bhatewara tbi->dma_addr = pci_map_page(adapter->pdev, frag->page, 748d1a890faSShreyas Bhatewara frag->page_offset, frag->size, 749d1a890faSShreyas Bhatewara PCI_DMA_TODEVICE); 750d1a890faSShreyas Bhatewara 751d1a890faSShreyas Bhatewara tbi->len = frag->size; 752d1a890faSShreyas Bhatewara 753d1a890faSShreyas Bhatewara gdesc = tq->tx_ring.base + tq->tx_ring.next2fill; 754d1a890faSShreyas Bhatewara BUG_ON(gdesc->txd.gen == tq->tx_ring.gen); 755d1a890faSShreyas Bhatewara 756115924b6SShreyas Bhatewara gdesc->txd.addr = cpu_to_le64(tbi->dma_addr); 757115924b6SShreyas Bhatewara gdesc->dword[2] = cpu_to_le32(dw2 | frag->size); 758d1a890faSShreyas Bhatewara gdesc->dword[3] = 0; 759d1a890faSShreyas Bhatewara 760f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 761f6965582SRandy Dunlap "txd[%u]: 0x%llu %u %u\n", 762115924b6SShreyas Bhatewara tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr), 763115924b6SShreyas Bhatewara le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]); 764d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); 765d1a890faSShreyas Bhatewara dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; 766d1a890faSShreyas Bhatewara } 767d1a890faSShreyas Bhatewara 768d1a890faSShreyas Bhatewara ctx->eop_txd = gdesc; 769d1a890faSShreyas Bhatewara 770d1a890faSShreyas Bhatewara /* set the last buf_info for the pkt */ 771d1a890faSShreyas Bhatewara tbi->skb = skb; 772d1a890faSShreyas Bhatewara tbi->sop_idx = ctx->sop_txd - tq->tx_ring.base; 773d1a890faSShreyas Bhatewara } 774d1a890faSShreyas Bhatewara 775d1a890faSShreyas Bhatewara 77609c5088eSShreyas Bhatewara /* Init all tx queues */ 77709c5088eSShreyas Bhatewara static void 77809c5088eSShreyas Bhatewara vmxnet3_tq_init_all(struct vmxnet3_adapter *adapter) 77909c5088eSShreyas Bhatewara { 78009c5088eSShreyas Bhatewara int i; 78109c5088eSShreyas Bhatewara 78209c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 78309c5088eSShreyas Bhatewara vmxnet3_tq_init(&adapter->tx_queue[i], adapter); 78409c5088eSShreyas Bhatewara } 78509c5088eSShreyas Bhatewara 78609c5088eSShreyas Bhatewara 787d1a890faSShreyas Bhatewara /* 788d1a890faSShreyas Bhatewara * parse and copy relevant protocol headers: 789d1a890faSShreyas Bhatewara * For a tso pkt, relevant headers are L2/3/4 including options 790d1a890faSShreyas Bhatewara * For a pkt requesting csum offloading, they are L2/3 and may include L4 791d1a890faSShreyas Bhatewara * if it's a TCP/UDP pkt 792d1a890faSShreyas Bhatewara * 793d1a890faSShreyas Bhatewara * Returns: 794d1a890faSShreyas Bhatewara * -1: error happens during parsing 795d1a890faSShreyas Bhatewara * 0: protocol headers parsed, but too big to be copied 796d1a890faSShreyas Bhatewara * 1: protocol headers parsed and copied 797d1a890faSShreyas Bhatewara * 798d1a890faSShreyas Bhatewara * Other effects: 799d1a890faSShreyas Bhatewara * 1. related *ctx fields are updated. 800d1a890faSShreyas Bhatewara * 2. ctx->copy_size is # of bytes copied 801d1a890faSShreyas Bhatewara * 3. the portion copied is guaranteed to be in the linear part 802d1a890faSShreyas Bhatewara * 803d1a890faSShreyas Bhatewara */ 804d1a890faSShreyas Bhatewara static int 805d1a890faSShreyas Bhatewara vmxnet3_parse_and_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq, 806d1a890faSShreyas Bhatewara struct vmxnet3_tx_ctx *ctx, 807d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 808d1a890faSShreyas Bhatewara { 809d1a890faSShreyas Bhatewara struct Vmxnet3_TxDataDesc *tdd; 810d1a890faSShreyas Bhatewara 8110d0b1672SMichał Mirosław if (ctx->mss) { /* TSO */ 812d1a890faSShreyas Bhatewara ctx->eth_ip_hdr_size = skb_transport_offset(skb); 813d1a890faSShreyas Bhatewara ctx->l4_hdr_size = ((struct tcphdr *) 814d1a890faSShreyas Bhatewara skb_transport_header(skb))->doff * 4; 815d1a890faSShreyas Bhatewara ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size; 816d1a890faSShreyas Bhatewara } else { 817d1a890faSShreyas Bhatewara if (skb->ip_summed == CHECKSUM_PARTIAL) { 8180d0b1672SMichał Mirosław ctx->eth_ip_hdr_size = skb_checksum_start_offset(skb); 819d1a890faSShreyas Bhatewara 820d1a890faSShreyas Bhatewara if (ctx->ipv4) { 821d1a890faSShreyas Bhatewara struct iphdr *iph = (struct iphdr *) 822d1a890faSShreyas Bhatewara skb_network_header(skb); 82339d4a96fSShreyas Bhatewara if (iph->protocol == IPPROTO_TCP) 824d1a890faSShreyas Bhatewara ctx->l4_hdr_size = ((struct tcphdr *) 825d1a890faSShreyas Bhatewara skb_transport_header(skb))->doff * 4; 82639d4a96fSShreyas Bhatewara else if (iph->protocol == IPPROTO_UDP) 82739d4a96fSShreyas Bhatewara /* 82839d4a96fSShreyas Bhatewara * Use tcp header size so that bytes to 82939d4a96fSShreyas Bhatewara * be copied are more than required by 83039d4a96fSShreyas Bhatewara * the device. 83139d4a96fSShreyas Bhatewara */ 832d1a890faSShreyas Bhatewara ctx->l4_hdr_size = 83339d4a96fSShreyas Bhatewara sizeof(struct tcphdr); 83439d4a96fSShreyas Bhatewara else 835d1a890faSShreyas Bhatewara ctx->l4_hdr_size = 0; 836d1a890faSShreyas Bhatewara } else { 837d1a890faSShreyas Bhatewara /* for simplicity, don't copy L4 headers */ 838d1a890faSShreyas Bhatewara ctx->l4_hdr_size = 0; 839d1a890faSShreyas Bhatewara } 840d1a890faSShreyas Bhatewara ctx->copy_size = ctx->eth_ip_hdr_size + 841d1a890faSShreyas Bhatewara ctx->l4_hdr_size; 842d1a890faSShreyas Bhatewara } else { 843d1a890faSShreyas Bhatewara ctx->eth_ip_hdr_size = 0; 844d1a890faSShreyas Bhatewara ctx->l4_hdr_size = 0; 845d1a890faSShreyas Bhatewara /* copy as much as allowed */ 846d1a890faSShreyas Bhatewara ctx->copy_size = min((unsigned int)VMXNET3_HDR_COPY_SIZE 847d1a890faSShreyas Bhatewara , skb_headlen(skb)); 848d1a890faSShreyas Bhatewara } 849d1a890faSShreyas Bhatewara 850d1a890faSShreyas Bhatewara /* make sure headers are accessible directly */ 851d1a890faSShreyas Bhatewara if (unlikely(!pskb_may_pull(skb, ctx->copy_size))) 852d1a890faSShreyas Bhatewara goto err; 853d1a890faSShreyas Bhatewara } 854d1a890faSShreyas Bhatewara 855d1a890faSShreyas Bhatewara if (unlikely(ctx->copy_size > VMXNET3_HDR_COPY_SIZE)) { 856d1a890faSShreyas Bhatewara tq->stats.oversized_hdr++; 857d1a890faSShreyas Bhatewara ctx->copy_size = 0; 858d1a890faSShreyas Bhatewara return 0; 859d1a890faSShreyas Bhatewara } 860d1a890faSShreyas Bhatewara 861d1a890faSShreyas Bhatewara tdd = tq->data_ring.base + tq->tx_ring.next2fill; 862d1a890faSShreyas Bhatewara 863d1a890faSShreyas Bhatewara memcpy(tdd->data, skb->data, ctx->copy_size); 864f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 865f6965582SRandy Dunlap "copy %u bytes to dataRing[%u]\n", 866d1a890faSShreyas Bhatewara ctx->copy_size, tq->tx_ring.next2fill); 867d1a890faSShreyas Bhatewara return 1; 868d1a890faSShreyas Bhatewara 869d1a890faSShreyas Bhatewara err: 870d1a890faSShreyas Bhatewara return -1; 871d1a890faSShreyas Bhatewara } 872d1a890faSShreyas Bhatewara 873d1a890faSShreyas Bhatewara 874d1a890faSShreyas Bhatewara static void 875d1a890faSShreyas Bhatewara vmxnet3_prepare_tso(struct sk_buff *skb, 876d1a890faSShreyas Bhatewara struct vmxnet3_tx_ctx *ctx) 877d1a890faSShreyas Bhatewara { 878d1a890faSShreyas Bhatewara struct tcphdr *tcph = (struct tcphdr *)skb_transport_header(skb); 879d1a890faSShreyas Bhatewara if (ctx->ipv4) { 880d1a890faSShreyas Bhatewara struct iphdr *iph = (struct iphdr *)skb_network_header(skb); 881d1a890faSShreyas Bhatewara iph->check = 0; 882d1a890faSShreyas Bhatewara tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0, 883d1a890faSShreyas Bhatewara IPPROTO_TCP, 0); 884d1a890faSShreyas Bhatewara } else { 885d1a890faSShreyas Bhatewara struct ipv6hdr *iph = (struct ipv6hdr *)skb_network_header(skb); 886d1a890faSShreyas Bhatewara tcph->check = ~csum_ipv6_magic(&iph->saddr, &iph->daddr, 0, 887d1a890faSShreyas Bhatewara IPPROTO_TCP, 0); 888d1a890faSShreyas Bhatewara } 889d1a890faSShreyas Bhatewara } 890d1a890faSShreyas Bhatewara 891d1a890faSShreyas Bhatewara 892d1a890faSShreyas Bhatewara /* 893d1a890faSShreyas Bhatewara * Transmits a pkt thru a given tq 894d1a890faSShreyas Bhatewara * Returns: 895d1a890faSShreyas Bhatewara * NETDEV_TX_OK: descriptors are setup successfully 89625985edcSLucas De Marchi * NETDEV_TX_OK: error occurred, the pkt is dropped 897d1a890faSShreyas Bhatewara * NETDEV_TX_BUSY: tx ring is full, queue is stopped 898d1a890faSShreyas Bhatewara * 899d1a890faSShreyas Bhatewara * Side-effects: 900d1a890faSShreyas Bhatewara * 1. tx ring may be changed 901d1a890faSShreyas Bhatewara * 2. tq stats may be updated accordingly 902d1a890faSShreyas Bhatewara * 3. shared->txNumDeferred may be updated 903d1a890faSShreyas Bhatewara */ 904d1a890faSShreyas Bhatewara 905d1a890faSShreyas Bhatewara static int 906d1a890faSShreyas Bhatewara vmxnet3_tq_xmit(struct sk_buff *skb, struct vmxnet3_tx_queue *tq, 907d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter, struct net_device *netdev) 908d1a890faSShreyas Bhatewara { 909d1a890faSShreyas Bhatewara int ret; 910d1a890faSShreyas Bhatewara u32 count; 911d1a890faSShreyas Bhatewara unsigned long flags; 912d1a890faSShreyas Bhatewara struct vmxnet3_tx_ctx ctx; 913d1a890faSShreyas Bhatewara union Vmxnet3_GenericDesc *gdesc; 914115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 915115924b6SShreyas Bhatewara /* Use temporary descriptor to avoid touching bits multiple times */ 916115924b6SShreyas Bhatewara union Vmxnet3_GenericDesc tempTxDesc; 917115924b6SShreyas Bhatewara #endif 918d1a890faSShreyas Bhatewara 919d1a890faSShreyas Bhatewara /* conservatively estimate # of descriptors to use */ 920d1a890faSShreyas Bhatewara count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 921d1a890faSShreyas Bhatewara skb_shinfo(skb)->nr_frags + 1; 922d1a890faSShreyas Bhatewara 9231b803fbfSHarvey Harrison ctx.ipv4 = (skb->protocol == cpu_to_be16(ETH_P_IP)); 924d1a890faSShreyas Bhatewara 925d1a890faSShreyas Bhatewara ctx.mss = skb_shinfo(skb)->gso_size; 926d1a890faSShreyas Bhatewara if (ctx.mss) { 927d1a890faSShreyas Bhatewara if (skb_header_cloned(skb)) { 928d1a890faSShreyas Bhatewara if (unlikely(pskb_expand_head(skb, 0, 0, 929d1a890faSShreyas Bhatewara GFP_ATOMIC) != 0)) { 930d1a890faSShreyas Bhatewara tq->stats.drop_tso++; 931d1a890faSShreyas Bhatewara goto drop_pkt; 932d1a890faSShreyas Bhatewara } 933d1a890faSShreyas Bhatewara tq->stats.copy_skb_header++; 934d1a890faSShreyas Bhatewara } 935d1a890faSShreyas Bhatewara vmxnet3_prepare_tso(skb, &ctx); 936d1a890faSShreyas Bhatewara } else { 937d1a890faSShreyas Bhatewara if (unlikely(count > VMXNET3_MAX_TXD_PER_PKT)) { 938d1a890faSShreyas Bhatewara 939d1a890faSShreyas Bhatewara /* non-tso pkts must not use more than 940d1a890faSShreyas Bhatewara * VMXNET3_MAX_TXD_PER_PKT entries 941d1a890faSShreyas Bhatewara */ 942d1a890faSShreyas Bhatewara if (skb_linearize(skb) != 0) { 943d1a890faSShreyas Bhatewara tq->stats.drop_too_many_frags++; 944d1a890faSShreyas Bhatewara goto drop_pkt; 945d1a890faSShreyas Bhatewara } 946d1a890faSShreyas Bhatewara tq->stats.linearized++; 947d1a890faSShreyas Bhatewara 948d1a890faSShreyas Bhatewara /* recalculate the # of descriptors to use */ 949d1a890faSShreyas Bhatewara count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1; 950d1a890faSShreyas Bhatewara } 951d1a890faSShreyas Bhatewara } 952d1a890faSShreyas Bhatewara 95309c5088eSShreyas Bhatewara spin_lock_irqsave(&tq->tx_lock, flags); 95409c5088eSShreyas Bhatewara 95509c5088eSShreyas Bhatewara if (count > vmxnet3_cmd_ring_desc_avail(&tq->tx_ring)) { 95609c5088eSShreyas Bhatewara tq->stats.tx_ring_full++; 95709c5088eSShreyas Bhatewara dev_dbg(&adapter->netdev->dev, 95809c5088eSShreyas Bhatewara "tx queue stopped on %s, next2comp %u" 95909c5088eSShreyas Bhatewara " next2fill %u\n", adapter->netdev->name, 96009c5088eSShreyas Bhatewara tq->tx_ring.next2comp, tq->tx_ring.next2fill); 96109c5088eSShreyas Bhatewara 96209c5088eSShreyas Bhatewara vmxnet3_tq_stop(tq, adapter); 96309c5088eSShreyas Bhatewara spin_unlock_irqrestore(&tq->tx_lock, flags); 96409c5088eSShreyas Bhatewara return NETDEV_TX_BUSY; 96509c5088eSShreyas Bhatewara } 96609c5088eSShreyas Bhatewara 96709c5088eSShreyas Bhatewara 968d1a890faSShreyas Bhatewara ret = vmxnet3_parse_and_copy_hdr(skb, tq, &ctx, adapter); 969d1a890faSShreyas Bhatewara if (ret >= 0) { 970d1a890faSShreyas Bhatewara BUG_ON(ret <= 0 && ctx.copy_size != 0); 971d1a890faSShreyas Bhatewara /* hdrs parsed, check against other limits */ 972d1a890faSShreyas Bhatewara if (ctx.mss) { 973d1a890faSShreyas Bhatewara if (unlikely(ctx.eth_ip_hdr_size + ctx.l4_hdr_size > 974d1a890faSShreyas Bhatewara VMXNET3_MAX_TX_BUF_SIZE)) { 975d1a890faSShreyas Bhatewara goto hdr_too_big; 976d1a890faSShreyas Bhatewara } 977d1a890faSShreyas Bhatewara } else { 978d1a890faSShreyas Bhatewara if (skb->ip_summed == CHECKSUM_PARTIAL) { 979d1a890faSShreyas Bhatewara if (unlikely(ctx.eth_ip_hdr_size + 980d1a890faSShreyas Bhatewara skb->csum_offset > 981d1a890faSShreyas Bhatewara VMXNET3_MAX_CSUM_OFFSET)) { 982d1a890faSShreyas Bhatewara goto hdr_too_big; 983d1a890faSShreyas Bhatewara } 984d1a890faSShreyas Bhatewara } 985d1a890faSShreyas Bhatewara } 986d1a890faSShreyas Bhatewara } else { 987d1a890faSShreyas Bhatewara tq->stats.drop_hdr_inspect_err++; 988f955e141SDan Carpenter goto unlock_drop_pkt; 989d1a890faSShreyas Bhatewara } 990d1a890faSShreyas Bhatewara 991d1a890faSShreyas Bhatewara /* fill tx descs related to addr & len */ 992d1a890faSShreyas Bhatewara vmxnet3_map_pkt(skb, &ctx, tq, adapter->pdev, adapter); 993d1a890faSShreyas Bhatewara 994d1a890faSShreyas Bhatewara /* setup the EOP desc */ 995115924b6SShreyas Bhatewara ctx.eop_txd->dword[3] = cpu_to_le32(VMXNET3_TXD_CQ | VMXNET3_TXD_EOP); 996d1a890faSShreyas Bhatewara 997d1a890faSShreyas Bhatewara /* setup the SOP desc */ 998115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 999115924b6SShreyas Bhatewara gdesc = &tempTxDesc; 1000115924b6SShreyas Bhatewara gdesc->dword[2] = ctx.sop_txd->dword[2]; 1001115924b6SShreyas Bhatewara gdesc->dword[3] = ctx.sop_txd->dword[3]; 1002115924b6SShreyas Bhatewara #else 1003d1a890faSShreyas Bhatewara gdesc = ctx.sop_txd; 1004115924b6SShreyas Bhatewara #endif 1005d1a890faSShreyas Bhatewara if (ctx.mss) { 1006d1a890faSShreyas Bhatewara gdesc->txd.hlen = ctx.eth_ip_hdr_size + ctx.l4_hdr_size; 1007d1a890faSShreyas Bhatewara gdesc->txd.om = VMXNET3_OM_TSO; 1008d1a890faSShreyas Bhatewara gdesc->txd.msscof = ctx.mss; 1009115924b6SShreyas Bhatewara le32_add_cpu(&tq->shared->txNumDeferred, (skb->len - 1010115924b6SShreyas Bhatewara gdesc->txd.hlen + ctx.mss - 1) / ctx.mss); 1011d1a890faSShreyas Bhatewara } else { 1012d1a890faSShreyas Bhatewara if (skb->ip_summed == CHECKSUM_PARTIAL) { 1013d1a890faSShreyas Bhatewara gdesc->txd.hlen = ctx.eth_ip_hdr_size; 1014d1a890faSShreyas Bhatewara gdesc->txd.om = VMXNET3_OM_CSUM; 1015d1a890faSShreyas Bhatewara gdesc->txd.msscof = ctx.eth_ip_hdr_size + 1016d1a890faSShreyas Bhatewara skb->csum_offset; 1017d1a890faSShreyas Bhatewara } else { 1018d1a890faSShreyas Bhatewara gdesc->txd.om = 0; 1019d1a890faSShreyas Bhatewara gdesc->txd.msscof = 0; 1020d1a890faSShreyas Bhatewara } 1021115924b6SShreyas Bhatewara le32_add_cpu(&tq->shared->txNumDeferred, 1); 1022d1a890faSShreyas Bhatewara } 1023d1a890faSShreyas Bhatewara 1024d1a890faSShreyas Bhatewara if (vlan_tx_tag_present(skb)) { 1025d1a890faSShreyas Bhatewara gdesc->txd.ti = 1; 1026d1a890faSShreyas Bhatewara gdesc->txd.tci = vlan_tx_tag_get(skb); 1027d1a890faSShreyas Bhatewara } 1028d1a890faSShreyas Bhatewara 1029115924b6SShreyas Bhatewara /* finally flips the GEN bit of the SOP desc. */ 1030115924b6SShreyas Bhatewara gdesc->dword[2] = cpu_to_le32(le32_to_cpu(gdesc->dword[2]) ^ 1031115924b6SShreyas Bhatewara VMXNET3_TXD_GEN); 1032115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 1033115924b6SShreyas Bhatewara /* Finished updating in bitfields of Tx Desc, so write them in original 1034115924b6SShreyas Bhatewara * place. 1035115924b6SShreyas Bhatewara */ 1036115924b6SShreyas Bhatewara vmxnet3_TxDescToLe((struct Vmxnet3_TxDesc *)gdesc, 1037115924b6SShreyas Bhatewara (struct Vmxnet3_TxDesc *)ctx.sop_txd); 1038115924b6SShreyas Bhatewara gdesc = ctx.sop_txd; 1039115924b6SShreyas Bhatewara #endif 1040f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 1041f6965582SRandy Dunlap "txd[%u]: SOP 0x%Lx 0x%x 0x%x\n", 1042d1a890faSShreyas Bhatewara (u32)((union Vmxnet3_GenericDesc *)ctx.sop_txd - 1043115924b6SShreyas Bhatewara tq->tx_ring.base), le64_to_cpu(gdesc->txd.addr), 1044115924b6SShreyas Bhatewara le32_to_cpu(gdesc->dword[2]), le32_to_cpu(gdesc->dword[3])); 1045d1a890faSShreyas Bhatewara 1046d1a890faSShreyas Bhatewara spin_unlock_irqrestore(&tq->tx_lock, flags); 1047d1a890faSShreyas Bhatewara 1048115924b6SShreyas Bhatewara if (le32_to_cpu(tq->shared->txNumDeferred) >= 1049115924b6SShreyas Bhatewara le32_to_cpu(tq->shared->txThreshold)) { 1050d1a890faSShreyas Bhatewara tq->shared->txNumDeferred = 0; 105109c5088eSShreyas Bhatewara VMXNET3_WRITE_BAR0_REG(adapter, 105209c5088eSShreyas Bhatewara VMXNET3_REG_TXPROD + tq->qid * 8, 1053d1a890faSShreyas Bhatewara tq->tx_ring.next2fill); 1054d1a890faSShreyas Bhatewara } 1055d1a890faSShreyas Bhatewara 1056d1a890faSShreyas Bhatewara return NETDEV_TX_OK; 1057d1a890faSShreyas Bhatewara 1058d1a890faSShreyas Bhatewara hdr_too_big: 1059d1a890faSShreyas Bhatewara tq->stats.drop_oversized_hdr++; 1060f955e141SDan Carpenter unlock_drop_pkt: 1061f955e141SDan Carpenter spin_unlock_irqrestore(&tq->tx_lock, flags); 1062d1a890faSShreyas Bhatewara drop_pkt: 1063d1a890faSShreyas Bhatewara tq->stats.drop_total++; 1064d1a890faSShreyas Bhatewara dev_kfree_skb(skb); 1065d1a890faSShreyas Bhatewara return NETDEV_TX_OK; 1066d1a890faSShreyas Bhatewara } 1067d1a890faSShreyas Bhatewara 1068d1a890faSShreyas Bhatewara 1069d1a890faSShreyas Bhatewara static netdev_tx_t 1070d1a890faSShreyas Bhatewara vmxnet3_xmit_frame(struct sk_buff *skb, struct net_device *netdev) 1071d1a890faSShreyas Bhatewara { 1072d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1073d1a890faSShreyas Bhatewara 107409c5088eSShreyas Bhatewara BUG_ON(skb->queue_mapping > adapter->num_tx_queues); 107509c5088eSShreyas Bhatewara return vmxnet3_tq_xmit(skb, 107609c5088eSShreyas Bhatewara &adapter->tx_queue[skb->queue_mapping], 107709c5088eSShreyas Bhatewara adapter, netdev); 1078d1a890faSShreyas Bhatewara } 1079d1a890faSShreyas Bhatewara 1080d1a890faSShreyas Bhatewara 1081d1a890faSShreyas Bhatewara static void 1082d1a890faSShreyas Bhatewara vmxnet3_rx_csum(struct vmxnet3_adapter *adapter, 1083d1a890faSShreyas Bhatewara struct sk_buff *skb, 1084d1a890faSShreyas Bhatewara union Vmxnet3_GenericDesc *gdesc) 1085d1a890faSShreyas Bhatewara { 1086a0d2730cSMichał Mirosław if (!gdesc->rcd.cnc && adapter->netdev->features & NETIF_F_RXCSUM) { 1087d1a890faSShreyas Bhatewara /* typical case: TCP/UDP over IP and both csums are correct */ 1088115924b6SShreyas Bhatewara if ((le32_to_cpu(gdesc->dword[3]) & VMXNET3_RCD_CSUM_OK) == 1089d1a890faSShreyas Bhatewara VMXNET3_RCD_CSUM_OK) { 1090d1a890faSShreyas Bhatewara skb->ip_summed = CHECKSUM_UNNECESSARY; 1091d1a890faSShreyas Bhatewara BUG_ON(!(gdesc->rcd.tcp || gdesc->rcd.udp)); 1092d1a890faSShreyas Bhatewara BUG_ON(!(gdesc->rcd.v4 || gdesc->rcd.v6)); 1093d1a890faSShreyas Bhatewara BUG_ON(gdesc->rcd.frg); 1094d1a890faSShreyas Bhatewara } else { 1095d1a890faSShreyas Bhatewara if (gdesc->rcd.csum) { 1096d1a890faSShreyas Bhatewara skb->csum = htons(gdesc->rcd.csum); 1097d1a890faSShreyas Bhatewara skb->ip_summed = CHECKSUM_PARTIAL; 1098d1a890faSShreyas Bhatewara } else { 1099bc8acf2cSEric Dumazet skb_checksum_none_assert(skb); 1100d1a890faSShreyas Bhatewara } 1101d1a890faSShreyas Bhatewara } 1102d1a890faSShreyas Bhatewara } else { 1103bc8acf2cSEric Dumazet skb_checksum_none_assert(skb); 1104d1a890faSShreyas Bhatewara } 1105d1a890faSShreyas Bhatewara } 1106d1a890faSShreyas Bhatewara 1107d1a890faSShreyas Bhatewara 1108d1a890faSShreyas Bhatewara static void 1109d1a890faSShreyas Bhatewara vmxnet3_rx_error(struct vmxnet3_rx_queue *rq, struct Vmxnet3_RxCompDesc *rcd, 1110d1a890faSShreyas Bhatewara struct vmxnet3_rx_ctx *ctx, struct vmxnet3_adapter *adapter) 1111d1a890faSShreyas Bhatewara { 1112d1a890faSShreyas Bhatewara rq->stats.drop_err++; 1113d1a890faSShreyas Bhatewara if (!rcd->fcs) 1114d1a890faSShreyas Bhatewara rq->stats.drop_fcs++; 1115d1a890faSShreyas Bhatewara 1116d1a890faSShreyas Bhatewara rq->stats.drop_total++; 1117d1a890faSShreyas Bhatewara 1118d1a890faSShreyas Bhatewara /* 1119d1a890faSShreyas Bhatewara * We do not unmap and chain the rx buffer to the skb. 1120d1a890faSShreyas Bhatewara * We basically pretend this buffer is not used and will be recycled 1121d1a890faSShreyas Bhatewara * by vmxnet3_rq_alloc_rx_buf() 1122d1a890faSShreyas Bhatewara */ 1123d1a890faSShreyas Bhatewara 1124d1a890faSShreyas Bhatewara /* 1125d1a890faSShreyas Bhatewara * ctx->skb may be NULL if this is the first and the only one 1126d1a890faSShreyas Bhatewara * desc for the pkt 1127d1a890faSShreyas Bhatewara */ 1128d1a890faSShreyas Bhatewara if (ctx->skb) 1129d1a890faSShreyas Bhatewara dev_kfree_skb_irq(ctx->skb); 1130d1a890faSShreyas Bhatewara 1131d1a890faSShreyas Bhatewara ctx->skb = NULL; 1132d1a890faSShreyas Bhatewara } 1133d1a890faSShreyas Bhatewara 1134d1a890faSShreyas Bhatewara 1135d1a890faSShreyas Bhatewara static int 1136d1a890faSShreyas Bhatewara vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq, 1137d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter, int quota) 1138d1a890faSShreyas Bhatewara { 1139215faf9cSJoe Perches static const u32 rxprod_reg[2] = { 1140215faf9cSJoe Perches VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2 1141215faf9cSJoe Perches }; 1142d1a890faSShreyas Bhatewara u32 num_rxd = 0; 1143d1a890faSShreyas Bhatewara struct Vmxnet3_RxCompDesc *rcd; 1144d1a890faSShreyas Bhatewara struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx; 1145115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 1146115924b6SShreyas Bhatewara struct Vmxnet3_RxDesc rxCmdDesc; 1147115924b6SShreyas Bhatewara struct Vmxnet3_RxCompDesc rxComp; 1148115924b6SShreyas Bhatewara #endif 1149115924b6SShreyas Bhatewara vmxnet3_getRxComp(rcd, &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, 1150115924b6SShreyas Bhatewara &rxComp); 1151d1a890faSShreyas Bhatewara while (rcd->gen == rq->comp_ring.gen) { 1152d1a890faSShreyas Bhatewara struct vmxnet3_rx_buf_info *rbi; 1153d1a890faSShreyas Bhatewara struct sk_buff *skb; 1154d1a890faSShreyas Bhatewara int num_to_alloc; 1155d1a890faSShreyas Bhatewara struct Vmxnet3_RxDesc *rxd; 1156d1a890faSShreyas Bhatewara u32 idx, ring_idx; 1157d1a890faSShreyas Bhatewara 1158d1a890faSShreyas Bhatewara if (num_rxd >= quota) { 1159d1a890faSShreyas Bhatewara /* we may stop even before we see the EOP desc of 1160d1a890faSShreyas Bhatewara * the current pkt 1161d1a890faSShreyas Bhatewara */ 1162d1a890faSShreyas Bhatewara break; 1163d1a890faSShreyas Bhatewara } 1164d1a890faSShreyas Bhatewara num_rxd++; 116509c5088eSShreyas Bhatewara BUG_ON(rcd->rqID != rq->qid && rcd->rqID != rq->qid2); 1166d1a890faSShreyas Bhatewara idx = rcd->rxdIdx; 116709c5088eSShreyas Bhatewara ring_idx = rcd->rqID < adapter->num_rx_queues ? 0 : 1; 1168115924b6SShreyas Bhatewara vmxnet3_getRxDesc(rxd, &rq->rx_ring[ring_idx].base[idx].rxd, 1169115924b6SShreyas Bhatewara &rxCmdDesc); 1170d1a890faSShreyas Bhatewara rbi = rq->buf_info[ring_idx] + idx; 1171d1a890faSShreyas Bhatewara 1172115924b6SShreyas Bhatewara BUG_ON(rxd->addr != rbi->dma_addr || 1173115924b6SShreyas Bhatewara rxd->len != rbi->len); 1174d1a890faSShreyas Bhatewara 1175d1a890faSShreyas Bhatewara if (unlikely(rcd->eop && rcd->err)) { 1176d1a890faSShreyas Bhatewara vmxnet3_rx_error(rq, rcd, ctx, adapter); 1177d1a890faSShreyas Bhatewara goto rcd_done; 1178d1a890faSShreyas Bhatewara } 1179d1a890faSShreyas Bhatewara 1180d1a890faSShreyas Bhatewara if (rcd->sop) { /* first buf of the pkt */ 1181d1a890faSShreyas Bhatewara BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_HEAD || 1182d1a890faSShreyas Bhatewara rcd->rqID != rq->qid); 1183d1a890faSShreyas Bhatewara 1184d1a890faSShreyas Bhatewara BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_SKB); 1185d1a890faSShreyas Bhatewara BUG_ON(ctx->skb != NULL || rbi->skb == NULL); 1186d1a890faSShreyas Bhatewara 1187d1a890faSShreyas Bhatewara if (unlikely(rcd->len == 0)) { 1188d1a890faSShreyas Bhatewara /* Pretend the rx buffer is skipped. */ 1189d1a890faSShreyas Bhatewara BUG_ON(!(rcd->sop && rcd->eop)); 1190f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 1191f6965582SRandy Dunlap "rxRing[%u][%u] 0 length\n", 1192d1a890faSShreyas Bhatewara ring_idx, idx); 1193d1a890faSShreyas Bhatewara goto rcd_done; 1194d1a890faSShreyas Bhatewara } 1195d1a890faSShreyas Bhatewara 1196d1a890faSShreyas Bhatewara ctx->skb = rbi->skb; 1197d1a890faSShreyas Bhatewara rbi->skb = NULL; 1198d1a890faSShreyas Bhatewara 1199d1a890faSShreyas Bhatewara pci_unmap_single(adapter->pdev, rbi->dma_addr, rbi->len, 1200d1a890faSShreyas Bhatewara PCI_DMA_FROMDEVICE); 1201d1a890faSShreyas Bhatewara 1202d1a890faSShreyas Bhatewara skb_put(ctx->skb, rcd->len); 1203d1a890faSShreyas Bhatewara } else { 1204d1a890faSShreyas Bhatewara BUG_ON(ctx->skb == NULL); 1205d1a890faSShreyas Bhatewara /* non SOP buffer must be type 1 in most cases */ 1206d1a890faSShreyas Bhatewara if (rbi->buf_type == VMXNET3_RX_BUF_PAGE) { 1207d1a890faSShreyas Bhatewara BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_BODY); 1208d1a890faSShreyas Bhatewara 1209d1a890faSShreyas Bhatewara if (rcd->len) { 1210d1a890faSShreyas Bhatewara pci_unmap_page(adapter->pdev, 1211d1a890faSShreyas Bhatewara rbi->dma_addr, rbi->len, 1212d1a890faSShreyas Bhatewara PCI_DMA_FROMDEVICE); 1213d1a890faSShreyas Bhatewara 1214d1a890faSShreyas Bhatewara vmxnet3_append_frag(ctx->skb, rcd, rbi); 1215d1a890faSShreyas Bhatewara rbi->page = NULL; 1216d1a890faSShreyas Bhatewara } 1217d1a890faSShreyas Bhatewara } else { 1218d1a890faSShreyas Bhatewara /* 1219d1a890faSShreyas Bhatewara * The only time a non-SOP buffer is type 0 is 1220d1a890faSShreyas Bhatewara * when it's EOP and error flag is raised, which 1221d1a890faSShreyas Bhatewara * has already been handled. 1222d1a890faSShreyas Bhatewara */ 1223d1a890faSShreyas Bhatewara BUG_ON(true); 1224d1a890faSShreyas Bhatewara } 1225d1a890faSShreyas Bhatewara } 1226d1a890faSShreyas Bhatewara 1227d1a890faSShreyas Bhatewara skb = ctx->skb; 1228d1a890faSShreyas Bhatewara if (rcd->eop) { 1229d1a890faSShreyas Bhatewara skb->len += skb->data_len; 1230d1a890faSShreyas Bhatewara skb->truesize += skb->data_len; 1231d1a890faSShreyas Bhatewara 1232d1a890faSShreyas Bhatewara vmxnet3_rx_csum(adapter, skb, 1233d1a890faSShreyas Bhatewara (union Vmxnet3_GenericDesc *)rcd); 1234d1a890faSShreyas Bhatewara skb->protocol = eth_type_trans(skb, adapter->netdev); 1235d1a890faSShreyas Bhatewara 1236d1a890faSShreyas Bhatewara if (unlikely(adapter->vlan_grp && rcd->ts)) { 1237d1a890faSShreyas Bhatewara vlan_hwaccel_receive_skb(skb, 1238d1a890faSShreyas Bhatewara adapter->vlan_grp, rcd->tci); 1239d1a890faSShreyas Bhatewara } else { 1240d1a890faSShreyas Bhatewara netif_receive_skb(skb); 1241d1a890faSShreyas Bhatewara } 1242d1a890faSShreyas Bhatewara 1243d1a890faSShreyas Bhatewara ctx->skb = NULL; 1244d1a890faSShreyas Bhatewara } 1245d1a890faSShreyas Bhatewara 1246d1a890faSShreyas Bhatewara rcd_done: 1247d1a890faSShreyas Bhatewara /* device may skip some rx descs */ 1248d1a890faSShreyas Bhatewara rq->rx_ring[ring_idx].next2comp = idx; 1249d1a890faSShreyas Bhatewara VMXNET3_INC_RING_IDX_ONLY(rq->rx_ring[ring_idx].next2comp, 1250d1a890faSShreyas Bhatewara rq->rx_ring[ring_idx].size); 1251d1a890faSShreyas Bhatewara 1252d1a890faSShreyas Bhatewara /* refill rx buffers frequently to avoid starving the h/w */ 1253d1a890faSShreyas Bhatewara num_to_alloc = vmxnet3_cmd_ring_desc_avail(rq->rx_ring + 1254d1a890faSShreyas Bhatewara ring_idx); 1255d1a890faSShreyas Bhatewara if (unlikely(num_to_alloc > VMXNET3_RX_ALLOC_THRESHOLD(rq, 1256d1a890faSShreyas Bhatewara ring_idx, adapter))) { 1257d1a890faSShreyas Bhatewara vmxnet3_rq_alloc_rx_buf(rq, ring_idx, num_to_alloc, 1258d1a890faSShreyas Bhatewara adapter); 1259d1a890faSShreyas Bhatewara 1260d1a890faSShreyas Bhatewara /* if needed, update the register */ 1261d1a890faSShreyas Bhatewara if (unlikely(rq->shared->updateRxProd)) { 1262d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR0_REG(adapter, 1263d1a890faSShreyas Bhatewara rxprod_reg[ring_idx] + rq->qid * 8, 1264d1a890faSShreyas Bhatewara rq->rx_ring[ring_idx].next2fill); 1265d1a890faSShreyas Bhatewara rq->uncommitted[ring_idx] = 0; 1266d1a890faSShreyas Bhatewara } 1267d1a890faSShreyas Bhatewara } 1268d1a890faSShreyas Bhatewara 1269d1a890faSShreyas Bhatewara vmxnet3_comp_ring_adv_next2proc(&rq->comp_ring); 1270115924b6SShreyas Bhatewara vmxnet3_getRxComp(rcd, 1271115924b6SShreyas Bhatewara &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, &rxComp); 1272d1a890faSShreyas Bhatewara } 1273d1a890faSShreyas Bhatewara 1274d1a890faSShreyas Bhatewara return num_rxd; 1275d1a890faSShreyas Bhatewara } 1276d1a890faSShreyas Bhatewara 1277d1a890faSShreyas Bhatewara 1278d1a890faSShreyas Bhatewara static void 1279d1a890faSShreyas Bhatewara vmxnet3_rq_cleanup(struct vmxnet3_rx_queue *rq, 1280d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 1281d1a890faSShreyas Bhatewara { 1282d1a890faSShreyas Bhatewara u32 i, ring_idx; 1283d1a890faSShreyas Bhatewara struct Vmxnet3_RxDesc *rxd; 1284d1a890faSShreyas Bhatewara 1285d1a890faSShreyas Bhatewara for (ring_idx = 0; ring_idx < 2; ring_idx++) { 1286d1a890faSShreyas Bhatewara for (i = 0; i < rq->rx_ring[ring_idx].size; i++) { 1287115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 1288115924b6SShreyas Bhatewara struct Vmxnet3_RxDesc rxDesc; 1289115924b6SShreyas Bhatewara #endif 1290115924b6SShreyas Bhatewara vmxnet3_getRxDesc(rxd, 1291115924b6SShreyas Bhatewara &rq->rx_ring[ring_idx].base[i].rxd, &rxDesc); 1292d1a890faSShreyas Bhatewara 1293d1a890faSShreyas Bhatewara if (rxd->btype == VMXNET3_RXD_BTYPE_HEAD && 1294d1a890faSShreyas Bhatewara rq->buf_info[ring_idx][i].skb) { 1295d1a890faSShreyas Bhatewara pci_unmap_single(adapter->pdev, rxd->addr, 1296d1a890faSShreyas Bhatewara rxd->len, PCI_DMA_FROMDEVICE); 1297d1a890faSShreyas Bhatewara dev_kfree_skb(rq->buf_info[ring_idx][i].skb); 1298d1a890faSShreyas Bhatewara rq->buf_info[ring_idx][i].skb = NULL; 1299d1a890faSShreyas Bhatewara } else if (rxd->btype == VMXNET3_RXD_BTYPE_BODY && 1300d1a890faSShreyas Bhatewara rq->buf_info[ring_idx][i].page) { 1301d1a890faSShreyas Bhatewara pci_unmap_page(adapter->pdev, rxd->addr, 1302d1a890faSShreyas Bhatewara rxd->len, PCI_DMA_FROMDEVICE); 1303d1a890faSShreyas Bhatewara put_page(rq->buf_info[ring_idx][i].page); 1304d1a890faSShreyas Bhatewara rq->buf_info[ring_idx][i].page = NULL; 1305d1a890faSShreyas Bhatewara } 1306d1a890faSShreyas Bhatewara } 1307d1a890faSShreyas Bhatewara 1308d1a890faSShreyas Bhatewara rq->rx_ring[ring_idx].gen = VMXNET3_INIT_GEN; 1309d1a890faSShreyas Bhatewara rq->rx_ring[ring_idx].next2fill = 1310d1a890faSShreyas Bhatewara rq->rx_ring[ring_idx].next2comp = 0; 1311d1a890faSShreyas Bhatewara rq->uncommitted[ring_idx] = 0; 1312d1a890faSShreyas Bhatewara } 1313d1a890faSShreyas Bhatewara 1314d1a890faSShreyas Bhatewara rq->comp_ring.gen = VMXNET3_INIT_GEN; 1315d1a890faSShreyas Bhatewara rq->comp_ring.next2proc = 0; 1316d1a890faSShreyas Bhatewara } 1317d1a890faSShreyas Bhatewara 1318d1a890faSShreyas Bhatewara 131909c5088eSShreyas Bhatewara static void 132009c5088eSShreyas Bhatewara vmxnet3_rq_cleanup_all(struct vmxnet3_adapter *adapter) 132109c5088eSShreyas Bhatewara { 132209c5088eSShreyas Bhatewara int i; 132309c5088eSShreyas Bhatewara 132409c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 132509c5088eSShreyas Bhatewara vmxnet3_rq_cleanup(&adapter->rx_queue[i], adapter); 132609c5088eSShreyas Bhatewara } 132709c5088eSShreyas Bhatewara 132809c5088eSShreyas Bhatewara 1329d1a890faSShreyas Bhatewara void vmxnet3_rq_destroy(struct vmxnet3_rx_queue *rq, 1330d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 1331d1a890faSShreyas Bhatewara { 1332d1a890faSShreyas Bhatewara int i; 1333d1a890faSShreyas Bhatewara int j; 1334d1a890faSShreyas Bhatewara 1335d1a890faSShreyas Bhatewara /* all rx buffers must have already been freed */ 1336d1a890faSShreyas Bhatewara for (i = 0; i < 2; i++) { 1337d1a890faSShreyas Bhatewara if (rq->buf_info[i]) { 1338d1a890faSShreyas Bhatewara for (j = 0; j < rq->rx_ring[i].size; j++) 1339d1a890faSShreyas Bhatewara BUG_ON(rq->buf_info[i][j].page != NULL); 1340d1a890faSShreyas Bhatewara } 1341d1a890faSShreyas Bhatewara } 1342d1a890faSShreyas Bhatewara 1343d1a890faSShreyas Bhatewara 1344d1a890faSShreyas Bhatewara kfree(rq->buf_info[0]); 1345d1a890faSShreyas Bhatewara 1346d1a890faSShreyas Bhatewara for (i = 0; i < 2; i++) { 1347d1a890faSShreyas Bhatewara if (rq->rx_ring[i].base) { 1348d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, rq->rx_ring[i].size 1349d1a890faSShreyas Bhatewara * sizeof(struct Vmxnet3_RxDesc), 1350d1a890faSShreyas Bhatewara rq->rx_ring[i].base, 1351d1a890faSShreyas Bhatewara rq->rx_ring[i].basePA); 1352d1a890faSShreyas Bhatewara rq->rx_ring[i].base = NULL; 1353d1a890faSShreyas Bhatewara } 1354d1a890faSShreyas Bhatewara rq->buf_info[i] = NULL; 1355d1a890faSShreyas Bhatewara } 1356d1a890faSShreyas Bhatewara 1357d1a890faSShreyas Bhatewara if (rq->comp_ring.base) { 1358d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, rq->comp_ring.size * 1359d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_RxCompDesc), 1360d1a890faSShreyas Bhatewara rq->comp_ring.base, rq->comp_ring.basePA); 1361d1a890faSShreyas Bhatewara rq->comp_ring.base = NULL; 1362d1a890faSShreyas Bhatewara } 1363d1a890faSShreyas Bhatewara } 1364d1a890faSShreyas Bhatewara 1365d1a890faSShreyas Bhatewara 1366d1a890faSShreyas Bhatewara static int 1367d1a890faSShreyas Bhatewara vmxnet3_rq_init(struct vmxnet3_rx_queue *rq, 1368d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 1369d1a890faSShreyas Bhatewara { 1370d1a890faSShreyas Bhatewara int i; 1371d1a890faSShreyas Bhatewara 1372d1a890faSShreyas Bhatewara /* initialize buf_info */ 1373d1a890faSShreyas Bhatewara for (i = 0; i < rq->rx_ring[0].size; i++) { 1374d1a890faSShreyas Bhatewara 1375d1a890faSShreyas Bhatewara /* 1st buf for a pkt is skbuff */ 1376d1a890faSShreyas Bhatewara if (i % adapter->rx_buf_per_pkt == 0) { 1377d1a890faSShreyas Bhatewara rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_SKB; 1378d1a890faSShreyas Bhatewara rq->buf_info[0][i].len = adapter->skb_buf_size; 1379d1a890faSShreyas Bhatewara } else { /* subsequent bufs for a pkt is frag */ 1380d1a890faSShreyas Bhatewara rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_PAGE; 1381d1a890faSShreyas Bhatewara rq->buf_info[0][i].len = PAGE_SIZE; 1382d1a890faSShreyas Bhatewara } 1383d1a890faSShreyas Bhatewara } 1384d1a890faSShreyas Bhatewara for (i = 0; i < rq->rx_ring[1].size; i++) { 1385d1a890faSShreyas Bhatewara rq->buf_info[1][i].buf_type = VMXNET3_RX_BUF_PAGE; 1386d1a890faSShreyas Bhatewara rq->buf_info[1][i].len = PAGE_SIZE; 1387d1a890faSShreyas Bhatewara } 1388d1a890faSShreyas Bhatewara 1389d1a890faSShreyas Bhatewara /* reset internal state and allocate buffers for both rings */ 1390d1a890faSShreyas Bhatewara for (i = 0; i < 2; i++) { 1391d1a890faSShreyas Bhatewara rq->rx_ring[i].next2fill = rq->rx_ring[i].next2comp = 0; 1392d1a890faSShreyas Bhatewara rq->uncommitted[i] = 0; 1393d1a890faSShreyas Bhatewara 1394d1a890faSShreyas Bhatewara memset(rq->rx_ring[i].base, 0, rq->rx_ring[i].size * 1395d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_RxDesc)); 1396d1a890faSShreyas Bhatewara rq->rx_ring[i].gen = VMXNET3_INIT_GEN; 1397d1a890faSShreyas Bhatewara } 1398d1a890faSShreyas Bhatewara if (vmxnet3_rq_alloc_rx_buf(rq, 0, rq->rx_ring[0].size - 1, 1399d1a890faSShreyas Bhatewara adapter) == 0) { 1400d1a890faSShreyas Bhatewara /* at least has 1 rx buffer for the 1st ring */ 1401d1a890faSShreyas Bhatewara return -ENOMEM; 1402d1a890faSShreyas Bhatewara } 1403d1a890faSShreyas Bhatewara vmxnet3_rq_alloc_rx_buf(rq, 1, rq->rx_ring[1].size - 1, adapter); 1404d1a890faSShreyas Bhatewara 1405d1a890faSShreyas Bhatewara /* reset the comp ring */ 1406d1a890faSShreyas Bhatewara rq->comp_ring.next2proc = 0; 1407d1a890faSShreyas Bhatewara memset(rq->comp_ring.base, 0, rq->comp_ring.size * 1408d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_RxCompDesc)); 1409d1a890faSShreyas Bhatewara rq->comp_ring.gen = VMXNET3_INIT_GEN; 1410d1a890faSShreyas Bhatewara 1411d1a890faSShreyas Bhatewara /* reset rxctx */ 1412d1a890faSShreyas Bhatewara rq->rx_ctx.skb = NULL; 1413d1a890faSShreyas Bhatewara 1414d1a890faSShreyas Bhatewara /* stats are not reset */ 1415d1a890faSShreyas Bhatewara return 0; 1416d1a890faSShreyas Bhatewara } 1417d1a890faSShreyas Bhatewara 1418d1a890faSShreyas Bhatewara 1419d1a890faSShreyas Bhatewara static int 142009c5088eSShreyas Bhatewara vmxnet3_rq_init_all(struct vmxnet3_adapter *adapter) 142109c5088eSShreyas Bhatewara { 142209c5088eSShreyas Bhatewara int i, err = 0; 142309c5088eSShreyas Bhatewara 142409c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 142509c5088eSShreyas Bhatewara err = vmxnet3_rq_init(&adapter->rx_queue[i], adapter); 142609c5088eSShreyas Bhatewara if (unlikely(err)) { 142709c5088eSShreyas Bhatewara dev_err(&adapter->netdev->dev, "%s: failed to " 142809c5088eSShreyas Bhatewara "initialize rx queue%i\n", 142909c5088eSShreyas Bhatewara adapter->netdev->name, i); 143009c5088eSShreyas Bhatewara break; 143109c5088eSShreyas Bhatewara } 143209c5088eSShreyas Bhatewara } 143309c5088eSShreyas Bhatewara return err; 143409c5088eSShreyas Bhatewara 143509c5088eSShreyas Bhatewara } 143609c5088eSShreyas Bhatewara 143709c5088eSShreyas Bhatewara 143809c5088eSShreyas Bhatewara static int 1439d1a890faSShreyas Bhatewara vmxnet3_rq_create(struct vmxnet3_rx_queue *rq, struct vmxnet3_adapter *adapter) 1440d1a890faSShreyas Bhatewara { 1441d1a890faSShreyas Bhatewara int i; 1442d1a890faSShreyas Bhatewara size_t sz; 1443d1a890faSShreyas Bhatewara struct vmxnet3_rx_buf_info *bi; 1444d1a890faSShreyas Bhatewara 1445d1a890faSShreyas Bhatewara for (i = 0; i < 2; i++) { 1446d1a890faSShreyas Bhatewara 1447d1a890faSShreyas Bhatewara sz = rq->rx_ring[i].size * sizeof(struct Vmxnet3_RxDesc); 1448d1a890faSShreyas Bhatewara rq->rx_ring[i].base = pci_alloc_consistent(adapter->pdev, sz, 1449d1a890faSShreyas Bhatewara &rq->rx_ring[i].basePA); 1450d1a890faSShreyas Bhatewara if (!rq->rx_ring[i].base) { 1451d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate rx ring %d\n", 1452d1a890faSShreyas Bhatewara adapter->netdev->name, i); 1453d1a890faSShreyas Bhatewara goto err; 1454d1a890faSShreyas Bhatewara } 1455d1a890faSShreyas Bhatewara } 1456d1a890faSShreyas Bhatewara 1457d1a890faSShreyas Bhatewara sz = rq->comp_ring.size * sizeof(struct Vmxnet3_RxCompDesc); 1458d1a890faSShreyas Bhatewara rq->comp_ring.base = pci_alloc_consistent(adapter->pdev, sz, 1459d1a890faSShreyas Bhatewara &rq->comp_ring.basePA); 1460d1a890faSShreyas Bhatewara if (!rq->comp_ring.base) { 1461d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate rx comp ring\n", 1462d1a890faSShreyas Bhatewara adapter->netdev->name); 1463d1a890faSShreyas Bhatewara goto err; 1464d1a890faSShreyas Bhatewara } 1465d1a890faSShreyas Bhatewara 1466d1a890faSShreyas Bhatewara sz = sizeof(struct vmxnet3_rx_buf_info) * (rq->rx_ring[0].size + 1467d1a890faSShreyas Bhatewara rq->rx_ring[1].size); 1468476c609eSJulia Lawall bi = kzalloc(sz, GFP_KERNEL); 1469d1a890faSShreyas Bhatewara if (!bi) { 1470d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate rx bufinfo\n", 1471d1a890faSShreyas Bhatewara adapter->netdev->name); 1472d1a890faSShreyas Bhatewara goto err; 1473d1a890faSShreyas Bhatewara } 1474d1a890faSShreyas Bhatewara rq->buf_info[0] = bi; 1475d1a890faSShreyas Bhatewara rq->buf_info[1] = bi + rq->rx_ring[0].size; 1476d1a890faSShreyas Bhatewara 1477d1a890faSShreyas Bhatewara return 0; 1478d1a890faSShreyas Bhatewara 1479d1a890faSShreyas Bhatewara err: 1480d1a890faSShreyas Bhatewara vmxnet3_rq_destroy(rq, adapter); 1481d1a890faSShreyas Bhatewara return -ENOMEM; 1482d1a890faSShreyas Bhatewara } 1483d1a890faSShreyas Bhatewara 1484d1a890faSShreyas Bhatewara 1485d1a890faSShreyas Bhatewara static int 148609c5088eSShreyas Bhatewara vmxnet3_rq_create_all(struct vmxnet3_adapter *adapter) 148709c5088eSShreyas Bhatewara { 148809c5088eSShreyas Bhatewara int i, err = 0; 148909c5088eSShreyas Bhatewara 149009c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 149109c5088eSShreyas Bhatewara err = vmxnet3_rq_create(&adapter->rx_queue[i], adapter); 149209c5088eSShreyas Bhatewara if (unlikely(err)) { 149309c5088eSShreyas Bhatewara dev_err(&adapter->netdev->dev, 149409c5088eSShreyas Bhatewara "%s: failed to create rx queue%i\n", 149509c5088eSShreyas Bhatewara adapter->netdev->name, i); 149609c5088eSShreyas Bhatewara goto err_out; 149709c5088eSShreyas Bhatewara } 149809c5088eSShreyas Bhatewara } 149909c5088eSShreyas Bhatewara return err; 150009c5088eSShreyas Bhatewara err_out: 150109c5088eSShreyas Bhatewara vmxnet3_rq_destroy_all(adapter); 150209c5088eSShreyas Bhatewara return err; 150309c5088eSShreyas Bhatewara 150409c5088eSShreyas Bhatewara } 150509c5088eSShreyas Bhatewara 150609c5088eSShreyas Bhatewara /* Multiple queue aware polling function for tx and rx */ 150709c5088eSShreyas Bhatewara 150809c5088eSShreyas Bhatewara static int 1509d1a890faSShreyas Bhatewara vmxnet3_do_poll(struct vmxnet3_adapter *adapter, int budget) 1510d1a890faSShreyas Bhatewara { 151109c5088eSShreyas Bhatewara int rcd_done = 0, i; 1512d1a890faSShreyas Bhatewara if (unlikely(adapter->shared->ecr)) 1513d1a890faSShreyas Bhatewara vmxnet3_process_events(adapter); 151409c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 151509c5088eSShreyas Bhatewara vmxnet3_tq_tx_complete(&adapter->tx_queue[i], adapter); 1516d1a890faSShreyas Bhatewara 151709c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 151809c5088eSShreyas Bhatewara rcd_done += vmxnet3_rq_rx_complete(&adapter->rx_queue[i], 151909c5088eSShreyas Bhatewara adapter, budget); 152009c5088eSShreyas Bhatewara return rcd_done; 1521d1a890faSShreyas Bhatewara } 1522d1a890faSShreyas Bhatewara 1523d1a890faSShreyas Bhatewara 1524d1a890faSShreyas Bhatewara static int 1525d1a890faSShreyas Bhatewara vmxnet3_poll(struct napi_struct *napi, int budget) 1526d1a890faSShreyas Bhatewara { 152709c5088eSShreyas Bhatewara struct vmxnet3_rx_queue *rx_queue = container_of(napi, 152809c5088eSShreyas Bhatewara struct vmxnet3_rx_queue, napi); 1529d1a890faSShreyas Bhatewara int rxd_done; 1530d1a890faSShreyas Bhatewara 153109c5088eSShreyas Bhatewara rxd_done = vmxnet3_do_poll(rx_queue->adapter, budget); 1532d1a890faSShreyas Bhatewara 1533d1a890faSShreyas Bhatewara if (rxd_done < budget) { 1534d1a890faSShreyas Bhatewara napi_complete(napi); 153509c5088eSShreyas Bhatewara vmxnet3_enable_all_intrs(rx_queue->adapter); 1536d1a890faSShreyas Bhatewara } 1537d1a890faSShreyas Bhatewara return rxd_done; 1538d1a890faSShreyas Bhatewara } 1539d1a890faSShreyas Bhatewara 154009c5088eSShreyas Bhatewara /* 154109c5088eSShreyas Bhatewara * NAPI polling function for MSI-X mode with multiple Rx queues 154209c5088eSShreyas Bhatewara * Returns the # of the NAPI credit consumed (# of rx descriptors processed) 154309c5088eSShreyas Bhatewara */ 154409c5088eSShreyas Bhatewara 154509c5088eSShreyas Bhatewara static int 154609c5088eSShreyas Bhatewara vmxnet3_poll_rx_only(struct napi_struct *napi, int budget) 154709c5088eSShreyas Bhatewara { 154809c5088eSShreyas Bhatewara struct vmxnet3_rx_queue *rq = container_of(napi, 154909c5088eSShreyas Bhatewara struct vmxnet3_rx_queue, napi); 155009c5088eSShreyas Bhatewara struct vmxnet3_adapter *adapter = rq->adapter; 155109c5088eSShreyas Bhatewara int rxd_done; 155209c5088eSShreyas Bhatewara 155309c5088eSShreyas Bhatewara /* When sharing interrupt with corresponding tx queue, process 155409c5088eSShreyas Bhatewara * tx completions in that queue as well 155509c5088eSShreyas Bhatewara */ 155609c5088eSShreyas Bhatewara if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE) { 155709c5088eSShreyas Bhatewara struct vmxnet3_tx_queue *tq = 155809c5088eSShreyas Bhatewara &adapter->tx_queue[rq - adapter->rx_queue]; 155909c5088eSShreyas Bhatewara vmxnet3_tq_tx_complete(tq, adapter); 156009c5088eSShreyas Bhatewara } 156109c5088eSShreyas Bhatewara 156209c5088eSShreyas Bhatewara rxd_done = vmxnet3_rq_rx_complete(rq, adapter, budget); 156309c5088eSShreyas Bhatewara 156409c5088eSShreyas Bhatewara if (rxd_done < budget) { 156509c5088eSShreyas Bhatewara napi_complete(napi); 156609c5088eSShreyas Bhatewara vmxnet3_enable_intr(adapter, rq->comp_ring.intr_idx); 156709c5088eSShreyas Bhatewara } 156809c5088eSShreyas Bhatewara return rxd_done; 156909c5088eSShreyas Bhatewara } 157009c5088eSShreyas Bhatewara 157109c5088eSShreyas Bhatewara 157209c5088eSShreyas Bhatewara #ifdef CONFIG_PCI_MSI 157309c5088eSShreyas Bhatewara 157409c5088eSShreyas Bhatewara /* 157509c5088eSShreyas Bhatewara * Handle completion interrupts on tx queues 157609c5088eSShreyas Bhatewara * Returns whether or not the intr is handled 157709c5088eSShreyas Bhatewara */ 157809c5088eSShreyas Bhatewara 157909c5088eSShreyas Bhatewara static irqreturn_t 158009c5088eSShreyas Bhatewara vmxnet3_msix_tx(int irq, void *data) 158109c5088eSShreyas Bhatewara { 158209c5088eSShreyas Bhatewara struct vmxnet3_tx_queue *tq = data; 158309c5088eSShreyas Bhatewara struct vmxnet3_adapter *adapter = tq->adapter; 158409c5088eSShreyas Bhatewara 158509c5088eSShreyas Bhatewara if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 158609c5088eSShreyas Bhatewara vmxnet3_disable_intr(adapter, tq->comp_ring.intr_idx); 158709c5088eSShreyas Bhatewara 158809c5088eSShreyas Bhatewara /* Handle the case where only one irq is allocate for all tx queues */ 158909c5088eSShreyas Bhatewara if (adapter->share_intr == VMXNET3_INTR_TXSHARE) { 159009c5088eSShreyas Bhatewara int i; 159109c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) { 159209c5088eSShreyas Bhatewara struct vmxnet3_tx_queue *txq = &adapter->tx_queue[i]; 159309c5088eSShreyas Bhatewara vmxnet3_tq_tx_complete(txq, adapter); 159409c5088eSShreyas Bhatewara } 159509c5088eSShreyas Bhatewara } else { 159609c5088eSShreyas Bhatewara vmxnet3_tq_tx_complete(tq, adapter); 159709c5088eSShreyas Bhatewara } 159809c5088eSShreyas Bhatewara vmxnet3_enable_intr(adapter, tq->comp_ring.intr_idx); 159909c5088eSShreyas Bhatewara 160009c5088eSShreyas Bhatewara return IRQ_HANDLED; 160109c5088eSShreyas Bhatewara } 160209c5088eSShreyas Bhatewara 160309c5088eSShreyas Bhatewara 160409c5088eSShreyas Bhatewara /* 160509c5088eSShreyas Bhatewara * Handle completion interrupts on rx queues. Returns whether or not the 160609c5088eSShreyas Bhatewara * intr is handled 160709c5088eSShreyas Bhatewara */ 160809c5088eSShreyas Bhatewara 160909c5088eSShreyas Bhatewara static irqreturn_t 161009c5088eSShreyas Bhatewara vmxnet3_msix_rx(int irq, void *data) 161109c5088eSShreyas Bhatewara { 161209c5088eSShreyas Bhatewara struct vmxnet3_rx_queue *rq = data; 161309c5088eSShreyas Bhatewara struct vmxnet3_adapter *adapter = rq->adapter; 161409c5088eSShreyas Bhatewara 161509c5088eSShreyas Bhatewara /* disable intr if needed */ 161609c5088eSShreyas Bhatewara if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 161709c5088eSShreyas Bhatewara vmxnet3_disable_intr(adapter, rq->comp_ring.intr_idx); 161809c5088eSShreyas Bhatewara napi_schedule(&rq->napi); 161909c5088eSShreyas Bhatewara 162009c5088eSShreyas Bhatewara return IRQ_HANDLED; 162109c5088eSShreyas Bhatewara } 162209c5088eSShreyas Bhatewara 162309c5088eSShreyas Bhatewara /* 162409c5088eSShreyas Bhatewara *---------------------------------------------------------------------------- 162509c5088eSShreyas Bhatewara * 162609c5088eSShreyas Bhatewara * vmxnet3_msix_event -- 162709c5088eSShreyas Bhatewara * 162809c5088eSShreyas Bhatewara * vmxnet3 msix event intr handler 162909c5088eSShreyas Bhatewara * 163009c5088eSShreyas Bhatewara * Result: 163109c5088eSShreyas Bhatewara * whether or not the intr is handled 163209c5088eSShreyas Bhatewara * 163309c5088eSShreyas Bhatewara *---------------------------------------------------------------------------- 163409c5088eSShreyas Bhatewara */ 163509c5088eSShreyas Bhatewara 163609c5088eSShreyas Bhatewara static irqreturn_t 163709c5088eSShreyas Bhatewara vmxnet3_msix_event(int irq, void *data) 163809c5088eSShreyas Bhatewara { 163909c5088eSShreyas Bhatewara struct net_device *dev = data; 164009c5088eSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(dev); 164109c5088eSShreyas Bhatewara 164209c5088eSShreyas Bhatewara /* disable intr if needed */ 164309c5088eSShreyas Bhatewara if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 164409c5088eSShreyas Bhatewara vmxnet3_disable_intr(adapter, adapter->intr.event_intr_idx); 164509c5088eSShreyas Bhatewara 164609c5088eSShreyas Bhatewara if (adapter->shared->ecr) 164709c5088eSShreyas Bhatewara vmxnet3_process_events(adapter); 164809c5088eSShreyas Bhatewara 164909c5088eSShreyas Bhatewara vmxnet3_enable_intr(adapter, adapter->intr.event_intr_idx); 165009c5088eSShreyas Bhatewara 165109c5088eSShreyas Bhatewara return IRQ_HANDLED; 165209c5088eSShreyas Bhatewara } 165309c5088eSShreyas Bhatewara 165409c5088eSShreyas Bhatewara #endif /* CONFIG_PCI_MSI */ 165509c5088eSShreyas Bhatewara 1656d1a890faSShreyas Bhatewara 1657d1a890faSShreyas Bhatewara /* Interrupt handler for vmxnet3 */ 1658d1a890faSShreyas Bhatewara static irqreturn_t 1659d1a890faSShreyas Bhatewara vmxnet3_intr(int irq, void *dev_id) 1660d1a890faSShreyas Bhatewara { 1661d1a890faSShreyas Bhatewara struct net_device *dev = dev_id; 1662d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(dev); 1663d1a890faSShreyas Bhatewara 166409c5088eSShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_INTX) { 1665d1a890faSShreyas Bhatewara u32 icr = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_ICR); 1666d1a890faSShreyas Bhatewara if (unlikely(icr == 0)) 1667d1a890faSShreyas Bhatewara /* not ours */ 1668d1a890faSShreyas Bhatewara return IRQ_NONE; 1669d1a890faSShreyas Bhatewara } 1670d1a890faSShreyas Bhatewara 1671d1a890faSShreyas Bhatewara 1672d1a890faSShreyas Bhatewara /* disable intr if needed */ 1673d1a890faSShreyas Bhatewara if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 167409c5088eSShreyas Bhatewara vmxnet3_disable_all_intrs(adapter); 1675d1a890faSShreyas Bhatewara 167609c5088eSShreyas Bhatewara napi_schedule(&adapter->rx_queue[0].napi); 1677d1a890faSShreyas Bhatewara 1678d1a890faSShreyas Bhatewara return IRQ_HANDLED; 1679d1a890faSShreyas Bhatewara } 1680d1a890faSShreyas Bhatewara 1681d1a890faSShreyas Bhatewara #ifdef CONFIG_NET_POLL_CONTROLLER 1682d1a890faSShreyas Bhatewara 1683d1a890faSShreyas Bhatewara /* netpoll callback. */ 1684d1a890faSShreyas Bhatewara static void 1685d1a890faSShreyas Bhatewara vmxnet3_netpoll(struct net_device *netdev) 1686d1a890faSShreyas Bhatewara { 1687d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1688d1a890faSShreyas Bhatewara 168909c5088eSShreyas Bhatewara if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 169009c5088eSShreyas Bhatewara vmxnet3_disable_all_intrs(adapter); 1691d1a890faSShreyas Bhatewara 169209c5088eSShreyas Bhatewara vmxnet3_do_poll(adapter, adapter->rx_queue[0].rx_ring[0].size); 169309c5088eSShreyas Bhatewara vmxnet3_enable_all_intrs(adapter); 169409c5088eSShreyas Bhatewara 1695d1a890faSShreyas Bhatewara } 169609c5088eSShreyas Bhatewara #endif /* CONFIG_NET_POLL_CONTROLLER */ 1697d1a890faSShreyas Bhatewara 1698d1a890faSShreyas Bhatewara static int 1699d1a890faSShreyas Bhatewara vmxnet3_request_irqs(struct vmxnet3_adapter *adapter) 1700d1a890faSShreyas Bhatewara { 170109c5088eSShreyas Bhatewara struct vmxnet3_intr *intr = &adapter->intr; 170209c5088eSShreyas Bhatewara int err = 0, i; 170309c5088eSShreyas Bhatewara int vector = 0; 1704d1a890faSShreyas Bhatewara 17058f7e524cSRandy Dunlap #ifdef CONFIG_PCI_MSI 1706d1a890faSShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_MSIX) { 170709c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) { 170809c5088eSShreyas Bhatewara if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) { 170909c5088eSShreyas Bhatewara sprintf(adapter->tx_queue[i].name, "%s-tx-%d", 171009c5088eSShreyas Bhatewara adapter->netdev->name, vector); 171109c5088eSShreyas Bhatewara err = request_irq( 171209c5088eSShreyas Bhatewara intr->msix_entries[vector].vector, 171309c5088eSShreyas Bhatewara vmxnet3_msix_tx, 0, 171409c5088eSShreyas Bhatewara adapter->tx_queue[i].name, 171509c5088eSShreyas Bhatewara &adapter->tx_queue[i]); 171609c5088eSShreyas Bhatewara } else { 171709c5088eSShreyas Bhatewara sprintf(adapter->tx_queue[i].name, "%s-rxtx-%d", 171809c5088eSShreyas Bhatewara adapter->netdev->name, vector); 171909c5088eSShreyas Bhatewara } 172009c5088eSShreyas Bhatewara if (err) { 172109c5088eSShreyas Bhatewara dev_err(&adapter->netdev->dev, 172209c5088eSShreyas Bhatewara "Failed to request irq for MSIX, %s, " 172309c5088eSShreyas Bhatewara "error %d\n", 172409c5088eSShreyas Bhatewara adapter->tx_queue[i].name, err); 172509c5088eSShreyas Bhatewara return err; 172609c5088eSShreyas Bhatewara } 172709c5088eSShreyas Bhatewara 172809c5088eSShreyas Bhatewara /* Handle the case where only 1 MSIx was allocated for 172909c5088eSShreyas Bhatewara * all tx queues */ 173009c5088eSShreyas Bhatewara if (adapter->share_intr == VMXNET3_INTR_TXSHARE) { 173109c5088eSShreyas Bhatewara for (; i < adapter->num_tx_queues; i++) 173209c5088eSShreyas Bhatewara adapter->tx_queue[i].comp_ring.intr_idx 173309c5088eSShreyas Bhatewara = vector; 173409c5088eSShreyas Bhatewara vector++; 173509c5088eSShreyas Bhatewara break; 173609c5088eSShreyas Bhatewara } else { 173709c5088eSShreyas Bhatewara adapter->tx_queue[i].comp_ring.intr_idx 173809c5088eSShreyas Bhatewara = vector++; 173909c5088eSShreyas Bhatewara } 174009c5088eSShreyas Bhatewara } 174109c5088eSShreyas Bhatewara if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE) 174209c5088eSShreyas Bhatewara vector = 0; 174309c5088eSShreyas Bhatewara 174409c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 174509c5088eSShreyas Bhatewara if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) 174609c5088eSShreyas Bhatewara sprintf(adapter->rx_queue[i].name, "%s-rx-%d", 174709c5088eSShreyas Bhatewara adapter->netdev->name, vector); 174809c5088eSShreyas Bhatewara else 174909c5088eSShreyas Bhatewara sprintf(adapter->rx_queue[i].name, "%s-rxtx-%d", 175009c5088eSShreyas Bhatewara adapter->netdev->name, vector); 175109c5088eSShreyas Bhatewara err = request_irq(intr->msix_entries[vector].vector, 175209c5088eSShreyas Bhatewara vmxnet3_msix_rx, 0, 175309c5088eSShreyas Bhatewara adapter->rx_queue[i].name, 175409c5088eSShreyas Bhatewara &(adapter->rx_queue[i])); 175509c5088eSShreyas Bhatewara if (err) { 175609c5088eSShreyas Bhatewara printk(KERN_ERR "Failed to request irq for MSIX" 175709c5088eSShreyas Bhatewara ", %s, error %d\n", 175809c5088eSShreyas Bhatewara adapter->rx_queue[i].name, err); 175909c5088eSShreyas Bhatewara return err; 176009c5088eSShreyas Bhatewara } 176109c5088eSShreyas Bhatewara 176209c5088eSShreyas Bhatewara adapter->rx_queue[i].comp_ring.intr_idx = vector++; 176309c5088eSShreyas Bhatewara } 176409c5088eSShreyas Bhatewara 176509c5088eSShreyas Bhatewara sprintf(intr->event_msi_vector_name, "%s-event-%d", 176609c5088eSShreyas Bhatewara adapter->netdev->name, vector); 176709c5088eSShreyas Bhatewara err = request_irq(intr->msix_entries[vector].vector, 176809c5088eSShreyas Bhatewara vmxnet3_msix_event, 0, 176909c5088eSShreyas Bhatewara intr->event_msi_vector_name, adapter->netdev); 177009c5088eSShreyas Bhatewara intr->event_intr_idx = vector; 177109c5088eSShreyas Bhatewara 177209c5088eSShreyas Bhatewara } else if (intr->type == VMXNET3_IT_MSI) { 177309c5088eSShreyas Bhatewara adapter->num_rx_queues = 1; 1774d1a890faSShreyas Bhatewara err = request_irq(adapter->pdev->irq, vmxnet3_intr, 0, 1775d1a890faSShreyas Bhatewara adapter->netdev->name, adapter->netdev); 177609c5088eSShreyas Bhatewara } else { 1777115924b6SShreyas Bhatewara #endif 177809c5088eSShreyas Bhatewara adapter->num_rx_queues = 1; 1779d1a890faSShreyas Bhatewara err = request_irq(adapter->pdev->irq, vmxnet3_intr, 1780d1a890faSShreyas Bhatewara IRQF_SHARED, adapter->netdev->name, 1781d1a890faSShreyas Bhatewara adapter->netdev); 178209c5088eSShreyas Bhatewara #ifdef CONFIG_PCI_MSI 178309c5088eSShreyas Bhatewara } 178409c5088eSShreyas Bhatewara #endif 178509c5088eSShreyas Bhatewara intr->num_intrs = vector + 1; 178609c5088eSShreyas Bhatewara if (err) { 178709c5088eSShreyas Bhatewara printk(KERN_ERR "Failed to request irq %s (intr type:%d), error" 178809c5088eSShreyas Bhatewara ":%d\n", adapter->netdev->name, intr->type, err); 178909c5088eSShreyas Bhatewara } else { 179009c5088eSShreyas Bhatewara /* Number of rx queues will not change after this */ 179109c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 179209c5088eSShreyas Bhatewara struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i]; 179309c5088eSShreyas Bhatewara rq->qid = i; 179409c5088eSShreyas Bhatewara rq->qid2 = i + adapter->num_rx_queues; 1795d1a890faSShreyas Bhatewara } 1796d1a890faSShreyas Bhatewara 1797d1a890faSShreyas Bhatewara 1798d1a890faSShreyas Bhatewara 1799d1a890faSShreyas Bhatewara /* init our intr settings */ 180009c5088eSShreyas Bhatewara for (i = 0; i < intr->num_intrs; i++) 180109c5088eSShreyas Bhatewara intr->mod_levels[i] = UPT1_IML_ADAPTIVE; 180209c5088eSShreyas Bhatewara if (adapter->intr.type != VMXNET3_IT_MSIX) { 1803d1a890faSShreyas Bhatewara adapter->intr.event_intr_idx = 0; 180409c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 180509c5088eSShreyas Bhatewara adapter->tx_queue[i].comp_ring.intr_idx = 0; 180609c5088eSShreyas Bhatewara adapter->rx_queue[0].comp_ring.intr_idx = 0; 180709c5088eSShreyas Bhatewara } 1808d1a890faSShreyas Bhatewara 1809d1a890faSShreyas Bhatewara printk(KERN_INFO "%s: intr type %u, mode %u, %u vectors " 181009c5088eSShreyas Bhatewara "allocated\n", adapter->netdev->name, intr->type, 181109c5088eSShreyas Bhatewara intr->mask_mode, intr->num_intrs); 1812d1a890faSShreyas Bhatewara } 1813d1a890faSShreyas Bhatewara 1814d1a890faSShreyas Bhatewara return err; 1815d1a890faSShreyas Bhatewara } 1816d1a890faSShreyas Bhatewara 1817d1a890faSShreyas Bhatewara 1818d1a890faSShreyas Bhatewara static void 1819d1a890faSShreyas Bhatewara vmxnet3_free_irqs(struct vmxnet3_adapter *adapter) 1820d1a890faSShreyas Bhatewara { 182109c5088eSShreyas Bhatewara struct vmxnet3_intr *intr = &adapter->intr; 182209c5088eSShreyas Bhatewara BUG_ON(intr->type == VMXNET3_IT_AUTO || intr->num_intrs <= 0); 1823d1a890faSShreyas Bhatewara 182409c5088eSShreyas Bhatewara switch (intr->type) { 18258f7e524cSRandy Dunlap #ifdef CONFIG_PCI_MSI 1826d1a890faSShreyas Bhatewara case VMXNET3_IT_MSIX: 1827d1a890faSShreyas Bhatewara { 182809c5088eSShreyas Bhatewara int i, vector = 0; 1829d1a890faSShreyas Bhatewara 183009c5088eSShreyas Bhatewara if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) { 183109c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) { 183209c5088eSShreyas Bhatewara free_irq(intr->msix_entries[vector++].vector, 183309c5088eSShreyas Bhatewara &(adapter->tx_queue[i])); 183409c5088eSShreyas Bhatewara if (adapter->share_intr == VMXNET3_INTR_TXSHARE) 183509c5088eSShreyas Bhatewara break; 183609c5088eSShreyas Bhatewara } 183709c5088eSShreyas Bhatewara } 183809c5088eSShreyas Bhatewara 183909c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 184009c5088eSShreyas Bhatewara free_irq(intr->msix_entries[vector++].vector, 184109c5088eSShreyas Bhatewara &(adapter->rx_queue[i])); 184209c5088eSShreyas Bhatewara } 184309c5088eSShreyas Bhatewara 184409c5088eSShreyas Bhatewara free_irq(intr->msix_entries[vector].vector, 1845d1a890faSShreyas Bhatewara adapter->netdev); 184609c5088eSShreyas Bhatewara BUG_ON(vector >= intr->num_intrs); 1847d1a890faSShreyas Bhatewara break; 1848d1a890faSShreyas Bhatewara } 18498f7e524cSRandy Dunlap #endif 1850d1a890faSShreyas Bhatewara case VMXNET3_IT_MSI: 1851d1a890faSShreyas Bhatewara free_irq(adapter->pdev->irq, adapter->netdev); 1852d1a890faSShreyas Bhatewara break; 1853d1a890faSShreyas Bhatewara case VMXNET3_IT_INTX: 1854d1a890faSShreyas Bhatewara free_irq(adapter->pdev->irq, adapter->netdev); 1855d1a890faSShreyas Bhatewara break; 1856d1a890faSShreyas Bhatewara default: 1857d1a890faSShreyas Bhatewara BUG_ON(true); 1858d1a890faSShreyas Bhatewara } 1859d1a890faSShreyas Bhatewara } 1860d1a890faSShreyas Bhatewara 1861d1a890faSShreyas Bhatewara static void 1862d1a890faSShreyas Bhatewara vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) 1863d1a890faSShreyas Bhatewara { 1864d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1865d1a890faSShreyas Bhatewara struct Vmxnet3_DriverShared *shared = adapter->shared; 1866d1a890faSShreyas Bhatewara u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 186783d0feffSShreyas Bhatewara unsigned long flags; 1868d1a890faSShreyas Bhatewara 1869d1a890faSShreyas Bhatewara if (grp) { 1870d1a890faSShreyas Bhatewara /* add vlan rx stripping. */ 1871d1a890faSShreyas Bhatewara if (adapter->netdev->features & NETIF_F_HW_VLAN_RX) { 1872d1a890faSShreyas Bhatewara int i; 1873d1a890faSShreyas Bhatewara adapter->vlan_grp = grp; 1874d1a890faSShreyas Bhatewara 1875d1a890faSShreyas Bhatewara /* 1876d1a890faSShreyas Bhatewara * Clear entire vfTable; then enable untagged pkts. 1877d1a890faSShreyas Bhatewara * Note: setting one entry in vfTable to non-zero turns 1878d1a890faSShreyas Bhatewara * on VLAN rx filtering. 1879d1a890faSShreyas Bhatewara */ 1880d1a890faSShreyas Bhatewara for (i = 0; i < VMXNET3_VFT_SIZE; i++) 1881d1a890faSShreyas Bhatewara vfTable[i] = 0; 1882d1a890faSShreyas Bhatewara 1883d1a890faSShreyas Bhatewara VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0); 188483d0feffSShreyas Bhatewara spin_lock_irqsave(&adapter->cmd_lock, flags); 1885d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1886d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_VLAN_FILTERS); 188783d0feffSShreyas Bhatewara spin_unlock_irqrestore(&adapter->cmd_lock, flags); 1888d1a890faSShreyas Bhatewara } else { 1889d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: vlan_rx_register when device has " 1890d1a890faSShreyas Bhatewara "no NETIF_F_HW_VLAN_RX\n", netdev->name); 1891d1a890faSShreyas Bhatewara } 1892d1a890faSShreyas Bhatewara } else { 1893d1a890faSShreyas Bhatewara /* remove vlan rx stripping. */ 1894d1a890faSShreyas Bhatewara struct Vmxnet3_DSDevRead *devRead = &shared->devRead; 1895d1a890faSShreyas Bhatewara adapter->vlan_grp = NULL; 1896d1a890faSShreyas Bhatewara 18973843e515SHarvey Harrison if (devRead->misc.uptFeatures & UPT1_F_RXVLAN) { 1898d1a890faSShreyas Bhatewara int i; 1899d1a890faSShreyas Bhatewara 1900d1a890faSShreyas Bhatewara for (i = 0; i < VMXNET3_VFT_SIZE; i++) { 1901d1a890faSShreyas Bhatewara /* clear entire vfTable; this also disables 1902d1a890faSShreyas Bhatewara * VLAN rx filtering 1903d1a890faSShreyas Bhatewara */ 1904d1a890faSShreyas Bhatewara vfTable[i] = 0; 1905d1a890faSShreyas Bhatewara } 190683d0feffSShreyas Bhatewara spin_lock_irqsave(&adapter->cmd_lock, flags); 1907d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1908d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_VLAN_FILTERS); 190983d0feffSShreyas Bhatewara spin_unlock_irqrestore(&adapter->cmd_lock, flags); 1910d1a890faSShreyas Bhatewara } 1911d1a890faSShreyas Bhatewara } 1912d1a890faSShreyas Bhatewara } 1913d1a890faSShreyas Bhatewara 1914d1a890faSShreyas Bhatewara 1915d1a890faSShreyas Bhatewara static void 1916d1a890faSShreyas Bhatewara vmxnet3_restore_vlan(struct vmxnet3_adapter *adapter) 1917d1a890faSShreyas Bhatewara { 1918d1a890faSShreyas Bhatewara if (adapter->vlan_grp) { 1919d1a890faSShreyas Bhatewara u16 vid; 1920d1a890faSShreyas Bhatewara u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1921d1a890faSShreyas Bhatewara bool activeVlan = false; 1922d1a890faSShreyas Bhatewara 1923b738127dSJesse Gross for (vid = 0; vid < VLAN_N_VID; vid++) { 1924d1a890faSShreyas Bhatewara if (vlan_group_get_device(adapter->vlan_grp, vid)) { 1925d1a890faSShreyas Bhatewara VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid); 1926d1a890faSShreyas Bhatewara activeVlan = true; 1927d1a890faSShreyas Bhatewara } 1928d1a890faSShreyas Bhatewara } 1929d1a890faSShreyas Bhatewara if (activeVlan) { 1930d1a890faSShreyas Bhatewara /* continue to allow untagged pkts */ 1931d1a890faSShreyas Bhatewara VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0); 1932d1a890faSShreyas Bhatewara } 1933d1a890faSShreyas Bhatewara } 1934d1a890faSShreyas Bhatewara } 1935d1a890faSShreyas Bhatewara 1936d1a890faSShreyas Bhatewara 1937d1a890faSShreyas Bhatewara static void 1938d1a890faSShreyas Bhatewara vmxnet3_vlan_rx_add_vid(struct net_device *netdev, u16 vid) 1939d1a890faSShreyas Bhatewara { 1940d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1941d1a890faSShreyas Bhatewara u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 194283d0feffSShreyas Bhatewara unsigned long flags; 1943d1a890faSShreyas Bhatewara 1944d1a890faSShreyas Bhatewara VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid); 194583d0feffSShreyas Bhatewara spin_lock_irqsave(&adapter->cmd_lock, flags); 1946d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1947d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_VLAN_FILTERS); 194883d0feffSShreyas Bhatewara spin_unlock_irqrestore(&adapter->cmd_lock, flags); 1949d1a890faSShreyas Bhatewara } 1950d1a890faSShreyas Bhatewara 1951d1a890faSShreyas Bhatewara 1952d1a890faSShreyas Bhatewara static void 1953d1a890faSShreyas Bhatewara vmxnet3_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) 1954d1a890faSShreyas Bhatewara { 1955d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1956d1a890faSShreyas Bhatewara u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 195783d0feffSShreyas Bhatewara unsigned long flags; 1958d1a890faSShreyas Bhatewara 1959d1a890faSShreyas Bhatewara VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid); 196083d0feffSShreyas Bhatewara spin_lock_irqsave(&adapter->cmd_lock, flags); 1961d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1962d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_VLAN_FILTERS); 196383d0feffSShreyas Bhatewara spin_unlock_irqrestore(&adapter->cmd_lock, flags); 1964d1a890faSShreyas Bhatewara } 1965d1a890faSShreyas Bhatewara 1966d1a890faSShreyas Bhatewara 1967d1a890faSShreyas Bhatewara static u8 * 1968d1a890faSShreyas Bhatewara vmxnet3_copy_mc(struct net_device *netdev) 1969d1a890faSShreyas Bhatewara { 1970d1a890faSShreyas Bhatewara u8 *buf = NULL; 19714cd24eafSJiri Pirko u32 sz = netdev_mc_count(netdev) * ETH_ALEN; 1972d1a890faSShreyas Bhatewara 1973d1a890faSShreyas Bhatewara /* struct Vmxnet3_RxFilterConf.mfTableLen is u16. */ 1974d1a890faSShreyas Bhatewara if (sz <= 0xffff) { 1975d1a890faSShreyas Bhatewara /* We may be called with BH disabled */ 1976d1a890faSShreyas Bhatewara buf = kmalloc(sz, GFP_ATOMIC); 1977d1a890faSShreyas Bhatewara if (buf) { 197822bedad3SJiri Pirko struct netdev_hw_addr *ha; 1979567ec874SJiri Pirko int i = 0; 1980d1a890faSShreyas Bhatewara 198122bedad3SJiri Pirko netdev_for_each_mc_addr(ha, netdev) 198222bedad3SJiri Pirko memcpy(buf + i++ * ETH_ALEN, ha->addr, 1983d1a890faSShreyas Bhatewara ETH_ALEN); 1984d1a890faSShreyas Bhatewara } 1985d1a890faSShreyas Bhatewara } 1986d1a890faSShreyas Bhatewara return buf; 1987d1a890faSShreyas Bhatewara } 1988d1a890faSShreyas Bhatewara 1989d1a890faSShreyas Bhatewara 1990d1a890faSShreyas Bhatewara static void 1991d1a890faSShreyas Bhatewara vmxnet3_set_mc(struct net_device *netdev) 1992d1a890faSShreyas Bhatewara { 1993d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 199483d0feffSShreyas Bhatewara unsigned long flags; 1995d1a890faSShreyas Bhatewara struct Vmxnet3_RxFilterConf *rxConf = 1996d1a890faSShreyas Bhatewara &adapter->shared->devRead.rxFilterConf; 1997d1a890faSShreyas Bhatewara u8 *new_table = NULL; 1998d1a890faSShreyas Bhatewara u32 new_mode = VMXNET3_RXM_UCAST; 1999d1a890faSShreyas Bhatewara 2000d1a890faSShreyas Bhatewara if (netdev->flags & IFF_PROMISC) 2001d1a890faSShreyas Bhatewara new_mode |= VMXNET3_RXM_PROMISC; 2002d1a890faSShreyas Bhatewara 2003d1a890faSShreyas Bhatewara if (netdev->flags & IFF_BROADCAST) 2004d1a890faSShreyas Bhatewara new_mode |= VMXNET3_RXM_BCAST; 2005d1a890faSShreyas Bhatewara 2006d1a890faSShreyas Bhatewara if (netdev->flags & IFF_ALLMULTI) 2007d1a890faSShreyas Bhatewara new_mode |= VMXNET3_RXM_ALL_MULTI; 2008d1a890faSShreyas Bhatewara else 20094cd24eafSJiri Pirko if (!netdev_mc_empty(netdev)) { 2010d1a890faSShreyas Bhatewara new_table = vmxnet3_copy_mc(netdev); 2011d1a890faSShreyas Bhatewara if (new_table) { 2012d1a890faSShreyas Bhatewara new_mode |= VMXNET3_RXM_MCAST; 2013115924b6SShreyas Bhatewara rxConf->mfTableLen = cpu_to_le16( 20144cd24eafSJiri Pirko netdev_mc_count(netdev) * ETH_ALEN); 2015115924b6SShreyas Bhatewara rxConf->mfTablePA = cpu_to_le64(virt_to_phys( 2016115924b6SShreyas Bhatewara new_table)); 2017d1a890faSShreyas Bhatewara } else { 2018d1a890faSShreyas Bhatewara printk(KERN_INFO "%s: failed to copy mcast list" 2019d1a890faSShreyas Bhatewara ", setting ALL_MULTI\n", netdev->name); 2020d1a890faSShreyas Bhatewara new_mode |= VMXNET3_RXM_ALL_MULTI; 2021d1a890faSShreyas Bhatewara } 2022d1a890faSShreyas Bhatewara } 2023d1a890faSShreyas Bhatewara 2024d1a890faSShreyas Bhatewara 2025d1a890faSShreyas Bhatewara if (!(new_mode & VMXNET3_RXM_MCAST)) { 2026d1a890faSShreyas Bhatewara rxConf->mfTableLen = 0; 2027d1a890faSShreyas Bhatewara rxConf->mfTablePA = 0; 2028d1a890faSShreyas Bhatewara } 2029d1a890faSShreyas Bhatewara 203083d0feffSShreyas Bhatewara spin_lock_irqsave(&adapter->cmd_lock, flags); 2031d1a890faSShreyas Bhatewara if (new_mode != rxConf->rxMode) { 2032115924b6SShreyas Bhatewara rxConf->rxMode = cpu_to_le32(new_mode); 2033d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2034d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_RX_MODE); 2035d1a890faSShreyas Bhatewara } 2036d1a890faSShreyas Bhatewara 2037d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2038d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_MAC_FILTERS); 203983d0feffSShreyas Bhatewara spin_unlock_irqrestore(&adapter->cmd_lock, flags); 2040d1a890faSShreyas Bhatewara 2041d1a890faSShreyas Bhatewara kfree(new_table); 2042d1a890faSShreyas Bhatewara } 2043d1a890faSShreyas Bhatewara 204409c5088eSShreyas Bhatewara void 204509c5088eSShreyas Bhatewara vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter) 204609c5088eSShreyas Bhatewara { 204709c5088eSShreyas Bhatewara int i; 204809c5088eSShreyas Bhatewara 204909c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 205009c5088eSShreyas Bhatewara vmxnet3_rq_destroy(&adapter->rx_queue[i], adapter); 205109c5088eSShreyas Bhatewara } 205209c5088eSShreyas Bhatewara 2053d1a890faSShreyas Bhatewara 2054d1a890faSShreyas Bhatewara /* 2055d1a890faSShreyas Bhatewara * Set up driver_shared based on settings in adapter. 2056d1a890faSShreyas Bhatewara */ 2057d1a890faSShreyas Bhatewara 2058d1a890faSShreyas Bhatewara static void 2059d1a890faSShreyas Bhatewara vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter) 2060d1a890faSShreyas Bhatewara { 2061d1a890faSShreyas Bhatewara struct Vmxnet3_DriverShared *shared = adapter->shared; 2062d1a890faSShreyas Bhatewara struct Vmxnet3_DSDevRead *devRead = &shared->devRead; 2063d1a890faSShreyas Bhatewara struct Vmxnet3_TxQueueConf *tqc; 2064d1a890faSShreyas Bhatewara struct Vmxnet3_RxQueueConf *rqc; 2065d1a890faSShreyas Bhatewara int i; 2066d1a890faSShreyas Bhatewara 2067d1a890faSShreyas Bhatewara memset(shared, 0, sizeof(*shared)); 2068d1a890faSShreyas Bhatewara 2069d1a890faSShreyas Bhatewara /* driver settings */ 2070115924b6SShreyas Bhatewara shared->magic = cpu_to_le32(VMXNET3_REV1_MAGIC); 2071115924b6SShreyas Bhatewara devRead->misc.driverInfo.version = cpu_to_le32( 2072115924b6SShreyas Bhatewara VMXNET3_DRIVER_VERSION_NUM); 2073d1a890faSShreyas Bhatewara devRead->misc.driverInfo.gos.gosBits = (sizeof(void *) == 4 ? 2074d1a890faSShreyas Bhatewara VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64); 2075d1a890faSShreyas Bhatewara devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX; 2076115924b6SShreyas Bhatewara *((u32 *)&devRead->misc.driverInfo.gos) = cpu_to_le32( 2077115924b6SShreyas Bhatewara *((u32 *)&devRead->misc.driverInfo.gos)); 2078115924b6SShreyas Bhatewara devRead->misc.driverInfo.vmxnet3RevSpt = cpu_to_le32(1); 2079115924b6SShreyas Bhatewara devRead->misc.driverInfo.uptVerSpt = cpu_to_le32(1); 2080d1a890faSShreyas Bhatewara 2081115924b6SShreyas Bhatewara devRead->misc.ddPA = cpu_to_le64(virt_to_phys(adapter)); 2082115924b6SShreyas Bhatewara devRead->misc.ddLen = cpu_to_le32(sizeof(struct vmxnet3_adapter)); 2083d1a890faSShreyas Bhatewara 2084d1a890faSShreyas Bhatewara /* set up feature flags */ 2085a0d2730cSMichał Mirosław if (adapter->netdev->features & NETIF_F_RXCSUM) 20863843e515SHarvey Harrison devRead->misc.uptFeatures |= UPT1_F_RXCSUM; 2087d1a890faSShreyas Bhatewara 2088a0d2730cSMichał Mirosław if (adapter->netdev->features & NETIF_F_LRO) { 20893843e515SHarvey Harrison devRead->misc.uptFeatures |= UPT1_F_LRO; 2090115924b6SShreyas Bhatewara devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS); 2091d1a890faSShreyas Bhatewara } 209254da3d00SShreyas Bhatewara if (adapter->netdev->features & NETIF_F_HW_VLAN_RX) 20933843e515SHarvey Harrison devRead->misc.uptFeatures |= UPT1_F_RXVLAN; 2094d1a890faSShreyas Bhatewara 2095115924b6SShreyas Bhatewara devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu); 2096115924b6SShreyas Bhatewara devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa); 2097115924b6SShreyas Bhatewara devRead->misc.queueDescLen = cpu_to_le32( 209809c5088eSShreyas Bhatewara adapter->num_tx_queues * sizeof(struct Vmxnet3_TxQueueDesc) + 209909c5088eSShreyas Bhatewara adapter->num_rx_queues * sizeof(struct Vmxnet3_RxQueueDesc)); 2100d1a890faSShreyas Bhatewara 2101d1a890faSShreyas Bhatewara /* tx queue settings */ 210209c5088eSShreyas Bhatewara devRead->misc.numTxQueues = adapter->num_tx_queues; 210309c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) { 210409c5088eSShreyas Bhatewara struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i]; 210509c5088eSShreyas Bhatewara BUG_ON(adapter->tx_queue[i].tx_ring.base == NULL); 210609c5088eSShreyas Bhatewara tqc = &adapter->tqd_start[i].conf; 210709c5088eSShreyas Bhatewara tqc->txRingBasePA = cpu_to_le64(tq->tx_ring.basePA); 210809c5088eSShreyas Bhatewara tqc->dataRingBasePA = cpu_to_le64(tq->data_ring.basePA); 210909c5088eSShreyas Bhatewara tqc->compRingBasePA = cpu_to_le64(tq->comp_ring.basePA); 211009c5088eSShreyas Bhatewara tqc->ddPA = cpu_to_le64(virt_to_phys(tq->buf_info)); 211109c5088eSShreyas Bhatewara tqc->txRingSize = cpu_to_le32(tq->tx_ring.size); 211209c5088eSShreyas Bhatewara tqc->dataRingSize = cpu_to_le32(tq->data_ring.size); 211309c5088eSShreyas Bhatewara tqc->compRingSize = cpu_to_le32(tq->comp_ring.size); 211409c5088eSShreyas Bhatewara tqc->ddLen = cpu_to_le32( 211509c5088eSShreyas Bhatewara sizeof(struct vmxnet3_tx_buf_info) * 2116115924b6SShreyas Bhatewara tqc->txRingSize); 211709c5088eSShreyas Bhatewara tqc->intrIdx = tq->comp_ring.intr_idx; 211809c5088eSShreyas Bhatewara } 2119d1a890faSShreyas Bhatewara 2120d1a890faSShreyas Bhatewara /* rx queue settings */ 212109c5088eSShreyas Bhatewara devRead->misc.numRxQueues = adapter->num_rx_queues; 212209c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 212309c5088eSShreyas Bhatewara struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i]; 212409c5088eSShreyas Bhatewara rqc = &adapter->rqd_start[i].conf; 212509c5088eSShreyas Bhatewara rqc->rxRingBasePA[0] = cpu_to_le64(rq->rx_ring[0].basePA); 212609c5088eSShreyas Bhatewara rqc->rxRingBasePA[1] = cpu_to_le64(rq->rx_ring[1].basePA); 212709c5088eSShreyas Bhatewara rqc->compRingBasePA = cpu_to_le64(rq->comp_ring.basePA); 2128115924b6SShreyas Bhatewara rqc->ddPA = cpu_to_le64(virt_to_phys( 212909c5088eSShreyas Bhatewara rq->buf_info)); 213009c5088eSShreyas Bhatewara rqc->rxRingSize[0] = cpu_to_le32(rq->rx_ring[0].size); 213109c5088eSShreyas Bhatewara rqc->rxRingSize[1] = cpu_to_le32(rq->rx_ring[1].size); 213209c5088eSShreyas Bhatewara rqc->compRingSize = cpu_to_le32(rq->comp_ring.size); 213309c5088eSShreyas Bhatewara rqc->ddLen = cpu_to_le32( 213409c5088eSShreyas Bhatewara sizeof(struct vmxnet3_rx_buf_info) * 213509c5088eSShreyas Bhatewara (rqc->rxRingSize[0] + 213609c5088eSShreyas Bhatewara rqc->rxRingSize[1])); 213709c5088eSShreyas Bhatewara rqc->intrIdx = rq->comp_ring.intr_idx; 213809c5088eSShreyas Bhatewara } 213909c5088eSShreyas Bhatewara 214009c5088eSShreyas Bhatewara #ifdef VMXNET3_RSS 214109c5088eSShreyas Bhatewara memset(adapter->rss_conf, 0, sizeof(*adapter->rss_conf)); 214209c5088eSShreyas Bhatewara 214309c5088eSShreyas Bhatewara if (adapter->rss) { 214409c5088eSShreyas Bhatewara struct UPT1_RSSConf *rssConf = adapter->rss_conf; 214509c5088eSShreyas Bhatewara devRead->misc.uptFeatures |= UPT1_F_RSS; 214609c5088eSShreyas Bhatewara devRead->misc.numRxQueues = adapter->num_rx_queues; 214709c5088eSShreyas Bhatewara rssConf->hashType = UPT1_RSS_HASH_TYPE_TCP_IPV4 | 214809c5088eSShreyas Bhatewara UPT1_RSS_HASH_TYPE_IPV4 | 214909c5088eSShreyas Bhatewara UPT1_RSS_HASH_TYPE_TCP_IPV6 | 215009c5088eSShreyas Bhatewara UPT1_RSS_HASH_TYPE_IPV6; 215109c5088eSShreyas Bhatewara rssConf->hashFunc = UPT1_RSS_HASH_FUNC_TOEPLITZ; 215209c5088eSShreyas Bhatewara rssConf->hashKeySize = UPT1_RSS_MAX_KEY_SIZE; 215309c5088eSShreyas Bhatewara rssConf->indTableSize = VMXNET3_RSS_IND_TABLE_SIZE; 215409c5088eSShreyas Bhatewara get_random_bytes(&rssConf->hashKey[0], rssConf->hashKeySize); 215509c5088eSShreyas Bhatewara for (i = 0; i < rssConf->indTableSize; i++) 215609c5088eSShreyas Bhatewara rssConf->indTable[i] = i % adapter->num_rx_queues; 215709c5088eSShreyas Bhatewara 215809c5088eSShreyas Bhatewara devRead->rssConfDesc.confVer = 1; 215909c5088eSShreyas Bhatewara devRead->rssConfDesc.confLen = sizeof(*rssConf); 216009c5088eSShreyas Bhatewara devRead->rssConfDesc.confPA = virt_to_phys(rssConf); 216109c5088eSShreyas Bhatewara } 216209c5088eSShreyas Bhatewara 216309c5088eSShreyas Bhatewara #endif /* VMXNET3_RSS */ 2164d1a890faSShreyas Bhatewara 2165d1a890faSShreyas Bhatewara /* intr settings */ 2166d1a890faSShreyas Bhatewara devRead->intrConf.autoMask = adapter->intr.mask_mode == 2167d1a890faSShreyas Bhatewara VMXNET3_IMM_AUTO; 2168d1a890faSShreyas Bhatewara devRead->intrConf.numIntrs = adapter->intr.num_intrs; 2169d1a890faSShreyas Bhatewara for (i = 0; i < adapter->intr.num_intrs; i++) 2170d1a890faSShreyas Bhatewara devRead->intrConf.modLevels[i] = adapter->intr.mod_levels[i]; 2171d1a890faSShreyas Bhatewara 2172d1a890faSShreyas Bhatewara devRead->intrConf.eventIntrIdx = adapter->intr.event_intr_idx; 21736929fe8aSRonghua Zang devRead->intrConf.intrCtrl |= cpu_to_le32(VMXNET3_IC_DISABLE_ALL); 2174d1a890faSShreyas Bhatewara 2175d1a890faSShreyas Bhatewara /* rx filter settings */ 2176d1a890faSShreyas Bhatewara devRead->rxFilterConf.rxMode = 0; 2177d1a890faSShreyas Bhatewara vmxnet3_restore_vlan(adapter); 2178f9f25026SShreyas Bhatewara vmxnet3_write_mac_addr(adapter, adapter->netdev->dev_addr); 2179f9f25026SShreyas Bhatewara 2180d1a890faSShreyas Bhatewara /* the rest are already zeroed */ 2181d1a890faSShreyas Bhatewara } 2182d1a890faSShreyas Bhatewara 2183d1a890faSShreyas Bhatewara 2184d1a890faSShreyas Bhatewara int 2185d1a890faSShreyas Bhatewara vmxnet3_activate_dev(struct vmxnet3_adapter *adapter) 2186d1a890faSShreyas Bhatewara { 218709c5088eSShreyas Bhatewara int err, i; 2188d1a890faSShreyas Bhatewara u32 ret; 218983d0feffSShreyas Bhatewara unsigned long flags; 2190d1a890faSShreyas Bhatewara 219109c5088eSShreyas Bhatewara dev_dbg(&adapter->netdev->dev, "%s: skb_buf_size %d, rx_buf_per_pkt %d," 219209c5088eSShreyas Bhatewara " ring sizes %u %u %u\n", adapter->netdev->name, 219309c5088eSShreyas Bhatewara adapter->skb_buf_size, adapter->rx_buf_per_pkt, 219409c5088eSShreyas Bhatewara adapter->tx_queue[0].tx_ring.size, 219509c5088eSShreyas Bhatewara adapter->rx_queue[0].rx_ring[0].size, 219609c5088eSShreyas Bhatewara adapter->rx_queue[0].rx_ring[1].size); 2197d1a890faSShreyas Bhatewara 219809c5088eSShreyas Bhatewara vmxnet3_tq_init_all(adapter); 219909c5088eSShreyas Bhatewara err = vmxnet3_rq_init_all(adapter); 2200d1a890faSShreyas Bhatewara if (err) { 2201d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to init rx queue for %s: error %d\n", 2202d1a890faSShreyas Bhatewara adapter->netdev->name, err); 2203d1a890faSShreyas Bhatewara goto rq_err; 2204d1a890faSShreyas Bhatewara } 2205d1a890faSShreyas Bhatewara 2206d1a890faSShreyas Bhatewara err = vmxnet3_request_irqs(adapter); 2207d1a890faSShreyas Bhatewara if (err) { 2208d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to setup irq for %s: error %d\n", 2209d1a890faSShreyas Bhatewara adapter->netdev->name, err); 2210d1a890faSShreyas Bhatewara goto irq_err; 2211d1a890faSShreyas Bhatewara } 2212d1a890faSShreyas Bhatewara 2213d1a890faSShreyas Bhatewara vmxnet3_setup_driver_shared(adapter); 2214d1a890faSShreyas Bhatewara 2215115924b6SShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, VMXNET3_GET_ADDR_LO( 2216115924b6SShreyas Bhatewara adapter->shared_pa)); 2217115924b6SShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI( 2218115924b6SShreyas Bhatewara adapter->shared_pa)); 221983d0feffSShreyas Bhatewara spin_lock_irqsave(&adapter->cmd_lock, flags); 2220d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2221d1a890faSShreyas Bhatewara VMXNET3_CMD_ACTIVATE_DEV); 2222d1a890faSShreyas Bhatewara ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 222383d0feffSShreyas Bhatewara spin_unlock_irqrestore(&adapter->cmd_lock, flags); 2224d1a890faSShreyas Bhatewara 2225d1a890faSShreyas Bhatewara if (ret != 0) { 2226d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to activate dev %s: error %u\n", 2227d1a890faSShreyas Bhatewara adapter->netdev->name, ret); 2228d1a890faSShreyas Bhatewara err = -EINVAL; 2229d1a890faSShreyas Bhatewara goto activate_err; 2230d1a890faSShreyas Bhatewara } 223109c5088eSShreyas Bhatewara 223209c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 223309c5088eSShreyas Bhatewara VMXNET3_WRITE_BAR0_REG(adapter, 223409c5088eSShreyas Bhatewara VMXNET3_REG_RXPROD + i * VMXNET3_REG_ALIGN, 223509c5088eSShreyas Bhatewara adapter->rx_queue[i].rx_ring[0].next2fill); 223609c5088eSShreyas Bhatewara VMXNET3_WRITE_BAR0_REG(adapter, (VMXNET3_REG_RXPROD2 + 223709c5088eSShreyas Bhatewara (i * VMXNET3_REG_ALIGN)), 223809c5088eSShreyas Bhatewara adapter->rx_queue[i].rx_ring[1].next2fill); 223909c5088eSShreyas Bhatewara } 2240d1a890faSShreyas Bhatewara 2241d1a890faSShreyas Bhatewara /* Apply the rx filter settins last. */ 2242d1a890faSShreyas Bhatewara vmxnet3_set_mc(adapter->netdev); 2243d1a890faSShreyas Bhatewara 2244d1a890faSShreyas Bhatewara /* 2245d1a890faSShreyas Bhatewara * Check link state when first activating device. It will start the 2246d1a890faSShreyas Bhatewara * tx queue if the link is up. 2247d1a890faSShreyas Bhatewara */ 22484a1745fcSShreyas Bhatewara vmxnet3_check_link(adapter, true); 224909c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 225009c5088eSShreyas Bhatewara napi_enable(&adapter->rx_queue[i].napi); 2251d1a890faSShreyas Bhatewara vmxnet3_enable_all_intrs(adapter); 2252d1a890faSShreyas Bhatewara clear_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state); 2253d1a890faSShreyas Bhatewara return 0; 2254d1a890faSShreyas Bhatewara 2255d1a890faSShreyas Bhatewara activate_err: 2256d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, 0); 2257d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, 0); 2258d1a890faSShreyas Bhatewara vmxnet3_free_irqs(adapter); 2259d1a890faSShreyas Bhatewara irq_err: 2260d1a890faSShreyas Bhatewara rq_err: 2261d1a890faSShreyas Bhatewara /* free up buffers we allocated */ 226209c5088eSShreyas Bhatewara vmxnet3_rq_cleanup_all(adapter); 2263d1a890faSShreyas Bhatewara return err; 2264d1a890faSShreyas Bhatewara } 2265d1a890faSShreyas Bhatewara 2266d1a890faSShreyas Bhatewara 2267d1a890faSShreyas Bhatewara void 2268d1a890faSShreyas Bhatewara vmxnet3_reset_dev(struct vmxnet3_adapter *adapter) 2269d1a890faSShreyas Bhatewara { 227083d0feffSShreyas Bhatewara unsigned long flags; 227183d0feffSShreyas Bhatewara spin_lock_irqsave(&adapter->cmd_lock, flags); 2272d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV); 227383d0feffSShreyas Bhatewara spin_unlock_irqrestore(&adapter->cmd_lock, flags); 2274d1a890faSShreyas Bhatewara } 2275d1a890faSShreyas Bhatewara 2276d1a890faSShreyas Bhatewara 2277d1a890faSShreyas Bhatewara int 2278d1a890faSShreyas Bhatewara vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter) 2279d1a890faSShreyas Bhatewara { 228009c5088eSShreyas Bhatewara int i; 228183d0feffSShreyas Bhatewara unsigned long flags; 2282d1a890faSShreyas Bhatewara if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state)) 2283d1a890faSShreyas Bhatewara return 0; 2284d1a890faSShreyas Bhatewara 2285d1a890faSShreyas Bhatewara 228683d0feffSShreyas Bhatewara spin_lock_irqsave(&adapter->cmd_lock, flags); 2287d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2288d1a890faSShreyas Bhatewara VMXNET3_CMD_QUIESCE_DEV); 228983d0feffSShreyas Bhatewara spin_unlock_irqrestore(&adapter->cmd_lock, flags); 2290d1a890faSShreyas Bhatewara vmxnet3_disable_all_intrs(adapter); 2291d1a890faSShreyas Bhatewara 229209c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 229309c5088eSShreyas Bhatewara napi_disable(&adapter->rx_queue[i].napi); 2294d1a890faSShreyas Bhatewara netif_tx_disable(adapter->netdev); 2295d1a890faSShreyas Bhatewara adapter->link_speed = 0; 2296d1a890faSShreyas Bhatewara netif_carrier_off(adapter->netdev); 2297d1a890faSShreyas Bhatewara 229809c5088eSShreyas Bhatewara vmxnet3_tq_cleanup_all(adapter); 229909c5088eSShreyas Bhatewara vmxnet3_rq_cleanup_all(adapter); 2300d1a890faSShreyas Bhatewara vmxnet3_free_irqs(adapter); 2301d1a890faSShreyas Bhatewara return 0; 2302d1a890faSShreyas Bhatewara } 2303d1a890faSShreyas Bhatewara 2304d1a890faSShreyas Bhatewara 2305d1a890faSShreyas Bhatewara static void 2306d1a890faSShreyas Bhatewara vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac) 2307d1a890faSShreyas Bhatewara { 2308d1a890faSShreyas Bhatewara u32 tmp; 2309d1a890faSShreyas Bhatewara 2310d1a890faSShreyas Bhatewara tmp = *(u32 *)mac; 2311d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACL, tmp); 2312d1a890faSShreyas Bhatewara 2313d1a890faSShreyas Bhatewara tmp = (mac[5] << 8) | mac[4]; 2314d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACH, tmp); 2315d1a890faSShreyas Bhatewara } 2316d1a890faSShreyas Bhatewara 2317d1a890faSShreyas Bhatewara 2318d1a890faSShreyas Bhatewara static int 2319d1a890faSShreyas Bhatewara vmxnet3_set_mac_addr(struct net_device *netdev, void *p) 2320d1a890faSShreyas Bhatewara { 2321d1a890faSShreyas Bhatewara struct sockaddr *addr = p; 2322d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2323d1a890faSShreyas Bhatewara 2324d1a890faSShreyas Bhatewara memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 2325d1a890faSShreyas Bhatewara vmxnet3_write_mac_addr(adapter, addr->sa_data); 2326d1a890faSShreyas Bhatewara 2327d1a890faSShreyas Bhatewara return 0; 2328d1a890faSShreyas Bhatewara } 2329d1a890faSShreyas Bhatewara 2330d1a890faSShreyas Bhatewara 2331d1a890faSShreyas Bhatewara /* ==================== initialization and cleanup routines ============ */ 2332d1a890faSShreyas Bhatewara 2333d1a890faSShreyas Bhatewara static int 2334d1a890faSShreyas Bhatewara vmxnet3_alloc_pci_resources(struct vmxnet3_adapter *adapter, bool *dma64) 2335d1a890faSShreyas Bhatewara { 2336d1a890faSShreyas Bhatewara int err; 2337d1a890faSShreyas Bhatewara unsigned long mmio_start, mmio_len; 2338d1a890faSShreyas Bhatewara struct pci_dev *pdev = adapter->pdev; 2339d1a890faSShreyas Bhatewara 2340d1a890faSShreyas Bhatewara err = pci_enable_device(pdev); 2341d1a890faSShreyas Bhatewara if (err) { 2342d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to enable adapter %s: error %d\n", 2343d1a890faSShreyas Bhatewara pci_name(pdev), err); 2344d1a890faSShreyas Bhatewara return err; 2345d1a890faSShreyas Bhatewara } 2346d1a890faSShreyas Bhatewara 2347d1a890faSShreyas Bhatewara if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) { 2348d1a890faSShreyas Bhatewara if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) { 2349d1a890faSShreyas Bhatewara printk(KERN_ERR "pci_set_consistent_dma_mask failed " 2350d1a890faSShreyas Bhatewara "for adapter %s\n", pci_name(pdev)); 2351d1a890faSShreyas Bhatewara err = -EIO; 2352d1a890faSShreyas Bhatewara goto err_set_mask; 2353d1a890faSShreyas Bhatewara } 2354d1a890faSShreyas Bhatewara *dma64 = true; 2355d1a890faSShreyas Bhatewara } else { 2356d1a890faSShreyas Bhatewara if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) { 2357d1a890faSShreyas Bhatewara printk(KERN_ERR "pci_set_dma_mask failed for adapter " 2358d1a890faSShreyas Bhatewara "%s\n", pci_name(pdev)); 2359d1a890faSShreyas Bhatewara err = -EIO; 2360d1a890faSShreyas Bhatewara goto err_set_mask; 2361d1a890faSShreyas Bhatewara } 2362d1a890faSShreyas Bhatewara *dma64 = false; 2363d1a890faSShreyas Bhatewara } 2364d1a890faSShreyas Bhatewara 2365d1a890faSShreyas Bhatewara err = pci_request_selected_regions(pdev, (1 << 2) - 1, 2366d1a890faSShreyas Bhatewara vmxnet3_driver_name); 2367d1a890faSShreyas Bhatewara if (err) { 2368d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to request region for adapter %s: " 2369d1a890faSShreyas Bhatewara "error %d\n", pci_name(pdev), err); 2370d1a890faSShreyas Bhatewara goto err_set_mask; 2371d1a890faSShreyas Bhatewara } 2372d1a890faSShreyas Bhatewara 2373d1a890faSShreyas Bhatewara pci_set_master(pdev); 2374d1a890faSShreyas Bhatewara 2375d1a890faSShreyas Bhatewara mmio_start = pci_resource_start(pdev, 0); 2376d1a890faSShreyas Bhatewara mmio_len = pci_resource_len(pdev, 0); 2377d1a890faSShreyas Bhatewara adapter->hw_addr0 = ioremap(mmio_start, mmio_len); 2378d1a890faSShreyas Bhatewara if (!adapter->hw_addr0) { 2379d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to map bar0 for adapter %s\n", 2380d1a890faSShreyas Bhatewara pci_name(pdev)); 2381d1a890faSShreyas Bhatewara err = -EIO; 2382d1a890faSShreyas Bhatewara goto err_ioremap; 2383d1a890faSShreyas Bhatewara } 2384d1a890faSShreyas Bhatewara 2385d1a890faSShreyas Bhatewara mmio_start = pci_resource_start(pdev, 1); 2386d1a890faSShreyas Bhatewara mmio_len = pci_resource_len(pdev, 1); 2387d1a890faSShreyas Bhatewara adapter->hw_addr1 = ioremap(mmio_start, mmio_len); 2388d1a890faSShreyas Bhatewara if (!adapter->hw_addr1) { 2389d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to map bar1 for adapter %s\n", 2390d1a890faSShreyas Bhatewara pci_name(pdev)); 2391d1a890faSShreyas Bhatewara err = -EIO; 2392d1a890faSShreyas Bhatewara goto err_bar1; 2393d1a890faSShreyas Bhatewara } 2394d1a890faSShreyas Bhatewara return 0; 2395d1a890faSShreyas Bhatewara 2396d1a890faSShreyas Bhatewara err_bar1: 2397d1a890faSShreyas Bhatewara iounmap(adapter->hw_addr0); 2398d1a890faSShreyas Bhatewara err_ioremap: 2399d1a890faSShreyas Bhatewara pci_release_selected_regions(pdev, (1 << 2) - 1); 2400d1a890faSShreyas Bhatewara err_set_mask: 2401d1a890faSShreyas Bhatewara pci_disable_device(pdev); 2402d1a890faSShreyas Bhatewara return err; 2403d1a890faSShreyas Bhatewara } 2404d1a890faSShreyas Bhatewara 2405d1a890faSShreyas Bhatewara 2406d1a890faSShreyas Bhatewara static void 2407d1a890faSShreyas Bhatewara vmxnet3_free_pci_resources(struct vmxnet3_adapter *adapter) 2408d1a890faSShreyas Bhatewara { 2409d1a890faSShreyas Bhatewara BUG_ON(!adapter->pdev); 2410d1a890faSShreyas Bhatewara 2411d1a890faSShreyas Bhatewara iounmap(adapter->hw_addr0); 2412d1a890faSShreyas Bhatewara iounmap(adapter->hw_addr1); 2413d1a890faSShreyas Bhatewara pci_release_selected_regions(adapter->pdev, (1 << 2) - 1); 2414d1a890faSShreyas Bhatewara pci_disable_device(adapter->pdev); 2415d1a890faSShreyas Bhatewara } 2416d1a890faSShreyas Bhatewara 2417d1a890faSShreyas Bhatewara 2418d1a890faSShreyas Bhatewara static void 2419d1a890faSShreyas Bhatewara vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter) 2420d1a890faSShreyas Bhatewara { 242109c5088eSShreyas Bhatewara size_t sz, i, ring0_size, ring1_size, comp_size; 242209c5088eSShreyas Bhatewara struct vmxnet3_rx_queue *rq = &adapter->rx_queue[0]; 242309c5088eSShreyas Bhatewara 2424d1a890faSShreyas Bhatewara 2425d1a890faSShreyas Bhatewara if (adapter->netdev->mtu <= VMXNET3_MAX_SKB_BUF_SIZE - 2426d1a890faSShreyas Bhatewara VMXNET3_MAX_ETH_HDR_SIZE) { 2427d1a890faSShreyas Bhatewara adapter->skb_buf_size = adapter->netdev->mtu + 2428d1a890faSShreyas Bhatewara VMXNET3_MAX_ETH_HDR_SIZE; 2429d1a890faSShreyas Bhatewara if (adapter->skb_buf_size < VMXNET3_MIN_T0_BUF_SIZE) 2430d1a890faSShreyas Bhatewara adapter->skb_buf_size = VMXNET3_MIN_T0_BUF_SIZE; 2431d1a890faSShreyas Bhatewara 2432d1a890faSShreyas Bhatewara adapter->rx_buf_per_pkt = 1; 2433d1a890faSShreyas Bhatewara } else { 2434d1a890faSShreyas Bhatewara adapter->skb_buf_size = VMXNET3_MAX_SKB_BUF_SIZE; 2435d1a890faSShreyas Bhatewara sz = adapter->netdev->mtu - VMXNET3_MAX_SKB_BUF_SIZE + 2436d1a890faSShreyas Bhatewara VMXNET3_MAX_ETH_HDR_SIZE; 2437d1a890faSShreyas Bhatewara adapter->rx_buf_per_pkt = 1 + (sz + PAGE_SIZE - 1) / PAGE_SIZE; 2438d1a890faSShreyas Bhatewara } 2439d1a890faSShreyas Bhatewara 2440d1a890faSShreyas Bhatewara /* 2441d1a890faSShreyas Bhatewara * for simplicity, force the ring0 size to be a multiple of 2442d1a890faSShreyas Bhatewara * rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN 2443d1a890faSShreyas Bhatewara */ 2444d1a890faSShreyas Bhatewara sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN; 244509c5088eSShreyas Bhatewara ring0_size = adapter->rx_queue[0].rx_ring[0].size; 244609c5088eSShreyas Bhatewara ring0_size = (ring0_size + sz - 1) / sz * sz; 2447a53255d3SShreyas Bhatewara ring0_size = min_t(u32, ring0_size, VMXNET3_RX_RING_MAX_SIZE / 244809c5088eSShreyas Bhatewara sz * sz); 244909c5088eSShreyas Bhatewara ring1_size = adapter->rx_queue[0].rx_ring[1].size; 245009c5088eSShreyas Bhatewara comp_size = ring0_size + ring1_size; 245109c5088eSShreyas Bhatewara 245209c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 245309c5088eSShreyas Bhatewara rq = &adapter->rx_queue[i]; 245409c5088eSShreyas Bhatewara rq->rx_ring[0].size = ring0_size; 245509c5088eSShreyas Bhatewara rq->rx_ring[1].size = ring1_size; 245609c5088eSShreyas Bhatewara rq->comp_ring.size = comp_size; 245709c5088eSShreyas Bhatewara } 2458d1a890faSShreyas Bhatewara } 2459d1a890faSShreyas Bhatewara 2460d1a890faSShreyas Bhatewara 2461d1a890faSShreyas Bhatewara int 2462d1a890faSShreyas Bhatewara vmxnet3_create_queues(struct vmxnet3_adapter *adapter, u32 tx_ring_size, 2463d1a890faSShreyas Bhatewara u32 rx_ring_size, u32 rx_ring2_size) 2464d1a890faSShreyas Bhatewara { 246509c5088eSShreyas Bhatewara int err = 0, i; 2466d1a890faSShreyas Bhatewara 246709c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) { 246809c5088eSShreyas Bhatewara struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i]; 246909c5088eSShreyas Bhatewara tq->tx_ring.size = tx_ring_size; 247009c5088eSShreyas Bhatewara tq->data_ring.size = tx_ring_size; 247109c5088eSShreyas Bhatewara tq->comp_ring.size = tx_ring_size; 247209c5088eSShreyas Bhatewara tq->shared = &adapter->tqd_start[i].ctrl; 247309c5088eSShreyas Bhatewara tq->stopped = true; 247409c5088eSShreyas Bhatewara tq->adapter = adapter; 247509c5088eSShreyas Bhatewara tq->qid = i; 247609c5088eSShreyas Bhatewara err = vmxnet3_tq_create(tq, adapter); 247709c5088eSShreyas Bhatewara /* 247809c5088eSShreyas Bhatewara * Too late to change num_tx_queues. We cannot do away with 247909c5088eSShreyas Bhatewara * lesser number of queues than what we asked for 248009c5088eSShreyas Bhatewara */ 2481d1a890faSShreyas Bhatewara if (err) 248209c5088eSShreyas Bhatewara goto queue_err; 248309c5088eSShreyas Bhatewara } 2484d1a890faSShreyas Bhatewara 248509c5088eSShreyas Bhatewara adapter->rx_queue[0].rx_ring[0].size = rx_ring_size; 248609c5088eSShreyas Bhatewara adapter->rx_queue[0].rx_ring[1].size = rx_ring2_size; 2487d1a890faSShreyas Bhatewara vmxnet3_adjust_rx_ring_size(adapter); 248809c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 248909c5088eSShreyas Bhatewara struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i]; 249009c5088eSShreyas Bhatewara /* qid and qid2 for rx queues will be assigned later when num 249109c5088eSShreyas Bhatewara * of rx queues is finalized after allocating intrs */ 249209c5088eSShreyas Bhatewara rq->shared = &adapter->rqd_start[i].ctrl; 249309c5088eSShreyas Bhatewara rq->adapter = adapter; 249409c5088eSShreyas Bhatewara err = vmxnet3_rq_create(rq, adapter); 249509c5088eSShreyas Bhatewara if (err) { 249609c5088eSShreyas Bhatewara if (i == 0) { 249709c5088eSShreyas Bhatewara printk(KERN_ERR "Could not allocate any rx" 249809c5088eSShreyas Bhatewara "queues. Aborting.\n"); 249909c5088eSShreyas Bhatewara goto queue_err; 250009c5088eSShreyas Bhatewara } else { 250109c5088eSShreyas Bhatewara printk(KERN_INFO "Number of rx queues changed " 250209c5088eSShreyas Bhatewara "to : %d.\n", i); 250309c5088eSShreyas Bhatewara adapter->num_rx_queues = i; 250409c5088eSShreyas Bhatewara err = 0; 250509c5088eSShreyas Bhatewara break; 250609c5088eSShreyas Bhatewara } 250709c5088eSShreyas Bhatewara } 250809c5088eSShreyas Bhatewara } 250909c5088eSShreyas Bhatewara return err; 251009c5088eSShreyas Bhatewara queue_err: 251109c5088eSShreyas Bhatewara vmxnet3_tq_destroy_all(adapter); 2512d1a890faSShreyas Bhatewara return err; 2513d1a890faSShreyas Bhatewara } 2514d1a890faSShreyas Bhatewara 2515d1a890faSShreyas Bhatewara static int 2516d1a890faSShreyas Bhatewara vmxnet3_open(struct net_device *netdev) 2517d1a890faSShreyas Bhatewara { 2518d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter; 251909c5088eSShreyas Bhatewara int err, i; 2520d1a890faSShreyas Bhatewara 2521d1a890faSShreyas Bhatewara adapter = netdev_priv(netdev); 2522d1a890faSShreyas Bhatewara 252309c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 252409c5088eSShreyas Bhatewara spin_lock_init(&adapter->tx_queue[i].tx_lock); 2525d1a890faSShreyas Bhatewara 2526d1a890faSShreyas Bhatewara err = vmxnet3_create_queues(adapter, VMXNET3_DEF_TX_RING_SIZE, 2527d1a890faSShreyas Bhatewara VMXNET3_DEF_RX_RING_SIZE, 2528d1a890faSShreyas Bhatewara VMXNET3_DEF_RX_RING_SIZE); 2529d1a890faSShreyas Bhatewara if (err) 2530d1a890faSShreyas Bhatewara goto queue_err; 2531d1a890faSShreyas Bhatewara 2532d1a890faSShreyas Bhatewara err = vmxnet3_activate_dev(adapter); 2533d1a890faSShreyas Bhatewara if (err) 2534d1a890faSShreyas Bhatewara goto activate_err; 2535d1a890faSShreyas Bhatewara 2536d1a890faSShreyas Bhatewara return 0; 2537d1a890faSShreyas Bhatewara 2538d1a890faSShreyas Bhatewara activate_err: 253909c5088eSShreyas Bhatewara vmxnet3_rq_destroy_all(adapter); 254009c5088eSShreyas Bhatewara vmxnet3_tq_destroy_all(adapter); 2541d1a890faSShreyas Bhatewara queue_err: 2542d1a890faSShreyas Bhatewara return err; 2543d1a890faSShreyas Bhatewara } 2544d1a890faSShreyas Bhatewara 2545d1a890faSShreyas Bhatewara 2546d1a890faSShreyas Bhatewara static int 2547d1a890faSShreyas Bhatewara vmxnet3_close(struct net_device *netdev) 2548d1a890faSShreyas Bhatewara { 2549d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2550d1a890faSShreyas Bhatewara 2551d1a890faSShreyas Bhatewara /* 2552d1a890faSShreyas Bhatewara * Reset_work may be in the middle of resetting the device, wait for its 2553d1a890faSShreyas Bhatewara * completion. 2554d1a890faSShreyas Bhatewara */ 2555d1a890faSShreyas Bhatewara while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)) 2556d1a890faSShreyas Bhatewara msleep(1); 2557d1a890faSShreyas Bhatewara 2558d1a890faSShreyas Bhatewara vmxnet3_quiesce_dev(adapter); 2559d1a890faSShreyas Bhatewara 256009c5088eSShreyas Bhatewara vmxnet3_rq_destroy_all(adapter); 256109c5088eSShreyas Bhatewara vmxnet3_tq_destroy_all(adapter); 2562d1a890faSShreyas Bhatewara 2563d1a890faSShreyas Bhatewara clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state); 2564d1a890faSShreyas Bhatewara 2565d1a890faSShreyas Bhatewara 2566d1a890faSShreyas Bhatewara return 0; 2567d1a890faSShreyas Bhatewara } 2568d1a890faSShreyas Bhatewara 2569d1a890faSShreyas Bhatewara 2570d1a890faSShreyas Bhatewara void 2571d1a890faSShreyas Bhatewara vmxnet3_force_close(struct vmxnet3_adapter *adapter) 2572d1a890faSShreyas Bhatewara { 257309c5088eSShreyas Bhatewara int i; 257409c5088eSShreyas Bhatewara 2575d1a890faSShreyas Bhatewara /* 2576d1a890faSShreyas Bhatewara * we must clear VMXNET3_STATE_BIT_RESETTING, otherwise 2577d1a890faSShreyas Bhatewara * vmxnet3_close() will deadlock. 2578d1a890faSShreyas Bhatewara */ 2579d1a890faSShreyas Bhatewara BUG_ON(test_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)); 2580d1a890faSShreyas Bhatewara 2581d1a890faSShreyas Bhatewara /* we need to enable NAPI, otherwise dev_close will deadlock */ 258209c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 258309c5088eSShreyas Bhatewara napi_enable(&adapter->rx_queue[i].napi); 2584d1a890faSShreyas Bhatewara dev_close(adapter->netdev); 2585d1a890faSShreyas Bhatewara } 2586d1a890faSShreyas Bhatewara 2587d1a890faSShreyas Bhatewara 2588d1a890faSShreyas Bhatewara static int 2589d1a890faSShreyas Bhatewara vmxnet3_change_mtu(struct net_device *netdev, int new_mtu) 2590d1a890faSShreyas Bhatewara { 2591d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2592d1a890faSShreyas Bhatewara int err = 0; 2593d1a890faSShreyas Bhatewara 2594d1a890faSShreyas Bhatewara if (new_mtu < VMXNET3_MIN_MTU || new_mtu > VMXNET3_MAX_MTU) 2595d1a890faSShreyas Bhatewara return -EINVAL; 2596d1a890faSShreyas Bhatewara 2597d1a890faSShreyas Bhatewara netdev->mtu = new_mtu; 2598d1a890faSShreyas Bhatewara 2599d1a890faSShreyas Bhatewara /* 2600d1a890faSShreyas Bhatewara * Reset_work may be in the middle of resetting the device, wait for its 2601d1a890faSShreyas Bhatewara * completion. 2602d1a890faSShreyas Bhatewara */ 2603d1a890faSShreyas Bhatewara while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)) 2604d1a890faSShreyas Bhatewara msleep(1); 2605d1a890faSShreyas Bhatewara 2606d1a890faSShreyas Bhatewara if (netif_running(netdev)) { 2607d1a890faSShreyas Bhatewara vmxnet3_quiesce_dev(adapter); 2608d1a890faSShreyas Bhatewara vmxnet3_reset_dev(adapter); 2609d1a890faSShreyas Bhatewara 2610d1a890faSShreyas Bhatewara /* we need to re-create the rx queue based on the new mtu */ 261109c5088eSShreyas Bhatewara vmxnet3_rq_destroy_all(adapter); 2612d1a890faSShreyas Bhatewara vmxnet3_adjust_rx_ring_size(adapter); 261309c5088eSShreyas Bhatewara err = vmxnet3_rq_create_all(adapter); 2614d1a890faSShreyas Bhatewara if (err) { 261509c5088eSShreyas Bhatewara printk(KERN_ERR "%s: failed to re-create rx queues," 2616d1a890faSShreyas Bhatewara " error %d. Closing it.\n", netdev->name, err); 2617d1a890faSShreyas Bhatewara goto out; 2618d1a890faSShreyas Bhatewara } 2619d1a890faSShreyas Bhatewara 2620d1a890faSShreyas Bhatewara err = vmxnet3_activate_dev(adapter); 2621d1a890faSShreyas Bhatewara if (err) { 2622d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to re-activate, error %d. " 2623d1a890faSShreyas Bhatewara "Closing it\n", netdev->name, err); 2624d1a890faSShreyas Bhatewara goto out; 2625d1a890faSShreyas Bhatewara } 2626d1a890faSShreyas Bhatewara } 2627d1a890faSShreyas Bhatewara 2628d1a890faSShreyas Bhatewara out: 2629d1a890faSShreyas Bhatewara clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state); 2630d1a890faSShreyas Bhatewara if (err) 2631d1a890faSShreyas Bhatewara vmxnet3_force_close(adapter); 2632d1a890faSShreyas Bhatewara 2633d1a890faSShreyas Bhatewara return err; 2634d1a890faSShreyas Bhatewara } 2635d1a890faSShreyas Bhatewara 2636d1a890faSShreyas Bhatewara 2637d1a890faSShreyas Bhatewara static void 2638d1a890faSShreyas Bhatewara vmxnet3_declare_features(struct vmxnet3_adapter *adapter, bool dma64) 2639d1a890faSShreyas Bhatewara { 2640d1a890faSShreyas Bhatewara struct net_device *netdev = adapter->netdev; 2641d1a890faSShreyas Bhatewara 2642a0d2730cSMichał Mirosław netdev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM | 2643a0d2730cSMichał Mirosław NETIF_F_HW_CSUM | NETIF_F_HW_VLAN_TX | 2644a0d2730cSMichał Mirosław NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_LRO; 2645a0d2730cSMichał Mirosław if (dma64) 2646d1a890faSShreyas Bhatewara netdev->features |= NETIF_F_HIGHDMA; 2647a0d2730cSMichał Mirosław netdev->vlan_features = netdev->hw_features & ~NETIF_F_HW_VLAN_TX; 2648a0d2730cSMichał Mirosław netdev->features = netdev->hw_features | 2649a0d2730cSMichał Mirosław NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_FILTER; 2650d1a890faSShreyas Bhatewara 2651a0d2730cSMichał Mirosław netdev_info(adapter->netdev, 2652a0d2730cSMichał Mirosław "features: sg csum vlan jf tso tsoIPv6 lro%s\n", 2653a0d2730cSMichał Mirosław dma64 ? " highDMA" : ""); 2654d1a890faSShreyas Bhatewara } 2655d1a890faSShreyas Bhatewara 2656d1a890faSShreyas Bhatewara 2657d1a890faSShreyas Bhatewara static void 2658d1a890faSShreyas Bhatewara vmxnet3_read_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac) 2659d1a890faSShreyas Bhatewara { 2660d1a890faSShreyas Bhatewara u32 tmp; 2661d1a890faSShreyas Bhatewara 2662d1a890faSShreyas Bhatewara tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACL); 2663d1a890faSShreyas Bhatewara *(u32 *)mac = tmp; 2664d1a890faSShreyas Bhatewara 2665d1a890faSShreyas Bhatewara tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACH); 2666d1a890faSShreyas Bhatewara mac[4] = tmp & 0xff; 2667d1a890faSShreyas Bhatewara mac[5] = (tmp >> 8) & 0xff; 2668d1a890faSShreyas Bhatewara } 2669d1a890faSShreyas Bhatewara 267009c5088eSShreyas Bhatewara #ifdef CONFIG_PCI_MSI 267109c5088eSShreyas Bhatewara 267209c5088eSShreyas Bhatewara /* 267309c5088eSShreyas Bhatewara * Enable MSIx vectors. 267409c5088eSShreyas Bhatewara * Returns : 267509c5088eSShreyas Bhatewara * 0 on successful enabling of required vectors, 267625985edcSLucas De Marchi * VMXNET3_LINUX_MIN_MSIX_VECT when only minimum number of vectors required 267709c5088eSShreyas Bhatewara * could be enabled. 267809c5088eSShreyas Bhatewara * number of vectors which can be enabled otherwise (this number is smaller 267909c5088eSShreyas Bhatewara * than VMXNET3_LINUX_MIN_MSIX_VECT) 268009c5088eSShreyas Bhatewara */ 268109c5088eSShreyas Bhatewara 268209c5088eSShreyas Bhatewara static int 268309c5088eSShreyas Bhatewara vmxnet3_acquire_msix_vectors(struct vmxnet3_adapter *adapter, 268409c5088eSShreyas Bhatewara int vectors) 268509c5088eSShreyas Bhatewara { 268609c5088eSShreyas Bhatewara int err = 0, vector_threshold; 268709c5088eSShreyas Bhatewara vector_threshold = VMXNET3_LINUX_MIN_MSIX_VECT; 268809c5088eSShreyas Bhatewara 268909c5088eSShreyas Bhatewara while (vectors >= vector_threshold) { 269009c5088eSShreyas Bhatewara err = pci_enable_msix(adapter->pdev, adapter->intr.msix_entries, 269109c5088eSShreyas Bhatewara vectors); 269209c5088eSShreyas Bhatewara if (!err) { 269309c5088eSShreyas Bhatewara adapter->intr.num_intrs = vectors; 269409c5088eSShreyas Bhatewara return 0; 269509c5088eSShreyas Bhatewara } else if (err < 0) { 269609c5088eSShreyas Bhatewara printk(KERN_ERR "Failed to enable MSI-X for %s, error" 269709c5088eSShreyas Bhatewara " %d\n", adapter->netdev->name, err); 269809c5088eSShreyas Bhatewara vectors = 0; 269909c5088eSShreyas Bhatewara } else if (err < vector_threshold) { 270009c5088eSShreyas Bhatewara break; 270109c5088eSShreyas Bhatewara } else { 270209c5088eSShreyas Bhatewara /* If fails to enable required number of MSI-x vectors 27037e96fbf2SShreyas Bhatewara * try enabling minimum number of vectors required. 270409c5088eSShreyas Bhatewara */ 270509c5088eSShreyas Bhatewara vectors = vector_threshold; 270609c5088eSShreyas Bhatewara printk(KERN_ERR "Failed to enable %d MSI-X for %s, try" 270709c5088eSShreyas Bhatewara " %d instead\n", vectors, adapter->netdev->name, 270809c5088eSShreyas Bhatewara vector_threshold); 270909c5088eSShreyas Bhatewara } 271009c5088eSShreyas Bhatewara } 271109c5088eSShreyas Bhatewara 271209c5088eSShreyas Bhatewara printk(KERN_INFO "Number of MSI-X interrupts which can be allocatedi" 271309c5088eSShreyas Bhatewara " are lower than min threshold required.\n"); 271409c5088eSShreyas Bhatewara return err; 271509c5088eSShreyas Bhatewara } 271609c5088eSShreyas Bhatewara 271709c5088eSShreyas Bhatewara 271809c5088eSShreyas Bhatewara #endif /* CONFIG_PCI_MSI */ 2719d1a890faSShreyas Bhatewara 2720d1a890faSShreyas Bhatewara static void 2721d1a890faSShreyas Bhatewara vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter) 2722d1a890faSShreyas Bhatewara { 2723d1a890faSShreyas Bhatewara u32 cfg; 2724e328d410SRoland Dreier unsigned long flags; 2725d1a890faSShreyas Bhatewara 2726d1a890faSShreyas Bhatewara /* intr settings */ 2727e328d410SRoland Dreier spin_lock_irqsave(&adapter->cmd_lock, flags); 2728d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2729d1a890faSShreyas Bhatewara VMXNET3_CMD_GET_CONF_INTR); 2730d1a890faSShreyas Bhatewara cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 2731e328d410SRoland Dreier spin_unlock_irqrestore(&adapter->cmd_lock, flags); 2732d1a890faSShreyas Bhatewara adapter->intr.type = cfg & 0x3; 2733d1a890faSShreyas Bhatewara adapter->intr.mask_mode = (cfg >> 2) & 0x3; 2734d1a890faSShreyas Bhatewara 2735d1a890faSShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_AUTO) { 27360bdc0d70SShreyas Bhatewara adapter->intr.type = VMXNET3_IT_MSIX; 27370bdc0d70SShreyas Bhatewara } 2738d1a890faSShreyas Bhatewara 27398f7e524cSRandy Dunlap #ifdef CONFIG_PCI_MSI 27400bdc0d70SShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_MSIX) { 274109c5088eSShreyas Bhatewara int vector, err = 0; 27420bdc0d70SShreyas Bhatewara 274309c5088eSShreyas Bhatewara adapter->intr.num_intrs = (adapter->share_intr == 274409c5088eSShreyas Bhatewara VMXNET3_INTR_TXSHARE) ? 1 : 274509c5088eSShreyas Bhatewara adapter->num_tx_queues; 274609c5088eSShreyas Bhatewara adapter->intr.num_intrs += (adapter->share_intr == 274709c5088eSShreyas Bhatewara VMXNET3_INTR_BUDDYSHARE) ? 0 : 274809c5088eSShreyas Bhatewara adapter->num_rx_queues; 274909c5088eSShreyas Bhatewara adapter->intr.num_intrs += 1; /* for link event */ 275009c5088eSShreyas Bhatewara 275109c5088eSShreyas Bhatewara adapter->intr.num_intrs = (adapter->intr.num_intrs > 275209c5088eSShreyas Bhatewara VMXNET3_LINUX_MIN_MSIX_VECT 275309c5088eSShreyas Bhatewara ? adapter->intr.num_intrs : 275409c5088eSShreyas Bhatewara VMXNET3_LINUX_MIN_MSIX_VECT); 275509c5088eSShreyas Bhatewara 275609c5088eSShreyas Bhatewara for (vector = 0; vector < adapter->intr.num_intrs; vector++) 275709c5088eSShreyas Bhatewara adapter->intr.msix_entries[vector].entry = vector; 275809c5088eSShreyas Bhatewara 275909c5088eSShreyas Bhatewara err = vmxnet3_acquire_msix_vectors(adapter, 276009c5088eSShreyas Bhatewara adapter->intr.num_intrs); 276109c5088eSShreyas Bhatewara /* If we cannot allocate one MSIx vector per queue 276209c5088eSShreyas Bhatewara * then limit the number of rx queues to 1 276309c5088eSShreyas Bhatewara */ 276409c5088eSShreyas Bhatewara if (err == VMXNET3_LINUX_MIN_MSIX_VECT) { 276509c5088eSShreyas Bhatewara if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE 27667e96fbf2SShreyas Bhatewara || adapter->num_rx_queues != 1) { 276709c5088eSShreyas Bhatewara adapter->share_intr = VMXNET3_INTR_TXSHARE; 276809c5088eSShreyas Bhatewara printk(KERN_ERR "Number of rx queues : 1\n"); 276909c5088eSShreyas Bhatewara adapter->num_rx_queues = 1; 277009c5088eSShreyas Bhatewara adapter->intr.num_intrs = 277109c5088eSShreyas Bhatewara VMXNET3_LINUX_MIN_MSIX_VECT; 277209c5088eSShreyas Bhatewara } 2773d1a890faSShreyas Bhatewara return; 2774d1a890faSShreyas Bhatewara } 277509c5088eSShreyas Bhatewara if (!err) 277609c5088eSShreyas Bhatewara return; 277709c5088eSShreyas Bhatewara 277809c5088eSShreyas Bhatewara /* If we cannot allocate MSIx vectors use only one rx queue */ 277909c5088eSShreyas Bhatewara printk(KERN_INFO "Failed to enable MSI-X for %s, error %d." 278009c5088eSShreyas Bhatewara "#rx queues : 1, try MSI\n", adapter->netdev->name, err); 278109c5088eSShreyas Bhatewara 27820bdc0d70SShreyas Bhatewara adapter->intr.type = VMXNET3_IT_MSI; 27830bdc0d70SShreyas Bhatewara } 2784d1a890faSShreyas Bhatewara 27850bdc0d70SShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_MSI) { 27860bdc0d70SShreyas Bhatewara int err; 2787d1a890faSShreyas Bhatewara err = pci_enable_msi(adapter->pdev); 2788d1a890faSShreyas Bhatewara if (!err) { 278909c5088eSShreyas Bhatewara adapter->num_rx_queues = 1; 2790d1a890faSShreyas Bhatewara adapter->intr.num_intrs = 1; 2791d1a890faSShreyas Bhatewara return; 2792d1a890faSShreyas Bhatewara } 2793d1a890faSShreyas Bhatewara } 27940bdc0d70SShreyas Bhatewara #endif /* CONFIG_PCI_MSI */ 2795d1a890faSShreyas Bhatewara 279609c5088eSShreyas Bhatewara adapter->num_rx_queues = 1; 279709c5088eSShreyas Bhatewara printk(KERN_INFO "Using INTx interrupt, #Rx queues: 1.\n"); 2798d1a890faSShreyas Bhatewara adapter->intr.type = VMXNET3_IT_INTX; 2799d1a890faSShreyas Bhatewara 2800d1a890faSShreyas Bhatewara /* INT-X related setting */ 2801d1a890faSShreyas Bhatewara adapter->intr.num_intrs = 1; 2802d1a890faSShreyas Bhatewara } 2803d1a890faSShreyas Bhatewara 2804d1a890faSShreyas Bhatewara 2805d1a890faSShreyas Bhatewara static void 2806d1a890faSShreyas Bhatewara vmxnet3_free_intr_resources(struct vmxnet3_adapter *adapter) 2807d1a890faSShreyas Bhatewara { 2808d1a890faSShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_MSIX) 2809d1a890faSShreyas Bhatewara pci_disable_msix(adapter->pdev); 2810d1a890faSShreyas Bhatewara else if (adapter->intr.type == VMXNET3_IT_MSI) 2811d1a890faSShreyas Bhatewara pci_disable_msi(adapter->pdev); 2812d1a890faSShreyas Bhatewara else 2813d1a890faSShreyas Bhatewara BUG_ON(adapter->intr.type != VMXNET3_IT_INTX); 2814d1a890faSShreyas Bhatewara } 2815d1a890faSShreyas Bhatewara 2816d1a890faSShreyas Bhatewara 2817d1a890faSShreyas Bhatewara static void 2818d1a890faSShreyas Bhatewara vmxnet3_tx_timeout(struct net_device *netdev) 2819d1a890faSShreyas Bhatewara { 2820d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2821d1a890faSShreyas Bhatewara adapter->tx_timeout_count++; 2822d1a890faSShreyas Bhatewara 2823d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: tx hang\n", adapter->netdev->name); 2824d1a890faSShreyas Bhatewara schedule_work(&adapter->work); 282509c5088eSShreyas Bhatewara netif_wake_queue(adapter->netdev); 2826d1a890faSShreyas Bhatewara } 2827d1a890faSShreyas Bhatewara 2828d1a890faSShreyas Bhatewara 2829d1a890faSShreyas Bhatewara static void 2830d1a890faSShreyas Bhatewara vmxnet3_reset_work(struct work_struct *data) 2831d1a890faSShreyas Bhatewara { 2832d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter; 2833d1a890faSShreyas Bhatewara 2834d1a890faSShreyas Bhatewara adapter = container_of(data, struct vmxnet3_adapter, work); 2835d1a890faSShreyas Bhatewara 2836d1a890faSShreyas Bhatewara /* if another thread is resetting the device, no need to proceed */ 2837d1a890faSShreyas Bhatewara if (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)) 2838d1a890faSShreyas Bhatewara return; 2839d1a890faSShreyas Bhatewara 2840d1a890faSShreyas Bhatewara /* if the device is closed, we must leave it alone */ 2841d9a5f210SShreyas Bhatewara rtnl_lock(); 2842d1a890faSShreyas Bhatewara if (netif_running(adapter->netdev)) { 2843d1a890faSShreyas Bhatewara printk(KERN_INFO "%s: resetting\n", adapter->netdev->name); 2844d1a890faSShreyas Bhatewara vmxnet3_quiesce_dev(adapter); 2845d1a890faSShreyas Bhatewara vmxnet3_reset_dev(adapter); 2846d1a890faSShreyas Bhatewara vmxnet3_activate_dev(adapter); 2847d1a890faSShreyas Bhatewara } else { 2848d1a890faSShreyas Bhatewara printk(KERN_INFO "%s: already closed\n", adapter->netdev->name); 2849d1a890faSShreyas Bhatewara } 2850d9a5f210SShreyas Bhatewara rtnl_unlock(); 2851d1a890faSShreyas Bhatewara 2852d1a890faSShreyas Bhatewara clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state); 2853d1a890faSShreyas Bhatewara } 2854d1a890faSShreyas Bhatewara 2855d1a890faSShreyas Bhatewara 2856d1a890faSShreyas Bhatewara static int __devinit 2857d1a890faSShreyas Bhatewara vmxnet3_probe_device(struct pci_dev *pdev, 2858d1a890faSShreyas Bhatewara const struct pci_device_id *id) 2859d1a890faSShreyas Bhatewara { 2860d1a890faSShreyas Bhatewara static const struct net_device_ops vmxnet3_netdev_ops = { 2861d1a890faSShreyas Bhatewara .ndo_open = vmxnet3_open, 2862d1a890faSShreyas Bhatewara .ndo_stop = vmxnet3_close, 2863d1a890faSShreyas Bhatewara .ndo_start_xmit = vmxnet3_xmit_frame, 2864d1a890faSShreyas Bhatewara .ndo_set_mac_address = vmxnet3_set_mac_addr, 2865d1a890faSShreyas Bhatewara .ndo_change_mtu = vmxnet3_change_mtu, 2866a0d2730cSMichał Mirosław .ndo_set_features = vmxnet3_set_features, 2867d1a890faSShreyas Bhatewara .ndo_get_stats = vmxnet3_get_stats, 2868d1a890faSShreyas Bhatewara .ndo_tx_timeout = vmxnet3_tx_timeout, 2869d1a890faSShreyas Bhatewara .ndo_set_multicast_list = vmxnet3_set_mc, 2870d1a890faSShreyas Bhatewara .ndo_vlan_rx_register = vmxnet3_vlan_rx_register, 2871d1a890faSShreyas Bhatewara .ndo_vlan_rx_add_vid = vmxnet3_vlan_rx_add_vid, 2872d1a890faSShreyas Bhatewara .ndo_vlan_rx_kill_vid = vmxnet3_vlan_rx_kill_vid, 2873d1a890faSShreyas Bhatewara #ifdef CONFIG_NET_POLL_CONTROLLER 2874d1a890faSShreyas Bhatewara .ndo_poll_controller = vmxnet3_netpoll, 2875d1a890faSShreyas Bhatewara #endif 2876d1a890faSShreyas Bhatewara }; 2877d1a890faSShreyas Bhatewara int err; 2878d1a890faSShreyas Bhatewara bool dma64 = false; /* stupid gcc */ 2879d1a890faSShreyas Bhatewara u32 ver; 2880d1a890faSShreyas Bhatewara struct net_device *netdev; 2881d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter; 2882d1a890faSShreyas Bhatewara u8 mac[ETH_ALEN]; 288309c5088eSShreyas Bhatewara int size; 288409c5088eSShreyas Bhatewara int num_tx_queues; 288509c5088eSShreyas Bhatewara int num_rx_queues; 2886d1a890faSShreyas Bhatewara 2887e154b639SShreyas Bhatewara if (!pci_msi_enabled()) 2888e154b639SShreyas Bhatewara enable_mq = 0; 2889e154b639SShreyas Bhatewara 289009c5088eSShreyas Bhatewara #ifdef VMXNET3_RSS 289109c5088eSShreyas Bhatewara if (enable_mq) 289209c5088eSShreyas Bhatewara num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES, 289309c5088eSShreyas Bhatewara (int)num_online_cpus()); 289409c5088eSShreyas Bhatewara else 289509c5088eSShreyas Bhatewara #endif 289609c5088eSShreyas Bhatewara num_rx_queues = 1; 289709c5088eSShreyas Bhatewara 289809c5088eSShreyas Bhatewara if (enable_mq) 289909c5088eSShreyas Bhatewara num_tx_queues = min(VMXNET3_DEVICE_MAX_TX_QUEUES, 290009c5088eSShreyas Bhatewara (int)num_online_cpus()); 290109c5088eSShreyas Bhatewara else 290209c5088eSShreyas Bhatewara num_tx_queues = 1; 290309c5088eSShreyas Bhatewara 290409c5088eSShreyas Bhatewara netdev = alloc_etherdev_mq(sizeof(struct vmxnet3_adapter), 290509c5088eSShreyas Bhatewara max(num_tx_queues, num_rx_queues)); 290609c5088eSShreyas Bhatewara printk(KERN_INFO "# of Tx queues : %d, # of Rx queues : %d\n", 290709c5088eSShreyas Bhatewara num_tx_queues, num_rx_queues); 290809c5088eSShreyas Bhatewara 2909d1a890faSShreyas Bhatewara if (!netdev) { 2910d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to alloc ethernet device for adapter " 2911d1a890faSShreyas Bhatewara "%s\n", pci_name(pdev)); 2912d1a890faSShreyas Bhatewara return -ENOMEM; 2913d1a890faSShreyas Bhatewara } 2914d1a890faSShreyas Bhatewara 2915d1a890faSShreyas Bhatewara pci_set_drvdata(pdev, netdev); 2916d1a890faSShreyas Bhatewara adapter = netdev_priv(netdev); 2917d1a890faSShreyas Bhatewara adapter->netdev = netdev; 2918d1a890faSShreyas Bhatewara adapter->pdev = pdev; 2919d1a890faSShreyas Bhatewara 292083d0feffSShreyas Bhatewara spin_lock_init(&adapter->cmd_lock); 2921d1a890faSShreyas Bhatewara adapter->shared = pci_alloc_consistent(adapter->pdev, 2922d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_DriverShared), 2923d1a890faSShreyas Bhatewara &adapter->shared_pa); 2924d1a890faSShreyas Bhatewara if (!adapter->shared) { 2925d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to allocate memory for %s\n", 2926d1a890faSShreyas Bhatewara pci_name(pdev)); 2927d1a890faSShreyas Bhatewara err = -ENOMEM; 2928d1a890faSShreyas Bhatewara goto err_alloc_shared; 2929d1a890faSShreyas Bhatewara } 2930d1a890faSShreyas Bhatewara 293109c5088eSShreyas Bhatewara adapter->num_rx_queues = num_rx_queues; 293209c5088eSShreyas Bhatewara adapter->num_tx_queues = num_tx_queues; 293309c5088eSShreyas Bhatewara 293409c5088eSShreyas Bhatewara size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues; 293509c5088eSShreyas Bhatewara size += sizeof(struct Vmxnet3_RxQueueDesc) * adapter->num_rx_queues; 293609c5088eSShreyas Bhatewara adapter->tqd_start = pci_alloc_consistent(adapter->pdev, size, 2937d1a890faSShreyas Bhatewara &adapter->queue_desc_pa); 2938d1a890faSShreyas Bhatewara 2939d1a890faSShreyas Bhatewara if (!adapter->tqd_start) { 2940d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to allocate memory for %s\n", 2941d1a890faSShreyas Bhatewara pci_name(pdev)); 2942d1a890faSShreyas Bhatewara err = -ENOMEM; 2943d1a890faSShreyas Bhatewara goto err_alloc_queue_desc; 2944d1a890faSShreyas Bhatewara } 294509c5088eSShreyas Bhatewara adapter->rqd_start = (struct Vmxnet3_RxQueueDesc *)(adapter->tqd_start + 294609c5088eSShreyas Bhatewara adapter->num_tx_queues); 2947d1a890faSShreyas Bhatewara 2948d1a890faSShreyas Bhatewara adapter->pm_conf = kmalloc(sizeof(struct Vmxnet3_PMConf), GFP_KERNEL); 2949d1a890faSShreyas Bhatewara if (adapter->pm_conf == NULL) { 2950d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to allocate memory for %s\n", 2951d1a890faSShreyas Bhatewara pci_name(pdev)); 2952d1a890faSShreyas Bhatewara err = -ENOMEM; 2953d1a890faSShreyas Bhatewara goto err_alloc_pm; 2954d1a890faSShreyas Bhatewara } 2955d1a890faSShreyas Bhatewara 295609c5088eSShreyas Bhatewara #ifdef VMXNET3_RSS 295709c5088eSShreyas Bhatewara 295809c5088eSShreyas Bhatewara adapter->rss_conf = kmalloc(sizeof(struct UPT1_RSSConf), GFP_KERNEL); 295909c5088eSShreyas Bhatewara if (adapter->rss_conf == NULL) { 296009c5088eSShreyas Bhatewara printk(KERN_ERR "Failed to allocate memory for %s\n", 296109c5088eSShreyas Bhatewara pci_name(pdev)); 296209c5088eSShreyas Bhatewara err = -ENOMEM; 296309c5088eSShreyas Bhatewara goto err_alloc_rss; 296409c5088eSShreyas Bhatewara } 296509c5088eSShreyas Bhatewara #endif /* VMXNET3_RSS */ 296609c5088eSShreyas Bhatewara 2967d1a890faSShreyas Bhatewara err = vmxnet3_alloc_pci_resources(adapter, &dma64); 2968d1a890faSShreyas Bhatewara if (err < 0) 2969d1a890faSShreyas Bhatewara goto err_alloc_pci; 2970d1a890faSShreyas Bhatewara 2971d1a890faSShreyas Bhatewara ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_VRRS); 2972d1a890faSShreyas Bhatewara if (ver & 1) { 2973d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_VRRS, 1); 2974d1a890faSShreyas Bhatewara } else { 2975d1a890faSShreyas Bhatewara printk(KERN_ERR "Incompatible h/w version (0x%x) for adapter" 2976d1a890faSShreyas Bhatewara " %s\n", ver, pci_name(pdev)); 2977d1a890faSShreyas Bhatewara err = -EBUSY; 2978d1a890faSShreyas Bhatewara goto err_ver; 2979d1a890faSShreyas Bhatewara } 2980d1a890faSShreyas Bhatewara 2981d1a890faSShreyas Bhatewara ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_UVRS); 2982d1a890faSShreyas Bhatewara if (ver & 1) { 2983d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_UVRS, 1); 2984d1a890faSShreyas Bhatewara } else { 2985d1a890faSShreyas Bhatewara printk(KERN_ERR "Incompatible upt version (0x%x) for " 2986d1a890faSShreyas Bhatewara "adapter %s\n", ver, pci_name(pdev)); 2987d1a890faSShreyas Bhatewara err = -EBUSY; 2988d1a890faSShreyas Bhatewara goto err_ver; 2989d1a890faSShreyas Bhatewara } 2990d1a890faSShreyas Bhatewara 2991d1a890faSShreyas Bhatewara vmxnet3_declare_features(adapter, dma64); 2992d1a890faSShreyas Bhatewara 2993d1a890faSShreyas Bhatewara adapter->dev_number = atomic_read(&devices_found); 299409c5088eSShreyas Bhatewara 299509c5088eSShreyas Bhatewara adapter->share_intr = irq_share_mode; 299609c5088eSShreyas Bhatewara if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE && 299709c5088eSShreyas Bhatewara adapter->num_tx_queues != adapter->num_rx_queues) 299809c5088eSShreyas Bhatewara adapter->share_intr = VMXNET3_INTR_DONTSHARE; 299909c5088eSShreyas Bhatewara 3000d1a890faSShreyas Bhatewara vmxnet3_alloc_intr_resources(adapter); 3001d1a890faSShreyas Bhatewara 300209c5088eSShreyas Bhatewara #ifdef VMXNET3_RSS 300309c5088eSShreyas Bhatewara if (adapter->num_rx_queues > 1 && 300409c5088eSShreyas Bhatewara adapter->intr.type == VMXNET3_IT_MSIX) { 300509c5088eSShreyas Bhatewara adapter->rss = true; 300609c5088eSShreyas Bhatewara printk(KERN_INFO "RSS is enabled.\n"); 300709c5088eSShreyas Bhatewara } else { 300809c5088eSShreyas Bhatewara adapter->rss = false; 300909c5088eSShreyas Bhatewara } 301009c5088eSShreyas Bhatewara #endif 301109c5088eSShreyas Bhatewara 3012d1a890faSShreyas Bhatewara vmxnet3_read_mac_addr(adapter, mac); 3013d1a890faSShreyas Bhatewara memcpy(netdev->dev_addr, mac, netdev->addr_len); 3014d1a890faSShreyas Bhatewara 3015d1a890faSShreyas Bhatewara netdev->netdev_ops = &vmxnet3_netdev_ops; 3016d1a890faSShreyas Bhatewara vmxnet3_set_ethtool_ops(netdev); 301709c5088eSShreyas Bhatewara netdev->watchdog_timeo = 5 * HZ; 3018d1a890faSShreyas Bhatewara 3019d1a890faSShreyas Bhatewara INIT_WORK(&adapter->work, vmxnet3_reset_work); 3020d1a890faSShreyas Bhatewara 302109c5088eSShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_MSIX) { 302209c5088eSShreyas Bhatewara int i; 302309c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 302409c5088eSShreyas Bhatewara netif_napi_add(adapter->netdev, 302509c5088eSShreyas Bhatewara &adapter->rx_queue[i].napi, 302609c5088eSShreyas Bhatewara vmxnet3_poll_rx_only, 64); 302709c5088eSShreyas Bhatewara } 302809c5088eSShreyas Bhatewara } else { 302909c5088eSShreyas Bhatewara netif_napi_add(adapter->netdev, &adapter->rx_queue[0].napi, 303009c5088eSShreyas Bhatewara vmxnet3_poll, 64); 303109c5088eSShreyas Bhatewara } 303209c5088eSShreyas Bhatewara 303309c5088eSShreyas Bhatewara netif_set_real_num_tx_queues(adapter->netdev, adapter->num_tx_queues); 303409c5088eSShreyas Bhatewara netif_set_real_num_rx_queues(adapter->netdev, adapter->num_rx_queues); 303509c5088eSShreyas Bhatewara 3036d1a890faSShreyas Bhatewara SET_NETDEV_DEV(netdev, &pdev->dev); 3037d1a890faSShreyas Bhatewara err = register_netdev(netdev); 3038d1a890faSShreyas Bhatewara 3039d1a890faSShreyas Bhatewara if (err) { 3040d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to register adapter %s\n", 3041d1a890faSShreyas Bhatewara pci_name(pdev)); 3042d1a890faSShreyas Bhatewara goto err_register; 3043d1a890faSShreyas Bhatewara } 3044d1a890faSShreyas Bhatewara 3045d1a890faSShreyas Bhatewara set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state); 30464a1745fcSShreyas Bhatewara vmxnet3_check_link(adapter, false); 3047d1a890faSShreyas Bhatewara atomic_inc(&devices_found); 3048d1a890faSShreyas Bhatewara return 0; 3049d1a890faSShreyas Bhatewara 3050d1a890faSShreyas Bhatewara err_register: 3051d1a890faSShreyas Bhatewara vmxnet3_free_intr_resources(adapter); 3052d1a890faSShreyas Bhatewara err_ver: 3053d1a890faSShreyas Bhatewara vmxnet3_free_pci_resources(adapter); 3054d1a890faSShreyas Bhatewara err_alloc_pci: 305509c5088eSShreyas Bhatewara #ifdef VMXNET3_RSS 305609c5088eSShreyas Bhatewara kfree(adapter->rss_conf); 305709c5088eSShreyas Bhatewara err_alloc_rss: 305809c5088eSShreyas Bhatewara #endif 3059d1a890faSShreyas Bhatewara kfree(adapter->pm_conf); 3060d1a890faSShreyas Bhatewara err_alloc_pm: 306109c5088eSShreyas Bhatewara pci_free_consistent(adapter->pdev, size, adapter->tqd_start, 306209c5088eSShreyas Bhatewara adapter->queue_desc_pa); 3063d1a890faSShreyas Bhatewara err_alloc_queue_desc: 3064d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared), 3065d1a890faSShreyas Bhatewara adapter->shared, adapter->shared_pa); 3066d1a890faSShreyas Bhatewara err_alloc_shared: 3067d1a890faSShreyas Bhatewara pci_set_drvdata(pdev, NULL); 3068d1a890faSShreyas Bhatewara free_netdev(netdev); 3069d1a890faSShreyas Bhatewara return err; 3070d1a890faSShreyas Bhatewara } 3071d1a890faSShreyas Bhatewara 3072d1a890faSShreyas Bhatewara 3073d1a890faSShreyas Bhatewara static void __devexit 3074d1a890faSShreyas Bhatewara vmxnet3_remove_device(struct pci_dev *pdev) 3075d1a890faSShreyas Bhatewara { 3076d1a890faSShreyas Bhatewara struct net_device *netdev = pci_get_drvdata(pdev); 3077d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 307809c5088eSShreyas Bhatewara int size = 0; 307909c5088eSShreyas Bhatewara int num_rx_queues; 308009c5088eSShreyas Bhatewara 308109c5088eSShreyas Bhatewara #ifdef VMXNET3_RSS 308209c5088eSShreyas Bhatewara if (enable_mq) 308309c5088eSShreyas Bhatewara num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES, 308409c5088eSShreyas Bhatewara (int)num_online_cpus()); 308509c5088eSShreyas Bhatewara else 308609c5088eSShreyas Bhatewara #endif 308709c5088eSShreyas Bhatewara num_rx_queues = 1; 3088d1a890faSShreyas Bhatewara 308923f333a2STejun Heo cancel_work_sync(&adapter->work); 3090d1a890faSShreyas Bhatewara 3091d1a890faSShreyas Bhatewara unregister_netdev(netdev); 3092d1a890faSShreyas Bhatewara 3093d1a890faSShreyas Bhatewara vmxnet3_free_intr_resources(adapter); 3094d1a890faSShreyas Bhatewara vmxnet3_free_pci_resources(adapter); 309509c5088eSShreyas Bhatewara #ifdef VMXNET3_RSS 309609c5088eSShreyas Bhatewara kfree(adapter->rss_conf); 309709c5088eSShreyas Bhatewara #endif 3098d1a890faSShreyas Bhatewara kfree(adapter->pm_conf); 309909c5088eSShreyas Bhatewara 310009c5088eSShreyas Bhatewara size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues; 310109c5088eSShreyas Bhatewara size += sizeof(struct Vmxnet3_RxQueueDesc) * num_rx_queues; 310209c5088eSShreyas Bhatewara pci_free_consistent(adapter->pdev, size, adapter->tqd_start, 310309c5088eSShreyas Bhatewara adapter->queue_desc_pa); 3104d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared), 3105d1a890faSShreyas Bhatewara adapter->shared, adapter->shared_pa); 3106d1a890faSShreyas Bhatewara free_netdev(netdev); 3107d1a890faSShreyas Bhatewara } 3108d1a890faSShreyas Bhatewara 3109d1a890faSShreyas Bhatewara 3110d1a890faSShreyas Bhatewara #ifdef CONFIG_PM 3111d1a890faSShreyas Bhatewara 3112d1a890faSShreyas Bhatewara static int 3113d1a890faSShreyas Bhatewara vmxnet3_suspend(struct device *device) 3114d1a890faSShreyas Bhatewara { 3115d1a890faSShreyas Bhatewara struct pci_dev *pdev = to_pci_dev(device); 3116d1a890faSShreyas Bhatewara struct net_device *netdev = pci_get_drvdata(pdev); 3117d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 3118d1a890faSShreyas Bhatewara struct Vmxnet3_PMConf *pmConf; 3119d1a890faSShreyas Bhatewara struct ethhdr *ehdr; 3120d1a890faSShreyas Bhatewara struct arphdr *ahdr; 3121d1a890faSShreyas Bhatewara u8 *arpreq; 3122d1a890faSShreyas Bhatewara struct in_device *in_dev; 3123d1a890faSShreyas Bhatewara struct in_ifaddr *ifa; 312483d0feffSShreyas Bhatewara unsigned long flags; 3125d1a890faSShreyas Bhatewara int i = 0; 3126d1a890faSShreyas Bhatewara 3127d1a890faSShreyas Bhatewara if (!netif_running(netdev)) 3128d1a890faSShreyas Bhatewara return 0; 3129d1a890faSShreyas Bhatewara 313051956cd6SShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 313151956cd6SShreyas Bhatewara napi_disable(&adapter->rx_queue[i].napi); 313251956cd6SShreyas Bhatewara 3133d1a890faSShreyas Bhatewara vmxnet3_disable_all_intrs(adapter); 3134d1a890faSShreyas Bhatewara vmxnet3_free_irqs(adapter); 3135d1a890faSShreyas Bhatewara vmxnet3_free_intr_resources(adapter); 3136d1a890faSShreyas Bhatewara 3137d1a890faSShreyas Bhatewara netif_device_detach(netdev); 313809c5088eSShreyas Bhatewara netif_tx_stop_all_queues(netdev); 3139d1a890faSShreyas Bhatewara 3140d1a890faSShreyas Bhatewara /* Create wake-up filters. */ 3141d1a890faSShreyas Bhatewara pmConf = adapter->pm_conf; 3142d1a890faSShreyas Bhatewara memset(pmConf, 0, sizeof(*pmConf)); 3143d1a890faSShreyas Bhatewara 3144d1a890faSShreyas Bhatewara if (adapter->wol & WAKE_UCAST) { 3145d1a890faSShreyas Bhatewara pmConf->filters[i].patternSize = ETH_ALEN; 3146d1a890faSShreyas Bhatewara pmConf->filters[i].maskSize = 1; 3147d1a890faSShreyas Bhatewara memcpy(pmConf->filters[i].pattern, netdev->dev_addr, ETH_ALEN); 3148d1a890faSShreyas Bhatewara pmConf->filters[i].mask[0] = 0x3F; /* LSB ETH_ALEN bits */ 3149d1a890faSShreyas Bhatewara 31503843e515SHarvey Harrison pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER; 3151d1a890faSShreyas Bhatewara i++; 3152d1a890faSShreyas Bhatewara } 3153d1a890faSShreyas Bhatewara 3154d1a890faSShreyas Bhatewara if (adapter->wol & WAKE_ARP) { 3155d1a890faSShreyas Bhatewara in_dev = in_dev_get(netdev); 3156d1a890faSShreyas Bhatewara if (!in_dev) 3157d1a890faSShreyas Bhatewara goto skip_arp; 3158d1a890faSShreyas Bhatewara 3159d1a890faSShreyas Bhatewara ifa = (struct in_ifaddr *)in_dev->ifa_list; 3160d1a890faSShreyas Bhatewara if (!ifa) 3161d1a890faSShreyas Bhatewara goto skip_arp; 3162d1a890faSShreyas Bhatewara 3163d1a890faSShreyas Bhatewara pmConf->filters[i].patternSize = ETH_HLEN + /* Ethernet header*/ 3164d1a890faSShreyas Bhatewara sizeof(struct arphdr) + /* ARP header */ 3165d1a890faSShreyas Bhatewara 2 * ETH_ALEN + /* 2 Ethernet addresses*/ 3166d1a890faSShreyas Bhatewara 2 * sizeof(u32); /*2 IPv4 addresses */ 3167d1a890faSShreyas Bhatewara pmConf->filters[i].maskSize = 3168d1a890faSShreyas Bhatewara (pmConf->filters[i].patternSize - 1) / 8 + 1; 3169d1a890faSShreyas Bhatewara 3170d1a890faSShreyas Bhatewara /* ETH_P_ARP in Ethernet header. */ 3171d1a890faSShreyas Bhatewara ehdr = (struct ethhdr *)pmConf->filters[i].pattern; 3172d1a890faSShreyas Bhatewara ehdr->h_proto = htons(ETH_P_ARP); 3173d1a890faSShreyas Bhatewara 3174d1a890faSShreyas Bhatewara /* ARPOP_REQUEST in ARP header. */ 3175d1a890faSShreyas Bhatewara ahdr = (struct arphdr *)&pmConf->filters[i].pattern[ETH_HLEN]; 3176d1a890faSShreyas Bhatewara ahdr->ar_op = htons(ARPOP_REQUEST); 3177d1a890faSShreyas Bhatewara arpreq = (u8 *)(ahdr + 1); 3178d1a890faSShreyas Bhatewara 3179d1a890faSShreyas Bhatewara /* The Unicast IPv4 address in 'tip' field. */ 3180d1a890faSShreyas Bhatewara arpreq += 2 * ETH_ALEN + sizeof(u32); 3181d1a890faSShreyas Bhatewara *(u32 *)arpreq = ifa->ifa_address; 3182d1a890faSShreyas Bhatewara 3183d1a890faSShreyas Bhatewara /* The mask for the relevant bits. */ 3184d1a890faSShreyas Bhatewara pmConf->filters[i].mask[0] = 0x00; 3185d1a890faSShreyas Bhatewara pmConf->filters[i].mask[1] = 0x30; /* ETH_P_ARP */ 3186d1a890faSShreyas Bhatewara pmConf->filters[i].mask[2] = 0x30; /* ARPOP_REQUEST */ 3187d1a890faSShreyas Bhatewara pmConf->filters[i].mask[3] = 0x00; 3188d1a890faSShreyas Bhatewara pmConf->filters[i].mask[4] = 0xC0; /* IPv4 TIP */ 3189d1a890faSShreyas Bhatewara pmConf->filters[i].mask[5] = 0x03; /* IPv4 TIP */ 3190d1a890faSShreyas Bhatewara in_dev_put(in_dev); 3191d1a890faSShreyas Bhatewara 31923843e515SHarvey Harrison pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER; 3193d1a890faSShreyas Bhatewara i++; 3194d1a890faSShreyas Bhatewara } 3195d1a890faSShreyas Bhatewara 3196d1a890faSShreyas Bhatewara skip_arp: 3197d1a890faSShreyas Bhatewara if (adapter->wol & WAKE_MAGIC) 31983843e515SHarvey Harrison pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_MAGIC; 3199d1a890faSShreyas Bhatewara 3200d1a890faSShreyas Bhatewara pmConf->numFilters = i; 3201d1a890faSShreyas Bhatewara 3202115924b6SShreyas Bhatewara adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1); 3203115924b6SShreyas Bhatewara adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof( 3204115924b6SShreyas Bhatewara *pmConf)); 3205115924b6SShreyas Bhatewara adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys( 3206115924b6SShreyas Bhatewara pmConf)); 3207d1a890faSShreyas Bhatewara 320883d0feffSShreyas Bhatewara spin_lock_irqsave(&adapter->cmd_lock, flags); 3209d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 3210d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_PMCFG); 321183d0feffSShreyas Bhatewara spin_unlock_irqrestore(&adapter->cmd_lock, flags); 3212d1a890faSShreyas Bhatewara 3213d1a890faSShreyas Bhatewara pci_save_state(pdev); 3214d1a890faSShreyas Bhatewara pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND), 3215d1a890faSShreyas Bhatewara adapter->wol); 3216d1a890faSShreyas Bhatewara pci_disable_device(pdev); 3217d1a890faSShreyas Bhatewara pci_set_power_state(pdev, pci_choose_state(pdev, PMSG_SUSPEND)); 3218d1a890faSShreyas Bhatewara 3219d1a890faSShreyas Bhatewara return 0; 3220d1a890faSShreyas Bhatewara } 3221d1a890faSShreyas Bhatewara 3222d1a890faSShreyas Bhatewara 3223d1a890faSShreyas Bhatewara static int 3224d1a890faSShreyas Bhatewara vmxnet3_resume(struct device *device) 3225d1a890faSShreyas Bhatewara { 322651956cd6SShreyas Bhatewara int err, i = 0; 322783d0feffSShreyas Bhatewara unsigned long flags; 3228d1a890faSShreyas Bhatewara struct pci_dev *pdev = to_pci_dev(device); 3229d1a890faSShreyas Bhatewara struct net_device *netdev = pci_get_drvdata(pdev); 3230d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 3231d1a890faSShreyas Bhatewara struct Vmxnet3_PMConf *pmConf; 3232d1a890faSShreyas Bhatewara 3233d1a890faSShreyas Bhatewara if (!netif_running(netdev)) 3234d1a890faSShreyas Bhatewara return 0; 3235d1a890faSShreyas Bhatewara 3236d1a890faSShreyas Bhatewara /* Destroy wake-up filters. */ 3237d1a890faSShreyas Bhatewara pmConf = adapter->pm_conf; 3238d1a890faSShreyas Bhatewara memset(pmConf, 0, sizeof(*pmConf)); 3239d1a890faSShreyas Bhatewara 3240115924b6SShreyas Bhatewara adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1); 3241115924b6SShreyas Bhatewara adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof( 3242115924b6SShreyas Bhatewara *pmConf)); 32430561cf3dSHarvey Harrison adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys( 3244115924b6SShreyas Bhatewara pmConf)); 3245d1a890faSShreyas Bhatewara 3246d1a890faSShreyas Bhatewara netif_device_attach(netdev); 3247d1a890faSShreyas Bhatewara pci_set_power_state(pdev, PCI_D0); 3248d1a890faSShreyas Bhatewara pci_restore_state(pdev); 3249d1a890faSShreyas Bhatewara err = pci_enable_device_mem(pdev); 3250d1a890faSShreyas Bhatewara if (err != 0) 3251d1a890faSShreyas Bhatewara return err; 3252d1a890faSShreyas Bhatewara 3253d1a890faSShreyas Bhatewara pci_enable_wake(pdev, PCI_D0, 0); 3254d1a890faSShreyas Bhatewara 325583d0feffSShreyas Bhatewara spin_lock_irqsave(&adapter->cmd_lock, flags); 3256d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 3257d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_PMCFG); 325883d0feffSShreyas Bhatewara spin_unlock_irqrestore(&adapter->cmd_lock, flags); 3259d1a890faSShreyas Bhatewara vmxnet3_alloc_intr_resources(adapter); 3260d1a890faSShreyas Bhatewara vmxnet3_request_irqs(adapter); 326151956cd6SShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 326251956cd6SShreyas Bhatewara napi_enable(&adapter->rx_queue[i].napi); 3263d1a890faSShreyas Bhatewara vmxnet3_enable_all_intrs(adapter); 3264d1a890faSShreyas Bhatewara 3265d1a890faSShreyas Bhatewara return 0; 3266d1a890faSShreyas Bhatewara } 3267d1a890faSShreyas Bhatewara 326847145210SAlexey Dobriyan static const struct dev_pm_ops vmxnet3_pm_ops = { 3269d1a890faSShreyas Bhatewara .suspend = vmxnet3_suspend, 3270d1a890faSShreyas Bhatewara .resume = vmxnet3_resume, 3271d1a890faSShreyas Bhatewara }; 3272d1a890faSShreyas Bhatewara #endif 3273d1a890faSShreyas Bhatewara 3274d1a890faSShreyas Bhatewara static struct pci_driver vmxnet3_driver = { 3275d1a890faSShreyas Bhatewara .name = vmxnet3_driver_name, 3276d1a890faSShreyas Bhatewara .id_table = vmxnet3_pciid_table, 3277d1a890faSShreyas Bhatewara .probe = vmxnet3_probe_device, 3278d1a890faSShreyas Bhatewara .remove = __devexit_p(vmxnet3_remove_device), 3279d1a890faSShreyas Bhatewara #ifdef CONFIG_PM 3280d1a890faSShreyas Bhatewara .driver.pm = &vmxnet3_pm_ops, 3281d1a890faSShreyas Bhatewara #endif 3282d1a890faSShreyas Bhatewara }; 3283d1a890faSShreyas Bhatewara 3284d1a890faSShreyas Bhatewara 3285d1a890faSShreyas Bhatewara static int __init 3286d1a890faSShreyas Bhatewara vmxnet3_init_module(void) 3287d1a890faSShreyas Bhatewara { 3288d1a890faSShreyas Bhatewara printk(KERN_INFO "%s - version %s\n", VMXNET3_DRIVER_DESC, 3289d1a890faSShreyas Bhatewara VMXNET3_DRIVER_VERSION_REPORT); 3290d1a890faSShreyas Bhatewara return pci_register_driver(&vmxnet3_driver); 3291d1a890faSShreyas Bhatewara } 3292d1a890faSShreyas Bhatewara 3293d1a890faSShreyas Bhatewara module_init(vmxnet3_init_module); 3294d1a890faSShreyas Bhatewara 3295d1a890faSShreyas Bhatewara 3296d1a890faSShreyas Bhatewara static void 3297d1a890faSShreyas Bhatewara vmxnet3_exit_module(void) 3298d1a890faSShreyas Bhatewara { 3299d1a890faSShreyas Bhatewara pci_unregister_driver(&vmxnet3_driver); 3300d1a890faSShreyas Bhatewara } 3301d1a890faSShreyas Bhatewara 3302d1a890faSShreyas Bhatewara module_exit(vmxnet3_exit_module); 3303d1a890faSShreyas Bhatewara 3304d1a890faSShreyas Bhatewara MODULE_AUTHOR("VMware, Inc."); 3305d1a890faSShreyas Bhatewara MODULE_DESCRIPTION(VMXNET3_DRIVER_DESC); 3306d1a890faSShreyas Bhatewara MODULE_LICENSE("GPL v2"); 3307d1a890faSShreyas Bhatewara MODULE_VERSION(VMXNET3_DRIVER_VERSION_STRING); 3308