1d1a890faSShreyas Bhatewara /* 2d1a890faSShreyas Bhatewara * Linux driver for VMware's vmxnet3 ethernet NIC. 3d1a890faSShreyas Bhatewara * 4d1a890faSShreyas Bhatewara * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved. 5d1a890faSShreyas Bhatewara * 6d1a890faSShreyas Bhatewara * This program is free software; you can redistribute it and/or modify it 7d1a890faSShreyas Bhatewara * under the terms of the GNU General Public License as published by the 8d1a890faSShreyas Bhatewara * Free Software Foundation; version 2 of the License and no later version. 9d1a890faSShreyas Bhatewara * 10d1a890faSShreyas Bhatewara * This program is distributed in the hope that it will be useful, but 11d1a890faSShreyas Bhatewara * WITHOUT ANY WARRANTY; without even the implied warranty of 12d1a890faSShreyas Bhatewara * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 13d1a890faSShreyas Bhatewara * NON INFRINGEMENT. See the GNU General Public License for more 14d1a890faSShreyas Bhatewara * details. 15d1a890faSShreyas Bhatewara * 16d1a890faSShreyas Bhatewara * You should have received a copy of the GNU General Public License 17d1a890faSShreyas Bhatewara * along with this program; if not, write to the Free Software 18d1a890faSShreyas Bhatewara * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19d1a890faSShreyas Bhatewara * 20d1a890faSShreyas Bhatewara * The full GNU General Public License is included in this distribution in 21d1a890faSShreyas Bhatewara * the file called "COPYING". 22d1a890faSShreyas Bhatewara * 23d1a890faSShreyas Bhatewara * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com> 24d1a890faSShreyas Bhatewara * 25d1a890faSShreyas Bhatewara */ 26d1a890faSShreyas Bhatewara 27b038b040SStephen Rothwell #include <net/ip6_checksum.h> 28b038b040SStephen Rothwell 29d1a890faSShreyas Bhatewara #include "vmxnet3_int.h" 30d1a890faSShreyas Bhatewara 31d1a890faSShreyas Bhatewara char vmxnet3_driver_name[] = "vmxnet3"; 32d1a890faSShreyas Bhatewara #define VMXNET3_DRIVER_DESC "VMware vmxnet3 virtual NIC driver" 33d1a890faSShreyas Bhatewara 34d1a890faSShreyas Bhatewara /* 35d1a890faSShreyas Bhatewara * PCI Device ID Table 36d1a890faSShreyas Bhatewara * Last entry must be all 0s 37d1a890faSShreyas Bhatewara */ 38a3aa1884SAlexey Dobriyan static DEFINE_PCI_DEVICE_TABLE(vmxnet3_pciid_table) = { 39d1a890faSShreyas Bhatewara {PCI_VDEVICE(VMWARE, PCI_DEVICE_ID_VMWARE_VMXNET3)}, 40d1a890faSShreyas Bhatewara {0} 41d1a890faSShreyas Bhatewara }; 42d1a890faSShreyas Bhatewara 43d1a890faSShreyas Bhatewara MODULE_DEVICE_TABLE(pci, vmxnet3_pciid_table); 44d1a890faSShreyas Bhatewara 45d1a890faSShreyas Bhatewara static atomic_t devices_found; 46d1a890faSShreyas Bhatewara 4709c5088eSShreyas Bhatewara #define VMXNET3_MAX_DEVICES 10 4809c5088eSShreyas Bhatewara static int enable_mq = 1; 4909c5088eSShreyas Bhatewara static int irq_share_mode; 50d1a890faSShreyas Bhatewara 51d1a890faSShreyas Bhatewara /* 52d1a890faSShreyas Bhatewara * Enable/Disable the given intr 53d1a890faSShreyas Bhatewara */ 54d1a890faSShreyas Bhatewara static void 55d1a890faSShreyas Bhatewara vmxnet3_enable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx) 56d1a890faSShreyas Bhatewara { 57d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 0); 58d1a890faSShreyas Bhatewara } 59d1a890faSShreyas Bhatewara 60d1a890faSShreyas Bhatewara 61d1a890faSShreyas Bhatewara static void 62d1a890faSShreyas Bhatewara vmxnet3_disable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx) 63d1a890faSShreyas Bhatewara { 64d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 1); 65d1a890faSShreyas Bhatewara } 66d1a890faSShreyas Bhatewara 67d1a890faSShreyas Bhatewara 68d1a890faSShreyas Bhatewara /* 69d1a890faSShreyas Bhatewara * Enable/Disable all intrs used by the device 70d1a890faSShreyas Bhatewara */ 71d1a890faSShreyas Bhatewara static void 72d1a890faSShreyas Bhatewara vmxnet3_enable_all_intrs(struct vmxnet3_adapter *adapter) 73d1a890faSShreyas Bhatewara { 74d1a890faSShreyas Bhatewara int i; 75d1a890faSShreyas Bhatewara 76d1a890faSShreyas Bhatewara for (i = 0; i < adapter->intr.num_intrs; i++) 77d1a890faSShreyas Bhatewara vmxnet3_enable_intr(adapter, i); 786929fe8aSRonghua Zang adapter->shared->devRead.intrConf.intrCtrl &= 796929fe8aSRonghua Zang cpu_to_le32(~VMXNET3_IC_DISABLE_ALL); 80d1a890faSShreyas Bhatewara } 81d1a890faSShreyas Bhatewara 82d1a890faSShreyas Bhatewara 83d1a890faSShreyas Bhatewara static void 84d1a890faSShreyas Bhatewara vmxnet3_disable_all_intrs(struct vmxnet3_adapter *adapter) 85d1a890faSShreyas Bhatewara { 86d1a890faSShreyas Bhatewara int i; 87d1a890faSShreyas Bhatewara 886929fe8aSRonghua Zang adapter->shared->devRead.intrConf.intrCtrl |= 896929fe8aSRonghua Zang cpu_to_le32(VMXNET3_IC_DISABLE_ALL); 90d1a890faSShreyas Bhatewara for (i = 0; i < adapter->intr.num_intrs; i++) 91d1a890faSShreyas Bhatewara vmxnet3_disable_intr(adapter, i); 92d1a890faSShreyas Bhatewara } 93d1a890faSShreyas Bhatewara 94d1a890faSShreyas Bhatewara 95d1a890faSShreyas Bhatewara static void 96d1a890faSShreyas Bhatewara vmxnet3_ack_events(struct vmxnet3_adapter *adapter, u32 events) 97d1a890faSShreyas Bhatewara { 98d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_ECR, events); 99d1a890faSShreyas Bhatewara } 100d1a890faSShreyas Bhatewara 101d1a890faSShreyas Bhatewara 102d1a890faSShreyas Bhatewara static bool 103d1a890faSShreyas Bhatewara vmxnet3_tq_stopped(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 104d1a890faSShreyas Bhatewara { 10509c5088eSShreyas Bhatewara return tq->stopped; 106d1a890faSShreyas Bhatewara } 107d1a890faSShreyas Bhatewara 108d1a890faSShreyas Bhatewara 109d1a890faSShreyas Bhatewara static void 110d1a890faSShreyas Bhatewara vmxnet3_tq_start(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 111d1a890faSShreyas Bhatewara { 112d1a890faSShreyas Bhatewara tq->stopped = false; 11309c5088eSShreyas Bhatewara netif_start_subqueue(adapter->netdev, tq - adapter->tx_queue); 114d1a890faSShreyas Bhatewara } 115d1a890faSShreyas Bhatewara 116d1a890faSShreyas Bhatewara 117d1a890faSShreyas Bhatewara static void 118d1a890faSShreyas Bhatewara vmxnet3_tq_wake(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 119d1a890faSShreyas Bhatewara { 120d1a890faSShreyas Bhatewara tq->stopped = false; 12109c5088eSShreyas Bhatewara netif_wake_subqueue(adapter->netdev, (tq - adapter->tx_queue)); 122d1a890faSShreyas Bhatewara } 123d1a890faSShreyas Bhatewara 124d1a890faSShreyas Bhatewara 125d1a890faSShreyas Bhatewara static void 126d1a890faSShreyas Bhatewara vmxnet3_tq_stop(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 127d1a890faSShreyas Bhatewara { 128d1a890faSShreyas Bhatewara tq->stopped = true; 129d1a890faSShreyas Bhatewara tq->num_stop++; 13009c5088eSShreyas Bhatewara netif_stop_subqueue(adapter->netdev, (tq - adapter->tx_queue)); 131d1a890faSShreyas Bhatewara } 132d1a890faSShreyas Bhatewara 133d1a890faSShreyas Bhatewara 134d1a890faSShreyas Bhatewara /* 135d1a890faSShreyas Bhatewara * Check the link state. This may start or stop the tx queue. 136d1a890faSShreyas Bhatewara */ 137d1a890faSShreyas Bhatewara static void 1384a1745fcSShreyas Bhatewara vmxnet3_check_link(struct vmxnet3_adapter *adapter, bool affectTxQueue) 139d1a890faSShreyas Bhatewara { 140d1a890faSShreyas Bhatewara u32 ret; 14109c5088eSShreyas Bhatewara int i; 142d1a890faSShreyas Bhatewara 143d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK); 144d1a890faSShreyas Bhatewara ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 145d1a890faSShreyas Bhatewara adapter->link_speed = ret >> 16; 146d1a890faSShreyas Bhatewara if (ret & 1) { /* Link is up. */ 147d1a890faSShreyas Bhatewara printk(KERN_INFO "%s: NIC Link is Up %d Mbps\n", 148d1a890faSShreyas Bhatewara adapter->netdev->name, adapter->link_speed); 149d1a890faSShreyas Bhatewara if (!netif_carrier_ok(adapter->netdev)) 150d1a890faSShreyas Bhatewara netif_carrier_on(adapter->netdev); 151d1a890faSShreyas Bhatewara 15209c5088eSShreyas Bhatewara if (affectTxQueue) { 15309c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 15409c5088eSShreyas Bhatewara vmxnet3_tq_start(&adapter->tx_queue[i], 15509c5088eSShreyas Bhatewara adapter); 15609c5088eSShreyas Bhatewara } 157d1a890faSShreyas Bhatewara } else { 158d1a890faSShreyas Bhatewara printk(KERN_INFO "%s: NIC Link is Down\n", 159d1a890faSShreyas Bhatewara adapter->netdev->name); 160d1a890faSShreyas Bhatewara if (netif_carrier_ok(adapter->netdev)) 161d1a890faSShreyas Bhatewara netif_carrier_off(adapter->netdev); 162d1a890faSShreyas Bhatewara 16309c5088eSShreyas Bhatewara if (affectTxQueue) { 16409c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 16509c5088eSShreyas Bhatewara vmxnet3_tq_stop(&adapter->tx_queue[i], adapter); 16609c5088eSShreyas Bhatewara } 167d1a890faSShreyas Bhatewara } 168d1a890faSShreyas Bhatewara } 169d1a890faSShreyas Bhatewara 170d1a890faSShreyas Bhatewara static void 171d1a890faSShreyas Bhatewara vmxnet3_process_events(struct vmxnet3_adapter *adapter) 172d1a890faSShreyas Bhatewara { 17309c5088eSShreyas Bhatewara int i; 174115924b6SShreyas Bhatewara u32 events = le32_to_cpu(adapter->shared->ecr); 175d1a890faSShreyas Bhatewara if (!events) 176d1a890faSShreyas Bhatewara return; 177d1a890faSShreyas Bhatewara 178d1a890faSShreyas Bhatewara vmxnet3_ack_events(adapter, events); 179d1a890faSShreyas Bhatewara 180d1a890faSShreyas Bhatewara /* Check if link state has changed */ 181d1a890faSShreyas Bhatewara if (events & VMXNET3_ECR_LINK) 1824a1745fcSShreyas Bhatewara vmxnet3_check_link(adapter, true); 183d1a890faSShreyas Bhatewara 184d1a890faSShreyas Bhatewara /* Check if there is an error on xmit/recv queues */ 185d1a890faSShreyas Bhatewara if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) { 186d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 187d1a890faSShreyas Bhatewara VMXNET3_CMD_GET_QUEUE_STATUS); 188d1a890faSShreyas Bhatewara 18909c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 19009c5088eSShreyas Bhatewara if (adapter->tqd_start[i].status.stopped) 19109c5088eSShreyas Bhatewara dev_err(&adapter->netdev->dev, 19209c5088eSShreyas Bhatewara "%s: tq[%d] error 0x%x\n", 19309c5088eSShreyas Bhatewara adapter->netdev->name, i, le32_to_cpu( 19409c5088eSShreyas Bhatewara adapter->tqd_start[i].status.error)); 19509c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 19609c5088eSShreyas Bhatewara if (adapter->rqd_start[i].status.stopped) 19709c5088eSShreyas Bhatewara dev_err(&adapter->netdev->dev, 19809c5088eSShreyas Bhatewara "%s: rq[%d] error 0x%x\n", 19909c5088eSShreyas Bhatewara adapter->netdev->name, i, 20009c5088eSShreyas Bhatewara adapter->rqd_start[i].status.error); 201d1a890faSShreyas Bhatewara 202d1a890faSShreyas Bhatewara schedule_work(&adapter->work); 203d1a890faSShreyas Bhatewara } 204d1a890faSShreyas Bhatewara } 205d1a890faSShreyas Bhatewara 206115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 207115924b6SShreyas Bhatewara /* 208115924b6SShreyas Bhatewara * The device expects the bitfields in shared structures to be written in 209115924b6SShreyas Bhatewara * little endian. When CPU is big endian, the following routines are used to 210115924b6SShreyas Bhatewara * correctly read and write into ABI. 211115924b6SShreyas Bhatewara * The general technique used here is : double word bitfields are defined in 212115924b6SShreyas Bhatewara * opposite order for big endian architecture. Then before reading them in 213115924b6SShreyas Bhatewara * driver the complete double word is translated using le32_to_cpu. Similarly 214115924b6SShreyas Bhatewara * After the driver writes into bitfields, cpu_to_le32 is used to translate the 215115924b6SShreyas Bhatewara * double words into required format. 216115924b6SShreyas Bhatewara * In order to avoid touching bits in shared structure more than once, temporary 217115924b6SShreyas Bhatewara * descriptors are used. These are passed as srcDesc to following functions. 218115924b6SShreyas Bhatewara */ 219115924b6SShreyas Bhatewara static void vmxnet3_RxDescToCPU(const struct Vmxnet3_RxDesc *srcDesc, 220115924b6SShreyas Bhatewara struct Vmxnet3_RxDesc *dstDesc) 221115924b6SShreyas Bhatewara { 222115924b6SShreyas Bhatewara u32 *src = (u32 *)srcDesc + 2; 223115924b6SShreyas Bhatewara u32 *dst = (u32 *)dstDesc + 2; 224115924b6SShreyas Bhatewara dstDesc->addr = le64_to_cpu(srcDesc->addr); 225115924b6SShreyas Bhatewara *dst = le32_to_cpu(*src); 226115924b6SShreyas Bhatewara dstDesc->ext1 = le32_to_cpu(srcDesc->ext1); 227115924b6SShreyas Bhatewara } 228115924b6SShreyas Bhatewara 229115924b6SShreyas Bhatewara static void vmxnet3_TxDescToLe(const struct Vmxnet3_TxDesc *srcDesc, 230115924b6SShreyas Bhatewara struct Vmxnet3_TxDesc *dstDesc) 231115924b6SShreyas Bhatewara { 232115924b6SShreyas Bhatewara int i; 233115924b6SShreyas Bhatewara u32 *src = (u32 *)(srcDesc + 1); 234115924b6SShreyas Bhatewara u32 *dst = (u32 *)(dstDesc + 1); 235115924b6SShreyas Bhatewara 236115924b6SShreyas Bhatewara /* Working backwards so that the gen bit is set at the end. */ 237115924b6SShreyas Bhatewara for (i = 2; i > 0; i--) { 238115924b6SShreyas Bhatewara src--; 239115924b6SShreyas Bhatewara dst--; 240115924b6SShreyas Bhatewara *dst = cpu_to_le32(*src); 241115924b6SShreyas Bhatewara } 242115924b6SShreyas Bhatewara } 243115924b6SShreyas Bhatewara 244115924b6SShreyas Bhatewara 245115924b6SShreyas Bhatewara static void vmxnet3_RxCompToCPU(const struct Vmxnet3_RxCompDesc *srcDesc, 246115924b6SShreyas Bhatewara struct Vmxnet3_RxCompDesc *dstDesc) 247115924b6SShreyas Bhatewara { 248115924b6SShreyas Bhatewara int i = 0; 249115924b6SShreyas Bhatewara u32 *src = (u32 *)srcDesc; 250115924b6SShreyas Bhatewara u32 *dst = (u32 *)dstDesc; 251115924b6SShreyas Bhatewara for (i = 0; i < sizeof(struct Vmxnet3_RxCompDesc) / sizeof(u32); i++) { 252115924b6SShreyas Bhatewara *dst = le32_to_cpu(*src); 253115924b6SShreyas Bhatewara src++; 254115924b6SShreyas Bhatewara dst++; 255115924b6SShreyas Bhatewara } 256115924b6SShreyas Bhatewara } 257115924b6SShreyas Bhatewara 258115924b6SShreyas Bhatewara 259115924b6SShreyas Bhatewara /* Used to read bitfield values from double words. */ 260115924b6SShreyas Bhatewara static u32 get_bitfield32(const __le32 *bitfield, u32 pos, u32 size) 261115924b6SShreyas Bhatewara { 262115924b6SShreyas Bhatewara u32 temp = le32_to_cpu(*bitfield); 263115924b6SShreyas Bhatewara u32 mask = ((1 << size) - 1) << pos; 264115924b6SShreyas Bhatewara temp &= mask; 265115924b6SShreyas Bhatewara temp >>= pos; 266115924b6SShreyas Bhatewara return temp; 267115924b6SShreyas Bhatewara } 268115924b6SShreyas Bhatewara 269115924b6SShreyas Bhatewara 270115924b6SShreyas Bhatewara 271115924b6SShreyas Bhatewara #endif /* __BIG_ENDIAN_BITFIELD */ 272115924b6SShreyas Bhatewara 273115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 274115924b6SShreyas Bhatewara 275115924b6SShreyas Bhatewara # define VMXNET3_TXDESC_GET_GEN(txdesc) get_bitfield32(((const __le32 *) \ 276115924b6SShreyas Bhatewara txdesc) + VMXNET3_TXD_GEN_DWORD_SHIFT, \ 277115924b6SShreyas Bhatewara VMXNET3_TXD_GEN_SHIFT, VMXNET3_TXD_GEN_SIZE) 278115924b6SShreyas Bhatewara # define VMXNET3_TXDESC_GET_EOP(txdesc) get_bitfield32(((const __le32 *) \ 279115924b6SShreyas Bhatewara txdesc) + VMXNET3_TXD_EOP_DWORD_SHIFT, \ 280115924b6SShreyas Bhatewara VMXNET3_TXD_EOP_SHIFT, VMXNET3_TXD_EOP_SIZE) 281115924b6SShreyas Bhatewara # define VMXNET3_TCD_GET_GEN(tcd) get_bitfield32(((const __le32 *)tcd) + \ 282115924b6SShreyas Bhatewara VMXNET3_TCD_GEN_DWORD_SHIFT, VMXNET3_TCD_GEN_SHIFT, \ 283115924b6SShreyas Bhatewara VMXNET3_TCD_GEN_SIZE) 284115924b6SShreyas Bhatewara # define VMXNET3_TCD_GET_TXIDX(tcd) get_bitfield32((const __le32 *)tcd, \ 285115924b6SShreyas Bhatewara VMXNET3_TCD_TXIDX_SHIFT, VMXNET3_TCD_TXIDX_SIZE) 286115924b6SShreyas Bhatewara # define vmxnet3_getRxComp(dstrcd, rcd, tmp) do { \ 287115924b6SShreyas Bhatewara (dstrcd) = (tmp); \ 288115924b6SShreyas Bhatewara vmxnet3_RxCompToCPU((rcd), (tmp)); \ 289115924b6SShreyas Bhatewara } while (0) 290115924b6SShreyas Bhatewara # define vmxnet3_getRxDesc(dstrxd, rxd, tmp) do { \ 291115924b6SShreyas Bhatewara (dstrxd) = (tmp); \ 292115924b6SShreyas Bhatewara vmxnet3_RxDescToCPU((rxd), (tmp)); \ 293115924b6SShreyas Bhatewara } while (0) 294115924b6SShreyas Bhatewara 295115924b6SShreyas Bhatewara #else 296115924b6SShreyas Bhatewara 297115924b6SShreyas Bhatewara # define VMXNET3_TXDESC_GET_GEN(txdesc) ((txdesc)->gen) 298115924b6SShreyas Bhatewara # define VMXNET3_TXDESC_GET_EOP(txdesc) ((txdesc)->eop) 299115924b6SShreyas Bhatewara # define VMXNET3_TCD_GET_GEN(tcd) ((tcd)->gen) 300115924b6SShreyas Bhatewara # define VMXNET3_TCD_GET_TXIDX(tcd) ((tcd)->txdIdx) 301115924b6SShreyas Bhatewara # define vmxnet3_getRxComp(dstrcd, rcd, tmp) (dstrcd) = (rcd) 302115924b6SShreyas Bhatewara # define vmxnet3_getRxDesc(dstrxd, rxd, tmp) (dstrxd) = (rxd) 303115924b6SShreyas Bhatewara 304115924b6SShreyas Bhatewara #endif /* __BIG_ENDIAN_BITFIELD */ 305115924b6SShreyas Bhatewara 306d1a890faSShreyas Bhatewara 307d1a890faSShreyas Bhatewara static void 308d1a890faSShreyas Bhatewara vmxnet3_unmap_tx_buf(struct vmxnet3_tx_buf_info *tbi, 309d1a890faSShreyas Bhatewara struct pci_dev *pdev) 310d1a890faSShreyas Bhatewara { 311d1a890faSShreyas Bhatewara if (tbi->map_type == VMXNET3_MAP_SINGLE) 312d1a890faSShreyas Bhatewara pci_unmap_single(pdev, tbi->dma_addr, tbi->len, 313d1a890faSShreyas Bhatewara PCI_DMA_TODEVICE); 314d1a890faSShreyas Bhatewara else if (tbi->map_type == VMXNET3_MAP_PAGE) 315d1a890faSShreyas Bhatewara pci_unmap_page(pdev, tbi->dma_addr, tbi->len, 316d1a890faSShreyas Bhatewara PCI_DMA_TODEVICE); 317d1a890faSShreyas Bhatewara else 318d1a890faSShreyas Bhatewara BUG_ON(tbi->map_type != VMXNET3_MAP_NONE); 319d1a890faSShreyas Bhatewara 320d1a890faSShreyas Bhatewara tbi->map_type = VMXNET3_MAP_NONE; /* to help debugging */ 321d1a890faSShreyas Bhatewara } 322d1a890faSShreyas Bhatewara 323d1a890faSShreyas Bhatewara 324d1a890faSShreyas Bhatewara static int 325d1a890faSShreyas Bhatewara vmxnet3_unmap_pkt(u32 eop_idx, struct vmxnet3_tx_queue *tq, 326d1a890faSShreyas Bhatewara struct pci_dev *pdev, struct vmxnet3_adapter *adapter) 327d1a890faSShreyas Bhatewara { 328d1a890faSShreyas Bhatewara struct sk_buff *skb; 329d1a890faSShreyas Bhatewara int entries = 0; 330d1a890faSShreyas Bhatewara 331d1a890faSShreyas Bhatewara /* no out of order completion */ 332d1a890faSShreyas Bhatewara BUG_ON(tq->buf_info[eop_idx].sop_idx != tq->tx_ring.next2comp); 333115924b6SShreyas Bhatewara BUG_ON(VMXNET3_TXDESC_GET_EOP(&(tq->tx_ring.base[eop_idx].txd)) != 1); 334d1a890faSShreyas Bhatewara 335d1a890faSShreyas Bhatewara skb = tq->buf_info[eop_idx].skb; 336d1a890faSShreyas Bhatewara BUG_ON(skb == NULL); 337d1a890faSShreyas Bhatewara tq->buf_info[eop_idx].skb = NULL; 338d1a890faSShreyas Bhatewara 339d1a890faSShreyas Bhatewara VMXNET3_INC_RING_IDX_ONLY(eop_idx, tq->tx_ring.size); 340d1a890faSShreyas Bhatewara 341d1a890faSShreyas Bhatewara while (tq->tx_ring.next2comp != eop_idx) { 342d1a890faSShreyas Bhatewara vmxnet3_unmap_tx_buf(tq->buf_info + tq->tx_ring.next2comp, 343d1a890faSShreyas Bhatewara pdev); 344d1a890faSShreyas Bhatewara 345d1a890faSShreyas Bhatewara /* update next2comp w/o tx_lock. Since we are marking more, 346d1a890faSShreyas Bhatewara * instead of less, tx ring entries avail, the worst case is 347d1a890faSShreyas Bhatewara * that the tx routine incorrectly re-queues a pkt due to 348d1a890faSShreyas Bhatewara * insufficient tx ring entries. 349d1a890faSShreyas Bhatewara */ 350d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring); 351d1a890faSShreyas Bhatewara entries++; 352d1a890faSShreyas Bhatewara } 353d1a890faSShreyas Bhatewara 354d1a890faSShreyas Bhatewara dev_kfree_skb_any(skb); 355d1a890faSShreyas Bhatewara return entries; 356d1a890faSShreyas Bhatewara } 357d1a890faSShreyas Bhatewara 358d1a890faSShreyas Bhatewara 359d1a890faSShreyas Bhatewara static int 360d1a890faSShreyas Bhatewara vmxnet3_tq_tx_complete(struct vmxnet3_tx_queue *tq, 361d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 362d1a890faSShreyas Bhatewara { 363d1a890faSShreyas Bhatewara int completed = 0; 364d1a890faSShreyas Bhatewara union Vmxnet3_GenericDesc *gdesc; 365d1a890faSShreyas Bhatewara 366d1a890faSShreyas Bhatewara gdesc = tq->comp_ring.base + tq->comp_ring.next2proc; 367115924b6SShreyas Bhatewara while (VMXNET3_TCD_GET_GEN(&gdesc->tcd) == tq->comp_ring.gen) { 368115924b6SShreyas Bhatewara completed += vmxnet3_unmap_pkt(VMXNET3_TCD_GET_TXIDX( 369115924b6SShreyas Bhatewara &gdesc->tcd), tq, adapter->pdev, 370115924b6SShreyas Bhatewara adapter); 371d1a890faSShreyas Bhatewara 372d1a890faSShreyas Bhatewara vmxnet3_comp_ring_adv_next2proc(&tq->comp_ring); 373d1a890faSShreyas Bhatewara gdesc = tq->comp_ring.base + tq->comp_ring.next2proc; 374d1a890faSShreyas Bhatewara } 375d1a890faSShreyas Bhatewara 376d1a890faSShreyas Bhatewara if (completed) { 377d1a890faSShreyas Bhatewara spin_lock(&tq->tx_lock); 378d1a890faSShreyas Bhatewara if (unlikely(vmxnet3_tq_stopped(tq, adapter) && 379d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_desc_avail(&tq->tx_ring) > 380d1a890faSShreyas Bhatewara VMXNET3_WAKE_QUEUE_THRESHOLD(tq) && 381d1a890faSShreyas Bhatewara netif_carrier_ok(adapter->netdev))) { 382d1a890faSShreyas Bhatewara vmxnet3_tq_wake(tq, adapter); 383d1a890faSShreyas Bhatewara } 384d1a890faSShreyas Bhatewara spin_unlock(&tq->tx_lock); 385d1a890faSShreyas Bhatewara } 386d1a890faSShreyas Bhatewara return completed; 387d1a890faSShreyas Bhatewara } 388d1a890faSShreyas Bhatewara 389d1a890faSShreyas Bhatewara 390d1a890faSShreyas Bhatewara static void 391d1a890faSShreyas Bhatewara vmxnet3_tq_cleanup(struct vmxnet3_tx_queue *tq, 392d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 393d1a890faSShreyas Bhatewara { 394d1a890faSShreyas Bhatewara int i; 395d1a890faSShreyas Bhatewara 396d1a890faSShreyas Bhatewara while (tq->tx_ring.next2comp != tq->tx_ring.next2fill) { 397d1a890faSShreyas Bhatewara struct vmxnet3_tx_buf_info *tbi; 398d1a890faSShreyas Bhatewara union Vmxnet3_GenericDesc *gdesc; 399d1a890faSShreyas Bhatewara 400d1a890faSShreyas Bhatewara tbi = tq->buf_info + tq->tx_ring.next2comp; 401d1a890faSShreyas Bhatewara gdesc = tq->tx_ring.base + tq->tx_ring.next2comp; 402d1a890faSShreyas Bhatewara 403d1a890faSShreyas Bhatewara vmxnet3_unmap_tx_buf(tbi, adapter->pdev); 404d1a890faSShreyas Bhatewara if (tbi->skb) { 405d1a890faSShreyas Bhatewara dev_kfree_skb_any(tbi->skb); 406d1a890faSShreyas Bhatewara tbi->skb = NULL; 407d1a890faSShreyas Bhatewara } 408d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring); 409d1a890faSShreyas Bhatewara } 410d1a890faSShreyas Bhatewara 411d1a890faSShreyas Bhatewara /* sanity check, verify all buffers are indeed unmapped and freed */ 412d1a890faSShreyas Bhatewara for (i = 0; i < tq->tx_ring.size; i++) { 413d1a890faSShreyas Bhatewara BUG_ON(tq->buf_info[i].skb != NULL || 414d1a890faSShreyas Bhatewara tq->buf_info[i].map_type != VMXNET3_MAP_NONE); 415d1a890faSShreyas Bhatewara } 416d1a890faSShreyas Bhatewara 417d1a890faSShreyas Bhatewara tq->tx_ring.gen = VMXNET3_INIT_GEN; 418d1a890faSShreyas Bhatewara tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0; 419d1a890faSShreyas Bhatewara 420d1a890faSShreyas Bhatewara tq->comp_ring.gen = VMXNET3_INIT_GEN; 421d1a890faSShreyas Bhatewara tq->comp_ring.next2proc = 0; 422d1a890faSShreyas Bhatewara } 423d1a890faSShreyas Bhatewara 424d1a890faSShreyas Bhatewara 42509c5088eSShreyas Bhatewara static void 426d1a890faSShreyas Bhatewara vmxnet3_tq_destroy(struct vmxnet3_tx_queue *tq, 427d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 428d1a890faSShreyas Bhatewara { 429d1a890faSShreyas Bhatewara if (tq->tx_ring.base) { 430d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, tq->tx_ring.size * 431d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxDesc), 432d1a890faSShreyas Bhatewara tq->tx_ring.base, tq->tx_ring.basePA); 433d1a890faSShreyas Bhatewara tq->tx_ring.base = NULL; 434d1a890faSShreyas Bhatewara } 435d1a890faSShreyas Bhatewara if (tq->data_ring.base) { 436d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, tq->data_ring.size * 437d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxDataDesc), 438d1a890faSShreyas Bhatewara tq->data_ring.base, tq->data_ring.basePA); 439d1a890faSShreyas Bhatewara tq->data_ring.base = NULL; 440d1a890faSShreyas Bhatewara } 441d1a890faSShreyas Bhatewara if (tq->comp_ring.base) { 442d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, tq->comp_ring.size * 443d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxCompDesc), 444d1a890faSShreyas Bhatewara tq->comp_ring.base, tq->comp_ring.basePA); 445d1a890faSShreyas Bhatewara tq->comp_ring.base = NULL; 446d1a890faSShreyas Bhatewara } 447d1a890faSShreyas Bhatewara kfree(tq->buf_info); 448d1a890faSShreyas Bhatewara tq->buf_info = NULL; 449d1a890faSShreyas Bhatewara } 450d1a890faSShreyas Bhatewara 451d1a890faSShreyas Bhatewara 45209c5088eSShreyas Bhatewara /* Destroy all tx queues */ 45309c5088eSShreyas Bhatewara void 45409c5088eSShreyas Bhatewara vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter) 45509c5088eSShreyas Bhatewara { 45609c5088eSShreyas Bhatewara int i; 45709c5088eSShreyas Bhatewara 45809c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 45909c5088eSShreyas Bhatewara vmxnet3_tq_destroy(&adapter->tx_queue[i], adapter); 46009c5088eSShreyas Bhatewara } 46109c5088eSShreyas Bhatewara 46209c5088eSShreyas Bhatewara 463d1a890faSShreyas Bhatewara static void 464d1a890faSShreyas Bhatewara vmxnet3_tq_init(struct vmxnet3_tx_queue *tq, 465d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 466d1a890faSShreyas Bhatewara { 467d1a890faSShreyas Bhatewara int i; 468d1a890faSShreyas Bhatewara 469d1a890faSShreyas Bhatewara /* reset the tx ring contents to 0 and reset the tx ring states */ 470d1a890faSShreyas Bhatewara memset(tq->tx_ring.base, 0, tq->tx_ring.size * 471d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxDesc)); 472d1a890faSShreyas Bhatewara tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0; 473d1a890faSShreyas Bhatewara tq->tx_ring.gen = VMXNET3_INIT_GEN; 474d1a890faSShreyas Bhatewara 475d1a890faSShreyas Bhatewara memset(tq->data_ring.base, 0, tq->data_ring.size * 476d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxDataDesc)); 477d1a890faSShreyas Bhatewara 478d1a890faSShreyas Bhatewara /* reset the tx comp ring contents to 0 and reset comp ring states */ 479d1a890faSShreyas Bhatewara memset(tq->comp_ring.base, 0, tq->comp_ring.size * 480d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxCompDesc)); 481d1a890faSShreyas Bhatewara tq->comp_ring.next2proc = 0; 482d1a890faSShreyas Bhatewara tq->comp_ring.gen = VMXNET3_INIT_GEN; 483d1a890faSShreyas Bhatewara 484d1a890faSShreyas Bhatewara /* reset the bookkeeping data */ 485d1a890faSShreyas Bhatewara memset(tq->buf_info, 0, sizeof(tq->buf_info[0]) * tq->tx_ring.size); 486d1a890faSShreyas Bhatewara for (i = 0; i < tq->tx_ring.size; i++) 487d1a890faSShreyas Bhatewara tq->buf_info[i].map_type = VMXNET3_MAP_NONE; 488d1a890faSShreyas Bhatewara 489d1a890faSShreyas Bhatewara /* stats are not reset */ 490d1a890faSShreyas Bhatewara } 491d1a890faSShreyas Bhatewara 492d1a890faSShreyas Bhatewara 493d1a890faSShreyas Bhatewara static int 494d1a890faSShreyas Bhatewara vmxnet3_tq_create(struct vmxnet3_tx_queue *tq, 495d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 496d1a890faSShreyas Bhatewara { 497d1a890faSShreyas Bhatewara BUG_ON(tq->tx_ring.base || tq->data_ring.base || 498d1a890faSShreyas Bhatewara tq->comp_ring.base || tq->buf_info); 499d1a890faSShreyas Bhatewara 500d1a890faSShreyas Bhatewara tq->tx_ring.base = pci_alloc_consistent(adapter->pdev, tq->tx_ring.size 501d1a890faSShreyas Bhatewara * sizeof(struct Vmxnet3_TxDesc), 502d1a890faSShreyas Bhatewara &tq->tx_ring.basePA); 503d1a890faSShreyas Bhatewara if (!tq->tx_ring.base) { 504d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate tx ring\n", 505d1a890faSShreyas Bhatewara adapter->netdev->name); 506d1a890faSShreyas Bhatewara goto err; 507d1a890faSShreyas Bhatewara } 508d1a890faSShreyas Bhatewara 509d1a890faSShreyas Bhatewara tq->data_ring.base = pci_alloc_consistent(adapter->pdev, 510d1a890faSShreyas Bhatewara tq->data_ring.size * 511d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxDataDesc), 512d1a890faSShreyas Bhatewara &tq->data_ring.basePA); 513d1a890faSShreyas Bhatewara if (!tq->data_ring.base) { 514d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate data ring\n", 515d1a890faSShreyas Bhatewara adapter->netdev->name); 516d1a890faSShreyas Bhatewara goto err; 517d1a890faSShreyas Bhatewara } 518d1a890faSShreyas Bhatewara 519d1a890faSShreyas Bhatewara tq->comp_ring.base = pci_alloc_consistent(adapter->pdev, 520d1a890faSShreyas Bhatewara tq->comp_ring.size * 521d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxCompDesc), 522d1a890faSShreyas Bhatewara &tq->comp_ring.basePA); 523d1a890faSShreyas Bhatewara if (!tq->comp_ring.base) { 524d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate tx comp ring\n", 525d1a890faSShreyas Bhatewara adapter->netdev->name); 526d1a890faSShreyas Bhatewara goto err; 527d1a890faSShreyas Bhatewara } 528d1a890faSShreyas Bhatewara 529d1a890faSShreyas Bhatewara tq->buf_info = kcalloc(tq->tx_ring.size, sizeof(tq->buf_info[0]), 530d1a890faSShreyas Bhatewara GFP_KERNEL); 531d1a890faSShreyas Bhatewara if (!tq->buf_info) { 532d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate tx bufinfo\n", 533d1a890faSShreyas Bhatewara adapter->netdev->name); 534d1a890faSShreyas Bhatewara goto err; 535d1a890faSShreyas Bhatewara } 536d1a890faSShreyas Bhatewara 537d1a890faSShreyas Bhatewara return 0; 538d1a890faSShreyas Bhatewara 539d1a890faSShreyas Bhatewara err: 540d1a890faSShreyas Bhatewara vmxnet3_tq_destroy(tq, adapter); 541d1a890faSShreyas Bhatewara return -ENOMEM; 542d1a890faSShreyas Bhatewara } 543d1a890faSShreyas Bhatewara 54409c5088eSShreyas Bhatewara static void 54509c5088eSShreyas Bhatewara vmxnet3_tq_cleanup_all(struct vmxnet3_adapter *adapter) 54609c5088eSShreyas Bhatewara { 54709c5088eSShreyas Bhatewara int i; 54809c5088eSShreyas Bhatewara 54909c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 55009c5088eSShreyas Bhatewara vmxnet3_tq_cleanup(&adapter->tx_queue[i], adapter); 55109c5088eSShreyas Bhatewara } 552d1a890faSShreyas Bhatewara 553d1a890faSShreyas Bhatewara /* 554d1a890faSShreyas Bhatewara * starting from ring->next2fill, allocate rx buffers for the given ring 555d1a890faSShreyas Bhatewara * of the rx queue and update the rx desc. stop after @num_to_alloc buffers 556d1a890faSShreyas Bhatewara * are allocated or allocation fails 557d1a890faSShreyas Bhatewara */ 558d1a890faSShreyas Bhatewara 559d1a890faSShreyas Bhatewara static int 560d1a890faSShreyas Bhatewara vmxnet3_rq_alloc_rx_buf(struct vmxnet3_rx_queue *rq, u32 ring_idx, 561d1a890faSShreyas Bhatewara int num_to_alloc, struct vmxnet3_adapter *adapter) 562d1a890faSShreyas Bhatewara { 563d1a890faSShreyas Bhatewara int num_allocated = 0; 564d1a890faSShreyas Bhatewara struct vmxnet3_rx_buf_info *rbi_base = rq->buf_info[ring_idx]; 565d1a890faSShreyas Bhatewara struct vmxnet3_cmd_ring *ring = &rq->rx_ring[ring_idx]; 566d1a890faSShreyas Bhatewara u32 val; 567d1a890faSShreyas Bhatewara 568d1a890faSShreyas Bhatewara while (num_allocated < num_to_alloc) { 569d1a890faSShreyas Bhatewara struct vmxnet3_rx_buf_info *rbi; 570d1a890faSShreyas Bhatewara union Vmxnet3_GenericDesc *gd; 571d1a890faSShreyas Bhatewara 572d1a890faSShreyas Bhatewara rbi = rbi_base + ring->next2fill; 573d1a890faSShreyas Bhatewara gd = ring->base + ring->next2fill; 574d1a890faSShreyas Bhatewara 575d1a890faSShreyas Bhatewara if (rbi->buf_type == VMXNET3_RX_BUF_SKB) { 576d1a890faSShreyas Bhatewara if (rbi->skb == NULL) { 577d1a890faSShreyas Bhatewara rbi->skb = dev_alloc_skb(rbi->len + 578d1a890faSShreyas Bhatewara NET_IP_ALIGN); 579d1a890faSShreyas Bhatewara if (unlikely(rbi->skb == NULL)) { 580d1a890faSShreyas Bhatewara rq->stats.rx_buf_alloc_failure++; 581d1a890faSShreyas Bhatewara break; 582d1a890faSShreyas Bhatewara } 583d1a890faSShreyas Bhatewara rbi->skb->dev = adapter->netdev; 584d1a890faSShreyas Bhatewara 585d1a890faSShreyas Bhatewara skb_reserve(rbi->skb, NET_IP_ALIGN); 586d1a890faSShreyas Bhatewara rbi->dma_addr = pci_map_single(adapter->pdev, 587d1a890faSShreyas Bhatewara rbi->skb->data, rbi->len, 588d1a890faSShreyas Bhatewara PCI_DMA_FROMDEVICE); 589d1a890faSShreyas Bhatewara } else { 590d1a890faSShreyas Bhatewara /* rx buffer skipped by the device */ 591d1a890faSShreyas Bhatewara } 592d1a890faSShreyas Bhatewara val = VMXNET3_RXD_BTYPE_HEAD << VMXNET3_RXD_BTYPE_SHIFT; 593d1a890faSShreyas Bhatewara } else { 594d1a890faSShreyas Bhatewara BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE || 595d1a890faSShreyas Bhatewara rbi->len != PAGE_SIZE); 596d1a890faSShreyas Bhatewara 597d1a890faSShreyas Bhatewara if (rbi->page == NULL) { 598d1a890faSShreyas Bhatewara rbi->page = alloc_page(GFP_ATOMIC); 599d1a890faSShreyas Bhatewara if (unlikely(rbi->page == NULL)) { 600d1a890faSShreyas Bhatewara rq->stats.rx_buf_alloc_failure++; 601d1a890faSShreyas Bhatewara break; 602d1a890faSShreyas Bhatewara } 603d1a890faSShreyas Bhatewara rbi->dma_addr = pci_map_page(adapter->pdev, 604d1a890faSShreyas Bhatewara rbi->page, 0, PAGE_SIZE, 605d1a890faSShreyas Bhatewara PCI_DMA_FROMDEVICE); 606d1a890faSShreyas Bhatewara } else { 607d1a890faSShreyas Bhatewara /* rx buffers skipped by the device */ 608d1a890faSShreyas Bhatewara } 609d1a890faSShreyas Bhatewara val = VMXNET3_RXD_BTYPE_BODY << VMXNET3_RXD_BTYPE_SHIFT; 610d1a890faSShreyas Bhatewara } 611d1a890faSShreyas Bhatewara 612d1a890faSShreyas Bhatewara BUG_ON(rbi->dma_addr == 0); 613115924b6SShreyas Bhatewara gd->rxd.addr = cpu_to_le64(rbi->dma_addr); 614115924b6SShreyas Bhatewara gd->dword[2] = cpu_to_le32((ring->gen << VMXNET3_RXD_GEN_SHIFT) 615115924b6SShreyas Bhatewara | val | rbi->len); 616d1a890faSShreyas Bhatewara 617d1a890faSShreyas Bhatewara num_allocated++; 618d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_adv_next2fill(ring); 619d1a890faSShreyas Bhatewara } 620d1a890faSShreyas Bhatewara rq->uncommitted[ring_idx] += num_allocated; 621d1a890faSShreyas Bhatewara 622f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 623f6965582SRandy Dunlap "alloc_rx_buf: %d allocated, next2fill %u, next2comp " 624d1a890faSShreyas Bhatewara "%u, uncommited %u\n", num_allocated, ring->next2fill, 625d1a890faSShreyas Bhatewara ring->next2comp, rq->uncommitted[ring_idx]); 626d1a890faSShreyas Bhatewara 627d1a890faSShreyas Bhatewara /* so that the device can distinguish a full ring and an empty ring */ 628d1a890faSShreyas Bhatewara BUG_ON(num_allocated != 0 && ring->next2fill == ring->next2comp); 629d1a890faSShreyas Bhatewara 630d1a890faSShreyas Bhatewara return num_allocated; 631d1a890faSShreyas Bhatewara } 632d1a890faSShreyas Bhatewara 633d1a890faSShreyas Bhatewara 634d1a890faSShreyas Bhatewara static void 635d1a890faSShreyas Bhatewara vmxnet3_append_frag(struct sk_buff *skb, struct Vmxnet3_RxCompDesc *rcd, 636d1a890faSShreyas Bhatewara struct vmxnet3_rx_buf_info *rbi) 637d1a890faSShreyas Bhatewara { 638d1a890faSShreyas Bhatewara struct skb_frag_struct *frag = skb_shinfo(skb)->frags + 639d1a890faSShreyas Bhatewara skb_shinfo(skb)->nr_frags; 640d1a890faSShreyas Bhatewara 641d1a890faSShreyas Bhatewara BUG_ON(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS); 642d1a890faSShreyas Bhatewara 643d1a890faSShreyas Bhatewara frag->page = rbi->page; 644d1a890faSShreyas Bhatewara frag->page_offset = 0; 645d1a890faSShreyas Bhatewara frag->size = rcd->len; 646d1a890faSShreyas Bhatewara skb->data_len += frag->size; 647d1a890faSShreyas Bhatewara skb_shinfo(skb)->nr_frags++; 648d1a890faSShreyas Bhatewara } 649d1a890faSShreyas Bhatewara 650d1a890faSShreyas Bhatewara 651d1a890faSShreyas Bhatewara static void 652d1a890faSShreyas Bhatewara vmxnet3_map_pkt(struct sk_buff *skb, struct vmxnet3_tx_ctx *ctx, 653d1a890faSShreyas Bhatewara struct vmxnet3_tx_queue *tq, struct pci_dev *pdev, 654d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 655d1a890faSShreyas Bhatewara { 656d1a890faSShreyas Bhatewara u32 dw2, len; 657d1a890faSShreyas Bhatewara unsigned long buf_offset; 658d1a890faSShreyas Bhatewara int i; 659d1a890faSShreyas Bhatewara union Vmxnet3_GenericDesc *gdesc; 660d1a890faSShreyas Bhatewara struct vmxnet3_tx_buf_info *tbi = NULL; 661d1a890faSShreyas Bhatewara 662d1a890faSShreyas Bhatewara BUG_ON(ctx->copy_size > skb_headlen(skb)); 663d1a890faSShreyas Bhatewara 664d1a890faSShreyas Bhatewara /* use the previous gen bit for the SOP desc */ 665d1a890faSShreyas Bhatewara dw2 = (tq->tx_ring.gen ^ 0x1) << VMXNET3_TXD_GEN_SHIFT; 666d1a890faSShreyas Bhatewara 667d1a890faSShreyas Bhatewara ctx->sop_txd = tq->tx_ring.base + tq->tx_ring.next2fill; 668d1a890faSShreyas Bhatewara gdesc = ctx->sop_txd; /* both loops below can be skipped */ 669d1a890faSShreyas Bhatewara 670d1a890faSShreyas Bhatewara /* no need to map the buffer if headers are copied */ 671d1a890faSShreyas Bhatewara if (ctx->copy_size) { 672115924b6SShreyas Bhatewara ctx->sop_txd->txd.addr = cpu_to_le64(tq->data_ring.basePA + 673d1a890faSShreyas Bhatewara tq->tx_ring.next2fill * 674115924b6SShreyas Bhatewara sizeof(struct Vmxnet3_TxDataDesc)); 675115924b6SShreyas Bhatewara ctx->sop_txd->dword[2] = cpu_to_le32(dw2 | ctx->copy_size); 676d1a890faSShreyas Bhatewara ctx->sop_txd->dword[3] = 0; 677d1a890faSShreyas Bhatewara 678d1a890faSShreyas Bhatewara tbi = tq->buf_info + tq->tx_ring.next2fill; 679d1a890faSShreyas Bhatewara tbi->map_type = VMXNET3_MAP_NONE; 680d1a890faSShreyas Bhatewara 681f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 682f6965582SRandy Dunlap "txd[%u]: 0x%Lx 0x%x 0x%x\n", 683115924b6SShreyas Bhatewara tq->tx_ring.next2fill, 684115924b6SShreyas Bhatewara le64_to_cpu(ctx->sop_txd->txd.addr), 685d1a890faSShreyas Bhatewara ctx->sop_txd->dword[2], ctx->sop_txd->dword[3]); 686d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); 687d1a890faSShreyas Bhatewara 688d1a890faSShreyas Bhatewara /* use the right gen for non-SOP desc */ 689d1a890faSShreyas Bhatewara dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; 690d1a890faSShreyas Bhatewara } 691d1a890faSShreyas Bhatewara 692d1a890faSShreyas Bhatewara /* linear part can use multiple tx desc if it's big */ 693d1a890faSShreyas Bhatewara len = skb_headlen(skb) - ctx->copy_size; 694d1a890faSShreyas Bhatewara buf_offset = ctx->copy_size; 695d1a890faSShreyas Bhatewara while (len) { 696d1a890faSShreyas Bhatewara u32 buf_size; 697d1a890faSShreyas Bhatewara 6981f4b1612SBhavesh Davda if (len < VMXNET3_MAX_TX_BUF_SIZE) { 6991f4b1612SBhavesh Davda buf_size = len; 7001f4b1612SBhavesh Davda dw2 |= len; 7011f4b1612SBhavesh Davda } else { 7021f4b1612SBhavesh Davda buf_size = VMXNET3_MAX_TX_BUF_SIZE; 7031f4b1612SBhavesh Davda /* spec says that for TxDesc.len, 0 == 2^14 */ 7041f4b1612SBhavesh Davda } 705d1a890faSShreyas Bhatewara 706d1a890faSShreyas Bhatewara tbi = tq->buf_info + tq->tx_ring.next2fill; 707d1a890faSShreyas Bhatewara tbi->map_type = VMXNET3_MAP_SINGLE; 708d1a890faSShreyas Bhatewara tbi->dma_addr = pci_map_single(adapter->pdev, 709d1a890faSShreyas Bhatewara skb->data + buf_offset, buf_size, 710d1a890faSShreyas Bhatewara PCI_DMA_TODEVICE); 711d1a890faSShreyas Bhatewara 7121f4b1612SBhavesh Davda tbi->len = buf_size; 713d1a890faSShreyas Bhatewara 714d1a890faSShreyas Bhatewara gdesc = tq->tx_ring.base + tq->tx_ring.next2fill; 715d1a890faSShreyas Bhatewara BUG_ON(gdesc->txd.gen == tq->tx_ring.gen); 716d1a890faSShreyas Bhatewara 717115924b6SShreyas Bhatewara gdesc->txd.addr = cpu_to_le64(tbi->dma_addr); 7181f4b1612SBhavesh Davda gdesc->dword[2] = cpu_to_le32(dw2); 719d1a890faSShreyas Bhatewara gdesc->dword[3] = 0; 720d1a890faSShreyas Bhatewara 721f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 722f6965582SRandy Dunlap "txd[%u]: 0x%Lx 0x%x 0x%x\n", 723115924b6SShreyas Bhatewara tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr), 724115924b6SShreyas Bhatewara le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]); 725d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); 726d1a890faSShreyas Bhatewara dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; 727d1a890faSShreyas Bhatewara 728d1a890faSShreyas Bhatewara len -= buf_size; 729d1a890faSShreyas Bhatewara buf_offset += buf_size; 730d1a890faSShreyas Bhatewara } 731d1a890faSShreyas Bhatewara 732d1a890faSShreyas Bhatewara for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 733d1a890faSShreyas Bhatewara struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i]; 734d1a890faSShreyas Bhatewara 735d1a890faSShreyas Bhatewara tbi = tq->buf_info + tq->tx_ring.next2fill; 736d1a890faSShreyas Bhatewara tbi->map_type = VMXNET3_MAP_PAGE; 737d1a890faSShreyas Bhatewara tbi->dma_addr = pci_map_page(adapter->pdev, frag->page, 738d1a890faSShreyas Bhatewara frag->page_offset, frag->size, 739d1a890faSShreyas Bhatewara PCI_DMA_TODEVICE); 740d1a890faSShreyas Bhatewara 741d1a890faSShreyas Bhatewara tbi->len = frag->size; 742d1a890faSShreyas Bhatewara 743d1a890faSShreyas Bhatewara gdesc = tq->tx_ring.base + tq->tx_ring.next2fill; 744d1a890faSShreyas Bhatewara BUG_ON(gdesc->txd.gen == tq->tx_ring.gen); 745d1a890faSShreyas Bhatewara 746115924b6SShreyas Bhatewara gdesc->txd.addr = cpu_to_le64(tbi->dma_addr); 747115924b6SShreyas Bhatewara gdesc->dword[2] = cpu_to_le32(dw2 | frag->size); 748d1a890faSShreyas Bhatewara gdesc->dword[3] = 0; 749d1a890faSShreyas Bhatewara 750f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 751f6965582SRandy Dunlap "txd[%u]: 0x%llu %u %u\n", 752115924b6SShreyas Bhatewara tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr), 753115924b6SShreyas Bhatewara le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]); 754d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); 755d1a890faSShreyas Bhatewara dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; 756d1a890faSShreyas Bhatewara } 757d1a890faSShreyas Bhatewara 758d1a890faSShreyas Bhatewara ctx->eop_txd = gdesc; 759d1a890faSShreyas Bhatewara 760d1a890faSShreyas Bhatewara /* set the last buf_info for the pkt */ 761d1a890faSShreyas Bhatewara tbi->skb = skb; 762d1a890faSShreyas Bhatewara tbi->sop_idx = ctx->sop_txd - tq->tx_ring.base; 763d1a890faSShreyas Bhatewara } 764d1a890faSShreyas Bhatewara 765d1a890faSShreyas Bhatewara 76609c5088eSShreyas Bhatewara /* Init all tx queues */ 76709c5088eSShreyas Bhatewara static void 76809c5088eSShreyas Bhatewara vmxnet3_tq_init_all(struct vmxnet3_adapter *adapter) 76909c5088eSShreyas Bhatewara { 77009c5088eSShreyas Bhatewara int i; 77109c5088eSShreyas Bhatewara 77209c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 77309c5088eSShreyas Bhatewara vmxnet3_tq_init(&adapter->tx_queue[i], adapter); 77409c5088eSShreyas Bhatewara } 77509c5088eSShreyas Bhatewara 77609c5088eSShreyas Bhatewara 777d1a890faSShreyas Bhatewara /* 778d1a890faSShreyas Bhatewara * parse and copy relevant protocol headers: 779d1a890faSShreyas Bhatewara * For a tso pkt, relevant headers are L2/3/4 including options 780d1a890faSShreyas Bhatewara * For a pkt requesting csum offloading, they are L2/3 and may include L4 781d1a890faSShreyas Bhatewara * if it's a TCP/UDP pkt 782d1a890faSShreyas Bhatewara * 783d1a890faSShreyas Bhatewara * Returns: 784d1a890faSShreyas Bhatewara * -1: error happens during parsing 785d1a890faSShreyas Bhatewara * 0: protocol headers parsed, but too big to be copied 786d1a890faSShreyas Bhatewara * 1: protocol headers parsed and copied 787d1a890faSShreyas Bhatewara * 788d1a890faSShreyas Bhatewara * Other effects: 789d1a890faSShreyas Bhatewara * 1. related *ctx fields are updated. 790d1a890faSShreyas Bhatewara * 2. ctx->copy_size is # of bytes copied 791d1a890faSShreyas Bhatewara * 3. the portion copied is guaranteed to be in the linear part 792d1a890faSShreyas Bhatewara * 793d1a890faSShreyas Bhatewara */ 794d1a890faSShreyas Bhatewara static int 795d1a890faSShreyas Bhatewara vmxnet3_parse_and_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq, 796d1a890faSShreyas Bhatewara struct vmxnet3_tx_ctx *ctx, 797d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 798d1a890faSShreyas Bhatewara { 799d1a890faSShreyas Bhatewara struct Vmxnet3_TxDataDesc *tdd; 800d1a890faSShreyas Bhatewara 8010d0b1672SMichał Mirosław if (ctx->mss) { /* TSO */ 802d1a890faSShreyas Bhatewara ctx->eth_ip_hdr_size = skb_transport_offset(skb); 803d1a890faSShreyas Bhatewara ctx->l4_hdr_size = ((struct tcphdr *) 804d1a890faSShreyas Bhatewara skb_transport_header(skb))->doff * 4; 805d1a890faSShreyas Bhatewara ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size; 806d1a890faSShreyas Bhatewara } else { 807d1a890faSShreyas Bhatewara unsigned int pull_size; 808d1a890faSShreyas Bhatewara 809d1a890faSShreyas Bhatewara if (skb->ip_summed == CHECKSUM_PARTIAL) { 8100d0b1672SMichał Mirosław ctx->eth_ip_hdr_size = skb_checksum_start_offset(skb); 811d1a890faSShreyas Bhatewara 812d1a890faSShreyas Bhatewara if (ctx->ipv4) { 813d1a890faSShreyas Bhatewara struct iphdr *iph = (struct iphdr *) 814d1a890faSShreyas Bhatewara skb_network_header(skb); 815d1a890faSShreyas Bhatewara if (iph->protocol == IPPROTO_TCP) { 816d1a890faSShreyas Bhatewara pull_size = ctx->eth_ip_hdr_size + 817d1a890faSShreyas Bhatewara sizeof(struct tcphdr); 818d1a890faSShreyas Bhatewara 819d1a890faSShreyas Bhatewara if (unlikely(!pskb_may_pull(skb, 820d1a890faSShreyas Bhatewara pull_size))) { 821d1a890faSShreyas Bhatewara goto err; 822d1a890faSShreyas Bhatewara } 823d1a890faSShreyas Bhatewara ctx->l4_hdr_size = ((struct tcphdr *) 824d1a890faSShreyas Bhatewara skb_transport_header(skb))->doff * 4; 825d1a890faSShreyas Bhatewara } else if (iph->protocol == IPPROTO_UDP) { 826d1a890faSShreyas Bhatewara ctx->l4_hdr_size = 827d1a890faSShreyas Bhatewara sizeof(struct udphdr); 828d1a890faSShreyas Bhatewara } else { 829d1a890faSShreyas Bhatewara ctx->l4_hdr_size = 0; 830d1a890faSShreyas Bhatewara } 831d1a890faSShreyas Bhatewara } else { 832d1a890faSShreyas Bhatewara /* for simplicity, don't copy L4 headers */ 833d1a890faSShreyas Bhatewara ctx->l4_hdr_size = 0; 834d1a890faSShreyas Bhatewara } 835d1a890faSShreyas Bhatewara ctx->copy_size = ctx->eth_ip_hdr_size + 836d1a890faSShreyas Bhatewara ctx->l4_hdr_size; 837d1a890faSShreyas Bhatewara } else { 838d1a890faSShreyas Bhatewara ctx->eth_ip_hdr_size = 0; 839d1a890faSShreyas Bhatewara ctx->l4_hdr_size = 0; 840d1a890faSShreyas Bhatewara /* copy as much as allowed */ 841d1a890faSShreyas Bhatewara ctx->copy_size = min((unsigned int)VMXNET3_HDR_COPY_SIZE 842d1a890faSShreyas Bhatewara , skb_headlen(skb)); 843d1a890faSShreyas Bhatewara } 844d1a890faSShreyas Bhatewara 845d1a890faSShreyas Bhatewara /* make sure headers are accessible directly */ 846d1a890faSShreyas Bhatewara if (unlikely(!pskb_may_pull(skb, ctx->copy_size))) 847d1a890faSShreyas Bhatewara goto err; 848d1a890faSShreyas Bhatewara } 849d1a890faSShreyas Bhatewara 850d1a890faSShreyas Bhatewara if (unlikely(ctx->copy_size > VMXNET3_HDR_COPY_SIZE)) { 851d1a890faSShreyas Bhatewara tq->stats.oversized_hdr++; 852d1a890faSShreyas Bhatewara ctx->copy_size = 0; 853d1a890faSShreyas Bhatewara return 0; 854d1a890faSShreyas Bhatewara } 855d1a890faSShreyas Bhatewara 856d1a890faSShreyas Bhatewara tdd = tq->data_ring.base + tq->tx_ring.next2fill; 857d1a890faSShreyas Bhatewara 858d1a890faSShreyas Bhatewara memcpy(tdd->data, skb->data, ctx->copy_size); 859f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 860f6965582SRandy Dunlap "copy %u bytes to dataRing[%u]\n", 861d1a890faSShreyas Bhatewara ctx->copy_size, tq->tx_ring.next2fill); 862d1a890faSShreyas Bhatewara return 1; 863d1a890faSShreyas Bhatewara 864d1a890faSShreyas Bhatewara err: 865d1a890faSShreyas Bhatewara return -1; 866d1a890faSShreyas Bhatewara } 867d1a890faSShreyas Bhatewara 868d1a890faSShreyas Bhatewara 869d1a890faSShreyas Bhatewara static void 870d1a890faSShreyas Bhatewara vmxnet3_prepare_tso(struct sk_buff *skb, 871d1a890faSShreyas Bhatewara struct vmxnet3_tx_ctx *ctx) 872d1a890faSShreyas Bhatewara { 873d1a890faSShreyas Bhatewara struct tcphdr *tcph = (struct tcphdr *)skb_transport_header(skb); 874d1a890faSShreyas Bhatewara if (ctx->ipv4) { 875d1a890faSShreyas Bhatewara struct iphdr *iph = (struct iphdr *)skb_network_header(skb); 876d1a890faSShreyas Bhatewara iph->check = 0; 877d1a890faSShreyas Bhatewara tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0, 878d1a890faSShreyas Bhatewara IPPROTO_TCP, 0); 879d1a890faSShreyas Bhatewara } else { 880d1a890faSShreyas Bhatewara struct ipv6hdr *iph = (struct ipv6hdr *)skb_network_header(skb); 881d1a890faSShreyas Bhatewara tcph->check = ~csum_ipv6_magic(&iph->saddr, &iph->daddr, 0, 882d1a890faSShreyas Bhatewara IPPROTO_TCP, 0); 883d1a890faSShreyas Bhatewara } 884d1a890faSShreyas Bhatewara } 885d1a890faSShreyas Bhatewara 886d1a890faSShreyas Bhatewara 887d1a890faSShreyas Bhatewara /* 888d1a890faSShreyas Bhatewara * Transmits a pkt thru a given tq 889d1a890faSShreyas Bhatewara * Returns: 890d1a890faSShreyas Bhatewara * NETDEV_TX_OK: descriptors are setup successfully 891d1a890faSShreyas Bhatewara * NETDEV_TX_OK: error occured, the pkt is dropped 892d1a890faSShreyas Bhatewara * NETDEV_TX_BUSY: tx ring is full, queue is stopped 893d1a890faSShreyas Bhatewara * 894d1a890faSShreyas Bhatewara * Side-effects: 895d1a890faSShreyas Bhatewara * 1. tx ring may be changed 896d1a890faSShreyas Bhatewara * 2. tq stats may be updated accordingly 897d1a890faSShreyas Bhatewara * 3. shared->txNumDeferred may be updated 898d1a890faSShreyas Bhatewara */ 899d1a890faSShreyas Bhatewara 900d1a890faSShreyas Bhatewara static int 901d1a890faSShreyas Bhatewara vmxnet3_tq_xmit(struct sk_buff *skb, struct vmxnet3_tx_queue *tq, 902d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter, struct net_device *netdev) 903d1a890faSShreyas Bhatewara { 904d1a890faSShreyas Bhatewara int ret; 905d1a890faSShreyas Bhatewara u32 count; 906d1a890faSShreyas Bhatewara unsigned long flags; 907d1a890faSShreyas Bhatewara struct vmxnet3_tx_ctx ctx; 908d1a890faSShreyas Bhatewara union Vmxnet3_GenericDesc *gdesc; 909115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 910115924b6SShreyas Bhatewara /* Use temporary descriptor to avoid touching bits multiple times */ 911115924b6SShreyas Bhatewara union Vmxnet3_GenericDesc tempTxDesc; 912115924b6SShreyas Bhatewara #endif 913d1a890faSShreyas Bhatewara 914d1a890faSShreyas Bhatewara /* conservatively estimate # of descriptors to use */ 915d1a890faSShreyas Bhatewara count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 916d1a890faSShreyas Bhatewara skb_shinfo(skb)->nr_frags + 1; 917d1a890faSShreyas Bhatewara 9181b803fbfSHarvey Harrison ctx.ipv4 = (skb->protocol == cpu_to_be16(ETH_P_IP)); 919d1a890faSShreyas Bhatewara 920d1a890faSShreyas Bhatewara ctx.mss = skb_shinfo(skb)->gso_size; 921d1a890faSShreyas Bhatewara if (ctx.mss) { 922d1a890faSShreyas Bhatewara if (skb_header_cloned(skb)) { 923d1a890faSShreyas Bhatewara if (unlikely(pskb_expand_head(skb, 0, 0, 924d1a890faSShreyas Bhatewara GFP_ATOMIC) != 0)) { 925d1a890faSShreyas Bhatewara tq->stats.drop_tso++; 926d1a890faSShreyas Bhatewara goto drop_pkt; 927d1a890faSShreyas Bhatewara } 928d1a890faSShreyas Bhatewara tq->stats.copy_skb_header++; 929d1a890faSShreyas Bhatewara } 930d1a890faSShreyas Bhatewara vmxnet3_prepare_tso(skb, &ctx); 931d1a890faSShreyas Bhatewara } else { 932d1a890faSShreyas Bhatewara if (unlikely(count > VMXNET3_MAX_TXD_PER_PKT)) { 933d1a890faSShreyas Bhatewara 934d1a890faSShreyas Bhatewara /* non-tso pkts must not use more than 935d1a890faSShreyas Bhatewara * VMXNET3_MAX_TXD_PER_PKT entries 936d1a890faSShreyas Bhatewara */ 937d1a890faSShreyas Bhatewara if (skb_linearize(skb) != 0) { 938d1a890faSShreyas Bhatewara tq->stats.drop_too_many_frags++; 939d1a890faSShreyas Bhatewara goto drop_pkt; 940d1a890faSShreyas Bhatewara } 941d1a890faSShreyas Bhatewara tq->stats.linearized++; 942d1a890faSShreyas Bhatewara 943d1a890faSShreyas Bhatewara /* recalculate the # of descriptors to use */ 944d1a890faSShreyas Bhatewara count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1; 945d1a890faSShreyas Bhatewara } 946d1a890faSShreyas Bhatewara } 947d1a890faSShreyas Bhatewara 94809c5088eSShreyas Bhatewara spin_lock_irqsave(&tq->tx_lock, flags); 94909c5088eSShreyas Bhatewara 95009c5088eSShreyas Bhatewara if (count > vmxnet3_cmd_ring_desc_avail(&tq->tx_ring)) { 95109c5088eSShreyas Bhatewara tq->stats.tx_ring_full++; 95209c5088eSShreyas Bhatewara dev_dbg(&adapter->netdev->dev, 95309c5088eSShreyas Bhatewara "tx queue stopped on %s, next2comp %u" 95409c5088eSShreyas Bhatewara " next2fill %u\n", adapter->netdev->name, 95509c5088eSShreyas Bhatewara tq->tx_ring.next2comp, tq->tx_ring.next2fill); 95609c5088eSShreyas Bhatewara 95709c5088eSShreyas Bhatewara vmxnet3_tq_stop(tq, adapter); 95809c5088eSShreyas Bhatewara spin_unlock_irqrestore(&tq->tx_lock, flags); 95909c5088eSShreyas Bhatewara return NETDEV_TX_BUSY; 96009c5088eSShreyas Bhatewara } 96109c5088eSShreyas Bhatewara 96209c5088eSShreyas Bhatewara 963d1a890faSShreyas Bhatewara ret = vmxnet3_parse_and_copy_hdr(skb, tq, &ctx, adapter); 964d1a890faSShreyas Bhatewara if (ret >= 0) { 965d1a890faSShreyas Bhatewara BUG_ON(ret <= 0 && ctx.copy_size != 0); 966d1a890faSShreyas Bhatewara /* hdrs parsed, check against other limits */ 967d1a890faSShreyas Bhatewara if (ctx.mss) { 968d1a890faSShreyas Bhatewara if (unlikely(ctx.eth_ip_hdr_size + ctx.l4_hdr_size > 969d1a890faSShreyas Bhatewara VMXNET3_MAX_TX_BUF_SIZE)) { 970d1a890faSShreyas Bhatewara goto hdr_too_big; 971d1a890faSShreyas Bhatewara } 972d1a890faSShreyas Bhatewara } else { 973d1a890faSShreyas Bhatewara if (skb->ip_summed == CHECKSUM_PARTIAL) { 974d1a890faSShreyas Bhatewara if (unlikely(ctx.eth_ip_hdr_size + 975d1a890faSShreyas Bhatewara skb->csum_offset > 976d1a890faSShreyas Bhatewara VMXNET3_MAX_CSUM_OFFSET)) { 977d1a890faSShreyas Bhatewara goto hdr_too_big; 978d1a890faSShreyas Bhatewara } 979d1a890faSShreyas Bhatewara } 980d1a890faSShreyas Bhatewara } 981d1a890faSShreyas Bhatewara } else { 982d1a890faSShreyas Bhatewara tq->stats.drop_hdr_inspect_err++; 983f955e141SDan Carpenter goto unlock_drop_pkt; 984d1a890faSShreyas Bhatewara } 985d1a890faSShreyas Bhatewara 986d1a890faSShreyas Bhatewara /* fill tx descs related to addr & len */ 987d1a890faSShreyas Bhatewara vmxnet3_map_pkt(skb, &ctx, tq, adapter->pdev, adapter); 988d1a890faSShreyas Bhatewara 989d1a890faSShreyas Bhatewara /* setup the EOP desc */ 990115924b6SShreyas Bhatewara ctx.eop_txd->dword[3] = cpu_to_le32(VMXNET3_TXD_CQ | VMXNET3_TXD_EOP); 991d1a890faSShreyas Bhatewara 992d1a890faSShreyas Bhatewara /* setup the SOP desc */ 993115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 994115924b6SShreyas Bhatewara gdesc = &tempTxDesc; 995115924b6SShreyas Bhatewara gdesc->dword[2] = ctx.sop_txd->dword[2]; 996115924b6SShreyas Bhatewara gdesc->dword[3] = ctx.sop_txd->dword[3]; 997115924b6SShreyas Bhatewara #else 998d1a890faSShreyas Bhatewara gdesc = ctx.sop_txd; 999115924b6SShreyas Bhatewara #endif 1000d1a890faSShreyas Bhatewara if (ctx.mss) { 1001d1a890faSShreyas Bhatewara gdesc->txd.hlen = ctx.eth_ip_hdr_size + ctx.l4_hdr_size; 1002d1a890faSShreyas Bhatewara gdesc->txd.om = VMXNET3_OM_TSO; 1003d1a890faSShreyas Bhatewara gdesc->txd.msscof = ctx.mss; 1004115924b6SShreyas Bhatewara le32_add_cpu(&tq->shared->txNumDeferred, (skb->len - 1005115924b6SShreyas Bhatewara gdesc->txd.hlen + ctx.mss - 1) / ctx.mss); 1006d1a890faSShreyas Bhatewara } else { 1007d1a890faSShreyas Bhatewara if (skb->ip_summed == CHECKSUM_PARTIAL) { 1008d1a890faSShreyas Bhatewara gdesc->txd.hlen = ctx.eth_ip_hdr_size; 1009d1a890faSShreyas Bhatewara gdesc->txd.om = VMXNET3_OM_CSUM; 1010d1a890faSShreyas Bhatewara gdesc->txd.msscof = ctx.eth_ip_hdr_size + 1011d1a890faSShreyas Bhatewara skb->csum_offset; 1012d1a890faSShreyas Bhatewara } else { 1013d1a890faSShreyas Bhatewara gdesc->txd.om = 0; 1014d1a890faSShreyas Bhatewara gdesc->txd.msscof = 0; 1015d1a890faSShreyas Bhatewara } 1016115924b6SShreyas Bhatewara le32_add_cpu(&tq->shared->txNumDeferred, 1); 1017d1a890faSShreyas Bhatewara } 1018d1a890faSShreyas Bhatewara 1019d1a890faSShreyas Bhatewara if (vlan_tx_tag_present(skb)) { 1020d1a890faSShreyas Bhatewara gdesc->txd.ti = 1; 1021d1a890faSShreyas Bhatewara gdesc->txd.tci = vlan_tx_tag_get(skb); 1022d1a890faSShreyas Bhatewara } 1023d1a890faSShreyas Bhatewara 1024115924b6SShreyas Bhatewara /* finally flips the GEN bit of the SOP desc. */ 1025115924b6SShreyas Bhatewara gdesc->dword[2] = cpu_to_le32(le32_to_cpu(gdesc->dword[2]) ^ 1026115924b6SShreyas Bhatewara VMXNET3_TXD_GEN); 1027115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 1028115924b6SShreyas Bhatewara /* Finished updating in bitfields of Tx Desc, so write them in original 1029115924b6SShreyas Bhatewara * place. 1030115924b6SShreyas Bhatewara */ 1031115924b6SShreyas Bhatewara vmxnet3_TxDescToLe((struct Vmxnet3_TxDesc *)gdesc, 1032115924b6SShreyas Bhatewara (struct Vmxnet3_TxDesc *)ctx.sop_txd); 1033115924b6SShreyas Bhatewara gdesc = ctx.sop_txd; 1034115924b6SShreyas Bhatewara #endif 1035f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 1036f6965582SRandy Dunlap "txd[%u]: SOP 0x%Lx 0x%x 0x%x\n", 1037d1a890faSShreyas Bhatewara (u32)((union Vmxnet3_GenericDesc *)ctx.sop_txd - 1038115924b6SShreyas Bhatewara tq->tx_ring.base), le64_to_cpu(gdesc->txd.addr), 1039115924b6SShreyas Bhatewara le32_to_cpu(gdesc->dword[2]), le32_to_cpu(gdesc->dword[3])); 1040d1a890faSShreyas Bhatewara 1041d1a890faSShreyas Bhatewara spin_unlock_irqrestore(&tq->tx_lock, flags); 1042d1a890faSShreyas Bhatewara 1043115924b6SShreyas Bhatewara if (le32_to_cpu(tq->shared->txNumDeferred) >= 1044115924b6SShreyas Bhatewara le32_to_cpu(tq->shared->txThreshold)) { 1045d1a890faSShreyas Bhatewara tq->shared->txNumDeferred = 0; 104609c5088eSShreyas Bhatewara VMXNET3_WRITE_BAR0_REG(adapter, 104709c5088eSShreyas Bhatewara VMXNET3_REG_TXPROD + tq->qid * 8, 1048d1a890faSShreyas Bhatewara tq->tx_ring.next2fill); 1049d1a890faSShreyas Bhatewara } 1050d1a890faSShreyas Bhatewara 1051d1a890faSShreyas Bhatewara return NETDEV_TX_OK; 1052d1a890faSShreyas Bhatewara 1053d1a890faSShreyas Bhatewara hdr_too_big: 1054d1a890faSShreyas Bhatewara tq->stats.drop_oversized_hdr++; 1055f955e141SDan Carpenter unlock_drop_pkt: 1056f955e141SDan Carpenter spin_unlock_irqrestore(&tq->tx_lock, flags); 1057d1a890faSShreyas Bhatewara drop_pkt: 1058d1a890faSShreyas Bhatewara tq->stats.drop_total++; 1059d1a890faSShreyas Bhatewara dev_kfree_skb(skb); 1060d1a890faSShreyas Bhatewara return NETDEV_TX_OK; 1061d1a890faSShreyas Bhatewara } 1062d1a890faSShreyas Bhatewara 1063d1a890faSShreyas Bhatewara 1064d1a890faSShreyas Bhatewara static netdev_tx_t 1065d1a890faSShreyas Bhatewara vmxnet3_xmit_frame(struct sk_buff *skb, struct net_device *netdev) 1066d1a890faSShreyas Bhatewara { 1067d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1068d1a890faSShreyas Bhatewara 106909c5088eSShreyas Bhatewara BUG_ON(skb->queue_mapping > adapter->num_tx_queues); 107009c5088eSShreyas Bhatewara return vmxnet3_tq_xmit(skb, 107109c5088eSShreyas Bhatewara &adapter->tx_queue[skb->queue_mapping], 107209c5088eSShreyas Bhatewara adapter, netdev); 1073d1a890faSShreyas Bhatewara } 1074d1a890faSShreyas Bhatewara 1075d1a890faSShreyas Bhatewara 1076d1a890faSShreyas Bhatewara static void 1077d1a890faSShreyas Bhatewara vmxnet3_rx_csum(struct vmxnet3_adapter *adapter, 1078d1a890faSShreyas Bhatewara struct sk_buff *skb, 1079d1a890faSShreyas Bhatewara union Vmxnet3_GenericDesc *gdesc) 1080d1a890faSShreyas Bhatewara { 1081d1a890faSShreyas Bhatewara if (!gdesc->rcd.cnc && adapter->rxcsum) { 1082d1a890faSShreyas Bhatewara /* typical case: TCP/UDP over IP and both csums are correct */ 1083115924b6SShreyas Bhatewara if ((le32_to_cpu(gdesc->dword[3]) & VMXNET3_RCD_CSUM_OK) == 1084d1a890faSShreyas Bhatewara VMXNET3_RCD_CSUM_OK) { 1085d1a890faSShreyas Bhatewara skb->ip_summed = CHECKSUM_UNNECESSARY; 1086d1a890faSShreyas Bhatewara BUG_ON(!(gdesc->rcd.tcp || gdesc->rcd.udp)); 1087d1a890faSShreyas Bhatewara BUG_ON(!(gdesc->rcd.v4 || gdesc->rcd.v6)); 1088d1a890faSShreyas Bhatewara BUG_ON(gdesc->rcd.frg); 1089d1a890faSShreyas Bhatewara } else { 1090d1a890faSShreyas Bhatewara if (gdesc->rcd.csum) { 1091d1a890faSShreyas Bhatewara skb->csum = htons(gdesc->rcd.csum); 1092d1a890faSShreyas Bhatewara skb->ip_summed = CHECKSUM_PARTIAL; 1093d1a890faSShreyas Bhatewara } else { 1094bc8acf2cSEric Dumazet skb_checksum_none_assert(skb); 1095d1a890faSShreyas Bhatewara } 1096d1a890faSShreyas Bhatewara } 1097d1a890faSShreyas Bhatewara } else { 1098bc8acf2cSEric Dumazet skb_checksum_none_assert(skb); 1099d1a890faSShreyas Bhatewara } 1100d1a890faSShreyas Bhatewara } 1101d1a890faSShreyas Bhatewara 1102d1a890faSShreyas Bhatewara 1103d1a890faSShreyas Bhatewara static void 1104d1a890faSShreyas Bhatewara vmxnet3_rx_error(struct vmxnet3_rx_queue *rq, struct Vmxnet3_RxCompDesc *rcd, 1105d1a890faSShreyas Bhatewara struct vmxnet3_rx_ctx *ctx, struct vmxnet3_adapter *adapter) 1106d1a890faSShreyas Bhatewara { 1107d1a890faSShreyas Bhatewara rq->stats.drop_err++; 1108d1a890faSShreyas Bhatewara if (!rcd->fcs) 1109d1a890faSShreyas Bhatewara rq->stats.drop_fcs++; 1110d1a890faSShreyas Bhatewara 1111d1a890faSShreyas Bhatewara rq->stats.drop_total++; 1112d1a890faSShreyas Bhatewara 1113d1a890faSShreyas Bhatewara /* 1114d1a890faSShreyas Bhatewara * We do not unmap and chain the rx buffer to the skb. 1115d1a890faSShreyas Bhatewara * We basically pretend this buffer is not used and will be recycled 1116d1a890faSShreyas Bhatewara * by vmxnet3_rq_alloc_rx_buf() 1117d1a890faSShreyas Bhatewara */ 1118d1a890faSShreyas Bhatewara 1119d1a890faSShreyas Bhatewara /* 1120d1a890faSShreyas Bhatewara * ctx->skb may be NULL if this is the first and the only one 1121d1a890faSShreyas Bhatewara * desc for the pkt 1122d1a890faSShreyas Bhatewara */ 1123d1a890faSShreyas Bhatewara if (ctx->skb) 1124d1a890faSShreyas Bhatewara dev_kfree_skb_irq(ctx->skb); 1125d1a890faSShreyas Bhatewara 1126d1a890faSShreyas Bhatewara ctx->skb = NULL; 1127d1a890faSShreyas Bhatewara } 1128d1a890faSShreyas Bhatewara 1129d1a890faSShreyas Bhatewara 1130d1a890faSShreyas Bhatewara static int 1131d1a890faSShreyas Bhatewara vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq, 1132d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter, int quota) 1133d1a890faSShreyas Bhatewara { 1134215faf9cSJoe Perches static const u32 rxprod_reg[2] = { 1135215faf9cSJoe Perches VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2 1136215faf9cSJoe Perches }; 1137d1a890faSShreyas Bhatewara u32 num_rxd = 0; 1138d1a890faSShreyas Bhatewara struct Vmxnet3_RxCompDesc *rcd; 1139d1a890faSShreyas Bhatewara struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx; 1140115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 1141115924b6SShreyas Bhatewara struct Vmxnet3_RxDesc rxCmdDesc; 1142115924b6SShreyas Bhatewara struct Vmxnet3_RxCompDesc rxComp; 1143115924b6SShreyas Bhatewara #endif 1144115924b6SShreyas Bhatewara vmxnet3_getRxComp(rcd, &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, 1145115924b6SShreyas Bhatewara &rxComp); 1146d1a890faSShreyas Bhatewara while (rcd->gen == rq->comp_ring.gen) { 1147d1a890faSShreyas Bhatewara struct vmxnet3_rx_buf_info *rbi; 1148d1a890faSShreyas Bhatewara struct sk_buff *skb; 1149d1a890faSShreyas Bhatewara int num_to_alloc; 1150d1a890faSShreyas Bhatewara struct Vmxnet3_RxDesc *rxd; 1151d1a890faSShreyas Bhatewara u32 idx, ring_idx; 1152d1a890faSShreyas Bhatewara 1153d1a890faSShreyas Bhatewara if (num_rxd >= quota) { 1154d1a890faSShreyas Bhatewara /* we may stop even before we see the EOP desc of 1155d1a890faSShreyas Bhatewara * the current pkt 1156d1a890faSShreyas Bhatewara */ 1157d1a890faSShreyas Bhatewara break; 1158d1a890faSShreyas Bhatewara } 1159d1a890faSShreyas Bhatewara num_rxd++; 116009c5088eSShreyas Bhatewara BUG_ON(rcd->rqID != rq->qid && rcd->rqID != rq->qid2); 1161d1a890faSShreyas Bhatewara idx = rcd->rxdIdx; 116209c5088eSShreyas Bhatewara ring_idx = rcd->rqID < adapter->num_rx_queues ? 0 : 1; 1163115924b6SShreyas Bhatewara vmxnet3_getRxDesc(rxd, &rq->rx_ring[ring_idx].base[idx].rxd, 1164115924b6SShreyas Bhatewara &rxCmdDesc); 1165d1a890faSShreyas Bhatewara rbi = rq->buf_info[ring_idx] + idx; 1166d1a890faSShreyas Bhatewara 1167115924b6SShreyas Bhatewara BUG_ON(rxd->addr != rbi->dma_addr || 1168115924b6SShreyas Bhatewara rxd->len != rbi->len); 1169d1a890faSShreyas Bhatewara 1170d1a890faSShreyas Bhatewara if (unlikely(rcd->eop && rcd->err)) { 1171d1a890faSShreyas Bhatewara vmxnet3_rx_error(rq, rcd, ctx, adapter); 1172d1a890faSShreyas Bhatewara goto rcd_done; 1173d1a890faSShreyas Bhatewara } 1174d1a890faSShreyas Bhatewara 1175d1a890faSShreyas Bhatewara if (rcd->sop) { /* first buf of the pkt */ 1176d1a890faSShreyas Bhatewara BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_HEAD || 1177d1a890faSShreyas Bhatewara rcd->rqID != rq->qid); 1178d1a890faSShreyas Bhatewara 1179d1a890faSShreyas Bhatewara BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_SKB); 1180d1a890faSShreyas Bhatewara BUG_ON(ctx->skb != NULL || rbi->skb == NULL); 1181d1a890faSShreyas Bhatewara 1182d1a890faSShreyas Bhatewara if (unlikely(rcd->len == 0)) { 1183d1a890faSShreyas Bhatewara /* Pretend the rx buffer is skipped. */ 1184d1a890faSShreyas Bhatewara BUG_ON(!(rcd->sop && rcd->eop)); 1185f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 1186f6965582SRandy Dunlap "rxRing[%u][%u] 0 length\n", 1187d1a890faSShreyas Bhatewara ring_idx, idx); 1188d1a890faSShreyas Bhatewara goto rcd_done; 1189d1a890faSShreyas Bhatewara } 1190d1a890faSShreyas Bhatewara 1191d1a890faSShreyas Bhatewara ctx->skb = rbi->skb; 1192d1a890faSShreyas Bhatewara rbi->skb = NULL; 1193d1a890faSShreyas Bhatewara 1194d1a890faSShreyas Bhatewara pci_unmap_single(adapter->pdev, rbi->dma_addr, rbi->len, 1195d1a890faSShreyas Bhatewara PCI_DMA_FROMDEVICE); 1196d1a890faSShreyas Bhatewara 1197d1a890faSShreyas Bhatewara skb_put(ctx->skb, rcd->len); 1198d1a890faSShreyas Bhatewara } else { 1199d1a890faSShreyas Bhatewara BUG_ON(ctx->skb == NULL); 1200d1a890faSShreyas Bhatewara /* non SOP buffer must be type 1 in most cases */ 1201d1a890faSShreyas Bhatewara if (rbi->buf_type == VMXNET3_RX_BUF_PAGE) { 1202d1a890faSShreyas Bhatewara BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_BODY); 1203d1a890faSShreyas Bhatewara 1204d1a890faSShreyas Bhatewara if (rcd->len) { 1205d1a890faSShreyas Bhatewara pci_unmap_page(adapter->pdev, 1206d1a890faSShreyas Bhatewara rbi->dma_addr, rbi->len, 1207d1a890faSShreyas Bhatewara PCI_DMA_FROMDEVICE); 1208d1a890faSShreyas Bhatewara 1209d1a890faSShreyas Bhatewara vmxnet3_append_frag(ctx->skb, rcd, rbi); 1210d1a890faSShreyas Bhatewara rbi->page = NULL; 1211d1a890faSShreyas Bhatewara } 1212d1a890faSShreyas Bhatewara } else { 1213d1a890faSShreyas Bhatewara /* 1214d1a890faSShreyas Bhatewara * The only time a non-SOP buffer is type 0 is 1215d1a890faSShreyas Bhatewara * when it's EOP and error flag is raised, which 1216d1a890faSShreyas Bhatewara * has already been handled. 1217d1a890faSShreyas Bhatewara */ 1218d1a890faSShreyas Bhatewara BUG_ON(true); 1219d1a890faSShreyas Bhatewara } 1220d1a890faSShreyas Bhatewara } 1221d1a890faSShreyas Bhatewara 1222d1a890faSShreyas Bhatewara skb = ctx->skb; 1223d1a890faSShreyas Bhatewara if (rcd->eop) { 1224d1a890faSShreyas Bhatewara skb->len += skb->data_len; 1225d1a890faSShreyas Bhatewara skb->truesize += skb->data_len; 1226d1a890faSShreyas Bhatewara 1227d1a890faSShreyas Bhatewara vmxnet3_rx_csum(adapter, skb, 1228d1a890faSShreyas Bhatewara (union Vmxnet3_GenericDesc *)rcd); 1229d1a890faSShreyas Bhatewara skb->protocol = eth_type_trans(skb, adapter->netdev); 1230d1a890faSShreyas Bhatewara 1231d1a890faSShreyas Bhatewara if (unlikely(adapter->vlan_grp && rcd->ts)) { 1232d1a890faSShreyas Bhatewara vlan_hwaccel_receive_skb(skb, 1233d1a890faSShreyas Bhatewara adapter->vlan_grp, rcd->tci); 1234d1a890faSShreyas Bhatewara } else { 1235d1a890faSShreyas Bhatewara netif_receive_skb(skb); 1236d1a890faSShreyas Bhatewara } 1237d1a890faSShreyas Bhatewara 1238d1a890faSShreyas Bhatewara ctx->skb = NULL; 1239d1a890faSShreyas Bhatewara } 1240d1a890faSShreyas Bhatewara 1241d1a890faSShreyas Bhatewara rcd_done: 1242d1a890faSShreyas Bhatewara /* device may skip some rx descs */ 1243d1a890faSShreyas Bhatewara rq->rx_ring[ring_idx].next2comp = idx; 1244d1a890faSShreyas Bhatewara VMXNET3_INC_RING_IDX_ONLY(rq->rx_ring[ring_idx].next2comp, 1245d1a890faSShreyas Bhatewara rq->rx_ring[ring_idx].size); 1246d1a890faSShreyas Bhatewara 1247d1a890faSShreyas Bhatewara /* refill rx buffers frequently to avoid starving the h/w */ 1248d1a890faSShreyas Bhatewara num_to_alloc = vmxnet3_cmd_ring_desc_avail(rq->rx_ring + 1249d1a890faSShreyas Bhatewara ring_idx); 1250d1a890faSShreyas Bhatewara if (unlikely(num_to_alloc > VMXNET3_RX_ALLOC_THRESHOLD(rq, 1251d1a890faSShreyas Bhatewara ring_idx, adapter))) { 1252d1a890faSShreyas Bhatewara vmxnet3_rq_alloc_rx_buf(rq, ring_idx, num_to_alloc, 1253d1a890faSShreyas Bhatewara adapter); 1254d1a890faSShreyas Bhatewara 1255d1a890faSShreyas Bhatewara /* if needed, update the register */ 1256d1a890faSShreyas Bhatewara if (unlikely(rq->shared->updateRxProd)) { 1257d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR0_REG(adapter, 1258d1a890faSShreyas Bhatewara rxprod_reg[ring_idx] + rq->qid * 8, 1259d1a890faSShreyas Bhatewara rq->rx_ring[ring_idx].next2fill); 1260d1a890faSShreyas Bhatewara rq->uncommitted[ring_idx] = 0; 1261d1a890faSShreyas Bhatewara } 1262d1a890faSShreyas Bhatewara } 1263d1a890faSShreyas Bhatewara 1264d1a890faSShreyas Bhatewara vmxnet3_comp_ring_adv_next2proc(&rq->comp_ring); 1265115924b6SShreyas Bhatewara vmxnet3_getRxComp(rcd, 1266115924b6SShreyas Bhatewara &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, &rxComp); 1267d1a890faSShreyas Bhatewara } 1268d1a890faSShreyas Bhatewara 1269d1a890faSShreyas Bhatewara return num_rxd; 1270d1a890faSShreyas Bhatewara } 1271d1a890faSShreyas Bhatewara 1272d1a890faSShreyas Bhatewara 1273d1a890faSShreyas Bhatewara static void 1274d1a890faSShreyas Bhatewara vmxnet3_rq_cleanup(struct vmxnet3_rx_queue *rq, 1275d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 1276d1a890faSShreyas Bhatewara { 1277d1a890faSShreyas Bhatewara u32 i, ring_idx; 1278d1a890faSShreyas Bhatewara struct Vmxnet3_RxDesc *rxd; 1279d1a890faSShreyas Bhatewara 1280d1a890faSShreyas Bhatewara for (ring_idx = 0; ring_idx < 2; ring_idx++) { 1281d1a890faSShreyas Bhatewara for (i = 0; i < rq->rx_ring[ring_idx].size; i++) { 1282115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 1283115924b6SShreyas Bhatewara struct Vmxnet3_RxDesc rxDesc; 1284115924b6SShreyas Bhatewara #endif 1285115924b6SShreyas Bhatewara vmxnet3_getRxDesc(rxd, 1286115924b6SShreyas Bhatewara &rq->rx_ring[ring_idx].base[i].rxd, &rxDesc); 1287d1a890faSShreyas Bhatewara 1288d1a890faSShreyas Bhatewara if (rxd->btype == VMXNET3_RXD_BTYPE_HEAD && 1289d1a890faSShreyas Bhatewara rq->buf_info[ring_idx][i].skb) { 1290d1a890faSShreyas Bhatewara pci_unmap_single(adapter->pdev, rxd->addr, 1291d1a890faSShreyas Bhatewara rxd->len, PCI_DMA_FROMDEVICE); 1292d1a890faSShreyas Bhatewara dev_kfree_skb(rq->buf_info[ring_idx][i].skb); 1293d1a890faSShreyas Bhatewara rq->buf_info[ring_idx][i].skb = NULL; 1294d1a890faSShreyas Bhatewara } else if (rxd->btype == VMXNET3_RXD_BTYPE_BODY && 1295d1a890faSShreyas Bhatewara rq->buf_info[ring_idx][i].page) { 1296d1a890faSShreyas Bhatewara pci_unmap_page(adapter->pdev, rxd->addr, 1297d1a890faSShreyas Bhatewara rxd->len, PCI_DMA_FROMDEVICE); 1298d1a890faSShreyas Bhatewara put_page(rq->buf_info[ring_idx][i].page); 1299d1a890faSShreyas Bhatewara rq->buf_info[ring_idx][i].page = NULL; 1300d1a890faSShreyas Bhatewara } 1301d1a890faSShreyas Bhatewara } 1302d1a890faSShreyas Bhatewara 1303d1a890faSShreyas Bhatewara rq->rx_ring[ring_idx].gen = VMXNET3_INIT_GEN; 1304d1a890faSShreyas Bhatewara rq->rx_ring[ring_idx].next2fill = 1305d1a890faSShreyas Bhatewara rq->rx_ring[ring_idx].next2comp = 0; 1306d1a890faSShreyas Bhatewara rq->uncommitted[ring_idx] = 0; 1307d1a890faSShreyas Bhatewara } 1308d1a890faSShreyas Bhatewara 1309d1a890faSShreyas Bhatewara rq->comp_ring.gen = VMXNET3_INIT_GEN; 1310d1a890faSShreyas Bhatewara rq->comp_ring.next2proc = 0; 1311d1a890faSShreyas Bhatewara } 1312d1a890faSShreyas Bhatewara 1313d1a890faSShreyas Bhatewara 131409c5088eSShreyas Bhatewara static void 131509c5088eSShreyas Bhatewara vmxnet3_rq_cleanup_all(struct vmxnet3_adapter *adapter) 131609c5088eSShreyas Bhatewara { 131709c5088eSShreyas Bhatewara int i; 131809c5088eSShreyas Bhatewara 131909c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 132009c5088eSShreyas Bhatewara vmxnet3_rq_cleanup(&adapter->rx_queue[i], adapter); 132109c5088eSShreyas Bhatewara } 132209c5088eSShreyas Bhatewara 132309c5088eSShreyas Bhatewara 1324d1a890faSShreyas Bhatewara void vmxnet3_rq_destroy(struct vmxnet3_rx_queue *rq, 1325d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 1326d1a890faSShreyas Bhatewara { 1327d1a890faSShreyas Bhatewara int i; 1328d1a890faSShreyas Bhatewara int j; 1329d1a890faSShreyas Bhatewara 1330d1a890faSShreyas Bhatewara /* all rx buffers must have already been freed */ 1331d1a890faSShreyas Bhatewara for (i = 0; i < 2; i++) { 1332d1a890faSShreyas Bhatewara if (rq->buf_info[i]) { 1333d1a890faSShreyas Bhatewara for (j = 0; j < rq->rx_ring[i].size; j++) 1334d1a890faSShreyas Bhatewara BUG_ON(rq->buf_info[i][j].page != NULL); 1335d1a890faSShreyas Bhatewara } 1336d1a890faSShreyas Bhatewara } 1337d1a890faSShreyas Bhatewara 1338d1a890faSShreyas Bhatewara 1339d1a890faSShreyas Bhatewara kfree(rq->buf_info[0]); 1340d1a890faSShreyas Bhatewara 1341d1a890faSShreyas Bhatewara for (i = 0; i < 2; i++) { 1342d1a890faSShreyas Bhatewara if (rq->rx_ring[i].base) { 1343d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, rq->rx_ring[i].size 1344d1a890faSShreyas Bhatewara * sizeof(struct Vmxnet3_RxDesc), 1345d1a890faSShreyas Bhatewara rq->rx_ring[i].base, 1346d1a890faSShreyas Bhatewara rq->rx_ring[i].basePA); 1347d1a890faSShreyas Bhatewara rq->rx_ring[i].base = NULL; 1348d1a890faSShreyas Bhatewara } 1349d1a890faSShreyas Bhatewara rq->buf_info[i] = NULL; 1350d1a890faSShreyas Bhatewara } 1351d1a890faSShreyas Bhatewara 1352d1a890faSShreyas Bhatewara if (rq->comp_ring.base) { 1353d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, rq->comp_ring.size * 1354d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_RxCompDesc), 1355d1a890faSShreyas Bhatewara rq->comp_ring.base, rq->comp_ring.basePA); 1356d1a890faSShreyas Bhatewara rq->comp_ring.base = NULL; 1357d1a890faSShreyas Bhatewara } 1358d1a890faSShreyas Bhatewara } 1359d1a890faSShreyas Bhatewara 1360d1a890faSShreyas Bhatewara 1361d1a890faSShreyas Bhatewara static int 1362d1a890faSShreyas Bhatewara vmxnet3_rq_init(struct vmxnet3_rx_queue *rq, 1363d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 1364d1a890faSShreyas Bhatewara { 1365d1a890faSShreyas Bhatewara int i; 1366d1a890faSShreyas Bhatewara 1367d1a890faSShreyas Bhatewara /* initialize buf_info */ 1368d1a890faSShreyas Bhatewara for (i = 0; i < rq->rx_ring[0].size; i++) { 1369d1a890faSShreyas Bhatewara 1370d1a890faSShreyas Bhatewara /* 1st buf for a pkt is skbuff */ 1371d1a890faSShreyas Bhatewara if (i % adapter->rx_buf_per_pkt == 0) { 1372d1a890faSShreyas Bhatewara rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_SKB; 1373d1a890faSShreyas Bhatewara rq->buf_info[0][i].len = adapter->skb_buf_size; 1374d1a890faSShreyas Bhatewara } else { /* subsequent bufs for a pkt is frag */ 1375d1a890faSShreyas Bhatewara rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_PAGE; 1376d1a890faSShreyas Bhatewara rq->buf_info[0][i].len = PAGE_SIZE; 1377d1a890faSShreyas Bhatewara } 1378d1a890faSShreyas Bhatewara } 1379d1a890faSShreyas Bhatewara for (i = 0; i < rq->rx_ring[1].size; i++) { 1380d1a890faSShreyas Bhatewara rq->buf_info[1][i].buf_type = VMXNET3_RX_BUF_PAGE; 1381d1a890faSShreyas Bhatewara rq->buf_info[1][i].len = PAGE_SIZE; 1382d1a890faSShreyas Bhatewara } 1383d1a890faSShreyas Bhatewara 1384d1a890faSShreyas Bhatewara /* reset internal state and allocate buffers for both rings */ 1385d1a890faSShreyas Bhatewara for (i = 0; i < 2; i++) { 1386d1a890faSShreyas Bhatewara rq->rx_ring[i].next2fill = rq->rx_ring[i].next2comp = 0; 1387d1a890faSShreyas Bhatewara rq->uncommitted[i] = 0; 1388d1a890faSShreyas Bhatewara 1389d1a890faSShreyas Bhatewara memset(rq->rx_ring[i].base, 0, rq->rx_ring[i].size * 1390d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_RxDesc)); 1391d1a890faSShreyas Bhatewara rq->rx_ring[i].gen = VMXNET3_INIT_GEN; 1392d1a890faSShreyas Bhatewara } 1393d1a890faSShreyas Bhatewara if (vmxnet3_rq_alloc_rx_buf(rq, 0, rq->rx_ring[0].size - 1, 1394d1a890faSShreyas Bhatewara adapter) == 0) { 1395d1a890faSShreyas Bhatewara /* at least has 1 rx buffer for the 1st ring */ 1396d1a890faSShreyas Bhatewara return -ENOMEM; 1397d1a890faSShreyas Bhatewara } 1398d1a890faSShreyas Bhatewara vmxnet3_rq_alloc_rx_buf(rq, 1, rq->rx_ring[1].size - 1, adapter); 1399d1a890faSShreyas Bhatewara 1400d1a890faSShreyas Bhatewara /* reset the comp ring */ 1401d1a890faSShreyas Bhatewara rq->comp_ring.next2proc = 0; 1402d1a890faSShreyas Bhatewara memset(rq->comp_ring.base, 0, rq->comp_ring.size * 1403d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_RxCompDesc)); 1404d1a890faSShreyas Bhatewara rq->comp_ring.gen = VMXNET3_INIT_GEN; 1405d1a890faSShreyas Bhatewara 1406d1a890faSShreyas Bhatewara /* reset rxctx */ 1407d1a890faSShreyas Bhatewara rq->rx_ctx.skb = NULL; 1408d1a890faSShreyas Bhatewara 1409d1a890faSShreyas Bhatewara /* stats are not reset */ 1410d1a890faSShreyas Bhatewara return 0; 1411d1a890faSShreyas Bhatewara } 1412d1a890faSShreyas Bhatewara 1413d1a890faSShreyas Bhatewara 1414d1a890faSShreyas Bhatewara static int 141509c5088eSShreyas Bhatewara vmxnet3_rq_init_all(struct vmxnet3_adapter *adapter) 141609c5088eSShreyas Bhatewara { 141709c5088eSShreyas Bhatewara int i, err = 0; 141809c5088eSShreyas Bhatewara 141909c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 142009c5088eSShreyas Bhatewara err = vmxnet3_rq_init(&adapter->rx_queue[i], adapter); 142109c5088eSShreyas Bhatewara if (unlikely(err)) { 142209c5088eSShreyas Bhatewara dev_err(&adapter->netdev->dev, "%s: failed to " 142309c5088eSShreyas Bhatewara "initialize rx queue%i\n", 142409c5088eSShreyas Bhatewara adapter->netdev->name, i); 142509c5088eSShreyas Bhatewara break; 142609c5088eSShreyas Bhatewara } 142709c5088eSShreyas Bhatewara } 142809c5088eSShreyas Bhatewara return err; 142909c5088eSShreyas Bhatewara 143009c5088eSShreyas Bhatewara } 143109c5088eSShreyas Bhatewara 143209c5088eSShreyas Bhatewara 143309c5088eSShreyas Bhatewara static int 1434d1a890faSShreyas Bhatewara vmxnet3_rq_create(struct vmxnet3_rx_queue *rq, struct vmxnet3_adapter *adapter) 1435d1a890faSShreyas Bhatewara { 1436d1a890faSShreyas Bhatewara int i; 1437d1a890faSShreyas Bhatewara size_t sz; 1438d1a890faSShreyas Bhatewara struct vmxnet3_rx_buf_info *bi; 1439d1a890faSShreyas Bhatewara 1440d1a890faSShreyas Bhatewara for (i = 0; i < 2; i++) { 1441d1a890faSShreyas Bhatewara 1442d1a890faSShreyas Bhatewara sz = rq->rx_ring[i].size * sizeof(struct Vmxnet3_RxDesc); 1443d1a890faSShreyas Bhatewara rq->rx_ring[i].base = pci_alloc_consistent(adapter->pdev, sz, 1444d1a890faSShreyas Bhatewara &rq->rx_ring[i].basePA); 1445d1a890faSShreyas Bhatewara if (!rq->rx_ring[i].base) { 1446d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate rx ring %d\n", 1447d1a890faSShreyas Bhatewara adapter->netdev->name, i); 1448d1a890faSShreyas Bhatewara goto err; 1449d1a890faSShreyas Bhatewara } 1450d1a890faSShreyas Bhatewara } 1451d1a890faSShreyas Bhatewara 1452d1a890faSShreyas Bhatewara sz = rq->comp_ring.size * sizeof(struct Vmxnet3_RxCompDesc); 1453d1a890faSShreyas Bhatewara rq->comp_ring.base = pci_alloc_consistent(adapter->pdev, sz, 1454d1a890faSShreyas Bhatewara &rq->comp_ring.basePA); 1455d1a890faSShreyas Bhatewara if (!rq->comp_ring.base) { 1456d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate rx comp ring\n", 1457d1a890faSShreyas Bhatewara adapter->netdev->name); 1458d1a890faSShreyas Bhatewara goto err; 1459d1a890faSShreyas Bhatewara } 1460d1a890faSShreyas Bhatewara 1461d1a890faSShreyas Bhatewara sz = sizeof(struct vmxnet3_rx_buf_info) * (rq->rx_ring[0].size + 1462d1a890faSShreyas Bhatewara rq->rx_ring[1].size); 1463476c609eSJulia Lawall bi = kzalloc(sz, GFP_KERNEL); 1464d1a890faSShreyas Bhatewara if (!bi) { 1465d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate rx bufinfo\n", 1466d1a890faSShreyas Bhatewara adapter->netdev->name); 1467d1a890faSShreyas Bhatewara goto err; 1468d1a890faSShreyas Bhatewara } 1469d1a890faSShreyas Bhatewara rq->buf_info[0] = bi; 1470d1a890faSShreyas Bhatewara rq->buf_info[1] = bi + rq->rx_ring[0].size; 1471d1a890faSShreyas Bhatewara 1472d1a890faSShreyas Bhatewara return 0; 1473d1a890faSShreyas Bhatewara 1474d1a890faSShreyas Bhatewara err: 1475d1a890faSShreyas Bhatewara vmxnet3_rq_destroy(rq, adapter); 1476d1a890faSShreyas Bhatewara return -ENOMEM; 1477d1a890faSShreyas Bhatewara } 1478d1a890faSShreyas Bhatewara 1479d1a890faSShreyas Bhatewara 1480d1a890faSShreyas Bhatewara static int 148109c5088eSShreyas Bhatewara vmxnet3_rq_create_all(struct vmxnet3_adapter *adapter) 148209c5088eSShreyas Bhatewara { 148309c5088eSShreyas Bhatewara int i, err = 0; 148409c5088eSShreyas Bhatewara 148509c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 148609c5088eSShreyas Bhatewara err = vmxnet3_rq_create(&adapter->rx_queue[i], adapter); 148709c5088eSShreyas Bhatewara if (unlikely(err)) { 148809c5088eSShreyas Bhatewara dev_err(&adapter->netdev->dev, 148909c5088eSShreyas Bhatewara "%s: failed to create rx queue%i\n", 149009c5088eSShreyas Bhatewara adapter->netdev->name, i); 149109c5088eSShreyas Bhatewara goto err_out; 149209c5088eSShreyas Bhatewara } 149309c5088eSShreyas Bhatewara } 149409c5088eSShreyas Bhatewara return err; 149509c5088eSShreyas Bhatewara err_out: 149609c5088eSShreyas Bhatewara vmxnet3_rq_destroy_all(adapter); 149709c5088eSShreyas Bhatewara return err; 149809c5088eSShreyas Bhatewara 149909c5088eSShreyas Bhatewara } 150009c5088eSShreyas Bhatewara 150109c5088eSShreyas Bhatewara /* Multiple queue aware polling function for tx and rx */ 150209c5088eSShreyas Bhatewara 150309c5088eSShreyas Bhatewara static int 1504d1a890faSShreyas Bhatewara vmxnet3_do_poll(struct vmxnet3_adapter *adapter, int budget) 1505d1a890faSShreyas Bhatewara { 150609c5088eSShreyas Bhatewara int rcd_done = 0, i; 1507d1a890faSShreyas Bhatewara if (unlikely(adapter->shared->ecr)) 1508d1a890faSShreyas Bhatewara vmxnet3_process_events(adapter); 150909c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 151009c5088eSShreyas Bhatewara vmxnet3_tq_tx_complete(&adapter->tx_queue[i], adapter); 1511d1a890faSShreyas Bhatewara 151209c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 151309c5088eSShreyas Bhatewara rcd_done += vmxnet3_rq_rx_complete(&adapter->rx_queue[i], 151409c5088eSShreyas Bhatewara adapter, budget); 151509c5088eSShreyas Bhatewara return rcd_done; 1516d1a890faSShreyas Bhatewara } 1517d1a890faSShreyas Bhatewara 1518d1a890faSShreyas Bhatewara 1519d1a890faSShreyas Bhatewara static int 1520d1a890faSShreyas Bhatewara vmxnet3_poll(struct napi_struct *napi, int budget) 1521d1a890faSShreyas Bhatewara { 152209c5088eSShreyas Bhatewara struct vmxnet3_rx_queue *rx_queue = container_of(napi, 152309c5088eSShreyas Bhatewara struct vmxnet3_rx_queue, napi); 1524d1a890faSShreyas Bhatewara int rxd_done; 1525d1a890faSShreyas Bhatewara 152609c5088eSShreyas Bhatewara rxd_done = vmxnet3_do_poll(rx_queue->adapter, budget); 1527d1a890faSShreyas Bhatewara 1528d1a890faSShreyas Bhatewara if (rxd_done < budget) { 1529d1a890faSShreyas Bhatewara napi_complete(napi); 153009c5088eSShreyas Bhatewara vmxnet3_enable_all_intrs(rx_queue->adapter); 1531d1a890faSShreyas Bhatewara } 1532d1a890faSShreyas Bhatewara return rxd_done; 1533d1a890faSShreyas Bhatewara } 1534d1a890faSShreyas Bhatewara 153509c5088eSShreyas Bhatewara /* 153609c5088eSShreyas Bhatewara * NAPI polling function for MSI-X mode with multiple Rx queues 153709c5088eSShreyas Bhatewara * Returns the # of the NAPI credit consumed (# of rx descriptors processed) 153809c5088eSShreyas Bhatewara */ 153909c5088eSShreyas Bhatewara 154009c5088eSShreyas Bhatewara static int 154109c5088eSShreyas Bhatewara vmxnet3_poll_rx_only(struct napi_struct *napi, int budget) 154209c5088eSShreyas Bhatewara { 154309c5088eSShreyas Bhatewara struct vmxnet3_rx_queue *rq = container_of(napi, 154409c5088eSShreyas Bhatewara struct vmxnet3_rx_queue, napi); 154509c5088eSShreyas Bhatewara struct vmxnet3_adapter *adapter = rq->adapter; 154609c5088eSShreyas Bhatewara int rxd_done; 154709c5088eSShreyas Bhatewara 154809c5088eSShreyas Bhatewara /* When sharing interrupt with corresponding tx queue, process 154909c5088eSShreyas Bhatewara * tx completions in that queue as well 155009c5088eSShreyas Bhatewara */ 155109c5088eSShreyas Bhatewara if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE) { 155209c5088eSShreyas Bhatewara struct vmxnet3_tx_queue *tq = 155309c5088eSShreyas Bhatewara &adapter->tx_queue[rq - adapter->rx_queue]; 155409c5088eSShreyas Bhatewara vmxnet3_tq_tx_complete(tq, adapter); 155509c5088eSShreyas Bhatewara } 155609c5088eSShreyas Bhatewara 155709c5088eSShreyas Bhatewara rxd_done = vmxnet3_rq_rx_complete(rq, adapter, budget); 155809c5088eSShreyas Bhatewara 155909c5088eSShreyas Bhatewara if (rxd_done < budget) { 156009c5088eSShreyas Bhatewara napi_complete(napi); 156109c5088eSShreyas Bhatewara vmxnet3_enable_intr(adapter, rq->comp_ring.intr_idx); 156209c5088eSShreyas Bhatewara } 156309c5088eSShreyas Bhatewara return rxd_done; 156409c5088eSShreyas Bhatewara } 156509c5088eSShreyas Bhatewara 156609c5088eSShreyas Bhatewara 156709c5088eSShreyas Bhatewara #ifdef CONFIG_PCI_MSI 156809c5088eSShreyas Bhatewara 156909c5088eSShreyas Bhatewara /* 157009c5088eSShreyas Bhatewara * Handle completion interrupts on tx queues 157109c5088eSShreyas Bhatewara * Returns whether or not the intr is handled 157209c5088eSShreyas Bhatewara */ 157309c5088eSShreyas Bhatewara 157409c5088eSShreyas Bhatewara static irqreturn_t 157509c5088eSShreyas Bhatewara vmxnet3_msix_tx(int irq, void *data) 157609c5088eSShreyas Bhatewara { 157709c5088eSShreyas Bhatewara struct vmxnet3_tx_queue *tq = data; 157809c5088eSShreyas Bhatewara struct vmxnet3_adapter *adapter = tq->adapter; 157909c5088eSShreyas Bhatewara 158009c5088eSShreyas Bhatewara if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 158109c5088eSShreyas Bhatewara vmxnet3_disable_intr(adapter, tq->comp_ring.intr_idx); 158209c5088eSShreyas Bhatewara 158309c5088eSShreyas Bhatewara /* Handle the case where only one irq is allocate for all tx queues */ 158409c5088eSShreyas Bhatewara if (adapter->share_intr == VMXNET3_INTR_TXSHARE) { 158509c5088eSShreyas Bhatewara int i; 158609c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) { 158709c5088eSShreyas Bhatewara struct vmxnet3_tx_queue *txq = &adapter->tx_queue[i]; 158809c5088eSShreyas Bhatewara vmxnet3_tq_tx_complete(txq, adapter); 158909c5088eSShreyas Bhatewara } 159009c5088eSShreyas Bhatewara } else { 159109c5088eSShreyas Bhatewara vmxnet3_tq_tx_complete(tq, adapter); 159209c5088eSShreyas Bhatewara } 159309c5088eSShreyas Bhatewara vmxnet3_enable_intr(adapter, tq->comp_ring.intr_idx); 159409c5088eSShreyas Bhatewara 159509c5088eSShreyas Bhatewara return IRQ_HANDLED; 159609c5088eSShreyas Bhatewara } 159709c5088eSShreyas Bhatewara 159809c5088eSShreyas Bhatewara 159909c5088eSShreyas Bhatewara /* 160009c5088eSShreyas Bhatewara * Handle completion interrupts on rx queues. Returns whether or not the 160109c5088eSShreyas Bhatewara * intr is handled 160209c5088eSShreyas Bhatewara */ 160309c5088eSShreyas Bhatewara 160409c5088eSShreyas Bhatewara static irqreturn_t 160509c5088eSShreyas Bhatewara vmxnet3_msix_rx(int irq, void *data) 160609c5088eSShreyas Bhatewara { 160709c5088eSShreyas Bhatewara struct vmxnet3_rx_queue *rq = data; 160809c5088eSShreyas Bhatewara struct vmxnet3_adapter *adapter = rq->adapter; 160909c5088eSShreyas Bhatewara 161009c5088eSShreyas Bhatewara /* disable intr if needed */ 161109c5088eSShreyas Bhatewara if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 161209c5088eSShreyas Bhatewara vmxnet3_disable_intr(adapter, rq->comp_ring.intr_idx); 161309c5088eSShreyas Bhatewara napi_schedule(&rq->napi); 161409c5088eSShreyas Bhatewara 161509c5088eSShreyas Bhatewara return IRQ_HANDLED; 161609c5088eSShreyas Bhatewara } 161709c5088eSShreyas Bhatewara 161809c5088eSShreyas Bhatewara /* 161909c5088eSShreyas Bhatewara *---------------------------------------------------------------------------- 162009c5088eSShreyas Bhatewara * 162109c5088eSShreyas Bhatewara * vmxnet3_msix_event -- 162209c5088eSShreyas Bhatewara * 162309c5088eSShreyas Bhatewara * vmxnet3 msix event intr handler 162409c5088eSShreyas Bhatewara * 162509c5088eSShreyas Bhatewara * Result: 162609c5088eSShreyas Bhatewara * whether or not the intr is handled 162709c5088eSShreyas Bhatewara * 162809c5088eSShreyas Bhatewara *---------------------------------------------------------------------------- 162909c5088eSShreyas Bhatewara */ 163009c5088eSShreyas Bhatewara 163109c5088eSShreyas Bhatewara static irqreturn_t 163209c5088eSShreyas Bhatewara vmxnet3_msix_event(int irq, void *data) 163309c5088eSShreyas Bhatewara { 163409c5088eSShreyas Bhatewara struct net_device *dev = data; 163509c5088eSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(dev); 163609c5088eSShreyas Bhatewara 163709c5088eSShreyas Bhatewara /* disable intr if needed */ 163809c5088eSShreyas Bhatewara if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 163909c5088eSShreyas Bhatewara vmxnet3_disable_intr(adapter, adapter->intr.event_intr_idx); 164009c5088eSShreyas Bhatewara 164109c5088eSShreyas Bhatewara if (adapter->shared->ecr) 164209c5088eSShreyas Bhatewara vmxnet3_process_events(adapter); 164309c5088eSShreyas Bhatewara 164409c5088eSShreyas Bhatewara vmxnet3_enable_intr(adapter, adapter->intr.event_intr_idx); 164509c5088eSShreyas Bhatewara 164609c5088eSShreyas Bhatewara return IRQ_HANDLED; 164709c5088eSShreyas Bhatewara } 164809c5088eSShreyas Bhatewara 164909c5088eSShreyas Bhatewara #endif /* CONFIG_PCI_MSI */ 165009c5088eSShreyas Bhatewara 1651d1a890faSShreyas Bhatewara 1652d1a890faSShreyas Bhatewara /* Interrupt handler for vmxnet3 */ 1653d1a890faSShreyas Bhatewara static irqreturn_t 1654d1a890faSShreyas Bhatewara vmxnet3_intr(int irq, void *dev_id) 1655d1a890faSShreyas Bhatewara { 1656d1a890faSShreyas Bhatewara struct net_device *dev = dev_id; 1657d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(dev); 1658d1a890faSShreyas Bhatewara 165909c5088eSShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_INTX) { 1660d1a890faSShreyas Bhatewara u32 icr = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_ICR); 1661d1a890faSShreyas Bhatewara if (unlikely(icr == 0)) 1662d1a890faSShreyas Bhatewara /* not ours */ 1663d1a890faSShreyas Bhatewara return IRQ_NONE; 1664d1a890faSShreyas Bhatewara } 1665d1a890faSShreyas Bhatewara 1666d1a890faSShreyas Bhatewara 1667d1a890faSShreyas Bhatewara /* disable intr if needed */ 1668d1a890faSShreyas Bhatewara if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 166909c5088eSShreyas Bhatewara vmxnet3_disable_all_intrs(adapter); 1670d1a890faSShreyas Bhatewara 167109c5088eSShreyas Bhatewara napi_schedule(&adapter->rx_queue[0].napi); 1672d1a890faSShreyas Bhatewara 1673d1a890faSShreyas Bhatewara return IRQ_HANDLED; 1674d1a890faSShreyas Bhatewara } 1675d1a890faSShreyas Bhatewara 1676d1a890faSShreyas Bhatewara #ifdef CONFIG_NET_POLL_CONTROLLER 1677d1a890faSShreyas Bhatewara 1678d1a890faSShreyas Bhatewara /* netpoll callback. */ 1679d1a890faSShreyas Bhatewara static void 1680d1a890faSShreyas Bhatewara vmxnet3_netpoll(struct net_device *netdev) 1681d1a890faSShreyas Bhatewara { 1682d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1683d1a890faSShreyas Bhatewara 168409c5088eSShreyas Bhatewara if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 168509c5088eSShreyas Bhatewara vmxnet3_disable_all_intrs(adapter); 1686d1a890faSShreyas Bhatewara 168709c5088eSShreyas Bhatewara vmxnet3_do_poll(adapter, adapter->rx_queue[0].rx_ring[0].size); 168809c5088eSShreyas Bhatewara vmxnet3_enable_all_intrs(adapter); 168909c5088eSShreyas Bhatewara 1690d1a890faSShreyas Bhatewara } 169109c5088eSShreyas Bhatewara #endif /* CONFIG_NET_POLL_CONTROLLER */ 1692d1a890faSShreyas Bhatewara 1693d1a890faSShreyas Bhatewara static int 1694d1a890faSShreyas Bhatewara vmxnet3_request_irqs(struct vmxnet3_adapter *adapter) 1695d1a890faSShreyas Bhatewara { 169609c5088eSShreyas Bhatewara struct vmxnet3_intr *intr = &adapter->intr; 169709c5088eSShreyas Bhatewara int err = 0, i; 169809c5088eSShreyas Bhatewara int vector = 0; 1699d1a890faSShreyas Bhatewara 17008f7e524cSRandy Dunlap #ifdef CONFIG_PCI_MSI 1701d1a890faSShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_MSIX) { 170209c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) { 170309c5088eSShreyas Bhatewara if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) { 170409c5088eSShreyas Bhatewara sprintf(adapter->tx_queue[i].name, "%s-tx-%d", 170509c5088eSShreyas Bhatewara adapter->netdev->name, vector); 170609c5088eSShreyas Bhatewara err = request_irq( 170709c5088eSShreyas Bhatewara intr->msix_entries[vector].vector, 170809c5088eSShreyas Bhatewara vmxnet3_msix_tx, 0, 170909c5088eSShreyas Bhatewara adapter->tx_queue[i].name, 171009c5088eSShreyas Bhatewara &adapter->tx_queue[i]); 171109c5088eSShreyas Bhatewara } else { 171209c5088eSShreyas Bhatewara sprintf(adapter->tx_queue[i].name, "%s-rxtx-%d", 171309c5088eSShreyas Bhatewara adapter->netdev->name, vector); 171409c5088eSShreyas Bhatewara } 171509c5088eSShreyas Bhatewara if (err) { 171609c5088eSShreyas Bhatewara dev_err(&adapter->netdev->dev, 171709c5088eSShreyas Bhatewara "Failed to request irq for MSIX, %s, " 171809c5088eSShreyas Bhatewara "error %d\n", 171909c5088eSShreyas Bhatewara adapter->tx_queue[i].name, err); 172009c5088eSShreyas Bhatewara return err; 172109c5088eSShreyas Bhatewara } 172209c5088eSShreyas Bhatewara 172309c5088eSShreyas Bhatewara /* Handle the case where only 1 MSIx was allocated for 172409c5088eSShreyas Bhatewara * all tx queues */ 172509c5088eSShreyas Bhatewara if (adapter->share_intr == VMXNET3_INTR_TXSHARE) { 172609c5088eSShreyas Bhatewara for (; i < adapter->num_tx_queues; i++) 172709c5088eSShreyas Bhatewara adapter->tx_queue[i].comp_ring.intr_idx 172809c5088eSShreyas Bhatewara = vector; 172909c5088eSShreyas Bhatewara vector++; 173009c5088eSShreyas Bhatewara break; 173109c5088eSShreyas Bhatewara } else { 173209c5088eSShreyas Bhatewara adapter->tx_queue[i].comp_ring.intr_idx 173309c5088eSShreyas Bhatewara = vector++; 173409c5088eSShreyas Bhatewara } 173509c5088eSShreyas Bhatewara } 173609c5088eSShreyas Bhatewara if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE) 173709c5088eSShreyas Bhatewara vector = 0; 173809c5088eSShreyas Bhatewara 173909c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 174009c5088eSShreyas Bhatewara if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) 174109c5088eSShreyas Bhatewara sprintf(adapter->rx_queue[i].name, "%s-rx-%d", 174209c5088eSShreyas Bhatewara adapter->netdev->name, vector); 174309c5088eSShreyas Bhatewara else 174409c5088eSShreyas Bhatewara sprintf(adapter->rx_queue[i].name, "%s-rxtx-%d", 174509c5088eSShreyas Bhatewara adapter->netdev->name, vector); 174609c5088eSShreyas Bhatewara err = request_irq(intr->msix_entries[vector].vector, 174709c5088eSShreyas Bhatewara vmxnet3_msix_rx, 0, 174809c5088eSShreyas Bhatewara adapter->rx_queue[i].name, 174909c5088eSShreyas Bhatewara &(adapter->rx_queue[i])); 175009c5088eSShreyas Bhatewara if (err) { 175109c5088eSShreyas Bhatewara printk(KERN_ERR "Failed to request irq for MSIX" 175209c5088eSShreyas Bhatewara ", %s, error %d\n", 175309c5088eSShreyas Bhatewara adapter->rx_queue[i].name, err); 175409c5088eSShreyas Bhatewara return err; 175509c5088eSShreyas Bhatewara } 175609c5088eSShreyas Bhatewara 175709c5088eSShreyas Bhatewara adapter->rx_queue[i].comp_ring.intr_idx = vector++; 175809c5088eSShreyas Bhatewara } 175909c5088eSShreyas Bhatewara 176009c5088eSShreyas Bhatewara sprintf(intr->event_msi_vector_name, "%s-event-%d", 176109c5088eSShreyas Bhatewara adapter->netdev->name, vector); 176209c5088eSShreyas Bhatewara err = request_irq(intr->msix_entries[vector].vector, 176309c5088eSShreyas Bhatewara vmxnet3_msix_event, 0, 176409c5088eSShreyas Bhatewara intr->event_msi_vector_name, adapter->netdev); 176509c5088eSShreyas Bhatewara intr->event_intr_idx = vector; 176609c5088eSShreyas Bhatewara 176709c5088eSShreyas Bhatewara } else if (intr->type == VMXNET3_IT_MSI) { 176809c5088eSShreyas Bhatewara adapter->num_rx_queues = 1; 1769d1a890faSShreyas Bhatewara err = request_irq(adapter->pdev->irq, vmxnet3_intr, 0, 1770d1a890faSShreyas Bhatewara adapter->netdev->name, adapter->netdev); 177109c5088eSShreyas Bhatewara } else { 1772115924b6SShreyas Bhatewara #endif 177309c5088eSShreyas Bhatewara adapter->num_rx_queues = 1; 1774d1a890faSShreyas Bhatewara err = request_irq(adapter->pdev->irq, vmxnet3_intr, 1775d1a890faSShreyas Bhatewara IRQF_SHARED, adapter->netdev->name, 1776d1a890faSShreyas Bhatewara adapter->netdev); 177709c5088eSShreyas Bhatewara #ifdef CONFIG_PCI_MSI 177809c5088eSShreyas Bhatewara } 177909c5088eSShreyas Bhatewara #endif 178009c5088eSShreyas Bhatewara intr->num_intrs = vector + 1; 178109c5088eSShreyas Bhatewara if (err) { 178209c5088eSShreyas Bhatewara printk(KERN_ERR "Failed to request irq %s (intr type:%d), error" 178309c5088eSShreyas Bhatewara ":%d\n", adapter->netdev->name, intr->type, err); 178409c5088eSShreyas Bhatewara } else { 178509c5088eSShreyas Bhatewara /* Number of rx queues will not change after this */ 178609c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 178709c5088eSShreyas Bhatewara struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i]; 178809c5088eSShreyas Bhatewara rq->qid = i; 178909c5088eSShreyas Bhatewara rq->qid2 = i + adapter->num_rx_queues; 1790d1a890faSShreyas Bhatewara } 1791d1a890faSShreyas Bhatewara 1792d1a890faSShreyas Bhatewara 1793d1a890faSShreyas Bhatewara 1794d1a890faSShreyas Bhatewara /* init our intr settings */ 179509c5088eSShreyas Bhatewara for (i = 0; i < intr->num_intrs; i++) 179609c5088eSShreyas Bhatewara intr->mod_levels[i] = UPT1_IML_ADAPTIVE; 179709c5088eSShreyas Bhatewara if (adapter->intr.type != VMXNET3_IT_MSIX) { 1798d1a890faSShreyas Bhatewara adapter->intr.event_intr_idx = 0; 179909c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 180009c5088eSShreyas Bhatewara adapter->tx_queue[i].comp_ring.intr_idx = 0; 180109c5088eSShreyas Bhatewara adapter->rx_queue[0].comp_ring.intr_idx = 0; 180209c5088eSShreyas Bhatewara } 1803d1a890faSShreyas Bhatewara 1804d1a890faSShreyas Bhatewara printk(KERN_INFO "%s: intr type %u, mode %u, %u vectors " 180509c5088eSShreyas Bhatewara "allocated\n", adapter->netdev->name, intr->type, 180609c5088eSShreyas Bhatewara intr->mask_mode, intr->num_intrs); 1807d1a890faSShreyas Bhatewara } 1808d1a890faSShreyas Bhatewara 1809d1a890faSShreyas Bhatewara return err; 1810d1a890faSShreyas Bhatewara } 1811d1a890faSShreyas Bhatewara 1812d1a890faSShreyas Bhatewara 1813d1a890faSShreyas Bhatewara static void 1814d1a890faSShreyas Bhatewara vmxnet3_free_irqs(struct vmxnet3_adapter *adapter) 1815d1a890faSShreyas Bhatewara { 181609c5088eSShreyas Bhatewara struct vmxnet3_intr *intr = &adapter->intr; 181709c5088eSShreyas Bhatewara BUG_ON(intr->type == VMXNET3_IT_AUTO || intr->num_intrs <= 0); 1818d1a890faSShreyas Bhatewara 181909c5088eSShreyas Bhatewara switch (intr->type) { 18208f7e524cSRandy Dunlap #ifdef CONFIG_PCI_MSI 1821d1a890faSShreyas Bhatewara case VMXNET3_IT_MSIX: 1822d1a890faSShreyas Bhatewara { 182309c5088eSShreyas Bhatewara int i, vector = 0; 1824d1a890faSShreyas Bhatewara 182509c5088eSShreyas Bhatewara if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) { 182609c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) { 182709c5088eSShreyas Bhatewara free_irq(intr->msix_entries[vector++].vector, 182809c5088eSShreyas Bhatewara &(adapter->tx_queue[i])); 182909c5088eSShreyas Bhatewara if (adapter->share_intr == VMXNET3_INTR_TXSHARE) 183009c5088eSShreyas Bhatewara break; 183109c5088eSShreyas Bhatewara } 183209c5088eSShreyas Bhatewara } 183309c5088eSShreyas Bhatewara 183409c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 183509c5088eSShreyas Bhatewara free_irq(intr->msix_entries[vector++].vector, 183609c5088eSShreyas Bhatewara &(adapter->rx_queue[i])); 183709c5088eSShreyas Bhatewara } 183809c5088eSShreyas Bhatewara 183909c5088eSShreyas Bhatewara free_irq(intr->msix_entries[vector].vector, 1840d1a890faSShreyas Bhatewara adapter->netdev); 184109c5088eSShreyas Bhatewara BUG_ON(vector >= intr->num_intrs); 1842d1a890faSShreyas Bhatewara break; 1843d1a890faSShreyas Bhatewara } 18448f7e524cSRandy Dunlap #endif 1845d1a890faSShreyas Bhatewara case VMXNET3_IT_MSI: 1846d1a890faSShreyas Bhatewara free_irq(adapter->pdev->irq, adapter->netdev); 1847d1a890faSShreyas Bhatewara break; 1848d1a890faSShreyas Bhatewara case VMXNET3_IT_INTX: 1849d1a890faSShreyas Bhatewara free_irq(adapter->pdev->irq, adapter->netdev); 1850d1a890faSShreyas Bhatewara break; 1851d1a890faSShreyas Bhatewara default: 1852d1a890faSShreyas Bhatewara BUG_ON(true); 1853d1a890faSShreyas Bhatewara } 1854d1a890faSShreyas Bhatewara } 1855d1a890faSShreyas Bhatewara 1856d1a890faSShreyas Bhatewara static void 1857d1a890faSShreyas Bhatewara vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) 1858d1a890faSShreyas Bhatewara { 1859d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1860d1a890faSShreyas Bhatewara struct Vmxnet3_DriverShared *shared = adapter->shared; 1861d1a890faSShreyas Bhatewara u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1862d1a890faSShreyas Bhatewara 1863d1a890faSShreyas Bhatewara if (grp) { 1864d1a890faSShreyas Bhatewara /* add vlan rx stripping. */ 1865d1a890faSShreyas Bhatewara if (adapter->netdev->features & NETIF_F_HW_VLAN_RX) { 1866d1a890faSShreyas Bhatewara int i; 1867d1a890faSShreyas Bhatewara struct Vmxnet3_DSDevRead *devRead = &shared->devRead; 1868d1a890faSShreyas Bhatewara adapter->vlan_grp = grp; 1869d1a890faSShreyas Bhatewara 1870d1a890faSShreyas Bhatewara /* update FEATURES to device */ 18713843e515SHarvey Harrison devRead->misc.uptFeatures |= UPT1_F_RXVLAN; 1872d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1873d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_FEATURE); 1874d1a890faSShreyas Bhatewara /* 1875d1a890faSShreyas Bhatewara * Clear entire vfTable; then enable untagged pkts. 1876d1a890faSShreyas Bhatewara * Note: setting one entry in vfTable to non-zero turns 1877d1a890faSShreyas Bhatewara * on VLAN rx filtering. 1878d1a890faSShreyas Bhatewara */ 1879d1a890faSShreyas Bhatewara for (i = 0; i < VMXNET3_VFT_SIZE; i++) 1880d1a890faSShreyas Bhatewara vfTable[i] = 0; 1881d1a890faSShreyas Bhatewara 1882d1a890faSShreyas Bhatewara VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0); 1883d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1884d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1885d1a890faSShreyas Bhatewara } else { 1886d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: vlan_rx_register when device has " 1887d1a890faSShreyas Bhatewara "no NETIF_F_HW_VLAN_RX\n", netdev->name); 1888d1a890faSShreyas Bhatewara } 1889d1a890faSShreyas Bhatewara } else { 1890d1a890faSShreyas Bhatewara /* remove vlan rx stripping. */ 1891d1a890faSShreyas Bhatewara struct Vmxnet3_DSDevRead *devRead = &shared->devRead; 1892d1a890faSShreyas Bhatewara adapter->vlan_grp = NULL; 1893d1a890faSShreyas Bhatewara 18943843e515SHarvey Harrison if (devRead->misc.uptFeatures & UPT1_F_RXVLAN) { 1895d1a890faSShreyas Bhatewara int i; 1896d1a890faSShreyas Bhatewara 1897d1a890faSShreyas Bhatewara for (i = 0; i < VMXNET3_VFT_SIZE; i++) { 1898d1a890faSShreyas Bhatewara /* clear entire vfTable; this also disables 1899d1a890faSShreyas Bhatewara * VLAN rx filtering 1900d1a890faSShreyas Bhatewara */ 1901d1a890faSShreyas Bhatewara vfTable[i] = 0; 1902d1a890faSShreyas Bhatewara } 1903d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1904d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1905d1a890faSShreyas Bhatewara 1906d1a890faSShreyas Bhatewara /* update FEATURES to device */ 19073843e515SHarvey Harrison devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN; 1908d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1909d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_FEATURE); 1910d1a890faSShreyas Bhatewara } 1911d1a890faSShreyas Bhatewara } 1912d1a890faSShreyas Bhatewara } 1913d1a890faSShreyas Bhatewara 1914d1a890faSShreyas Bhatewara 1915d1a890faSShreyas Bhatewara static void 1916d1a890faSShreyas Bhatewara vmxnet3_restore_vlan(struct vmxnet3_adapter *adapter) 1917d1a890faSShreyas Bhatewara { 1918d1a890faSShreyas Bhatewara if (adapter->vlan_grp) { 1919d1a890faSShreyas Bhatewara u16 vid; 1920d1a890faSShreyas Bhatewara u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1921d1a890faSShreyas Bhatewara bool activeVlan = false; 1922d1a890faSShreyas Bhatewara 1923b738127dSJesse Gross for (vid = 0; vid < VLAN_N_VID; vid++) { 1924d1a890faSShreyas Bhatewara if (vlan_group_get_device(adapter->vlan_grp, vid)) { 1925d1a890faSShreyas Bhatewara VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid); 1926d1a890faSShreyas Bhatewara activeVlan = true; 1927d1a890faSShreyas Bhatewara } 1928d1a890faSShreyas Bhatewara } 1929d1a890faSShreyas Bhatewara if (activeVlan) { 1930d1a890faSShreyas Bhatewara /* continue to allow untagged pkts */ 1931d1a890faSShreyas Bhatewara VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0); 1932d1a890faSShreyas Bhatewara } 1933d1a890faSShreyas Bhatewara } 1934d1a890faSShreyas Bhatewara } 1935d1a890faSShreyas Bhatewara 1936d1a890faSShreyas Bhatewara 1937d1a890faSShreyas Bhatewara static void 1938d1a890faSShreyas Bhatewara vmxnet3_vlan_rx_add_vid(struct net_device *netdev, u16 vid) 1939d1a890faSShreyas Bhatewara { 1940d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1941d1a890faSShreyas Bhatewara u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1942d1a890faSShreyas Bhatewara 1943d1a890faSShreyas Bhatewara VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid); 1944d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1945d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1946d1a890faSShreyas Bhatewara } 1947d1a890faSShreyas Bhatewara 1948d1a890faSShreyas Bhatewara 1949d1a890faSShreyas Bhatewara static void 1950d1a890faSShreyas Bhatewara vmxnet3_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) 1951d1a890faSShreyas Bhatewara { 1952d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1953d1a890faSShreyas Bhatewara u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1954d1a890faSShreyas Bhatewara 1955d1a890faSShreyas Bhatewara VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid); 1956d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1957d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1958d1a890faSShreyas Bhatewara } 1959d1a890faSShreyas Bhatewara 1960d1a890faSShreyas Bhatewara 1961d1a890faSShreyas Bhatewara static u8 * 1962d1a890faSShreyas Bhatewara vmxnet3_copy_mc(struct net_device *netdev) 1963d1a890faSShreyas Bhatewara { 1964d1a890faSShreyas Bhatewara u8 *buf = NULL; 19654cd24eafSJiri Pirko u32 sz = netdev_mc_count(netdev) * ETH_ALEN; 1966d1a890faSShreyas Bhatewara 1967d1a890faSShreyas Bhatewara /* struct Vmxnet3_RxFilterConf.mfTableLen is u16. */ 1968d1a890faSShreyas Bhatewara if (sz <= 0xffff) { 1969d1a890faSShreyas Bhatewara /* We may be called with BH disabled */ 1970d1a890faSShreyas Bhatewara buf = kmalloc(sz, GFP_ATOMIC); 1971d1a890faSShreyas Bhatewara if (buf) { 197222bedad3SJiri Pirko struct netdev_hw_addr *ha; 1973567ec874SJiri Pirko int i = 0; 1974d1a890faSShreyas Bhatewara 197522bedad3SJiri Pirko netdev_for_each_mc_addr(ha, netdev) 197622bedad3SJiri Pirko memcpy(buf + i++ * ETH_ALEN, ha->addr, 1977d1a890faSShreyas Bhatewara ETH_ALEN); 1978d1a890faSShreyas Bhatewara } 1979d1a890faSShreyas Bhatewara } 1980d1a890faSShreyas Bhatewara return buf; 1981d1a890faSShreyas Bhatewara } 1982d1a890faSShreyas Bhatewara 1983d1a890faSShreyas Bhatewara 1984d1a890faSShreyas Bhatewara static void 1985d1a890faSShreyas Bhatewara vmxnet3_set_mc(struct net_device *netdev) 1986d1a890faSShreyas Bhatewara { 1987d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1988d1a890faSShreyas Bhatewara struct Vmxnet3_RxFilterConf *rxConf = 1989d1a890faSShreyas Bhatewara &adapter->shared->devRead.rxFilterConf; 1990d1a890faSShreyas Bhatewara u8 *new_table = NULL; 1991d1a890faSShreyas Bhatewara u32 new_mode = VMXNET3_RXM_UCAST; 1992d1a890faSShreyas Bhatewara 1993d1a890faSShreyas Bhatewara if (netdev->flags & IFF_PROMISC) 1994d1a890faSShreyas Bhatewara new_mode |= VMXNET3_RXM_PROMISC; 1995d1a890faSShreyas Bhatewara 1996d1a890faSShreyas Bhatewara if (netdev->flags & IFF_BROADCAST) 1997d1a890faSShreyas Bhatewara new_mode |= VMXNET3_RXM_BCAST; 1998d1a890faSShreyas Bhatewara 1999d1a890faSShreyas Bhatewara if (netdev->flags & IFF_ALLMULTI) 2000d1a890faSShreyas Bhatewara new_mode |= VMXNET3_RXM_ALL_MULTI; 2001d1a890faSShreyas Bhatewara else 20024cd24eafSJiri Pirko if (!netdev_mc_empty(netdev)) { 2003d1a890faSShreyas Bhatewara new_table = vmxnet3_copy_mc(netdev); 2004d1a890faSShreyas Bhatewara if (new_table) { 2005d1a890faSShreyas Bhatewara new_mode |= VMXNET3_RXM_MCAST; 2006115924b6SShreyas Bhatewara rxConf->mfTableLen = cpu_to_le16( 20074cd24eafSJiri Pirko netdev_mc_count(netdev) * ETH_ALEN); 2008115924b6SShreyas Bhatewara rxConf->mfTablePA = cpu_to_le64(virt_to_phys( 2009115924b6SShreyas Bhatewara new_table)); 2010d1a890faSShreyas Bhatewara } else { 2011d1a890faSShreyas Bhatewara printk(KERN_INFO "%s: failed to copy mcast list" 2012d1a890faSShreyas Bhatewara ", setting ALL_MULTI\n", netdev->name); 2013d1a890faSShreyas Bhatewara new_mode |= VMXNET3_RXM_ALL_MULTI; 2014d1a890faSShreyas Bhatewara } 2015d1a890faSShreyas Bhatewara } 2016d1a890faSShreyas Bhatewara 2017d1a890faSShreyas Bhatewara 2018d1a890faSShreyas Bhatewara if (!(new_mode & VMXNET3_RXM_MCAST)) { 2019d1a890faSShreyas Bhatewara rxConf->mfTableLen = 0; 2020d1a890faSShreyas Bhatewara rxConf->mfTablePA = 0; 2021d1a890faSShreyas Bhatewara } 2022d1a890faSShreyas Bhatewara 2023d1a890faSShreyas Bhatewara if (new_mode != rxConf->rxMode) { 2024115924b6SShreyas Bhatewara rxConf->rxMode = cpu_to_le32(new_mode); 2025d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2026d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_RX_MODE); 2027d1a890faSShreyas Bhatewara } 2028d1a890faSShreyas Bhatewara 2029d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2030d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_MAC_FILTERS); 2031d1a890faSShreyas Bhatewara 2032d1a890faSShreyas Bhatewara kfree(new_table); 2033d1a890faSShreyas Bhatewara } 2034d1a890faSShreyas Bhatewara 203509c5088eSShreyas Bhatewara void 203609c5088eSShreyas Bhatewara vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter) 203709c5088eSShreyas Bhatewara { 203809c5088eSShreyas Bhatewara int i; 203909c5088eSShreyas Bhatewara 204009c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 204109c5088eSShreyas Bhatewara vmxnet3_rq_destroy(&adapter->rx_queue[i], adapter); 204209c5088eSShreyas Bhatewara } 204309c5088eSShreyas Bhatewara 2044d1a890faSShreyas Bhatewara 2045d1a890faSShreyas Bhatewara /* 2046d1a890faSShreyas Bhatewara * Set up driver_shared based on settings in adapter. 2047d1a890faSShreyas Bhatewara */ 2048d1a890faSShreyas Bhatewara 2049d1a890faSShreyas Bhatewara static void 2050d1a890faSShreyas Bhatewara vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter) 2051d1a890faSShreyas Bhatewara { 2052d1a890faSShreyas Bhatewara struct Vmxnet3_DriverShared *shared = adapter->shared; 2053d1a890faSShreyas Bhatewara struct Vmxnet3_DSDevRead *devRead = &shared->devRead; 2054d1a890faSShreyas Bhatewara struct Vmxnet3_TxQueueConf *tqc; 2055d1a890faSShreyas Bhatewara struct Vmxnet3_RxQueueConf *rqc; 2056d1a890faSShreyas Bhatewara int i; 2057d1a890faSShreyas Bhatewara 2058d1a890faSShreyas Bhatewara memset(shared, 0, sizeof(*shared)); 2059d1a890faSShreyas Bhatewara 2060d1a890faSShreyas Bhatewara /* driver settings */ 2061115924b6SShreyas Bhatewara shared->magic = cpu_to_le32(VMXNET3_REV1_MAGIC); 2062115924b6SShreyas Bhatewara devRead->misc.driverInfo.version = cpu_to_le32( 2063115924b6SShreyas Bhatewara VMXNET3_DRIVER_VERSION_NUM); 2064d1a890faSShreyas Bhatewara devRead->misc.driverInfo.gos.gosBits = (sizeof(void *) == 4 ? 2065d1a890faSShreyas Bhatewara VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64); 2066d1a890faSShreyas Bhatewara devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX; 2067115924b6SShreyas Bhatewara *((u32 *)&devRead->misc.driverInfo.gos) = cpu_to_le32( 2068115924b6SShreyas Bhatewara *((u32 *)&devRead->misc.driverInfo.gos)); 2069115924b6SShreyas Bhatewara devRead->misc.driverInfo.vmxnet3RevSpt = cpu_to_le32(1); 2070115924b6SShreyas Bhatewara devRead->misc.driverInfo.uptVerSpt = cpu_to_le32(1); 2071d1a890faSShreyas Bhatewara 2072115924b6SShreyas Bhatewara devRead->misc.ddPA = cpu_to_le64(virt_to_phys(adapter)); 2073115924b6SShreyas Bhatewara devRead->misc.ddLen = cpu_to_le32(sizeof(struct vmxnet3_adapter)); 2074d1a890faSShreyas Bhatewara 2075d1a890faSShreyas Bhatewara /* set up feature flags */ 2076d1a890faSShreyas Bhatewara if (adapter->rxcsum) 20773843e515SHarvey Harrison devRead->misc.uptFeatures |= UPT1_F_RXCSUM; 2078d1a890faSShreyas Bhatewara 2079d1a890faSShreyas Bhatewara if (adapter->lro) { 20803843e515SHarvey Harrison devRead->misc.uptFeatures |= UPT1_F_LRO; 2081115924b6SShreyas Bhatewara devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS); 2082d1a890faSShreyas Bhatewara } 20838e95a202SJoe Perches if ((adapter->netdev->features & NETIF_F_HW_VLAN_RX) && 20848e95a202SJoe Perches adapter->vlan_grp) { 20853843e515SHarvey Harrison devRead->misc.uptFeatures |= UPT1_F_RXVLAN; 2086d1a890faSShreyas Bhatewara } 2087d1a890faSShreyas Bhatewara 2088115924b6SShreyas Bhatewara devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu); 2089115924b6SShreyas Bhatewara devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa); 2090115924b6SShreyas Bhatewara devRead->misc.queueDescLen = cpu_to_le32( 209109c5088eSShreyas Bhatewara adapter->num_tx_queues * sizeof(struct Vmxnet3_TxQueueDesc) + 209209c5088eSShreyas Bhatewara adapter->num_rx_queues * sizeof(struct Vmxnet3_RxQueueDesc)); 2093d1a890faSShreyas Bhatewara 2094d1a890faSShreyas Bhatewara /* tx queue settings */ 209509c5088eSShreyas Bhatewara devRead->misc.numTxQueues = adapter->num_tx_queues; 209609c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) { 209709c5088eSShreyas Bhatewara struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i]; 209809c5088eSShreyas Bhatewara BUG_ON(adapter->tx_queue[i].tx_ring.base == NULL); 209909c5088eSShreyas Bhatewara tqc = &adapter->tqd_start[i].conf; 210009c5088eSShreyas Bhatewara tqc->txRingBasePA = cpu_to_le64(tq->tx_ring.basePA); 210109c5088eSShreyas Bhatewara tqc->dataRingBasePA = cpu_to_le64(tq->data_ring.basePA); 210209c5088eSShreyas Bhatewara tqc->compRingBasePA = cpu_to_le64(tq->comp_ring.basePA); 210309c5088eSShreyas Bhatewara tqc->ddPA = cpu_to_le64(virt_to_phys(tq->buf_info)); 210409c5088eSShreyas Bhatewara tqc->txRingSize = cpu_to_le32(tq->tx_ring.size); 210509c5088eSShreyas Bhatewara tqc->dataRingSize = cpu_to_le32(tq->data_ring.size); 210609c5088eSShreyas Bhatewara tqc->compRingSize = cpu_to_le32(tq->comp_ring.size); 210709c5088eSShreyas Bhatewara tqc->ddLen = cpu_to_le32( 210809c5088eSShreyas Bhatewara sizeof(struct vmxnet3_tx_buf_info) * 2109115924b6SShreyas Bhatewara tqc->txRingSize); 211009c5088eSShreyas Bhatewara tqc->intrIdx = tq->comp_ring.intr_idx; 211109c5088eSShreyas Bhatewara } 2112d1a890faSShreyas Bhatewara 2113d1a890faSShreyas Bhatewara /* rx queue settings */ 211409c5088eSShreyas Bhatewara devRead->misc.numRxQueues = adapter->num_rx_queues; 211509c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 211609c5088eSShreyas Bhatewara struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i]; 211709c5088eSShreyas Bhatewara rqc = &adapter->rqd_start[i].conf; 211809c5088eSShreyas Bhatewara rqc->rxRingBasePA[0] = cpu_to_le64(rq->rx_ring[0].basePA); 211909c5088eSShreyas Bhatewara rqc->rxRingBasePA[1] = cpu_to_le64(rq->rx_ring[1].basePA); 212009c5088eSShreyas Bhatewara rqc->compRingBasePA = cpu_to_le64(rq->comp_ring.basePA); 2121115924b6SShreyas Bhatewara rqc->ddPA = cpu_to_le64(virt_to_phys( 212209c5088eSShreyas Bhatewara rq->buf_info)); 212309c5088eSShreyas Bhatewara rqc->rxRingSize[0] = cpu_to_le32(rq->rx_ring[0].size); 212409c5088eSShreyas Bhatewara rqc->rxRingSize[1] = cpu_to_le32(rq->rx_ring[1].size); 212509c5088eSShreyas Bhatewara rqc->compRingSize = cpu_to_le32(rq->comp_ring.size); 212609c5088eSShreyas Bhatewara rqc->ddLen = cpu_to_le32( 212709c5088eSShreyas Bhatewara sizeof(struct vmxnet3_rx_buf_info) * 212809c5088eSShreyas Bhatewara (rqc->rxRingSize[0] + 212909c5088eSShreyas Bhatewara rqc->rxRingSize[1])); 213009c5088eSShreyas Bhatewara rqc->intrIdx = rq->comp_ring.intr_idx; 213109c5088eSShreyas Bhatewara } 213209c5088eSShreyas Bhatewara 213309c5088eSShreyas Bhatewara #ifdef VMXNET3_RSS 213409c5088eSShreyas Bhatewara memset(adapter->rss_conf, 0, sizeof(*adapter->rss_conf)); 213509c5088eSShreyas Bhatewara 213609c5088eSShreyas Bhatewara if (adapter->rss) { 213709c5088eSShreyas Bhatewara struct UPT1_RSSConf *rssConf = adapter->rss_conf; 213809c5088eSShreyas Bhatewara devRead->misc.uptFeatures |= UPT1_F_RSS; 213909c5088eSShreyas Bhatewara devRead->misc.numRxQueues = adapter->num_rx_queues; 214009c5088eSShreyas Bhatewara rssConf->hashType = UPT1_RSS_HASH_TYPE_TCP_IPV4 | 214109c5088eSShreyas Bhatewara UPT1_RSS_HASH_TYPE_IPV4 | 214209c5088eSShreyas Bhatewara UPT1_RSS_HASH_TYPE_TCP_IPV6 | 214309c5088eSShreyas Bhatewara UPT1_RSS_HASH_TYPE_IPV6; 214409c5088eSShreyas Bhatewara rssConf->hashFunc = UPT1_RSS_HASH_FUNC_TOEPLITZ; 214509c5088eSShreyas Bhatewara rssConf->hashKeySize = UPT1_RSS_MAX_KEY_SIZE; 214609c5088eSShreyas Bhatewara rssConf->indTableSize = VMXNET3_RSS_IND_TABLE_SIZE; 214709c5088eSShreyas Bhatewara get_random_bytes(&rssConf->hashKey[0], rssConf->hashKeySize); 214809c5088eSShreyas Bhatewara for (i = 0; i < rssConf->indTableSize; i++) 214909c5088eSShreyas Bhatewara rssConf->indTable[i] = i % adapter->num_rx_queues; 215009c5088eSShreyas Bhatewara 215109c5088eSShreyas Bhatewara devRead->rssConfDesc.confVer = 1; 215209c5088eSShreyas Bhatewara devRead->rssConfDesc.confLen = sizeof(*rssConf); 215309c5088eSShreyas Bhatewara devRead->rssConfDesc.confPA = virt_to_phys(rssConf); 215409c5088eSShreyas Bhatewara } 215509c5088eSShreyas Bhatewara 215609c5088eSShreyas Bhatewara #endif /* VMXNET3_RSS */ 2157d1a890faSShreyas Bhatewara 2158d1a890faSShreyas Bhatewara /* intr settings */ 2159d1a890faSShreyas Bhatewara devRead->intrConf.autoMask = adapter->intr.mask_mode == 2160d1a890faSShreyas Bhatewara VMXNET3_IMM_AUTO; 2161d1a890faSShreyas Bhatewara devRead->intrConf.numIntrs = adapter->intr.num_intrs; 2162d1a890faSShreyas Bhatewara for (i = 0; i < adapter->intr.num_intrs; i++) 2163d1a890faSShreyas Bhatewara devRead->intrConf.modLevels[i] = adapter->intr.mod_levels[i]; 2164d1a890faSShreyas Bhatewara 2165d1a890faSShreyas Bhatewara devRead->intrConf.eventIntrIdx = adapter->intr.event_intr_idx; 21666929fe8aSRonghua Zang devRead->intrConf.intrCtrl |= cpu_to_le32(VMXNET3_IC_DISABLE_ALL); 2167d1a890faSShreyas Bhatewara 2168d1a890faSShreyas Bhatewara /* rx filter settings */ 2169d1a890faSShreyas Bhatewara devRead->rxFilterConf.rxMode = 0; 2170d1a890faSShreyas Bhatewara vmxnet3_restore_vlan(adapter); 2171d1a890faSShreyas Bhatewara /* the rest are already zeroed */ 2172d1a890faSShreyas Bhatewara } 2173d1a890faSShreyas Bhatewara 2174d1a890faSShreyas Bhatewara 2175d1a890faSShreyas Bhatewara int 2176d1a890faSShreyas Bhatewara vmxnet3_activate_dev(struct vmxnet3_adapter *adapter) 2177d1a890faSShreyas Bhatewara { 217809c5088eSShreyas Bhatewara int err, i; 2179d1a890faSShreyas Bhatewara u32 ret; 2180d1a890faSShreyas Bhatewara 218109c5088eSShreyas Bhatewara dev_dbg(&adapter->netdev->dev, "%s: skb_buf_size %d, rx_buf_per_pkt %d," 218209c5088eSShreyas Bhatewara " ring sizes %u %u %u\n", adapter->netdev->name, 218309c5088eSShreyas Bhatewara adapter->skb_buf_size, adapter->rx_buf_per_pkt, 218409c5088eSShreyas Bhatewara adapter->tx_queue[0].tx_ring.size, 218509c5088eSShreyas Bhatewara adapter->rx_queue[0].rx_ring[0].size, 218609c5088eSShreyas Bhatewara adapter->rx_queue[0].rx_ring[1].size); 2187d1a890faSShreyas Bhatewara 218809c5088eSShreyas Bhatewara vmxnet3_tq_init_all(adapter); 218909c5088eSShreyas Bhatewara err = vmxnet3_rq_init_all(adapter); 2190d1a890faSShreyas Bhatewara if (err) { 2191d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to init rx queue for %s: error %d\n", 2192d1a890faSShreyas Bhatewara adapter->netdev->name, err); 2193d1a890faSShreyas Bhatewara goto rq_err; 2194d1a890faSShreyas Bhatewara } 2195d1a890faSShreyas Bhatewara 2196d1a890faSShreyas Bhatewara err = vmxnet3_request_irqs(adapter); 2197d1a890faSShreyas Bhatewara if (err) { 2198d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to setup irq for %s: error %d\n", 2199d1a890faSShreyas Bhatewara adapter->netdev->name, err); 2200d1a890faSShreyas Bhatewara goto irq_err; 2201d1a890faSShreyas Bhatewara } 2202d1a890faSShreyas Bhatewara 2203d1a890faSShreyas Bhatewara vmxnet3_setup_driver_shared(adapter); 2204d1a890faSShreyas Bhatewara 2205115924b6SShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, VMXNET3_GET_ADDR_LO( 2206115924b6SShreyas Bhatewara adapter->shared_pa)); 2207115924b6SShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI( 2208115924b6SShreyas Bhatewara adapter->shared_pa)); 2209d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2210d1a890faSShreyas Bhatewara VMXNET3_CMD_ACTIVATE_DEV); 2211d1a890faSShreyas Bhatewara ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 2212d1a890faSShreyas Bhatewara 2213d1a890faSShreyas Bhatewara if (ret != 0) { 2214d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to activate dev %s: error %u\n", 2215d1a890faSShreyas Bhatewara adapter->netdev->name, ret); 2216d1a890faSShreyas Bhatewara err = -EINVAL; 2217d1a890faSShreyas Bhatewara goto activate_err; 2218d1a890faSShreyas Bhatewara } 221909c5088eSShreyas Bhatewara 222009c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 222109c5088eSShreyas Bhatewara VMXNET3_WRITE_BAR0_REG(adapter, 222209c5088eSShreyas Bhatewara VMXNET3_REG_RXPROD + i * VMXNET3_REG_ALIGN, 222309c5088eSShreyas Bhatewara adapter->rx_queue[i].rx_ring[0].next2fill); 222409c5088eSShreyas Bhatewara VMXNET3_WRITE_BAR0_REG(adapter, (VMXNET3_REG_RXPROD2 + 222509c5088eSShreyas Bhatewara (i * VMXNET3_REG_ALIGN)), 222609c5088eSShreyas Bhatewara adapter->rx_queue[i].rx_ring[1].next2fill); 222709c5088eSShreyas Bhatewara } 2228d1a890faSShreyas Bhatewara 2229d1a890faSShreyas Bhatewara /* Apply the rx filter settins last. */ 2230d1a890faSShreyas Bhatewara vmxnet3_set_mc(adapter->netdev); 2231d1a890faSShreyas Bhatewara 2232d1a890faSShreyas Bhatewara /* 2233d1a890faSShreyas Bhatewara * Check link state when first activating device. It will start the 2234d1a890faSShreyas Bhatewara * tx queue if the link is up. 2235d1a890faSShreyas Bhatewara */ 22364a1745fcSShreyas Bhatewara vmxnet3_check_link(adapter, true); 223709c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 223809c5088eSShreyas Bhatewara napi_enable(&adapter->rx_queue[i].napi); 2239d1a890faSShreyas Bhatewara vmxnet3_enable_all_intrs(adapter); 2240d1a890faSShreyas Bhatewara clear_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state); 2241d1a890faSShreyas Bhatewara return 0; 2242d1a890faSShreyas Bhatewara 2243d1a890faSShreyas Bhatewara activate_err: 2244d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, 0); 2245d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, 0); 2246d1a890faSShreyas Bhatewara vmxnet3_free_irqs(adapter); 2247d1a890faSShreyas Bhatewara irq_err: 2248d1a890faSShreyas Bhatewara rq_err: 2249d1a890faSShreyas Bhatewara /* free up buffers we allocated */ 225009c5088eSShreyas Bhatewara vmxnet3_rq_cleanup_all(adapter); 2251d1a890faSShreyas Bhatewara return err; 2252d1a890faSShreyas Bhatewara } 2253d1a890faSShreyas Bhatewara 2254d1a890faSShreyas Bhatewara 2255d1a890faSShreyas Bhatewara void 2256d1a890faSShreyas Bhatewara vmxnet3_reset_dev(struct vmxnet3_adapter *adapter) 2257d1a890faSShreyas Bhatewara { 2258d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV); 2259d1a890faSShreyas Bhatewara } 2260d1a890faSShreyas Bhatewara 2261d1a890faSShreyas Bhatewara 2262d1a890faSShreyas Bhatewara int 2263d1a890faSShreyas Bhatewara vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter) 2264d1a890faSShreyas Bhatewara { 226509c5088eSShreyas Bhatewara int i; 2266d1a890faSShreyas Bhatewara if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state)) 2267d1a890faSShreyas Bhatewara return 0; 2268d1a890faSShreyas Bhatewara 2269d1a890faSShreyas Bhatewara 2270d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2271d1a890faSShreyas Bhatewara VMXNET3_CMD_QUIESCE_DEV); 2272d1a890faSShreyas Bhatewara vmxnet3_disable_all_intrs(adapter); 2273d1a890faSShreyas Bhatewara 227409c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 227509c5088eSShreyas Bhatewara napi_disable(&adapter->rx_queue[i].napi); 2276d1a890faSShreyas Bhatewara netif_tx_disable(adapter->netdev); 2277d1a890faSShreyas Bhatewara adapter->link_speed = 0; 2278d1a890faSShreyas Bhatewara netif_carrier_off(adapter->netdev); 2279d1a890faSShreyas Bhatewara 228009c5088eSShreyas Bhatewara vmxnet3_tq_cleanup_all(adapter); 228109c5088eSShreyas Bhatewara vmxnet3_rq_cleanup_all(adapter); 2282d1a890faSShreyas Bhatewara vmxnet3_free_irqs(adapter); 2283d1a890faSShreyas Bhatewara return 0; 2284d1a890faSShreyas Bhatewara } 2285d1a890faSShreyas Bhatewara 2286d1a890faSShreyas Bhatewara 2287d1a890faSShreyas Bhatewara static void 2288d1a890faSShreyas Bhatewara vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac) 2289d1a890faSShreyas Bhatewara { 2290d1a890faSShreyas Bhatewara u32 tmp; 2291d1a890faSShreyas Bhatewara 2292d1a890faSShreyas Bhatewara tmp = *(u32 *)mac; 2293d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACL, tmp); 2294d1a890faSShreyas Bhatewara 2295d1a890faSShreyas Bhatewara tmp = (mac[5] << 8) | mac[4]; 2296d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACH, tmp); 2297d1a890faSShreyas Bhatewara } 2298d1a890faSShreyas Bhatewara 2299d1a890faSShreyas Bhatewara 2300d1a890faSShreyas Bhatewara static int 2301d1a890faSShreyas Bhatewara vmxnet3_set_mac_addr(struct net_device *netdev, void *p) 2302d1a890faSShreyas Bhatewara { 2303d1a890faSShreyas Bhatewara struct sockaddr *addr = p; 2304d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2305d1a890faSShreyas Bhatewara 2306d1a890faSShreyas Bhatewara memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 2307d1a890faSShreyas Bhatewara vmxnet3_write_mac_addr(adapter, addr->sa_data); 2308d1a890faSShreyas Bhatewara 2309d1a890faSShreyas Bhatewara return 0; 2310d1a890faSShreyas Bhatewara } 2311d1a890faSShreyas Bhatewara 2312d1a890faSShreyas Bhatewara 2313d1a890faSShreyas Bhatewara /* ==================== initialization and cleanup routines ============ */ 2314d1a890faSShreyas Bhatewara 2315d1a890faSShreyas Bhatewara static int 2316d1a890faSShreyas Bhatewara vmxnet3_alloc_pci_resources(struct vmxnet3_adapter *adapter, bool *dma64) 2317d1a890faSShreyas Bhatewara { 2318d1a890faSShreyas Bhatewara int err; 2319d1a890faSShreyas Bhatewara unsigned long mmio_start, mmio_len; 2320d1a890faSShreyas Bhatewara struct pci_dev *pdev = adapter->pdev; 2321d1a890faSShreyas Bhatewara 2322d1a890faSShreyas Bhatewara err = pci_enable_device(pdev); 2323d1a890faSShreyas Bhatewara if (err) { 2324d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to enable adapter %s: error %d\n", 2325d1a890faSShreyas Bhatewara pci_name(pdev), err); 2326d1a890faSShreyas Bhatewara return err; 2327d1a890faSShreyas Bhatewara } 2328d1a890faSShreyas Bhatewara 2329d1a890faSShreyas Bhatewara if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) { 2330d1a890faSShreyas Bhatewara if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) { 2331d1a890faSShreyas Bhatewara printk(KERN_ERR "pci_set_consistent_dma_mask failed " 2332d1a890faSShreyas Bhatewara "for adapter %s\n", pci_name(pdev)); 2333d1a890faSShreyas Bhatewara err = -EIO; 2334d1a890faSShreyas Bhatewara goto err_set_mask; 2335d1a890faSShreyas Bhatewara } 2336d1a890faSShreyas Bhatewara *dma64 = true; 2337d1a890faSShreyas Bhatewara } else { 2338d1a890faSShreyas Bhatewara if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) { 2339d1a890faSShreyas Bhatewara printk(KERN_ERR "pci_set_dma_mask failed for adapter " 2340d1a890faSShreyas Bhatewara "%s\n", pci_name(pdev)); 2341d1a890faSShreyas Bhatewara err = -EIO; 2342d1a890faSShreyas Bhatewara goto err_set_mask; 2343d1a890faSShreyas Bhatewara } 2344d1a890faSShreyas Bhatewara *dma64 = false; 2345d1a890faSShreyas Bhatewara } 2346d1a890faSShreyas Bhatewara 2347d1a890faSShreyas Bhatewara err = pci_request_selected_regions(pdev, (1 << 2) - 1, 2348d1a890faSShreyas Bhatewara vmxnet3_driver_name); 2349d1a890faSShreyas Bhatewara if (err) { 2350d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to request region for adapter %s: " 2351d1a890faSShreyas Bhatewara "error %d\n", pci_name(pdev), err); 2352d1a890faSShreyas Bhatewara goto err_set_mask; 2353d1a890faSShreyas Bhatewara } 2354d1a890faSShreyas Bhatewara 2355d1a890faSShreyas Bhatewara pci_set_master(pdev); 2356d1a890faSShreyas Bhatewara 2357d1a890faSShreyas Bhatewara mmio_start = pci_resource_start(pdev, 0); 2358d1a890faSShreyas Bhatewara mmio_len = pci_resource_len(pdev, 0); 2359d1a890faSShreyas Bhatewara adapter->hw_addr0 = ioremap(mmio_start, mmio_len); 2360d1a890faSShreyas Bhatewara if (!adapter->hw_addr0) { 2361d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to map bar0 for adapter %s\n", 2362d1a890faSShreyas Bhatewara pci_name(pdev)); 2363d1a890faSShreyas Bhatewara err = -EIO; 2364d1a890faSShreyas Bhatewara goto err_ioremap; 2365d1a890faSShreyas Bhatewara } 2366d1a890faSShreyas Bhatewara 2367d1a890faSShreyas Bhatewara mmio_start = pci_resource_start(pdev, 1); 2368d1a890faSShreyas Bhatewara mmio_len = pci_resource_len(pdev, 1); 2369d1a890faSShreyas Bhatewara adapter->hw_addr1 = ioremap(mmio_start, mmio_len); 2370d1a890faSShreyas Bhatewara if (!adapter->hw_addr1) { 2371d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to map bar1 for adapter %s\n", 2372d1a890faSShreyas Bhatewara pci_name(pdev)); 2373d1a890faSShreyas Bhatewara err = -EIO; 2374d1a890faSShreyas Bhatewara goto err_bar1; 2375d1a890faSShreyas Bhatewara } 2376d1a890faSShreyas Bhatewara return 0; 2377d1a890faSShreyas Bhatewara 2378d1a890faSShreyas Bhatewara err_bar1: 2379d1a890faSShreyas Bhatewara iounmap(adapter->hw_addr0); 2380d1a890faSShreyas Bhatewara err_ioremap: 2381d1a890faSShreyas Bhatewara pci_release_selected_regions(pdev, (1 << 2) - 1); 2382d1a890faSShreyas Bhatewara err_set_mask: 2383d1a890faSShreyas Bhatewara pci_disable_device(pdev); 2384d1a890faSShreyas Bhatewara return err; 2385d1a890faSShreyas Bhatewara } 2386d1a890faSShreyas Bhatewara 2387d1a890faSShreyas Bhatewara 2388d1a890faSShreyas Bhatewara static void 2389d1a890faSShreyas Bhatewara vmxnet3_free_pci_resources(struct vmxnet3_adapter *adapter) 2390d1a890faSShreyas Bhatewara { 2391d1a890faSShreyas Bhatewara BUG_ON(!adapter->pdev); 2392d1a890faSShreyas Bhatewara 2393d1a890faSShreyas Bhatewara iounmap(adapter->hw_addr0); 2394d1a890faSShreyas Bhatewara iounmap(adapter->hw_addr1); 2395d1a890faSShreyas Bhatewara pci_release_selected_regions(adapter->pdev, (1 << 2) - 1); 2396d1a890faSShreyas Bhatewara pci_disable_device(adapter->pdev); 2397d1a890faSShreyas Bhatewara } 2398d1a890faSShreyas Bhatewara 2399d1a890faSShreyas Bhatewara 2400d1a890faSShreyas Bhatewara static void 2401d1a890faSShreyas Bhatewara vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter) 2402d1a890faSShreyas Bhatewara { 240309c5088eSShreyas Bhatewara size_t sz, i, ring0_size, ring1_size, comp_size; 240409c5088eSShreyas Bhatewara struct vmxnet3_rx_queue *rq = &adapter->rx_queue[0]; 240509c5088eSShreyas Bhatewara 2406d1a890faSShreyas Bhatewara 2407d1a890faSShreyas Bhatewara if (adapter->netdev->mtu <= VMXNET3_MAX_SKB_BUF_SIZE - 2408d1a890faSShreyas Bhatewara VMXNET3_MAX_ETH_HDR_SIZE) { 2409d1a890faSShreyas Bhatewara adapter->skb_buf_size = adapter->netdev->mtu + 2410d1a890faSShreyas Bhatewara VMXNET3_MAX_ETH_HDR_SIZE; 2411d1a890faSShreyas Bhatewara if (adapter->skb_buf_size < VMXNET3_MIN_T0_BUF_SIZE) 2412d1a890faSShreyas Bhatewara adapter->skb_buf_size = VMXNET3_MIN_T0_BUF_SIZE; 2413d1a890faSShreyas Bhatewara 2414d1a890faSShreyas Bhatewara adapter->rx_buf_per_pkt = 1; 2415d1a890faSShreyas Bhatewara } else { 2416d1a890faSShreyas Bhatewara adapter->skb_buf_size = VMXNET3_MAX_SKB_BUF_SIZE; 2417d1a890faSShreyas Bhatewara sz = adapter->netdev->mtu - VMXNET3_MAX_SKB_BUF_SIZE + 2418d1a890faSShreyas Bhatewara VMXNET3_MAX_ETH_HDR_SIZE; 2419d1a890faSShreyas Bhatewara adapter->rx_buf_per_pkt = 1 + (sz + PAGE_SIZE - 1) / PAGE_SIZE; 2420d1a890faSShreyas Bhatewara } 2421d1a890faSShreyas Bhatewara 2422d1a890faSShreyas Bhatewara /* 2423d1a890faSShreyas Bhatewara * for simplicity, force the ring0 size to be a multiple of 2424d1a890faSShreyas Bhatewara * rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN 2425d1a890faSShreyas Bhatewara */ 2426d1a890faSShreyas Bhatewara sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN; 242709c5088eSShreyas Bhatewara ring0_size = adapter->rx_queue[0].rx_ring[0].size; 242809c5088eSShreyas Bhatewara ring0_size = (ring0_size + sz - 1) / sz * sz; 2429a53255d3SShreyas Bhatewara ring0_size = min_t(u32, ring0_size, VMXNET3_RX_RING_MAX_SIZE / 243009c5088eSShreyas Bhatewara sz * sz); 243109c5088eSShreyas Bhatewara ring1_size = adapter->rx_queue[0].rx_ring[1].size; 243209c5088eSShreyas Bhatewara comp_size = ring0_size + ring1_size; 243309c5088eSShreyas Bhatewara 243409c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 243509c5088eSShreyas Bhatewara rq = &adapter->rx_queue[i]; 243609c5088eSShreyas Bhatewara rq->rx_ring[0].size = ring0_size; 243709c5088eSShreyas Bhatewara rq->rx_ring[1].size = ring1_size; 243809c5088eSShreyas Bhatewara rq->comp_ring.size = comp_size; 243909c5088eSShreyas Bhatewara } 2440d1a890faSShreyas Bhatewara } 2441d1a890faSShreyas Bhatewara 2442d1a890faSShreyas Bhatewara 2443d1a890faSShreyas Bhatewara int 2444d1a890faSShreyas Bhatewara vmxnet3_create_queues(struct vmxnet3_adapter *adapter, u32 tx_ring_size, 2445d1a890faSShreyas Bhatewara u32 rx_ring_size, u32 rx_ring2_size) 2446d1a890faSShreyas Bhatewara { 244709c5088eSShreyas Bhatewara int err = 0, i; 2448d1a890faSShreyas Bhatewara 244909c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) { 245009c5088eSShreyas Bhatewara struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i]; 245109c5088eSShreyas Bhatewara tq->tx_ring.size = tx_ring_size; 245209c5088eSShreyas Bhatewara tq->data_ring.size = tx_ring_size; 245309c5088eSShreyas Bhatewara tq->comp_ring.size = tx_ring_size; 245409c5088eSShreyas Bhatewara tq->shared = &adapter->tqd_start[i].ctrl; 245509c5088eSShreyas Bhatewara tq->stopped = true; 245609c5088eSShreyas Bhatewara tq->adapter = adapter; 245709c5088eSShreyas Bhatewara tq->qid = i; 245809c5088eSShreyas Bhatewara err = vmxnet3_tq_create(tq, adapter); 245909c5088eSShreyas Bhatewara /* 246009c5088eSShreyas Bhatewara * Too late to change num_tx_queues. We cannot do away with 246109c5088eSShreyas Bhatewara * lesser number of queues than what we asked for 246209c5088eSShreyas Bhatewara */ 2463d1a890faSShreyas Bhatewara if (err) 246409c5088eSShreyas Bhatewara goto queue_err; 246509c5088eSShreyas Bhatewara } 2466d1a890faSShreyas Bhatewara 246709c5088eSShreyas Bhatewara adapter->rx_queue[0].rx_ring[0].size = rx_ring_size; 246809c5088eSShreyas Bhatewara adapter->rx_queue[0].rx_ring[1].size = rx_ring2_size; 2469d1a890faSShreyas Bhatewara vmxnet3_adjust_rx_ring_size(adapter); 247009c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 247109c5088eSShreyas Bhatewara struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i]; 247209c5088eSShreyas Bhatewara /* qid and qid2 for rx queues will be assigned later when num 247309c5088eSShreyas Bhatewara * of rx queues is finalized after allocating intrs */ 247409c5088eSShreyas Bhatewara rq->shared = &adapter->rqd_start[i].ctrl; 247509c5088eSShreyas Bhatewara rq->adapter = adapter; 247609c5088eSShreyas Bhatewara err = vmxnet3_rq_create(rq, adapter); 247709c5088eSShreyas Bhatewara if (err) { 247809c5088eSShreyas Bhatewara if (i == 0) { 247909c5088eSShreyas Bhatewara printk(KERN_ERR "Could not allocate any rx" 248009c5088eSShreyas Bhatewara "queues. Aborting.\n"); 248109c5088eSShreyas Bhatewara goto queue_err; 248209c5088eSShreyas Bhatewara } else { 248309c5088eSShreyas Bhatewara printk(KERN_INFO "Number of rx queues changed " 248409c5088eSShreyas Bhatewara "to : %d.\n", i); 248509c5088eSShreyas Bhatewara adapter->num_rx_queues = i; 248609c5088eSShreyas Bhatewara err = 0; 248709c5088eSShreyas Bhatewara break; 248809c5088eSShreyas Bhatewara } 248909c5088eSShreyas Bhatewara } 249009c5088eSShreyas Bhatewara } 249109c5088eSShreyas Bhatewara return err; 249209c5088eSShreyas Bhatewara queue_err: 249309c5088eSShreyas Bhatewara vmxnet3_tq_destroy_all(adapter); 2494d1a890faSShreyas Bhatewara return err; 2495d1a890faSShreyas Bhatewara } 2496d1a890faSShreyas Bhatewara 2497d1a890faSShreyas Bhatewara static int 2498d1a890faSShreyas Bhatewara vmxnet3_open(struct net_device *netdev) 2499d1a890faSShreyas Bhatewara { 2500d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter; 250109c5088eSShreyas Bhatewara int err, i; 2502d1a890faSShreyas Bhatewara 2503d1a890faSShreyas Bhatewara adapter = netdev_priv(netdev); 2504d1a890faSShreyas Bhatewara 250509c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_tx_queues; i++) 250609c5088eSShreyas Bhatewara spin_lock_init(&adapter->tx_queue[i].tx_lock); 2507d1a890faSShreyas Bhatewara 2508d1a890faSShreyas Bhatewara err = vmxnet3_create_queues(adapter, VMXNET3_DEF_TX_RING_SIZE, 2509d1a890faSShreyas Bhatewara VMXNET3_DEF_RX_RING_SIZE, 2510d1a890faSShreyas Bhatewara VMXNET3_DEF_RX_RING_SIZE); 2511d1a890faSShreyas Bhatewara if (err) 2512d1a890faSShreyas Bhatewara goto queue_err; 2513d1a890faSShreyas Bhatewara 2514d1a890faSShreyas Bhatewara err = vmxnet3_activate_dev(adapter); 2515d1a890faSShreyas Bhatewara if (err) 2516d1a890faSShreyas Bhatewara goto activate_err; 2517d1a890faSShreyas Bhatewara 2518d1a890faSShreyas Bhatewara return 0; 2519d1a890faSShreyas Bhatewara 2520d1a890faSShreyas Bhatewara activate_err: 252109c5088eSShreyas Bhatewara vmxnet3_rq_destroy_all(adapter); 252209c5088eSShreyas Bhatewara vmxnet3_tq_destroy_all(adapter); 2523d1a890faSShreyas Bhatewara queue_err: 2524d1a890faSShreyas Bhatewara return err; 2525d1a890faSShreyas Bhatewara } 2526d1a890faSShreyas Bhatewara 2527d1a890faSShreyas Bhatewara 2528d1a890faSShreyas Bhatewara static int 2529d1a890faSShreyas Bhatewara vmxnet3_close(struct net_device *netdev) 2530d1a890faSShreyas Bhatewara { 2531d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2532d1a890faSShreyas Bhatewara 2533d1a890faSShreyas Bhatewara /* 2534d1a890faSShreyas Bhatewara * Reset_work may be in the middle of resetting the device, wait for its 2535d1a890faSShreyas Bhatewara * completion. 2536d1a890faSShreyas Bhatewara */ 2537d1a890faSShreyas Bhatewara while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)) 2538d1a890faSShreyas Bhatewara msleep(1); 2539d1a890faSShreyas Bhatewara 2540d1a890faSShreyas Bhatewara vmxnet3_quiesce_dev(adapter); 2541d1a890faSShreyas Bhatewara 254209c5088eSShreyas Bhatewara vmxnet3_rq_destroy_all(adapter); 254309c5088eSShreyas Bhatewara vmxnet3_tq_destroy_all(adapter); 2544d1a890faSShreyas Bhatewara 2545d1a890faSShreyas Bhatewara clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state); 2546d1a890faSShreyas Bhatewara 2547d1a890faSShreyas Bhatewara 2548d1a890faSShreyas Bhatewara return 0; 2549d1a890faSShreyas Bhatewara } 2550d1a890faSShreyas Bhatewara 2551d1a890faSShreyas Bhatewara 2552d1a890faSShreyas Bhatewara void 2553d1a890faSShreyas Bhatewara vmxnet3_force_close(struct vmxnet3_adapter *adapter) 2554d1a890faSShreyas Bhatewara { 255509c5088eSShreyas Bhatewara int i; 255609c5088eSShreyas Bhatewara 2557d1a890faSShreyas Bhatewara /* 2558d1a890faSShreyas Bhatewara * we must clear VMXNET3_STATE_BIT_RESETTING, otherwise 2559d1a890faSShreyas Bhatewara * vmxnet3_close() will deadlock. 2560d1a890faSShreyas Bhatewara */ 2561d1a890faSShreyas Bhatewara BUG_ON(test_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)); 2562d1a890faSShreyas Bhatewara 2563d1a890faSShreyas Bhatewara /* we need to enable NAPI, otherwise dev_close will deadlock */ 256409c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) 256509c5088eSShreyas Bhatewara napi_enable(&adapter->rx_queue[i].napi); 2566d1a890faSShreyas Bhatewara dev_close(adapter->netdev); 2567d1a890faSShreyas Bhatewara } 2568d1a890faSShreyas Bhatewara 2569d1a890faSShreyas Bhatewara 2570d1a890faSShreyas Bhatewara static int 2571d1a890faSShreyas Bhatewara vmxnet3_change_mtu(struct net_device *netdev, int new_mtu) 2572d1a890faSShreyas Bhatewara { 2573d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2574d1a890faSShreyas Bhatewara int err = 0; 2575d1a890faSShreyas Bhatewara 2576d1a890faSShreyas Bhatewara if (new_mtu < VMXNET3_MIN_MTU || new_mtu > VMXNET3_MAX_MTU) 2577d1a890faSShreyas Bhatewara return -EINVAL; 2578d1a890faSShreyas Bhatewara 2579d1a890faSShreyas Bhatewara if (new_mtu > 1500 && !adapter->jumbo_frame) 2580d1a890faSShreyas Bhatewara return -EINVAL; 2581d1a890faSShreyas Bhatewara 2582d1a890faSShreyas Bhatewara netdev->mtu = new_mtu; 2583d1a890faSShreyas Bhatewara 2584d1a890faSShreyas Bhatewara /* 2585d1a890faSShreyas Bhatewara * Reset_work may be in the middle of resetting the device, wait for its 2586d1a890faSShreyas Bhatewara * completion. 2587d1a890faSShreyas Bhatewara */ 2588d1a890faSShreyas Bhatewara while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)) 2589d1a890faSShreyas Bhatewara msleep(1); 2590d1a890faSShreyas Bhatewara 2591d1a890faSShreyas Bhatewara if (netif_running(netdev)) { 2592d1a890faSShreyas Bhatewara vmxnet3_quiesce_dev(adapter); 2593d1a890faSShreyas Bhatewara vmxnet3_reset_dev(adapter); 2594d1a890faSShreyas Bhatewara 2595d1a890faSShreyas Bhatewara /* we need to re-create the rx queue based on the new mtu */ 259609c5088eSShreyas Bhatewara vmxnet3_rq_destroy_all(adapter); 2597d1a890faSShreyas Bhatewara vmxnet3_adjust_rx_ring_size(adapter); 259809c5088eSShreyas Bhatewara err = vmxnet3_rq_create_all(adapter); 2599d1a890faSShreyas Bhatewara if (err) { 260009c5088eSShreyas Bhatewara printk(KERN_ERR "%s: failed to re-create rx queues," 2601d1a890faSShreyas Bhatewara " error %d. Closing it.\n", netdev->name, err); 2602d1a890faSShreyas Bhatewara goto out; 2603d1a890faSShreyas Bhatewara } 2604d1a890faSShreyas Bhatewara 2605d1a890faSShreyas Bhatewara err = vmxnet3_activate_dev(adapter); 2606d1a890faSShreyas Bhatewara if (err) { 2607d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to re-activate, error %d. " 2608d1a890faSShreyas Bhatewara "Closing it\n", netdev->name, err); 2609d1a890faSShreyas Bhatewara goto out; 2610d1a890faSShreyas Bhatewara } 2611d1a890faSShreyas Bhatewara } 2612d1a890faSShreyas Bhatewara 2613d1a890faSShreyas Bhatewara out: 2614d1a890faSShreyas Bhatewara clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state); 2615d1a890faSShreyas Bhatewara if (err) 2616d1a890faSShreyas Bhatewara vmxnet3_force_close(adapter); 2617d1a890faSShreyas Bhatewara 2618d1a890faSShreyas Bhatewara return err; 2619d1a890faSShreyas Bhatewara } 2620d1a890faSShreyas Bhatewara 2621d1a890faSShreyas Bhatewara 2622d1a890faSShreyas Bhatewara static void 2623d1a890faSShreyas Bhatewara vmxnet3_declare_features(struct vmxnet3_adapter *adapter, bool dma64) 2624d1a890faSShreyas Bhatewara { 2625d1a890faSShreyas Bhatewara struct net_device *netdev = adapter->netdev; 2626d1a890faSShreyas Bhatewara 2627d1a890faSShreyas Bhatewara netdev->features = NETIF_F_SG | 2628d1a890faSShreyas Bhatewara NETIF_F_HW_CSUM | 2629d1a890faSShreyas Bhatewara NETIF_F_HW_VLAN_TX | 2630d1a890faSShreyas Bhatewara NETIF_F_HW_VLAN_RX | 2631d1a890faSShreyas Bhatewara NETIF_F_HW_VLAN_FILTER | 2632d1a890faSShreyas Bhatewara NETIF_F_TSO | 2633d1a890faSShreyas Bhatewara NETIF_F_TSO6 | 2634d1a890faSShreyas Bhatewara NETIF_F_LRO; 2635d1a890faSShreyas Bhatewara 2636d1a890faSShreyas Bhatewara printk(KERN_INFO "features: sg csum vlan jf tso tsoIPv6 lro"); 2637d1a890faSShreyas Bhatewara 2638d1a890faSShreyas Bhatewara adapter->rxcsum = true; 2639d1a890faSShreyas Bhatewara adapter->jumbo_frame = true; 2640d1a890faSShreyas Bhatewara adapter->lro = true; 2641d1a890faSShreyas Bhatewara 2642d1a890faSShreyas Bhatewara if (dma64) { 2643d1a890faSShreyas Bhatewara netdev->features |= NETIF_F_HIGHDMA; 2644d1a890faSShreyas Bhatewara printk(" highDMA"); 2645d1a890faSShreyas Bhatewara } 2646d1a890faSShreyas Bhatewara 2647d1a890faSShreyas Bhatewara netdev->vlan_features = netdev->features; 2648d1a890faSShreyas Bhatewara printk("\n"); 2649d1a890faSShreyas Bhatewara } 2650d1a890faSShreyas Bhatewara 2651d1a890faSShreyas Bhatewara 2652d1a890faSShreyas Bhatewara static void 2653d1a890faSShreyas Bhatewara vmxnet3_read_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac) 2654d1a890faSShreyas Bhatewara { 2655d1a890faSShreyas Bhatewara u32 tmp; 2656d1a890faSShreyas Bhatewara 2657d1a890faSShreyas Bhatewara tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACL); 2658d1a890faSShreyas Bhatewara *(u32 *)mac = tmp; 2659d1a890faSShreyas Bhatewara 2660d1a890faSShreyas Bhatewara tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACH); 2661d1a890faSShreyas Bhatewara mac[4] = tmp & 0xff; 2662d1a890faSShreyas Bhatewara mac[5] = (tmp >> 8) & 0xff; 2663d1a890faSShreyas Bhatewara } 2664d1a890faSShreyas Bhatewara 266509c5088eSShreyas Bhatewara #ifdef CONFIG_PCI_MSI 266609c5088eSShreyas Bhatewara 266709c5088eSShreyas Bhatewara /* 266809c5088eSShreyas Bhatewara * Enable MSIx vectors. 266909c5088eSShreyas Bhatewara * Returns : 267009c5088eSShreyas Bhatewara * 0 on successful enabling of required vectors, 267109c5088eSShreyas Bhatewara * VMXNET3_LINUX_MIN_MSIX_VECT when only minumum number of vectors required 267209c5088eSShreyas Bhatewara * could be enabled. 267309c5088eSShreyas Bhatewara * number of vectors which can be enabled otherwise (this number is smaller 267409c5088eSShreyas Bhatewara * than VMXNET3_LINUX_MIN_MSIX_VECT) 267509c5088eSShreyas Bhatewara */ 267609c5088eSShreyas Bhatewara 267709c5088eSShreyas Bhatewara static int 267809c5088eSShreyas Bhatewara vmxnet3_acquire_msix_vectors(struct vmxnet3_adapter *adapter, 267909c5088eSShreyas Bhatewara int vectors) 268009c5088eSShreyas Bhatewara { 268109c5088eSShreyas Bhatewara int err = 0, vector_threshold; 268209c5088eSShreyas Bhatewara vector_threshold = VMXNET3_LINUX_MIN_MSIX_VECT; 268309c5088eSShreyas Bhatewara 268409c5088eSShreyas Bhatewara while (vectors >= vector_threshold) { 268509c5088eSShreyas Bhatewara err = pci_enable_msix(adapter->pdev, adapter->intr.msix_entries, 268609c5088eSShreyas Bhatewara vectors); 268709c5088eSShreyas Bhatewara if (!err) { 268809c5088eSShreyas Bhatewara adapter->intr.num_intrs = vectors; 268909c5088eSShreyas Bhatewara return 0; 269009c5088eSShreyas Bhatewara } else if (err < 0) { 269109c5088eSShreyas Bhatewara printk(KERN_ERR "Failed to enable MSI-X for %s, error" 269209c5088eSShreyas Bhatewara " %d\n", adapter->netdev->name, err); 269309c5088eSShreyas Bhatewara vectors = 0; 269409c5088eSShreyas Bhatewara } else if (err < vector_threshold) { 269509c5088eSShreyas Bhatewara break; 269609c5088eSShreyas Bhatewara } else { 269709c5088eSShreyas Bhatewara /* If fails to enable required number of MSI-x vectors 269809c5088eSShreyas Bhatewara * try enabling 3 of them. One each for rx, tx and event 269909c5088eSShreyas Bhatewara */ 270009c5088eSShreyas Bhatewara vectors = vector_threshold; 270109c5088eSShreyas Bhatewara printk(KERN_ERR "Failed to enable %d MSI-X for %s, try" 270209c5088eSShreyas Bhatewara " %d instead\n", vectors, adapter->netdev->name, 270309c5088eSShreyas Bhatewara vector_threshold); 270409c5088eSShreyas Bhatewara } 270509c5088eSShreyas Bhatewara } 270609c5088eSShreyas Bhatewara 270709c5088eSShreyas Bhatewara printk(KERN_INFO "Number of MSI-X interrupts which can be allocatedi" 270809c5088eSShreyas Bhatewara " are lower than min threshold required.\n"); 270909c5088eSShreyas Bhatewara return err; 271009c5088eSShreyas Bhatewara } 271109c5088eSShreyas Bhatewara 271209c5088eSShreyas Bhatewara 271309c5088eSShreyas Bhatewara #endif /* CONFIG_PCI_MSI */ 2714d1a890faSShreyas Bhatewara 2715d1a890faSShreyas Bhatewara static void 2716d1a890faSShreyas Bhatewara vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter) 2717d1a890faSShreyas Bhatewara { 2718d1a890faSShreyas Bhatewara u32 cfg; 2719d1a890faSShreyas Bhatewara 2720d1a890faSShreyas Bhatewara /* intr settings */ 2721d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2722d1a890faSShreyas Bhatewara VMXNET3_CMD_GET_CONF_INTR); 2723d1a890faSShreyas Bhatewara cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 2724d1a890faSShreyas Bhatewara adapter->intr.type = cfg & 0x3; 2725d1a890faSShreyas Bhatewara adapter->intr.mask_mode = (cfg >> 2) & 0x3; 2726d1a890faSShreyas Bhatewara 2727d1a890faSShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_AUTO) { 27280bdc0d70SShreyas Bhatewara adapter->intr.type = VMXNET3_IT_MSIX; 27290bdc0d70SShreyas Bhatewara } 2730d1a890faSShreyas Bhatewara 27318f7e524cSRandy Dunlap #ifdef CONFIG_PCI_MSI 27320bdc0d70SShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_MSIX) { 273309c5088eSShreyas Bhatewara int vector, err = 0; 27340bdc0d70SShreyas Bhatewara 273509c5088eSShreyas Bhatewara adapter->intr.num_intrs = (adapter->share_intr == 273609c5088eSShreyas Bhatewara VMXNET3_INTR_TXSHARE) ? 1 : 273709c5088eSShreyas Bhatewara adapter->num_tx_queues; 273809c5088eSShreyas Bhatewara adapter->intr.num_intrs += (adapter->share_intr == 273909c5088eSShreyas Bhatewara VMXNET3_INTR_BUDDYSHARE) ? 0 : 274009c5088eSShreyas Bhatewara adapter->num_rx_queues; 274109c5088eSShreyas Bhatewara adapter->intr.num_intrs += 1; /* for link event */ 274209c5088eSShreyas Bhatewara 274309c5088eSShreyas Bhatewara adapter->intr.num_intrs = (adapter->intr.num_intrs > 274409c5088eSShreyas Bhatewara VMXNET3_LINUX_MIN_MSIX_VECT 274509c5088eSShreyas Bhatewara ? adapter->intr.num_intrs : 274609c5088eSShreyas Bhatewara VMXNET3_LINUX_MIN_MSIX_VECT); 274709c5088eSShreyas Bhatewara 274809c5088eSShreyas Bhatewara for (vector = 0; vector < adapter->intr.num_intrs; vector++) 274909c5088eSShreyas Bhatewara adapter->intr.msix_entries[vector].entry = vector; 275009c5088eSShreyas Bhatewara 275109c5088eSShreyas Bhatewara err = vmxnet3_acquire_msix_vectors(adapter, 275209c5088eSShreyas Bhatewara adapter->intr.num_intrs); 275309c5088eSShreyas Bhatewara /* If we cannot allocate one MSIx vector per queue 275409c5088eSShreyas Bhatewara * then limit the number of rx queues to 1 275509c5088eSShreyas Bhatewara */ 275609c5088eSShreyas Bhatewara if (err == VMXNET3_LINUX_MIN_MSIX_VECT) { 275709c5088eSShreyas Bhatewara if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE 275809c5088eSShreyas Bhatewara || adapter->num_rx_queues != 2) { 275909c5088eSShreyas Bhatewara adapter->share_intr = VMXNET3_INTR_TXSHARE; 276009c5088eSShreyas Bhatewara printk(KERN_ERR "Number of rx queues : 1\n"); 276109c5088eSShreyas Bhatewara adapter->num_rx_queues = 1; 276209c5088eSShreyas Bhatewara adapter->intr.num_intrs = 276309c5088eSShreyas Bhatewara VMXNET3_LINUX_MIN_MSIX_VECT; 276409c5088eSShreyas Bhatewara } 2765d1a890faSShreyas Bhatewara return; 2766d1a890faSShreyas Bhatewara } 276709c5088eSShreyas Bhatewara if (!err) 276809c5088eSShreyas Bhatewara return; 276909c5088eSShreyas Bhatewara 277009c5088eSShreyas Bhatewara /* If we cannot allocate MSIx vectors use only one rx queue */ 277109c5088eSShreyas Bhatewara printk(KERN_INFO "Failed to enable MSI-X for %s, error %d." 277209c5088eSShreyas Bhatewara "#rx queues : 1, try MSI\n", adapter->netdev->name, err); 277309c5088eSShreyas Bhatewara 27740bdc0d70SShreyas Bhatewara adapter->intr.type = VMXNET3_IT_MSI; 27750bdc0d70SShreyas Bhatewara } 2776d1a890faSShreyas Bhatewara 27770bdc0d70SShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_MSI) { 27780bdc0d70SShreyas Bhatewara int err; 2779d1a890faSShreyas Bhatewara err = pci_enable_msi(adapter->pdev); 2780d1a890faSShreyas Bhatewara if (!err) { 278109c5088eSShreyas Bhatewara adapter->num_rx_queues = 1; 2782d1a890faSShreyas Bhatewara adapter->intr.num_intrs = 1; 2783d1a890faSShreyas Bhatewara return; 2784d1a890faSShreyas Bhatewara } 2785d1a890faSShreyas Bhatewara } 27860bdc0d70SShreyas Bhatewara #endif /* CONFIG_PCI_MSI */ 2787d1a890faSShreyas Bhatewara 278809c5088eSShreyas Bhatewara adapter->num_rx_queues = 1; 278909c5088eSShreyas Bhatewara printk(KERN_INFO "Using INTx interrupt, #Rx queues: 1.\n"); 2790d1a890faSShreyas Bhatewara adapter->intr.type = VMXNET3_IT_INTX; 2791d1a890faSShreyas Bhatewara 2792d1a890faSShreyas Bhatewara /* INT-X related setting */ 2793d1a890faSShreyas Bhatewara adapter->intr.num_intrs = 1; 2794d1a890faSShreyas Bhatewara } 2795d1a890faSShreyas Bhatewara 2796d1a890faSShreyas Bhatewara 2797d1a890faSShreyas Bhatewara static void 2798d1a890faSShreyas Bhatewara vmxnet3_free_intr_resources(struct vmxnet3_adapter *adapter) 2799d1a890faSShreyas Bhatewara { 2800d1a890faSShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_MSIX) 2801d1a890faSShreyas Bhatewara pci_disable_msix(adapter->pdev); 2802d1a890faSShreyas Bhatewara else if (adapter->intr.type == VMXNET3_IT_MSI) 2803d1a890faSShreyas Bhatewara pci_disable_msi(adapter->pdev); 2804d1a890faSShreyas Bhatewara else 2805d1a890faSShreyas Bhatewara BUG_ON(adapter->intr.type != VMXNET3_IT_INTX); 2806d1a890faSShreyas Bhatewara } 2807d1a890faSShreyas Bhatewara 2808d1a890faSShreyas Bhatewara 2809d1a890faSShreyas Bhatewara static void 2810d1a890faSShreyas Bhatewara vmxnet3_tx_timeout(struct net_device *netdev) 2811d1a890faSShreyas Bhatewara { 2812d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2813d1a890faSShreyas Bhatewara adapter->tx_timeout_count++; 2814d1a890faSShreyas Bhatewara 2815d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: tx hang\n", adapter->netdev->name); 2816d1a890faSShreyas Bhatewara schedule_work(&adapter->work); 281709c5088eSShreyas Bhatewara netif_wake_queue(adapter->netdev); 2818d1a890faSShreyas Bhatewara } 2819d1a890faSShreyas Bhatewara 2820d1a890faSShreyas Bhatewara 2821d1a890faSShreyas Bhatewara static void 2822d1a890faSShreyas Bhatewara vmxnet3_reset_work(struct work_struct *data) 2823d1a890faSShreyas Bhatewara { 2824d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter; 2825d1a890faSShreyas Bhatewara 2826d1a890faSShreyas Bhatewara adapter = container_of(data, struct vmxnet3_adapter, work); 2827d1a890faSShreyas Bhatewara 2828d1a890faSShreyas Bhatewara /* if another thread is resetting the device, no need to proceed */ 2829d1a890faSShreyas Bhatewara if (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)) 2830d1a890faSShreyas Bhatewara return; 2831d1a890faSShreyas Bhatewara 2832d1a890faSShreyas Bhatewara /* if the device is closed, we must leave it alone */ 2833d9a5f210SShreyas Bhatewara rtnl_lock(); 2834d1a890faSShreyas Bhatewara if (netif_running(adapter->netdev)) { 2835d1a890faSShreyas Bhatewara printk(KERN_INFO "%s: resetting\n", adapter->netdev->name); 2836d1a890faSShreyas Bhatewara vmxnet3_quiesce_dev(adapter); 2837d1a890faSShreyas Bhatewara vmxnet3_reset_dev(adapter); 2838d1a890faSShreyas Bhatewara vmxnet3_activate_dev(adapter); 2839d1a890faSShreyas Bhatewara } else { 2840d1a890faSShreyas Bhatewara printk(KERN_INFO "%s: already closed\n", adapter->netdev->name); 2841d1a890faSShreyas Bhatewara } 2842d9a5f210SShreyas Bhatewara rtnl_unlock(); 2843d1a890faSShreyas Bhatewara 2844d1a890faSShreyas Bhatewara clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state); 2845d1a890faSShreyas Bhatewara } 2846d1a890faSShreyas Bhatewara 2847d1a890faSShreyas Bhatewara 2848d1a890faSShreyas Bhatewara static int __devinit 2849d1a890faSShreyas Bhatewara vmxnet3_probe_device(struct pci_dev *pdev, 2850d1a890faSShreyas Bhatewara const struct pci_device_id *id) 2851d1a890faSShreyas Bhatewara { 2852d1a890faSShreyas Bhatewara static const struct net_device_ops vmxnet3_netdev_ops = { 2853d1a890faSShreyas Bhatewara .ndo_open = vmxnet3_open, 2854d1a890faSShreyas Bhatewara .ndo_stop = vmxnet3_close, 2855d1a890faSShreyas Bhatewara .ndo_start_xmit = vmxnet3_xmit_frame, 2856d1a890faSShreyas Bhatewara .ndo_set_mac_address = vmxnet3_set_mac_addr, 2857d1a890faSShreyas Bhatewara .ndo_change_mtu = vmxnet3_change_mtu, 2858d1a890faSShreyas Bhatewara .ndo_get_stats = vmxnet3_get_stats, 2859d1a890faSShreyas Bhatewara .ndo_tx_timeout = vmxnet3_tx_timeout, 2860d1a890faSShreyas Bhatewara .ndo_set_multicast_list = vmxnet3_set_mc, 2861d1a890faSShreyas Bhatewara .ndo_vlan_rx_register = vmxnet3_vlan_rx_register, 2862d1a890faSShreyas Bhatewara .ndo_vlan_rx_add_vid = vmxnet3_vlan_rx_add_vid, 2863d1a890faSShreyas Bhatewara .ndo_vlan_rx_kill_vid = vmxnet3_vlan_rx_kill_vid, 2864d1a890faSShreyas Bhatewara #ifdef CONFIG_NET_POLL_CONTROLLER 2865d1a890faSShreyas Bhatewara .ndo_poll_controller = vmxnet3_netpoll, 2866d1a890faSShreyas Bhatewara #endif 2867d1a890faSShreyas Bhatewara }; 2868d1a890faSShreyas Bhatewara int err; 2869d1a890faSShreyas Bhatewara bool dma64 = false; /* stupid gcc */ 2870d1a890faSShreyas Bhatewara u32 ver; 2871d1a890faSShreyas Bhatewara struct net_device *netdev; 2872d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter; 2873d1a890faSShreyas Bhatewara u8 mac[ETH_ALEN]; 287409c5088eSShreyas Bhatewara int size; 287509c5088eSShreyas Bhatewara int num_tx_queues; 287609c5088eSShreyas Bhatewara int num_rx_queues; 2877d1a890faSShreyas Bhatewara 287809c5088eSShreyas Bhatewara #ifdef VMXNET3_RSS 287909c5088eSShreyas Bhatewara if (enable_mq) 288009c5088eSShreyas Bhatewara num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES, 288109c5088eSShreyas Bhatewara (int)num_online_cpus()); 288209c5088eSShreyas Bhatewara else 288309c5088eSShreyas Bhatewara #endif 288409c5088eSShreyas Bhatewara num_rx_queues = 1; 288509c5088eSShreyas Bhatewara 288609c5088eSShreyas Bhatewara if (enable_mq) 288709c5088eSShreyas Bhatewara num_tx_queues = min(VMXNET3_DEVICE_MAX_TX_QUEUES, 288809c5088eSShreyas Bhatewara (int)num_online_cpus()); 288909c5088eSShreyas Bhatewara else 289009c5088eSShreyas Bhatewara num_tx_queues = 1; 289109c5088eSShreyas Bhatewara 289209c5088eSShreyas Bhatewara netdev = alloc_etherdev_mq(sizeof(struct vmxnet3_adapter), 289309c5088eSShreyas Bhatewara max(num_tx_queues, num_rx_queues)); 289409c5088eSShreyas Bhatewara printk(KERN_INFO "# of Tx queues : %d, # of Rx queues : %d\n", 289509c5088eSShreyas Bhatewara num_tx_queues, num_rx_queues); 289609c5088eSShreyas Bhatewara 2897d1a890faSShreyas Bhatewara if (!netdev) { 2898d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to alloc ethernet device for adapter " 2899d1a890faSShreyas Bhatewara "%s\n", pci_name(pdev)); 2900d1a890faSShreyas Bhatewara return -ENOMEM; 2901d1a890faSShreyas Bhatewara } 2902d1a890faSShreyas Bhatewara 2903d1a890faSShreyas Bhatewara pci_set_drvdata(pdev, netdev); 2904d1a890faSShreyas Bhatewara adapter = netdev_priv(netdev); 2905d1a890faSShreyas Bhatewara adapter->netdev = netdev; 2906d1a890faSShreyas Bhatewara adapter->pdev = pdev; 2907d1a890faSShreyas Bhatewara 2908d1a890faSShreyas Bhatewara adapter->shared = pci_alloc_consistent(adapter->pdev, 2909d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_DriverShared), 2910d1a890faSShreyas Bhatewara &adapter->shared_pa); 2911d1a890faSShreyas Bhatewara if (!adapter->shared) { 2912d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to allocate memory for %s\n", 2913d1a890faSShreyas Bhatewara pci_name(pdev)); 2914d1a890faSShreyas Bhatewara err = -ENOMEM; 2915d1a890faSShreyas Bhatewara goto err_alloc_shared; 2916d1a890faSShreyas Bhatewara } 2917d1a890faSShreyas Bhatewara 291809c5088eSShreyas Bhatewara adapter->num_rx_queues = num_rx_queues; 291909c5088eSShreyas Bhatewara adapter->num_tx_queues = num_tx_queues; 292009c5088eSShreyas Bhatewara 292109c5088eSShreyas Bhatewara size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues; 292209c5088eSShreyas Bhatewara size += sizeof(struct Vmxnet3_RxQueueDesc) * adapter->num_rx_queues; 292309c5088eSShreyas Bhatewara adapter->tqd_start = pci_alloc_consistent(adapter->pdev, size, 2924d1a890faSShreyas Bhatewara &adapter->queue_desc_pa); 2925d1a890faSShreyas Bhatewara 2926d1a890faSShreyas Bhatewara if (!adapter->tqd_start) { 2927d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to allocate memory for %s\n", 2928d1a890faSShreyas Bhatewara pci_name(pdev)); 2929d1a890faSShreyas Bhatewara err = -ENOMEM; 2930d1a890faSShreyas Bhatewara goto err_alloc_queue_desc; 2931d1a890faSShreyas Bhatewara } 293209c5088eSShreyas Bhatewara adapter->rqd_start = (struct Vmxnet3_RxQueueDesc *)(adapter->tqd_start + 293309c5088eSShreyas Bhatewara adapter->num_tx_queues); 2934d1a890faSShreyas Bhatewara 2935d1a890faSShreyas Bhatewara adapter->pm_conf = kmalloc(sizeof(struct Vmxnet3_PMConf), GFP_KERNEL); 2936d1a890faSShreyas Bhatewara if (adapter->pm_conf == NULL) { 2937d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to allocate memory for %s\n", 2938d1a890faSShreyas Bhatewara pci_name(pdev)); 2939d1a890faSShreyas Bhatewara err = -ENOMEM; 2940d1a890faSShreyas Bhatewara goto err_alloc_pm; 2941d1a890faSShreyas Bhatewara } 2942d1a890faSShreyas Bhatewara 294309c5088eSShreyas Bhatewara #ifdef VMXNET3_RSS 294409c5088eSShreyas Bhatewara 294509c5088eSShreyas Bhatewara adapter->rss_conf = kmalloc(sizeof(struct UPT1_RSSConf), GFP_KERNEL); 294609c5088eSShreyas Bhatewara if (adapter->rss_conf == NULL) { 294709c5088eSShreyas Bhatewara printk(KERN_ERR "Failed to allocate memory for %s\n", 294809c5088eSShreyas Bhatewara pci_name(pdev)); 294909c5088eSShreyas Bhatewara err = -ENOMEM; 295009c5088eSShreyas Bhatewara goto err_alloc_rss; 295109c5088eSShreyas Bhatewara } 295209c5088eSShreyas Bhatewara #endif /* VMXNET3_RSS */ 295309c5088eSShreyas Bhatewara 2954d1a890faSShreyas Bhatewara err = vmxnet3_alloc_pci_resources(adapter, &dma64); 2955d1a890faSShreyas Bhatewara if (err < 0) 2956d1a890faSShreyas Bhatewara goto err_alloc_pci; 2957d1a890faSShreyas Bhatewara 2958d1a890faSShreyas Bhatewara ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_VRRS); 2959d1a890faSShreyas Bhatewara if (ver & 1) { 2960d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_VRRS, 1); 2961d1a890faSShreyas Bhatewara } else { 2962d1a890faSShreyas Bhatewara printk(KERN_ERR "Incompatible h/w version (0x%x) for adapter" 2963d1a890faSShreyas Bhatewara " %s\n", ver, pci_name(pdev)); 2964d1a890faSShreyas Bhatewara err = -EBUSY; 2965d1a890faSShreyas Bhatewara goto err_ver; 2966d1a890faSShreyas Bhatewara } 2967d1a890faSShreyas Bhatewara 2968d1a890faSShreyas Bhatewara ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_UVRS); 2969d1a890faSShreyas Bhatewara if (ver & 1) { 2970d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_UVRS, 1); 2971d1a890faSShreyas Bhatewara } else { 2972d1a890faSShreyas Bhatewara printk(KERN_ERR "Incompatible upt version (0x%x) for " 2973d1a890faSShreyas Bhatewara "adapter %s\n", ver, pci_name(pdev)); 2974d1a890faSShreyas Bhatewara err = -EBUSY; 2975d1a890faSShreyas Bhatewara goto err_ver; 2976d1a890faSShreyas Bhatewara } 2977d1a890faSShreyas Bhatewara 2978d1a890faSShreyas Bhatewara vmxnet3_declare_features(adapter, dma64); 2979d1a890faSShreyas Bhatewara 2980d1a890faSShreyas Bhatewara adapter->dev_number = atomic_read(&devices_found); 298109c5088eSShreyas Bhatewara 298209c5088eSShreyas Bhatewara adapter->share_intr = irq_share_mode; 298309c5088eSShreyas Bhatewara if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE && 298409c5088eSShreyas Bhatewara adapter->num_tx_queues != adapter->num_rx_queues) 298509c5088eSShreyas Bhatewara adapter->share_intr = VMXNET3_INTR_DONTSHARE; 298609c5088eSShreyas Bhatewara 2987d1a890faSShreyas Bhatewara vmxnet3_alloc_intr_resources(adapter); 2988d1a890faSShreyas Bhatewara 298909c5088eSShreyas Bhatewara #ifdef VMXNET3_RSS 299009c5088eSShreyas Bhatewara if (adapter->num_rx_queues > 1 && 299109c5088eSShreyas Bhatewara adapter->intr.type == VMXNET3_IT_MSIX) { 299209c5088eSShreyas Bhatewara adapter->rss = true; 299309c5088eSShreyas Bhatewara printk(KERN_INFO "RSS is enabled.\n"); 299409c5088eSShreyas Bhatewara } else { 299509c5088eSShreyas Bhatewara adapter->rss = false; 299609c5088eSShreyas Bhatewara } 299709c5088eSShreyas Bhatewara #endif 299809c5088eSShreyas Bhatewara 2999d1a890faSShreyas Bhatewara vmxnet3_read_mac_addr(adapter, mac); 3000d1a890faSShreyas Bhatewara memcpy(netdev->dev_addr, mac, netdev->addr_len); 3001d1a890faSShreyas Bhatewara 3002d1a890faSShreyas Bhatewara netdev->netdev_ops = &vmxnet3_netdev_ops; 3003d1a890faSShreyas Bhatewara vmxnet3_set_ethtool_ops(netdev); 300409c5088eSShreyas Bhatewara netdev->watchdog_timeo = 5 * HZ; 3005d1a890faSShreyas Bhatewara 3006d1a890faSShreyas Bhatewara INIT_WORK(&adapter->work, vmxnet3_reset_work); 3007d1a890faSShreyas Bhatewara 300809c5088eSShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_MSIX) { 300909c5088eSShreyas Bhatewara int i; 301009c5088eSShreyas Bhatewara for (i = 0; i < adapter->num_rx_queues; i++) { 301109c5088eSShreyas Bhatewara netif_napi_add(adapter->netdev, 301209c5088eSShreyas Bhatewara &adapter->rx_queue[i].napi, 301309c5088eSShreyas Bhatewara vmxnet3_poll_rx_only, 64); 301409c5088eSShreyas Bhatewara } 301509c5088eSShreyas Bhatewara } else { 301609c5088eSShreyas Bhatewara netif_napi_add(adapter->netdev, &adapter->rx_queue[0].napi, 301709c5088eSShreyas Bhatewara vmxnet3_poll, 64); 301809c5088eSShreyas Bhatewara } 301909c5088eSShreyas Bhatewara 302009c5088eSShreyas Bhatewara netif_set_real_num_tx_queues(adapter->netdev, adapter->num_tx_queues); 302109c5088eSShreyas Bhatewara netif_set_real_num_rx_queues(adapter->netdev, adapter->num_rx_queues); 302209c5088eSShreyas Bhatewara 3023d1a890faSShreyas Bhatewara SET_NETDEV_DEV(netdev, &pdev->dev); 3024d1a890faSShreyas Bhatewara err = register_netdev(netdev); 3025d1a890faSShreyas Bhatewara 3026d1a890faSShreyas Bhatewara if (err) { 3027d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to register adapter %s\n", 3028d1a890faSShreyas Bhatewara pci_name(pdev)); 3029d1a890faSShreyas Bhatewara goto err_register; 3030d1a890faSShreyas Bhatewara } 3031d1a890faSShreyas Bhatewara 3032d1a890faSShreyas Bhatewara set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state); 30334a1745fcSShreyas Bhatewara vmxnet3_check_link(adapter, false); 3034d1a890faSShreyas Bhatewara atomic_inc(&devices_found); 3035d1a890faSShreyas Bhatewara return 0; 3036d1a890faSShreyas Bhatewara 3037d1a890faSShreyas Bhatewara err_register: 3038d1a890faSShreyas Bhatewara vmxnet3_free_intr_resources(adapter); 3039d1a890faSShreyas Bhatewara err_ver: 3040d1a890faSShreyas Bhatewara vmxnet3_free_pci_resources(adapter); 3041d1a890faSShreyas Bhatewara err_alloc_pci: 304209c5088eSShreyas Bhatewara #ifdef VMXNET3_RSS 304309c5088eSShreyas Bhatewara kfree(adapter->rss_conf); 304409c5088eSShreyas Bhatewara err_alloc_rss: 304509c5088eSShreyas Bhatewara #endif 3046d1a890faSShreyas Bhatewara kfree(adapter->pm_conf); 3047d1a890faSShreyas Bhatewara err_alloc_pm: 304809c5088eSShreyas Bhatewara pci_free_consistent(adapter->pdev, size, adapter->tqd_start, 304909c5088eSShreyas Bhatewara adapter->queue_desc_pa); 3050d1a890faSShreyas Bhatewara err_alloc_queue_desc: 3051d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared), 3052d1a890faSShreyas Bhatewara adapter->shared, adapter->shared_pa); 3053d1a890faSShreyas Bhatewara err_alloc_shared: 3054d1a890faSShreyas Bhatewara pci_set_drvdata(pdev, NULL); 3055d1a890faSShreyas Bhatewara free_netdev(netdev); 3056d1a890faSShreyas Bhatewara return err; 3057d1a890faSShreyas Bhatewara } 3058d1a890faSShreyas Bhatewara 3059d1a890faSShreyas Bhatewara 3060d1a890faSShreyas Bhatewara static void __devexit 3061d1a890faSShreyas Bhatewara vmxnet3_remove_device(struct pci_dev *pdev) 3062d1a890faSShreyas Bhatewara { 3063d1a890faSShreyas Bhatewara struct net_device *netdev = pci_get_drvdata(pdev); 3064d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 306509c5088eSShreyas Bhatewara int size = 0; 306609c5088eSShreyas Bhatewara int num_rx_queues; 306709c5088eSShreyas Bhatewara 306809c5088eSShreyas Bhatewara #ifdef VMXNET3_RSS 306909c5088eSShreyas Bhatewara if (enable_mq) 307009c5088eSShreyas Bhatewara num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES, 307109c5088eSShreyas Bhatewara (int)num_online_cpus()); 307209c5088eSShreyas Bhatewara else 307309c5088eSShreyas Bhatewara #endif 307409c5088eSShreyas Bhatewara num_rx_queues = 1; 3075d1a890faSShreyas Bhatewara 307623f333a2STejun Heo cancel_work_sync(&adapter->work); 3077d1a890faSShreyas Bhatewara 3078d1a890faSShreyas Bhatewara unregister_netdev(netdev); 3079d1a890faSShreyas Bhatewara 3080d1a890faSShreyas Bhatewara vmxnet3_free_intr_resources(adapter); 3081d1a890faSShreyas Bhatewara vmxnet3_free_pci_resources(adapter); 308209c5088eSShreyas Bhatewara #ifdef VMXNET3_RSS 308309c5088eSShreyas Bhatewara kfree(adapter->rss_conf); 308409c5088eSShreyas Bhatewara #endif 3085d1a890faSShreyas Bhatewara kfree(adapter->pm_conf); 308609c5088eSShreyas Bhatewara 308709c5088eSShreyas Bhatewara size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues; 308809c5088eSShreyas Bhatewara size += sizeof(struct Vmxnet3_RxQueueDesc) * num_rx_queues; 308909c5088eSShreyas Bhatewara pci_free_consistent(adapter->pdev, size, adapter->tqd_start, 309009c5088eSShreyas Bhatewara adapter->queue_desc_pa); 3091d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared), 3092d1a890faSShreyas Bhatewara adapter->shared, adapter->shared_pa); 3093d1a890faSShreyas Bhatewara free_netdev(netdev); 3094d1a890faSShreyas Bhatewara } 3095d1a890faSShreyas Bhatewara 3096d1a890faSShreyas Bhatewara 3097d1a890faSShreyas Bhatewara #ifdef CONFIG_PM 3098d1a890faSShreyas Bhatewara 3099d1a890faSShreyas Bhatewara static int 3100d1a890faSShreyas Bhatewara vmxnet3_suspend(struct device *device) 3101d1a890faSShreyas Bhatewara { 3102d1a890faSShreyas Bhatewara struct pci_dev *pdev = to_pci_dev(device); 3103d1a890faSShreyas Bhatewara struct net_device *netdev = pci_get_drvdata(pdev); 3104d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 3105d1a890faSShreyas Bhatewara struct Vmxnet3_PMConf *pmConf; 3106d1a890faSShreyas Bhatewara struct ethhdr *ehdr; 3107d1a890faSShreyas Bhatewara struct arphdr *ahdr; 3108d1a890faSShreyas Bhatewara u8 *arpreq; 3109d1a890faSShreyas Bhatewara struct in_device *in_dev; 3110d1a890faSShreyas Bhatewara struct in_ifaddr *ifa; 3111d1a890faSShreyas Bhatewara int i = 0; 3112d1a890faSShreyas Bhatewara 3113d1a890faSShreyas Bhatewara if (!netif_running(netdev)) 3114d1a890faSShreyas Bhatewara return 0; 3115d1a890faSShreyas Bhatewara 3116d1a890faSShreyas Bhatewara vmxnet3_disable_all_intrs(adapter); 3117d1a890faSShreyas Bhatewara vmxnet3_free_irqs(adapter); 3118d1a890faSShreyas Bhatewara vmxnet3_free_intr_resources(adapter); 3119d1a890faSShreyas Bhatewara 3120d1a890faSShreyas Bhatewara netif_device_detach(netdev); 312109c5088eSShreyas Bhatewara netif_tx_stop_all_queues(netdev); 3122d1a890faSShreyas Bhatewara 3123d1a890faSShreyas Bhatewara /* Create wake-up filters. */ 3124d1a890faSShreyas Bhatewara pmConf = adapter->pm_conf; 3125d1a890faSShreyas Bhatewara memset(pmConf, 0, sizeof(*pmConf)); 3126d1a890faSShreyas Bhatewara 3127d1a890faSShreyas Bhatewara if (adapter->wol & WAKE_UCAST) { 3128d1a890faSShreyas Bhatewara pmConf->filters[i].patternSize = ETH_ALEN; 3129d1a890faSShreyas Bhatewara pmConf->filters[i].maskSize = 1; 3130d1a890faSShreyas Bhatewara memcpy(pmConf->filters[i].pattern, netdev->dev_addr, ETH_ALEN); 3131d1a890faSShreyas Bhatewara pmConf->filters[i].mask[0] = 0x3F; /* LSB ETH_ALEN bits */ 3132d1a890faSShreyas Bhatewara 31333843e515SHarvey Harrison pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER; 3134d1a890faSShreyas Bhatewara i++; 3135d1a890faSShreyas Bhatewara } 3136d1a890faSShreyas Bhatewara 3137d1a890faSShreyas Bhatewara if (adapter->wol & WAKE_ARP) { 3138d1a890faSShreyas Bhatewara in_dev = in_dev_get(netdev); 3139d1a890faSShreyas Bhatewara if (!in_dev) 3140d1a890faSShreyas Bhatewara goto skip_arp; 3141d1a890faSShreyas Bhatewara 3142d1a890faSShreyas Bhatewara ifa = (struct in_ifaddr *)in_dev->ifa_list; 3143d1a890faSShreyas Bhatewara if (!ifa) 3144d1a890faSShreyas Bhatewara goto skip_arp; 3145d1a890faSShreyas Bhatewara 3146d1a890faSShreyas Bhatewara pmConf->filters[i].patternSize = ETH_HLEN + /* Ethernet header*/ 3147d1a890faSShreyas Bhatewara sizeof(struct arphdr) + /* ARP header */ 3148d1a890faSShreyas Bhatewara 2 * ETH_ALEN + /* 2 Ethernet addresses*/ 3149d1a890faSShreyas Bhatewara 2 * sizeof(u32); /*2 IPv4 addresses */ 3150d1a890faSShreyas Bhatewara pmConf->filters[i].maskSize = 3151d1a890faSShreyas Bhatewara (pmConf->filters[i].patternSize - 1) / 8 + 1; 3152d1a890faSShreyas Bhatewara 3153d1a890faSShreyas Bhatewara /* ETH_P_ARP in Ethernet header. */ 3154d1a890faSShreyas Bhatewara ehdr = (struct ethhdr *)pmConf->filters[i].pattern; 3155d1a890faSShreyas Bhatewara ehdr->h_proto = htons(ETH_P_ARP); 3156d1a890faSShreyas Bhatewara 3157d1a890faSShreyas Bhatewara /* ARPOP_REQUEST in ARP header. */ 3158d1a890faSShreyas Bhatewara ahdr = (struct arphdr *)&pmConf->filters[i].pattern[ETH_HLEN]; 3159d1a890faSShreyas Bhatewara ahdr->ar_op = htons(ARPOP_REQUEST); 3160d1a890faSShreyas Bhatewara arpreq = (u8 *)(ahdr + 1); 3161d1a890faSShreyas Bhatewara 3162d1a890faSShreyas Bhatewara /* The Unicast IPv4 address in 'tip' field. */ 3163d1a890faSShreyas Bhatewara arpreq += 2 * ETH_ALEN + sizeof(u32); 3164d1a890faSShreyas Bhatewara *(u32 *)arpreq = ifa->ifa_address; 3165d1a890faSShreyas Bhatewara 3166d1a890faSShreyas Bhatewara /* The mask for the relevant bits. */ 3167d1a890faSShreyas Bhatewara pmConf->filters[i].mask[0] = 0x00; 3168d1a890faSShreyas Bhatewara pmConf->filters[i].mask[1] = 0x30; /* ETH_P_ARP */ 3169d1a890faSShreyas Bhatewara pmConf->filters[i].mask[2] = 0x30; /* ARPOP_REQUEST */ 3170d1a890faSShreyas Bhatewara pmConf->filters[i].mask[3] = 0x00; 3171d1a890faSShreyas Bhatewara pmConf->filters[i].mask[4] = 0xC0; /* IPv4 TIP */ 3172d1a890faSShreyas Bhatewara pmConf->filters[i].mask[5] = 0x03; /* IPv4 TIP */ 3173d1a890faSShreyas Bhatewara in_dev_put(in_dev); 3174d1a890faSShreyas Bhatewara 31753843e515SHarvey Harrison pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER; 3176d1a890faSShreyas Bhatewara i++; 3177d1a890faSShreyas Bhatewara } 3178d1a890faSShreyas Bhatewara 3179d1a890faSShreyas Bhatewara skip_arp: 3180d1a890faSShreyas Bhatewara if (adapter->wol & WAKE_MAGIC) 31813843e515SHarvey Harrison pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_MAGIC; 3182d1a890faSShreyas Bhatewara 3183d1a890faSShreyas Bhatewara pmConf->numFilters = i; 3184d1a890faSShreyas Bhatewara 3185115924b6SShreyas Bhatewara adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1); 3186115924b6SShreyas Bhatewara adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof( 3187115924b6SShreyas Bhatewara *pmConf)); 3188115924b6SShreyas Bhatewara adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys( 3189115924b6SShreyas Bhatewara pmConf)); 3190d1a890faSShreyas Bhatewara 3191d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 3192d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_PMCFG); 3193d1a890faSShreyas Bhatewara 3194d1a890faSShreyas Bhatewara pci_save_state(pdev); 3195d1a890faSShreyas Bhatewara pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND), 3196d1a890faSShreyas Bhatewara adapter->wol); 3197d1a890faSShreyas Bhatewara pci_disable_device(pdev); 3198d1a890faSShreyas Bhatewara pci_set_power_state(pdev, pci_choose_state(pdev, PMSG_SUSPEND)); 3199d1a890faSShreyas Bhatewara 3200d1a890faSShreyas Bhatewara return 0; 3201d1a890faSShreyas Bhatewara } 3202d1a890faSShreyas Bhatewara 3203d1a890faSShreyas Bhatewara 3204d1a890faSShreyas Bhatewara static int 3205d1a890faSShreyas Bhatewara vmxnet3_resume(struct device *device) 3206d1a890faSShreyas Bhatewara { 3207d1a890faSShreyas Bhatewara int err; 3208d1a890faSShreyas Bhatewara struct pci_dev *pdev = to_pci_dev(device); 3209d1a890faSShreyas Bhatewara struct net_device *netdev = pci_get_drvdata(pdev); 3210d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 3211d1a890faSShreyas Bhatewara struct Vmxnet3_PMConf *pmConf; 3212d1a890faSShreyas Bhatewara 3213d1a890faSShreyas Bhatewara if (!netif_running(netdev)) 3214d1a890faSShreyas Bhatewara return 0; 3215d1a890faSShreyas Bhatewara 3216d1a890faSShreyas Bhatewara /* Destroy wake-up filters. */ 3217d1a890faSShreyas Bhatewara pmConf = adapter->pm_conf; 3218d1a890faSShreyas Bhatewara memset(pmConf, 0, sizeof(*pmConf)); 3219d1a890faSShreyas Bhatewara 3220115924b6SShreyas Bhatewara adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1); 3221115924b6SShreyas Bhatewara adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof( 3222115924b6SShreyas Bhatewara *pmConf)); 32230561cf3dSHarvey Harrison adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys( 3224115924b6SShreyas Bhatewara pmConf)); 3225d1a890faSShreyas Bhatewara 3226d1a890faSShreyas Bhatewara netif_device_attach(netdev); 3227d1a890faSShreyas Bhatewara pci_set_power_state(pdev, PCI_D0); 3228d1a890faSShreyas Bhatewara pci_restore_state(pdev); 3229d1a890faSShreyas Bhatewara err = pci_enable_device_mem(pdev); 3230d1a890faSShreyas Bhatewara if (err != 0) 3231d1a890faSShreyas Bhatewara return err; 3232d1a890faSShreyas Bhatewara 3233d1a890faSShreyas Bhatewara pci_enable_wake(pdev, PCI_D0, 0); 3234d1a890faSShreyas Bhatewara 3235d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 3236d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_PMCFG); 3237d1a890faSShreyas Bhatewara vmxnet3_alloc_intr_resources(adapter); 3238d1a890faSShreyas Bhatewara vmxnet3_request_irqs(adapter); 3239d1a890faSShreyas Bhatewara vmxnet3_enable_all_intrs(adapter); 3240d1a890faSShreyas Bhatewara 3241d1a890faSShreyas Bhatewara return 0; 3242d1a890faSShreyas Bhatewara } 3243d1a890faSShreyas Bhatewara 324447145210SAlexey Dobriyan static const struct dev_pm_ops vmxnet3_pm_ops = { 3245d1a890faSShreyas Bhatewara .suspend = vmxnet3_suspend, 3246d1a890faSShreyas Bhatewara .resume = vmxnet3_resume, 3247d1a890faSShreyas Bhatewara }; 3248d1a890faSShreyas Bhatewara #endif 3249d1a890faSShreyas Bhatewara 3250d1a890faSShreyas Bhatewara static struct pci_driver vmxnet3_driver = { 3251d1a890faSShreyas Bhatewara .name = vmxnet3_driver_name, 3252d1a890faSShreyas Bhatewara .id_table = vmxnet3_pciid_table, 3253d1a890faSShreyas Bhatewara .probe = vmxnet3_probe_device, 3254d1a890faSShreyas Bhatewara .remove = __devexit_p(vmxnet3_remove_device), 3255d1a890faSShreyas Bhatewara #ifdef CONFIG_PM 3256d1a890faSShreyas Bhatewara .driver.pm = &vmxnet3_pm_ops, 3257d1a890faSShreyas Bhatewara #endif 3258d1a890faSShreyas Bhatewara }; 3259d1a890faSShreyas Bhatewara 3260d1a890faSShreyas Bhatewara 3261d1a890faSShreyas Bhatewara static int __init 3262d1a890faSShreyas Bhatewara vmxnet3_init_module(void) 3263d1a890faSShreyas Bhatewara { 3264d1a890faSShreyas Bhatewara printk(KERN_INFO "%s - version %s\n", VMXNET3_DRIVER_DESC, 3265d1a890faSShreyas Bhatewara VMXNET3_DRIVER_VERSION_REPORT); 3266d1a890faSShreyas Bhatewara return pci_register_driver(&vmxnet3_driver); 3267d1a890faSShreyas Bhatewara } 3268d1a890faSShreyas Bhatewara 3269d1a890faSShreyas Bhatewara module_init(vmxnet3_init_module); 3270d1a890faSShreyas Bhatewara 3271d1a890faSShreyas Bhatewara 3272d1a890faSShreyas Bhatewara static void 3273d1a890faSShreyas Bhatewara vmxnet3_exit_module(void) 3274d1a890faSShreyas Bhatewara { 3275d1a890faSShreyas Bhatewara pci_unregister_driver(&vmxnet3_driver); 3276d1a890faSShreyas Bhatewara } 3277d1a890faSShreyas Bhatewara 3278d1a890faSShreyas Bhatewara module_exit(vmxnet3_exit_module); 3279d1a890faSShreyas Bhatewara 3280d1a890faSShreyas Bhatewara MODULE_AUTHOR("VMware, Inc."); 3281d1a890faSShreyas Bhatewara MODULE_DESCRIPTION(VMXNET3_DRIVER_DESC); 3282d1a890faSShreyas Bhatewara MODULE_LICENSE("GPL v2"); 3283d1a890faSShreyas Bhatewara MODULE_VERSION(VMXNET3_DRIVER_VERSION_STRING); 3284