1d1a890faSShreyas Bhatewara /* 2d1a890faSShreyas Bhatewara * Linux driver for VMware's vmxnet3 ethernet NIC. 3d1a890faSShreyas Bhatewara * 4d1a890faSShreyas Bhatewara * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved. 5d1a890faSShreyas Bhatewara * 6d1a890faSShreyas Bhatewara * This program is free software; you can redistribute it and/or modify it 7d1a890faSShreyas Bhatewara * under the terms of the GNU General Public License as published by the 8d1a890faSShreyas Bhatewara * Free Software Foundation; version 2 of the License and no later version. 9d1a890faSShreyas Bhatewara * 10d1a890faSShreyas Bhatewara * This program is distributed in the hope that it will be useful, but 11d1a890faSShreyas Bhatewara * WITHOUT ANY WARRANTY; without even the implied warranty of 12d1a890faSShreyas Bhatewara * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 13d1a890faSShreyas Bhatewara * NON INFRINGEMENT. See the GNU General Public License for more 14d1a890faSShreyas Bhatewara * details. 15d1a890faSShreyas Bhatewara * 16d1a890faSShreyas Bhatewara * You should have received a copy of the GNU General Public License 17d1a890faSShreyas Bhatewara * along with this program; if not, write to the Free Software 18d1a890faSShreyas Bhatewara * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19d1a890faSShreyas Bhatewara * 20d1a890faSShreyas Bhatewara * The full GNU General Public License is included in this distribution in 21d1a890faSShreyas Bhatewara * the file called "COPYING". 22d1a890faSShreyas Bhatewara * 23d1a890faSShreyas Bhatewara * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com> 24d1a890faSShreyas Bhatewara * 25d1a890faSShreyas Bhatewara */ 26d1a890faSShreyas Bhatewara 27b038b040SStephen Rothwell #include <net/ip6_checksum.h> 28b038b040SStephen Rothwell 29d1a890faSShreyas Bhatewara #include "vmxnet3_int.h" 30d1a890faSShreyas Bhatewara 31d1a890faSShreyas Bhatewara char vmxnet3_driver_name[] = "vmxnet3"; 32d1a890faSShreyas Bhatewara #define VMXNET3_DRIVER_DESC "VMware vmxnet3 virtual NIC driver" 33d1a890faSShreyas Bhatewara 34d1a890faSShreyas Bhatewara /* 35d1a890faSShreyas Bhatewara * PCI Device ID Table 36d1a890faSShreyas Bhatewara * Last entry must be all 0s 37d1a890faSShreyas Bhatewara */ 38a3aa1884SAlexey Dobriyan static DEFINE_PCI_DEVICE_TABLE(vmxnet3_pciid_table) = { 39d1a890faSShreyas Bhatewara {PCI_VDEVICE(VMWARE, PCI_DEVICE_ID_VMWARE_VMXNET3)}, 40d1a890faSShreyas Bhatewara {0} 41d1a890faSShreyas Bhatewara }; 42d1a890faSShreyas Bhatewara 43d1a890faSShreyas Bhatewara MODULE_DEVICE_TABLE(pci, vmxnet3_pciid_table); 44d1a890faSShreyas Bhatewara 45d1a890faSShreyas Bhatewara static atomic_t devices_found; 46d1a890faSShreyas Bhatewara 47d1a890faSShreyas Bhatewara 48d1a890faSShreyas Bhatewara /* 49d1a890faSShreyas Bhatewara * Enable/Disable the given intr 50d1a890faSShreyas Bhatewara */ 51d1a890faSShreyas Bhatewara static void 52d1a890faSShreyas Bhatewara vmxnet3_enable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx) 53d1a890faSShreyas Bhatewara { 54d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 0); 55d1a890faSShreyas Bhatewara } 56d1a890faSShreyas Bhatewara 57d1a890faSShreyas Bhatewara 58d1a890faSShreyas Bhatewara static void 59d1a890faSShreyas Bhatewara vmxnet3_disable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx) 60d1a890faSShreyas Bhatewara { 61d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 1); 62d1a890faSShreyas Bhatewara } 63d1a890faSShreyas Bhatewara 64d1a890faSShreyas Bhatewara 65d1a890faSShreyas Bhatewara /* 66d1a890faSShreyas Bhatewara * Enable/Disable all intrs used by the device 67d1a890faSShreyas Bhatewara */ 68d1a890faSShreyas Bhatewara static void 69d1a890faSShreyas Bhatewara vmxnet3_enable_all_intrs(struct vmxnet3_adapter *adapter) 70d1a890faSShreyas Bhatewara { 71d1a890faSShreyas Bhatewara int i; 72d1a890faSShreyas Bhatewara 73d1a890faSShreyas Bhatewara for (i = 0; i < adapter->intr.num_intrs; i++) 74d1a890faSShreyas Bhatewara vmxnet3_enable_intr(adapter, i); 756929fe8aSRonghua Zang adapter->shared->devRead.intrConf.intrCtrl &= 766929fe8aSRonghua Zang cpu_to_le32(~VMXNET3_IC_DISABLE_ALL); 77d1a890faSShreyas Bhatewara } 78d1a890faSShreyas Bhatewara 79d1a890faSShreyas Bhatewara 80d1a890faSShreyas Bhatewara static void 81d1a890faSShreyas Bhatewara vmxnet3_disable_all_intrs(struct vmxnet3_adapter *adapter) 82d1a890faSShreyas Bhatewara { 83d1a890faSShreyas Bhatewara int i; 84d1a890faSShreyas Bhatewara 856929fe8aSRonghua Zang adapter->shared->devRead.intrConf.intrCtrl |= 866929fe8aSRonghua Zang cpu_to_le32(VMXNET3_IC_DISABLE_ALL); 87d1a890faSShreyas Bhatewara for (i = 0; i < adapter->intr.num_intrs; i++) 88d1a890faSShreyas Bhatewara vmxnet3_disable_intr(adapter, i); 89d1a890faSShreyas Bhatewara } 90d1a890faSShreyas Bhatewara 91d1a890faSShreyas Bhatewara 92d1a890faSShreyas Bhatewara static void 93d1a890faSShreyas Bhatewara vmxnet3_ack_events(struct vmxnet3_adapter *adapter, u32 events) 94d1a890faSShreyas Bhatewara { 95d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_ECR, events); 96d1a890faSShreyas Bhatewara } 97d1a890faSShreyas Bhatewara 98d1a890faSShreyas Bhatewara 99d1a890faSShreyas Bhatewara static bool 100d1a890faSShreyas Bhatewara vmxnet3_tq_stopped(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 101d1a890faSShreyas Bhatewara { 102d1a890faSShreyas Bhatewara return netif_queue_stopped(adapter->netdev); 103d1a890faSShreyas Bhatewara } 104d1a890faSShreyas Bhatewara 105d1a890faSShreyas Bhatewara 106d1a890faSShreyas Bhatewara static void 107d1a890faSShreyas Bhatewara vmxnet3_tq_start(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 108d1a890faSShreyas Bhatewara { 109d1a890faSShreyas Bhatewara tq->stopped = false; 110d1a890faSShreyas Bhatewara netif_start_queue(adapter->netdev); 111d1a890faSShreyas Bhatewara } 112d1a890faSShreyas Bhatewara 113d1a890faSShreyas Bhatewara 114d1a890faSShreyas Bhatewara static void 115d1a890faSShreyas Bhatewara vmxnet3_tq_wake(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 116d1a890faSShreyas Bhatewara { 117d1a890faSShreyas Bhatewara tq->stopped = false; 118d1a890faSShreyas Bhatewara netif_wake_queue(adapter->netdev); 119d1a890faSShreyas Bhatewara } 120d1a890faSShreyas Bhatewara 121d1a890faSShreyas Bhatewara 122d1a890faSShreyas Bhatewara static void 123d1a890faSShreyas Bhatewara vmxnet3_tq_stop(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 124d1a890faSShreyas Bhatewara { 125d1a890faSShreyas Bhatewara tq->stopped = true; 126d1a890faSShreyas Bhatewara tq->num_stop++; 127d1a890faSShreyas Bhatewara netif_stop_queue(adapter->netdev); 128d1a890faSShreyas Bhatewara } 129d1a890faSShreyas Bhatewara 130d1a890faSShreyas Bhatewara 131d1a890faSShreyas Bhatewara /* 132d1a890faSShreyas Bhatewara * Check the link state. This may start or stop the tx queue. 133d1a890faSShreyas Bhatewara */ 134d1a890faSShreyas Bhatewara static void 1354a1745fcSShreyas Bhatewara vmxnet3_check_link(struct vmxnet3_adapter *adapter, bool affectTxQueue) 136d1a890faSShreyas Bhatewara { 137d1a890faSShreyas Bhatewara u32 ret; 138d1a890faSShreyas Bhatewara 139d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK); 140d1a890faSShreyas Bhatewara ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 141d1a890faSShreyas Bhatewara adapter->link_speed = ret >> 16; 142d1a890faSShreyas Bhatewara if (ret & 1) { /* Link is up. */ 143d1a890faSShreyas Bhatewara printk(KERN_INFO "%s: NIC Link is Up %d Mbps\n", 144d1a890faSShreyas Bhatewara adapter->netdev->name, adapter->link_speed); 145d1a890faSShreyas Bhatewara if (!netif_carrier_ok(adapter->netdev)) 146d1a890faSShreyas Bhatewara netif_carrier_on(adapter->netdev); 147d1a890faSShreyas Bhatewara 1484a1745fcSShreyas Bhatewara if (affectTxQueue) 149d1a890faSShreyas Bhatewara vmxnet3_tq_start(&adapter->tx_queue, adapter); 150d1a890faSShreyas Bhatewara } else { 151d1a890faSShreyas Bhatewara printk(KERN_INFO "%s: NIC Link is Down\n", 152d1a890faSShreyas Bhatewara adapter->netdev->name); 153d1a890faSShreyas Bhatewara if (netif_carrier_ok(adapter->netdev)) 154d1a890faSShreyas Bhatewara netif_carrier_off(adapter->netdev); 155d1a890faSShreyas Bhatewara 1564a1745fcSShreyas Bhatewara if (affectTxQueue) 157d1a890faSShreyas Bhatewara vmxnet3_tq_stop(&adapter->tx_queue, adapter); 158d1a890faSShreyas Bhatewara } 159d1a890faSShreyas Bhatewara } 160d1a890faSShreyas Bhatewara 161d1a890faSShreyas Bhatewara static void 162d1a890faSShreyas Bhatewara vmxnet3_process_events(struct vmxnet3_adapter *adapter) 163d1a890faSShreyas Bhatewara { 164115924b6SShreyas Bhatewara u32 events = le32_to_cpu(adapter->shared->ecr); 165d1a890faSShreyas Bhatewara if (!events) 166d1a890faSShreyas Bhatewara return; 167d1a890faSShreyas Bhatewara 168d1a890faSShreyas Bhatewara vmxnet3_ack_events(adapter, events); 169d1a890faSShreyas Bhatewara 170d1a890faSShreyas Bhatewara /* Check if link state has changed */ 171d1a890faSShreyas Bhatewara if (events & VMXNET3_ECR_LINK) 1724a1745fcSShreyas Bhatewara vmxnet3_check_link(adapter, true); 173d1a890faSShreyas Bhatewara 174d1a890faSShreyas Bhatewara /* Check if there is an error on xmit/recv queues */ 175d1a890faSShreyas Bhatewara if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) { 176d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 177d1a890faSShreyas Bhatewara VMXNET3_CMD_GET_QUEUE_STATUS); 178d1a890faSShreyas Bhatewara 179d1a890faSShreyas Bhatewara if (adapter->tqd_start->status.stopped) { 180d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: tq error 0x%x\n", 181d1a890faSShreyas Bhatewara adapter->netdev->name, 182115924b6SShreyas Bhatewara le32_to_cpu(adapter->tqd_start->status.error)); 183d1a890faSShreyas Bhatewara } 184d1a890faSShreyas Bhatewara if (adapter->rqd_start->status.stopped) { 185d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: rq error 0x%x\n", 186d1a890faSShreyas Bhatewara adapter->netdev->name, 187d1a890faSShreyas Bhatewara adapter->rqd_start->status.error); 188d1a890faSShreyas Bhatewara } 189d1a890faSShreyas Bhatewara 190d1a890faSShreyas Bhatewara schedule_work(&adapter->work); 191d1a890faSShreyas Bhatewara } 192d1a890faSShreyas Bhatewara } 193d1a890faSShreyas Bhatewara 194115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 195115924b6SShreyas Bhatewara /* 196115924b6SShreyas Bhatewara * The device expects the bitfields in shared structures to be written in 197115924b6SShreyas Bhatewara * little endian. When CPU is big endian, the following routines are used to 198115924b6SShreyas Bhatewara * correctly read and write into ABI. 199115924b6SShreyas Bhatewara * The general technique used here is : double word bitfields are defined in 200115924b6SShreyas Bhatewara * opposite order for big endian architecture. Then before reading them in 201115924b6SShreyas Bhatewara * driver the complete double word is translated using le32_to_cpu. Similarly 202115924b6SShreyas Bhatewara * After the driver writes into bitfields, cpu_to_le32 is used to translate the 203115924b6SShreyas Bhatewara * double words into required format. 204115924b6SShreyas Bhatewara * In order to avoid touching bits in shared structure more than once, temporary 205115924b6SShreyas Bhatewara * descriptors are used. These are passed as srcDesc to following functions. 206115924b6SShreyas Bhatewara */ 207115924b6SShreyas Bhatewara static void vmxnet3_RxDescToCPU(const struct Vmxnet3_RxDesc *srcDesc, 208115924b6SShreyas Bhatewara struct Vmxnet3_RxDesc *dstDesc) 209115924b6SShreyas Bhatewara { 210115924b6SShreyas Bhatewara u32 *src = (u32 *)srcDesc + 2; 211115924b6SShreyas Bhatewara u32 *dst = (u32 *)dstDesc + 2; 212115924b6SShreyas Bhatewara dstDesc->addr = le64_to_cpu(srcDesc->addr); 213115924b6SShreyas Bhatewara *dst = le32_to_cpu(*src); 214115924b6SShreyas Bhatewara dstDesc->ext1 = le32_to_cpu(srcDesc->ext1); 215115924b6SShreyas Bhatewara } 216115924b6SShreyas Bhatewara 217115924b6SShreyas Bhatewara static void vmxnet3_TxDescToLe(const struct Vmxnet3_TxDesc *srcDesc, 218115924b6SShreyas Bhatewara struct Vmxnet3_TxDesc *dstDesc) 219115924b6SShreyas Bhatewara { 220115924b6SShreyas Bhatewara int i; 221115924b6SShreyas Bhatewara u32 *src = (u32 *)(srcDesc + 1); 222115924b6SShreyas Bhatewara u32 *dst = (u32 *)(dstDesc + 1); 223115924b6SShreyas Bhatewara 224115924b6SShreyas Bhatewara /* Working backwards so that the gen bit is set at the end. */ 225115924b6SShreyas Bhatewara for (i = 2; i > 0; i--) { 226115924b6SShreyas Bhatewara src--; 227115924b6SShreyas Bhatewara dst--; 228115924b6SShreyas Bhatewara *dst = cpu_to_le32(*src); 229115924b6SShreyas Bhatewara } 230115924b6SShreyas Bhatewara } 231115924b6SShreyas Bhatewara 232115924b6SShreyas Bhatewara 233115924b6SShreyas Bhatewara static void vmxnet3_RxCompToCPU(const struct Vmxnet3_RxCompDesc *srcDesc, 234115924b6SShreyas Bhatewara struct Vmxnet3_RxCompDesc *dstDesc) 235115924b6SShreyas Bhatewara { 236115924b6SShreyas Bhatewara int i = 0; 237115924b6SShreyas Bhatewara u32 *src = (u32 *)srcDesc; 238115924b6SShreyas Bhatewara u32 *dst = (u32 *)dstDesc; 239115924b6SShreyas Bhatewara for (i = 0; i < sizeof(struct Vmxnet3_RxCompDesc) / sizeof(u32); i++) { 240115924b6SShreyas Bhatewara *dst = le32_to_cpu(*src); 241115924b6SShreyas Bhatewara src++; 242115924b6SShreyas Bhatewara dst++; 243115924b6SShreyas Bhatewara } 244115924b6SShreyas Bhatewara } 245115924b6SShreyas Bhatewara 246115924b6SShreyas Bhatewara 247115924b6SShreyas Bhatewara /* Used to read bitfield values from double words. */ 248115924b6SShreyas Bhatewara static u32 get_bitfield32(const __le32 *bitfield, u32 pos, u32 size) 249115924b6SShreyas Bhatewara { 250115924b6SShreyas Bhatewara u32 temp = le32_to_cpu(*bitfield); 251115924b6SShreyas Bhatewara u32 mask = ((1 << size) - 1) << pos; 252115924b6SShreyas Bhatewara temp &= mask; 253115924b6SShreyas Bhatewara temp >>= pos; 254115924b6SShreyas Bhatewara return temp; 255115924b6SShreyas Bhatewara } 256115924b6SShreyas Bhatewara 257115924b6SShreyas Bhatewara 258115924b6SShreyas Bhatewara 259115924b6SShreyas Bhatewara #endif /* __BIG_ENDIAN_BITFIELD */ 260115924b6SShreyas Bhatewara 261115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 262115924b6SShreyas Bhatewara 263115924b6SShreyas Bhatewara # define VMXNET3_TXDESC_GET_GEN(txdesc) get_bitfield32(((const __le32 *) \ 264115924b6SShreyas Bhatewara txdesc) + VMXNET3_TXD_GEN_DWORD_SHIFT, \ 265115924b6SShreyas Bhatewara VMXNET3_TXD_GEN_SHIFT, VMXNET3_TXD_GEN_SIZE) 266115924b6SShreyas Bhatewara # define VMXNET3_TXDESC_GET_EOP(txdesc) get_bitfield32(((const __le32 *) \ 267115924b6SShreyas Bhatewara txdesc) + VMXNET3_TXD_EOP_DWORD_SHIFT, \ 268115924b6SShreyas Bhatewara VMXNET3_TXD_EOP_SHIFT, VMXNET3_TXD_EOP_SIZE) 269115924b6SShreyas Bhatewara # define VMXNET3_TCD_GET_GEN(tcd) get_bitfield32(((const __le32 *)tcd) + \ 270115924b6SShreyas Bhatewara VMXNET3_TCD_GEN_DWORD_SHIFT, VMXNET3_TCD_GEN_SHIFT, \ 271115924b6SShreyas Bhatewara VMXNET3_TCD_GEN_SIZE) 272115924b6SShreyas Bhatewara # define VMXNET3_TCD_GET_TXIDX(tcd) get_bitfield32((const __le32 *)tcd, \ 273115924b6SShreyas Bhatewara VMXNET3_TCD_TXIDX_SHIFT, VMXNET3_TCD_TXIDX_SIZE) 274115924b6SShreyas Bhatewara # define vmxnet3_getRxComp(dstrcd, rcd, tmp) do { \ 275115924b6SShreyas Bhatewara (dstrcd) = (tmp); \ 276115924b6SShreyas Bhatewara vmxnet3_RxCompToCPU((rcd), (tmp)); \ 277115924b6SShreyas Bhatewara } while (0) 278115924b6SShreyas Bhatewara # define vmxnet3_getRxDesc(dstrxd, rxd, tmp) do { \ 279115924b6SShreyas Bhatewara (dstrxd) = (tmp); \ 280115924b6SShreyas Bhatewara vmxnet3_RxDescToCPU((rxd), (tmp)); \ 281115924b6SShreyas Bhatewara } while (0) 282115924b6SShreyas Bhatewara 283115924b6SShreyas Bhatewara #else 284115924b6SShreyas Bhatewara 285115924b6SShreyas Bhatewara # define VMXNET3_TXDESC_GET_GEN(txdesc) ((txdesc)->gen) 286115924b6SShreyas Bhatewara # define VMXNET3_TXDESC_GET_EOP(txdesc) ((txdesc)->eop) 287115924b6SShreyas Bhatewara # define VMXNET3_TCD_GET_GEN(tcd) ((tcd)->gen) 288115924b6SShreyas Bhatewara # define VMXNET3_TCD_GET_TXIDX(tcd) ((tcd)->txdIdx) 289115924b6SShreyas Bhatewara # define vmxnet3_getRxComp(dstrcd, rcd, tmp) (dstrcd) = (rcd) 290115924b6SShreyas Bhatewara # define vmxnet3_getRxDesc(dstrxd, rxd, tmp) (dstrxd) = (rxd) 291115924b6SShreyas Bhatewara 292115924b6SShreyas Bhatewara #endif /* __BIG_ENDIAN_BITFIELD */ 293115924b6SShreyas Bhatewara 294d1a890faSShreyas Bhatewara 295d1a890faSShreyas Bhatewara static void 296d1a890faSShreyas Bhatewara vmxnet3_unmap_tx_buf(struct vmxnet3_tx_buf_info *tbi, 297d1a890faSShreyas Bhatewara struct pci_dev *pdev) 298d1a890faSShreyas Bhatewara { 299d1a890faSShreyas Bhatewara if (tbi->map_type == VMXNET3_MAP_SINGLE) 300d1a890faSShreyas Bhatewara pci_unmap_single(pdev, tbi->dma_addr, tbi->len, 301d1a890faSShreyas Bhatewara PCI_DMA_TODEVICE); 302d1a890faSShreyas Bhatewara else if (tbi->map_type == VMXNET3_MAP_PAGE) 303d1a890faSShreyas Bhatewara pci_unmap_page(pdev, tbi->dma_addr, tbi->len, 304d1a890faSShreyas Bhatewara PCI_DMA_TODEVICE); 305d1a890faSShreyas Bhatewara else 306d1a890faSShreyas Bhatewara BUG_ON(tbi->map_type != VMXNET3_MAP_NONE); 307d1a890faSShreyas Bhatewara 308d1a890faSShreyas Bhatewara tbi->map_type = VMXNET3_MAP_NONE; /* to help debugging */ 309d1a890faSShreyas Bhatewara } 310d1a890faSShreyas Bhatewara 311d1a890faSShreyas Bhatewara 312d1a890faSShreyas Bhatewara static int 313d1a890faSShreyas Bhatewara vmxnet3_unmap_pkt(u32 eop_idx, struct vmxnet3_tx_queue *tq, 314d1a890faSShreyas Bhatewara struct pci_dev *pdev, struct vmxnet3_adapter *adapter) 315d1a890faSShreyas Bhatewara { 316d1a890faSShreyas Bhatewara struct sk_buff *skb; 317d1a890faSShreyas Bhatewara int entries = 0; 318d1a890faSShreyas Bhatewara 319d1a890faSShreyas Bhatewara /* no out of order completion */ 320d1a890faSShreyas Bhatewara BUG_ON(tq->buf_info[eop_idx].sop_idx != tq->tx_ring.next2comp); 321115924b6SShreyas Bhatewara BUG_ON(VMXNET3_TXDESC_GET_EOP(&(tq->tx_ring.base[eop_idx].txd)) != 1); 322d1a890faSShreyas Bhatewara 323d1a890faSShreyas Bhatewara skb = tq->buf_info[eop_idx].skb; 324d1a890faSShreyas Bhatewara BUG_ON(skb == NULL); 325d1a890faSShreyas Bhatewara tq->buf_info[eop_idx].skb = NULL; 326d1a890faSShreyas Bhatewara 327d1a890faSShreyas Bhatewara VMXNET3_INC_RING_IDX_ONLY(eop_idx, tq->tx_ring.size); 328d1a890faSShreyas Bhatewara 329d1a890faSShreyas Bhatewara while (tq->tx_ring.next2comp != eop_idx) { 330d1a890faSShreyas Bhatewara vmxnet3_unmap_tx_buf(tq->buf_info + tq->tx_ring.next2comp, 331d1a890faSShreyas Bhatewara pdev); 332d1a890faSShreyas Bhatewara 333d1a890faSShreyas Bhatewara /* update next2comp w/o tx_lock. Since we are marking more, 334d1a890faSShreyas Bhatewara * instead of less, tx ring entries avail, the worst case is 335d1a890faSShreyas Bhatewara * that the tx routine incorrectly re-queues a pkt due to 336d1a890faSShreyas Bhatewara * insufficient tx ring entries. 337d1a890faSShreyas Bhatewara */ 338d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring); 339d1a890faSShreyas Bhatewara entries++; 340d1a890faSShreyas Bhatewara } 341d1a890faSShreyas Bhatewara 342d1a890faSShreyas Bhatewara dev_kfree_skb_any(skb); 343d1a890faSShreyas Bhatewara return entries; 344d1a890faSShreyas Bhatewara } 345d1a890faSShreyas Bhatewara 346d1a890faSShreyas Bhatewara 347d1a890faSShreyas Bhatewara static int 348d1a890faSShreyas Bhatewara vmxnet3_tq_tx_complete(struct vmxnet3_tx_queue *tq, 349d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 350d1a890faSShreyas Bhatewara { 351d1a890faSShreyas Bhatewara int completed = 0; 352d1a890faSShreyas Bhatewara union Vmxnet3_GenericDesc *gdesc; 353d1a890faSShreyas Bhatewara 354d1a890faSShreyas Bhatewara gdesc = tq->comp_ring.base + tq->comp_ring.next2proc; 355115924b6SShreyas Bhatewara while (VMXNET3_TCD_GET_GEN(&gdesc->tcd) == tq->comp_ring.gen) { 356115924b6SShreyas Bhatewara completed += vmxnet3_unmap_pkt(VMXNET3_TCD_GET_TXIDX( 357115924b6SShreyas Bhatewara &gdesc->tcd), tq, adapter->pdev, 358115924b6SShreyas Bhatewara adapter); 359d1a890faSShreyas Bhatewara 360d1a890faSShreyas Bhatewara vmxnet3_comp_ring_adv_next2proc(&tq->comp_ring); 361d1a890faSShreyas Bhatewara gdesc = tq->comp_ring.base + tq->comp_ring.next2proc; 362d1a890faSShreyas Bhatewara } 363d1a890faSShreyas Bhatewara 364d1a890faSShreyas Bhatewara if (completed) { 365d1a890faSShreyas Bhatewara spin_lock(&tq->tx_lock); 366d1a890faSShreyas Bhatewara if (unlikely(vmxnet3_tq_stopped(tq, adapter) && 367d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_desc_avail(&tq->tx_ring) > 368d1a890faSShreyas Bhatewara VMXNET3_WAKE_QUEUE_THRESHOLD(tq) && 369d1a890faSShreyas Bhatewara netif_carrier_ok(adapter->netdev))) { 370d1a890faSShreyas Bhatewara vmxnet3_tq_wake(tq, adapter); 371d1a890faSShreyas Bhatewara } 372d1a890faSShreyas Bhatewara spin_unlock(&tq->tx_lock); 373d1a890faSShreyas Bhatewara } 374d1a890faSShreyas Bhatewara return completed; 375d1a890faSShreyas Bhatewara } 376d1a890faSShreyas Bhatewara 377d1a890faSShreyas Bhatewara 378d1a890faSShreyas Bhatewara static void 379d1a890faSShreyas Bhatewara vmxnet3_tq_cleanup(struct vmxnet3_tx_queue *tq, 380d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 381d1a890faSShreyas Bhatewara { 382d1a890faSShreyas Bhatewara int i; 383d1a890faSShreyas Bhatewara 384d1a890faSShreyas Bhatewara while (tq->tx_ring.next2comp != tq->tx_ring.next2fill) { 385d1a890faSShreyas Bhatewara struct vmxnet3_tx_buf_info *tbi; 386d1a890faSShreyas Bhatewara union Vmxnet3_GenericDesc *gdesc; 387d1a890faSShreyas Bhatewara 388d1a890faSShreyas Bhatewara tbi = tq->buf_info + tq->tx_ring.next2comp; 389d1a890faSShreyas Bhatewara gdesc = tq->tx_ring.base + tq->tx_ring.next2comp; 390d1a890faSShreyas Bhatewara 391d1a890faSShreyas Bhatewara vmxnet3_unmap_tx_buf(tbi, adapter->pdev); 392d1a890faSShreyas Bhatewara if (tbi->skb) { 393d1a890faSShreyas Bhatewara dev_kfree_skb_any(tbi->skb); 394d1a890faSShreyas Bhatewara tbi->skb = NULL; 395d1a890faSShreyas Bhatewara } 396d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring); 397d1a890faSShreyas Bhatewara } 398d1a890faSShreyas Bhatewara 399d1a890faSShreyas Bhatewara /* sanity check, verify all buffers are indeed unmapped and freed */ 400d1a890faSShreyas Bhatewara for (i = 0; i < tq->tx_ring.size; i++) { 401d1a890faSShreyas Bhatewara BUG_ON(tq->buf_info[i].skb != NULL || 402d1a890faSShreyas Bhatewara tq->buf_info[i].map_type != VMXNET3_MAP_NONE); 403d1a890faSShreyas Bhatewara } 404d1a890faSShreyas Bhatewara 405d1a890faSShreyas Bhatewara tq->tx_ring.gen = VMXNET3_INIT_GEN; 406d1a890faSShreyas Bhatewara tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0; 407d1a890faSShreyas Bhatewara 408d1a890faSShreyas Bhatewara tq->comp_ring.gen = VMXNET3_INIT_GEN; 409d1a890faSShreyas Bhatewara tq->comp_ring.next2proc = 0; 410d1a890faSShreyas Bhatewara } 411d1a890faSShreyas Bhatewara 412d1a890faSShreyas Bhatewara 413d1a890faSShreyas Bhatewara void 414d1a890faSShreyas Bhatewara vmxnet3_tq_destroy(struct vmxnet3_tx_queue *tq, 415d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 416d1a890faSShreyas Bhatewara { 417d1a890faSShreyas Bhatewara if (tq->tx_ring.base) { 418d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, tq->tx_ring.size * 419d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxDesc), 420d1a890faSShreyas Bhatewara tq->tx_ring.base, tq->tx_ring.basePA); 421d1a890faSShreyas Bhatewara tq->tx_ring.base = NULL; 422d1a890faSShreyas Bhatewara } 423d1a890faSShreyas Bhatewara if (tq->data_ring.base) { 424d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, tq->data_ring.size * 425d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxDataDesc), 426d1a890faSShreyas Bhatewara tq->data_ring.base, tq->data_ring.basePA); 427d1a890faSShreyas Bhatewara tq->data_ring.base = NULL; 428d1a890faSShreyas Bhatewara } 429d1a890faSShreyas Bhatewara if (tq->comp_ring.base) { 430d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, tq->comp_ring.size * 431d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxCompDesc), 432d1a890faSShreyas Bhatewara tq->comp_ring.base, tq->comp_ring.basePA); 433d1a890faSShreyas Bhatewara tq->comp_ring.base = NULL; 434d1a890faSShreyas Bhatewara } 435d1a890faSShreyas Bhatewara kfree(tq->buf_info); 436d1a890faSShreyas Bhatewara tq->buf_info = NULL; 437d1a890faSShreyas Bhatewara } 438d1a890faSShreyas Bhatewara 439d1a890faSShreyas Bhatewara 440d1a890faSShreyas Bhatewara static void 441d1a890faSShreyas Bhatewara vmxnet3_tq_init(struct vmxnet3_tx_queue *tq, 442d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 443d1a890faSShreyas Bhatewara { 444d1a890faSShreyas Bhatewara int i; 445d1a890faSShreyas Bhatewara 446d1a890faSShreyas Bhatewara /* reset the tx ring contents to 0 and reset the tx ring states */ 447d1a890faSShreyas Bhatewara memset(tq->tx_ring.base, 0, tq->tx_ring.size * 448d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxDesc)); 449d1a890faSShreyas Bhatewara tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0; 450d1a890faSShreyas Bhatewara tq->tx_ring.gen = VMXNET3_INIT_GEN; 451d1a890faSShreyas Bhatewara 452d1a890faSShreyas Bhatewara memset(tq->data_ring.base, 0, tq->data_ring.size * 453d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxDataDesc)); 454d1a890faSShreyas Bhatewara 455d1a890faSShreyas Bhatewara /* reset the tx comp ring contents to 0 and reset comp ring states */ 456d1a890faSShreyas Bhatewara memset(tq->comp_ring.base, 0, tq->comp_ring.size * 457d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxCompDesc)); 458d1a890faSShreyas Bhatewara tq->comp_ring.next2proc = 0; 459d1a890faSShreyas Bhatewara tq->comp_ring.gen = VMXNET3_INIT_GEN; 460d1a890faSShreyas Bhatewara 461d1a890faSShreyas Bhatewara /* reset the bookkeeping data */ 462d1a890faSShreyas Bhatewara memset(tq->buf_info, 0, sizeof(tq->buf_info[0]) * tq->tx_ring.size); 463d1a890faSShreyas Bhatewara for (i = 0; i < tq->tx_ring.size; i++) 464d1a890faSShreyas Bhatewara tq->buf_info[i].map_type = VMXNET3_MAP_NONE; 465d1a890faSShreyas Bhatewara 466d1a890faSShreyas Bhatewara /* stats are not reset */ 467d1a890faSShreyas Bhatewara } 468d1a890faSShreyas Bhatewara 469d1a890faSShreyas Bhatewara 470d1a890faSShreyas Bhatewara static int 471d1a890faSShreyas Bhatewara vmxnet3_tq_create(struct vmxnet3_tx_queue *tq, 472d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 473d1a890faSShreyas Bhatewara { 474d1a890faSShreyas Bhatewara BUG_ON(tq->tx_ring.base || tq->data_ring.base || 475d1a890faSShreyas Bhatewara tq->comp_ring.base || tq->buf_info); 476d1a890faSShreyas Bhatewara 477d1a890faSShreyas Bhatewara tq->tx_ring.base = pci_alloc_consistent(adapter->pdev, tq->tx_ring.size 478d1a890faSShreyas Bhatewara * sizeof(struct Vmxnet3_TxDesc), 479d1a890faSShreyas Bhatewara &tq->tx_ring.basePA); 480d1a890faSShreyas Bhatewara if (!tq->tx_ring.base) { 481d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate tx ring\n", 482d1a890faSShreyas Bhatewara adapter->netdev->name); 483d1a890faSShreyas Bhatewara goto err; 484d1a890faSShreyas Bhatewara } 485d1a890faSShreyas Bhatewara 486d1a890faSShreyas Bhatewara tq->data_ring.base = pci_alloc_consistent(adapter->pdev, 487d1a890faSShreyas Bhatewara tq->data_ring.size * 488d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxDataDesc), 489d1a890faSShreyas Bhatewara &tq->data_ring.basePA); 490d1a890faSShreyas Bhatewara if (!tq->data_ring.base) { 491d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate data ring\n", 492d1a890faSShreyas Bhatewara adapter->netdev->name); 493d1a890faSShreyas Bhatewara goto err; 494d1a890faSShreyas Bhatewara } 495d1a890faSShreyas Bhatewara 496d1a890faSShreyas Bhatewara tq->comp_ring.base = pci_alloc_consistent(adapter->pdev, 497d1a890faSShreyas Bhatewara tq->comp_ring.size * 498d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxCompDesc), 499d1a890faSShreyas Bhatewara &tq->comp_ring.basePA); 500d1a890faSShreyas Bhatewara if (!tq->comp_ring.base) { 501d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate tx comp ring\n", 502d1a890faSShreyas Bhatewara adapter->netdev->name); 503d1a890faSShreyas Bhatewara goto err; 504d1a890faSShreyas Bhatewara } 505d1a890faSShreyas Bhatewara 506d1a890faSShreyas Bhatewara tq->buf_info = kcalloc(tq->tx_ring.size, sizeof(tq->buf_info[0]), 507d1a890faSShreyas Bhatewara GFP_KERNEL); 508d1a890faSShreyas Bhatewara if (!tq->buf_info) { 509d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate tx bufinfo\n", 510d1a890faSShreyas Bhatewara adapter->netdev->name); 511d1a890faSShreyas Bhatewara goto err; 512d1a890faSShreyas Bhatewara } 513d1a890faSShreyas Bhatewara 514d1a890faSShreyas Bhatewara return 0; 515d1a890faSShreyas Bhatewara 516d1a890faSShreyas Bhatewara err: 517d1a890faSShreyas Bhatewara vmxnet3_tq_destroy(tq, adapter); 518d1a890faSShreyas Bhatewara return -ENOMEM; 519d1a890faSShreyas Bhatewara } 520d1a890faSShreyas Bhatewara 521d1a890faSShreyas Bhatewara 522d1a890faSShreyas Bhatewara /* 523d1a890faSShreyas Bhatewara * starting from ring->next2fill, allocate rx buffers for the given ring 524d1a890faSShreyas Bhatewara * of the rx queue and update the rx desc. stop after @num_to_alloc buffers 525d1a890faSShreyas Bhatewara * are allocated or allocation fails 526d1a890faSShreyas Bhatewara */ 527d1a890faSShreyas Bhatewara 528d1a890faSShreyas Bhatewara static int 529d1a890faSShreyas Bhatewara vmxnet3_rq_alloc_rx_buf(struct vmxnet3_rx_queue *rq, u32 ring_idx, 530d1a890faSShreyas Bhatewara int num_to_alloc, struct vmxnet3_adapter *adapter) 531d1a890faSShreyas Bhatewara { 532d1a890faSShreyas Bhatewara int num_allocated = 0; 533d1a890faSShreyas Bhatewara struct vmxnet3_rx_buf_info *rbi_base = rq->buf_info[ring_idx]; 534d1a890faSShreyas Bhatewara struct vmxnet3_cmd_ring *ring = &rq->rx_ring[ring_idx]; 535d1a890faSShreyas Bhatewara u32 val; 536d1a890faSShreyas Bhatewara 537d1a890faSShreyas Bhatewara while (num_allocated < num_to_alloc) { 538d1a890faSShreyas Bhatewara struct vmxnet3_rx_buf_info *rbi; 539d1a890faSShreyas Bhatewara union Vmxnet3_GenericDesc *gd; 540d1a890faSShreyas Bhatewara 541d1a890faSShreyas Bhatewara rbi = rbi_base + ring->next2fill; 542d1a890faSShreyas Bhatewara gd = ring->base + ring->next2fill; 543d1a890faSShreyas Bhatewara 544d1a890faSShreyas Bhatewara if (rbi->buf_type == VMXNET3_RX_BUF_SKB) { 545d1a890faSShreyas Bhatewara if (rbi->skb == NULL) { 546d1a890faSShreyas Bhatewara rbi->skb = dev_alloc_skb(rbi->len + 547d1a890faSShreyas Bhatewara NET_IP_ALIGN); 548d1a890faSShreyas Bhatewara if (unlikely(rbi->skb == NULL)) { 549d1a890faSShreyas Bhatewara rq->stats.rx_buf_alloc_failure++; 550d1a890faSShreyas Bhatewara break; 551d1a890faSShreyas Bhatewara } 552d1a890faSShreyas Bhatewara rbi->skb->dev = adapter->netdev; 553d1a890faSShreyas Bhatewara 554d1a890faSShreyas Bhatewara skb_reserve(rbi->skb, NET_IP_ALIGN); 555d1a890faSShreyas Bhatewara rbi->dma_addr = pci_map_single(adapter->pdev, 556d1a890faSShreyas Bhatewara rbi->skb->data, rbi->len, 557d1a890faSShreyas Bhatewara PCI_DMA_FROMDEVICE); 558d1a890faSShreyas Bhatewara } else { 559d1a890faSShreyas Bhatewara /* rx buffer skipped by the device */ 560d1a890faSShreyas Bhatewara } 561d1a890faSShreyas Bhatewara val = VMXNET3_RXD_BTYPE_HEAD << VMXNET3_RXD_BTYPE_SHIFT; 562d1a890faSShreyas Bhatewara } else { 563d1a890faSShreyas Bhatewara BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE || 564d1a890faSShreyas Bhatewara rbi->len != PAGE_SIZE); 565d1a890faSShreyas Bhatewara 566d1a890faSShreyas Bhatewara if (rbi->page == NULL) { 567d1a890faSShreyas Bhatewara rbi->page = alloc_page(GFP_ATOMIC); 568d1a890faSShreyas Bhatewara if (unlikely(rbi->page == NULL)) { 569d1a890faSShreyas Bhatewara rq->stats.rx_buf_alloc_failure++; 570d1a890faSShreyas Bhatewara break; 571d1a890faSShreyas Bhatewara } 572d1a890faSShreyas Bhatewara rbi->dma_addr = pci_map_page(adapter->pdev, 573d1a890faSShreyas Bhatewara rbi->page, 0, PAGE_SIZE, 574d1a890faSShreyas Bhatewara PCI_DMA_FROMDEVICE); 575d1a890faSShreyas Bhatewara } else { 576d1a890faSShreyas Bhatewara /* rx buffers skipped by the device */ 577d1a890faSShreyas Bhatewara } 578d1a890faSShreyas Bhatewara val = VMXNET3_RXD_BTYPE_BODY << VMXNET3_RXD_BTYPE_SHIFT; 579d1a890faSShreyas Bhatewara } 580d1a890faSShreyas Bhatewara 581d1a890faSShreyas Bhatewara BUG_ON(rbi->dma_addr == 0); 582115924b6SShreyas Bhatewara gd->rxd.addr = cpu_to_le64(rbi->dma_addr); 583115924b6SShreyas Bhatewara gd->dword[2] = cpu_to_le32((ring->gen << VMXNET3_RXD_GEN_SHIFT) 584115924b6SShreyas Bhatewara | val | rbi->len); 585d1a890faSShreyas Bhatewara 586d1a890faSShreyas Bhatewara num_allocated++; 587d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_adv_next2fill(ring); 588d1a890faSShreyas Bhatewara } 589d1a890faSShreyas Bhatewara rq->uncommitted[ring_idx] += num_allocated; 590d1a890faSShreyas Bhatewara 591f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 592f6965582SRandy Dunlap "alloc_rx_buf: %d allocated, next2fill %u, next2comp " 593d1a890faSShreyas Bhatewara "%u, uncommited %u\n", num_allocated, ring->next2fill, 594d1a890faSShreyas Bhatewara ring->next2comp, rq->uncommitted[ring_idx]); 595d1a890faSShreyas Bhatewara 596d1a890faSShreyas Bhatewara /* so that the device can distinguish a full ring and an empty ring */ 597d1a890faSShreyas Bhatewara BUG_ON(num_allocated != 0 && ring->next2fill == ring->next2comp); 598d1a890faSShreyas Bhatewara 599d1a890faSShreyas Bhatewara return num_allocated; 600d1a890faSShreyas Bhatewara } 601d1a890faSShreyas Bhatewara 602d1a890faSShreyas Bhatewara 603d1a890faSShreyas Bhatewara static void 604d1a890faSShreyas Bhatewara vmxnet3_append_frag(struct sk_buff *skb, struct Vmxnet3_RxCompDesc *rcd, 605d1a890faSShreyas Bhatewara struct vmxnet3_rx_buf_info *rbi) 606d1a890faSShreyas Bhatewara { 607d1a890faSShreyas Bhatewara struct skb_frag_struct *frag = skb_shinfo(skb)->frags + 608d1a890faSShreyas Bhatewara skb_shinfo(skb)->nr_frags; 609d1a890faSShreyas Bhatewara 610d1a890faSShreyas Bhatewara BUG_ON(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS); 611d1a890faSShreyas Bhatewara 612d1a890faSShreyas Bhatewara frag->page = rbi->page; 613d1a890faSShreyas Bhatewara frag->page_offset = 0; 614d1a890faSShreyas Bhatewara frag->size = rcd->len; 615d1a890faSShreyas Bhatewara skb->data_len += frag->size; 616d1a890faSShreyas Bhatewara skb_shinfo(skb)->nr_frags++; 617d1a890faSShreyas Bhatewara } 618d1a890faSShreyas Bhatewara 619d1a890faSShreyas Bhatewara 620d1a890faSShreyas Bhatewara static void 621d1a890faSShreyas Bhatewara vmxnet3_map_pkt(struct sk_buff *skb, struct vmxnet3_tx_ctx *ctx, 622d1a890faSShreyas Bhatewara struct vmxnet3_tx_queue *tq, struct pci_dev *pdev, 623d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 624d1a890faSShreyas Bhatewara { 625d1a890faSShreyas Bhatewara u32 dw2, len; 626d1a890faSShreyas Bhatewara unsigned long buf_offset; 627d1a890faSShreyas Bhatewara int i; 628d1a890faSShreyas Bhatewara union Vmxnet3_GenericDesc *gdesc; 629d1a890faSShreyas Bhatewara struct vmxnet3_tx_buf_info *tbi = NULL; 630d1a890faSShreyas Bhatewara 631d1a890faSShreyas Bhatewara BUG_ON(ctx->copy_size > skb_headlen(skb)); 632d1a890faSShreyas Bhatewara 633d1a890faSShreyas Bhatewara /* use the previous gen bit for the SOP desc */ 634d1a890faSShreyas Bhatewara dw2 = (tq->tx_ring.gen ^ 0x1) << VMXNET3_TXD_GEN_SHIFT; 635d1a890faSShreyas Bhatewara 636d1a890faSShreyas Bhatewara ctx->sop_txd = tq->tx_ring.base + tq->tx_ring.next2fill; 637d1a890faSShreyas Bhatewara gdesc = ctx->sop_txd; /* both loops below can be skipped */ 638d1a890faSShreyas Bhatewara 639d1a890faSShreyas Bhatewara /* no need to map the buffer if headers are copied */ 640d1a890faSShreyas Bhatewara if (ctx->copy_size) { 641115924b6SShreyas Bhatewara ctx->sop_txd->txd.addr = cpu_to_le64(tq->data_ring.basePA + 642d1a890faSShreyas Bhatewara tq->tx_ring.next2fill * 643115924b6SShreyas Bhatewara sizeof(struct Vmxnet3_TxDataDesc)); 644115924b6SShreyas Bhatewara ctx->sop_txd->dword[2] = cpu_to_le32(dw2 | ctx->copy_size); 645d1a890faSShreyas Bhatewara ctx->sop_txd->dword[3] = 0; 646d1a890faSShreyas Bhatewara 647d1a890faSShreyas Bhatewara tbi = tq->buf_info + tq->tx_ring.next2fill; 648d1a890faSShreyas Bhatewara tbi->map_type = VMXNET3_MAP_NONE; 649d1a890faSShreyas Bhatewara 650f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 651f6965582SRandy Dunlap "txd[%u]: 0x%Lx 0x%x 0x%x\n", 652115924b6SShreyas Bhatewara tq->tx_ring.next2fill, 653115924b6SShreyas Bhatewara le64_to_cpu(ctx->sop_txd->txd.addr), 654d1a890faSShreyas Bhatewara ctx->sop_txd->dword[2], ctx->sop_txd->dword[3]); 655d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); 656d1a890faSShreyas Bhatewara 657d1a890faSShreyas Bhatewara /* use the right gen for non-SOP desc */ 658d1a890faSShreyas Bhatewara dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; 659d1a890faSShreyas Bhatewara } 660d1a890faSShreyas Bhatewara 661d1a890faSShreyas Bhatewara /* linear part can use multiple tx desc if it's big */ 662d1a890faSShreyas Bhatewara len = skb_headlen(skb) - ctx->copy_size; 663d1a890faSShreyas Bhatewara buf_offset = ctx->copy_size; 664d1a890faSShreyas Bhatewara while (len) { 665d1a890faSShreyas Bhatewara u32 buf_size; 666d1a890faSShreyas Bhatewara 667d1a890faSShreyas Bhatewara buf_size = len > VMXNET3_MAX_TX_BUF_SIZE ? 668d1a890faSShreyas Bhatewara VMXNET3_MAX_TX_BUF_SIZE : len; 669d1a890faSShreyas Bhatewara 670d1a890faSShreyas Bhatewara tbi = tq->buf_info + tq->tx_ring.next2fill; 671d1a890faSShreyas Bhatewara tbi->map_type = VMXNET3_MAP_SINGLE; 672d1a890faSShreyas Bhatewara tbi->dma_addr = pci_map_single(adapter->pdev, 673d1a890faSShreyas Bhatewara skb->data + buf_offset, buf_size, 674d1a890faSShreyas Bhatewara PCI_DMA_TODEVICE); 675d1a890faSShreyas Bhatewara 676d1a890faSShreyas Bhatewara tbi->len = buf_size; /* this automatically convert 2^14 to 0 */ 677d1a890faSShreyas Bhatewara 678d1a890faSShreyas Bhatewara gdesc = tq->tx_ring.base + tq->tx_ring.next2fill; 679d1a890faSShreyas Bhatewara BUG_ON(gdesc->txd.gen == tq->tx_ring.gen); 680d1a890faSShreyas Bhatewara 681115924b6SShreyas Bhatewara gdesc->txd.addr = cpu_to_le64(tbi->dma_addr); 682115924b6SShreyas Bhatewara gdesc->dword[2] = cpu_to_le32(dw2 | buf_size); 683d1a890faSShreyas Bhatewara gdesc->dword[3] = 0; 684d1a890faSShreyas Bhatewara 685f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 686f6965582SRandy Dunlap "txd[%u]: 0x%Lx 0x%x 0x%x\n", 687115924b6SShreyas Bhatewara tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr), 688115924b6SShreyas Bhatewara le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]); 689d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); 690d1a890faSShreyas Bhatewara dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; 691d1a890faSShreyas Bhatewara 692d1a890faSShreyas Bhatewara len -= buf_size; 693d1a890faSShreyas Bhatewara buf_offset += buf_size; 694d1a890faSShreyas Bhatewara } 695d1a890faSShreyas Bhatewara 696d1a890faSShreyas Bhatewara for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 697d1a890faSShreyas Bhatewara struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i]; 698d1a890faSShreyas Bhatewara 699d1a890faSShreyas Bhatewara tbi = tq->buf_info + tq->tx_ring.next2fill; 700d1a890faSShreyas Bhatewara tbi->map_type = VMXNET3_MAP_PAGE; 701d1a890faSShreyas Bhatewara tbi->dma_addr = pci_map_page(adapter->pdev, frag->page, 702d1a890faSShreyas Bhatewara frag->page_offset, frag->size, 703d1a890faSShreyas Bhatewara PCI_DMA_TODEVICE); 704d1a890faSShreyas Bhatewara 705d1a890faSShreyas Bhatewara tbi->len = frag->size; 706d1a890faSShreyas Bhatewara 707d1a890faSShreyas Bhatewara gdesc = tq->tx_ring.base + tq->tx_ring.next2fill; 708d1a890faSShreyas Bhatewara BUG_ON(gdesc->txd.gen == tq->tx_ring.gen); 709d1a890faSShreyas Bhatewara 710115924b6SShreyas Bhatewara gdesc->txd.addr = cpu_to_le64(tbi->dma_addr); 711115924b6SShreyas Bhatewara gdesc->dword[2] = cpu_to_le32(dw2 | frag->size); 712d1a890faSShreyas Bhatewara gdesc->dword[3] = 0; 713d1a890faSShreyas Bhatewara 714f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 715f6965582SRandy Dunlap "txd[%u]: 0x%llu %u %u\n", 716115924b6SShreyas Bhatewara tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr), 717115924b6SShreyas Bhatewara le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]); 718d1a890faSShreyas Bhatewara vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); 719d1a890faSShreyas Bhatewara dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; 720d1a890faSShreyas Bhatewara } 721d1a890faSShreyas Bhatewara 722d1a890faSShreyas Bhatewara ctx->eop_txd = gdesc; 723d1a890faSShreyas Bhatewara 724d1a890faSShreyas Bhatewara /* set the last buf_info for the pkt */ 725d1a890faSShreyas Bhatewara tbi->skb = skb; 726d1a890faSShreyas Bhatewara tbi->sop_idx = ctx->sop_txd - tq->tx_ring.base; 727d1a890faSShreyas Bhatewara } 728d1a890faSShreyas Bhatewara 729d1a890faSShreyas Bhatewara 730d1a890faSShreyas Bhatewara /* 731d1a890faSShreyas Bhatewara * parse and copy relevant protocol headers: 732d1a890faSShreyas Bhatewara * For a tso pkt, relevant headers are L2/3/4 including options 733d1a890faSShreyas Bhatewara * For a pkt requesting csum offloading, they are L2/3 and may include L4 734d1a890faSShreyas Bhatewara * if it's a TCP/UDP pkt 735d1a890faSShreyas Bhatewara * 736d1a890faSShreyas Bhatewara * Returns: 737d1a890faSShreyas Bhatewara * -1: error happens during parsing 738d1a890faSShreyas Bhatewara * 0: protocol headers parsed, but too big to be copied 739d1a890faSShreyas Bhatewara * 1: protocol headers parsed and copied 740d1a890faSShreyas Bhatewara * 741d1a890faSShreyas Bhatewara * Other effects: 742d1a890faSShreyas Bhatewara * 1. related *ctx fields are updated. 743d1a890faSShreyas Bhatewara * 2. ctx->copy_size is # of bytes copied 744d1a890faSShreyas Bhatewara * 3. the portion copied is guaranteed to be in the linear part 745d1a890faSShreyas Bhatewara * 746d1a890faSShreyas Bhatewara */ 747d1a890faSShreyas Bhatewara static int 748d1a890faSShreyas Bhatewara vmxnet3_parse_and_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq, 749d1a890faSShreyas Bhatewara struct vmxnet3_tx_ctx *ctx, 750d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 751d1a890faSShreyas Bhatewara { 752d1a890faSShreyas Bhatewara struct Vmxnet3_TxDataDesc *tdd; 753d1a890faSShreyas Bhatewara 754d1a890faSShreyas Bhatewara if (ctx->mss) { 755d1a890faSShreyas Bhatewara ctx->eth_ip_hdr_size = skb_transport_offset(skb); 756d1a890faSShreyas Bhatewara ctx->l4_hdr_size = ((struct tcphdr *) 757d1a890faSShreyas Bhatewara skb_transport_header(skb))->doff * 4; 758d1a890faSShreyas Bhatewara ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size; 759d1a890faSShreyas Bhatewara } else { 760d1a890faSShreyas Bhatewara unsigned int pull_size; 761d1a890faSShreyas Bhatewara 762d1a890faSShreyas Bhatewara if (skb->ip_summed == CHECKSUM_PARTIAL) { 763d1a890faSShreyas Bhatewara ctx->eth_ip_hdr_size = skb_transport_offset(skb); 764d1a890faSShreyas Bhatewara 765d1a890faSShreyas Bhatewara if (ctx->ipv4) { 766d1a890faSShreyas Bhatewara struct iphdr *iph = (struct iphdr *) 767d1a890faSShreyas Bhatewara skb_network_header(skb); 768d1a890faSShreyas Bhatewara if (iph->protocol == IPPROTO_TCP) { 769d1a890faSShreyas Bhatewara pull_size = ctx->eth_ip_hdr_size + 770d1a890faSShreyas Bhatewara sizeof(struct tcphdr); 771d1a890faSShreyas Bhatewara 772d1a890faSShreyas Bhatewara if (unlikely(!pskb_may_pull(skb, 773d1a890faSShreyas Bhatewara pull_size))) { 774d1a890faSShreyas Bhatewara goto err; 775d1a890faSShreyas Bhatewara } 776d1a890faSShreyas Bhatewara ctx->l4_hdr_size = ((struct tcphdr *) 777d1a890faSShreyas Bhatewara skb_transport_header(skb))->doff * 4; 778d1a890faSShreyas Bhatewara } else if (iph->protocol == IPPROTO_UDP) { 779d1a890faSShreyas Bhatewara ctx->l4_hdr_size = 780d1a890faSShreyas Bhatewara sizeof(struct udphdr); 781d1a890faSShreyas Bhatewara } else { 782d1a890faSShreyas Bhatewara ctx->l4_hdr_size = 0; 783d1a890faSShreyas Bhatewara } 784d1a890faSShreyas Bhatewara } else { 785d1a890faSShreyas Bhatewara /* for simplicity, don't copy L4 headers */ 786d1a890faSShreyas Bhatewara ctx->l4_hdr_size = 0; 787d1a890faSShreyas Bhatewara } 788d1a890faSShreyas Bhatewara ctx->copy_size = ctx->eth_ip_hdr_size + 789d1a890faSShreyas Bhatewara ctx->l4_hdr_size; 790d1a890faSShreyas Bhatewara } else { 791d1a890faSShreyas Bhatewara ctx->eth_ip_hdr_size = 0; 792d1a890faSShreyas Bhatewara ctx->l4_hdr_size = 0; 793d1a890faSShreyas Bhatewara /* copy as much as allowed */ 794d1a890faSShreyas Bhatewara ctx->copy_size = min((unsigned int)VMXNET3_HDR_COPY_SIZE 795d1a890faSShreyas Bhatewara , skb_headlen(skb)); 796d1a890faSShreyas Bhatewara } 797d1a890faSShreyas Bhatewara 798d1a890faSShreyas Bhatewara /* make sure headers are accessible directly */ 799d1a890faSShreyas Bhatewara if (unlikely(!pskb_may_pull(skb, ctx->copy_size))) 800d1a890faSShreyas Bhatewara goto err; 801d1a890faSShreyas Bhatewara } 802d1a890faSShreyas Bhatewara 803d1a890faSShreyas Bhatewara if (unlikely(ctx->copy_size > VMXNET3_HDR_COPY_SIZE)) { 804d1a890faSShreyas Bhatewara tq->stats.oversized_hdr++; 805d1a890faSShreyas Bhatewara ctx->copy_size = 0; 806d1a890faSShreyas Bhatewara return 0; 807d1a890faSShreyas Bhatewara } 808d1a890faSShreyas Bhatewara 809d1a890faSShreyas Bhatewara tdd = tq->data_ring.base + tq->tx_ring.next2fill; 810d1a890faSShreyas Bhatewara 811d1a890faSShreyas Bhatewara memcpy(tdd->data, skb->data, ctx->copy_size); 812f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 813f6965582SRandy Dunlap "copy %u bytes to dataRing[%u]\n", 814d1a890faSShreyas Bhatewara ctx->copy_size, tq->tx_ring.next2fill); 815d1a890faSShreyas Bhatewara return 1; 816d1a890faSShreyas Bhatewara 817d1a890faSShreyas Bhatewara err: 818d1a890faSShreyas Bhatewara return -1; 819d1a890faSShreyas Bhatewara } 820d1a890faSShreyas Bhatewara 821d1a890faSShreyas Bhatewara 822d1a890faSShreyas Bhatewara static void 823d1a890faSShreyas Bhatewara vmxnet3_prepare_tso(struct sk_buff *skb, 824d1a890faSShreyas Bhatewara struct vmxnet3_tx_ctx *ctx) 825d1a890faSShreyas Bhatewara { 826d1a890faSShreyas Bhatewara struct tcphdr *tcph = (struct tcphdr *)skb_transport_header(skb); 827d1a890faSShreyas Bhatewara if (ctx->ipv4) { 828d1a890faSShreyas Bhatewara struct iphdr *iph = (struct iphdr *)skb_network_header(skb); 829d1a890faSShreyas Bhatewara iph->check = 0; 830d1a890faSShreyas Bhatewara tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0, 831d1a890faSShreyas Bhatewara IPPROTO_TCP, 0); 832d1a890faSShreyas Bhatewara } else { 833d1a890faSShreyas Bhatewara struct ipv6hdr *iph = (struct ipv6hdr *)skb_network_header(skb); 834d1a890faSShreyas Bhatewara tcph->check = ~csum_ipv6_magic(&iph->saddr, &iph->daddr, 0, 835d1a890faSShreyas Bhatewara IPPROTO_TCP, 0); 836d1a890faSShreyas Bhatewara } 837d1a890faSShreyas Bhatewara } 838d1a890faSShreyas Bhatewara 839d1a890faSShreyas Bhatewara 840d1a890faSShreyas Bhatewara /* 841d1a890faSShreyas Bhatewara * Transmits a pkt thru a given tq 842d1a890faSShreyas Bhatewara * Returns: 843d1a890faSShreyas Bhatewara * NETDEV_TX_OK: descriptors are setup successfully 844d1a890faSShreyas Bhatewara * NETDEV_TX_OK: error occured, the pkt is dropped 845d1a890faSShreyas Bhatewara * NETDEV_TX_BUSY: tx ring is full, queue is stopped 846d1a890faSShreyas Bhatewara * 847d1a890faSShreyas Bhatewara * Side-effects: 848d1a890faSShreyas Bhatewara * 1. tx ring may be changed 849d1a890faSShreyas Bhatewara * 2. tq stats may be updated accordingly 850d1a890faSShreyas Bhatewara * 3. shared->txNumDeferred may be updated 851d1a890faSShreyas Bhatewara */ 852d1a890faSShreyas Bhatewara 853d1a890faSShreyas Bhatewara static int 854d1a890faSShreyas Bhatewara vmxnet3_tq_xmit(struct sk_buff *skb, struct vmxnet3_tx_queue *tq, 855d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter, struct net_device *netdev) 856d1a890faSShreyas Bhatewara { 857d1a890faSShreyas Bhatewara int ret; 858d1a890faSShreyas Bhatewara u32 count; 859d1a890faSShreyas Bhatewara unsigned long flags; 860d1a890faSShreyas Bhatewara struct vmxnet3_tx_ctx ctx; 861d1a890faSShreyas Bhatewara union Vmxnet3_GenericDesc *gdesc; 862115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 863115924b6SShreyas Bhatewara /* Use temporary descriptor to avoid touching bits multiple times */ 864115924b6SShreyas Bhatewara union Vmxnet3_GenericDesc tempTxDesc; 865115924b6SShreyas Bhatewara #endif 866d1a890faSShreyas Bhatewara 867d1a890faSShreyas Bhatewara /* conservatively estimate # of descriptors to use */ 868d1a890faSShreyas Bhatewara count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 869d1a890faSShreyas Bhatewara skb_shinfo(skb)->nr_frags + 1; 870d1a890faSShreyas Bhatewara 871d1a890faSShreyas Bhatewara ctx.ipv4 = (skb->protocol == __constant_ntohs(ETH_P_IP)); 872d1a890faSShreyas Bhatewara 873d1a890faSShreyas Bhatewara ctx.mss = skb_shinfo(skb)->gso_size; 874d1a890faSShreyas Bhatewara if (ctx.mss) { 875d1a890faSShreyas Bhatewara if (skb_header_cloned(skb)) { 876d1a890faSShreyas Bhatewara if (unlikely(pskb_expand_head(skb, 0, 0, 877d1a890faSShreyas Bhatewara GFP_ATOMIC) != 0)) { 878d1a890faSShreyas Bhatewara tq->stats.drop_tso++; 879d1a890faSShreyas Bhatewara goto drop_pkt; 880d1a890faSShreyas Bhatewara } 881d1a890faSShreyas Bhatewara tq->stats.copy_skb_header++; 882d1a890faSShreyas Bhatewara } 883d1a890faSShreyas Bhatewara vmxnet3_prepare_tso(skb, &ctx); 884d1a890faSShreyas Bhatewara } else { 885d1a890faSShreyas Bhatewara if (unlikely(count > VMXNET3_MAX_TXD_PER_PKT)) { 886d1a890faSShreyas Bhatewara 887d1a890faSShreyas Bhatewara /* non-tso pkts must not use more than 888d1a890faSShreyas Bhatewara * VMXNET3_MAX_TXD_PER_PKT entries 889d1a890faSShreyas Bhatewara */ 890d1a890faSShreyas Bhatewara if (skb_linearize(skb) != 0) { 891d1a890faSShreyas Bhatewara tq->stats.drop_too_many_frags++; 892d1a890faSShreyas Bhatewara goto drop_pkt; 893d1a890faSShreyas Bhatewara } 894d1a890faSShreyas Bhatewara tq->stats.linearized++; 895d1a890faSShreyas Bhatewara 896d1a890faSShreyas Bhatewara /* recalculate the # of descriptors to use */ 897d1a890faSShreyas Bhatewara count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1; 898d1a890faSShreyas Bhatewara } 899d1a890faSShreyas Bhatewara } 900d1a890faSShreyas Bhatewara 901d1a890faSShreyas Bhatewara ret = vmxnet3_parse_and_copy_hdr(skb, tq, &ctx, adapter); 902d1a890faSShreyas Bhatewara if (ret >= 0) { 903d1a890faSShreyas Bhatewara BUG_ON(ret <= 0 && ctx.copy_size != 0); 904d1a890faSShreyas Bhatewara /* hdrs parsed, check against other limits */ 905d1a890faSShreyas Bhatewara if (ctx.mss) { 906d1a890faSShreyas Bhatewara if (unlikely(ctx.eth_ip_hdr_size + ctx.l4_hdr_size > 907d1a890faSShreyas Bhatewara VMXNET3_MAX_TX_BUF_SIZE)) { 908d1a890faSShreyas Bhatewara goto hdr_too_big; 909d1a890faSShreyas Bhatewara } 910d1a890faSShreyas Bhatewara } else { 911d1a890faSShreyas Bhatewara if (skb->ip_summed == CHECKSUM_PARTIAL) { 912d1a890faSShreyas Bhatewara if (unlikely(ctx.eth_ip_hdr_size + 913d1a890faSShreyas Bhatewara skb->csum_offset > 914d1a890faSShreyas Bhatewara VMXNET3_MAX_CSUM_OFFSET)) { 915d1a890faSShreyas Bhatewara goto hdr_too_big; 916d1a890faSShreyas Bhatewara } 917d1a890faSShreyas Bhatewara } 918d1a890faSShreyas Bhatewara } 919d1a890faSShreyas Bhatewara } else { 920d1a890faSShreyas Bhatewara tq->stats.drop_hdr_inspect_err++; 921d1a890faSShreyas Bhatewara goto drop_pkt; 922d1a890faSShreyas Bhatewara } 923d1a890faSShreyas Bhatewara 924d1a890faSShreyas Bhatewara spin_lock_irqsave(&tq->tx_lock, flags); 925d1a890faSShreyas Bhatewara 926d1a890faSShreyas Bhatewara if (count > vmxnet3_cmd_ring_desc_avail(&tq->tx_ring)) { 927d1a890faSShreyas Bhatewara tq->stats.tx_ring_full++; 928f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 929f6965582SRandy Dunlap "tx queue stopped on %s, next2comp %u" 930d1a890faSShreyas Bhatewara " next2fill %u\n", adapter->netdev->name, 931d1a890faSShreyas Bhatewara tq->tx_ring.next2comp, tq->tx_ring.next2fill); 932d1a890faSShreyas Bhatewara 933d1a890faSShreyas Bhatewara vmxnet3_tq_stop(tq, adapter); 934d1a890faSShreyas Bhatewara spin_unlock_irqrestore(&tq->tx_lock, flags); 935d1a890faSShreyas Bhatewara return NETDEV_TX_BUSY; 936d1a890faSShreyas Bhatewara } 937d1a890faSShreyas Bhatewara 938d1a890faSShreyas Bhatewara /* fill tx descs related to addr & len */ 939d1a890faSShreyas Bhatewara vmxnet3_map_pkt(skb, &ctx, tq, adapter->pdev, adapter); 940d1a890faSShreyas Bhatewara 941d1a890faSShreyas Bhatewara /* setup the EOP desc */ 942115924b6SShreyas Bhatewara ctx.eop_txd->dword[3] = cpu_to_le32(VMXNET3_TXD_CQ | VMXNET3_TXD_EOP); 943d1a890faSShreyas Bhatewara 944d1a890faSShreyas Bhatewara /* setup the SOP desc */ 945115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 946115924b6SShreyas Bhatewara gdesc = &tempTxDesc; 947115924b6SShreyas Bhatewara gdesc->dword[2] = ctx.sop_txd->dword[2]; 948115924b6SShreyas Bhatewara gdesc->dword[3] = ctx.sop_txd->dword[3]; 949115924b6SShreyas Bhatewara #else 950d1a890faSShreyas Bhatewara gdesc = ctx.sop_txd; 951115924b6SShreyas Bhatewara #endif 952d1a890faSShreyas Bhatewara if (ctx.mss) { 953d1a890faSShreyas Bhatewara gdesc->txd.hlen = ctx.eth_ip_hdr_size + ctx.l4_hdr_size; 954d1a890faSShreyas Bhatewara gdesc->txd.om = VMXNET3_OM_TSO; 955d1a890faSShreyas Bhatewara gdesc->txd.msscof = ctx.mss; 956115924b6SShreyas Bhatewara le32_add_cpu(&tq->shared->txNumDeferred, (skb->len - 957115924b6SShreyas Bhatewara gdesc->txd.hlen + ctx.mss - 1) / ctx.mss); 958d1a890faSShreyas Bhatewara } else { 959d1a890faSShreyas Bhatewara if (skb->ip_summed == CHECKSUM_PARTIAL) { 960d1a890faSShreyas Bhatewara gdesc->txd.hlen = ctx.eth_ip_hdr_size; 961d1a890faSShreyas Bhatewara gdesc->txd.om = VMXNET3_OM_CSUM; 962d1a890faSShreyas Bhatewara gdesc->txd.msscof = ctx.eth_ip_hdr_size + 963d1a890faSShreyas Bhatewara skb->csum_offset; 964d1a890faSShreyas Bhatewara } else { 965d1a890faSShreyas Bhatewara gdesc->txd.om = 0; 966d1a890faSShreyas Bhatewara gdesc->txd.msscof = 0; 967d1a890faSShreyas Bhatewara } 968115924b6SShreyas Bhatewara le32_add_cpu(&tq->shared->txNumDeferred, 1); 969d1a890faSShreyas Bhatewara } 970d1a890faSShreyas Bhatewara 971d1a890faSShreyas Bhatewara if (vlan_tx_tag_present(skb)) { 972d1a890faSShreyas Bhatewara gdesc->txd.ti = 1; 973d1a890faSShreyas Bhatewara gdesc->txd.tci = vlan_tx_tag_get(skb); 974d1a890faSShreyas Bhatewara } 975d1a890faSShreyas Bhatewara 976115924b6SShreyas Bhatewara /* finally flips the GEN bit of the SOP desc. */ 977115924b6SShreyas Bhatewara gdesc->dword[2] = cpu_to_le32(le32_to_cpu(gdesc->dword[2]) ^ 978115924b6SShreyas Bhatewara VMXNET3_TXD_GEN); 979115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 980115924b6SShreyas Bhatewara /* Finished updating in bitfields of Tx Desc, so write them in original 981115924b6SShreyas Bhatewara * place. 982115924b6SShreyas Bhatewara */ 983115924b6SShreyas Bhatewara vmxnet3_TxDescToLe((struct Vmxnet3_TxDesc *)gdesc, 984115924b6SShreyas Bhatewara (struct Vmxnet3_TxDesc *)ctx.sop_txd); 985115924b6SShreyas Bhatewara gdesc = ctx.sop_txd; 986115924b6SShreyas Bhatewara #endif 987f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 988f6965582SRandy Dunlap "txd[%u]: SOP 0x%Lx 0x%x 0x%x\n", 989d1a890faSShreyas Bhatewara (u32)((union Vmxnet3_GenericDesc *)ctx.sop_txd - 990115924b6SShreyas Bhatewara tq->tx_ring.base), le64_to_cpu(gdesc->txd.addr), 991115924b6SShreyas Bhatewara le32_to_cpu(gdesc->dword[2]), le32_to_cpu(gdesc->dword[3])); 992d1a890faSShreyas Bhatewara 993d1a890faSShreyas Bhatewara spin_unlock_irqrestore(&tq->tx_lock, flags); 994d1a890faSShreyas Bhatewara 995115924b6SShreyas Bhatewara if (le32_to_cpu(tq->shared->txNumDeferred) >= 996115924b6SShreyas Bhatewara le32_to_cpu(tq->shared->txThreshold)) { 997d1a890faSShreyas Bhatewara tq->shared->txNumDeferred = 0; 998d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_TXPROD, 999d1a890faSShreyas Bhatewara tq->tx_ring.next2fill); 1000d1a890faSShreyas Bhatewara } 1001d1a890faSShreyas Bhatewara 1002d1a890faSShreyas Bhatewara return NETDEV_TX_OK; 1003d1a890faSShreyas Bhatewara 1004d1a890faSShreyas Bhatewara hdr_too_big: 1005d1a890faSShreyas Bhatewara tq->stats.drop_oversized_hdr++; 1006d1a890faSShreyas Bhatewara drop_pkt: 1007d1a890faSShreyas Bhatewara tq->stats.drop_total++; 1008d1a890faSShreyas Bhatewara dev_kfree_skb(skb); 1009d1a890faSShreyas Bhatewara return NETDEV_TX_OK; 1010d1a890faSShreyas Bhatewara } 1011d1a890faSShreyas Bhatewara 1012d1a890faSShreyas Bhatewara 1013d1a890faSShreyas Bhatewara static netdev_tx_t 1014d1a890faSShreyas Bhatewara vmxnet3_xmit_frame(struct sk_buff *skb, struct net_device *netdev) 1015d1a890faSShreyas Bhatewara { 1016d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1017d1a890faSShreyas Bhatewara 1018115924b6SShreyas Bhatewara return vmxnet3_tq_xmit(skb, &adapter->tx_queue, adapter, netdev); 1019d1a890faSShreyas Bhatewara } 1020d1a890faSShreyas Bhatewara 1021d1a890faSShreyas Bhatewara 1022d1a890faSShreyas Bhatewara static void 1023d1a890faSShreyas Bhatewara vmxnet3_rx_csum(struct vmxnet3_adapter *adapter, 1024d1a890faSShreyas Bhatewara struct sk_buff *skb, 1025d1a890faSShreyas Bhatewara union Vmxnet3_GenericDesc *gdesc) 1026d1a890faSShreyas Bhatewara { 1027d1a890faSShreyas Bhatewara if (!gdesc->rcd.cnc && adapter->rxcsum) { 1028d1a890faSShreyas Bhatewara /* typical case: TCP/UDP over IP and both csums are correct */ 1029115924b6SShreyas Bhatewara if ((le32_to_cpu(gdesc->dword[3]) & VMXNET3_RCD_CSUM_OK) == 1030d1a890faSShreyas Bhatewara VMXNET3_RCD_CSUM_OK) { 1031d1a890faSShreyas Bhatewara skb->ip_summed = CHECKSUM_UNNECESSARY; 1032d1a890faSShreyas Bhatewara BUG_ON(!(gdesc->rcd.tcp || gdesc->rcd.udp)); 1033d1a890faSShreyas Bhatewara BUG_ON(!(gdesc->rcd.v4 || gdesc->rcd.v6)); 1034d1a890faSShreyas Bhatewara BUG_ON(gdesc->rcd.frg); 1035d1a890faSShreyas Bhatewara } else { 1036d1a890faSShreyas Bhatewara if (gdesc->rcd.csum) { 1037d1a890faSShreyas Bhatewara skb->csum = htons(gdesc->rcd.csum); 1038d1a890faSShreyas Bhatewara skb->ip_summed = CHECKSUM_PARTIAL; 1039d1a890faSShreyas Bhatewara } else { 1040d1a890faSShreyas Bhatewara skb->ip_summed = CHECKSUM_NONE; 1041d1a890faSShreyas Bhatewara } 1042d1a890faSShreyas Bhatewara } 1043d1a890faSShreyas Bhatewara } else { 1044d1a890faSShreyas Bhatewara skb->ip_summed = CHECKSUM_NONE; 1045d1a890faSShreyas Bhatewara } 1046d1a890faSShreyas Bhatewara } 1047d1a890faSShreyas Bhatewara 1048d1a890faSShreyas Bhatewara 1049d1a890faSShreyas Bhatewara static void 1050d1a890faSShreyas Bhatewara vmxnet3_rx_error(struct vmxnet3_rx_queue *rq, struct Vmxnet3_RxCompDesc *rcd, 1051d1a890faSShreyas Bhatewara struct vmxnet3_rx_ctx *ctx, struct vmxnet3_adapter *adapter) 1052d1a890faSShreyas Bhatewara { 1053d1a890faSShreyas Bhatewara rq->stats.drop_err++; 1054d1a890faSShreyas Bhatewara if (!rcd->fcs) 1055d1a890faSShreyas Bhatewara rq->stats.drop_fcs++; 1056d1a890faSShreyas Bhatewara 1057d1a890faSShreyas Bhatewara rq->stats.drop_total++; 1058d1a890faSShreyas Bhatewara 1059d1a890faSShreyas Bhatewara /* 1060d1a890faSShreyas Bhatewara * We do not unmap and chain the rx buffer to the skb. 1061d1a890faSShreyas Bhatewara * We basically pretend this buffer is not used and will be recycled 1062d1a890faSShreyas Bhatewara * by vmxnet3_rq_alloc_rx_buf() 1063d1a890faSShreyas Bhatewara */ 1064d1a890faSShreyas Bhatewara 1065d1a890faSShreyas Bhatewara /* 1066d1a890faSShreyas Bhatewara * ctx->skb may be NULL if this is the first and the only one 1067d1a890faSShreyas Bhatewara * desc for the pkt 1068d1a890faSShreyas Bhatewara */ 1069d1a890faSShreyas Bhatewara if (ctx->skb) 1070d1a890faSShreyas Bhatewara dev_kfree_skb_irq(ctx->skb); 1071d1a890faSShreyas Bhatewara 1072d1a890faSShreyas Bhatewara ctx->skb = NULL; 1073d1a890faSShreyas Bhatewara } 1074d1a890faSShreyas Bhatewara 1075d1a890faSShreyas Bhatewara 1076d1a890faSShreyas Bhatewara static int 1077d1a890faSShreyas Bhatewara vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq, 1078d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter, int quota) 1079d1a890faSShreyas Bhatewara { 1080d1a890faSShreyas Bhatewara static u32 rxprod_reg[2] = {VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2}; 1081d1a890faSShreyas Bhatewara u32 num_rxd = 0; 1082d1a890faSShreyas Bhatewara struct Vmxnet3_RxCompDesc *rcd; 1083d1a890faSShreyas Bhatewara struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx; 1084115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 1085115924b6SShreyas Bhatewara struct Vmxnet3_RxDesc rxCmdDesc; 1086115924b6SShreyas Bhatewara struct Vmxnet3_RxCompDesc rxComp; 1087115924b6SShreyas Bhatewara #endif 1088115924b6SShreyas Bhatewara vmxnet3_getRxComp(rcd, &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, 1089115924b6SShreyas Bhatewara &rxComp); 1090d1a890faSShreyas Bhatewara while (rcd->gen == rq->comp_ring.gen) { 1091d1a890faSShreyas Bhatewara struct vmxnet3_rx_buf_info *rbi; 1092d1a890faSShreyas Bhatewara struct sk_buff *skb; 1093d1a890faSShreyas Bhatewara int num_to_alloc; 1094d1a890faSShreyas Bhatewara struct Vmxnet3_RxDesc *rxd; 1095d1a890faSShreyas Bhatewara u32 idx, ring_idx; 1096d1a890faSShreyas Bhatewara 1097d1a890faSShreyas Bhatewara if (num_rxd >= quota) { 1098d1a890faSShreyas Bhatewara /* we may stop even before we see the EOP desc of 1099d1a890faSShreyas Bhatewara * the current pkt 1100d1a890faSShreyas Bhatewara */ 1101d1a890faSShreyas Bhatewara break; 1102d1a890faSShreyas Bhatewara } 1103d1a890faSShreyas Bhatewara num_rxd++; 1104d1a890faSShreyas Bhatewara 1105d1a890faSShreyas Bhatewara idx = rcd->rxdIdx; 1106d1a890faSShreyas Bhatewara ring_idx = rcd->rqID == rq->qid ? 0 : 1; 1107115924b6SShreyas Bhatewara vmxnet3_getRxDesc(rxd, &rq->rx_ring[ring_idx].base[idx].rxd, 1108115924b6SShreyas Bhatewara &rxCmdDesc); 1109d1a890faSShreyas Bhatewara rbi = rq->buf_info[ring_idx] + idx; 1110d1a890faSShreyas Bhatewara 1111115924b6SShreyas Bhatewara BUG_ON(rxd->addr != rbi->dma_addr || 1112115924b6SShreyas Bhatewara rxd->len != rbi->len); 1113d1a890faSShreyas Bhatewara 1114d1a890faSShreyas Bhatewara if (unlikely(rcd->eop && rcd->err)) { 1115d1a890faSShreyas Bhatewara vmxnet3_rx_error(rq, rcd, ctx, adapter); 1116d1a890faSShreyas Bhatewara goto rcd_done; 1117d1a890faSShreyas Bhatewara } 1118d1a890faSShreyas Bhatewara 1119d1a890faSShreyas Bhatewara if (rcd->sop) { /* first buf of the pkt */ 1120d1a890faSShreyas Bhatewara BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_HEAD || 1121d1a890faSShreyas Bhatewara rcd->rqID != rq->qid); 1122d1a890faSShreyas Bhatewara 1123d1a890faSShreyas Bhatewara BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_SKB); 1124d1a890faSShreyas Bhatewara BUG_ON(ctx->skb != NULL || rbi->skb == NULL); 1125d1a890faSShreyas Bhatewara 1126d1a890faSShreyas Bhatewara if (unlikely(rcd->len == 0)) { 1127d1a890faSShreyas Bhatewara /* Pretend the rx buffer is skipped. */ 1128d1a890faSShreyas Bhatewara BUG_ON(!(rcd->sop && rcd->eop)); 1129f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 1130f6965582SRandy Dunlap "rxRing[%u][%u] 0 length\n", 1131d1a890faSShreyas Bhatewara ring_idx, idx); 1132d1a890faSShreyas Bhatewara goto rcd_done; 1133d1a890faSShreyas Bhatewara } 1134d1a890faSShreyas Bhatewara 1135d1a890faSShreyas Bhatewara ctx->skb = rbi->skb; 1136d1a890faSShreyas Bhatewara rbi->skb = NULL; 1137d1a890faSShreyas Bhatewara 1138d1a890faSShreyas Bhatewara pci_unmap_single(adapter->pdev, rbi->dma_addr, rbi->len, 1139d1a890faSShreyas Bhatewara PCI_DMA_FROMDEVICE); 1140d1a890faSShreyas Bhatewara 1141d1a890faSShreyas Bhatewara skb_put(ctx->skb, rcd->len); 1142d1a890faSShreyas Bhatewara } else { 1143d1a890faSShreyas Bhatewara BUG_ON(ctx->skb == NULL); 1144d1a890faSShreyas Bhatewara /* non SOP buffer must be type 1 in most cases */ 1145d1a890faSShreyas Bhatewara if (rbi->buf_type == VMXNET3_RX_BUF_PAGE) { 1146d1a890faSShreyas Bhatewara BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_BODY); 1147d1a890faSShreyas Bhatewara 1148d1a890faSShreyas Bhatewara if (rcd->len) { 1149d1a890faSShreyas Bhatewara pci_unmap_page(adapter->pdev, 1150d1a890faSShreyas Bhatewara rbi->dma_addr, rbi->len, 1151d1a890faSShreyas Bhatewara PCI_DMA_FROMDEVICE); 1152d1a890faSShreyas Bhatewara 1153d1a890faSShreyas Bhatewara vmxnet3_append_frag(ctx->skb, rcd, rbi); 1154d1a890faSShreyas Bhatewara rbi->page = NULL; 1155d1a890faSShreyas Bhatewara } 1156d1a890faSShreyas Bhatewara } else { 1157d1a890faSShreyas Bhatewara /* 1158d1a890faSShreyas Bhatewara * The only time a non-SOP buffer is type 0 is 1159d1a890faSShreyas Bhatewara * when it's EOP and error flag is raised, which 1160d1a890faSShreyas Bhatewara * has already been handled. 1161d1a890faSShreyas Bhatewara */ 1162d1a890faSShreyas Bhatewara BUG_ON(true); 1163d1a890faSShreyas Bhatewara } 1164d1a890faSShreyas Bhatewara } 1165d1a890faSShreyas Bhatewara 1166d1a890faSShreyas Bhatewara skb = ctx->skb; 1167d1a890faSShreyas Bhatewara if (rcd->eop) { 1168d1a890faSShreyas Bhatewara skb->len += skb->data_len; 1169d1a890faSShreyas Bhatewara skb->truesize += skb->data_len; 1170d1a890faSShreyas Bhatewara 1171d1a890faSShreyas Bhatewara vmxnet3_rx_csum(adapter, skb, 1172d1a890faSShreyas Bhatewara (union Vmxnet3_GenericDesc *)rcd); 1173d1a890faSShreyas Bhatewara skb->protocol = eth_type_trans(skb, adapter->netdev); 1174d1a890faSShreyas Bhatewara 1175d1a890faSShreyas Bhatewara if (unlikely(adapter->vlan_grp && rcd->ts)) { 1176d1a890faSShreyas Bhatewara vlan_hwaccel_receive_skb(skb, 1177d1a890faSShreyas Bhatewara adapter->vlan_grp, rcd->tci); 1178d1a890faSShreyas Bhatewara } else { 1179d1a890faSShreyas Bhatewara netif_receive_skb(skb); 1180d1a890faSShreyas Bhatewara } 1181d1a890faSShreyas Bhatewara 1182d1a890faSShreyas Bhatewara ctx->skb = NULL; 1183d1a890faSShreyas Bhatewara } 1184d1a890faSShreyas Bhatewara 1185d1a890faSShreyas Bhatewara rcd_done: 1186d1a890faSShreyas Bhatewara /* device may skip some rx descs */ 1187d1a890faSShreyas Bhatewara rq->rx_ring[ring_idx].next2comp = idx; 1188d1a890faSShreyas Bhatewara VMXNET3_INC_RING_IDX_ONLY(rq->rx_ring[ring_idx].next2comp, 1189d1a890faSShreyas Bhatewara rq->rx_ring[ring_idx].size); 1190d1a890faSShreyas Bhatewara 1191d1a890faSShreyas Bhatewara /* refill rx buffers frequently to avoid starving the h/w */ 1192d1a890faSShreyas Bhatewara num_to_alloc = vmxnet3_cmd_ring_desc_avail(rq->rx_ring + 1193d1a890faSShreyas Bhatewara ring_idx); 1194d1a890faSShreyas Bhatewara if (unlikely(num_to_alloc > VMXNET3_RX_ALLOC_THRESHOLD(rq, 1195d1a890faSShreyas Bhatewara ring_idx, adapter))) { 1196d1a890faSShreyas Bhatewara vmxnet3_rq_alloc_rx_buf(rq, ring_idx, num_to_alloc, 1197d1a890faSShreyas Bhatewara adapter); 1198d1a890faSShreyas Bhatewara 1199d1a890faSShreyas Bhatewara /* if needed, update the register */ 1200d1a890faSShreyas Bhatewara if (unlikely(rq->shared->updateRxProd)) { 1201d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR0_REG(adapter, 1202d1a890faSShreyas Bhatewara rxprod_reg[ring_idx] + rq->qid * 8, 1203d1a890faSShreyas Bhatewara rq->rx_ring[ring_idx].next2fill); 1204d1a890faSShreyas Bhatewara rq->uncommitted[ring_idx] = 0; 1205d1a890faSShreyas Bhatewara } 1206d1a890faSShreyas Bhatewara } 1207d1a890faSShreyas Bhatewara 1208d1a890faSShreyas Bhatewara vmxnet3_comp_ring_adv_next2proc(&rq->comp_ring); 1209115924b6SShreyas Bhatewara vmxnet3_getRxComp(rcd, 1210115924b6SShreyas Bhatewara &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, &rxComp); 1211d1a890faSShreyas Bhatewara } 1212d1a890faSShreyas Bhatewara 1213d1a890faSShreyas Bhatewara return num_rxd; 1214d1a890faSShreyas Bhatewara } 1215d1a890faSShreyas Bhatewara 1216d1a890faSShreyas Bhatewara 1217d1a890faSShreyas Bhatewara static void 1218d1a890faSShreyas Bhatewara vmxnet3_rq_cleanup(struct vmxnet3_rx_queue *rq, 1219d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 1220d1a890faSShreyas Bhatewara { 1221d1a890faSShreyas Bhatewara u32 i, ring_idx; 1222d1a890faSShreyas Bhatewara struct Vmxnet3_RxDesc *rxd; 1223d1a890faSShreyas Bhatewara 1224d1a890faSShreyas Bhatewara for (ring_idx = 0; ring_idx < 2; ring_idx++) { 1225d1a890faSShreyas Bhatewara for (i = 0; i < rq->rx_ring[ring_idx].size; i++) { 1226115924b6SShreyas Bhatewara #ifdef __BIG_ENDIAN_BITFIELD 1227115924b6SShreyas Bhatewara struct Vmxnet3_RxDesc rxDesc; 1228115924b6SShreyas Bhatewara #endif 1229115924b6SShreyas Bhatewara vmxnet3_getRxDesc(rxd, 1230115924b6SShreyas Bhatewara &rq->rx_ring[ring_idx].base[i].rxd, &rxDesc); 1231d1a890faSShreyas Bhatewara 1232d1a890faSShreyas Bhatewara if (rxd->btype == VMXNET3_RXD_BTYPE_HEAD && 1233d1a890faSShreyas Bhatewara rq->buf_info[ring_idx][i].skb) { 1234d1a890faSShreyas Bhatewara pci_unmap_single(adapter->pdev, rxd->addr, 1235d1a890faSShreyas Bhatewara rxd->len, PCI_DMA_FROMDEVICE); 1236d1a890faSShreyas Bhatewara dev_kfree_skb(rq->buf_info[ring_idx][i].skb); 1237d1a890faSShreyas Bhatewara rq->buf_info[ring_idx][i].skb = NULL; 1238d1a890faSShreyas Bhatewara } else if (rxd->btype == VMXNET3_RXD_BTYPE_BODY && 1239d1a890faSShreyas Bhatewara rq->buf_info[ring_idx][i].page) { 1240d1a890faSShreyas Bhatewara pci_unmap_page(adapter->pdev, rxd->addr, 1241d1a890faSShreyas Bhatewara rxd->len, PCI_DMA_FROMDEVICE); 1242d1a890faSShreyas Bhatewara put_page(rq->buf_info[ring_idx][i].page); 1243d1a890faSShreyas Bhatewara rq->buf_info[ring_idx][i].page = NULL; 1244d1a890faSShreyas Bhatewara } 1245d1a890faSShreyas Bhatewara } 1246d1a890faSShreyas Bhatewara 1247d1a890faSShreyas Bhatewara rq->rx_ring[ring_idx].gen = VMXNET3_INIT_GEN; 1248d1a890faSShreyas Bhatewara rq->rx_ring[ring_idx].next2fill = 1249d1a890faSShreyas Bhatewara rq->rx_ring[ring_idx].next2comp = 0; 1250d1a890faSShreyas Bhatewara rq->uncommitted[ring_idx] = 0; 1251d1a890faSShreyas Bhatewara } 1252d1a890faSShreyas Bhatewara 1253d1a890faSShreyas Bhatewara rq->comp_ring.gen = VMXNET3_INIT_GEN; 1254d1a890faSShreyas Bhatewara rq->comp_ring.next2proc = 0; 1255d1a890faSShreyas Bhatewara } 1256d1a890faSShreyas Bhatewara 1257d1a890faSShreyas Bhatewara 1258d1a890faSShreyas Bhatewara void vmxnet3_rq_destroy(struct vmxnet3_rx_queue *rq, 1259d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 1260d1a890faSShreyas Bhatewara { 1261d1a890faSShreyas Bhatewara int i; 1262d1a890faSShreyas Bhatewara int j; 1263d1a890faSShreyas Bhatewara 1264d1a890faSShreyas Bhatewara /* all rx buffers must have already been freed */ 1265d1a890faSShreyas Bhatewara for (i = 0; i < 2; i++) { 1266d1a890faSShreyas Bhatewara if (rq->buf_info[i]) { 1267d1a890faSShreyas Bhatewara for (j = 0; j < rq->rx_ring[i].size; j++) 1268d1a890faSShreyas Bhatewara BUG_ON(rq->buf_info[i][j].page != NULL); 1269d1a890faSShreyas Bhatewara } 1270d1a890faSShreyas Bhatewara } 1271d1a890faSShreyas Bhatewara 1272d1a890faSShreyas Bhatewara 1273d1a890faSShreyas Bhatewara kfree(rq->buf_info[0]); 1274d1a890faSShreyas Bhatewara 1275d1a890faSShreyas Bhatewara for (i = 0; i < 2; i++) { 1276d1a890faSShreyas Bhatewara if (rq->rx_ring[i].base) { 1277d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, rq->rx_ring[i].size 1278d1a890faSShreyas Bhatewara * sizeof(struct Vmxnet3_RxDesc), 1279d1a890faSShreyas Bhatewara rq->rx_ring[i].base, 1280d1a890faSShreyas Bhatewara rq->rx_ring[i].basePA); 1281d1a890faSShreyas Bhatewara rq->rx_ring[i].base = NULL; 1282d1a890faSShreyas Bhatewara } 1283d1a890faSShreyas Bhatewara rq->buf_info[i] = NULL; 1284d1a890faSShreyas Bhatewara } 1285d1a890faSShreyas Bhatewara 1286d1a890faSShreyas Bhatewara if (rq->comp_ring.base) { 1287d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, rq->comp_ring.size * 1288d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_RxCompDesc), 1289d1a890faSShreyas Bhatewara rq->comp_ring.base, rq->comp_ring.basePA); 1290d1a890faSShreyas Bhatewara rq->comp_ring.base = NULL; 1291d1a890faSShreyas Bhatewara } 1292d1a890faSShreyas Bhatewara } 1293d1a890faSShreyas Bhatewara 1294d1a890faSShreyas Bhatewara 1295d1a890faSShreyas Bhatewara static int 1296d1a890faSShreyas Bhatewara vmxnet3_rq_init(struct vmxnet3_rx_queue *rq, 1297d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter) 1298d1a890faSShreyas Bhatewara { 1299d1a890faSShreyas Bhatewara int i; 1300d1a890faSShreyas Bhatewara 1301d1a890faSShreyas Bhatewara /* initialize buf_info */ 1302d1a890faSShreyas Bhatewara for (i = 0; i < rq->rx_ring[0].size; i++) { 1303d1a890faSShreyas Bhatewara 1304d1a890faSShreyas Bhatewara /* 1st buf for a pkt is skbuff */ 1305d1a890faSShreyas Bhatewara if (i % adapter->rx_buf_per_pkt == 0) { 1306d1a890faSShreyas Bhatewara rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_SKB; 1307d1a890faSShreyas Bhatewara rq->buf_info[0][i].len = adapter->skb_buf_size; 1308d1a890faSShreyas Bhatewara } else { /* subsequent bufs for a pkt is frag */ 1309d1a890faSShreyas Bhatewara rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_PAGE; 1310d1a890faSShreyas Bhatewara rq->buf_info[0][i].len = PAGE_SIZE; 1311d1a890faSShreyas Bhatewara } 1312d1a890faSShreyas Bhatewara } 1313d1a890faSShreyas Bhatewara for (i = 0; i < rq->rx_ring[1].size; i++) { 1314d1a890faSShreyas Bhatewara rq->buf_info[1][i].buf_type = VMXNET3_RX_BUF_PAGE; 1315d1a890faSShreyas Bhatewara rq->buf_info[1][i].len = PAGE_SIZE; 1316d1a890faSShreyas Bhatewara } 1317d1a890faSShreyas Bhatewara 1318d1a890faSShreyas Bhatewara /* reset internal state and allocate buffers for both rings */ 1319d1a890faSShreyas Bhatewara for (i = 0; i < 2; i++) { 1320d1a890faSShreyas Bhatewara rq->rx_ring[i].next2fill = rq->rx_ring[i].next2comp = 0; 1321d1a890faSShreyas Bhatewara rq->uncommitted[i] = 0; 1322d1a890faSShreyas Bhatewara 1323d1a890faSShreyas Bhatewara memset(rq->rx_ring[i].base, 0, rq->rx_ring[i].size * 1324d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_RxDesc)); 1325d1a890faSShreyas Bhatewara rq->rx_ring[i].gen = VMXNET3_INIT_GEN; 1326d1a890faSShreyas Bhatewara } 1327d1a890faSShreyas Bhatewara if (vmxnet3_rq_alloc_rx_buf(rq, 0, rq->rx_ring[0].size - 1, 1328d1a890faSShreyas Bhatewara adapter) == 0) { 1329d1a890faSShreyas Bhatewara /* at least has 1 rx buffer for the 1st ring */ 1330d1a890faSShreyas Bhatewara return -ENOMEM; 1331d1a890faSShreyas Bhatewara } 1332d1a890faSShreyas Bhatewara vmxnet3_rq_alloc_rx_buf(rq, 1, rq->rx_ring[1].size - 1, adapter); 1333d1a890faSShreyas Bhatewara 1334d1a890faSShreyas Bhatewara /* reset the comp ring */ 1335d1a890faSShreyas Bhatewara rq->comp_ring.next2proc = 0; 1336d1a890faSShreyas Bhatewara memset(rq->comp_ring.base, 0, rq->comp_ring.size * 1337d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_RxCompDesc)); 1338d1a890faSShreyas Bhatewara rq->comp_ring.gen = VMXNET3_INIT_GEN; 1339d1a890faSShreyas Bhatewara 1340d1a890faSShreyas Bhatewara /* reset rxctx */ 1341d1a890faSShreyas Bhatewara rq->rx_ctx.skb = NULL; 1342d1a890faSShreyas Bhatewara 1343d1a890faSShreyas Bhatewara /* stats are not reset */ 1344d1a890faSShreyas Bhatewara return 0; 1345d1a890faSShreyas Bhatewara } 1346d1a890faSShreyas Bhatewara 1347d1a890faSShreyas Bhatewara 1348d1a890faSShreyas Bhatewara static int 1349d1a890faSShreyas Bhatewara vmxnet3_rq_create(struct vmxnet3_rx_queue *rq, struct vmxnet3_adapter *adapter) 1350d1a890faSShreyas Bhatewara { 1351d1a890faSShreyas Bhatewara int i; 1352d1a890faSShreyas Bhatewara size_t sz; 1353d1a890faSShreyas Bhatewara struct vmxnet3_rx_buf_info *bi; 1354d1a890faSShreyas Bhatewara 1355d1a890faSShreyas Bhatewara for (i = 0; i < 2; i++) { 1356d1a890faSShreyas Bhatewara 1357d1a890faSShreyas Bhatewara sz = rq->rx_ring[i].size * sizeof(struct Vmxnet3_RxDesc); 1358d1a890faSShreyas Bhatewara rq->rx_ring[i].base = pci_alloc_consistent(adapter->pdev, sz, 1359d1a890faSShreyas Bhatewara &rq->rx_ring[i].basePA); 1360d1a890faSShreyas Bhatewara if (!rq->rx_ring[i].base) { 1361d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate rx ring %d\n", 1362d1a890faSShreyas Bhatewara adapter->netdev->name, i); 1363d1a890faSShreyas Bhatewara goto err; 1364d1a890faSShreyas Bhatewara } 1365d1a890faSShreyas Bhatewara } 1366d1a890faSShreyas Bhatewara 1367d1a890faSShreyas Bhatewara sz = rq->comp_ring.size * sizeof(struct Vmxnet3_RxCompDesc); 1368d1a890faSShreyas Bhatewara rq->comp_ring.base = pci_alloc_consistent(adapter->pdev, sz, 1369d1a890faSShreyas Bhatewara &rq->comp_ring.basePA); 1370d1a890faSShreyas Bhatewara if (!rq->comp_ring.base) { 1371d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate rx comp ring\n", 1372d1a890faSShreyas Bhatewara adapter->netdev->name); 1373d1a890faSShreyas Bhatewara goto err; 1374d1a890faSShreyas Bhatewara } 1375d1a890faSShreyas Bhatewara 1376d1a890faSShreyas Bhatewara sz = sizeof(struct vmxnet3_rx_buf_info) * (rq->rx_ring[0].size + 1377d1a890faSShreyas Bhatewara rq->rx_ring[1].size); 1378476c609eSJulia Lawall bi = kzalloc(sz, GFP_KERNEL); 1379d1a890faSShreyas Bhatewara if (!bi) { 1380d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to allocate rx bufinfo\n", 1381d1a890faSShreyas Bhatewara adapter->netdev->name); 1382d1a890faSShreyas Bhatewara goto err; 1383d1a890faSShreyas Bhatewara } 1384d1a890faSShreyas Bhatewara rq->buf_info[0] = bi; 1385d1a890faSShreyas Bhatewara rq->buf_info[1] = bi + rq->rx_ring[0].size; 1386d1a890faSShreyas Bhatewara 1387d1a890faSShreyas Bhatewara return 0; 1388d1a890faSShreyas Bhatewara 1389d1a890faSShreyas Bhatewara err: 1390d1a890faSShreyas Bhatewara vmxnet3_rq_destroy(rq, adapter); 1391d1a890faSShreyas Bhatewara return -ENOMEM; 1392d1a890faSShreyas Bhatewara } 1393d1a890faSShreyas Bhatewara 1394d1a890faSShreyas Bhatewara 1395d1a890faSShreyas Bhatewara static int 1396d1a890faSShreyas Bhatewara vmxnet3_do_poll(struct vmxnet3_adapter *adapter, int budget) 1397d1a890faSShreyas Bhatewara { 1398d1a890faSShreyas Bhatewara if (unlikely(adapter->shared->ecr)) 1399d1a890faSShreyas Bhatewara vmxnet3_process_events(adapter); 1400d1a890faSShreyas Bhatewara 1401d1a890faSShreyas Bhatewara vmxnet3_tq_tx_complete(&adapter->tx_queue, adapter); 1402d1a890faSShreyas Bhatewara return vmxnet3_rq_rx_complete(&adapter->rx_queue, adapter, budget); 1403d1a890faSShreyas Bhatewara } 1404d1a890faSShreyas Bhatewara 1405d1a890faSShreyas Bhatewara 1406d1a890faSShreyas Bhatewara static int 1407d1a890faSShreyas Bhatewara vmxnet3_poll(struct napi_struct *napi, int budget) 1408d1a890faSShreyas Bhatewara { 1409d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = container_of(napi, 1410d1a890faSShreyas Bhatewara struct vmxnet3_adapter, napi); 1411d1a890faSShreyas Bhatewara int rxd_done; 1412d1a890faSShreyas Bhatewara 1413d1a890faSShreyas Bhatewara rxd_done = vmxnet3_do_poll(adapter, budget); 1414d1a890faSShreyas Bhatewara 1415d1a890faSShreyas Bhatewara if (rxd_done < budget) { 1416d1a890faSShreyas Bhatewara napi_complete(napi); 1417d1a890faSShreyas Bhatewara vmxnet3_enable_intr(adapter, 0); 1418d1a890faSShreyas Bhatewara } 1419d1a890faSShreyas Bhatewara return rxd_done; 1420d1a890faSShreyas Bhatewara } 1421d1a890faSShreyas Bhatewara 1422d1a890faSShreyas Bhatewara 1423d1a890faSShreyas Bhatewara /* Interrupt handler for vmxnet3 */ 1424d1a890faSShreyas Bhatewara static irqreturn_t 1425d1a890faSShreyas Bhatewara vmxnet3_intr(int irq, void *dev_id) 1426d1a890faSShreyas Bhatewara { 1427d1a890faSShreyas Bhatewara struct net_device *dev = dev_id; 1428d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(dev); 1429d1a890faSShreyas Bhatewara 1430d1a890faSShreyas Bhatewara if (unlikely(adapter->intr.type == VMXNET3_IT_INTX)) { 1431d1a890faSShreyas Bhatewara u32 icr = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_ICR); 1432d1a890faSShreyas Bhatewara if (unlikely(icr == 0)) 1433d1a890faSShreyas Bhatewara /* not ours */ 1434d1a890faSShreyas Bhatewara return IRQ_NONE; 1435d1a890faSShreyas Bhatewara } 1436d1a890faSShreyas Bhatewara 1437d1a890faSShreyas Bhatewara 1438d1a890faSShreyas Bhatewara /* disable intr if needed */ 1439d1a890faSShreyas Bhatewara if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 1440d1a890faSShreyas Bhatewara vmxnet3_disable_intr(adapter, 0); 1441d1a890faSShreyas Bhatewara 1442d1a890faSShreyas Bhatewara napi_schedule(&adapter->napi); 1443d1a890faSShreyas Bhatewara 1444d1a890faSShreyas Bhatewara return IRQ_HANDLED; 1445d1a890faSShreyas Bhatewara } 1446d1a890faSShreyas Bhatewara 1447d1a890faSShreyas Bhatewara #ifdef CONFIG_NET_POLL_CONTROLLER 1448d1a890faSShreyas Bhatewara 1449d1a890faSShreyas Bhatewara 1450d1a890faSShreyas Bhatewara /* netpoll callback. */ 1451d1a890faSShreyas Bhatewara static void 1452d1a890faSShreyas Bhatewara vmxnet3_netpoll(struct net_device *netdev) 1453d1a890faSShreyas Bhatewara { 1454d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1455d1a890faSShreyas Bhatewara int irq; 1456d1a890faSShreyas Bhatewara 14578f7e524cSRandy Dunlap #ifdef CONFIG_PCI_MSI 1458d1a890faSShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_MSIX) 1459d1a890faSShreyas Bhatewara irq = adapter->intr.msix_entries[0].vector; 1460d1a890faSShreyas Bhatewara else 14618f7e524cSRandy Dunlap #endif 1462d1a890faSShreyas Bhatewara irq = adapter->pdev->irq; 1463d1a890faSShreyas Bhatewara 1464d1a890faSShreyas Bhatewara disable_irq(irq); 1465d1a890faSShreyas Bhatewara vmxnet3_intr(irq, netdev); 1466d1a890faSShreyas Bhatewara enable_irq(irq); 1467d1a890faSShreyas Bhatewara } 1468d1a890faSShreyas Bhatewara #endif 1469d1a890faSShreyas Bhatewara 1470d1a890faSShreyas Bhatewara static int 1471d1a890faSShreyas Bhatewara vmxnet3_request_irqs(struct vmxnet3_adapter *adapter) 1472d1a890faSShreyas Bhatewara { 1473d1a890faSShreyas Bhatewara int err; 1474d1a890faSShreyas Bhatewara 14758f7e524cSRandy Dunlap #ifdef CONFIG_PCI_MSI 1476d1a890faSShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_MSIX) { 1477d1a890faSShreyas Bhatewara /* we only use 1 MSI-X vector */ 1478d1a890faSShreyas Bhatewara err = request_irq(adapter->intr.msix_entries[0].vector, 1479d1a890faSShreyas Bhatewara vmxnet3_intr, 0, adapter->netdev->name, 1480d1a890faSShreyas Bhatewara adapter->netdev); 1481115924b6SShreyas Bhatewara } else if (adapter->intr.type == VMXNET3_IT_MSI) { 1482d1a890faSShreyas Bhatewara err = request_irq(adapter->pdev->irq, vmxnet3_intr, 0, 1483d1a890faSShreyas Bhatewara adapter->netdev->name, adapter->netdev); 1484115924b6SShreyas Bhatewara } else 1485115924b6SShreyas Bhatewara #endif 1486115924b6SShreyas Bhatewara { 1487d1a890faSShreyas Bhatewara err = request_irq(adapter->pdev->irq, vmxnet3_intr, 1488d1a890faSShreyas Bhatewara IRQF_SHARED, adapter->netdev->name, 1489d1a890faSShreyas Bhatewara adapter->netdev); 1490d1a890faSShreyas Bhatewara } 1491d1a890faSShreyas Bhatewara 1492d1a890faSShreyas Bhatewara if (err) 1493d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to request irq %s (intr type:%d), error" 1494d1a890faSShreyas Bhatewara ":%d\n", adapter->netdev->name, adapter->intr.type, err); 1495d1a890faSShreyas Bhatewara 1496d1a890faSShreyas Bhatewara 1497d1a890faSShreyas Bhatewara if (!err) { 1498d1a890faSShreyas Bhatewara int i; 1499d1a890faSShreyas Bhatewara /* init our intr settings */ 1500d1a890faSShreyas Bhatewara for (i = 0; i < adapter->intr.num_intrs; i++) 1501d1a890faSShreyas Bhatewara adapter->intr.mod_levels[i] = UPT1_IML_ADAPTIVE; 1502d1a890faSShreyas Bhatewara 1503d1a890faSShreyas Bhatewara /* next setup intr index for all intr sources */ 1504d1a890faSShreyas Bhatewara adapter->tx_queue.comp_ring.intr_idx = 0; 1505d1a890faSShreyas Bhatewara adapter->rx_queue.comp_ring.intr_idx = 0; 1506d1a890faSShreyas Bhatewara adapter->intr.event_intr_idx = 0; 1507d1a890faSShreyas Bhatewara 1508d1a890faSShreyas Bhatewara printk(KERN_INFO "%s: intr type %u, mode %u, %u vectors " 1509d1a890faSShreyas Bhatewara "allocated\n", adapter->netdev->name, adapter->intr.type, 1510d1a890faSShreyas Bhatewara adapter->intr.mask_mode, adapter->intr.num_intrs); 1511d1a890faSShreyas Bhatewara } 1512d1a890faSShreyas Bhatewara 1513d1a890faSShreyas Bhatewara return err; 1514d1a890faSShreyas Bhatewara } 1515d1a890faSShreyas Bhatewara 1516d1a890faSShreyas Bhatewara 1517d1a890faSShreyas Bhatewara static void 1518d1a890faSShreyas Bhatewara vmxnet3_free_irqs(struct vmxnet3_adapter *adapter) 1519d1a890faSShreyas Bhatewara { 1520d1a890faSShreyas Bhatewara BUG_ON(adapter->intr.type == VMXNET3_IT_AUTO || 1521d1a890faSShreyas Bhatewara adapter->intr.num_intrs <= 0); 1522d1a890faSShreyas Bhatewara 1523d1a890faSShreyas Bhatewara switch (adapter->intr.type) { 15248f7e524cSRandy Dunlap #ifdef CONFIG_PCI_MSI 1525d1a890faSShreyas Bhatewara case VMXNET3_IT_MSIX: 1526d1a890faSShreyas Bhatewara { 1527d1a890faSShreyas Bhatewara int i; 1528d1a890faSShreyas Bhatewara 1529d1a890faSShreyas Bhatewara for (i = 0; i < adapter->intr.num_intrs; i++) 1530d1a890faSShreyas Bhatewara free_irq(adapter->intr.msix_entries[i].vector, 1531d1a890faSShreyas Bhatewara adapter->netdev); 1532d1a890faSShreyas Bhatewara break; 1533d1a890faSShreyas Bhatewara } 15348f7e524cSRandy Dunlap #endif 1535d1a890faSShreyas Bhatewara case VMXNET3_IT_MSI: 1536d1a890faSShreyas Bhatewara free_irq(adapter->pdev->irq, adapter->netdev); 1537d1a890faSShreyas Bhatewara break; 1538d1a890faSShreyas Bhatewara case VMXNET3_IT_INTX: 1539d1a890faSShreyas Bhatewara free_irq(adapter->pdev->irq, adapter->netdev); 1540d1a890faSShreyas Bhatewara break; 1541d1a890faSShreyas Bhatewara default: 1542d1a890faSShreyas Bhatewara BUG_ON(true); 1543d1a890faSShreyas Bhatewara } 1544d1a890faSShreyas Bhatewara } 1545d1a890faSShreyas Bhatewara 1546d1a890faSShreyas Bhatewara 1547115924b6SShreyas Bhatewara inline void set_flag_le16(__le16 *data, u16 flag) 1548115924b6SShreyas Bhatewara { 1549115924b6SShreyas Bhatewara *data = cpu_to_le16(le16_to_cpu(*data) | flag); 1550115924b6SShreyas Bhatewara } 1551115924b6SShreyas Bhatewara 1552115924b6SShreyas Bhatewara inline void set_flag_le64(__le64 *data, u64 flag) 1553115924b6SShreyas Bhatewara { 1554115924b6SShreyas Bhatewara *data = cpu_to_le64(le64_to_cpu(*data) | flag); 1555115924b6SShreyas Bhatewara } 1556115924b6SShreyas Bhatewara 1557115924b6SShreyas Bhatewara inline void reset_flag_le64(__le64 *data, u64 flag) 1558115924b6SShreyas Bhatewara { 1559115924b6SShreyas Bhatewara *data = cpu_to_le64(le64_to_cpu(*data) & ~flag); 1560115924b6SShreyas Bhatewara } 1561115924b6SShreyas Bhatewara 1562115924b6SShreyas Bhatewara 1563d1a890faSShreyas Bhatewara static void 1564d1a890faSShreyas Bhatewara vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) 1565d1a890faSShreyas Bhatewara { 1566d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1567d1a890faSShreyas Bhatewara struct Vmxnet3_DriverShared *shared = adapter->shared; 1568d1a890faSShreyas Bhatewara u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1569d1a890faSShreyas Bhatewara 1570d1a890faSShreyas Bhatewara if (grp) { 1571d1a890faSShreyas Bhatewara /* add vlan rx stripping. */ 1572d1a890faSShreyas Bhatewara if (adapter->netdev->features & NETIF_F_HW_VLAN_RX) { 1573d1a890faSShreyas Bhatewara int i; 1574d1a890faSShreyas Bhatewara struct Vmxnet3_DSDevRead *devRead = &shared->devRead; 1575d1a890faSShreyas Bhatewara adapter->vlan_grp = grp; 1576d1a890faSShreyas Bhatewara 1577d1a890faSShreyas Bhatewara /* update FEATURES to device */ 1578115924b6SShreyas Bhatewara set_flag_le64(&devRead->misc.uptFeatures, 1579115924b6SShreyas Bhatewara UPT1_F_RXVLAN); 1580d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1581d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_FEATURE); 1582d1a890faSShreyas Bhatewara /* 1583d1a890faSShreyas Bhatewara * Clear entire vfTable; then enable untagged pkts. 1584d1a890faSShreyas Bhatewara * Note: setting one entry in vfTable to non-zero turns 1585d1a890faSShreyas Bhatewara * on VLAN rx filtering. 1586d1a890faSShreyas Bhatewara */ 1587d1a890faSShreyas Bhatewara for (i = 0; i < VMXNET3_VFT_SIZE; i++) 1588d1a890faSShreyas Bhatewara vfTable[i] = 0; 1589d1a890faSShreyas Bhatewara 1590d1a890faSShreyas Bhatewara VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0); 1591d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1592d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1593d1a890faSShreyas Bhatewara } else { 1594d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: vlan_rx_register when device has " 1595d1a890faSShreyas Bhatewara "no NETIF_F_HW_VLAN_RX\n", netdev->name); 1596d1a890faSShreyas Bhatewara } 1597d1a890faSShreyas Bhatewara } else { 1598d1a890faSShreyas Bhatewara /* remove vlan rx stripping. */ 1599d1a890faSShreyas Bhatewara struct Vmxnet3_DSDevRead *devRead = &shared->devRead; 1600d1a890faSShreyas Bhatewara adapter->vlan_grp = NULL; 1601d1a890faSShreyas Bhatewara 1602115924b6SShreyas Bhatewara if (le64_to_cpu(devRead->misc.uptFeatures) & UPT1_F_RXVLAN) { 1603d1a890faSShreyas Bhatewara int i; 1604d1a890faSShreyas Bhatewara 1605d1a890faSShreyas Bhatewara for (i = 0; i < VMXNET3_VFT_SIZE; i++) { 1606d1a890faSShreyas Bhatewara /* clear entire vfTable; this also disables 1607d1a890faSShreyas Bhatewara * VLAN rx filtering 1608d1a890faSShreyas Bhatewara */ 1609d1a890faSShreyas Bhatewara vfTable[i] = 0; 1610d1a890faSShreyas Bhatewara } 1611d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1612d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1613d1a890faSShreyas Bhatewara 1614d1a890faSShreyas Bhatewara /* update FEATURES to device */ 1615115924b6SShreyas Bhatewara reset_flag_le64(&devRead->misc.uptFeatures, 1616115924b6SShreyas Bhatewara UPT1_F_RXVLAN); 1617d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1618d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_FEATURE); 1619d1a890faSShreyas Bhatewara } 1620d1a890faSShreyas Bhatewara } 1621d1a890faSShreyas Bhatewara } 1622d1a890faSShreyas Bhatewara 1623d1a890faSShreyas Bhatewara 1624d1a890faSShreyas Bhatewara static void 1625d1a890faSShreyas Bhatewara vmxnet3_restore_vlan(struct vmxnet3_adapter *adapter) 1626d1a890faSShreyas Bhatewara { 1627d1a890faSShreyas Bhatewara if (adapter->vlan_grp) { 1628d1a890faSShreyas Bhatewara u16 vid; 1629d1a890faSShreyas Bhatewara u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1630d1a890faSShreyas Bhatewara bool activeVlan = false; 1631d1a890faSShreyas Bhatewara 1632d1a890faSShreyas Bhatewara for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) { 1633d1a890faSShreyas Bhatewara if (vlan_group_get_device(adapter->vlan_grp, vid)) { 1634d1a890faSShreyas Bhatewara VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid); 1635d1a890faSShreyas Bhatewara activeVlan = true; 1636d1a890faSShreyas Bhatewara } 1637d1a890faSShreyas Bhatewara } 1638d1a890faSShreyas Bhatewara if (activeVlan) { 1639d1a890faSShreyas Bhatewara /* continue to allow untagged pkts */ 1640d1a890faSShreyas Bhatewara VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0); 1641d1a890faSShreyas Bhatewara } 1642d1a890faSShreyas Bhatewara } 1643d1a890faSShreyas Bhatewara } 1644d1a890faSShreyas Bhatewara 1645d1a890faSShreyas Bhatewara 1646d1a890faSShreyas Bhatewara static void 1647d1a890faSShreyas Bhatewara vmxnet3_vlan_rx_add_vid(struct net_device *netdev, u16 vid) 1648d1a890faSShreyas Bhatewara { 1649d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1650d1a890faSShreyas Bhatewara u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1651d1a890faSShreyas Bhatewara 1652d1a890faSShreyas Bhatewara VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid); 1653d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1654d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1655d1a890faSShreyas Bhatewara } 1656d1a890faSShreyas Bhatewara 1657d1a890faSShreyas Bhatewara 1658d1a890faSShreyas Bhatewara static void 1659d1a890faSShreyas Bhatewara vmxnet3_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) 1660d1a890faSShreyas Bhatewara { 1661d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1662d1a890faSShreyas Bhatewara u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1663d1a890faSShreyas Bhatewara 1664d1a890faSShreyas Bhatewara VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid); 1665d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1666d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1667d1a890faSShreyas Bhatewara } 1668d1a890faSShreyas Bhatewara 1669d1a890faSShreyas Bhatewara 1670d1a890faSShreyas Bhatewara static u8 * 1671d1a890faSShreyas Bhatewara vmxnet3_copy_mc(struct net_device *netdev) 1672d1a890faSShreyas Bhatewara { 1673d1a890faSShreyas Bhatewara u8 *buf = NULL; 16744cd24eafSJiri Pirko u32 sz = netdev_mc_count(netdev) * ETH_ALEN; 1675d1a890faSShreyas Bhatewara 1676d1a890faSShreyas Bhatewara /* struct Vmxnet3_RxFilterConf.mfTableLen is u16. */ 1677d1a890faSShreyas Bhatewara if (sz <= 0xffff) { 1678d1a890faSShreyas Bhatewara /* We may be called with BH disabled */ 1679d1a890faSShreyas Bhatewara buf = kmalloc(sz, GFP_ATOMIC); 1680d1a890faSShreyas Bhatewara if (buf) { 168122bedad3SJiri Pirko struct netdev_hw_addr *ha; 1682567ec874SJiri Pirko int i = 0; 1683d1a890faSShreyas Bhatewara 168422bedad3SJiri Pirko netdev_for_each_mc_addr(ha, netdev) 168522bedad3SJiri Pirko memcpy(buf + i++ * ETH_ALEN, ha->addr, 1686d1a890faSShreyas Bhatewara ETH_ALEN); 1687d1a890faSShreyas Bhatewara } 1688d1a890faSShreyas Bhatewara } 1689d1a890faSShreyas Bhatewara return buf; 1690d1a890faSShreyas Bhatewara } 1691d1a890faSShreyas Bhatewara 1692d1a890faSShreyas Bhatewara 1693d1a890faSShreyas Bhatewara static void 1694d1a890faSShreyas Bhatewara vmxnet3_set_mc(struct net_device *netdev) 1695d1a890faSShreyas Bhatewara { 1696d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1697d1a890faSShreyas Bhatewara struct Vmxnet3_RxFilterConf *rxConf = 1698d1a890faSShreyas Bhatewara &adapter->shared->devRead.rxFilterConf; 1699d1a890faSShreyas Bhatewara u8 *new_table = NULL; 1700d1a890faSShreyas Bhatewara u32 new_mode = VMXNET3_RXM_UCAST; 1701d1a890faSShreyas Bhatewara 1702d1a890faSShreyas Bhatewara if (netdev->flags & IFF_PROMISC) 1703d1a890faSShreyas Bhatewara new_mode |= VMXNET3_RXM_PROMISC; 1704d1a890faSShreyas Bhatewara 1705d1a890faSShreyas Bhatewara if (netdev->flags & IFF_BROADCAST) 1706d1a890faSShreyas Bhatewara new_mode |= VMXNET3_RXM_BCAST; 1707d1a890faSShreyas Bhatewara 1708d1a890faSShreyas Bhatewara if (netdev->flags & IFF_ALLMULTI) 1709d1a890faSShreyas Bhatewara new_mode |= VMXNET3_RXM_ALL_MULTI; 1710d1a890faSShreyas Bhatewara else 17114cd24eafSJiri Pirko if (!netdev_mc_empty(netdev)) { 1712d1a890faSShreyas Bhatewara new_table = vmxnet3_copy_mc(netdev); 1713d1a890faSShreyas Bhatewara if (new_table) { 1714d1a890faSShreyas Bhatewara new_mode |= VMXNET3_RXM_MCAST; 1715115924b6SShreyas Bhatewara rxConf->mfTableLen = cpu_to_le16( 17164cd24eafSJiri Pirko netdev_mc_count(netdev) * ETH_ALEN); 1717115924b6SShreyas Bhatewara rxConf->mfTablePA = cpu_to_le64(virt_to_phys( 1718115924b6SShreyas Bhatewara new_table)); 1719d1a890faSShreyas Bhatewara } else { 1720d1a890faSShreyas Bhatewara printk(KERN_INFO "%s: failed to copy mcast list" 1721d1a890faSShreyas Bhatewara ", setting ALL_MULTI\n", netdev->name); 1722d1a890faSShreyas Bhatewara new_mode |= VMXNET3_RXM_ALL_MULTI; 1723d1a890faSShreyas Bhatewara } 1724d1a890faSShreyas Bhatewara } 1725d1a890faSShreyas Bhatewara 1726d1a890faSShreyas Bhatewara 1727d1a890faSShreyas Bhatewara if (!(new_mode & VMXNET3_RXM_MCAST)) { 1728d1a890faSShreyas Bhatewara rxConf->mfTableLen = 0; 1729d1a890faSShreyas Bhatewara rxConf->mfTablePA = 0; 1730d1a890faSShreyas Bhatewara } 1731d1a890faSShreyas Bhatewara 1732d1a890faSShreyas Bhatewara if (new_mode != rxConf->rxMode) { 1733115924b6SShreyas Bhatewara rxConf->rxMode = cpu_to_le32(new_mode); 1734d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1735d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_RX_MODE); 1736d1a890faSShreyas Bhatewara } 1737d1a890faSShreyas Bhatewara 1738d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1739d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_MAC_FILTERS); 1740d1a890faSShreyas Bhatewara 1741d1a890faSShreyas Bhatewara kfree(new_table); 1742d1a890faSShreyas Bhatewara } 1743d1a890faSShreyas Bhatewara 1744d1a890faSShreyas Bhatewara 1745d1a890faSShreyas Bhatewara /* 1746d1a890faSShreyas Bhatewara * Set up driver_shared based on settings in adapter. 1747d1a890faSShreyas Bhatewara */ 1748d1a890faSShreyas Bhatewara 1749d1a890faSShreyas Bhatewara static void 1750d1a890faSShreyas Bhatewara vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter) 1751d1a890faSShreyas Bhatewara { 1752d1a890faSShreyas Bhatewara struct Vmxnet3_DriverShared *shared = adapter->shared; 1753d1a890faSShreyas Bhatewara struct Vmxnet3_DSDevRead *devRead = &shared->devRead; 1754d1a890faSShreyas Bhatewara struct Vmxnet3_TxQueueConf *tqc; 1755d1a890faSShreyas Bhatewara struct Vmxnet3_RxQueueConf *rqc; 1756d1a890faSShreyas Bhatewara int i; 1757d1a890faSShreyas Bhatewara 1758d1a890faSShreyas Bhatewara memset(shared, 0, sizeof(*shared)); 1759d1a890faSShreyas Bhatewara 1760d1a890faSShreyas Bhatewara /* driver settings */ 1761115924b6SShreyas Bhatewara shared->magic = cpu_to_le32(VMXNET3_REV1_MAGIC); 1762115924b6SShreyas Bhatewara devRead->misc.driverInfo.version = cpu_to_le32( 1763115924b6SShreyas Bhatewara VMXNET3_DRIVER_VERSION_NUM); 1764d1a890faSShreyas Bhatewara devRead->misc.driverInfo.gos.gosBits = (sizeof(void *) == 4 ? 1765d1a890faSShreyas Bhatewara VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64); 1766d1a890faSShreyas Bhatewara devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX; 1767115924b6SShreyas Bhatewara *((u32 *)&devRead->misc.driverInfo.gos) = cpu_to_le32( 1768115924b6SShreyas Bhatewara *((u32 *)&devRead->misc.driverInfo.gos)); 1769115924b6SShreyas Bhatewara devRead->misc.driverInfo.vmxnet3RevSpt = cpu_to_le32(1); 1770115924b6SShreyas Bhatewara devRead->misc.driverInfo.uptVerSpt = cpu_to_le32(1); 1771d1a890faSShreyas Bhatewara 1772115924b6SShreyas Bhatewara devRead->misc.ddPA = cpu_to_le64(virt_to_phys(adapter)); 1773115924b6SShreyas Bhatewara devRead->misc.ddLen = cpu_to_le32(sizeof(struct vmxnet3_adapter)); 1774d1a890faSShreyas Bhatewara 1775d1a890faSShreyas Bhatewara /* set up feature flags */ 1776d1a890faSShreyas Bhatewara if (adapter->rxcsum) 1777115924b6SShreyas Bhatewara set_flag_le64(&devRead->misc.uptFeatures, UPT1_F_RXCSUM); 1778d1a890faSShreyas Bhatewara 1779d1a890faSShreyas Bhatewara if (adapter->lro) { 1780115924b6SShreyas Bhatewara set_flag_le64(&devRead->misc.uptFeatures, UPT1_F_LRO); 1781115924b6SShreyas Bhatewara devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS); 1782d1a890faSShreyas Bhatewara } 17838e95a202SJoe Perches if ((adapter->netdev->features & NETIF_F_HW_VLAN_RX) && 17848e95a202SJoe Perches adapter->vlan_grp) { 1785115924b6SShreyas Bhatewara set_flag_le64(&devRead->misc.uptFeatures, UPT1_F_RXVLAN); 1786d1a890faSShreyas Bhatewara } 1787d1a890faSShreyas Bhatewara 1788115924b6SShreyas Bhatewara devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu); 1789115924b6SShreyas Bhatewara devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa); 1790115924b6SShreyas Bhatewara devRead->misc.queueDescLen = cpu_to_le32( 1791115924b6SShreyas Bhatewara sizeof(struct Vmxnet3_TxQueueDesc) + 1792115924b6SShreyas Bhatewara sizeof(struct Vmxnet3_RxQueueDesc)); 1793d1a890faSShreyas Bhatewara 1794d1a890faSShreyas Bhatewara /* tx queue settings */ 1795d1a890faSShreyas Bhatewara BUG_ON(adapter->tx_queue.tx_ring.base == NULL); 1796d1a890faSShreyas Bhatewara 1797d1a890faSShreyas Bhatewara devRead->misc.numTxQueues = 1; 1798d1a890faSShreyas Bhatewara tqc = &adapter->tqd_start->conf; 1799115924b6SShreyas Bhatewara tqc->txRingBasePA = cpu_to_le64(adapter->tx_queue.tx_ring.basePA); 1800115924b6SShreyas Bhatewara tqc->dataRingBasePA = cpu_to_le64(adapter->tx_queue.data_ring.basePA); 1801115924b6SShreyas Bhatewara tqc->compRingBasePA = cpu_to_le64(adapter->tx_queue.comp_ring.basePA); 1802115924b6SShreyas Bhatewara tqc->ddPA = cpu_to_le64(virt_to_phys( 1803115924b6SShreyas Bhatewara adapter->tx_queue.buf_info)); 1804115924b6SShreyas Bhatewara tqc->txRingSize = cpu_to_le32(adapter->tx_queue.tx_ring.size); 1805115924b6SShreyas Bhatewara tqc->dataRingSize = cpu_to_le32(adapter->tx_queue.data_ring.size); 1806115924b6SShreyas Bhatewara tqc->compRingSize = cpu_to_le32(adapter->tx_queue.comp_ring.size); 1807115924b6SShreyas Bhatewara tqc->ddLen = cpu_to_le32(sizeof(struct vmxnet3_tx_buf_info) * 1808115924b6SShreyas Bhatewara tqc->txRingSize); 1809d1a890faSShreyas Bhatewara tqc->intrIdx = adapter->tx_queue.comp_ring.intr_idx; 1810d1a890faSShreyas Bhatewara 1811d1a890faSShreyas Bhatewara /* rx queue settings */ 1812d1a890faSShreyas Bhatewara devRead->misc.numRxQueues = 1; 1813d1a890faSShreyas Bhatewara rqc = &adapter->rqd_start->conf; 1814115924b6SShreyas Bhatewara rqc->rxRingBasePA[0] = cpu_to_le64(adapter->rx_queue.rx_ring[0].basePA); 1815115924b6SShreyas Bhatewara rqc->rxRingBasePA[1] = cpu_to_le64(adapter->rx_queue.rx_ring[1].basePA); 1816115924b6SShreyas Bhatewara rqc->compRingBasePA = cpu_to_le64(adapter->rx_queue.comp_ring.basePA); 1817115924b6SShreyas Bhatewara rqc->ddPA = cpu_to_le64(virt_to_phys( 1818115924b6SShreyas Bhatewara adapter->rx_queue.buf_info)); 1819115924b6SShreyas Bhatewara rqc->rxRingSize[0] = cpu_to_le32(adapter->rx_queue.rx_ring[0].size); 1820115924b6SShreyas Bhatewara rqc->rxRingSize[1] = cpu_to_le32(adapter->rx_queue.rx_ring[1].size); 1821115924b6SShreyas Bhatewara rqc->compRingSize = cpu_to_le32(adapter->rx_queue.comp_ring.size); 1822115924b6SShreyas Bhatewara rqc->ddLen = cpu_to_le32(sizeof(struct vmxnet3_rx_buf_info) * 1823115924b6SShreyas Bhatewara (rqc->rxRingSize[0] + rqc->rxRingSize[1])); 1824d1a890faSShreyas Bhatewara rqc->intrIdx = adapter->rx_queue.comp_ring.intr_idx; 1825d1a890faSShreyas Bhatewara 1826d1a890faSShreyas Bhatewara /* intr settings */ 1827d1a890faSShreyas Bhatewara devRead->intrConf.autoMask = adapter->intr.mask_mode == 1828d1a890faSShreyas Bhatewara VMXNET3_IMM_AUTO; 1829d1a890faSShreyas Bhatewara devRead->intrConf.numIntrs = adapter->intr.num_intrs; 1830d1a890faSShreyas Bhatewara for (i = 0; i < adapter->intr.num_intrs; i++) 1831d1a890faSShreyas Bhatewara devRead->intrConf.modLevels[i] = adapter->intr.mod_levels[i]; 1832d1a890faSShreyas Bhatewara 1833d1a890faSShreyas Bhatewara devRead->intrConf.eventIntrIdx = adapter->intr.event_intr_idx; 18346929fe8aSRonghua Zang devRead->intrConf.intrCtrl |= cpu_to_le32(VMXNET3_IC_DISABLE_ALL); 1835d1a890faSShreyas Bhatewara 1836d1a890faSShreyas Bhatewara /* rx filter settings */ 1837d1a890faSShreyas Bhatewara devRead->rxFilterConf.rxMode = 0; 1838d1a890faSShreyas Bhatewara vmxnet3_restore_vlan(adapter); 1839d1a890faSShreyas Bhatewara /* the rest are already zeroed */ 1840d1a890faSShreyas Bhatewara } 1841d1a890faSShreyas Bhatewara 1842d1a890faSShreyas Bhatewara 1843d1a890faSShreyas Bhatewara int 1844d1a890faSShreyas Bhatewara vmxnet3_activate_dev(struct vmxnet3_adapter *adapter) 1845d1a890faSShreyas Bhatewara { 1846d1a890faSShreyas Bhatewara int err; 1847d1a890faSShreyas Bhatewara u32 ret; 1848d1a890faSShreyas Bhatewara 1849f6965582SRandy Dunlap dev_dbg(&adapter->netdev->dev, 1850f6965582SRandy Dunlap "%s: skb_buf_size %d, rx_buf_per_pkt %d, ring sizes" 1851d1a890faSShreyas Bhatewara " %u %u %u\n", adapter->netdev->name, adapter->skb_buf_size, 1852d1a890faSShreyas Bhatewara adapter->rx_buf_per_pkt, adapter->tx_queue.tx_ring.size, 1853d1a890faSShreyas Bhatewara adapter->rx_queue.rx_ring[0].size, 1854d1a890faSShreyas Bhatewara adapter->rx_queue.rx_ring[1].size); 1855d1a890faSShreyas Bhatewara 1856d1a890faSShreyas Bhatewara vmxnet3_tq_init(&adapter->tx_queue, adapter); 1857d1a890faSShreyas Bhatewara err = vmxnet3_rq_init(&adapter->rx_queue, adapter); 1858d1a890faSShreyas Bhatewara if (err) { 1859d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to init rx queue for %s: error %d\n", 1860d1a890faSShreyas Bhatewara adapter->netdev->name, err); 1861d1a890faSShreyas Bhatewara goto rq_err; 1862d1a890faSShreyas Bhatewara } 1863d1a890faSShreyas Bhatewara 1864d1a890faSShreyas Bhatewara err = vmxnet3_request_irqs(adapter); 1865d1a890faSShreyas Bhatewara if (err) { 1866d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to setup irq for %s: error %d\n", 1867d1a890faSShreyas Bhatewara adapter->netdev->name, err); 1868d1a890faSShreyas Bhatewara goto irq_err; 1869d1a890faSShreyas Bhatewara } 1870d1a890faSShreyas Bhatewara 1871d1a890faSShreyas Bhatewara vmxnet3_setup_driver_shared(adapter); 1872d1a890faSShreyas Bhatewara 1873115924b6SShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, VMXNET3_GET_ADDR_LO( 1874115924b6SShreyas Bhatewara adapter->shared_pa)); 1875115924b6SShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI( 1876115924b6SShreyas Bhatewara adapter->shared_pa)); 1877d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1878d1a890faSShreyas Bhatewara VMXNET3_CMD_ACTIVATE_DEV); 1879d1a890faSShreyas Bhatewara ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 1880d1a890faSShreyas Bhatewara 1881d1a890faSShreyas Bhatewara if (ret != 0) { 1882d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to activate dev %s: error %u\n", 1883d1a890faSShreyas Bhatewara adapter->netdev->name, ret); 1884d1a890faSShreyas Bhatewara err = -EINVAL; 1885d1a890faSShreyas Bhatewara goto activate_err; 1886d1a890faSShreyas Bhatewara } 1887d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_RXPROD, 1888d1a890faSShreyas Bhatewara adapter->rx_queue.rx_ring[0].next2fill); 1889d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_RXPROD2, 1890d1a890faSShreyas Bhatewara adapter->rx_queue.rx_ring[1].next2fill); 1891d1a890faSShreyas Bhatewara 1892d1a890faSShreyas Bhatewara /* Apply the rx filter settins last. */ 1893d1a890faSShreyas Bhatewara vmxnet3_set_mc(adapter->netdev); 1894d1a890faSShreyas Bhatewara 1895d1a890faSShreyas Bhatewara /* 1896d1a890faSShreyas Bhatewara * Check link state when first activating device. It will start the 1897d1a890faSShreyas Bhatewara * tx queue if the link is up. 1898d1a890faSShreyas Bhatewara */ 18994a1745fcSShreyas Bhatewara vmxnet3_check_link(adapter, true); 1900d1a890faSShreyas Bhatewara 1901d1a890faSShreyas Bhatewara napi_enable(&adapter->napi); 1902d1a890faSShreyas Bhatewara vmxnet3_enable_all_intrs(adapter); 1903d1a890faSShreyas Bhatewara clear_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state); 1904d1a890faSShreyas Bhatewara return 0; 1905d1a890faSShreyas Bhatewara 1906d1a890faSShreyas Bhatewara activate_err: 1907d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, 0); 1908d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, 0); 1909d1a890faSShreyas Bhatewara vmxnet3_free_irqs(adapter); 1910d1a890faSShreyas Bhatewara irq_err: 1911d1a890faSShreyas Bhatewara rq_err: 1912d1a890faSShreyas Bhatewara /* free up buffers we allocated */ 1913d1a890faSShreyas Bhatewara vmxnet3_rq_cleanup(&adapter->rx_queue, adapter); 1914d1a890faSShreyas Bhatewara return err; 1915d1a890faSShreyas Bhatewara } 1916d1a890faSShreyas Bhatewara 1917d1a890faSShreyas Bhatewara 1918d1a890faSShreyas Bhatewara void 1919d1a890faSShreyas Bhatewara vmxnet3_reset_dev(struct vmxnet3_adapter *adapter) 1920d1a890faSShreyas Bhatewara { 1921d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV); 1922d1a890faSShreyas Bhatewara } 1923d1a890faSShreyas Bhatewara 1924d1a890faSShreyas Bhatewara 1925d1a890faSShreyas Bhatewara int 1926d1a890faSShreyas Bhatewara vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter) 1927d1a890faSShreyas Bhatewara { 1928d1a890faSShreyas Bhatewara if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state)) 1929d1a890faSShreyas Bhatewara return 0; 1930d1a890faSShreyas Bhatewara 1931d1a890faSShreyas Bhatewara 1932d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1933d1a890faSShreyas Bhatewara VMXNET3_CMD_QUIESCE_DEV); 1934d1a890faSShreyas Bhatewara vmxnet3_disable_all_intrs(adapter); 1935d1a890faSShreyas Bhatewara 1936d1a890faSShreyas Bhatewara napi_disable(&adapter->napi); 1937d1a890faSShreyas Bhatewara netif_tx_disable(adapter->netdev); 1938d1a890faSShreyas Bhatewara adapter->link_speed = 0; 1939d1a890faSShreyas Bhatewara netif_carrier_off(adapter->netdev); 1940d1a890faSShreyas Bhatewara 1941d1a890faSShreyas Bhatewara vmxnet3_tq_cleanup(&adapter->tx_queue, adapter); 1942d1a890faSShreyas Bhatewara vmxnet3_rq_cleanup(&adapter->rx_queue, adapter); 1943d1a890faSShreyas Bhatewara vmxnet3_free_irqs(adapter); 1944d1a890faSShreyas Bhatewara return 0; 1945d1a890faSShreyas Bhatewara } 1946d1a890faSShreyas Bhatewara 1947d1a890faSShreyas Bhatewara 1948d1a890faSShreyas Bhatewara static void 1949d1a890faSShreyas Bhatewara vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac) 1950d1a890faSShreyas Bhatewara { 1951d1a890faSShreyas Bhatewara u32 tmp; 1952d1a890faSShreyas Bhatewara 1953d1a890faSShreyas Bhatewara tmp = *(u32 *)mac; 1954d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACL, tmp); 1955d1a890faSShreyas Bhatewara 1956d1a890faSShreyas Bhatewara tmp = (mac[5] << 8) | mac[4]; 1957d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACH, tmp); 1958d1a890faSShreyas Bhatewara } 1959d1a890faSShreyas Bhatewara 1960d1a890faSShreyas Bhatewara 1961d1a890faSShreyas Bhatewara static int 1962d1a890faSShreyas Bhatewara vmxnet3_set_mac_addr(struct net_device *netdev, void *p) 1963d1a890faSShreyas Bhatewara { 1964d1a890faSShreyas Bhatewara struct sockaddr *addr = p; 1965d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1966d1a890faSShreyas Bhatewara 1967d1a890faSShreyas Bhatewara memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 1968d1a890faSShreyas Bhatewara vmxnet3_write_mac_addr(adapter, addr->sa_data); 1969d1a890faSShreyas Bhatewara 1970d1a890faSShreyas Bhatewara return 0; 1971d1a890faSShreyas Bhatewara } 1972d1a890faSShreyas Bhatewara 1973d1a890faSShreyas Bhatewara 1974d1a890faSShreyas Bhatewara /* ==================== initialization and cleanup routines ============ */ 1975d1a890faSShreyas Bhatewara 1976d1a890faSShreyas Bhatewara static int 1977d1a890faSShreyas Bhatewara vmxnet3_alloc_pci_resources(struct vmxnet3_adapter *adapter, bool *dma64) 1978d1a890faSShreyas Bhatewara { 1979d1a890faSShreyas Bhatewara int err; 1980d1a890faSShreyas Bhatewara unsigned long mmio_start, mmio_len; 1981d1a890faSShreyas Bhatewara struct pci_dev *pdev = adapter->pdev; 1982d1a890faSShreyas Bhatewara 1983d1a890faSShreyas Bhatewara err = pci_enable_device(pdev); 1984d1a890faSShreyas Bhatewara if (err) { 1985d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to enable adapter %s: error %d\n", 1986d1a890faSShreyas Bhatewara pci_name(pdev), err); 1987d1a890faSShreyas Bhatewara return err; 1988d1a890faSShreyas Bhatewara } 1989d1a890faSShreyas Bhatewara 1990d1a890faSShreyas Bhatewara if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) { 1991d1a890faSShreyas Bhatewara if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) { 1992d1a890faSShreyas Bhatewara printk(KERN_ERR "pci_set_consistent_dma_mask failed " 1993d1a890faSShreyas Bhatewara "for adapter %s\n", pci_name(pdev)); 1994d1a890faSShreyas Bhatewara err = -EIO; 1995d1a890faSShreyas Bhatewara goto err_set_mask; 1996d1a890faSShreyas Bhatewara } 1997d1a890faSShreyas Bhatewara *dma64 = true; 1998d1a890faSShreyas Bhatewara } else { 1999d1a890faSShreyas Bhatewara if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) { 2000d1a890faSShreyas Bhatewara printk(KERN_ERR "pci_set_dma_mask failed for adapter " 2001d1a890faSShreyas Bhatewara "%s\n", pci_name(pdev)); 2002d1a890faSShreyas Bhatewara err = -EIO; 2003d1a890faSShreyas Bhatewara goto err_set_mask; 2004d1a890faSShreyas Bhatewara } 2005d1a890faSShreyas Bhatewara *dma64 = false; 2006d1a890faSShreyas Bhatewara } 2007d1a890faSShreyas Bhatewara 2008d1a890faSShreyas Bhatewara err = pci_request_selected_regions(pdev, (1 << 2) - 1, 2009d1a890faSShreyas Bhatewara vmxnet3_driver_name); 2010d1a890faSShreyas Bhatewara if (err) { 2011d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to request region for adapter %s: " 2012d1a890faSShreyas Bhatewara "error %d\n", pci_name(pdev), err); 2013d1a890faSShreyas Bhatewara goto err_set_mask; 2014d1a890faSShreyas Bhatewara } 2015d1a890faSShreyas Bhatewara 2016d1a890faSShreyas Bhatewara pci_set_master(pdev); 2017d1a890faSShreyas Bhatewara 2018d1a890faSShreyas Bhatewara mmio_start = pci_resource_start(pdev, 0); 2019d1a890faSShreyas Bhatewara mmio_len = pci_resource_len(pdev, 0); 2020d1a890faSShreyas Bhatewara adapter->hw_addr0 = ioremap(mmio_start, mmio_len); 2021d1a890faSShreyas Bhatewara if (!adapter->hw_addr0) { 2022d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to map bar0 for adapter %s\n", 2023d1a890faSShreyas Bhatewara pci_name(pdev)); 2024d1a890faSShreyas Bhatewara err = -EIO; 2025d1a890faSShreyas Bhatewara goto err_ioremap; 2026d1a890faSShreyas Bhatewara } 2027d1a890faSShreyas Bhatewara 2028d1a890faSShreyas Bhatewara mmio_start = pci_resource_start(pdev, 1); 2029d1a890faSShreyas Bhatewara mmio_len = pci_resource_len(pdev, 1); 2030d1a890faSShreyas Bhatewara adapter->hw_addr1 = ioremap(mmio_start, mmio_len); 2031d1a890faSShreyas Bhatewara if (!adapter->hw_addr1) { 2032d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to map bar1 for adapter %s\n", 2033d1a890faSShreyas Bhatewara pci_name(pdev)); 2034d1a890faSShreyas Bhatewara err = -EIO; 2035d1a890faSShreyas Bhatewara goto err_bar1; 2036d1a890faSShreyas Bhatewara } 2037d1a890faSShreyas Bhatewara return 0; 2038d1a890faSShreyas Bhatewara 2039d1a890faSShreyas Bhatewara err_bar1: 2040d1a890faSShreyas Bhatewara iounmap(adapter->hw_addr0); 2041d1a890faSShreyas Bhatewara err_ioremap: 2042d1a890faSShreyas Bhatewara pci_release_selected_regions(pdev, (1 << 2) - 1); 2043d1a890faSShreyas Bhatewara err_set_mask: 2044d1a890faSShreyas Bhatewara pci_disable_device(pdev); 2045d1a890faSShreyas Bhatewara return err; 2046d1a890faSShreyas Bhatewara } 2047d1a890faSShreyas Bhatewara 2048d1a890faSShreyas Bhatewara 2049d1a890faSShreyas Bhatewara static void 2050d1a890faSShreyas Bhatewara vmxnet3_free_pci_resources(struct vmxnet3_adapter *adapter) 2051d1a890faSShreyas Bhatewara { 2052d1a890faSShreyas Bhatewara BUG_ON(!adapter->pdev); 2053d1a890faSShreyas Bhatewara 2054d1a890faSShreyas Bhatewara iounmap(adapter->hw_addr0); 2055d1a890faSShreyas Bhatewara iounmap(adapter->hw_addr1); 2056d1a890faSShreyas Bhatewara pci_release_selected_regions(adapter->pdev, (1 << 2) - 1); 2057d1a890faSShreyas Bhatewara pci_disable_device(adapter->pdev); 2058d1a890faSShreyas Bhatewara } 2059d1a890faSShreyas Bhatewara 2060d1a890faSShreyas Bhatewara 2061d1a890faSShreyas Bhatewara static void 2062d1a890faSShreyas Bhatewara vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter) 2063d1a890faSShreyas Bhatewara { 2064d1a890faSShreyas Bhatewara size_t sz; 2065d1a890faSShreyas Bhatewara 2066d1a890faSShreyas Bhatewara if (adapter->netdev->mtu <= VMXNET3_MAX_SKB_BUF_SIZE - 2067d1a890faSShreyas Bhatewara VMXNET3_MAX_ETH_HDR_SIZE) { 2068d1a890faSShreyas Bhatewara adapter->skb_buf_size = adapter->netdev->mtu + 2069d1a890faSShreyas Bhatewara VMXNET3_MAX_ETH_HDR_SIZE; 2070d1a890faSShreyas Bhatewara if (adapter->skb_buf_size < VMXNET3_MIN_T0_BUF_SIZE) 2071d1a890faSShreyas Bhatewara adapter->skb_buf_size = VMXNET3_MIN_T0_BUF_SIZE; 2072d1a890faSShreyas Bhatewara 2073d1a890faSShreyas Bhatewara adapter->rx_buf_per_pkt = 1; 2074d1a890faSShreyas Bhatewara } else { 2075d1a890faSShreyas Bhatewara adapter->skb_buf_size = VMXNET3_MAX_SKB_BUF_SIZE; 2076d1a890faSShreyas Bhatewara sz = adapter->netdev->mtu - VMXNET3_MAX_SKB_BUF_SIZE + 2077d1a890faSShreyas Bhatewara VMXNET3_MAX_ETH_HDR_SIZE; 2078d1a890faSShreyas Bhatewara adapter->rx_buf_per_pkt = 1 + (sz + PAGE_SIZE - 1) / PAGE_SIZE; 2079d1a890faSShreyas Bhatewara } 2080d1a890faSShreyas Bhatewara 2081d1a890faSShreyas Bhatewara /* 2082d1a890faSShreyas Bhatewara * for simplicity, force the ring0 size to be a multiple of 2083d1a890faSShreyas Bhatewara * rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN 2084d1a890faSShreyas Bhatewara */ 2085d1a890faSShreyas Bhatewara sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN; 2086d1a890faSShreyas Bhatewara adapter->rx_queue.rx_ring[0].size = (adapter->rx_queue.rx_ring[0].size + 2087d1a890faSShreyas Bhatewara sz - 1) / sz * sz; 2088d1a890faSShreyas Bhatewara adapter->rx_queue.rx_ring[0].size = min_t(u32, 2089d1a890faSShreyas Bhatewara adapter->rx_queue.rx_ring[0].size, 2090d1a890faSShreyas Bhatewara VMXNET3_RX_RING_MAX_SIZE / sz * sz); 2091d1a890faSShreyas Bhatewara } 2092d1a890faSShreyas Bhatewara 2093d1a890faSShreyas Bhatewara 2094d1a890faSShreyas Bhatewara int 2095d1a890faSShreyas Bhatewara vmxnet3_create_queues(struct vmxnet3_adapter *adapter, u32 tx_ring_size, 2096d1a890faSShreyas Bhatewara u32 rx_ring_size, u32 rx_ring2_size) 2097d1a890faSShreyas Bhatewara { 2098d1a890faSShreyas Bhatewara int err; 2099d1a890faSShreyas Bhatewara 2100d1a890faSShreyas Bhatewara adapter->tx_queue.tx_ring.size = tx_ring_size; 2101d1a890faSShreyas Bhatewara adapter->tx_queue.data_ring.size = tx_ring_size; 2102d1a890faSShreyas Bhatewara adapter->tx_queue.comp_ring.size = tx_ring_size; 2103d1a890faSShreyas Bhatewara adapter->tx_queue.shared = &adapter->tqd_start->ctrl; 2104d1a890faSShreyas Bhatewara adapter->tx_queue.stopped = true; 2105d1a890faSShreyas Bhatewara err = vmxnet3_tq_create(&adapter->tx_queue, adapter); 2106d1a890faSShreyas Bhatewara if (err) 2107d1a890faSShreyas Bhatewara return err; 2108d1a890faSShreyas Bhatewara 2109d1a890faSShreyas Bhatewara adapter->rx_queue.rx_ring[0].size = rx_ring_size; 2110d1a890faSShreyas Bhatewara adapter->rx_queue.rx_ring[1].size = rx_ring2_size; 2111d1a890faSShreyas Bhatewara vmxnet3_adjust_rx_ring_size(adapter); 2112d1a890faSShreyas Bhatewara adapter->rx_queue.comp_ring.size = adapter->rx_queue.rx_ring[0].size + 2113d1a890faSShreyas Bhatewara adapter->rx_queue.rx_ring[1].size; 2114d1a890faSShreyas Bhatewara adapter->rx_queue.qid = 0; 2115d1a890faSShreyas Bhatewara adapter->rx_queue.qid2 = 1; 2116d1a890faSShreyas Bhatewara adapter->rx_queue.shared = &adapter->rqd_start->ctrl; 2117d1a890faSShreyas Bhatewara err = vmxnet3_rq_create(&adapter->rx_queue, adapter); 2118d1a890faSShreyas Bhatewara if (err) 2119d1a890faSShreyas Bhatewara vmxnet3_tq_destroy(&adapter->tx_queue, adapter); 2120d1a890faSShreyas Bhatewara 2121d1a890faSShreyas Bhatewara return err; 2122d1a890faSShreyas Bhatewara } 2123d1a890faSShreyas Bhatewara 2124d1a890faSShreyas Bhatewara static int 2125d1a890faSShreyas Bhatewara vmxnet3_open(struct net_device *netdev) 2126d1a890faSShreyas Bhatewara { 2127d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter; 2128d1a890faSShreyas Bhatewara int err; 2129d1a890faSShreyas Bhatewara 2130d1a890faSShreyas Bhatewara adapter = netdev_priv(netdev); 2131d1a890faSShreyas Bhatewara 2132d1a890faSShreyas Bhatewara spin_lock_init(&adapter->tx_queue.tx_lock); 2133d1a890faSShreyas Bhatewara 2134d1a890faSShreyas Bhatewara err = vmxnet3_create_queues(adapter, VMXNET3_DEF_TX_RING_SIZE, 2135d1a890faSShreyas Bhatewara VMXNET3_DEF_RX_RING_SIZE, 2136d1a890faSShreyas Bhatewara VMXNET3_DEF_RX_RING_SIZE); 2137d1a890faSShreyas Bhatewara if (err) 2138d1a890faSShreyas Bhatewara goto queue_err; 2139d1a890faSShreyas Bhatewara 2140d1a890faSShreyas Bhatewara err = vmxnet3_activate_dev(adapter); 2141d1a890faSShreyas Bhatewara if (err) 2142d1a890faSShreyas Bhatewara goto activate_err; 2143d1a890faSShreyas Bhatewara 2144d1a890faSShreyas Bhatewara return 0; 2145d1a890faSShreyas Bhatewara 2146d1a890faSShreyas Bhatewara activate_err: 2147d1a890faSShreyas Bhatewara vmxnet3_rq_destroy(&adapter->rx_queue, adapter); 2148d1a890faSShreyas Bhatewara vmxnet3_tq_destroy(&adapter->tx_queue, adapter); 2149d1a890faSShreyas Bhatewara queue_err: 2150d1a890faSShreyas Bhatewara return err; 2151d1a890faSShreyas Bhatewara } 2152d1a890faSShreyas Bhatewara 2153d1a890faSShreyas Bhatewara 2154d1a890faSShreyas Bhatewara static int 2155d1a890faSShreyas Bhatewara vmxnet3_close(struct net_device *netdev) 2156d1a890faSShreyas Bhatewara { 2157d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2158d1a890faSShreyas Bhatewara 2159d1a890faSShreyas Bhatewara /* 2160d1a890faSShreyas Bhatewara * Reset_work may be in the middle of resetting the device, wait for its 2161d1a890faSShreyas Bhatewara * completion. 2162d1a890faSShreyas Bhatewara */ 2163d1a890faSShreyas Bhatewara while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)) 2164d1a890faSShreyas Bhatewara msleep(1); 2165d1a890faSShreyas Bhatewara 2166d1a890faSShreyas Bhatewara vmxnet3_quiesce_dev(adapter); 2167d1a890faSShreyas Bhatewara 2168d1a890faSShreyas Bhatewara vmxnet3_rq_destroy(&adapter->rx_queue, adapter); 2169d1a890faSShreyas Bhatewara vmxnet3_tq_destroy(&adapter->tx_queue, adapter); 2170d1a890faSShreyas Bhatewara 2171d1a890faSShreyas Bhatewara clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state); 2172d1a890faSShreyas Bhatewara 2173d1a890faSShreyas Bhatewara 2174d1a890faSShreyas Bhatewara return 0; 2175d1a890faSShreyas Bhatewara } 2176d1a890faSShreyas Bhatewara 2177d1a890faSShreyas Bhatewara 2178d1a890faSShreyas Bhatewara void 2179d1a890faSShreyas Bhatewara vmxnet3_force_close(struct vmxnet3_adapter *adapter) 2180d1a890faSShreyas Bhatewara { 2181d1a890faSShreyas Bhatewara /* 2182d1a890faSShreyas Bhatewara * we must clear VMXNET3_STATE_BIT_RESETTING, otherwise 2183d1a890faSShreyas Bhatewara * vmxnet3_close() will deadlock. 2184d1a890faSShreyas Bhatewara */ 2185d1a890faSShreyas Bhatewara BUG_ON(test_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)); 2186d1a890faSShreyas Bhatewara 2187d1a890faSShreyas Bhatewara /* we need to enable NAPI, otherwise dev_close will deadlock */ 2188d1a890faSShreyas Bhatewara napi_enable(&adapter->napi); 2189d1a890faSShreyas Bhatewara dev_close(adapter->netdev); 2190d1a890faSShreyas Bhatewara } 2191d1a890faSShreyas Bhatewara 2192d1a890faSShreyas Bhatewara 2193d1a890faSShreyas Bhatewara static int 2194d1a890faSShreyas Bhatewara vmxnet3_change_mtu(struct net_device *netdev, int new_mtu) 2195d1a890faSShreyas Bhatewara { 2196d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2197d1a890faSShreyas Bhatewara int err = 0; 2198d1a890faSShreyas Bhatewara 2199d1a890faSShreyas Bhatewara if (new_mtu < VMXNET3_MIN_MTU || new_mtu > VMXNET3_MAX_MTU) 2200d1a890faSShreyas Bhatewara return -EINVAL; 2201d1a890faSShreyas Bhatewara 2202d1a890faSShreyas Bhatewara if (new_mtu > 1500 && !adapter->jumbo_frame) 2203d1a890faSShreyas Bhatewara return -EINVAL; 2204d1a890faSShreyas Bhatewara 2205d1a890faSShreyas Bhatewara netdev->mtu = new_mtu; 2206d1a890faSShreyas Bhatewara 2207d1a890faSShreyas Bhatewara /* 2208d1a890faSShreyas Bhatewara * Reset_work may be in the middle of resetting the device, wait for its 2209d1a890faSShreyas Bhatewara * completion. 2210d1a890faSShreyas Bhatewara */ 2211d1a890faSShreyas Bhatewara while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)) 2212d1a890faSShreyas Bhatewara msleep(1); 2213d1a890faSShreyas Bhatewara 2214d1a890faSShreyas Bhatewara if (netif_running(netdev)) { 2215d1a890faSShreyas Bhatewara vmxnet3_quiesce_dev(adapter); 2216d1a890faSShreyas Bhatewara vmxnet3_reset_dev(adapter); 2217d1a890faSShreyas Bhatewara 2218d1a890faSShreyas Bhatewara /* we need to re-create the rx queue based on the new mtu */ 2219d1a890faSShreyas Bhatewara vmxnet3_rq_destroy(&adapter->rx_queue, adapter); 2220d1a890faSShreyas Bhatewara vmxnet3_adjust_rx_ring_size(adapter); 2221d1a890faSShreyas Bhatewara adapter->rx_queue.comp_ring.size = 2222d1a890faSShreyas Bhatewara adapter->rx_queue.rx_ring[0].size + 2223d1a890faSShreyas Bhatewara adapter->rx_queue.rx_ring[1].size; 2224d1a890faSShreyas Bhatewara err = vmxnet3_rq_create(&adapter->rx_queue, adapter); 2225d1a890faSShreyas Bhatewara if (err) { 2226d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to re-create rx queue," 2227d1a890faSShreyas Bhatewara " error %d. Closing it.\n", netdev->name, err); 2228d1a890faSShreyas Bhatewara goto out; 2229d1a890faSShreyas Bhatewara } 2230d1a890faSShreyas Bhatewara 2231d1a890faSShreyas Bhatewara err = vmxnet3_activate_dev(adapter); 2232d1a890faSShreyas Bhatewara if (err) { 2233d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: failed to re-activate, error %d. " 2234d1a890faSShreyas Bhatewara "Closing it\n", netdev->name, err); 2235d1a890faSShreyas Bhatewara goto out; 2236d1a890faSShreyas Bhatewara } 2237d1a890faSShreyas Bhatewara } 2238d1a890faSShreyas Bhatewara 2239d1a890faSShreyas Bhatewara out: 2240d1a890faSShreyas Bhatewara clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state); 2241d1a890faSShreyas Bhatewara if (err) 2242d1a890faSShreyas Bhatewara vmxnet3_force_close(adapter); 2243d1a890faSShreyas Bhatewara 2244d1a890faSShreyas Bhatewara return err; 2245d1a890faSShreyas Bhatewara } 2246d1a890faSShreyas Bhatewara 2247d1a890faSShreyas Bhatewara 2248d1a890faSShreyas Bhatewara static void 2249d1a890faSShreyas Bhatewara vmxnet3_declare_features(struct vmxnet3_adapter *adapter, bool dma64) 2250d1a890faSShreyas Bhatewara { 2251d1a890faSShreyas Bhatewara struct net_device *netdev = adapter->netdev; 2252d1a890faSShreyas Bhatewara 2253d1a890faSShreyas Bhatewara netdev->features = NETIF_F_SG | 2254d1a890faSShreyas Bhatewara NETIF_F_HW_CSUM | 2255d1a890faSShreyas Bhatewara NETIF_F_HW_VLAN_TX | 2256d1a890faSShreyas Bhatewara NETIF_F_HW_VLAN_RX | 2257d1a890faSShreyas Bhatewara NETIF_F_HW_VLAN_FILTER | 2258d1a890faSShreyas Bhatewara NETIF_F_TSO | 2259d1a890faSShreyas Bhatewara NETIF_F_TSO6 | 2260d1a890faSShreyas Bhatewara NETIF_F_LRO; 2261d1a890faSShreyas Bhatewara 2262d1a890faSShreyas Bhatewara printk(KERN_INFO "features: sg csum vlan jf tso tsoIPv6 lro"); 2263d1a890faSShreyas Bhatewara 2264d1a890faSShreyas Bhatewara adapter->rxcsum = true; 2265d1a890faSShreyas Bhatewara adapter->jumbo_frame = true; 2266d1a890faSShreyas Bhatewara adapter->lro = true; 2267d1a890faSShreyas Bhatewara 2268d1a890faSShreyas Bhatewara if (dma64) { 2269d1a890faSShreyas Bhatewara netdev->features |= NETIF_F_HIGHDMA; 2270d1a890faSShreyas Bhatewara printk(" highDMA"); 2271d1a890faSShreyas Bhatewara } 2272d1a890faSShreyas Bhatewara 2273d1a890faSShreyas Bhatewara netdev->vlan_features = netdev->features; 2274d1a890faSShreyas Bhatewara printk("\n"); 2275d1a890faSShreyas Bhatewara } 2276d1a890faSShreyas Bhatewara 2277d1a890faSShreyas Bhatewara 2278d1a890faSShreyas Bhatewara static void 2279d1a890faSShreyas Bhatewara vmxnet3_read_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac) 2280d1a890faSShreyas Bhatewara { 2281d1a890faSShreyas Bhatewara u32 tmp; 2282d1a890faSShreyas Bhatewara 2283d1a890faSShreyas Bhatewara tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACL); 2284d1a890faSShreyas Bhatewara *(u32 *)mac = tmp; 2285d1a890faSShreyas Bhatewara 2286d1a890faSShreyas Bhatewara tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACH); 2287d1a890faSShreyas Bhatewara mac[4] = tmp & 0xff; 2288d1a890faSShreyas Bhatewara mac[5] = (tmp >> 8) & 0xff; 2289d1a890faSShreyas Bhatewara } 2290d1a890faSShreyas Bhatewara 2291d1a890faSShreyas Bhatewara 2292d1a890faSShreyas Bhatewara static void 2293d1a890faSShreyas Bhatewara vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter) 2294d1a890faSShreyas Bhatewara { 2295d1a890faSShreyas Bhatewara u32 cfg; 2296d1a890faSShreyas Bhatewara 2297d1a890faSShreyas Bhatewara /* intr settings */ 2298d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2299d1a890faSShreyas Bhatewara VMXNET3_CMD_GET_CONF_INTR); 2300d1a890faSShreyas Bhatewara cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 2301d1a890faSShreyas Bhatewara adapter->intr.type = cfg & 0x3; 2302d1a890faSShreyas Bhatewara adapter->intr.mask_mode = (cfg >> 2) & 0x3; 2303d1a890faSShreyas Bhatewara 2304d1a890faSShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_AUTO) { 23050bdc0d70SShreyas Bhatewara adapter->intr.type = VMXNET3_IT_MSIX; 23060bdc0d70SShreyas Bhatewara } 2307d1a890faSShreyas Bhatewara 23088f7e524cSRandy Dunlap #ifdef CONFIG_PCI_MSI 23090bdc0d70SShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_MSIX) { 23100bdc0d70SShreyas Bhatewara int err; 23110bdc0d70SShreyas Bhatewara 2312d1a890faSShreyas Bhatewara adapter->intr.msix_entries[0].entry = 0; 2313d1a890faSShreyas Bhatewara err = pci_enable_msix(adapter->pdev, adapter->intr.msix_entries, 2314d1a890faSShreyas Bhatewara VMXNET3_LINUX_MAX_MSIX_VECT); 2315d1a890faSShreyas Bhatewara if (!err) { 2316d1a890faSShreyas Bhatewara adapter->intr.num_intrs = 1; 2317d1a890faSShreyas Bhatewara adapter->intr.type = VMXNET3_IT_MSIX; 2318d1a890faSShreyas Bhatewara return; 2319d1a890faSShreyas Bhatewara } 23200bdc0d70SShreyas Bhatewara adapter->intr.type = VMXNET3_IT_MSI; 23210bdc0d70SShreyas Bhatewara } 2322d1a890faSShreyas Bhatewara 23230bdc0d70SShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_MSI) { 23240bdc0d70SShreyas Bhatewara int err; 2325d1a890faSShreyas Bhatewara err = pci_enable_msi(adapter->pdev); 2326d1a890faSShreyas Bhatewara if (!err) { 2327d1a890faSShreyas Bhatewara adapter->intr.num_intrs = 1; 2328d1a890faSShreyas Bhatewara return; 2329d1a890faSShreyas Bhatewara } 2330d1a890faSShreyas Bhatewara } 23310bdc0d70SShreyas Bhatewara #endif /* CONFIG_PCI_MSI */ 2332d1a890faSShreyas Bhatewara 2333d1a890faSShreyas Bhatewara adapter->intr.type = VMXNET3_IT_INTX; 2334d1a890faSShreyas Bhatewara 2335d1a890faSShreyas Bhatewara /* INT-X related setting */ 2336d1a890faSShreyas Bhatewara adapter->intr.num_intrs = 1; 2337d1a890faSShreyas Bhatewara } 2338d1a890faSShreyas Bhatewara 2339d1a890faSShreyas Bhatewara 2340d1a890faSShreyas Bhatewara static void 2341d1a890faSShreyas Bhatewara vmxnet3_free_intr_resources(struct vmxnet3_adapter *adapter) 2342d1a890faSShreyas Bhatewara { 2343d1a890faSShreyas Bhatewara if (adapter->intr.type == VMXNET3_IT_MSIX) 2344d1a890faSShreyas Bhatewara pci_disable_msix(adapter->pdev); 2345d1a890faSShreyas Bhatewara else if (adapter->intr.type == VMXNET3_IT_MSI) 2346d1a890faSShreyas Bhatewara pci_disable_msi(adapter->pdev); 2347d1a890faSShreyas Bhatewara else 2348d1a890faSShreyas Bhatewara BUG_ON(adapter->intr.type != VMXNET3_IT_INTX); 2349d1a890faSShreyas Bhatewara } 2350d1a890faSShreyas Bhatewara 2351d1a890faSShreyas Bhatewara 2352d1a890faSShreyas Bhatewara static void 2353d1a890faSShreyas Bhatewara vmxnet3_tx_timeout(struct net_device *netdev) 2354d1a890faSShreyas Bhatewara { 2355d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2356d1a890faSShreyas Bhatewara adapter->tx_timeout_count++; 2357d1a890faSShreyas Bhatewara 2358d1a890faSShreyas Bhatewara printk(KERN_ERR "%s: tx hang\n", adapter->netdev->name); 2359d1a890faSShreyas Bhatewara schedule_work(&adapter->work); 2360d1a890faSShreyas Bhatewara } 2361d1a890faSShreyas Bhatewara 2362d1a890faSShreyas Bhatewara 2363d1a890faSShreyas Bhatewara static void 2364d1a890faSShreyas Bhatewara vmxnet3_reset_work(struct work_struct *data) 2365d1a890faSShreyas Bhatewara { 2366d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter; 2367d1a890faSShreyas Bhatewara 2368d1a890faSShreyas Bhatewara adapter = container_of(data, struct vmxnet3_adapter, work); 2369d1a890faSShreyas Bhatewara 2370d1a890faSShreyas Bhatewara /* if another thread is resetting the device, no need to proceed */ 2371d1a890faSShreyas Bhatewara if (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)) 2372d1a890faSShreyas Bhatewara return; 2373d1a890faSShreyas Bhatewara 2374d1a890faSShreyas Bhatewara /* if the device is closed, we must leave it alone */ 2375d9a5f210SShreyas Bhatewara rtnl_lock(); 2376d1a890faSShreyas Bhatewara if (netif_running(adapter->netdev)) { 2377d1a890faSShreyas Bhatewara printk(KERN_INFO "%s: resetting\n", adapter->netdev->name); 2378d1a890faSShreyas Bhatewara vmxnet3_quiesce_dev(adapter); 2379d1a890faSShreyas Bhatewara vmxnet3_reset_dev(adapter); 2380d1a890faSShreyas Bhatewara vmxnet3_activate_dev(adapter); 2381d1a890faSShreyas Bhatewara } else { 2382d1a890faSShreyas Bhatewara printk(KERN_INFO "%s: already closed\n", adapter->netdev->name); 2383d1a890faSShreyas Bhatewara } 2384d9a5f210SShreyas Bhatewara rtnl_unlock(); 2385d1a890faSShreyas Bhatewara 2386d1a890faSShreyas Bhatewara clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state); 2387d1a890faSShreyas Bhatewara } 2388d1a890faSShreyas Bhatewara 2389d1a890faSShreyas Bhatewara 2390d1a890faSShreyas Bhatewara static int __devinit 2391d1a890faSShreyas Bhatewara vmxnet3_probe_device(struct pci_dev *pdev, 2392d1a890faSShreyas Bhatewara const struct pci_device_id *id) 2393d1a890faSShreyas Bhatewara { 2394d1a890faSShreyas Bhatewara static const struct net_device_ops vmxnet3_netdev_ops = { 2395d1a890faSShreyas Bhatewara .ndo_open = vmxnet3_open, 2396d1a890faSShreyas Bhatewara .ndo_stop = vmxnet3_close, 2397d1a890faSShreyas Bhatewara .ndo_start_xmit = vmxnet3_xmit_frame, 2398d1a890faSShreyas Bhatewara .ndo_set_mac_address = vmxnet3_set_mac_addr, 2399d1a890faSShreyas Bhatewara .ndo_change_mtu = vmxnet3_change_mtu, 2400d1a890faSShreyas Bhatewara .ndo_get_stats = vmxnet3_get_stats, 2401d1a890faSShreyas Bhatewara .ndo_tx_timeout = vmxnet3_tx_timeout, 2402d1a890faSShreyas Bhatewara .ndo_set_multicast_list = vmxnet3_set_mc, 2403d1a890faSShreyas Bhatewara .ndo_vlan_rx_register = vmxnet3_vlan_rx_register, 2404d1a890faSShreyas Bhatewara .ndo_vlan_rx_add_vid = vmxnet3_vlan_rx_add_vid, 2405d1a890faSShreyas Bhatewara .ndo_vlan_rx_kill_vid = vmxnet3_vlan_rx_kill_vid, 2406d1a890faSShreyas Bhatewara #ifdef CONFIG_NET_POLL_CONTROLLER 2407d1a890faSShreyas Bhatewara .ndo_poll_controller = vmxnet3_netpoll, 2408d1a890faSShreyas Bhatewara #endif 2409d1a890faSShreyas Bhatewara }; 2410d1a890faSShreyas Bhatewara int err; 2411d1a890faSShreyas Bhatewara bool dma64 = false; /* stupid gcc */ 2412d1a890faSShreyas Bhatewara u32 ver; 2413d1a890faSShreyas Bhatewara struct net_device *netdev; 2414d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter; 2415d1a890faSShreyas Bhatewara u8 mac[ETH_ALEN]; 2416d1a890faSShreyas Bhatewara 2417d1a890faSShreyas Bhatewara netdev = alloc_etherdev(sizeof(struct vmxnet3_adapter)); 2418d1a890faSShreyas Bhatewara if (!netdev) { 2419d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to alloc ethernet device for adapter " 2420d1a890faSShreyas Bhatewara "%s\n", pci_name(pdev)); 2421d1a890faSShreyas Bhatewara return -ENOMEM; 2422d1a890faSShreyas Bhatewara } 2423d1a890faSShreyas Bhatewara 2424d1a890faSShreyas Bhatewara pci_set_drvdata(pdev, netdev); 2425d1a890faSShreyas Bhatewara adapter = netdev_priv(netdev); 2426d1a890faSShreyas Bhatewara adapter->netdev = netdev; 2427d1a890faSShreyas Bhatewara adapter->pdev = pdev; 2428d1a890faSShreyas Bhatewara 2429d1a890faSShreyas Bhatewara adapter->shared = pci_alloc_consistent(adapter->pdev, 2430d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_DriverShared), 2431d1a890faSShreyas Bhatewara &adapter->shared_pa); 2432d1a890faSShreyas Bhatewara if (!adapter->shared) { 2433d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to allocate memory for %s\n", 2434d1a890faSShreyas Bhatewara pci_name(pdev)); 2435d1a890faSShreyas Bhatewara err = -ENOMEM; 2436d1a890faSShreyas Bhatewara goto err_alloc_shared; 2437d1a890faSShreyas Bhatewara } 2438d1a890faSShreyas Bhatewara 2439d1a890faSShreyas Bhatewara adapter->tqd_start = pci_alloc_consistent(adapter->pdev, 2440d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_TxQueueDesc) + 2441d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_RxQueueDesc), 2442d1a890faSShreyas Bhatewara &adapter->queue_desc_pa); 2443d1a890faSShreyas Bhatewara 2444d1a890faSShreyas Bhatewara if (!adapter->tqd_start) { 2445d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to allocate memory for %s\n", 2446d1a890faSShreyas Bhatewara pci_name(pdev)); 2447d1a890faSShreyas Bhatewara err = -ENOMEM; 2448d1a890faSShreyas Bhatewara goto err_alloc_queue_desc; 2449d1a890faSShreyas Bhatewara } 2450d1a890faSShreyas Bhatewara adapter->rqd_start = (struct Vmxnet3_RxQueueDesc *)(adapter->tqd_start 2451d1a890faSShreyas Bhatewara + 1); 2452d1a890faSShreyas Bhatewara 2453d1a890faSShreyas Bhatewara adapter->pm_conf = kmalloc(sizeof(struct Vmxnet3_PMConf), GFP_KERNEL); 2454d1a890faSShreyas Bhatewara if (adapter->pm_conf == NULL) { 2455d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to allocate memory for %s\n", 2456d1a890faSShreyas Bhatewara pci_name(pdev)); 2457d1a890faSShreyas Bhatewara err = -ENOMEM; 2458d1a890faSShreyas Bhatewara goto err_alloc_pm; 2459d1a890faSShreyas Bhatewara } 2460d1a890faSShreyas Bhatewara 2461d1a890faSShreyas Bhatewara err = vmxnet3_alloc_pci_resources(adapter, &dma64); 2462d1a890faSShreyas Bhatewara if (err < 0) 2463d1a890faSShreyas Bhatewara goto err_alloc_pci; 2464d1a890faSShreyas Bhatewara 2465d1a890faSShreyas Bhatewara ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_VRRS); 2466d1a890faSShreyas Bhatewara if (ver & 1) { 2467d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_VRRS, 1); 2468d1a890faSShreyas Bhatewara } else { 2469d1a890faSShreyas Bhatewara printk(KERN_ERR "Incompatible h/w version (0x%x) for adapter" 2470d1a890faSShreyas Bhatewara " %s\n", ver, pci_name(pdev)); 2471d1a890faSShreyas Bhatewara err = -EBUSY; 2472d1a890faSShreyas Bhatewara goto err_ver; 2473d1a890faSShreyas Bhatewara } 2474d1a890faSShreyas Bhatewara 2475d1a890faSShreyas Bhatewara ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_UVRS); 2476d1a890faSShreyas Bhatewara if (ver & 1) { 2477d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_UVRS, 1); 2478d1a890faSShreyas Bhatewara } else { 2479d1a890faSShreyas Bhatewara printk(KERN_ERR "Incompatible upt version (0x%x) for " 2480d1a890faSShreyas Bhatewara "adapter %s\n", ver, pci_name(pdev)); 2481d1a890faSShreyas Bhatewara err = -EBUSY; 2482d1a890faSShreyas Bhatewara goto err_ver; 2483d1a890faSShreyas Bhatewara } 2484d1a890faSShreyas Bhatewara 2485d1a890faSShreyas Bhatewara vmxnet3_declare_features(adapter, dma64); 2486d1a890faSShreyas Bhatewara 2487d1a890faSShreyas Bhatewara adapter->dev_number = atomic_read(&devices_found); 2488d1a890faSShreyas Bhatewara vmxnet3_alloc_intr_resources(adapter); 2489d1a890faSShreyas Bhatewara 2490d1a890faSShreyas Bhatewara vmxnet3_read_mac_addr(adapter, mac); 2491d1a890faSShreyas Bhatewara memcpy(netdev->dev_addr, mac, netdev->addr_len); 2492d1a890faSShreyas Bhatewara 2493d1a890faSShreyas Bhatewara netdev->netdev_ops = &vmxnet3_netdev_ops; 2494d1a890faSShreyas Bhatewara netdev->watchdog_timeo = 5 * HZ; 2495d1a890faSShreyas Bhatewara vmxnet3_set_ethtool_ops(netdev); 2496d1a890faSShreyas Bhatewara 2497d1a890faSShreyas Bhatewara INIT_WORK(&adapter->work, vmxnet3_reset_work); 2498d1a890faSShreyas Bhatewara 2499d1a890faSShreyas Bhatewara netif_napi_add(netdev, &adapter->napi, vmxnet3_poll, 64); 2500d1a890faSShreyas Bhatewara SET_NETDEV_DEV(netdev, &pdev->dev); 2501d1a890faSShreyas Bhatewara err = register_netdev(netdev); 2502d1a890faSShreyas Bhatewara 2503d1a890faSShreyas Bhatewara if (err) { 2504d1a890faSShreyas Bhatewara printk(KERN_ERR "Failed to register adapter %s\n", 2505d1a890faSShreyas Bhatewara pci_name(pdev)); 2506d1a890faSShreyas Bhatewara goto err_register; 2507d1a890faSShreyas Bhatewara } 2508d1a890faSShreyas Bhatewara 2509d1a890faSShreyas Bhatewara set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state); 25104a1745fcSShreyas Bhatewara vmxnet3_check_link(adapter, false); 2511d1a890faSShreyas Bhatewara atomic_inc(&devices_found); 2512d1a890faSShreyas Bhatewara return 0; 2513d1a890faSShreyas Bhatewara 2514d1a890faSShreyas Bhatewara err_register: 2515d1a890faSShreyas Bhatewara vmxnet3_free_intr_resources(adapter); 2516d1a890faSShreyas Bhatewara err_ver: 2517d1a890faSShreyas Bhatewara vmxnet3_free_pci_resources(adapter); 2518d1a890faSShreyas Bhatewara err_alloc_pci: 2519d1a890faSShreyas Bhatewara kfree(adapter->pm_conf); 2520d1a890faSShreyas Bhatewara err_alloc_pm: 2521d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_TxQueueDesc) + 2522d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_RxQueueDesc), 2523d1a890faSShreyas Bhatewara adapter->tqd_start, adapter->queue_desc_pa); 2524d1a890faSShreyas Bhatewara err_alloc_queue_desc: 2525d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared), 2526d1a890faSShreyas Bhatewara adapter->shared, adapter->shared_pa); 2527d1a890faSShreyas Bhatewara err_alloc_shared: 2528d1a890faSShreyas Bhatewara pci_set_drvdata(pdev, NULL); 2529d1a890faSShreyas Bhatewara free_netdev(netdev); 2530d1a890faSShreyas Bhatewara return err; 2531d1a890faSShreyas Bhatewara } 2532d1a890faSShreyas Bhatewara 2533d1a890faSShreyas Bhatewara 2534d1a890faSShreyas Bhatewara static void __devexit 2535d1a890faSShreyas Bhatewara vmxnet3_remove_device(struct pci_dev *pdev) 2536d1a890faSShreyas Bhatewara { 2537d1a890faSShreyas Bhatewara struct net_device *netdev = pci_get_drvdata(pdev); 2538d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2539d1a890faSShreyas Bhatewara 2540d1a890faSShreyas Bhatewara flush_scheduled_work(); 2541d1a890faSShreyas Bhatewara 2542d1a890faSShreyas Bhatewara unregister_netdev(netdev); 2543d1a890faSShreyas Bhatewara 2544d1a890faSShreyas Bhatewara vmxnet3_free_intr_resources(adapter); 2545d1a890faSShreyas Bhatewara vmxnet3_free_pci_resources(adapter); 2546d1a890faSShreyas Bhatewara kfree(adapter->pm_conf); 2547d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_TxQueueDesc) + 2548d1a890faSShreyas Bhatewara sizeof(struct Vmxnet3_RxQueueDesc), 2549d1a890faSShreyas Bhatewara adapter->tqd_start, adapter->queue_desc_pa); 2550d1a890faSShreyas Bhatewara pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared), 2551d1a890faSShreyas Bhatewara adapter->shared, adapter->shared_pa); 2552d1a890faSShreyas Bhatewara free_netdev(netdev); 2553d1a890faSShreyas Bhatewara } 2554d1a890faSShreyas Bhatewara 2555d1a890faSShreyas Bhatewara 2556d1a890faSShreyas Bhatewara #ifdef CONFIG_PM 2557d1a890faSShreyas Bhatewara 2558d1a890faSShreyas Bhatewara static int 2559d1a890faSShreyas Bhatewara vmxnet3_suspend(struct device *device) 2560d1a890faSShreyas Bhatewara { 2561d1a890faSShreyas Bhatewara struct pci_dev *pdev = to_pci_dev(device); 2562d1a890faSShreyas Bhatewara struct net_device *netdev = pci_get_drvdata(pdev); 2563d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2564d1a890faSShreyas Bhatewara struct Vmxnet3_PMConf *pmConf; 2565d1a890faSShreyas Bhatewara struct ethhdr *ehdr; 2566d1a890faSShreyas Bhatewara struct arphdr *ahdr; 2567d1a890faSShreyas Bhatewara u8 *arpreq; 2568d1a890faSShreyas Bhatewara struct in_device *in_dev; 2569d1a890faSShreyas Bhatewara struct in_ifaddr *ifa; 2570d1a890faSShreyas Bhatewara int i = 0; 2571d1a890faSShreyas Bhatewara 2572d1a890faSShreyas Bhatewara if (!netif_running(netdev)) 2573d1a890faSShreyas Bhatewara return 0; 2574d1a890faSShreyas Bhatewara 2575d1a890faSShreyas Bhatewara vmxnet3_disable_all_intrs(adapter); 2576d1a890faSShreyas Bhatewara vmxnet3_free_irqs(adapter); 2577d1a890faSShreyas Bhatewara vmxnet3_free_intr_resources(adapter); 2578d1a890faSShreyas Bhatewara 2579d1a890faSShreyas Bhatewara netif_device_detach(netdev); 2580d1a890faSShreyas Bhatewara netif_stop_queue(netdev); 2581d1a890faSShreyas Bhatewara 2582d1a890faSShreyas Bhatewara /* Create wake-up filters. */ 2583d1a890faSShreyas Bhatewara pmConf = adapter->pm_conf; 2584d1a890faSShreyas Bhatewara memset(pmConf, 0, sizeof(*pmConf)); 2585d1a890faSShreyas Bhatewara 2586d1a890faSShreyas Bhatewara if (adapter->wol & WAKE_UCAST) { 2587d1a890faSShreyas Bhatewara pmConf->filters[i].patternSize = ETH_ALEN; 2588d1a890faSShreyas Bhatewara pmConf->filters[i].maskSize = 1; 2589d1a890faSShreyas Bhatewara memcpy(pmConf->filters[i].pattern, netdev->dev_addr, ETH_ALEN); 2590d1a890faSShreyas Bhatewara pmConf->filters[i].mask[0] = 0x3F; /* LSB ETH_ALEN bits */ 2591d1a890faSShreyas Bhatewara 2592115924b6SShreyas Bhatewara set_flag_le16(&pmConf->wakeUpEvents, VMXNET3_PM_WAKEUP_FILTER); 2593d1a890faSShreyas Bhatewara i++; 2594d1a890faSShreyas Bhatewara } 2595d1a890faSShreyas Bhatewara 2596d1a890faSShreyas Bhatewara if (adapter->wol & WAKE_ARP) { 2597d1a890faSShreyas Bhatewara in_dev = in_dev_get(netdev); 2598d1a890faSShreyas Bhatewara if (!in_dev) 2599d1a890faSShreyas Bhatewara goto skip_arp; 2600d1a890faSShreyas Bhatewara 2601d1a890faSShreyas Bhatewara ifa = (struct in_ifaddr *)in_dev->ifa_list; 2602d1a890faSShreyas Bhatewara if (!ifa) 2603d1a890faSShreyas Bhatewara goto skip_arp; 2604d1a890faSShreyas Bhatewara 2605d1a890faSShreyas Bhatewara pmConf->filters[i].patternSize = ETH_HLEN + /* Ethernet header*/ 2606d1a890faSShreyas Bhatewara sizeof(struct arphdr) + /* ARP header */ 2607d1a890faSShreyas Bhatewara 2 * ETH_ALEN + /* 2 Ethernet addresses*/ 2608d1a890faSShreyas Bhatewara 2 * sizeof(u32); /*2 IPv4 addresses */ 2609d1a890faSShreyas Bhatewara pmConf->filters[i].maskSize = 2610d1a890faSShreyas Bhatewara (pmConf->filters[i].patternSize - 1) / 8 + 1; 2611d1a890faSShreyas Bhatewara 2612d1a890faSShreyas Bhatewara /* ETH_P_ARP in Ethernet header. */ 2613d1a890faSShreyas Bhatewara ehdr = (struct ethhdr *)pmConf->filters[i].pattern; 2614d1a890faSShreyas Bhatewara ehdr->h_proto = htons(ETH_P_ARP); 2615d1a890faSShreyas Bhatewara 2616d1a890faSShreyas Bhatewara /* ARPOP_REQUEST in ARP header. */ 2617d1a890faSShreyas Bhatewara ahdr = (struct arphdr *)&pmConf->filters[i].pattern[ETH_HLEN]; 2618d1a890faSShreyas Bhatewara ahdr->ar_op = htons(ARPOP_REQUEST); 2619d1a890faSShreyas Bhatewara arpreq = (u8 *)(ahdr + 1); 2620d1a890faSShreyas Bhatewara 2621d1a890faSShreyas Bhatewara /* The Unicast IPv4 address in 'tip' field. */ 2622d1a890faSShreyas Bhatewara arpreq += 2 * ETH_ALEN + sizeof(u32); 2623d1a890faSShreyas Bhatewara *(u32 *)arpreq = ifa->ifa_address; 2624d1a890faSShreyas Bhatewara 2625d1a890faSShreyas Bhatewara /* The mask for the relevant bits. */ 2626d1a890faSShreyas Bhatewara pmConf->filters[i].mask[0] = 0x00; 2627d1a890faSShreyas Bhatewara pmConf->filters[i].mask[1] = 0x30; /* ETH_P_ARP */ 2628d1a890faSShreyas Bhatewara pmConf->filters[i].mask[2] = 0x30; /* ARPOP_REQUEST */ 2629d1a890faSShreyas Bhatewara pmConf->filters[i].mask[3] = 0x00; 2630d1a890faSShreyas Bhatewara pmConf->filters[i].mask[4] = 0xC0; /* IPv4 TIP */ 2631d1a890faSShreyas Bhatewara pmConf->filters[i].mask[5] = 0x03; /* IPv4 TIP */ 2632d1a890faSShreyas Bhatewara in_dev_put(in_dev); 2633d1a890faSShreyas Bhatewara 2634115924b6SShreyas Bhatewara set_flag_le16(&pmConf->wakeUpEvents, VMXNET3_PM_WAKEUP_FILTER); 2635d1a890faSShreyas Bhatewara i++; 2636d1a890faSShreyas Bhatewara } 2637d1a890faSShreyas Bhatewara 2638d1a890faSShreyas Bhatewara skip_arp: 2639d1a890faSShreyas Bhatewara if (adapter->wol & WAKE_MAGIC) 2640115924b6SShreyas Bhatewara set_flag_le16(&pmConf->wakeUpEvents, VMXNET3_PM_WAKEUP_MAGIC); 2641d1a890faSShreyas Bhatewara 2642d1a890faSShreyas Bhatewara pmConf->numFilters = i; 2643d1a890faSShreyas Bhatewara 2644115924b6SShreyas Bhatewara adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1); 2645115924b6SShreyas Bhatewara adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof( 2646115924b6SShreyas Bhatewara *pmConf)); 2647115924b6SShreyas Bhatewara adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys( 2648115924b6SShreyas Bhatewara pmConf)); 2649d1a890faSShreyas Bhatewara 2650d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2651d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_PMCFG); 2652d1a890faSShreyas Bhatewara 2653d1a890faSShreyas Bhatewara pci_save_state(pdev); 2654d1a890faSShreyas Bhatewara pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND), 2655d1a890faSShreyas Bhatewara adapter->wol); 2656d1a890faSShreyas Bhatewara pci_disable_device(pdev); 2657d1a890faSShreyas Bhatewara pci_set_power_state(pdev, pci_choose_state(pdev, PMSG_SUSPEND)); 2658d1a890faSShreyas Bhatewara 2659d1a890faSShreyas Bhatewara return 0; 2660d1a890faSShreyas Bhatewara } 2661d1a890faSShreyas Bhatewara 2662d1a890faSShreyas Bhatewara 2663d1a890faSShreyas Bhatewara static int 2664d1a890faSShreyas Bhatewara vmxnet3_resume(struct device *device) 2665d1a890faSShreyas Bhatewara { 2666d1a890faSShreyas Bhatewara int err; 2667d1a890faSShreyas Bhatewara struct pci_dev *pdev = to_pci_dev(device); 2668d1a890faSShreyas Bhatewara struct net_device *netdev = pci_get_drvdata(pdev); 2669d1a890faSShreyas Bhatewara struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2670d1a890faSShreyas Bhatewara struct Vmxnet3_PMConf *pmConf; 2671d1a890faSShreyas Bhatewara 2672d1a890faSShreyas Bhatewara if (!netif_running(netdev)) 2673d1a890faSShreyas Bhatewara return 0; 2674d1a890faSShreyas Bhatewara 2675d1a890faSShreyas Bhatewara /* Destroy wake-up filters. */ 2676d1a890faSShreyas Bhatewara pmConf = adapter->pm_conf; 2677d1a890faSShreyas Bhatewara memset(pmConf, 0, sizeof(*pmConf)); 2678d1a890faSShreyas Bhatewara 2679115924b6SShreyas Bhatewara adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1); 2680115924b6SShreyas Bhatewara adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof( 2681115924b6SShreyas Bhatewara *pmConf)); 2682115924b6SShreyas Bhatewara adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le32(virt_to_phys( 2683115924b6SShreyas Bhatewara pmConf)); 2684d1a890faSShreyas Bhatewara 2685d1a890faSShreyas Bhatewara netif_device_attach(netdev); 2686d1a890faSShreyas Bhatewara pci_set_power_state(pdev, PCI_D0); 2687d1a890faSShreyas Bhatewara pci_restore_state(pdev); 2688d1a890faSShreyas Bhatewara err = pci_enable_device_mem(pdev); 2689d1a890faSShreyas Bhatewara if (err != 0) 2690d1a890faSShreyas Bhatewara return err; 2691d1a890faSShreyas Bhatewara 2692d1a890faSShreyas Bhatewara pci_enable_wake(pdev, PCI_D0, 0); 2693d1a890faSShreyas Bhatewara 2694d1a890faSShreyas Bhatewara VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2695d1a890faSShreyas Bhatewara VMXNET3_CMD_UPDATE_PMCFG); 2696d1a890faSShreyas Bhatewara vmxnet3_alloc_intr_resources(adapter); 2697d1a890faSShreyas Bhatewara vmxnet3_request_irqs(adapter); 2698d1a890faSShreyas Bhatewara vmxnet3_enable_all_intrs(adapter); 2699d1a890faSShreyas Bhatewara 2700d1a890faSShreyas Bhatewara return 0; 2701d1a890faSShreyas Bhatewara } 2702d1a890faSShreyas Bhatewara 270347145210SAlexey Dobriyan static const struct dev_pm_ops vmxnet3_pm_ops = { 2704d1a890faSShreyas Bhatewara .suspend = vmxnet3_suspend, 2705d1a890faSShreyas Bhatewara .resume = vmxnet3_resume, 2706d1a890faSShreyas Bhatewara }; 2707d1a890faSShreyas Bhatewara #endif 2708d1a890faSShreyas Bhatewara 2709d1a890faSShreyas Bhatewara static struct pci_driver vmxnet3_driver = { 2710d1a890faSShreyas Bhatewara .name = vmxnet3_driver_name, 2711d1a890faSShreyas Bhatewara .id_table = vmxnet3_pciid_table, 2712d1a890faSShreyas Bhatewara .probe = vmxnet3_probe_device, 2713d1a890faSShreyas Bhatewara .remove = __devexit_p(vmxnet3_remove_device), 2714d1a890faSShreyas Bhatewara #ifdef CONFIG_PM 2715d1a890faSShreyas Bhatewara .driver.pm = &vmxnet3_pm_ops, 2716d1a890faSShreyas Bhatewara #endif 2717d1a890faSShreyas Bhatewara }; 2718d1a890faSShreyas Bhatewara 2719d1a890faSShreyas Bhatewara 2720d1a890faSShreyas Bhatewara static int __init 2721d1a890faSShreyas Bhatewara vmxnet3_init_module(void) 2722d1a890faSShreyas Bhatewara { 2723d1a890faSShreyas Bhatewara printk(KERN_INFO "%s - version %s\n", VMXNET3_DRIVER_DESC, 2724d1a890faSShreyas Bhatewara VMXNET3_DRIVER_VERSION_REPORT); 2725d1a890faSShreyas Bhatewara return pci_register_driver(&vmxnet3_driver); 2726d1a890faSShreyas Bhatewara } 2727d1a890faSShreyas Bhatewara 2728d1a890faSShreyas Bhatewara module_init(vmxnet3_init_module); 2729d1a890faSShreyas Bhatewara 2730d1a890faSShreyas Bhatewara 2731d1a890faSShreyas Bhatewara static void 2732d1a890faSShreyas Bhatewara vmxnet3_exit_module(void) 2733d1a890faSShreyas Bhatewara { 2734d1a890faSShreyas Bhatewara pci_unregister_driver(&vmxnet3_driver); 2735d1a890faSShreyas Bhatewara } 2736d1a890faSShreyas Bhatewara 2737d1a890faSShreyas Bhatewara module_exit(vmxnet3_exit_module); 2738d1a890faSShreyas Bhatewara 2739d1a890faSShreyas Bhatewara MODULE_AUTHOR("VMware, Inc."); 2740d1a890faSShreyas Bhatewara MODULE_DESCRIPTION(VMXNET3_DRIVER_DESC); 2741d1a890faSShreyas Bhatewara MODULE_LICENSE("GPL v2"); 2742d1a890faSShreyas Bhatewara MODULE_VERSION(VMXNET3_DRIVER_VERSION_STRING); 2743