1 /*************************************************************************** 2 * 3 * Copyright (C) 2007-2010 SMSC 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License 7 * as published by the Free Software Foundation; either version 2 8 * of the License, or (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 18 * 19 *****************************************************************************/ 20 21 #include <linux/module.h> 22 #include <linux/kmod.h> 23 #include <linux/init.h> 24 #include <linux/netdevice.h> 25 #include <linux/etherdevice.h> 26 #include <linux/ethtool.h> 27 #include <linux/mii.h> 28 #include <linux/usb.h> 29 #include <linux/crc32.h> 30 #include <linux/usb/usbnet.h> 31 #include <linux/slab.h> 32 #include "smsc75xx.h" 33 34 #define SMSC_CHIPNAME "smsc75xx" 35 #define SMSC_DRIVER_VERSION "1.0.0" 36 #define HS_USB_PKT_SIZE (512) 37 #define FS_USB_PKT_SIZE (64) 38 #define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE) 39 #define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE) 40 #define DEFAULT_BULK_IN_DELAY (0x00002000) 41 #define MAX_SINGLE_PACKET_SIZE (9000) 42 #define LAN75XX_EEPROM_MAGIC (0x7500) 43 #define EEPROM_MAC_OFFSET (0x01) 44 #define DEFAULT_TX_CSUM_ENABLE (true) 45 #define DEFAULT_RX_CSUM_ENABLE (true) 46 #define DEFAULT_TSO_ENABLE (true) 47 #define SMSC75XX_INTERNAL_PHY_ID (1) 48 #define SMSC75XX_TX_OVERHEAD (8) 49 #define MAX_RX_FIFO_SIZE (20 * 1024) 50 #define MAX_TX_FIFO_SIZE (12 * 1024) 51 #define USB_VENDOR_ID_SMSC (0x0424) 52 #define USB_PRODUCT_ID_LAN7500 (0x7500) 53 #define USB_PRODUCT_ID_LAN7505 (0x7505) 54 #define RXW_PADDING 2 55 56 #define check_warn(ret, fmt, args...) \ 57 ({ if (ret < 0) netdev_warn(dev->net, fmt, ##args); }) 58 59 #define check_warn_return(ret, fmt, args...) \ 60 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); return ret; } }) 61 62 #define check_warn_goto_done(ret, fmt, args...) \ 63 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); goto done; } }) 64 65 struct smsc75xx_priv { 66 struct usbnet *dev; 67 u32 rfe_ctl; 68 u32 multicast_hash_table[DP_SEL_VHF_HASH_LEN]; 69 struct mutex dataport_mutex; 70 spinlock_t rfe_ctl_lock; 71 struct work_struct set_multicast; 72 }; 73 74 struct usb_context { 75 struct usb_ctrlrequest req; 76 struct usbnet *dev; 77 }; 78 79 static bool turbo_mode = true; 80 module_param(turbo_mode, bool, 0644); 81 MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); 82 83 static int __must_check smsc75xx_read_reg(struct usbnet *dev, u32 index, 84 u32 *data) 85 { 86 u32 *buf = kmalloc(4, GFP_KERNEL); 87 int ret; 88 89 BUG_ON(!dev); 90 91 if (!buf) 92 return -ENOMEM; 93 94 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), 95 USB_VENDOR_REQUEST_READ_REGISTER, 96 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 97 00, index, buf, 4, USB_CTRL_GET_TIMEOUT); 98 99 if (unlikely(ret < 0)) 100 netdev_warn(dev->net, 101 "Failed to read register index 0x%08x", index); 102 103 le32_to_cpus(buf); 104 *data = *buf; 105 kfree(buf); 106 107 return ret; 108 } 109 110 static int __must_check smsc75xx_write_reg(struct usbnet *dev, u32 index, 111 u32 data) 112 { 113 u32 *buf = kmalloc(4, GFP_KERNEL); 114 int ret; 115 116 BUG_ON(!dev); 117 118 if (!buf) 119 return -ENOMEM; 120 121 *buf = data; 122 cpu_to_le32s(buf); 123 124 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), 125 USB_VENDOR_REQUEST_WRITE_REGISTER, 126 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 127 00, index, buf, 4, USB_CTRL_SET_TIMEOUT); 128 129 if (unlikely(ret < 0)) 130 netdev_warn(dev->net, 131 "Failed to write register index 0x%08x", index); 132 133 kfree(buf); 134 135 return ret; 136 } 137 138 /* Loop until the read is completed with timeout 139 * called with phy_mutex held */ 140 static int smsc75xx_phy_wait_not_busy(struct usbnet *dev) 141 { 142 unsigned long start_time = jiffies; 143 u32 val; 144 int ret; 145 146 do { 147 ret = smsc75xx_read_reg(dev, MII_ACCESS, &val); 148 check_warn_return(ret, "Error reading MII_ACCESS"); 149 150 if (!(val & MII_ACCESS_BUSY)) 151 return 0; 152 } while (!time_after(jiffies, start_time + HZ)); 153 154 return -EIO; 155 } 156 157 static int smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx) 158 { 159 struct usbnet *dev = netdev_priv(netdev); 160 u32 val, addr; 161 int ret; 162 163 mutex_lock(&dev->phy_mutex); 164 165 /* confirm MII not busy */ 166 ret = smsc75xx_phy_wait_not_busy(dev); 167 check_warn_goto_done(ret, "MII is busy in smsc75xx_mdio_read"); 168 169 /* set the address, index & direction (read from PHY) */ 170 phy_id &= dev->mii.phy_id_mask; 171 idx &= dev->mii.reg_num_mask; 172 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR) 173 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR) 174 | MII_ACCESS_READ; 175 ret = smsc75xx_write_reg(dev, MII_ACCESS, addr); 176 check_warn_goto_done(ret, "Error writing MII_ACCESS"); 177 178 ret = smsc75xx_phy_wait_not_busy(dev); 179 check_warn_goto_done(ret, "Timed out reading MII reg %02X", idx); 180 181 ret = smsc75xx_read_reg(dev, MII_DATA, &val); 182 check_warn_goto_done(ret, "Error reading MII_DATA"); 183 184 ret = (u16)(val & 0xFFFF); 185 186 done: 187 mutex_unlock(&dev->phy_mutex); 188 return ret; 189 } 190 191 static void smsc75xx_mdio_write(struct net_device *netdev, int phy_id, int idx, 192 int regval) 193 { 194 struct usbnet *dev = netdev_priv(netdev); 195 u32 val, addr; 196 int ret; 197 198 mutex_lock(&dev->phy_mutex); 199 200 /* confirm MII not busy */ 201 ret = smsc75xx_phy_wait_not_busy(dev); 202 check_warn_goto_done(ret, "MII is busy in smsc75xx_mdio_write"); 203 204 val = regval; 205 ret = smsc75xx_write_reg(dev, MII_DATA, val); 206 check_warn_goto_done(ret, "Error writing MII_DATA"); 207 208 /* set the address, index & direction (write to PHY) */ 209 phy_id &= dev->mii.phy_id_mask; 210 idx &= dev->mii.reg_num_mask; 211 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR) 212 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR) 213 | MII_ACCESS_WRITE; 214 ret = smsc75xx_write_reg(dev, MII_ACCESS, addr); 215 check_warn_goto_done(ret, "Error writing MII_ACCESS"); 216 217 ret = smsc75xx_phy_wait_not_busy(dev); 218 check_warn_goto_done(ret, "Timed out writing MII reg %02X", idx); 219 220 done: 221 mutex_unlock(&dev->phy_mutex); 222 } 223 224 static int smsc75xx_wait_eeprom(struct usbnet *dev) 225 { 226 unsigned long start_time = jiffies; 227 u32 val; 228 int ret; 229 230 do { 231 ret = smsc75xx_read_reg(dev, E2P_CMD, &val); 232 check_warn_return(ret, "Error reading E2P_CMD"); 233 234 if (!(val & E2P_CMD_BUSY) || (val & E2P_CMD_TIMEOUT)) 235 break; 236 udelay(40); 237 } while (!time_after(jiffies, start_time + HZ)); 238 239 if (val & (E2P_CMD_TIMEOUT | E2P_CMD_BUSY)) { 240 netdev_warn(dev->net, "EEPROM read operation timeout"); 241 return -EIO; 242 } 243 244 return 0; 245 } 246 247 static int smsc75xx_eeprom_confirm_not_busy(struct usbnet *dev) 248 { 249 unsigned long start_time = jiffies; 250 u32 val; 251 int ret; 252 253 do { 254 ret = smsc75xx_read_reg(dev, E2P_CMD, &val); 255 check_warn_return(ret, "Error reading E2P_CMD"); 256 257 if (!(val & E2P_CMD_BUSY)) 258 return 0; 259 260 udelay(40); 261 } while (!time_after(jiffies, start_time + HZ)); 262 263 netdev_warn(dev->net, "EEPROM is busy"); 264 return -EIO; 265 } 266 267 static int smsc75xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length, 268 u8 *data) 269 { 270 u32 val; 271 int i, ret; 272 273 BUG_ON(!dev); 274 BUG_ON(!data); 275 276 ret = smsc75xx_eeprom_confirm_not_busy(dev); 277 if (ret) 278 return ret; 279 280 for (i = 0; i < length; i++) { 281 val = E2P_CMD_BUSY | E2P_CMD_READ | (offset & E2P_CMD_ADDR); 282 ret = smsc75xx_write_reg(dev, E2P_CMD, val); 283 check_warn_return(ret, "Error writing E2P_CMD"); 284 285 ret = smsc75xx_wait_eeprom(dev); 286 if (ret < 0) 287 return ret; 288 289 ret = smsc75xx_read_reg(dev, E2P_DATA, &val); 290 check_warn_return(ret, "Error reading E2P_DATA"); 291 292 data[i] = val & 0xFF; 293 offset++; 294 } 295 296 return 0; 297 } 298 299 static int smsc75xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length, 300 u8 *data) 301 { 302 u32 val; 303 int i, ret; 304 305 BUG_ON(!dev); 306 BUG_ON(!data); 307 308 ret = smsc75xx_eeprom_confirm_not_busy(dev); 309 if (ret) 310 return ret; 311 312 /* Issue write/erase enable command */ 313 val = E2P_CMD_BUSY | E2P_CMD_EWEN; 314 ret = smsc75xx_write_reg(dev, E2P_CMD, val); 315 check_warn_return(ret, "Error writing E2P_CMD"); 316 317 ret = smsc75xx_wait_eeprom(dev); 318 if (ret < 0) 319 return ret; 320 321 for (i = 0; i < length; i++) { 322 323 /* Fill data register */ 324 val = data[i]; 325 ret = smsc75xx_write_reg(dev, E2P_DATA, val); 326 check_warn_return(ret, "Error writing E2P_DATA"); 327 328 /* Send "write" command */ 329 val = E2P_CMD_BUSY | E2P_CMD_WRITE | (offset & E2P_CMD_ADDR); 330 ret = smsc75xx_write_reg(dev, E2P_CMD, val); 331 check_warn_return(ret, "Error writing E2P_CMD"); 332 333 ret = smsc75xx_wait_eeprom(dev); 334 if (ret < 0) 335 return ret; 336 337 offset++; 338 } 339 340 return 0; 341 } 342 343 static int smsc75xx_dataport_wait_not_busy(struct usbnet *dev) 344 { 345 int i, ret; 346 347 for (i = 0; i < 100; i++) { 348 u32 dp_sel; 349 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel); 350 check_warn_return(ret, "Error reading DP_SEL"); 351 352 if (dp_sel & DP_SEL_DPRDY) 353 return 0; 354 355 udelay(40); 356 } 357 358 netdev_warn(dev->net, "smsc75xx_dataport_wait_not_busy timed out"); 359 360 return -EIO; 361 } 362 363 static int smsc75xx_dataport_write(struct usbnet *dev, u32 ram_select, u32 addr, 364 u32 length, u32 *buf) 365 { 366 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 367 u32 dp_sel; 368 int i, ret; 369 370 mutex_lock(&pdata->dataport_mutex); 371 372 ret = smsc75xx_dataport_wait_not_busy(dev); 373 check_warn_goto_done(ret, "smsc75xx_dataport_write busy on entry"); 374 375 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel); 376 check_warn_goto_done(ret, "Error reading DP_SEL"); 377 378 dp_sel &= ~DP_SEL_RSEL; 379 dp_sel |= ram_select; 380 ret = smsc75xx_write_reg(dev, DP_SEL, dp_sel); 381 check_warn_goto_done(ret, "Error writing DP_SEL"); 382 383 for (i = 0; i < length; i++) { 384 ret = smsc75xx_write_reg(dev, DP_ADDR, addr + i); 385 check_warn_goto_done(ret, "Error writing DP_ADDR"); 386 387 ret = smsc75xx_write_reg(dev, DP_DATA, buf[i]); 388 check_warn_goto_done(ret, "Error writing DP_DATA"); 389 390 ret = smsc75xx_write_reg(dev, DP_CMD, DP_CMD_WRITE); 391 check_warn_goto_done(ret, "Error writing DP_CMD"); 392 393 ret = smsc75xx_dataport_wait_not_busy(dev); 394 check_warn_goto_done(ret, "smsc75xx_dataport_write timeout"); 395 } 396 397 done: 398 mutex_unlock(&pdata->dataport_mutex); 399 return ret; 400 } 401 402 /* returns hash bit number for given MAC address */ 403 static u32 smsc75xx_hash(char addr[ETH_ALEN]) 404 { 405 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff; 406 } 407 408 static void smsc75xx_deferred_multicast_write(struct work_struct *param) 409 { 410 struct smsc75xx_priv *pdata = 411 container_of(param, struct smsc75xx_priv, set_multicast); 412 struct usbnet *dev = pdata->dev; 413 int ret; 414 415 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x", 416 pdata->rfe_ctl); 417 418 smsc75xx_dataport_write(dev, DP_SEL_VHF, DP_SEL_VHF_VLAN_LEN, 419 DP_SEL_VHF_HASH_LEN, pdata->multicast_hash_table); 420 421 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 422 check_warn(ret, "Error writing RFE_CRL"); 423 } 424 425 static void smsc75xx_set_multicast(struct net_device *netdev) 426 { 427 struct usbnet *dev = netdev_priv(netdev); 428 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 429 unsigned long flags; 430 int i; 431 432 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags); 433 434 pdata->rfe_ctl &= 435 ~(RFE_CTL_AU | RFE_CTL_AM | RFE_CTL_DPF | RFE_CTL_MHF); 436 pdata->rfe_ctl |= RFE_CTL_AB; 437 438 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++) 439 pdata->multicast_hash_table[i] = 0; 440 441 if (dev->net->flags & IFF_PROMISC) { 442 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled"); 443 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_AU; 444 } else if (dev->net->flags & IFF_ALLMULTI) { 445 netif_dbg(dev, drv, dev->net, "receive all multicast enabled"); 446 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_DPF; 447 } else if (!netdev_mc_empty(dev->net)) { 448 struct netdev_hw_addr *ha; 449 450 netif_dbg(dev, drv, dev->net, "receive multicast hash filter"); 451 452 pdata->rfe_ctl |= RFE_CTL_MHF | RFE_CTL_DPF; 453 454 netdev_for_each_mc_addr(ha, netdev) { 455 u32 bitnum = smsc75xx_hash(ha->addr); 456 pdata->multicast_hash_table[bitnum / 32] |= 457 (1 << (bitnum % 32)); 458 } 459 } else { 460 netif_dbg(dev, drv, dev->net, "receive own packets only"); 461 pdata->rfe_ctl |= RFE_CTL_DPF; 462 } 463 464 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags); 465 466 /* defer register writes to a sleepable context */ 467 schedule_work(&pdata->set_multicast); 468 } 469 470 static int smsc75xx_update_flowcontrol(struct usbnet *dev, u8 duplex, 471 u16 lcladv, u16 rmtadv) 472 { 473 u32 flow = 0, fct_flow = 0; 474 int ret; 475 476 if (duplex == DUPLEX_FULL) { 477 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); 478 479 if (cap & FLOW_CTRL_TX) { 480 flow = (FLOW_TX_FCEN | 0xFFFF); 481 /* set fct_flow thresholds to 20% and 80% */ 482 fct_flow = (8 << 8) | 32; 483 } 484 485 if (cap & FLOW_CTRL_RX) 486 flow |= FLOW_RX_FCEN; 487 488 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s", 489 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"), 490 (cap & FLOW_CTRL_TX ? "enabled" : "disabled")); 491 } else { 492 netif_dbg(dev, link, dev->net, "half duplex"); 493 } 494 495 ret = smsc75xx_write_reg(dev, FLOW, flow); 496 check_warn_return(ret, "Error writing FLOW"); 497 498 ret = smsc75xx_write_reg(dev, FCT_FLOW, fct_flow); 499 check_warn_return(ret, "Error writing FCT_FLOW"); 500 501 return 0; 502 } 503 504 static int smsc75xx_link_reset(struct usbnet *dev) 505 { 506 struct mii_if_info *mii = &dev->mii; 507 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; 508 u16 lcladv, rmtadv; 509 int ret; 510 511 /* clear interrupt status */ 512 ret = smsc75xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC); 513 check_warn_return(ret, "Error reading PHY_INT_SRC"); 514 515 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL); 516 check_warn_return(ret, "Error writing INT_STS"); 517 518 mii_check_media(mii, 1, 1); 519 mii_ethtool_gset(&dev->mii, &ecmd); 520 lcladv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE); 521 rmtadv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_LPA); 522 523 netif_dbg(dev, link, dev->net, "speed: %u duplex: %d lcladv: %04x" 524 " rmtadv: %04x", ethtool_cmd_speed(&ecmd), 525 ecmd.duplex, lcladv, rmtadv); 526 527 return smsc75xx_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv); 528 } 529 530 static void smsc75xx_status(struct usbnet *dev, struct urb *urb) 531 { 532 u32 intdata; 533 534 if (urb->actual_length != 4) { 535 netdev_warn(dev->net, 536 "unexpected urb length %d", urb->actual_length); 537 return; 538 } 539 540 memcpy(&intdata, urb->transfer_buffer, 4); 541 le32_to_cpus(&intdata); 542 543 netif_dbg(dev, link, dev->net, "intdata: 0x%08X", intdata); 544 545 if (intdata & INT_ENP_PHY_INT) 546 usbnet_defer_kevent(dev, EVENT_LINK_RESET); 547 else 548 netdev_warn(dev->net, 549 "unexpected interrupt, intdata=0x%08X", intdata); 550 } 551 552 static int smsc75xx_ethtool_get_eeprom_len(struct net_device *net) 553 { 554 return MAX_EEPROM_SIZE; 555 } 556 557 static int smsc75xx_ethtool_get_eeprom(struct net_device *netdev, 558 struct ethtool_eeprom *ee, u8 *data) 559 { 560 struct usbnet *dev = netdev_priv(netdev); 561 562 ee->magic = LAN75XX_EEPROM_MAGIC; 563 564 return smsc75xx_read_eeprom(dev, ee->offset, ee->len, data); 565 } 566 567 static int smsc75xx_ethtool_set_eeprom(struct net_device *netdev, 568 struct ethtool_eeprom *ee, u8 *data) 569 { 570 struct usbnet *dev = netdev_priv(netdev); 571 572 if (ee->magic != LAN75XX_EEPROM_MAGIC) { 573 netdev_warn(dev->net, 574 "EEPROM: magic value mismatch: 0x%x", ee->magic); 575 return -EINVAL; 576 } 577 578 return smsc75xx_write_eeprom(dev, ee->offset, ee->len, data); 579 } 580 581 static const struct ethtool_ops smsc75xx_ethtool_ops = { 582 .get_link = usbnet_get_link, 583 .nway_reset = usbnet_nway_reset, 584 .get_drvinfo = usbnet_get_drvinfo, 585 .get_msglevel = usbnet_get_msglevel, 586 .set_msglevel = usbnet_set_msglevel, 587 .get_settings = usbnet_get_settings, 588 .set_settings = usbnet_set_settings, 589 .get_eeprom_len = smsc75xx_ethtool_get_eeprom_len, 590 .get_eeprom = smsc75xx_ethtool_get_eeprom, 591 .set_eeprom = smsc75xx_ethtool_set_eeprom, 592 }; 593 594 static int smsc75xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) 595 { 596 struct usbnet *dev = netdev_priv(netdev); 597 598 if (!netif_running(netdev)) 599 return -EINVAL; 600 601 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); 602 } 603 604 static void smsc75xx_init_mac_address(struct usbnet *dev) 605 { 606 /* try reading mac address from EEPROM */ 607 if (smsc75xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, 608 dev->net->dev_addr) == 0) { 609 if (is_valid_ether_addr(dev->net->dev_addr)) { 610 /* eeprom values are valid so use them */ 611 netif_dbg(dev, ifup, dev->net, 612 "MAC address read from EEPROM"); 613 return; 614 } 615 } 616 617 /* no eeprom, or eeprom values are invalid. generate random MAC */ 618 eth_hw_addr_random(dev->net); 619 netif_dbg(dev, ifup, dev->net, "MAC address set to random_ether_addr"); 620 } 621 622 static int smsc75xx_set_mac_address(struct usbnet *dev) 623 { 624 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 | 625 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24; 626 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8; 627 628 int ret = smsc75xx_write_reg(dev, RX_ADDRH, addr_hi); 629 check_warn_return(ret, "Failed to write RX_ADDRH: %d", ret); 630 631 ret = smsc75xx_write_reg(dev, RX_ADDRL, addr_lo); 632 check_warn_return(ret, "Failed to write RX_ADDRL: %d", ret); 633 634 addr_hi |= ADDR_FILTX_FB_VALID; 635 ret = smsc75xx_write_reg(dev, ADDR_FILTX, addr_hi); 636 check_warn_return(ret, "Failed to write ADDR_FILTX: %d", ret); 637 638 ret = smsc75xx_write_reg(dev, ADDR_FILTX + 4, addr_lo); 639 check_warn_return(ret, "Failed to write ADDR_FILTX+4: %d", ret); 640 641 return 0; 642 } 643 644 static int smsc75xx_phy_initialize(struct usbnet *dev) 645 { 646 int bmcr, timeout = 0; 647 648 /* Initialize MII structure */ 649 dev->mii.dev = dev->net; 650 dev->mii.mdio_read = smsc75xx_mdio_read; 651 dev->mii.mdio_write = smsc75xx_mdio_write; 652 dev->mii.phy_id_mask = 0x1f; 653 dev->mii.reg_num_mask = 0x1f; 654 dev->mii.phy_id = SMSC75XX_INTERNAL_PHY_ID; 655 656 /* reset phy and wait for reset to complete */ 657 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); 658 659 do { 660 msleep(10); 661 bmcr = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR); 662 check_warn_return(bmcr, "Error reading MII_BMCR"); 663 timeout++; 664 } while ((bmcr & MII_BMCR) && (timeout < 100)); 665 666 if (timeout >= 100) { 667 netdev_warn(dev->net, "timeout on PHY Reset"); 668 return -EIO; 669 } 670 671 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, 672 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | 673 ADVERTISE_PAUSE_ASYM); 674 675 /* read to clear */ 676 smsc75xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC); 677 check_warn_return(bmcr, "Error reading PHY_INT_SRC"); 678 679 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK, 680 PHY_INT_MASK_DEFAULT); 681 mii_nway_restart(&dev->mii); 682 683 netif_dbg(dev, ifup, dev->net, "phy initialised successfully"); 684 return 0; 685 } 686 687 static int smsc75xx_set_rx_max_frame_length(struct usbnet *dev, int size) 688 { 689 int ret = 0; 690 u32 buf; 691 bool rxenabled; 692 693 ret = smsc75xx_read_reg(dev, MAC_RX, &buf); 694 check_warn_return(ret, "Failed to read MAC_RX: %d", ret); 695 696 rxenabled = ((buf & MAC_RX_RXEN) != 0); 697 698 if (rxenabled) { 699 buf &= ~MAC_RX_RXEN; 700 ret = smsc75xx_write_reg(dev, MAC_RX, buf); 701 check_warn_return(ret, "Failed to write MAC_RX: %d", ret); 702 } 703 704 /* add 4 to size for FCS */ 705 buf &= ~MAC_RX_MAX_SIZE; 706 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT) & MAC_RX_MAX_SIZE); 707 708 ret = smsc75xx_write_reg(dev, MAC_RX, buf); 709 check_warn_return(ret, "Failed to write MAC_RX: %d", ret); 710 711 if (rxenabled) { 712 buf |= MAC_RX_RXEN; 713 ret = smsc75xx_write_reg(dev, MAC_RX, buf); 714 check_warn_return(ret, "Failed to write MAC_RX: %d", ret); 715 } 716 717 return 0; 718 } 719 720 static int smsc75xx_change_mtu(struct net_device *netdev, int new_mtu) 721 { 722 struct usbnet *dev = netdev_priv(netdev); 723 724 int ret = smsc75xx_set_rx_max_frame_length(dev, new_mtu); 725 check_warn_return(ret, "Failed to set mac rx frame length"); 726 727 return usbnet_change_mtu(netdev, new_mtu); 728 } 729 730 /* Enable or disable Rx checksum offload engine */ 731 static int smsc75xx_set_features(struct net_device *netdev, 732 netdev_features_t features) 733 { 734 struct usbnet *dev = netdev_priv(netdev); 735 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 736 unsigned long flags; 737 int ret; 738 739 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags); 740 741 if (features & NETIF_F_RXCSUM) 742 pdata->rfe_ctl |= RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM; 743 else 744 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM); 745 746 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags); 747 /* it's racing here! */ 748 749 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 750 check_warn_return(ret, "Error writing RFE_CTL"); 751 752 return 0; 753 } 754 755 static int smsc75xx_reset(struct usbnet *dev) 756 { 757 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 758 u32 buf; 759 int ret = 0, timeout; 760 761 netif_dbg(dev, ifup, dev->net, "entering smsc75xx_reset"); 762 763 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); 764 check_warn_return(ret, "Failed to read HW_CFG: %d", ret); 765 766 buf |= HW_CFG_LRST; 767 768 ret = smsc75xx_write_reg(dev, HW_CFG, buf); 769 check_warn_return(ret, "Failed to write HW_CFG: %d", ret); 770 771 timeout = 0; 772 do { 773 msleep(10); 774 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); 775 check_warn_return(ret, "Failed to read HW_CFG: %d", ret); 776 timeout++; 777 } while ((buf & HW_CFG_LRST) && (timeout < 100)); 778 779 if (timeout >= 100) { 780 netdev_warn(dev->net, "timeout on completion of Lite Reset"); 781 return -EIO; 782 } 783 784 netif_dbg(dev, ifup, dev->net, "Lite reset complete, resetting PHY"); 785 786 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf); 787 check_warn_return(ret, "Failed to read PMT_CTL: %d", ret); 788 789 buf |= PMT_CTL_PHY_RST; 790 791 ret = smsc75xx_write_reg(dev, PMT_CTL, buf); 792 check_warn_return(ret, "Failed to write PMT_CTL: %d", ret); 793 794 timeout = 0; 795 do { 796 msleep(10); 797 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf); 798 check_warn_return(ret, "Failed to read PMT_CTL: %d", ret); 799 timeout++; 800 } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100)); 801 802 if (timeout >= 100) { 803 netdev_warn(dev->net, "timeout waiting for PHY Reset"); 804 return -EIO; 805 } 806 807 netif_dbg(dev, ifup, dev->net, "PHY reset complete"); 808 809 smsc75xx_init_mac_address(dev); 810 811 ret = smsc75xx_set_mac_address(dev); 812 check_warn_return(ret, "Failed to set mac address"); 813 814 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM", dev->net->dev_addr); 815 816 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); 817 check_warn_return(ret, "Failed to read HW_CFG: %d", ret); 818 819 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x", buf); 820 821 buf |= HW_CFG_BIR; 822 823 ret = smsc75xx_write_reg(dev, HW_CFG, buf); 824 check_warn_return(ret, "Failed to write HW_CFG: %d", ret); 825 826 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); 827 check_warn_return(ret, "Failed to read HW_CFG: %d", ret); 828 829 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG after " 830 "writing HW_CFG_BIR: 0x%08x", buf); 831 832 if (!turbo_mode) { 833 buf = 0; 834 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE; 835 } else if (dev->udev->speed == USB_SPEED_HIGH) { 836 buf = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; 837 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE; 838 } else { 839 buf = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; 840 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE; 841 } 842 843 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld", 844 (ulong)dev->rx_urb_size); 845 846 ret = smsc75xx_write_reg(dev, BURST_CAP, buf); 847 check_warn_return(ret, "Failed to write BURST_CAP: %d", ret); 848 849 ret = smsc75xx_read_reg(dev, BURST_CAP, &buf); 850 check_warn_return(ret, "Failed to read BURST_CAP: %d", ret); 851 852 netif_dbg(dev, ifup, dev->net, 853 "Read Value from BURST_CAP after writing: 0x%08x", buf); 854 855 ret = smsc75xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY); 856 check_warn_return(ret, "Failed to write BULK_IN_DLY: %d", ret); 857 858 ret = smsc75xx_read_reg(dev, BULK_IN_DLY, &buf); 859 check_warn_return(ret, "Failed to read BULK_IN_DLY: %d", ret); 860 861 netif_dbg(dev, ifup, dev->net, 862 "Read Value from BULK_IN_DLY after writing: 0x%08x", buf); 863 864 if (turbo_mode) { 865 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); 866 check_warn_return(ret, "Failed to read HW_CFG: %d", ret); 867 868 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x", buf); 869 870 buf |= (HW_CFG_MEF | HW_CFG_BCE); 871 872 ret = smsc75xx_write_reg(dev, HW_CFG, buf); 873 check_warn_return(ret, "Failed to write HW_CFG: %d", ret); 874 875 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); 876 check_warn_return(ret, "Failed to read HW_CFG: %d", ret); 877 878 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x", buf); 879 } 880 881 /* set FIFO sizes */ 882 buf = (MAX_RX_FIFO_SIZE - 512) / 512; 883 ret = smsc75xx_write_reg(dev, FCT_RX_FIFO_END, buf); 884 check_warn_return(ret, "Failed to write FCT_RX_FIFO_END: %d", ret); 885 886 netif_dbg(dev, ifup, dev->net, "FCT_RX_FIFO_END set to 0x%08x", buf); 887 888 buf = (MAX_TX_FIFO_SIZE - 512) / 512; 889 ret = smsc75xx_write_reg(dev, FCT_TX_FIFO_END, buf); 890 check_warn_return(ret, "Failed to write FCT_TX_FIFO_END: %d", ret); 891 892 netif_dbg(dev, ifup, dev->net, "FCT_TX_FIFO_END set to 0x%08x", buf); 893 894 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL); 895 check_warn_return(ret, "Failed to write INT_STS: %d", ret); 896 897 ret = smsc75xx_read_reg(dev, ID_REV, &buf); 898 check_warn_return(ret, "Failed to read ID_REV: %d", ret); 899 900 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x", buf); 901 902 /* Configure GPIO pins as LED outputs */ 903 ret = smsc75xx_read_reg(dev, LED_GPIO_CFG, &buf); 904 check_warn_return(ret, "Failed to read LED_GPIO_CFG: %d", ret); 905 906 buf &= ~(LED_GPIO_CFG_LED2_FUN_SEL | LED_GPIO_CFG_LED10_FUN_SEL); 907 buf |= LED_GPIO_CFG_LEDGPIO_EN | LED_GPIO_CFG_LED2_FUN_SEL; 908 909 ret = smsc75xx_write_reg(dev, LED_GPIO_CFG, buf); 910 check_warn_return(ret, "Failed to write LED_GPIO_CFG: %d", ret); 911 912 ret = smsc75xx_write_reg(dev, FLOW, 0); 913 check_warn_return(ret, "Failed to write FLOW: %d", ret); 914 915 ret = smsc75xx_write_reg(dev, FCT_FLOW, 0); 916 check_warn_return(ret, "Failed to write FCT_FLOW: %d", ret); 917 918 /* Don't need rfe_ctl_lock during initialisation */ 919 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl); 920 check_warn_return(ret, "Failed to read RFE_CTL: %d", ret); 921 922 pdata->rfe_ctl |= RFE_CTL_AB | RFE_CTL_DPF; 923 924 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 925 check_warn_return(ret, "Failed to write RFE_CTL: %d", ret); 926 927 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl); 928 check_warn_return(ret, "Failed to read RFE_CTL: %d", ret); 929 930 netif_dbg(dev, ifup, dev->net, "RFE_CTL set to 0x%08x", pdata->rfe_ctl); 931 932 /* Enable or disable checksum offload engines */ 933 smsc75xx_set_features(dev->net, dev->net->features); 934 935 smsc75xx_set_multicast(dev->net); 936 937 ret = smsc75xx_phy_initialize(dev); 938 check_warn_return(ret, "Failed to initialize PHY: %d", ret); 939 940 ret = smsc75xx_read_reg(dev, INT_EP_CTL, &buf); 941 check_warn_return(ret, "Failed to read INT_EP_CTL: %d", ret); 942 943 /* enable PHY interrupts */ 944 buf |= INT_ENP_PHY_INT; 945 946 ret = smsc75xx_write_reg(dev, INT_EP_CTL, buf); 947 check_warn_return(ret, "Failed to write INT_EP_CTL: %d", ret); 948 949 ret = smsc75xx_read_reg(dev, MAC_TX, &buf); 950 check_warn_return(ret, "Failed to read MAC_TX: %d", ret); 951 952 buf |= MAC_TX_TXEN; 953 954 ret = smsc75xx_write_reg(dev, MAC_TX, buf); 955 check_warn_return(ret, "Failed to write MAC_TX: %d", ret); 956 957 netif_dbg(dev, ifup, dev->net, "MAC_TX set to 0x%08x", buf); 958 959 ret = smsc75xx_read_reg(dev, FCT_TX_CTL, &buf); 960 check_warn_return(ret, "Failed to read FCT_TX_CTL: %d", ret); 961 962 buf |= FCT_TX_CTL_EN; 963 964 ret = smsc75xx_write_reg(dev, FCT_TX_CTL, buf); 965 check_warn_return(ret, "Failed to write FCT_TX_CTL: %d", ret); 966 967 netif_dbg(dev, ifup, dev->net, "FCT_TX_CTL set to 0x%08x", buf); 968 969 ret = smsc75xx_set_rx_max_frame_length(dev, 1514); 970 check_warn_return(ret, "Failed to set max rx frame length"); 971 972 ret = smsc75xx_read_reg(dev, MAC_RX, &buf); 973 check_warn_return(ret, "Failed to read MAC_RX: %d", ret); 974 975 buf |= MAC_RX_RXEN; 976 977 ret = smsc75xx_write_reg(dev, MAC_RX, buf); 978 check_warn_return(ret, "Failed to write MAC_RX: %d", ret); 979 980 netif_dbg(dev, ifup, dev->net, "MAC_RX set to 0x%08x", buf); 981 982 ret = smsc75xx_read_reg(dev, FCT_RX_CTL, &buf); 983 check_warn_return(ret, "Failed to read FCT_RX_CTL: %d", ret); 984 985 buf |= FCT_RX_CTL_EN; 986 987 ret = smsc75xx_write_reg(dev, FCT_RX_CTL, buf); 988 check_warn_return(ret, "Failed to write FCT_RX_CTL: %d", ret); 989 990 netif_dbg(dev, ifup, dev->net, "FCT_RX_CTL set to 0x%08x", buf); 991 992 netif_dbg(dev, ifup, dev->net, "smsc75xx_reset, return 0"); 993 return 0; 994 } 995 996 static const struct net_device_ops smsc75xx_netdev_ops = { 997 .ndo_open = usbnet_open, 998 .ndo_stop = usbnet_stop, 999 .ndo_start_xmit = usbnet_start_xmit, 1000 .ndo_tx_timeout = usbnet_tx_timeout, 1001 .ndo_change_mtu = smsc75xx_change_mtu, 1002 .ndo_set_mac_address = eth_mac_addr, 1003 .ndo_validate_addr = eth_validate_addr, 1004 .ndo_do_ioctl = smsc75xx_ioctl, 1005 .ndo_set_rx_mode = smsc75xx_set_multicast, 1006 .ndo_set_features = smsc75xx_set_features, 1007 }; 1008 1009 static int smsc75xx_bind(struct usbnet *dev, struct usb_interface *intf) 1010 { 1011 struct smsc75xx_priv *pdata = NULL; 1012 int ret; 1013 1014 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n"); 1015 1016 ret = usbnet_get_endpoints(dev, intf); 1017 check_warn_return(ret, "usbnet_get_endpoints failed: %d", ret); 1018 1019 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc75xx_priv), 1020 GFP_KERNEL); 1021 1022 pdata = (struct smsc75xx_priv *)(dev->data[0]); 1023 if (!pdata) { 1024 netdev_warn(dev->net, "Unable to allocate smsc75xx_priv"); 1025 return -ENOMEM; 1026 } 1027 1028 pdata->dev = dev; 1029 1030 spin_lock_init(&pdata->rfe_ctl_lock); 1031 mutex_init(&pdata->dataport_mutex); 1032 1033 INIT_WORK(&pdata->set_multicast, smsc75xx_deferred_multicast_write); 1034 1035 if (DEFAULT_TX_CSUM_ENABLE) { 1036 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; 1037 if (DEFAULT_TSO_ENABLE) 1038 dev->net->features |= NETIF_F_SG | 1039 NETIF_F_TSO | NETIF_F_TSO6; 1040 } 1041 if (DEFAULT_RX_CSUM_ENABLE) 1042 dev->net->features |= NETIF_F_RXCSUM; 1043 1044 dev->net->hw_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 1045 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_RXCSUM; 1046 1047 /* Init all registers */ 1048 ret = smsc75xx_reset(dev); 1049 1050 dev->net->netdev_ops = &smsc75xx_netdev_ops; 1051 dev->net->ethtool_ops = &smsc75xx_ethtool_ops; 1052 dev->net->flags |= IFF_MULTICAST; 1053 dev->net->hard_header_len += SMSC75XX_TX_OVERHEAD; 1054 return 0; 1055 } 1056 1057 static void smsc75xx_unbind(struct usbnet *dev, struct usb_interface *intf) 1058 { 1059 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 1060 if (pdata) { 1061 netif_dbg(dev, ifdown, dev->net, "free pdata"); 1062 kfree(pdata); 1063 pdata = NULL; 1064 dev->data[0] = 0; 1065 } 1066 } 1067 1068 static void smsc75xx_rx_csum_offload(struct usbnet *dev, struct sk_buff *skb, 1069 u32 rx_cmd_a, u32 rx_cmd_b) 1070 { 1071 if (!(dev->net->features & NETIF_F_RXCSUM) || 1072 unlikely(rx_cmd_a & RX_CMD_A_LCSM)) { 1073 skb->ip_summed = CHECKSUM_NONE; 1074 } else { 1075 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT)); 1076 skb->ip_summed = CHECKSUM_COMPLETE; 1077 } 1078 } 1079 1080 static int smsc75xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb) 1081 { 1082 while (skb->len > 0) { 1083 u32 rx_cmd_a, rx_cmd_b, align_count, size; 1084 struct sk_buff *ax_skb; 1085 unsigned char *packet; 1086 1087 memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a)); 1088 le32_to_cpus(&rx_cmd_a); 1089 skb_pull(skb, 4); 1090 1091 memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b)); 1092 le32_to_cpus(&rx_cmd_b); 1093 skb_pull(skb, 4 + RXW_PADDING); 1094 1095 packet = skb->data; 1096 1097 /* get the packet length */ 1098 size = (rx_cmd_a & RX_CMD_A_LEN) - RXW_PADDING; 1099 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4; 1100 1101 if (unlikely(rx_cmd_a & RX_CMD_A_RED)) { 1102 netif_dbg(dev, rx_err, dev->net, 1103 "Error rx_cmd_a=0x%08x", rx_cmd_a); 1104 dev->net->stats.rx_errors++; 1105 dev->net->stats.rx_dropped++; 1106 1107 if (rx_cmd_a & RX_CMD_A_FCS) 1108 dev->net->stats.rx_crc_errors++; 1109 else if (rx_cmd_a & (RX_CMD_A_LONG | RX_CMD_A_RUNT)) 1110 dev->net->stats.rx_frame_errors++; 1111 } else { 1112 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */ 1113 if (unlikely(size > (ETH_FRAME_LEN + 12))) { 1114 netif_dbg(dev, rx_err, dev->net, 1115 "size err rx_cmd_a=0x%08x", rx_cmd_a); 1116 return 0; 1117 } 1118 1119 /* last frame in this batch */ 1120 if (skb->len == size) { 1121 smsc75xx_rx_csum_offload(dev, skb, rx_cmd_a, 1122 rx_cmd_b); 1123 1124 skb_trim(skb, skb->len - 4); /* remove fcs */ 1125 skb->truesize = size + sizeof(struct sk_buff); 1126 1127 return 1; 1128 } 1129 1130 ax_skb = skb_clone(skb, GFP_ATOMIC); 1131 if (unlikely(!ax_skb)) { 1132 netdev_warn(dev->net, "Error allocating skb"); 1133 return 0; 1134 } 1135 1136 ax_skb->len = size; 1137 ax_skb->data = packet; 1138 skb_set_tail_pointer(ax_skb, size); 1139 1140 smsc75xx_rx_csum_offload(dev, ax_skb, rx_cmd_a, 1141 rx_cmd_b); 1142 1143 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */ 1144 ax_skb->truesize = size + sizeof(struct sk_buff); 1145 1146 usbnet_skb_return(dev, ax_skb); 1147 } 1148 1149 skb_pull(skb, size); 1150 1151 /* padding bytes before the next frame starts */ 1152 if (skb->len) 1153 skb_pull(skb, align_count); 1154 } 1155 1156 if (unlikely(skb->len < 0)) { 1157 netdev_warn(dev->net, "invalid rx length<0 %d", skb->len); 1158 return 0; 1159 } 1160 1161 return 1; 1162 } 1163 1164 static struct sk_buff *smsc75xx_tx_fixup(struct usbnet *dev, 1165 struct sk_buff *skb, gfp_t flags) 1166 { 1167 u32 tx_cmd_a, tx_cmd_b; 1168 1169 skb_linearize(skb); 1170 1171 if (skb_headroom(skb) < SMSC75XX_TX_OVERHEAD) { 1172 struct sk_buff *skb2 = 1173 skb_copy_expand(skb, SMSC75XX_TX_OVERHEAD, 0, flags); 1174 dev_kfree_skb_any(skb); 1175 skb = skb2; 1176 if (!skb) 1177 return NULL; 1178 } 1179 1180 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN) | TX_CMD_A_FCS; 1181 1182 if (skb->ip_summed == CHECKSUM_PARTIAL) 1183 tx_cmd_a |= TX_CMD_A_IPE | TX_CMD_A_TPE; 1184 1185 if (skb_is_gso(skb)) { 1186 u16 mss = max(skb_shinfo(skb)->gso_size, TX_MSS_MIN); 1187 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT) & TX_CMD_B_MSS; 1188 1189 tx_cmd_a |= TX_CMD_A_LSO; 1190 } else { 1191 tx_cmd_b = 0; 1192 } 1193 1194 skb_push(skb, 4); 1195 cpu_to_le32s(&tx_cmd_b); 1196 memcpy(skb->data, &tx_cmd_b, 4); 1197 1198 skb_push(skb, 4); 1199 cpu_to_le32s(&tx_cmd_a); 1200 memcpy(skb->data, &tx_cmd_a, 4); 1201 1202 return skb; 1203 } 1204 1205 static const struct driver_info smsc75xx_info = { 1206 .description = "smsc75xx USB 2.0 Gigabit Ethernet", 1207 .bind = smsc75xx_bind, 1208 .unbind = smsc75xx_unbind, 1209 .link_reset = smsc75xx_link_reset, 1210 .reset = smsc75xx_reset, 1211 .rx_fixup = smsc75xx_rx_fixup, 1212 .tx_fixup = smsc75xx_tx_fixup, 1213 .status = smsc75xx_status, 1214 .flags = FLAG_ETHER | FLAG_SEND_ZLP, 1215 }; 1216 1217 static const struct usb_device_id products[] = { 1218 { 1219 /* SMSC7500 USB Gigabit Ethernet Device */ 1220 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7500), 1221 .driver_info = (unsigned long) &smsc75xx_info, 1222 }, 1223 { 1224 /* SMSC7500 USB Gigabit Ethernet Device */ 1225 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7505), 1226 .driver_info = (unsigned long) &smsc75xx_info, 1227 }, 1228 { }, /* END */ 1229 }; 1230 MODULE_DEVICE_TABLE(usb, products); 1231 1232 static struct usb_driver smsc75xx_driver = { 1233 .name = SMSC_CHIPNAME, 1234 .id_table = products, 1235 .probe = usbnet_probe, 1236 .suspend = usbnet_suspend, 1237 .resume = usbnet_resume, 1238 .disconnect = usbnet_disconnect, 1239 }; 1240 1241 module_usb_driver(smsc75xx_driver); 1242 1243 MODULE_AUTHOR("Nancy Lin"); 1244 MODULE_AUTHOR("Steve Glendinning <steve.glendinning@smsc.com>"); 1245 MODULE_DESCRIPTION("SMSC75XX USB 2.0 Gigabit Ethernet Devices"); 1246 MODULE_LICENSE("GPL"); 1247