xref: /openbmc/linux/drivers/net/usb/ax88179_178a.c (revision fb8d6c8d)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * ASIX AX88179/178A USB 3.0/2.0 to Gigabit Ethernet Devices
4  *
5  * Copyright (C) 2011-2013 ASIX
6  */
7 
8 #include <linux/module.h>
9 #include <linux/etherdevice.h>
10 #include <linux/mii.h>
11 #include <linux/usb.h>
12 #include <linux/crc32.h>
13 #include <linux/usb/usbnet.h>
14 #include <uapi/linux/mdio.h>
15 #include <linux/mdio.h>
16 
17 #define AX88179_PHY_ID				0x03
18 #define AX_EEPROM_LEN				0x100
19 #define AX88179_EEPROM_MAGIC			0x17900b95
20 #define AX_MCAST_FLTSIZE			8
21 #define AX_MAX_MCAST				64
22 #define AX_INT_PPLS_LINK			((u32)BIT(16))
23 #define AX_RXHDR_L4_TYPE_MASK			0x1c
24 #define AX_RXHDR_L4_TYPE_UDP			4
25 #define AX_RXHDR_L4_TYPE_TCP			16
26 #define AX_RXHDR_L3CSUM_ERR			2
27 #define AX_RXHDR_L4CSUM_ERR			1
28 #define AX_RXHDR_CRC_ERR			((u32)BIT(29))
29 #define AX_RXHDR_DROP_ERR			((u32)BIT(31))
30 #define AX_ACCESS_MAC				0x01
31 #define AX_ACCESS_PHY				0x02
32 #define AX_ACCESS_EEPROM			0x04
33 #define AX_ACCESS_EFUS				0x05
34 #define AX_PAUSE_WATERLVL_HIGH			0x54
35 #define AX_PAUSE_WATERLVL_LOW			0x55
36 
37 #define PHYSICAL_LINK_STATUS			0x02
38 	#define	AX_USB_SS		0x04
39 	#define	AX_USB_HS		0x02
40 
41 #define GENERAL_STATUS				0x03
42 /* Check AX88179 version. UA1:Bit2 = 0,  UA2:Bit2 = 1 */
43 	#define	AX_SECLD		0x04
44 
45 #define AX_SROM_ADDR				0x07
46 #define AX_SROM_CMD				0x0a
47 	#define EEP_RD			0x04
48 	#define EEP_BUSY		0x10
49 
50 #define AX_SROM_DATA_LOW			0x08
51 #define AX_SROM_DATA_HIGH			0x09
52 
53 #define AX_RX_CTL				0x0b
54 	#define AX_RX_CTL_DROPCRCERR	0x0100
55 	#define AX_RX_CTL_IPE		0x0200
56 	#define AX_RX_CTL_START		0x0080
57 	#define AX_RX_CTL_AP		0x0020
58 	#define AX_RX_CTL_AM		0x0010
59 	#define AX_RX_CTL_AB		0x0008
60 	#define AX_RX_CTL_AMALL		0x0002
61 	#define AX_RX_CTL_PRO		0x0001
62 	#define AX_RX_CTL_STOP		0x0000
63 
64 #define AX_NODE_ID				0x10
65 #define AX_MULFLTARY				0x16
66 
67 #define AX_MEDIUM_STATUS_MODE			0x22
68 	#define AX_MEDIUM_GIGAMODE	0x01
69 	#define AX_MEDIUM_FULL_DUPLEX	0x02
70 	#define AX_MEDIUM_EN_125MHZ	0x08
71 	#define AX_MEDIUM_RXFLOW_CTRLEN	0x10
72 	#define AX_MEDIUM_TXFLOW_CTRLEN	0x20
73 	#define AX_MEDIUM_RECEIVE_EN	0x100
74 	#define AX_MEDIUM_PS		0x200
75 	#define AX_MEDIUM_JUMBO_EN	0x8040
76 
77 #define AX_MONITOR_MOD				0x24
78 	#define AX_MONITOR_MODE_RWLC	0x02
79 	#define AX_MONITOR_MODE_RWMP	0x04
80 	#define AX_MONITOR_MODE_PMEPOL	0x20
81 	#define AX_MONITOR_MODE_PMETYPE	0x40
82 
83 #define AX_GPIO_CTRL				0x25
84 	#define AX_GPIO_CTRL_GPIO3EN	0x80
85 	#define AX_GPIO_CTRL_GPIO2EN	0x40
86 	#define AX_GPIO_CTRL_GPIO1EN	0x20
87 
88 #define AX_PHYPWR_RSTCTL			0x26
89 	#define AX_PHYPWR_RSTCTL_BZ	0x0010
90 	#define AX_PHYPWR_RSTCTL_IPRL	0x0020
91 	#define AX_PHYPWR_RSTCTL_AT	0x1000
92 
93 #define AX_RX_BULKIN_QCTRL			0x2e
94 #define AX_CLK_SELECT				0x33
95 	#define AX_CLK_SELECT_BCS	0x01
96 	#define AX_CLK_SELECT_ACS	0x02
97 	#define AX_CLK_SELECT_ULR	0x08
98 
99 #define AX_RXCOE_CTL				0x34
100 	#define AX_RXCOE_IP		0x01
101 	#define AX_RXCOE_TCP		0x02
102 	#define AX_RXCOE_UDP		0x04
103 	#define AX_RXCOE_TCPV6		0x20
104 	#define AX_RXCOE_UDPV6		0x40
105 
106 #define AX_TXCOE_CTL				0x35
107 	#define AX_TXCOE_IP		0x01
108 	#define AX_TXCOE_TCP		0x02
109 	#define AX_TXCOE_UDP		0x04
110 	#define AX_TXCOE_TCPV6		0x20
111 	#define AX_TXCOE_UDPV6		0x40
112 
113 #define AX_LEDCTRL				0x73
114 
115 #define GMII_PHY_PHYSR				0x11
116 	#define GMII_PHY_PHYSR_SMASK	0xc000
117 	#define GMII_PHY_PHYSR_GIGA	0x8000
118 	#define GMII_PHY_PHYSR_100	0x4000
119 	#define GMII_PHY_PHYSR_FULL	0x2000
120 	#define GMII_PHY_PHYSR_LINK	0x400
121 
122 #define GMII_LED_ACT				0x1a
123 	#define	GMII_LED_ACTIVE_MASK	0xff8f
124 	#define	GMII_LED0_ACTIVE	BIT(4)
125 	#define	GMII_LED1_ACTIVE	BIT(5)
126 	#define	GMII_LED2_ACTIVE	BIT(6)
127 
128 #define GMII_LED_LINK				0x1c
129 	#define	GMII_LED_LINK_MASK	0xf888
130 	#define	GMII_LED0_LINK_10	BIT(0)
131 	#define	GMII_LED0_LINK_100	BIT(1)
132 	#define	GMII_LED0_LINK_1000	BIT(2)
133 	#define	GMII_LED1_LINK_10	BIT(4)
134 	#define	GMII_LED1_LINK_100	BIT(5)
135 	#define	GMII_LED1_LINK_1000	BIT(6)
136 	#define	GMII_LED2_LINK_10	BIT(8)
137 	#define	GMII_LED2_LINK_100	BIT(9)
138 	#define	GMII_LED2_LINK_1000	BIT(10)
139 	#define	LED0_ACTIVE		BIT(0)
140 	#define	LED0_LINK_10		BIT(1)
141 	#define	LED0_LINK_100		BIT(2)
142 	#define	LED0_LINK_1000		BIT(3)
143 	#define	LED0_FD			BIT(4)
144 	#define	LED0_USB3_MASK		0x001f
145 	#define	LED1_ACTIVE		BIT(5)
146 	#define	LED1_LINK_10		BIT(6)
147 	#define	LED1_LINK_100		BIT(7)
148 	#define	LED1_LINK_1000		BIT(8)
149 	#define	LED1_FD			BIT(9)
150 	#define	LED1_USB3_MASK		0x03e0
151 	#define	LED2_ACTIVE		BIT(10)
152 	#define	LED2_LINK_1000		BIT(13)
153 	#define	LED2_LINK_100		BIT(12)
154 	#define	LED2_LINK_10		BIT(11)
155 	#define	LED2_FD			BIT(14)
156 	#define	LED_VALID		BIT(15)
157 	#define	LED2_USB3_MASK		0x7c00
158 
159 #define GMII_PHYPAGE				0x1e
160 #define GMII_PHY_PAGE_SELECT			0x1f
161 	#define GMII_PHY_PGSEL_EXT	0x0007
162 	#define GMII_PHY_PGSEL_PAGE0	0x0000
163 	#define GMII_PHY_PGSEL_PAGE3	0x0003
164 	#define GMII_PHY_PGSEL_PAGE5	0x0005
165 
166 struct ax88179_data {
167 	u8  eee_enabled;
168 	u8  eee_active;
169 	u16 rxctl;
170 	u16 reserved;
171 };
172 
173 struct ax88179_int_data {
174 	__le32 intdata1;
175 	__le32 intdata2;
176 };
177 
178 static const struct {
179 	unsigned char ctrl, timer_l, timer_h, size, ifg;
180 } AX88179_BULKIN_SIZE[] =	{
181 	{7, 0x4f, 0,	0x12, 0xff},
182 	{7, 0x20, 3,	0x16, 0xff},
183 	{7, 0xae, 7,	0x18, 0xff},
184 	{7, 0xcc, 0x4c, 0x18, 8},
185 };
186 
187 static int __ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
188 			      u16 size, void *data, int in_pm)
189 {
190 	int ret;
191 	int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
192 
193 	BUG_ON(!dev);
194 
195 	if (!in_pm)
196 		fn = usbnet_read_cmd;
197 	else
198 		fn = usbnet_read_cmd_nopm;
199 
200 	ret = fn(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
201 		 value, index, data, size);
202 
203 	if (unlikely(ret < 0))
204 		netdev_warn(dev->net, "Failed to read reg index 0x%04x: %d\n",
205 			    index, ret);
206 
207 	return ret;
208 }
209 
210 static int __ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
211 			       u16 size, void *data, int in_pm)
212 {
213 	int ret;
214 	int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
215 
216 	BUG_ON(!dev);
217 
218 	if (!in_pm)
219 		fn = usbnet_write_cmd;
220 	else
221 		fn = usbnet_write_cmd_nopm;
222 
223 	ret = fn(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
224 		 value, index, data, size);
225 
226 	if (unlikely(ret < 0))
227 		netdev_warn(dev->net, "Failed to write reg index 0x%04x: %d\n",
228 			    index, ret);
229 
230 	return ret;
231 }
232 
233 static void ax88179_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value,
234 				    u16 index, u16 size, void *data)
235 {
236 	u16 buf;
237 
238 	if (2 == size) {
239 		buf = *((u16 *)data);
240 		cpu_to_le16s(&buf);
241 		usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
242 				       USB_RECIP_DEVICE, value, index, &buf,
243 				       size);
244 	} else {
245 		usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
246 				       USB_RECIP_DEVICE, value, index, data,
247 				       size);
248 	}
249 }
250 
251 static int ax88179_read_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
252 				 u16 index, u16 size, void *data)
253 {
254 	int ret;
255 
256 	if (2 == size) {
257 		u16 buf;
258 		ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 1);
259 		le16_to_cpus(&buf);
260 		*((u16 *)data) = buf;
261 	} else if (4 == size) {
262 		u32 buf;
263 		ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 1);
264 		le32_to_cpus(&buf);
265 		*((u32 *)data) = buf;
266 	} else {
267 		ret = __ax88179_read_cmd(dev, cmd, value, index, size, data, 1);
268 	}
269 
270 	return ret;
271 }
272 
273 static int ax88179_write_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
274 				  u16 index, u16 size, void *data)
275 {
276 	int ret;
277 
278 	if (2 == size) {
279 		u16 buf;
280 		buf = *((u16 *)data);
281 		cpu_to_le16s(&buf);
282 		ret = __ax88179_write_cmd(dev, cmd, value, index,
283 					  size, &buf, 1);
284 	} else {
285 		ret = __ax88179_write_cmd(dev, cmd, value, index,
286 					  size, data, 1);
287 	}
288 
289 	return ret;
290 }
291 
292 static int ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
293 			    u16 size, void *data)
294 {
295 	int ret;
296 
297 	if (2 == size) {
298 		u16 buf;
299 		ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 0);
300 		le16_to_cpus(&buf);
301 		*((u16 *)data) = buf;
302 	} else if (4 == size) {
303 		u32 buf;
304 		ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 0);
305 		le32_to_cpus(&buf);
306 		*((u32 *)data) = buf;
307 	} else {
308 		ret = __ax88179_read_cmd(dev, cmd, value, index, size, data, 0);
309 	}
310 
311 	return ret;
312 }
313 
314 static int ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
315 			     u16 size, void *data)
316 {
317 	int ret;
318 
319 	if (2 == size) {
320 		u16 buf;
321 		buf = *((u16 *)data);
322 		cpu_to_le16s(&buf);
323 		ret = __ax88179_write_cmd(dev, cmd, value, index,
324 					  size, &buf, 0);
325 	} else {
326 		ret = __ax88179_write_cmd(dev, cmd, value, index,
327 					  size, data, 0);
328 	}
329 
330 	return ret;
331 }
332 
333 static void ax88179_status(struct usbnet *dev, struct urb *urb)
334 {
335 	struct ax88179_int_data *event;
336 	u32 link;
337 
338 	if (urb->actual_length < 8)
339 		return;
340 
341 	event = urb->transfer_buffer;
342 	le32_to_cpus((void *)&event->intdata1);
343 
344 	link = (((__force u32)event->intdata1) & AX_INT_PPLS_LINK) >> 16;
345 
346 	if (netif_carrier_ok(dev->net) != link) {
347 		usbnet_link_change(dev, link, 1);
348 		netdev_info(dev->net, "ax88179 - Link status is: %d\n", link);
349 	}
350 }
351 
352 static int ax88179_mdio_read(struct net_device *netdev, int phy_id, int loc)
353 {
354 	struct usbnet *dev = netdev_priv(netdev);
355 	u16 res;
356 
357 	ax88179_read_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
358 	return res;
359 }
360 
361 static void ax88179_mdio_write(struct net_device *netdev, int phy_id, int loc,
362 			       int val)
363 {
364 	struct usbnet *dev = netdev_priv(netdev);
365 	u16 res = (u16) val;
366 
367 	ax88179_write_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
368 }
369 
370 static inline int ax88179_phy_mmd_indirect(struct usbnet *dev, u16 prtad,
371 					   u16 devad)
372 {
373 	u16 tmp16;
374 	int ret;
375 
376 	tmp16 = devad;
377 	ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
378 				MII_MMD_CTRL, 2, &tmp16);
379 
380 	tmp16 = prtad;
381 	ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
382 				MII_MMD_DATA, 2, &tmp16);
383 
384 	tmp16 = devad | MII_MMD_CTRL_NOINCR;
385 	ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
386 				MII_MMD_CTRL, 2, &tmp16);
387 
388 	return ret;
389 }
390 
391 static int
392 ax88179_phy_read_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad)
393 {
394 	int ret;
395 	u16 tmp16;
396 
397 	ax88179_phy_mmd_indirect(dev, prtad, devad);
398 
399 	ret = ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
400 			       MII_MMD_DATA, 2, &tmp16);
401 	if (ret < 0)
402 		return ret;
403 
404 	return tmp16;
405 }
406 
407 static int
408 ax88179_phy_write_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad,
409 			       u16 data)
410 {
411 	int ret;
412 
413 	ax88179_phy_mmd_indirect(dev, prtad, devad);
414 
415 	ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
416 				MII_MMD_DATA, 2, &data);
417 
418 	if (ret < 0)
419 		return ret;
420 
421 	return 0;
422 }
423 
424 static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)
425 {
426 	struct usbnet *dev = usb_get_intfdata(intf);
427 	u16 tmp16;
428 	u8 tmp8;
429 
430 	usbnet_suspend(intf, message);
431 
432 	/* Disable RX path */
433 	ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
434 			      2, 2, &tmp16);
435 	tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
436 	ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
437 			       2, 2, &tmp16);
438 
439 	/* Force bulk-in zero length */
440 	ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
441 			      2, 2, &tmp16);
442 
443 	tmp16 |= AX_PHYPWR_RSTCTL_BZ | AX_PHYPWR_RSTCTL_IPRL;
444 	ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
445 			       2, 2, &tmp16);
446 
447 	/* change clock */
448 	tmp8 = 0;
449 	ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
450 
451 	/* Configure RX control register => stop operation */
452 	tmp16 = AX_RX_CTL_STOP;
453 	ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
454 
455 	return 0;
456 }
457 
458 /* This function is used to enable the autodetach function. */
459 /* This function is determined by offset 0x43 of EEPROM */
460 static int ax88179_auto_detach(struct usbnet *dev, int in_pm)
461 {
462 	u16 tmp16;
463 	u8 tmp8;
464 	int (*fnr)(struct usbnet *, u8, u16, u16, u16, void *);
465 	int (*fnw)(struct usbnet *, u8, u16, u16, u16, void *);
466 
467 	if (!in_pm) {
468 		fnr = ax88179_read_cmd;
469 		fnw = ax88179_write_cmd;
470 	} else {
471 		fnr = ax88179_read_cmd_nopm;
472 		fnw = ax88179_write_cmd_nopm;
473 	}
474 
475 	if (fnr(dev, AX_ACCESS_EEPROM, 0x43, 1, 2, &tmp16) < 0)
476 		return 0;
477 
478 	if ((tmp16 == 0xFFFF) || (!(tmp16 & 0x0100)))
479 		return 0;
480 
481 	/* Enable Auto Detach bit */
482 	tmp8 = 0;
483 	fnr(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
484 	tmp8 |= AX_CLK_SELECT_ULR;
485 	fnw(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
486 
487 	fnr(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
488 	tmp16 |= AX_PHYPWR_RSTCTL_AT;
489 	fnw(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
490 
491 	return 0;
492 }
493 
494 static int ax88179_resume(struct usb_interface *intf)
495 {
496 	struct usbnet *dev = usb_get_intfdata(intf);
497 	u16 tmp16;
498 	u8 tmp8;
499 
500 	usbnet_link_change(dev, 0, 0);
501 
502 	/* Power up ethernet PHY */
503 	tmp16 = 0;
504 	ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
505 			       2, 2, &tmp16);
506 	udelay(1000);
507 
508 	tmp16 = AX_PHYPWR_RSTCTL_IPRL;
509 	ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
510 			       2, 2, &tmp16);
511 	msleep(200);
512 
513 	/* Ethernet PHY Auto Detach*/
514 	ax88179_auto_detach(dev, 1);
515 
516 	/* Enable clock */
517 	ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC,  AX_CLK_SELECT, 1, 1, &tmp8);
518 	tmp8 |= AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
519 	ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
520 	msleep(100);
521 
522 	/* Configure RX control register => start operation */
523 	tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
524 		AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
525 	ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
526 
527 	return usbnet_resume(intf);
528 }
529 
530 static void
531 ax88179_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
532 {
533 	struct usbnet *dev = netdev_priv(net);
534 	u8 opt;
535 
536 	if (ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
537 			     1, 1, &opt) < 0) {
538 		wolinfo->supported = 0;
539 		wolinfo->wolopts = 0;
540 		return;
541 	}
542 
543 	wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
544 	wolinfo->wolopts = 0;
545 	if (opt & AX_MONITOR_MODE_RWLC)
546 		wolinfo->wolopts |= WAKE_PHY;
547 	if (opt & AX_MONITOR_MODE_RWMP)
548 		wolinfo->wolopts |= WAKE_MAGIC;
549 }
550 
551 static int
552 ax88179_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
553 {
554 	struct usbnet *dev = netdev_priv(net);
555 	u8 opt = 0;
556 
557 	if (wolinfo->wolopts & ~(WAKE_PHY | WAKE_MAGIC))
558 		return -EINVAL;
559 
560 	if (wolinfo->wolopts & WAKE_PHY)
561 		opt |= AX_MONITOR_MODE_RWLC;
562 	if (wolinfo->wolopts & WAKE_MAGIC)
563 		opt |= AX_MONITOR_MODE_RWMP;
564 
565 	if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
566 			      1, 1, &opt) < 0)
567 		return -EINVAL;
568 
569 	return 0;
570 }
571 
572 static int ax88179_get_eeprom_len(struct net_device *net)
573 {
574 	return AX_EEPROM_LEN;
575 }
576 
577 static int
578 ax88179_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
579 		   u8 *data)
580 {
581 	struct usbnet *dev = netdev_priv(net);
582 	u16 *eeprom_buff;
583 	int first_word, last_word;
584 	int i, ret;
585 
586 	if (eeprom->len == 0)
587 		return -EINVAL;
588 
589 	eeprom->magic = AX88179_EEPROM_MAGIC;
590 
591 	first_word = eeprom->offset >> 1;
592 	last_word = (eeprom->offset + eeprom->len - 1) >> 1;
593 	eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
594 				    GFP_KERNEL);
595 	if (!eeprom_buff)
596 		return -ENOMEM;
597 
598 	/* ax88179/178A returns 2 bytes from eeprom on read */
599 	for (i = first_word; i <= last_word; i++) {
600 		ret = __ax88179_read_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,
601 					 &eeprom_buff[i - first_word],
602 					 0);
603 		if (ret < 0) {
604 			kfree(eeprom_buff);
605 			return -EIO;
606 		}
607 	}
608 
609 	memcpy(data, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
610 	kfree(eeprom_buff);
611 	return 0;
612 }
613 
614 static int ax88179_get_link_ksettings(struct net_device *net,
615 				      struct ethtool_link_ksettings *cmd)
616 {
617 	struct usbnet *dev = netdev_priv(net);
618 
619 	mii_ethtool_get_link_ksettings(&dev->mii, cmd);
620 
621 	return 0;
622 }
623 
624 static int ax88179_set_link_ksettings(struct net_device *net,
625 				      const struct ethtool_link_ksettings *cmd)
626 {
627 	struct usbnet *dev = netdev_priv(net);
628 	return mii_ethtool_set_link_ksettings(&dev->mii, cmd);
629 }
630 
631 static int
632 ax88179_ethtool_get_eee(struct usbnet *dev, struct ethtool_eee *data)
633 {
634 	int val;
635 
636 	/* Get Supported EEE */
637 	val = ax88179_phy_read_mmd_indirect(dev, MDIO_PCS_EEE_ABLE,
638 					    MDIO_MMD_PCS);
639 	if (val < 0)
640 		return val;
641 	data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
642 
643 	/* Get advertisement EEE */
644 	val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_ADV,
645 					    MDIO_MMD_AN);
646 	if (val < 0)
647 		return val;
648 	data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
649 
650 	/* Get LP advertisement EEE */
651 	val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_LPABLE,
652 					    MDIO_MMD_AN);
653 	if (val < 0)
654 		return val;
655 	data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
656 
657 	return 0;
658 }
659 
660 static int
661 ax88179_ethtool_set_eee(struct usbnet *dev, struct ethtool_eee *data)
662 {
663 	u16 tmp16 = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
664 
665 	return ax88179_phy_write_mmd_indirect(dev, MDIO_AN_EEE_ADV,
666 					      MDIO_MMD_AN, tmp16);
667 }
668 
669 static int ax88179_chk_eee(struct usbnet *dev)
670 {
671 	struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
672 	struct ax88179_data *priv = (struct ax88179_data *)dev->data;
673 
674 	mii_ethtool_gset(&dev->mii, &ecmd);
675 
676 	if (ecmd.duplex & DUPLEX_FULL) {
677 		int eee_lp, eee_cap, eee_adv;
678 		u32 lp, cap, adv, supported = 0;
679 
680 		eee_cap = ax88179_phy_read_mmd_indirect(dev,
681 							MDIO_PCS_EEE_ABLE,
682 							MDIO_MMD_PCS);
683 		if (eee_cap < 0) {
684 			priv->eee_active = 0;
685 			return false;
686 		}
687 
688 		cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
689 		if (!cap) {
690 			priv->eee_active = 0;
691 			return false;
692 		}
693 
694 		eee_lp = ax88179_phy_read_mmd_indirect(dev,
695 						       MDIO_AN_EEE_LPABLE,
696 						       MDIO_MMD_AN);
697 		if (eee_lp < 0) {
698 			priv->eee_active = 0;
699 			return false;
700 		}
701 
702 		eee_adv = ax88179_phy_read_mmd_indirect(dev,
703 							MDIO_AN_EEE_ADV,
704 							MDIO_MMD_AN);
705 
706 		if (eee_adv < 0) {
707 			priv->eee_active = 0;
708 			return false;
709 		}
710 
711 		adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
712 		lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
713 		supported = (ecmd.speed == SPEED_1000) ?
714 			     SUPPORTED_1000baseT_Full :
715 			     SUPPORTED_100baseT_Full;
716 
717 		if (!(lp & adv & supported)) {
718 			priv->eee_active = 0;
719 			return false;
720 		}
721 
722 		priv->eee_active = 1;
723 		return true;
724 	}
725 
726 	priv->eee_active = 0;
727 	return false;
728 }
729 
730 static void ax88179_disable_eee(struct usbnet *dev)
731 {
732 	u16 tmp16;
733 
734 	tmp16 = GMII_PHY_PGSEL_PAGE3;
735 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
736 			  GMII_PHY_PAGE_SELECT, 2, &tmp16);
737 
738 	tmp16 = 0x3246;
739 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
740 			  MII_PHYADDR, 2, &tmp16);
741 
742 	tmp16 = GMII_PHY_PGSEL_PAGE0;
743 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
744 			  GMII_PHY_PAGE_SELECT, 2, &tmp16);
745 }
746 
747 static void ax88179_enable_eee(struct usbnet *dev)
748 {
749 	u16 tmp16;
750 
751 	tmp16 = GMII_PHY_PGSEL_PAGE3;
752 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
753 			  GMII_PHY_PAGE_SELECT, 2, &tmp16);
754 
755 	tmp16 = 0x3247;
756 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
757 			  MII_PHYADDR, 2, &tmp16);
758 
759 	tmp16 = GMII_PHY_PGSEL_PAGE5;
760 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
761 			  GMII_PHY_PAGE_SELECT, 2, &tmp16);
762 
763 	tmp16 = 0x0680;
764 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
765 			  MII_BMSR, 2, &tmp16);
766 
767 	tmp16 = GMII_PHY_PGSEL_PAGE0;
768 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
769 			  GMII_PHY_PAGE_SELECT, 2, &tmp16);
770 }
771 
772 static int ax88179_get_eee(struct net_device *net, struct ethtool_eee *edata)
773 {
774 	struct usbnet *dev = netdev_priv(net);
775 	struct ax88179_data *priv = (struct ax88179_data *)dev->data;
776 
777 	edata->eee_enabled = priv->eee_enabled;
778 	edata->eee_active = priv->eee_active;
779 
780 	return ax88179_ethtool_get_eee(dev, edata);
781 }
782 
783 static int ax88179_set_eee(struct net_device *net, struct ethtool_eee *edata)
784 {
785 	struct usbnet *dev = netdev_priv(net);
786 	struct ax88179_data *priv = (struct ax88179_data *)dev->data;
787 	int ret = -EOPNOTSUPP;
788 
789 	priv->eee_enabled = edata->eee_enabled;
790 	if (!priv->eee_enabled) {
791 		ax88179_disable_eee(dev);
792 	} else {
793 		priv->eee_enabled = ax88179_chk_eee(dev);
794 		if (!priv->eee_enabled)
795 			return -EOPNOTSUPP;
796 
797 		ax88179_enable_eee(dev);
798 	}
799 
800 	ret = ax88179_ethtool_set_eee(dev, edata);
801 	if (ret)
802 		return ret;
803 
804 	mii_nway_restart(&dev->mii);
805 
806 	usbnet_link_change(dev, 0, 0);
807 
808 	return ret;
809 }
810 
811 static int ax88179_ioctl(struct net_device *net, struct ifreq *rq, int cmd)
812 {
813 	struct usbnet *dev = netdev_priv(net);
814 	return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
815 }
816 
817 static const struct ethtool_ops ax88179_ethtool_ops = {
818 	.get_link		= ethtool_op_get_link,
819 	.get_msglevel		= usbnet_get_msglevel,
820 	.set_msglevel		= usbnet_set_msglevel,
821 	.get_wol		= ax88179_get_wol,
822 	.set_wol		= ax88179_set_wol,
823 	.get_eeprom_len		= ax88179_get_eeprom_len,
824 	.get_eeprom		= ax88179_get_eeprom,
825 	.get_eee		= ax88179_get_eee,
826 	.set_eee		= ax88179_set_eee,
827 	.nway_reset		= usbnet_nway_reset,
828 	.get_link_ksettings	= ax88179_get_link_ksettings,
829 	.set_link_ksettings	= ax88179_set_link_ksettings,
830 };
831 
832 static void ax88179_set_multicast(struct net_device *net)
833 {
834 	struct usbnet *dev = netdev_priv(net);
835 	struct ax88179_data *data = (struct ax88179_data *)dev->data;
836 	u8 *m_filter = ((u8 *)dev->data) + 12;
837 
838 	data->rxctl = (AX_RX_CTL_START | AX_RX_CTL_AB | AX_RX_CTL_IPE);
839 
840 	if (net->flags & IFF_PROMISC) {
841 		data->rxctl |= AX_RX_CTL_PRO;
842 	} else if (net->flags & IFF_ALLMULTI ||
843 		   netdev_mc_count(net) > AX_MAX_MCAST) {
844 		data->rxctl |= AX_RX_CTL_AMALL;
845 	} else if (netdev_mc_empty(net)) {
846 		/* just broadcast and directed */
847 	} else {
848 		/* We use the 20 byte dev->data for our 8 byte filter buffer
849 		 * to avoid allocating memory that is tricky to free later
850 		 */
851 		u32 crc_bits;
852 		struct netdev_hw_addr *ha;
853 
854 		memset(m_filter, 0, AX_MCAST_FLTSIZE);
855 
856 		netdev_for_each_mc_addr(ha, net) {
857 			crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
858 			*(m_filter + (crc_bits >> 3)) |= (1 << (crc_bits & 7));
859 		}
860 
861 		ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_MULFLTARY,
862 					AX_MCAST_FLTSIZE, AX_MCAST_FLTSIZE,
863 					m_filter);
864 
865 		data->rxctl |= AX_RX_CTL_AM;
866 	}
867 
868 	ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_RX_CTL,
869 				2, 2, &data->rxctl);
870 }
871 
872 static int
873 ax88179_set_features(struct net_device *net, netdev_features_t features)
874 {
875 	u8 tmp;
876 	struct usbnet *dev = netdev_priv(net);
877 	netdev_features_t changed = net->features ^ features;
878 
879 	if (changed & NETIF_F_IP_CSUM) {
880 		ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
881 		tmp ^= AX_TXCOE_TCP | AX_TXCOE_UDP;
882 		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
883 	}
884 
885 	if (changed & NETIF_F_IPV6_CSUM) {
886 		ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
887 		tmp ^= AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
888 		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
889 	}
890 
891 	if (changed & NETIF_F_RXCSUM) {
892 		ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
893 		tmp ^= AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
894 		       AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
895 		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
896 	}
897 
898 	return 0;
899 }
900 
901 static int ax88179_change_mtu(struct net_device *net, int new_mtu)
902 {
903 	struct usbnet *dev = netdev_priv(net);
904 	u16 tmp16;
905 
906 	net->mtu = new_mtu;
907 	dev->hard_mtu = net->mtu + net->hard_header_len;
908 
909 	if (net->mtu > 1500) {
910 		ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
911 				 2, 2, &tmp16);
912 		tmp16 |= AX_MEDIUM_JUMBO_EN;
913 		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
914 				  2, 2, &tmp16);
915 	} else {
916 		ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
917 				 2, 2, &tmp16);
918 		tmp16 &= ~AX_MEDIUM_JUMBO_EN;
919 		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
920 				  2, 2, &tmp16);
921 	}
922 
923 	/* max qlen depend on hard_mtu and rx_urb_size */
924 	usbnet_update_max_qlen(dev);
925 
926 	return 0;
927 }
928 
929 static int ax88179_set_mac_addr(struct net_device *net, void *p)
930 {
931 	struct usbnet *dev = netdev_priv(net);
932 	struct sockaddr *addr = p;
933 	int ret;
934 
935 	if (netif_running(net))
936 		return -EBUSY;
937 	if (!is_valid_ether_addr(addr->sa_data))
938 		return -EADDRNOTAVAIL;
939 
940 	memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
941 
942 	/* Set the MAC address */
943 	ret = ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
944 				 ETH_ALEN, net->dev_addr);
945 	if (ret < 0)
946 		return ret;
947 
948 	return 0;
949 }
950 
951 static const struct net_device_ops ax88179_netdev_ops = {
952 	.ndo_open		= usbnet_open,
953 	.ndo_stop		= usbnet_stop,
954 	.ndo_start_xmit		= usbnet_start_xmit,
955 	.ndo_tx_timeout		= usbnet_tx_timeout,
956 	.ndo_get_stats64	= usbnet_get_stats64,
957 	.ndo_change_mtu		= ax88179_change_mtu,
958 	.ndo_set_mac_address	= ax88179_set_mac_addr,
959 	.ndo_validate_addr	= eth_validate_addr,
960 	.ndo_do_ioctl		= ax88179_ioctl,
961 	.ndo_set_rx_mode	= ax88179_set_multicast,
962 	.ndo_set_features	= ax88179_set_features,
963 };
964 
965 static int ax88179_check_eeprom(struct usbnet *dev)
966 {
967 	u8 i, buf, eeprom[20];
968 	u16 csum, delay = HZ / 10;
969 	unsigned long jtimeout;
970 
971 	/* Read EEPROM content */
972 	for (i = 0; i < 6; i++) {
973 		buf = i;
974 		if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
975 				      1, 1, &buf) < 0)
976 			return -EINVAL;
977 
978 		buf = EEP_RD;
979 		if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
980 				      1, 1, &buf) < 0)
981 			return -EINVAL;
982 
983 		jtimeout = jiffies + delay;
984 		do {
985 			ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
986 					 1, 1, &buf);
987 
988 			if (time_after(jiffies, jtimeout))
989 				return -EINVAL;
990 
991 		} while (buf & EEP_BUSY);
992 
993 		__ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
994 				   2, 2, &eeprom[i * 2], 0);
995 
996 		if ((i == 0) && (eeprom[0] == 0xFF))
997 			return -EINVAL;
998 	}
999 
1000 	csum = eeprom[6] + eeprom[7] + eeprom[8] + eeprom[9];
1001 	csum = (csum >> 8) + (csum & 0xff);
1002 	if ((csum + eeprom[10]) != 0xff)
1003 		return -EINVAL;
1004 
1005 	return 0;
1006 }
1007 
1008 static int ax88179_check_efuse(struct usbnet *dev, u16 *ledmode)
1009 {
1010 	u8	i;
1011 	u8	efuse[64];
1012 	u16	csum = 0;
1013 
1014 	if (ax88179_read_cmd(dev, AX_ACCESS_EFUS, 0, 64, 64, efuse) < 0)
1015 		return -EINVAL;
1016 
1017 	if (*efuse == 0xFF)
1018 		return -EINVAL;
1019 
1020 	for (i = 0; i < 64; i++)
1021 		csum = csum + efuse[i];
1022 
1023 	while (csum > 255)
1024 		csum = (csum & 0x00FF) + ((csum >> 8) & 0x00FF);
1025 
1026 	if (csum != 0xFF)
1027 		return -EINVAL;
1028 
1029 	*ledmode = (efuse[51] << 8) | efuse[52];
1030 
1031 	return 0;
1032 }
1033 
1034 static int ax88179_convert_old_led(struct usbnet *dev, u16 *ledvalue)
1035 {
1036 	u16 led;
1037 
1038 	/* Loaded the old eFuse LED Mode */
1039 	if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x3C, 1, 2, &led) < 0)
1040 		return -EINVAL;
1041 
1042 	led >>= 8;
1043 	switch (led) {
1044 	case 0xFF:
1045 		led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
1046 		      LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
1047 		      LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
1048 		break;
1049 	case 0xFE:
1050 		led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 | LED_VALID;
1051 		break;
1052 	case 0xFD:
1053 		led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 |
1054 		      LED2_LINK_10 | LED_VALID;
1055 		break;
1056 	case 0xFC:
1057 		led = LED0_ACTIVE | LED1_ACTIVE | LED1_LINK_1000 | LED2_ACTIVE |
1058 		      LED2_LINK_100 | LED2_LINK_10 | LED_VALID;
1059 		break;
1060 	default:
1061 		led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
1062 		      LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
1063 		      LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
1064 		break;
1065 	}
1066 
1067 	*ledvalue = led;
1068 
1069 	return 0;
1070 }
1071 
1072 static int ax88179_led_setting(struct usbnet *dev)
1073 {
1074 	u8 ledfd, value = 0;
1075 	u16 tmp, ledact, ledlink, ledvalue = 0, delay = HZ / 10;
1076 	unsigned long jtimeout;
1077 
1078 	/* Check AX88179 version. UA1 or UA2*/
1079 	ax88179_read_cmd(dev, AX_ACCESS_MAC, GENERAL_STATUS, 1, 1, &value);
1080 
1081 	if (!(value & AX_SECLD)) {	/* UA1 */
1082 		value = AX_GPIO_CTRL_GPIO3EN | AX_GPIO_CTRL_GPIO2EN |
1083 			AX_GPIO_CTRL_GPIO1EN;
1084 		if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_GPIO_CTRL,
1085 				      1, 1, &value) < 0)
1086 			return -EINVAL;
1087 	}
1088 
1089 	/* Check EEPROM */
1090 	if (!ax88179_check_eeprom(dev)) {
1091 		value = 0x42;
1092 		if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
1093 				      1, 1, &value) < 0)
1094 			return -EINVAL;
1095 
1096 		value = EEP_RD;
1097 		if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1098 				      1, 1, &value) < 0)
1099 			return -EINVAL;
1100 
1101 		jtimeout = jiffies + delay;
1102 		do {
1103 			ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1104 					 1, 1, &value);
1105 
1106 			if (time_after(jiffies, jtimeout))
1107 				return -EINVAL;
1108 
1109 		} while (value & EEP_BUSY);
1110 
1111 		ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_HIGH,
1112 				 1, 1, &value);
1113 		ledvalue = (value << 8);
1114 
1115 		ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
1116 				 1, 1, &value);
1117 		ledvalue |= value;
1118 
1119 		/* load internal ROM for defaule setting */
1120 		if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
1121 			ax88179_convert_old_led(dev, &ledvalue);
1122 
1123 	} else if (!ax88179_check_efuse(dev, &ledvalue)) {
1124 		if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
1125 			ax88179_convert_old_led(dev, &ledvalue);
1126 	} else {
1127 		ax88179_convert_old_led(dev, &ledvalue);
1128 	}
1129 
1130 	tmp = GMII_PHY_PGSEL_EXT;
1131 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1132 			  GMII_PHY_PAGE_SELECT, 2, &tmp);
1133 
1134 	tmp = 0x2c;
1135 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1136 			  GMII_PHYPAGE, 2, &tmp);
1137 
1138 	ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1139 			 GMII_LED_ACT, 2, &ledact);
1140 
1141 	ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1142 			 GMII_LED_LINK, 2, &ledlink);
1143 
1144 	ledact &= GMII_LED_ACTIVE_MASK;
1145 	ledlink &= GMII_LED_LINK_MASK;
1146 
1147 	if (ledvalue & LED0_ACTIVE)
1148 		ledact |= GMII_LED0_ACTIVE;
1149 
1150 	if (ledvalue & LED1_ACTIVE)
1151 		ledact |= GMII_LED1_ACTIVE;
1152 
1153 	if (ledvalue & LED2_ACTIVE)
1154 		ledact |= GMII_LED2_ACTIVE;
1155 
1156 	if (ledvalue & LED0_LINK_10)
1157 		ledlink |= GMII_LED0_LINK_10;
1158 
1159 	if (ledvalue & LED1_LINK_10)
1160 		ledlink |= GMII_LED1_LINK_10;
1161 
1162 	if (ledvalue & LED2_LINK_10)
1163 		ledlink |= GMII_LED2_LINK_10;
1164 
1165 	if (ledvalue & LED0_LINK_100)
1166 		ledlink |= GMII_LED0_LINK_100;
1167 
1168 	if (ledvalue & LED1_LINK_100)
1169 		ledlink |= GMII_LED1_LINK_100;
1170 
1171 	if (ledvalue & LED2_LINK_100)
1172 		ledlink |= GMII_LED2_LINK_100;
1173 
1174 	if (ledvalue & LED0_LINK_1000)
1175 		ledlink |= GMII_LED0_LINK_1000;
1176 
1177 	if (ledvalue & LED1_LINK_1000)
1178 		ledlink |= GMII_LED1_LINK_1000;
1179 
1180 	if (ledvalue & LED2_LINK_1000)
1181 		ledlink |= GMII_LED2_LINK_1000;
1182 
1183 	tmp = ledact;
1184 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1185 			  GMII_LED_ACT, 2, &tmp);
1186 
1187 	tmp = ledlink;
1188 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1189 			  GMII_LED_LINK, 2, &tmp);
1190 
1191 	tmp = GMII_PHY_PGSEL_PAGE0;
1192 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1193 			  GMII_PHY_PAGE_SELECT, 2, &tmp);
1194 
1195 	/* LED full duplex setting */
1196 	ledfd = 0;
1197 	if (ledvalue & LED0_FD)
1198 		ledfd |= 0x01;
1199 	else if ((ledvalue & LED0_USB3_MASK) == 0)
1200 		ledfd |= 0x02;
1201 
1202 	if (ledvalue & LED1_FD)
1203 		ledfd |= 0x04;
1204 	else if ((ledvalue & LED1_USB3_MASK) == 0)
1205 		ledfd |= 0x08;
1206 
1207 	if (ledvalue & LED2_FD)
1208 		ledfd |= 0x10;
1209 	else if ((ledvalue & LED2_USB3_MASK) == 0)
1210 		ledfd |= 0x20;
1211 
1212 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_LEDCTRL, 1, 1, &ledfd);
1213 
1214 	return 0;
1215 }
1216 
1217 static int ax88179_bind(struct usbnet *dev, struct usb_interface *intf)
1218 {
1219 	u8 buf[5];
1220 	u16 *tmp16;
1221 	u8 *tmp;
1222 	struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data;
1223 	struct ethtool_eee eee_data;
1224 
1225 	usbnet_get_endpoints(dev, intf);
1226 
1227 	tmp16 = (u16 *)buf;
1228 	tmp = (u8 *)buf;
1229 
1230 	memset(ax179_data, 0, sizeof(*ax179_data));
1231 
1232 	/* Power up ethernet PHY */
1233 	*tmp16 = 0;
1234 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1235 	*tmp16 = AX_PHYPWR_RSTCTL_IPRL;
1236 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1237 	msleep(200);
1238 
1239 	*tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
1240 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
1241 	msleep(100);
1242 
1243 	ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
1244 			 ETH_ALEN, dev->net->dev_addr);
1245 	memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN);
1246 
1247 	/* RX bulk configuration */
1248 	memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1249 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1250 
1251 	dev->rx_urb_size = 1024 * 20;
1252 
1253 	*tmp = 0x34;
1254 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
1255 
1256 	*tmp = 0x52;
1257 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
1258 			  1, 1, tmp);
1259 
1260 	dev->net->netdev_ops = &ax88179_netdev_ops;
1261 	dev->net->ethtool_ops = &ax88179_ethtool_ops;
1262 	dev->net->needed_headroom = 8;
1263 	dev->net->max_mtu = 4088;
1264 
1265 	/* Initialize MII structure */
1266 	dev->mii.dev = dev->net;
1267 	dev->mii.mdio_read = ax88179_mdio_read;
1268 	dev->mii.mdio_write = ax88179_mdio_write;
1269 	dev->mii.phy_id_mask = 0xff;
1270 	dev->mii.reg_num_mask = 0xff;
1271 	dev->mii.phy_id = 0x03;
1272 	dev->mii.supports_gmii = 1;
1273 
1274 	dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1275 			      NETIF_F_RXCSUM;
1276 
1277 	dev->net->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1278 				 NETIF_F_RXCSUM;
1279 
1280 	/* Enable checksum offload */
1281 	*tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
1282 	       AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
1283 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
1284 
1285 	*tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
1286 	       AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
1287 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
1288 
1289 	/* Configure RX control register => start operation */
1290 	*tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
1291 		 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
1292 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
1293 
1294 	*tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
1295 	       AX_MONITOR_MODE_RWMP;
1296 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
1297 
1298 	/* Configure default medium type => giga */
1299 	*tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1300 		 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
1301 		 AX_MEDIUM_GIGAMODE;
1302 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1303 			  2, 2, tmp16);
1304 
1305 	ax88179_led_setting(dev);
1306 
1307 	ax179_data->eee_enabled = 0;
1308 	ax179_data->eee_active = 0;
1309 
1310 	ax88179_disable_eee(dev);
1311 
1312 	ax88179_ethtool_get_eee(dev, &eee_data);
1313 	eee_data.advertised = 0;
1314 	ax88179_ethtool_set_eee(dev, &eee_data);
1315 
1316 	/* Restart autoneg */
1317 	mii_nway_restart(&dev->mii);
1318 
1319 	usbnet_link_change(dev, 0, 0);
1320 
1321 	return 0;
1322 }
1323 
1324 static void ax88179_unbind(struct usbnet *dev, struct usb_interface *intf)
1325 {
1326 	u16 tmp16;
1327 
1328 	/* Configure RX control register => stop operation */
1329 	tmp16 = AX_RX_CTL_STOP;
1330 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
1331 
1332 	tmp16 = 0;
1333 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp16);
1334 
1335 	/* Power down ethernet PHY */
1336 	tmp16 = 0;
1337 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
1338 }
1339 
1340 static void
1341 ax88179_rx_checksum(struct sk_buff *skb, u32 *pkt_hdr)
1342 {
1343 	skb->ip_summed = CHECKSUM_NONE;
1344 
1345 	/* checksum error bit is set */
1346 	if ((*pkt_hdr & AX_RXHDR_L3CSUM_ERR) ||
1347 	    (*pkt_hdr & AX_RXHDR_L4CSUM_ERR))
1348 		return;
1349 
1350 	/* It must be a TCP or UDP packet with a valid checksum */
1351 	if (((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_TCP) ||
1352 	    ((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_UDP))
1353 		skb->ip_summed = CHECKSUM_UNNECESSARY;
1354 }
1355 
1356 static int ax88179_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1357 {
1358 	struct sk_buff *ax_skb;
1359 	int pkt_cnt;
1360 	u32 rx_hdr;
1361 	u16 hdr_off;
1362 	u32 *pkt_hdr;
1363 
1364 	/* This check is no longer done by usbnet */
1365 	if (skb->len < dev->net->hard_header_len)
1366 		return 0;
1367 
1368 	skb_trim(skb, skb->len - 4);
1369 	rx_hdr = get_unaligned_le32(skb_tail_pointer(skb));
1370 
1371 	pkt_cnt = (u16)rx_hdr;
1372 	hdr_off = (u16)(rx_hdr >> 16);
1373 	pkt_hdr = (u32 *)(skb->data + hdr_off);
1374 
1375 	while (pkt_cnt--) {
1376 		u16 pkt_len;
1377 
1378 		le32_to_cpus(pkt_hdr);
1379 		pkt_len = (*pkt_hdr >> 16) & 0x1fff;
1380 
1381 		/* Check CRC or runt packet */
1382 		if ((*pkt_hdr & AX_RXHDR_CRC_ERR) ||
1383 		    (*pkt_hdr & AX_RXHDR_DROP_ERR)) {
1384 			skb_pull(skb, (pkt_len + 7) & 0xFFF8);
1385 			pkt_hdr++;
1386 			continue;
1387 		}
1388 
1389 		if (pkt_cnt == 0) {
1390 			/* Skip IP alignment psudo header */
1391 			skb_pull(skb, 2);
1392 			skb->len = pkt_len;
1393 			skb_set_tail_pointer(skb, pkt_len);
1394 			skb->truesize = pkt_len + sizeof(struct sk_buff);
1395 			ax88179_rx_checksum(skb, pkt_hdr);
1396 			return 1;
1397 		}
1398 
1399 		ax_skb = skb_clone(skb, GFP_ATOMIC);
1400 		if (ax_skb) {
1401 			ax_skb->len = pkt_len;
1402 			ax_skb->data = skb->data + 2;
1403 			skb_set_tail_pointer(ax_skb, pkt_len);
1404 			ax_skb->truesize = pkt_len + sizeof(struct sk_buff);
1405 			ax88179_rx_checksum(ax_skb, pkt_hdr);
1406 			usbnet_skb_return(dev, ax_skb);
1407 		} else {
1408 			return 0;
1409 		}
1410 
1411 		skb_pull(skb, (pkt_len + 7) & 0xFFF8);
1412 		pkt_hdr++;
1413 	}
1414 	return 1;
1415 }
1416 
1417 static struct sk_buff *
1418 ax88179_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
1419 {
1420 	u32 tx_hdr1, tx_hdr2;
1421 	int frame_size = dev->maxpacket;
1422 	int mss = skb_shinfo(skb)->gso_size;
1423 	int headroom;
1424 	void *ptr;
1425 
1426 	tx_hdr1 = skb->len;
1427 	tx_hdr2 = mss;
1428 	if (((skb->len + 8) % frame_size) == 0)
1429 		tx_hdr2 |= 0x80008000;	/* Enable padding */
1430 
1431 	headroom = skb_headroom(skb) - 8;
1432 
1433 	if ((skb_header_cloned(skb) || headroom < 0) &&
1434 	    pskb_expand_head(skb, headroom < 0 ? 8 : 0, 0, GFP_ATOMIC)) {
1435 		dev_kfree_skb_any(skb);
1436 		return NULL;
1437 	}
1438 
1439 	ptr = skb_push(skb, 8);
1440 	put_unaligned_le32(tx_hdr1, ptr);
1441 	put_unaligned_le32(tx_hdr2, ptr + 4);
1442 
1443 	return skb;
1444 }
1445 
1446 static int ax88179_link_reset(struct usbnet *dev)
1447 {
1448 	struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data;
1449 	u8 tmp[5], link_sts;
1450 	u16 mode, tmp16, delay = HZ / 10;
1451 	u32 tmp32 = 0x40000000;
1452 	unsigned long jtimeout;
1453 
1454 	jtimeout = jiffies + delay;
1455 	while (tmp32 & 0x40000000) {
1456 		mode = 0;
1457 		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &mode);
1458 		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2,
1459 				  &ax179_data->rxctl);
1460 
1461 		/*link up, check the usb device control TX FIFO full or empty*/
1462 		ax88179_read_cmd(dev, 0x81, 0x8c, 0, 4, &tmp32);
1463 
1464 		if (time_after(jiffies, jtimeout))
1465 			return 0;
1466 	}
1467 
1468 	mode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1469 	       AX_MEDIUM_RXFLOW_CTRLEN;
1470 
1471 	ax88179_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS,
1472 			 1, 1, &link_sts);
1473 
1474 	ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1475 			 GMII_PHY_PHYSR, 2, &tmp16);
1476 
1477 	if (!(tmp16 & GMII_PHY_PHYSR_LINK)) {
1478 		return 0;
1479 	} else if (GMII_PHY_PHYSR_GIGA == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1480 		mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_EN_125MHZ;
1481 		if (dev->net->mtu > 1500)
1482 			mode |= AX_MEDIUM_JUMBO_EN;
1483 
1484 		if (link_sts & AX_USB_SS)
1485 			memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1486 		else if (link_sts & AX_USB_HS)
1487 			memcpy(tmp, &AX88179_BULKIN_SIZE[1], 5);
1488 		else
1489 			memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1490 	} else if (GMII_PHY_PHYSR_100 == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1491 		mode |= AX_MEDIUM_PS;
1492 
1493 		if (link_sts & (AX_USB_SS | AX_USB_HS))
1494 			memcpy(tmp, &AX88179_BULKIN_SIZE[2], 5);
1495 		else
1496 			memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1497 	} else {
1498 		memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1499 	}
1500 
1501 	/* RX bulk configuration */
1502 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1503 
1504 	dev->rx_urb_size = (1024 * (tmp[3] + 2));
1505 
1506 	if (tmp16 & GMII_PHY_PHYSR_FULL)
1507 		mode |= AX_MEDIUM_FULL_DUPLEX;
1508 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1509 			  2, 2, &mode);
1510 
1511 	ax179_data->eee_enabled = ax88179_chk_eee(dev);
1512 
1513 	netif_carrier_on(dev->net);
1514 
1515 	return 0;
1516 }
1517 
1518 static int ax88179_reset(struct usbnet *dev)
1519 {
1520 	u8 buf[5];
1521 	u16 *tmp16;
1522 	u8 *tmp;
1523 	struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data;
1524 	struct ethtool_eee eee_data;
1525 
1526 	tmp16 = (u16 *)buf;
1527 	tmp = (u8 *)buf;
1528 
1529 	/* Power up ethernet PHY */
1530 	*tmp16 = 0;
1531 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1532 
1533 	*tmp16 = AX_PHYPWR_RSTCTL_IPRL;
1534 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1535 	msleep(200);
1536 
1537 	*tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
1538 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
1539 	msleep(100);
1540 
1541 	/* Ethernet PHY Auto Detach*/
1542 	ax88179_auto_detach(dev, 0);
1543 
1544 	ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN, ETH_ALEN,
1545 			 dev->net->dev_addr);
1546 
1547 	/* RX bulk configuration */
1548 	memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1549 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1550 
1551 	dev->rx_urb_size = 1024 * 20;
1552 
1553 	*tmp = 0x34;
1554 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
1555 
1556 	*tmp = 0x52;
1557 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
1558 			  1, 1, tmp);
1559 
1560 	dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1561 			      NETIF_F_RXCSUM;
1562 
1563 	dev->net->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1564 				 NETIF_F_RXCSUM;
1565 
1566 	/* Enable checksum offload */
1567 	*tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
1568 	       AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
1569 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
1570 
1571 	*tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
1572 	       AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
1573 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
1574 
1575 	/* Configure RX control register => start operation */
1576 	*tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
1577 		 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
1578 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
1579 
1580 	*tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
1581 	       AX_MONITOR_MODE_RWMP;
1582 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
1583 
1584 	/* Configure default medium type => giga */
1585 	*tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1586 		 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
1587 		 AX_MEDIUM_GIGAMODE;
1588 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1589 			  2, 2, tmp16);
1590 
1591 	ax88179_led_setting(dev);
1592 
1593 	ax179_data->eee_enabled = 0;
1594 	ax179_data->eee_active = 0;
1595 
1596 	ax88179_disable_eee(dev);
1597 
1598 	ax88179_ethtool_get_eee(dev, &eee_data);
1599 	eee_data.advertised = 0;
1600 	ax88179_ethtool_set_eee(dev, &eee_data);
1601 
1602 	/* Restart autoneg */
1603 	mii_nway_restart(&dev->mii);
1604 
1605 	usbnet_link_change(dev, 0, 0);
1606 
1607 	return 0;
1608 }
1609 
1610 static int ax88179_stop(struct usbnet *dev)
1611 {
1612 	u16 tmp16;
1613 
1614 	ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1615 			 2, 2, &tmp16);
1616 	tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
1617 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1618 			  2, 2, &tmp16);
1619 
1620 	return 0;
1621 }
1622 
1623 static const struct driver_info ax88179_info = {
1624 	.description = "ASIX AX88179 USB 3.0 Gigabit Ethernet",
1625 	.bind = ax88179_bind,
1626 	.unbind = ax88179_unbind,
1627 	.status = ax88179_status,
1628 	.link_reset = ax88179_link_reset,
1629 	.reset = ax88179_reset,
1630 	.stop = ax88179_stop,
1631 	.flags = FLAG_ETHER | FLAG_FRAMING_AX,
1632 	.rx_fixup = ax88179_rx_fixup,
1633 	.tx_fixup = ax88179_tx_fixup,
1634 };
1635 
1636 static const struct driver_info ax88178a_info = {
1637 	.description = "ASIX AX88178A USB 2.0 Gigabit Ethernet",
1638 	.bind = ax88179_bind,
1639 	.unbind = ax88179_unbind,
1640 	.status = ax88179_status,
1641 	.link_reset = ax88179_link_reset,
1642 	.reset = ax88179_reset,
1643 	.stop = ax88179_stop,
1644 	.flags = FLAG_ETHER | FLAG_FRAMING_AX,
1645 	.rx_fixup = ax88179_rx_fixup,
1646 	.tx_fixup = ax88179_tx_fixup,
1647 };
1648 
1649 static const struct driver_info cypress_GX3_info = {
1650 	.description = "Cypress GX3 SuperSpeed to Gigabit Ethernet Controller",
1651 	.bind = ax88179_bind,
1652 	.unbind = ax88179_unbind,
1653 	.status = ax88179_status,
1654 	.link_reset = ax88179_link_reset,
1655 	.reset = ax88179_reset,
1656 	.stop = ax88179_stop,
1657 	.flags = FLAG_ETHER | FLAG_FRAMING_AX,
1658 	.rx_fixup = ax88179_rx_fixup,
1659 	.tx_fixup = ax88179_tx_fixup,
1660 };
1661 
1662 static const struct driver_info dlink_dub1312_info = {
1663 	.description = "D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter",
1664 	.bind = ax88179_bind,
1665 	.unbind = ax88179_unbind,
1666 	.status = ax88179_status,
1667 	.link_reset = ax88179_link_reset,
1668 	.reset = ax88179_reset,
1669 	.stop = ax88179_stop,
1670 	.flags = FLAG_ETHER | FLAG_FRAMING_AX,
1671 	.rx_fixup = ax88179_rx_fixup,
1672 	.tx_fixup = ax88179_tx_fixup,
1673 };
1674 
1675 static const struct driver_info sitecom_info = {
1676 	.description = "Sitecom USB 3.0 to Gigabit Adapter",
1677 	.bind = ax88179_bind,
1678 	.unbind = ax88179_unbind,
1679 	.status = ax88179_status,
1680 	.link_reset = ax88179_link_reset,
1681 	.reset = ax88179_reset,
1682 	.stop = ax88179_stop,
1683 	.flags = FLAG_ETHER | FLAG_FRAMING_AX,
1684 	.rx_fixup = ax88179_rx_fixup,
1685 	.tx_fixup = ax88179_tx_fixup,
1686 };
1687 
1688 static const struct driver_info samsung_info = {
1689 	.description = "Samsung USB Ethernet Adapter",
1690 	.bind = ax88179_bind,
1691 	.unbind = ax88179_unbind,
1692 	.status = ax88179_status,
1693 	.link_reset = ax88179_link_reset,
1694 	.reset = ax88179_reset,
1695 	.stop = ax88179_stop,
1696 	.flags = FLAG_ETHER | FLAG_FRAMING_AX,
1697 	.rx_fixup = ax88179_rx_fixup,
1698 	.tx_fixup = ax88179_tx_fixup,
1699 };
1700 
1701 static const struct driver_info lenovo_info = {
1702 	.description = "Lenovo OneLinkDock Gigabit LAN",
1703 	.bind = ax88179_bind,
1704 	.unbind = ax88179_unbind,
1705 	.status = ax88179_status,
1706 	.link_reset = ax88179_link_reset,
1707 	.reset = ax88179_reset,
1708 	.stop = ax88179_stop,
1709 	.flags = FLAG_ETHER | FLAG_FRAMING_AX,
1710 	.rx_fixup = ax88179_rx_fixup,
1711 	.tx_fixup = ax88179_tx_fixup,
1712 };
1713 
1714 static const struct driver_info belkin_info = {
1715 	.description = "Belkin USB Ethernet Adapter",
1716 	.bind	= ax88179_bind,
1717 	.unbind = ax88179_unbind,
1718 	.status = ax88179_status,
1719 	.link_reset = ax88179_link_reset,
1720 	.reset	= ax88179_reset,
1721 	.flags	= FLAG_ETHER | FLAG_FRAMING_AX,
1722 	.rx_fixup = ax88179_rx_fixup,
1723 	.tx_fixup = ax88179_tx_fixup,
1724 };
1725 
1726 static const struct usb_device_id products[] = {
1727 {
1728 	/* ASIX AX88179 10/100/1000 */
1729 	USB_DEVICE(0x0b95, 0x1790),
1730 	.driver_info = (unsigned long)&ax88179_info,
1731 }, {
1732 	/* ASIX AX88178A 10/100/1000 */
1733 	USB_DEVICE(0x0b95, 0x178a),
1734 	.driver_info = (unsigned long)&ax88178a_info,
1735 }, {
1736 	/* Cypress GX3 SuperSpeed to Gigabit Ethernet Bridge Controller */
1737 	USB_DEVICE(0x04b4, 0x3610),
1738 	.driver_info = (unsigned long)&cypress_GX3_info,
1739 }, {
1740 	/* D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter */
1741 	USB_DEVICE(0x2001, 0x4a00),
1742 	.driver_info = (unsigned long)&dlink_dub1312_info,
1743 }, {
1744 	/* Sitecom USB 3.0 to Gigabit Adapter */
1745 	USB_DEVICE(0x0df6, 0x0072),
1746 	.driver_info = (unsigned long)&sitecom_info,
1747 }, {
1748 	/* Samsung USB Ethernet Adapter */
1749 	USB_DEVICE(0x04e8, 0xa100),
1750 	.driver_info = (unsigned long)&samsung_info,
1751 }, {
1752 	/* Lenovo OneLinkDock Gigabit LAN */
1753 	USB_DEVICE(0x17ef, 0x304b),
1754 	.driver_info = (unsigned long)&lenovo_info,
1755 }, {
1756 	/* Belkin B2B128 USB 3.0 Hub + Gigabit Ethernet Adapter */
1757 	USB_DEVICE(0x050d, 0x0128),
1758 	.driver_info = (unsigned long)&belkin_info,
1759 },
1760 	{ },
1761 };
1762 MODULE_DEVICE_TABLE(usb, products);
1763 
1764 static struct usb_driver ax88179_178a_driver = {
1765 	.name =		"ax88179_178a",
1766 	.id_table =	products,
1767 	.probe =	usbnet_probe,
1768 	.suspend =	ax88179_suspend,
1769 	.resume =	ax88179_resume,
1770 	.reset_resume =	ax88179_resume,
1771 	.disconnect =	usbnet_disconnect,
1772 	.supports_autosuspend = 1,
1773 	.disable_hub_initiated_lpm = 1,
1774 };
1775 
1776 module_usb_driver(ax88179_178a_driver);
1777 
1778 MODULE_DESCRIPTION("ASIX AX88179/178A based USB 3.0/2.0 Gigabit Ethernet Devices");
1779 MODULE_LICENSE("GPL");
1780