1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * ASIX AX88179/178A USB 3.0/2.0 to Gigabit Ethernet Devices 4 * 5 * Copyright (C) 2011-2013 ASIX 6 */ 7 8 #include <linux/module.h> 9 #include <linux/etherdevice.h> 10 #include <linux/mii.h> 11 #include <linux/usb.h> 12 #include <linux/crc32.h> 13 #include <linux/usb/usbnet.h> 14 #include <uapi/linux/mdio.h> 15 #include <linux/mdio.h> 16 17 #define AX88179_PHY_ID 0x03 18 #define AX_EEPROM_LEN 0x100 19 #define AX88179_EEPROM_MAGIC 0x17900b95 20 #define AX_MCAST_FLTSIZE 8 21 #define AX_MAX_MCAST 64 22 #define AX_INT_PPLS_LINK ((u32)BIT(16)) 23 #define AX_RXHDR_L4_TYPE_MASK 0x1c 24 #define AX_RXHDR_L4_TYPE_UDP 4 25 #define AX_RXHDR_L4_TYPE_TCP 16 26 #define AX_RXHDR_L3CSUM_ERR 2 27 #define AX_RXHDR_L4CSUM_ERR 1 28 #define AX_RXHDR_CRC_ERR ((u32)BIT(29)) 29 #define AX_RXHDR_DROP_ERR ((u32)BIT(31)) 30 #define AX_ACCESS_MAC 0x01 31 #define AX_ACCESS_PHY 0x02 32 #define AX_ACCESS_EEPROM 0x04 33 #define AX_ACCESS_EFUS 0x05 34 #define AX_RELOAD_EEPROM_EFUSE 0x06 35 #define AX_PAUSE_WATERLVL_HIGH 0x54 36 #define AX_PAUSE_WATERLVL_LOW 0x55 37 38 #define PHYSICAL_LINK_STATUS 0x02 39 #define AX_USB_SS 0x04 40 #define AX_USB_HS 0x02 41 42 #define GENERAL_STATUS 0x03 43 /* Check AX88179 version. UA1:Bit2 = 0, UA2:Bit2 = 1 */ 44 #define AX_SECLD 0x04 45 46 #define AX_SROM_ADDR 0x07 47 #define AX_SROM_CMD 0x0a 48 #define EEP_RD 0x04 49 #define EEP_BUSY 0x10 50 51 #define AX_SROM_DATA_LOW 0x08 52 #define AX_SROM_DATA_HIGH 0x09 53 54 #define AX_RX_CTL 0x0b 55 #define AX_RX_CTL_DROPCRCERR 0x0100 56 #define AX_RX_CTL_IPE 0x0200 57 #define AX_RX_CTL_START 0x0080 58 #define AX_RX_CTL_AP 0x0020 59 #define AX_RX_CTL_AM 0x0010 60 #define AX_RX_CTL_AB 0x0008 61 #define AX_RX_CTL_AMALL 0x0002 62 #define AX_RX_CTL_PRO 0x0001 63 #define AX_RX_CTL_STOP 0x0000 64 65 #define AX_NODE_ID 0x10 66 #define AX_MULFLTARY 0x16 67 68 #define AX_MEDIUM_STATUS_MODE 0x22 69 #define AX_MEDIUM_GIGAMODE 0x01 70 #define AX_MEDIUM_FULL_DUPLEX 0x02 71 #define AX_MEDIUM_EN_125MHZ 0x08 72 #define AX_MEDIUM_RXFLOW_CTRLEN 0x10 73 #define AX_MEDIUM_TXFLOW_CTRLEN 0x20 74 #define AX_MEDIUM_RECEIVE_EN 0x100 75 #define AX_MEDIUM_PS 0x200 76 #define AX_MEDIUM_JUMBO_EN 0x8040 77 78 #define AX_MONITOR_MOD 0x24 79 #define AX_MONITOR_MODE_RWLC 0x02 80 #define AX_MONITOR_MODE_RWMP 0x04 81 #define AX_MONITOR_MODE_PMEPOL 0x20 82 #define AX_MONITOR_MODE_PMETYPE 0x40 83 84 #define AX_GPIO_CTRL 0x25 85 #define AX_GPIO_CTRL_GPIO3EN 0x80 86 #define AX_GPIO_CTRL_GPIO2EN 0x40 87 #define AX_GPIO_CTRL_GPIO1EN 0x20 88 89 #define AX_PHYPWR_RSTCTL 0x26 90 #define AX_PHYPWR_RSTCTL_BZ 0x0010 91 #define AX_PHYPWR_RSTCTL_IPRL 0x0020 92 #define AX_PHYPWR_RSTCTL_AT 0x1000 93 94 #define AX_RX_BULKIN_QCTRL 0x2e 95 #define AX_CLK_SELECT 0x33 96 #define AX_CLK_SELECT_BCS 0x01 97 #define AX_CLK_SELECT_ACS 0x02 98 #define AX_CLK_SELECT_ULR 0x08 99 100 #define AX_RXCOE_CTL 0x34 101 #define AX_RXCOE_IP 0x01 102 #define AX_RXCOE_TCP 0x02 103 #define AX_RXCOE_UDP 0x04 104 #define AX_RXCOE_TCPV6 0x20 105 #define AX_RXCOE_UDPV6 0x40 106 107 #define AX_TXCOE_CTL 0x35 108 #define AX_TXCOE_IP 0x01 109 #define AX_TXCOE_TCP 0x02 110 #define AX_TXCOE_UDP 0x04 111 #define AX_TXCOE_TCPV6 0x20 112 #define AX_TXCOE_UDPV6 0x40 113 114 #define AX_LEDCTRL 0x73 115 116 #define GMII_PHY_PHYSR 0x11 117 #define GMII_PHY_PHYSR_SMASK 0xc000 118 #define GMII_PHY_PHYSR_GIGA 0x8000 119 #define GMII_PHY_PHYSR_100 0x4000 120 #define GMII_PHY_PHYSR_FULL 0x2000 121 #define GMII_PHY_PHYSR_LINK 0x400 122 123 #define GMII_LED_ACT 0x1a 124 #define GMII_LED_ACTIVE_MASK 0xff8f 125 #define GMII_LED0_ACTIVE BIT(4) 126 #define GMII_LED1_ACTIVE BIT(5) 127 #define GMII_LED2_ACTIVE BIT(6) 128 129 #define GMII_LED_LINK 0x1c 130 #define GMII_LED_LINK_MASK 0xf888 131 #define GMII_LED0_LINK_10 BIT(0) 132 #define GMII_LED0_LINK_100 BIT(1) 133 #define GMII_LED0_LINK_1000 BIT(2) 134 #define GMII_LED1_LINK_10 BIT(4) 135 #define GMII_LED1_LINK_100 BIT(5) 136 #define GMII_LED1_LINK_1000 BIT(6) 137 #define GMII_LED2_LINK_10 BIT(8) 138 #define GMII_LED2_LINK_100 BIT(9) 139 #define GMII_LED2_LINK_1000 BIT(10) 140 #define LED0_ACTIVE BIT(0) 141 #define LED0_LINK_10 BIT(1) 142 #define LED0_LINK_100 BIT(2) 143 #define LED0_LINK_1000 BIT(3) 144 #define LED0_FD BIT(4) 145 #define LED0_USB3_MASK 0x001f 146 #define LED1_ACTIVE BIT(5) 147 #define LED1_LINK_10 BIT(6) 148 #define LED1_LINK_100 BIT(7) 149 #define LED1_LINK_1000 BIT(8) 150 #define LED1_FD BIT(9) 151 #define LED1_USB3_MASK 0x03e0 152 #define LED2_ACTIVE BIT(10) 153 #define LED2_LINK_1000 BIT(13) 154 #define LED2_LINK_100 BIT(12) 155 #define LED2_LINK_10 BIT(11) 156 #define LED2_FD BIT(14) 157 #define LED_VALID BIT(15) 158 #define LED2_USB3_MASK 0x7c00 159 160 #define GMII_PHYPAGE 0x1e 161 #define GMII_PHY_PAGE_SELECT 0x1f 162 #define GMII_PHY_PGSEL_EXT 0x0007 163 #define GMII_PHY_PGSEL_PAGE0 0x0000 164 #define GMII_PHY_PGSEL_PAGE3 0x0003 165 #define GMII_PHY_PGSEL_PAGE5 0x0005 166 167 struct ax88179_data { 168 u8 eee_enabled; 169 u8 eee_active; 170 u16 rxctl; 171 u16 reserved; 172 }; 173 174 struct ax88179_int_data { 175 __le32 intdata1; 176 __le32 intdata2; 177 }; 178 179 static const struct { 180 unsigned char ctrl, timer_l, timer_h, size, ifg; 181 } AX88179_BULKIN_SIZE[] = { 182 {7, 0x4f, 0, 0x12, 0xff}, 183 {7, 0x20, 3, 0x16, 0xff}, 184 {7, 0xae, 7, 0x18, 0xff}, 185 {7, 0xcc, 0x4c, 0x18, 8}, 186 }; 187 188 static int __ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, 189 u16 size, void *data, int in_pm) 190 { 191 int ret; 192 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16); 193 194 BUG_ON(!dev); 195 196 if (!in_pm) 197 fn = usbnet_read_cmd; 198 else 199 fn = usbnet_read_cmd_nopm; 200 201 ret = fn(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 202 value, index, data, size); 203 204 if (unlikely(ret < 0)) 205 netdev_warn(dev->net, "Failed to read reg index 0x%04x: %d\n", 206 index, ret); 207 208 return ret; 209 } 210 211 static int __ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, 212 u16 size, void *data, int in_pm) 213 { 214 int ret; 215 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16); 216 217 BUG_ON(!dev); 218 219 if (!in_pm) 220 fn = usbnet_write_cmd; 221 else 222 fn = usbnet_write_cmd_nopm; 223 224 ret = fn(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 225 value, index, data, size); 226 227 if (unlikely(ret < 0)) 228 netdev_warn(dev->net, "Failed to write reg index 0x%04x: %d\n", 229 index, ret); 230 231 return ret; 232 } 233 234 static void ax88179_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, 235 u16 index, u16 size, void *data) 236 { 237 u16 buf; 238 239 if (2 == size) { 240 buf = *((u16 *)data); 241 cpu_to_le16s(&buf); 242 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR | 243 USB_RECIP_DEVICE, value, index, &buf, 244 size); 245 } else { 246 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR | 247 USB_RECIP_DEVICE, value, index, data, 248 size); 249 } 250 } 251 252 static int ax88179_read_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value, 253 u16 index, u16 size, void *data) 254 { 255 int ret; 256 257 if (2 == size) { 258 u16 buf; 259 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 1); 260 le16_to_cpus(&buf); 261 *((u16 *)data) = buf; 262 } else if (4 == size) { 263 u32 buf; 264 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 1); 265 le32_to_cpus(&buf); 266 *((u32 *)data) = buf; 267 } else { 268 ret = __ax88179_read_cmd(dev, cmd, value, index, size, data, 1); 269 } 270 271 return ret; 272 } 273 274 static int ax88179_write_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value, 275 u16 index, u16 size, void *data) 276 { 277 int ret; 278 279 if (2 == size) { 280 u16 buf; 281 buf = *((u16 *)data); 282 cpu_to_le16s(&buf); 283 ret = __ax88179_write_cmd(dev, cmd, value, index, 284 size, &buf, 1); 285 } else { 286 ret = __ax88179_write_cmd(dev, cmd, value, index, 287 size, data, 1); 288 } 289 290 return ret; 291 } 292 293 static int ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, 294 u16 size, void *data) 295 { 296 int ret; 297 298 if (2 == size) { 299 u16 buf; 300 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 0); 301 le16_to_cpus(&buf); 302 *((u16 *)data) = buf; 303 } else if (4 == size) { 304 u32 buf; 305 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 0); 306 le32_to_cpus(&buf); 307 *((u32 *)data) = buf; 308 } else { 309 ret = __ax88179_read_cmd(dev, cmd, value, index, size, data, 0); 310 } 311 312 return ret; 313 } 314 315 static int ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, 316 u16 size, void *data) 317 { 318 int ret; 319 320 if (2 == size) { 321 u16 buf; 322 buf = *((u16 *)data); 323 cpu_to_le16s(&buf); 324 ret = __ax88179_write_cmd(dev, cmd, value, index, 325 size, &buf, 0); 326 } else { 327 ret = __ax88179_write_cmd(dev, cmd, value, index, 328 size, data, 0); 329 } 330 331 return ret; 332 } 333 334 static void ax88179_status(struct usbnet *dev, struct urb *urb) 335 { 336 struct ax88179_int_data *event; 337 u32 link; 338 339 if (urb->actual_length < 8) 340 return; 341 342 event = urb->transfer_buffer; 343 le32_to_cpus((void *)&event->intdata1); 344 345 link = (((__force u32)event->intdata1) & AX_INT_PPLS_LINK) >> 16; 346 347 if (netif_carrier_ok(dev->net) != link) { 348 usbnet_link_change(dev, link, 1); 349 netdev_info(dev->net, "ax88179 - Link status is: %d\n", link); 350 } 351 } 352 353 static int ax88179_mdio_read(struct net_device *netdev, int phy_id, int loc) 354 { 355 struct usbnet *dev = netdev_priv(netdev); 356 u16 res; 357 358 ax88179_read_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res); 359 return res; 360 } 361 362 static void ax88179_mdio_write(struct net_device *netdev, int phy_id, int loc, 363 int val) 364 { 365 struct usbnet *dev = netdev_priv(netdev); 366 u16 res = (u16) val; 367 368 ax88179_write_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res); 369 } 370 371 static inline int ax88179_phy_mmd_indirect(struct usbnet *dev, u16 prtad, 372 u16 devad) 373 { 374 u16 tmp16; 375 int ret; 376 377 tmp16 = devad; 378 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, 379 MII_MMD_CTRL, 2, &tmp16); 380 381 tmp16 = prtad; 382 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, 383 MII_MMD_DATA, 2, &tmp16); 384 385 tmp16 = devad | MII_MMD_CTRL_NOINCR; 386 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, 387 MII_MMD_CTRL, 2, &tmp16); 388 389 return ret; 390 } 391 392 static int 393 ax88179_phy_read_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad) 394 { 395 int ret; 396 u16 tmp16; 397 398 ax88179_phy_mmd_indirect(dev, prtad, devad); 399 400 ret = ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, 401 MII_MMD_DATA, 2, &tmp16); 402 if (ret < 0) 403 return ret; 404 405 return tmp16; 406 } 407 408 static int 409 ax88179_phy_write_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad, 410 u16 data) 411 { 412 int ret; 413 414 ax88179_phy_mmd_indirect(dev, prtad, devad); 415 416 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, 417 MII_MMD_DATA, 2, &data); 418 419 if (ret < 0) 420 return ret; 421 422 return 0; 423 } 424 425 static int ax88179_suspend(struct usb_interface *intf, pm_message_t message) 426 { 427 struct usbnet *dev = usb_get_intfdata(intf); 428 u16 tmp16; 429 u8 tmp8; 430 431 usbnet_suspend(intf, message); 432 433 /* Disable RX path */ 434 ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 435 2, 2, &tmp16); 436 tmp16 &= ~AX_MEDIUM_RECEIVE_EN; 437 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 438 2, 2, &tmp16); 439 440 /* Force bulk-in zero length */ 441 ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 442 2, 2, &tmp16); 443 444 tmp16 |= AX_PHYPWR_RSTCTL_BZ | AX_PHYPWR_RSTCTL_IPRL; 445 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 446 2, 2, &tmp16); 447 448 /* change clock */ 449 tmp8 = 0; 450 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8); 451 452 /* Configure RX control register => stop operation */ 453 tmp16 = AX_RX_CTL_STOP; 454 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16); 455 456 return 0; 457 } 458 459 /* This function is used to enable the autodetach function. */ 460 /* This function is determined by offset 0x43 of EEPROM */ 461 static int ax88179_auto_detach(struct usbnet *dev, int in_pm) 462 { 463 u16 tmp16; 464 u8 tmp8; 465 int (*fnr)(struct usbnet *, u8, u16, u16, u16, void *); 466 int (*fnw)(struct usbnet *, u8, u16, u16, u16, void *); 467 468 if (!in_pm) { 469 fnr = ax88179_read_cmd; 470 fnw = ax88179_write_cmd; 471 } else { 472 fnr = ax88179_read_cmd_nopm; 473 fnw = ax88179_write_cmd_nopm; 474 } 475 476 if (fnr(dev, AX_ACCESS_EEPROM, 0x43, 1, 2, &tmp16) < 0) 477 return 0; 478 479 if ((tmp16 == 0xFFFF) || (!(tmp16 & 0x0100))) 480 return 0; 481 482 /* Enable Auto Detach bit */ 483 tmp8 = 0; 484 fnr(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8); 485 tmp8 |= AX_CLK_SELECT_ULR; 486 fnw(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8); 487 488 fnr(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16); 489 tmp16 |= AX_PHYPWR_RSTCTL_AT; 490 fnw(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16); 491 492 return 0; 493 } 494 495 static int ax88179_resume(struct usb_interface *intf) 496 { 497 struct usbnet *dev = usb_get_intfdata(intf); 498 u16 tmp16; 499 u8 tmp8; 500 501 usbnet_link_change(dev, 0, 0); 502 503 /* Power up ethernet PHY */ 504 tmp16 = 0; 505 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 506 2, 2, &tmp16); 507 udelay(1000); 508 509 tmp16 = AX_PHYPWR_RSTCTL_IPRL; 510 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 511 2, 2, &tmp16); 512 msleep(200); 513 514 /* Ethernet PHY Auto Detach*/ 515 ax88179_auto_detach(dev, 1); 516 517 /* Enable clock */ 518 ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8); 519 tmp8 |= AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS; 520 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8); 521 msleep(100); 522 523 /* Configure RX control register => start operation */ 524 tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START | 525 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB; 526 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16); 527 528 return usbnet_resume(intf); 529 } 530 531 static void 532 ax88179_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo) 533 { 534 struct usbnet *dev = netdev_priv(net); 535 u8 opt; 536 537 if (ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 538 1, 1, &opt) < 0) { 539 wolinfo->supported = 0; 540 wolinfo->wolopts = 0; 541 return; 542 } 543 544 wolinfo->supported = WAKE_PHY | WAKE_MAGIC; 545 wolinfo->wolopts = 0; 546 if (opt & AX_MONITOR_MODE_RWLC) 547 wolinfo->wolopts |= WAKE_PHY; 548 if (opt & AX_MONITOR_MODE_RWMP) 549 wolinfo->wolopts |= WAKE_MAGIC; 550 } 551 552 static int 553 ax88179_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo) 554 { 555 struct usbnet *dev = netdev_priv(net); 556 u8 opt = 0; 557 558 if (wolinfo->wolopts & ~(WAKE_PHY | WAKE_MAGIC)) 559 return -EINVAL; 560 561 if (wolinfo->wolopts & WAKE_PHY) 562 opt |= AX_MONITOR_MODE_RWLC; 563 if (wolinfo->wolopts & WAKE_MAGIC) 564 opt |= AX_MONITOR_MODE_RWMP; 565 566 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 567 1, 1, &opt) < 0) 568 return -EINVAL; 569 570 return 0; 571 } 572 573 static int ax88179_get_eeprom_len(struct net_device *net) 574 { 575 return AX_EEPROM_LEN; 576 } 577 578 static int 579 ax88179_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom, 580 u8 *data) 581 { 582 struct usbnet *dev = netdev_priv(net); 583 u16 *eeprom_buff; 584 int first_word, last_word; 585 int i, ret; 586 587 if (eeprom->len == 0) 588 return -EINVAL; 589 590 eeprom->magic = AX88179_EEPROM_MAGIC; 591 592 first_word = eeprom->offset >> 1; 593 last_word = (eeprom->offset + eeprom->len - 1) >> 1; 594 eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16), 595 GFP_KERNEL); 596 if (!eeprom_buff) 597 return -ENOMEM; 598 599 /* ax88179/178A returns 2 bytes from eeprom on read */ 600 for (i = first_word; i <= last_word; i++) { 601 ret = __ax88179_read_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2, 602 &eeprom_buff[i - first_word], 603 0); 604 if (ret < 0) { 605 kfree(eeprom_buff); 606 return -EIO; 607 } 608 } 609 610 memcpy(data, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len); 611 kfree(eeprom_buff); 612 return 0; 613 } 614 615 static int 616 ax88179_set_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom, 617 u8 *data) 618 { 619 struct usbnet *dev = netdev_priv(net); 620 u16 *eeprom_buff; 621 int first_word; 622 int last_word; 623 int ret; 624 int i; 625 626 netdev_dbg(net, "write EEPROM len %d, offset %d, magic 0x%x\n", 627 eeprom->len, eeprom->offset, eeprom->magic); 628 629 if (eeprom->len == 0) 630 return -EINVAL; 631 632 if (eeprom->magic != AX88179_EEPROM_MAGIC) 633 return -EINVAL; 634 635 first_word = eeprom->offset >> 1; 636 last_word = (eeprom->offset + eeprom->len - 1) >> 1; 637 638 eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16), 639 GFP_KERNEL); 640 if (!eeprom_buff) 641 return -ENOMEM; 642 643 /* align data to 16 bit boundaries, read the missing data from 644 the EEPROM */ 645 if (eeprom->offset & 1) { 646 ret = ax88179_read_cmd(dev, AX_ACCESS_EEPROM, first_word, 1, 2, 647 &eeprom_buff[0]); 648 if (ret < 0) { 649 netdev_err(net, "Failed to read EEPROM at offset 0x%02x.\n", first_word); 650 goto free; 651 } 652 } 653 654 if ((eeprom->offset + eeprom->len) & 1) { 655 ret = ax88179_read_cmd(dev, AX_ACCESS_EEPROM, last_word, 1, 2, 656 &eeprom_buff[last_word - first_word]); 657 if (ret < 0) { 658 netdev_err(net, "Failed to read EEPROM at offset 0x%02x.\n", last_word); 659 goto free; 660 } 661 } 662 663 memcpy((u8 *)eeprom_buff + (eeprom->offset & 1), data, eeprom->len); 664 665 for (i = first_word; i <= last_word; i++) { 666 netdev_dbg(net, "write to EEPROM at offset 0x%02x, data 0x%04x\n", 667 i, eeprom_buff[i - first_word]); 668 ret = ax88179_write_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2, 669 &eeprom_buff[i - first_word]); 670 if (ret < 0) { 671 netdev_err(net, "Failed to write EEPROM at offset 0x%02x.\n", i); 672 goto free; 673 } 674 msleep(20); 675 } 676 677 /* reload EEPROM data */ 678 ret = ax88179_write_cmd(dev, AX_RELOAD_EEPROM_EFUSE, 0x0000, 0, 0, NULL); 679 if (ret < 0) { 680 netdev_err(net, "Failed to reload EEPROM data\n"); 681 goto free; 682 } 683 684 ret = 0; 685 free: 686 kfree(eeprom_buff); 687 return ret; 688 } 689 690 static int ax88179_get_link_ksettings(struct net_device *net, 691 struct ethtool_link_ksettings *cmd) 692 { 693 struct usbnet *dev = netdev_priv(net); 694 695 mii_ethtool_get_link_ksettings(&dev->mii, cmd); 696 697 return 0; 698 } 699 700 static int ax88179_set_link_ksettings(struct net_device *net, 701 const struct ethtool_link_ksettings *cmd) 702 { 703 struct usbnet *dev = netdev_priv(net); 704 return mii_ethtool_set_link_ksettings(&dev->mii, cmd); 705 } 706 707 static int 708 ax88179_ethtool_get_eee(struct usbnet *dev, struct ethtool_eee *data) 709 { 710 int val; 711 712 /* Get Supported EEE */ 713 val = ax88179_phy_read_mmd_indirect(dev, MDIO_PCS_EEE_ABLE, 714 MDIO_MMD_PCS); 715 if (val < 0) 716 return val; 717 data->supported = mmd_eee_cap_to_ethtool_sup_t(val); 718 719 /* Get advertisement EEE */ 720 val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_ADV, 721 MDIO_MMD_AN); 722 if (val < 0) 723 return val; 724 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val); 725 726 /* Get LP advertisement EEE */ 727 val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_LPABLE, 728 MDIO_MMD_AN); 729 if (val < 0) 730 return val; 731 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val); 732 733 return 0; 734 } 735 736 static int 737 ax88179_ethtool_set_eee(struct usbnet *dev, struct ethtool_eee *data) 738 { 739 u16 tmp16 = ethtool_adv_to_mmd_eee_adv_t(data->advertised); 740 741 return ax88179_phy_write_mmd_indirect(dev, MDIO_AN_EEE_ADV, 742 MDIO_MMD_AN, tmp16); 743 } 744 745 static int ax88179_chk_eee(struct usbnet *dev) 746 { 747 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; 748 struct ax88179_data *priv = (struct ax88179_data *)dev->data; 749 750 mii_ethtool_gset(&dev->mii, &ecmd); 751 752 if (ecmd.duplex & DUPLEX_FULL) { 753 int eee_lp, eee_cap, eee_adv; 754 u32 lp, cap, adv, supported = 0; 755 756 eee_cap = ax88179_phy_read_mmd_indirect(dev, 757 MDIO_PCS_EEE_ABLE, 758 MDIO_MMD_PCS); 759 if (eee_cap < 0) { 760 priv->eee_active = 0; 761 return false; 762 } 763 764 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap); 765 if (!cap) { 766 priv->eee_active = 0; 767 return false; 768 } 769 770 eee_lp = ax88179_phy_read_mmd_indirect(dev, 771 MDIO_AN_EEE_LPABLE, 772 MDIO_MMD_AN); 773 if (eee_lp < 0) { 774 priv->eee_active = 0; 775 return false; 776 } 777 778 eee_adv = ax88179_phy_read_mmd_indirect(dev, 779 MDIO_AN_EEE_ADV, 780 MDIO_MMD_AN); 781 782 if (eee_adv < 0) { 783 priv->eee_active = 0; 784 return false; 785 } 786 787 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv); 788 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp); 789 supported = (ecmd.speed == SPEED_1000) ? 790 SUPPORTED_1000baseT_Full : 791 SUPPORTED_100baseT_Full; 792 793 if (!(lp & adv & supported)) { 794 priv->eee_active = 0; 795 return false; 796 } 797 798 priv->eee_active = 1; 799 return true; 800 } 801 802 priv->eee_active = 0; 803 return false; 804 } 805 806 static void ax88179_disable_eee(struct usbnet *dev) 807 { 808 u16 tmp16; 809 810 tmp16 = GMII_PHY_PGSEL_PAGE3; 811 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, 812 GMII_PHY_PAGE_SELECT, 2, &tmp16); 813 814 tmp16 = 0x3246; 815 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, 816 MII_PHYADDR, 2, &tmp16); 817 818 tmp16 = GMII_PHY_PGSEL_PAGE0; 819 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, 820 GMII_PHY_PAGE_SELECT, 2, &tmp16); 821 } 822 823 static void ax88179_enable_eee(struct usbnet *dev) 824 { 825 u16 tmp16; 826 827 tmp16 = GMII_PHY_PGSEL_PAGE3; 828 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, 829 GMII_PHY_PAGE_SELECT, 2, &tmp16); 830 831 tmp16 = 0x3247; 832 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, 833 MII_PHYADDR, 2, &tmp16); 834 835 tmp16 = GMII_PHY_PGSEL_PAGE5; 836 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, 837 GMII_PHY_PAGE_SELECT, 2, &tmp16); 838 839 tmp16 = 0x0680; 840 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, 841 MII_BMSR, 2, &tmp16); 842 843 tmp16 = GMII_PHY_PGSEL_PAGE0; 844 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, 845 GMII_PHY_PAGE_SELECT, 2, &tmp16); 846 } 847 848 static int ax88179_get_eee(struct net_device *net, struct ethtool_eee *edata) 849 { 850 struct usbnet *dev = netdev_priv(net); 851 struct ax88179_data *priv = (struct ax88179_data *)dev->data; 852 853 edata->eee_enabled = priv->eee_enabled; 854 edata->eee_active = priv->eee_active; 855 856 return ax88179_ethtool_get_eee(dev, edata); 857 } 858 859 static int ax88179_set_eee(struct net_device *net, struct ethtool_eee *edata) 860 { 861 struct usbnet *dev = netdev_priv(net); 862 struct ax88179_data *priv = (struct ax88179_data *)dev->data; 863 int ret; 864 865 priv->eee_enabled = edata->eee_enabled; 866 if (!priv->eee_enabled) { 867 ax88179_disable_eee(dev); 868 } else { 869 priv->eee_enabled = ax88179_chk_eee(dev); 870 if (!priv->eee_enabled) 871 return -EOPNOTSUPP; 872 873 ax88179_enable_eee(dev); 874 } 875 876 ret = ax88179_ethtool_set_eee(dev, edata); 877 if (ret) 878 return ret; 879 880 mii_nway_restart(&dev->mii); 881 882 usbnet_link_change(dev, 0, 0); 883 884 return ret; 885 } 886 887 static int ax88179_ioctl(struct net_device *net, struct ifreq *rq, int cmd) 888 { 889 struct usbnet *dev = netdev_priv(net); 890 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); 891 } 892 893 static const struct ethtool_ops ax88179_ethtool_ops = { 894 .get_link = ethtool_op_get_link, 895 .get_msglevel = usbnet_get_msglevel, 896 .set_msglevel = usbnet_set_msglevel, 897 .get_wol = ax88179_get_wol, 898 .set_wol = ax88179_set_wol, 899 .get_eeprom_len = ax88179_get_eeprom_len, 900 .get_eeprom = ax88179_get_eeprom, 901 .set_eeprom = ax88179_set_eeprom, 902 .get_eee = ax88179_get_eee, 903 .set_eee = ax88179_set_eee, 904 .nway_reset = usbnet_nway_reset, 905 .get_link_ksettings = ax88179_get_link_ksettings, 906 .set_link_ksettings = ax88179_set_link_ksettings, 907 .get_ts_info = ethtool_op_get_ts_info, 908 }; 909 910 static void ax88179_set_multicast(struct net_device *net) 911 { 912 struct usbnet *dev = netdev_priv(net); 913 struct ax88179_data *data = (struct ax88179_data *)dev->data; 914 u8 *m_filter = ((u8 *)dev->data) + 12; 915 916 data->rxctl = (AX_RX_CTL_START | AX_RX_CTL_AB | AX_RX_CTL_IPE); 917 918 if (net->flags & IFF_PROMISC) { 919 data->rxctl |= AX_RX_CTL_PRO; 920 } else if (net->flags & IFF_ALLMULTI || 921 netdev_mc_count(net) > AX_MAX_MCAST) { 922 data->rxctl |= AX_RX_CTL_AMALL; 923 } else if (netdev_mc_empty(net)) { 924 /* just broadcast and directed */ 925 } else { 926 /* We use the 20 byte dev->data for our 8 byte filter buffer 927 * to avoid allocating memory that is tricky to free later 928 */ 929 u32 crc_bits; 930 struct netdev_hw_addr *ha; 931 932 memset(m_filter, 0, AX_MCAST_FLTSIZE); 933 934 netdev_for_each_mc_addr(ha, net) { 935 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26; 936 *(m_filter + (crc_bits >> 3)) |= (1 << (crc_bits & 7)); 937 } 938 939 ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_MULFLTARY, 940 AX_MCAST_FLTSIZE, AX_MCAST_FLTSIZE, 941 m_filter); 942 943 data->rxctl |= AX_RX_CTL_AM; 944 } 945 946 ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_RX_CTL, 947 2, 2, &data->rxctl); 948 } 949 950 static int 951 ax88179_set_features(struct net_device *net, netdev_features_t features) 952 { 953 u8 tmp; 954 struct usbnet *dev = netdev_priv(net); 955 netdev_features_t changed = net->features ^ features; 956 957 if (changed & NETIF_F_IP_CSUM) { 958 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp); 959 tmp ^= AX_TXCOE_TCP | AX_TXCOE_UDP; 960 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp); 961 } 962 963 if (changed & NETIF_F_IPV6_CSUM) { 964 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp); 965 tmp ^= AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6; 966 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp); 967 } 968 969 if (changed & NETIF_F_RXCSUM) { 970 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp); 971 tmp ^= AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP | 972 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6; 973 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp); 974 } 975 976 return 0; 977 } 978 979 static int ax88179_change_mtu(struct net_device *net, int new_mtu) 980 { 981 struct usbnet *dev = netdev_priv(net); 982 u16 tmp16; 983 984 net->mtu = new_mtu; 985 dev->hard_mtu = net->mtu + net->hard_header_len; 986 987 if (net->mtu > 1500) { 988 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 989 2, 2, &tmp16); 990 tmp16 |= AX_MEDIUM_JUMBO_EN; 991 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 992 2, 2, &tmp16); 993 } else { 994 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 995 2, 2, &tmp16); 996 tmp16 &= ~AX_MEDIUM_JUMBO_EN; 997 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 998 2, 2, &tmp16); 999 } 1000 1001 /* max qlen depend on hard_mtu and rx_urb_size */ 1002 usbnet_update_max_qlen(dev); 1003 1004 return 0; 1005 } 1006 1007 static int ax88179_set_mac_addr(struct net_device *net, void *p) 1008 { 1009 struct usbnet *dev = netdev_priv(net); 1010 struct sockaddr *addr = p; 1011 int ret; 1012 1013 if (netif_running(net)) 1014 return -EBUSY; 1015 if (!is_valid_ether_addr(addr->sa_data)) 1016 return -EADDRNOTAVAIL; 1017 1018 memcpy(net->dev_addr, addr->sa_data, ETH_ALEN); 1019 1020 /* Set the MAC address */ 1021 ret = ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN, 1022 ETH_ALEN, net->dev_addr); 1023 if (ret < 0) 1024 return ret; 1025 1026 return 0; 1027 } 1028 1029 static const struct net_device_ops ax88179_netdev_ops = { 1030 .ndo_open = usbnet_open, 1031 .ndo_stop = usbnet_stop, 1032 .ndo_start_xmit = usbnet_start_xmit, 1033 .ndo_tx_timeout = usbnet_tx_timeout, 1034 .ndo_get_stats64 = usbnet_get_stats64, 1035 .ndo_change_mtu = ax88179_change_mtu, 1036 .ndo_set_mac_address = ax88179_set_mac_addr, 1037 .ndo_validate_addr = eth_validate_addr, 1038 .ndo_do_ioctl = ax88179_ioctl, 1039 .ndo_set_rx_mode = ax88179_set_multicast, 1040 .ndo_set_features = ax88179_set_features, 1041 }; 1042 1043 static int ax88179_check_eeprom(struct usbnet *dev) 1044 { 1045 u8 i, buf, eeprom[20]; 1046 u16 csum, delay = HZ / 10; 1047 unsigned long jtimeout; 1048 1049 /* Read EEPROM content */ 1050 for (i = 0; i < 6; i++) { 1051 buf = i; 1052 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR, 1053 1, 1, &buf) < 0) 1054 return -EINVAL; 1055 1056 buf = EEP_RD; 1057 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD, 1058 1, 1, &buf) < 0) 1059 return -EINVAL; 1060 1061 jtimeout = jiffies + delay; 1062 do { 1063 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD, 1064 1, 1, &buf); 1065 1066 if (time_after(jiffies, jtimeout)) 1067 return -EINVAL; 1068 1069 } while (buf & EEP_BUSY); 1070 1071 __ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW, 1072 2, 2, &eeprom[i * 2], 0); 1073 1074 if ((i == 0) && (eeprom[0] == 0xFF)) 1075 return -EINVAL; 1076 } 1077 1078 csum = eeprom[6] + eeprom[7] + eeprom[8] + eeprom[9]; 1079 csum = (csum >> 8) + (csum & 0xff); 1080 if ((csum + eeprom[10]) != 0xff) 1081 return -EINVAL; 1082 1083 return 0; 1084 } 1085 1086 static int ax88179_check_efuse(struct usbnet *dev, u16 *ledmode) 1087 { 1088 u8 i; 1089 u8 efuse[64]; 1090 u16 csum = 0; 1091 1092 if (ax88179_read_cmd(dev, AX_ACCESS_EFUS, 0, 64, 64, efuse) < 0) 1093 return -EINVAL; 1094 1095 if (*efuse == 0xFF) 1096 return -EINVAL; 1097 1098 for (i = 0; i < 64; i++) 1099 csum = csum + efuse[i]; 1100 1101 while (csum > 255) 1102 csum = (csum & 0x00FF) + ((csum >> 8) & 0x00FF); 1103 1104 if (csum != 0xFF) 1105 return -EINVAL; 1106 1107 *ledmode = (efuse[51] << 8) | efuse[52]; 1108 1109 return 0; 1110 } 1111 1112 static int ax88179_convert_old_led(struct usbnet *dev, u16 *ledvalue) 1113 { 1114 u16 led; 1115 1116 /* Loaded the old eFuse LED Mode */ 1117 if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x3C, 1, 2, &led) < 0) 1118 return -EINVAL; 1119 1120 led >>= 8; 1121 switch (led) { 1122 case 0xFF: 1123 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 | 1124 LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 | 1125 LED2_LINK_100 | LED2_LINK_1000 | LED_VALID; 1126 break; 1127 case 0xFE: 1128 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 | LED_VALID; 1129 break; 1130 case 0xFD: 1131 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 | 1132 LED2_LINK_10 | LED_VALID; 1133 break; 1134 case 0xFC: 1135 led = LED0_ACTIVE | LED1_ACTIVE | LED1_LINK_1000 | LED2_ACTIVE | 1136 LED2_LINK_100 | LED2_LINK_10 | LED_VALID; 1137 break; 1138 default: 1139 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 | 1140 LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 | 1141 LED2_LINK_100 | LED2_LINK_1000 | LED_VALID; 1142 break; 1143 } 1144 1145 *ledvalue = led; 1146 1147 return 0; 1148 } 1149 1150 static int ax88179_led_setting(struct usbnet *dev) 1151 { 1152 u8 ledfd, value = 0; 1153 u16 tmp, ledact, ledlink, ledvalue = 0, delay = HZ / 10; 1154 unsigned long jtimeout; 1155 1156 /* Check AX88179 version. UA1 or UA2*/ 1157 ax88179_read_cmd(dev, AX_ACCESS_MAC, GENERAL_STATUS, 1, 1, &value); 1158 1159 if (!(value & AX_SECLD)) { /* UA1 */ 1160 value = AX_GPIO_CTRL_GPIO3EN | AX_GPIO_CTRL_GPIO2EN | 1161 AX_GPIO_CTRL_GPIO1EN; 1162 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_GPIO_CTRL, 1163 1, 1, &value) < 0) 1164 return -EINVAL; 1165 } 1166 1167 /* Check EEPROM */ 1168 if (!ax88179_check_eeprom(dev)) { 1169 value = 0x42; 1170 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR, 1171 1, 1, &value) < 0) 1172 return -EINVAL; 1173 1174 value = EEP_RD; 1175 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD, 1176 1, 1, &value) < 0) 1177 return -EINVAL; 1178 1179 jtimeout = jiffies + delay; 1180 do { 1181 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD, 1182 1, 1, &value); 1183 1184 if (time_after(jiffies, jtimeout)) 1185 return -EINVAL; 1186 1187 } while (value & EEP_BUSY); 1188 1189 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_HIGH, 1190 1, 1, &value); 1191 ledvalue = (value << 8); 1192 1193 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW, 1194 1, 1, &value); 1195 ledvalue |= value; 1196 1197 /* load internal ROM for defaule setting */ 1198 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0)) 1199 ax88179_convert_old_led(dev, &ledvalue); 1200 1201 } else if (!ax88179_check_efuse(dev, &ledvalue)) { 1202 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0)) 1203 ax88179_convert_old_led(dev, &ledvalue); 1204 } else { 1205 ax88179_convert_old_led(dev, &ledvalue); 1206 } 1207 1208 tmp = GMII_PHY_PGSEL_EXT; 1209 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, 1210 GMII_PHY_PAGE_SELECT, 2, &tmp); 1211 1212 tmp = 0x2c; 1213 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, 1214 GMII_PHYPAGE, 2, &tmp); 1215 1216 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, 1217 GMII_LED_ACT, 2, &ledact); 1218 1219 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, 1220 GMII_LED_LINK, 2, &ledlink); 1221 1222 ledact &= GMII_LED_ACTIVE_MASK; 1223 ledlink &= GMII_LED_LINK_MASK; 1224 1225 if (ledvalue & LED0_ACTIVE) 1226 ledact |= GMII_LED0_ACTIVE; 1227 1228 if (ledvalue & LED1_ACTIVE) 1229 ledact |= GMII_LED1_ACTIVE; 1230 1231 if (ledvalue & LED2_ACTIVE) 1232 ledact |= GMII_LED2_ACTIVE; 1233 1234 if (ledvalue & LED0_LINK_10) 1235 ledlink |= GMII_LED0_LINK_10; 1236 1237 if (ledvalue & LED1_LINK_10) 1238 ledlink |= GMII_LED1_LINK_10; 1239 1240 if (ledvalue & LED2_LINK_10) 1241 ledlink |= GMII_LED2_LINK_10; 1242 1243 if (ledvalue & LED0_LINK_100) 1244 ledlink |= GMII_LED0_LINK_100; 1245 1246 if (ledvalue & LED1_LINK_100) 1247 ledlink |= GMII_LED1_LINK_100; 1248 1249 if (ledvalue & LED2_LINK_100) 1250 ledlink |= GMII_LED2_LINK_100; 1251 1252 if (ledvalue & LED0_LINK_1000) 1253 ledlink |= GMII_LED0_LINK_1000; 1254 1255 if (ledvalue & LED1_LINK_1000) 1256 ledlink |= GMII_LED1_LINK_1000; 1257 1258 if (ledvalue & LED2_LINK_1000) 1259 ledlink |= GMII_LED2_LINK_1000; 1260 1261 tmp = ledact; 1262 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, 1263 GMII_LED_ACT, 2, &tmp); 1264 1265 tmp = ledlink; 1266 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, 1267 GMII_LED_LINK, 2, &tmp); 1268 1269 tmp = GMII_PHY_PGSEL_PAGE0; 1270 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, 1271 GMII_PHY_PAGE_SELECT, 2, &tmp); 1272 1273 /* LED full duplex setting */ 1274 ledfd = 0; 1275 if (ledvalue & LED0_FD) 1276 ledfd |= 0x01; 1277 else if ((ledvalue & LED0_USB3_MASK) == 0) 1278 ledfd |= 0x02; 1279 1280 if (ledvalue & LED1_FD) 1281 ledfd |= 0x04; 1282 else if ((ledvalue & LED1_USB3_MASK) == 0) 1283 ledfd |= 0x08; 1284 1285 if (ledvalue & LED2_FD) 1286 ledfd |= 0x10; 1287 else if ((ledvalue & LED2_USB3_MASK) == 0) 1288 ledfd |= 0x20; 1289 1290 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_LEDCTRL, 1, 1, &ledfd); 1291 1292 return 0; 1293 } 1294 1295 static void ax88179_get_mac_addr(struct usbnet *dev) 1296 { 1297 u8 mac[ETH_ALEN]; 1298 1299 /* Maybe the boot loader passed the MAC address via device tree */ 1300 if (!eth_platform_get_mac_address(&dev->udev->dev, mac)) { 1301 netif_dbg(dev, ifup, dev->net, 1302 "MAC address read from device tree"); 1303 } else { 1304 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN, 1305 ETH_ALEN, mac); 1306 netif_dbg(dev, ifup, dev->net, 1307 "MAC address read from ASIX chip"); 1308 } 1309 1310 if (is_valid_ether_addr(mac)) { 1311 memcpy(dev->net->dev_addr, mac, ETH_ALEN); 1312 } else { 1313 netdev_info(dev->net, "invalid MAC address, using random\n"); 1314 eth_hw_addr_random(dev->net); 1315 } 1316 1317 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN, ETH_ALEN, 1318 dev->net->dev_addr); 1319 } 1320 1321 static int ax88179_bind(struct usbnet *dev, struct usb_interface *intf) 1322 { 1323 u8 buf[5]; 1324 u16 *tmp16; 1325 u8 *tmp; 1326 struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data; 1327 struct ethtool_eee eee_data; 1328 1329 usbnet_get_endpoints(dev, intf); 1330 1331 tmp16 = (u16 *)buf; 1332 tmp = (u8 *)buf; 1333 1334 memset(ax179_data, 0, sizeof(*ax179_data)); 1335 1336 /* Power up ethernet PHY */ 1337 *tmp16 = 0; 1338 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16); 1339 *tmp16 = AX_PHYPWR_RSTCTL_IPRL; 1340 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16); 1341 msleep(200); 1342 1343 *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS; 1344 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp); 1345 msleep(100); 1346 1347 /* Read MAC address from DTB or asix chip */ 1348 ax88179_get_mac_addr(dev); 1349 memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN); 1350 1351 /* RX bulk configuration */ 1352 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5); 1353 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp); 1354 1355 dev->rx_urb_size = 1024 * 20; 1356 1357 *tmp = 0x34; 1358 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp); 1359 1360 *tmp = 0x52; 1361 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH, 1362 1, 1, tmp); 1363 1364 dev->net->netdev_ops = &ax88179_netdev_ops; 1365 dev->net->ethtool_ops = &ax88179_ethtool_ops; 1366 dev->net->needed_headroom = 8; 1367 dev->net->max_mtu = 4088; 1368 1369 /* Initialize MII structure */ 1370 dev->mii.dev = dev->net; 1371 dev->mii.mdio_read = ax88179_mdio_read; 1372 dev->mii.mdio_write = ax88179_mdio_write; 1373 dev->mii.phy_id_mask = 0xff; 1374 dev->mii.reg_num_mask = 0xff; 1375 dev->mii.phy_id = 0x03; 1376 dev->mii.supports_gmii = 1; 1377 1378 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 1379 NETIF_F_RXCSUM; 1380 1381 dev->net->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 1382 NETIF_F_RXCSUM; 1383 1384 /* Enable checksum offload */ 1385 *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP | 1386 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6; 1387 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp); 1388 1389 *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP | 1390 AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6; 1391 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp); 1392 1393 /* Configure RX control register => start operation */ 1394 *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START | 1395 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB; 1396 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16); 1397 1398 *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL | 1399 AX_MONITOR_MODE_RWMP; 1400 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp); 1401 1402 /* Configure default medium type => giga */ 1403 *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN | 1404 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX | 1405 AX_MEDIUM_GIGAMODE; 1406 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 1407 2, 2, tmp16); 1408 1409 ax88179_led_setting(dev); 1410 1411 ax179_data->eee_enabled = 0; 1412 ax179_data->eee_active = 0; 1413 1414 ax88179_disable_eee(dev); 1415 1416 ax88179_ethtool_get_eee(dev, &eee_data); 1417 eee_data.advertised = 0; 1418 ax88179_ethtool_set_eee(dev, &eee_data); 1419 1420 /* Restart autoneg */ 1421 mii_nway_restart(&dev->mii); 1422 1423 usbnet_link_change(dev, 0, 0); 1424 1425 return 0; 1426 } 1427 1428 static void ax88179_unbind(struct usbnet *dev, struct usb_interface *intf) 1429 { 1430 u16 tmp16; 1431 1432 /* Configure RX control register => stop operation */ 1433 tmp16 = AX_RX_CTL_STOP; 1434 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16); 1435 1436 tmp16 = 0; 1437 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp16); 1438 1439 /* Power down ethernet PHY */ 1440 tmp16 = 0; 1441 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16); 1442 } 1443 1444 static void 1445 ax88179_rx_checksum(struct sk_buff *skb, u32 *pkt_hdr) 1446 { 1447 skb->ip_summed = CHECKSUM_NONE; 1448 1449 /* checksum error bit is set */ 1450 if ((*pkt_hdr & AX_RXHDR_L3CSUM_ERR) || 1451 (*pkt_hdr & AX_RXHDR_L4CSUM_ERR)) 1452 return; 1453 1454 /* It must be a TCP or UDP packet with a valid checksum */ 1455 if (((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_TCP) || 1456 ((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_UDP)) 1457 skb->ip_summed = CHECKSUM_UNNECESSARY; 1458 } 1459 1460 static int ax88179_rx_fixup(struct usbnet *dev, struct sk_buff *skb) 1461 { 1462 struct sk_buff *ax_skb; 1463 int pkt_cnt; 1464 u32 rx_hdr; 1465 u16 hdr_off; 1466 u32 *pkt_hdr; 1467 1468 /* This check is no longer done by usbnet */ 1469 if (skb->len < dev->net->hard_header_len) 1470 return 0; 1471 1472 skb_trim(skb, skb->len - 4); 1473 rx_hdr = get_unaligned_le32(skb_tail_pointer(skb)); 1474 1475 pkt_cnt = (u16)rx_hdr; 1476 hdr_off = (u16)(rx_hdr >> 16); 1477 pkt_hdr = (u32 *)(skb->data + hdr_off); 1478 1479 while (pkt_cnt--) { 1480 u16 pkt_len; 1481 1482 le32_to_cpus(pkt_hdr); 1483 pkt_len = (*pkt_hdr >> 16) & 0x1fff; 1484 1485 /* Check CRC or runt packet */ 1486 if ((*pkt_hdr & AX_RXHDR_CRC_ERR) || 1487 (*pkt_hdr & AX_RXHDR_DROP_ERR)) { 1488 skb_pull(skb, (pkt_len + 7) & 0xFFF8); 1489 pkt_hdr++; 1490 continue; 1491 } 1492 1493 if (pkt_cnt == 0) { 1494 skb->len = pkt_len; 1495 /* Skip IP alignment pseudo header */ 1496 skb_pull(skb, 2); 1497 skb_set_tail_pointer(skb, skb->len); 1498 skb->truesize = pkt_len + sizeof(struct sk_buff); 1499 ax88179_rx_checksum(skb, pkt_hdr); 1500 return 1; 1501 } 1502 1503 ax_skb = skb_clone(skb, GFP_ATOMIC); 1504 if (ax_skb) { 1505 ax_skb->len = pkt_len; 1506 /* Skip IP alignment pseudo header */ 1507 skb_pull(ax_skb, 2); 1508 skb_set_tail_pointer(ax_skb, ax_skb->len); 1509 ax_skb->truesize = pkt_len + sizeof(struct sk_buff); 1510 ax88179_rx_checksum(ax_skb, pkt_hdr); 1511 usbnet_skb_return(dev, ax_skb); 1512 } else { 1513 return 0; 1514 } 1515 1516 skb_pull(skb, (pkt_len + 7) & 0xFFF8); 1517 pkt_hdr++; 1518 } 1519 return 1; 1520 } 1521 1522 static struct sk_buff * 1523 ax88179_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags) 1524 { 1525 u32 tx_hdr1, tx_hdr2; 1526 int frame_size = dev->maxpacket; 1527 int mss = skb_shinfo(skb)->gso_size; 1528 int headroom; 1529 void *ptr; 1530 1531 tx_hdr1 = skb->len; 1532 tx_hdr2 = mss; 1533 if (((skb->len + 8) % frame_size) == 0) 1534 tx_hdr2 |= 0x80008000; /* Enable padding */ 1535 1536 headroom = skb_headroom(skb) - 8; 1537 1538 if ((skb_header_cloned(skb) || headroom < 0) && 1539 pskb_expand_head(skb, headroom < 0 ? 8 : 0, 0, GFP_ATOMIC)) { 1540 dev_kfree_skb_any(skb); 1541 return NULL; 1542 } 1543 1544 ptr = skb_push(skb, 8); 1545 put_unaligned_le32(tx_hdr1, ptr); 1546 put_unaligned_le32(tx_hdr2, ptr + 4); 1547 1548 return skb; 1549 } 1550 1551 static int ax88179_link_reset(struct usbnet *dev) 1552 { 1553 struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data; 1554 u8 tmp[5], link_sts; 1555 u16 mode, tmp16, delay = HZ / 10; 1556 u32 tmp32 = 0x40000000; 1557 unsigned long jtimeout; 1558 1559 jtimeout = jiffies + delay; 1560 while (tmp32 & 0x40000000) { 1561 mode = 0; 1562 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &mode); 1563 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, 1564 &ax179_data->rxctl); 1565 1566 /*link up, check the usb device control TX FIFO full or empty*/ 1567 ax88179_read_cmd(dev, 0x81, 0x8c, 0, 4, &tmp32); 1568 1569 if (time_after(jiffies, jtimeout)) 1570 return 0; 1571 } 1572 1573 mode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN | 1574 AX_MEDIUM_RXFLOW_CTRLEN; 1575 1576 ax88179_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS, 1577 1, 1, &link_sts); 1578 1579 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID, 1580 GMII_PHY_PHYSR, 2, &tmp16); 1581 1582 if (!(tmp16 & GMII_PHY_PHYSR_LINK)) { 1583 return 0; 1584 } else if (GMII_PHY_PHYSR_GIGA == (tmp16 & GMII_PHY_PHYSR_SMASK)) { 1585 mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_EN_125MHZ; 1586 if (dev->net->mtu > 1500) 1587 mode |= AX_MEDIUM_JUMBO_EN; 1588 1589 if (link_sts & AX_USB_SS) 1590 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5); 1591 else if (link_sts & AX_USB_HS) 1592 memcpy(tmp, &AX88179_BULKIN_SIZE[1], 5); 1593 else 1594 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5); 1595 } else if (GMII_PHY_PHYSR_100 == (tmp16 & GMII_PHY_PHYSR_SMASK)) { 1596 mode |= AX_MEDIUM_PS; 1597 1598 if (link_sts & (AX_USB_SS | AX_USB_HS)) 1599 memcpy(tmp, &AX88179_BULKIN_SIZE[2], 5); 1600 else 1601 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5); 1602 } else { 1603 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5); 1604 } 1605 1606 /* RX bulk configuration */ 1607 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp); 1608 1609 dev->rx_urb_size = (1024 * (tmp[3] + 2)); 1610 1611 if (tmp16 & GMII_PHY_PHYSR_FULL) 1612 mode |= AX_MEDIUM_FULL_DUPLEX; 1613 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 1614 2, 2, &mode); 1615 1616 ax179_data->eee_enabled = ax88179_chk_eee(dev); 1617 1618 netif_carrier_on(dev->net); 1619 1620 return 0; 1621 } 1622 1623 static int ax88179_reset(struct usbnet *dev) 1624 { 1625 u8 buf[5]; 1626 u16 *tmp16; 1627 u8 *tmp; 1628 struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data; 1629 struct ethtool_eee eee_data; 1630 1631 tmp16 = (u16 *)buf; 1632 tmp = (u8 *)buf; 1633 1634 /* Power up ethernet PHY */ 1635 *tmp16 = 0; 1636 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16); 1637 1638 *tmp16 = AX_PHYPWR_RSTCTL_IPRL; 1639 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16); 1640 msleep(200); 1641 1642 *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS; 1643 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp); 1644 msleep(100); 1645 1646 /* Ethernet PHY Auto Detach*/ 1647 ax88179_auto_detach(dev, 0); 1648 1649 /* Read MAC address from DTB or asix chip */ 1650 ax88179_get_mac_addr(dev); 1651 1652 /* RX bulk configuration */ 1653 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5); 1654 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp); 1655 1656 dev->rx_urb_size = 1024 * 20; 1657 1658 *tmp = 0x34; 1659 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp); 1660 1661 *tmp = 0x52; 1662 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH, 1663 1, 1, tmp); 1664 1665 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 1666 NETIF_F_RXCSUM; 1667 1668 dev->net->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 1669 NETIF_F_RXCSUM; 1670 1671 /* Enable checksum offload */ 1672 *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP | 1673 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6; 1674 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp); 1675 1676 *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP | 1677 AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6; 1678 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp); 1679 1680 /* Configure RX control register => start operation */ 1681 *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START | 1682 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB; 1683 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16); 1684 1685 *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL | 1686 AX_MONITOR_MODE_RWMP; 1687 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp); 1688 1689 /* Configure default medium type => giga */ 1690 *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN | 1691 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX | 1692 AX_MEDIUM_GIGAMODE; 1693 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 1694 2, 2, tmp16); 1695 1696 ax88179_led_setting(dev); 1697 1698 ax179_data->eee_enabled = 0; 1699 ax179_data->eee_active = 0; 1700 1701 ax88179_disable_eee(dev); 1702 1703 ax88179_ethtool_get_eee(dev, &eee_data); 1704 eee_data.advertised = 0; 1705 ax88179_ethtool_set_eee(dev, &eee_data); 1706 1707 /* Restart autoneg */ 1708 mii_nway_restart(&dev->mii); 1709 1710 usbnet_link_change(dev, 0, 0); 1711 1712 return 0; 1713 } 1714 1715 static int ax88179_stop(struct usbnet *dev) 1716 { 1717 u16 tmp16; 1718 1719 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 1720 2, 2, &tmp16); 1721 tmp16 &= ~AX_MEDIUM_RECEIVE_EN; 1722 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 1723 2, 2, &tmp16); 1724 1725 return 0; 1726 } 1727 1728 static const struct driver_info ax88179_info = { 1729 .description = "ASIX AX88179 USB 3.0 Gigabit Ethernet", 1730 .bind = ax88179_bind, 1731 .unbind = ax88179_unbind, 1732 .status = ax88179_status, 1733 .link_reset = ax88179_link_reset, 1734 .reset = ax88179_reset, 1735 .stop = ax88179_stop, 1736 .flags = FLAG_ETHER | FLAG_FRAMING_AX, 1737 .rx_fixup = ax88179_rx_fixup, 1738 .tx_fixup = ax88179_tx_fixup, 1739 }; 1740 1741 static const struct driver_info ax88178a_info = { 1742 .description = "ASIX AX88178A USB 2.0 Gigabit Ethernet", 1743 .bind = ax88179_bind, 1744 .unbind = ax88179_unbind, 1745 .status = ax88179_status, 1746 .link_reset = ax88179_link_reset, 1747 .reset = ax88179_reset, 1748 .stop = ax88179_stop, 1749 .flags = FLAG_ETHER | FLAG_FRAMING_AX, 1750 .rx_fixup = ax88179_rx_fixup, 1751 .tx_fixup = ax88179_tx_fixup, 1752 }; 1753 1754 static const struct driver_info cypress_GX3_info = { 1755 .description = "Cypress GX3 SuperSpeed to Gigabit Ethernet Controller", 1756 .bind = ax88179_bind, 1757 .unbind = ax88179_unbind, 1758 .status = ax88179_status, 1759 .link_reset = ax88179_link_reset, 1760 .reset = ax88179_reset, 1761 .stop = ax88179_stop, 1762 .flags = FLAG_ETHER | FLAG_FRAMING_AX, 1763 .rx_fixup = ax88179_rx_fixup, 1764 .tx_fixup = ax88179_tx_fixup, 1765 }; 1766 1767 static const struct driver_info dlink_dub1312_info = { 1768 .description = "D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter", 1769 .bind = ax88179_bind, 1770 .unbind = ax88179_unbind, 1771 .status = ax88179_status, 1772 .link_reset = ax88179_link_reset, 1773 .reset = ax88179_reset, 1774 .stop = ax88179_stop, 1775 .flags = FLAG_ETHER | FLAG_FRAMING_AX, 1776 .rx_fixup = ax88179_rx_fixup, 1777 .tx_fixup = ax88179_tx_fixup, 1778 }; 1779 1780 static const struct driver_info sitecom_info = { 1781 .description = "Sitecom USB 3.0 to Gigabit Adapter", 1782 .bind = ax88179_bind, 1783 .unbind = ax88179_unbind, 1784 .status = ax88179_status, 1785 .link_reset = ax88179_link_reset, 1786 .reset = ax88179_reset, 1787 .stop = ax88179_stop, 1788 .flags = FLAG_ETHER | FLAG_FRAMING_AX, 1789 .rx_fixup = ax88179_rx_fixup, 1790 .tx_fixup = ax88179_tx_fixup, 1791 }; 1792 1793 static const struct driver_info samsung_info = { 1794 .description = "Samsung USB Ethernet Adapter", 1795 .bind = ax88179_bind, 1796 .unbind = ax88179_unbind, 1797 .status = ax88179_status, 1798 .link_reset = ax88179_link_reset, 1799 .reset = ax88179_reset, 1800 .stop = ax88179_stop, 1801 .flags = FLAG_ETHER | FLAG_FRAMING_AX, 1802 .rx_fixup = ax88179_rx_fixup, 1803 .tx_fixup = ax88179_tx_fixup, 1804 }; 1805 1806 static const struct driver_info lenovo_info = { 1807 .description = "Lenovo OneLinkDock Gigabit LAN", 1808 .bind = ax88179_bind, 1809 .unbind = ax88179_unbind, 1810 .status = ax88179_status, 1811 .link_reset = ax88179_link_reset, 1812 .reset = ax88179_reset, 1813 .stop = ax88179_stop, 1814 .flags = FLAG_ETHER | FLAG_FRAMING_AX, 1815 .rx_fixup = ax88179_rx_fixup, 1816 .tx_fixup = ax88179_tx_fixup, 1817 }; 1818 1819 static const struct driver_info belkin_info = { 1820 .description = "Belkin USB Ethernet Adapter", 1821 .bind = ax88179_bind, 1822 .unbind = ax88179_unbind, 1823 .status = ax88179_status, 1824 .link_reset = ax88179_link_reset, 1825 .reset = ax88179_reset, 1826 .flags = FLAG_ETHER | FLAG_FRAMING_AX, 1827 .rx_fixup = ax88179_rx_fixup, 1828 .tx_fixup = ax88179_tx_fixup, 1829 }; 1830 1831 static const struct usb_device_id products[] = { 1832 { 1833 /* ASIX AX88179 10/100/1000 */ 1834 USB_DEVICE(0x0b95, 0x1790), 1835 .driver_info = (unsigned long)&ax88179_info, 1836 }, { 1837 /* ASIX AX88178A 10/100/1000 */ 1838 USB_DEVICE(0x0b95, 0x178a), 1839 .driver_info = (unsigned long)&ax88178a_info, 1840 }, { 1841 /* Cypress GX3 SuperSpeed to Gigabit Ethernet Bridge Controller */ 1842 USB_DEVICE(0x04b4, 0x3610), 1843 .driver_info = (unsigned long)&cypress_GX3_info, 1844 }, { 1845 /* D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter */ 1846 USB_DEVICE(0x2001, 0x4a00), 1847 .driver_info = (unsigned long)&dlink_dub1312_info, 1848 }, { 1849 /* Sitecom USB 3.0 to Gigabit Adapter */ 1850 USB_DEVICE(0x0df6, 0x0072), 1851 .driver_info = (unsigned long)&sitecom_info, 1852 }, { 1853 /* Samsung USB Ethernet Adapter */ 1854 USB_DEVICE(0x04e8, 0xa100), 1855 .driver_info = (unsigned long)&samsung_info, 1856 }, { 1857 /* Lenovo OneLinkDock Gigabit LAN */ 1858 USB_DEVICE(0x17ef, 0x304b), 1859 .driver_info = (unsigned long)&lenovo_info, 1860 }, { 1861 /* Belkin B2B128 USB 3.0 Hub + Gigabit Ethernet Adapter */ 1862 USB_DEVICE(0x050d, 0x0128), 1863 .driver_info = (unsigned long)&belkin_info, 1864 }, 1865 { }, 1866 }; 1867 MODULE_DEVICE_TABLE(usb, products); 1868 1869 static struct usb_driver ax88179_178a_driver = { 1870 .name = "ax88179_178a", 1871 .id_table = products, 1872 .probe = usbnet_probe, 1873 .suspend = ax88179_suspend, 1874 .resume = ax88179_resume, 1875 .reset_resume = ax88179_resume, 1876 .disconnect = usbnet_disconnect, 1877 .supports_autosuspend = 1, 1878 .disable_hub_initiated_lpm = 1, 1879 }; 1880 1881 module_usb_driver(ax88179_178a_driver); 1882 1883 MODULE_DESCRIPTION("ASIX AX88179/178A based USB 3.0/2.0 Gigabit Ethernet Devices"); 1884 MODULE_LICENSE("GPL"); 1885