1 /* 2 * Driver for Vitesse PHYs 3 * 4 * Author: Kriston Carson 5 * 6 * Copyright (c) 2005, 2009 Freescale Semiconductor, Inc. 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License as published by the 10 * Free Software Foundation; either version 2 of the License, or (at your 11 * option) any later version. 12 * 13 */ 14 15 #include <linux/kernel.h> 16 #include <linux/module.h> 17 #include <linux/mii.h> 18 #include <linux/ethtool.h> 19 #include <linux/phy.h> 20 21 /* Vitesse Extended Control Register 1 */ 22 #define MII_VSC8244_EXT_CON1 0x17 23 #define MII_VSC8244_EXTCON1_INIT 0x0000 24 #define MII_VSC8244_EXTCON1_TX_SKEW_MASK 0x0c00 25 #define MII_VSC8244_EXTCON1_RX_SKEW_MASK 0x0300 26 #define MII_VSC8244_EXTCON1_TX_SKEW 0x0800 27 #define MII_VSC8244_EXTCON1_RX_SKEW 0x0200 28 29 /* Vitesse Interrupt Mask Register */ 30 #define MII_VSC8244_IMASK 0x19 31 #define MII_VSC8244_IMASK_IEN 0x8000 32 #define MII_VSC8244_IMASK_SPEED 0x4000 33 #define MII_VSC8244_IMASK_LINK 0x2000 34 #define MII_VSC8244_IMASK_DUPLEX 0x1000 35 #define MII_VSC8244_IMASK_MASK 0xf000 36 37 #define MII_VSC8221_IMASK_MASK 0xa000 38 39 /* Vitesse Interrupt Status Register */ 40 #define MII_VSC8244_ISTAT 0x1a 41 #define MII_VSC8244_ISTAT_STATUS 0x8000 42 #define MII_VSC8244_ISTAT_SPEED 0x4000 43 #define MII_VSC8244_ISTAT_LINK 0x2000 44 #define MII_VSC8244_ISTAT_DUPLEX 0x1000 45 46 /* Vitesse Auxiliary Control/Status Register */ 47 #define MII_VSC8244_AUX_CONSTAT 0x1c 48 #define MII_VSC8244_AUXCONSTAT_INIT 0x0000 49 #define MII_VSC8244_AUXCONSTAT_DUPLEX 0x0020 50 #define MII_VSC8244_AUXCONSTAT_SPEED 0x0018 51 #define MII_VSC8244_AUXCONSTAT_GBIT 0x0010 52 #define MII_VSC8244_AUXCONSTAT_100 0x0008 53 54 #define MII_VSC8221_AUXCONSTAT_INIT 0x0004 /* need to set this bit? */ 55 #define MII_VSC8221_AUXCONSTAT_RESERVED 0x0004 56 57 #define PHY_ID_VSC8244 0x000fc6c0 58 #define PHY_ID_VSC8221 0x000fc550 59 #define PHY_ID_VSC8211 0x000fc4b0 60 61 MODULE_DESCRIPTION("Vitesse PHY driver"); 62 MODULE_AUTHOR("Kriston Carson"); 63 MODULE_LICENSE("GPL"); 64 65 static int vsc824x_add_skew(struct phy_device *phydev) 66 { 67 int err; 68 int extcon; 69 70 extcon = phy_read(phydev, MII_VSC8244_EXT_CON1); 71 72 if (extcon < 0) 73 return extcon; 74 75 extcon &= ~(MII_VSC8244_EXTCON1_TX_SKEW_MASK | 76 MII_VSC8244_EXTCON1_RX_SKEW_MASK); 77 78 extcon |= (MII_VSC8244_EXTCON1_TX_SKEW | 79 MII_VSC8244_EXTCON1_RX_SKEW); 80 81 err = phy_write(phydev, MII_VSC8244_EXT_CON1, extcon); 82 83 return err; 84 } 85 86 static int vsc824x_config_init(struct phy_device *phydev) 87 { 88 int err; 89 90 err = phy_write(phydev, MII_VSC8244_AUX_CONSTAT, 91 MII_VSC8244_AUXCONSTAT_INIT); 92 if (err < 0) 93 return err; 94 95 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) 96 err = vsc824x_add_skew(phydev); 97 98 return err; 99 } 100 101 static int vsc824x_ack_interrupt(struct phy_device *phydev) 102 { 103 int err = 0; 104 105 /* Don't bother to ACK the interrupts if interrupts 106 * are disabled. The 824x cannot clear the interrupts 107 * if they are disabled. 108 */ 109 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) 110 err = phy_read(phydev, MII_VSC8244_ISTAT); 111 112 return (err < 0) ? err : 0; 113 } 114 115 static int vsc82xx_config_intr(struct phy_device *phydev) 116 { 117 int err; 118 119 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) 120 err = phy_write(phydev, MII_VSC8244_IMASK, 121 phydev->drv->phy_id == PHY_ID_VSC8244 ? 122 MII_VSC8244_IMASK_MASK : 123 MII_VSC8221_IMASK_MASK); 124 else { 125 /* The Vitesse PHY cannot clear the interrupt 126 * once it has disabled them, so we clear them first 127 */ 128 err = phy_read(phydev, MII_VSC8244_ISTAT); 129 130 if (err < 0) 131 return err; 132 133 err = phy_write(phydev, MII_VSC8244_IMASK, 0); 134 } 135 136 return err; 137 } 138 139 static int vsc8221_config_init(struct phy_device *phydev) 140 { 141 int err; 142 143 err = phy_write(phydev, MII_VSC8244_AUX_CONSTAT, 144 MII_VSC8221_AUXCONSTAT_INIT); 145 return err; 146 147 /* Perhaps we should set EXT_CON1 based on the interface? 148 * Options are 802.3Z SerDes or SGMII 149 */ 150 } 151 152 /* Vitesse 824x */ 153 static struct phy_driver vsc82xx_driver[] = { 154 { 155 .phy_id = PHY_ID_VSC8244, 156 .name = "Vitesse VSC8244", 157 .phy_id_mask = 0x000fffc0, 158 .features = PHY_GBIT_FEATURES, 159 .flags = PHY_HAS_INTERRUPT, 160 .config_init = &vsc824x_config_init, 161 .config_aneg = &genphy_config_aneg, 162 .read_status = &genphy_read_status, 163 .ack_interrupt = &vsc824x_ack_interrupt, 164 .config_intr = &vsc82xx_config_intr, 165 .driver = { .owner = THIS_MODULE,}, 166 }, { 167 /* Vitesse 8221 */ 168 .phy_id = PHY_ID_VSC8221, 169 .phy_id_mask = 0x000ffff0, 170 .name = "Vitesse VSC8221", 171 .features = PHY_GBIT_FEATURES, 172 .flags = PHY_HAS_INTERRUPT, 173 .config_init = &vsc8221_config_init, 174 .config_aneg = &genphy_config_aneg, 175 .read_status = &genphy_read_status, 176 .ack_interrupt = &vsc824x_ack_interrupt, 177 .config_intr = &vsc82xx_config_intr, 178 .driver = { .owner = THIS_MODULE,}, 179 }, { 180 /* Vitesse 8211 */ 181 .phy_id = PHY_ID_VSC8211, 182 .phy_id_mask = 0x000ffff0, 183 .name = "Vitesse VSC8211", 184 .features = PHY_GBIT_FEATURES, 185 .flags = PHY_HAS_INTERRUPT, 186 .config_init = &vsc8221_config_init, 187 .config_aneg = &genphy_config_aneg, 188 .read_status = &genphy_read_status, 189 .ack_interrupt = &vsc824x_ack_interrupt, 190 .config_intr = &vsc82xx_config_intr, 191 .driver = { .owner = THIS_MODULE,}, 192 } }; 193 194 static int __init vsc82xx_init(void) 195 { 196 return phy_drivers_register(vsc82xx_driver, 197 ARRAY_SIZE(vsc82xx_driver)); 198 } 199 200 static void __exit vsc82xx_exit(void) 201 { 202 return phy_drivers_unregister(vsc82xx_driver, 203 ARRAY_SIZE(vsc82xx_driver)); 204 } 205 206 module_init(vsc82xx_init); 207 module_exit(vsc82xx_exit); 208 209 static struct mdio_device_id __maybe_unused vitesse_tbl[] = { 210 { PHY_ID_VSC8244, 0x000fffc0 }, 211 { PHY_ID_VSC8221, 0x000ffff0 }, 212 { PHY_ID_VSC8211, 0x000ffff0 }, 213 { } 214 }; 215 216 MODULE_DEVICE_TABLE(mdio, vitesse_tbl); 217