xref: /openbmc/linux/drivers/net/phy/spi_ks8995.c (revision 37be287c)
1 /*
2  * SPI driver for Micrel/Kendin KS8995M ethernet switch
3  *
4  * Copyright (C) 2008 Gabor Juhos <juhosg at openwrt.org>
5  *
6  * This file was based on: drivers/spi/at25.c
7  *     Copyright (C) 2006 David Brownell
8  *
9  * This program is free software; you can redistribute it and/or modify it
10  * under the terms of the GNU General Public License version 2 as published
11  * by the Free Software Foundation.
12  */
13 
14 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 
16 #include <linux/types.h>
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/delay.h>
20 #include <linux/device.h>
21 
22 #include <linux/spi/spi.h>
23 
24 #define DRV_VERSION		"0.1.1"
25 #define DRV_DESC		"Micrel KS8995 Ethernet switch SPI driver"
26 
27 /* ------------------------------------------------------------------------ */
28 
29 #define KS8995_REG_ID0		0x00    /* Chip ID0 */
30 #define KS8995_REG_ID1		0x01    /* Chip ID1 */
31 
32 #define KS8995_REG_GC0		0x02    /* Global Control 0 */
33 #define KS8995_REG_GC1		0x03    /* Global Control 1 */
34 #define KS8995_REG_GC2		0x04    /* Global Control 2 */
35 #define KS8995_REG_GC3		0x05    /* Global Control 3 */
36 #define KS8995_REG_GC4		0x06    /* Global Control 4 */
37 #define KS8995_REG_GC5		0x07    /* Global Control 5 */
38 #define KS8995_REG_GC6		0x08    /* Global Control 6 */
39 #define KS8995_REG_GC7		0x09    /* Global Control 7 */
40 #define KS8995_REG_GC8		0x0a    /* Global Control 8 */
41 #define KS8995_REG_GC9		0x0b    /* Global Control 9 */
42 
43 #define KS8995_REG_PC(p, r)	((0x10 * p) + r)	 /* Port Control */
44 #define KS8995_REG_PS(p, r)	((0x10 * p) + r + 0xe)  /* Port Status */
45 
46 #define KS8995_REG_TPC0		0x60    /* TOS Priority Control 0 */
47 #define KS8995_REG_TPC1		0x61    /* TOS Priority Control 1 */
48 #define KS8995_REG_TPC2		0x62    /* TOS Priority Control 2 */
49 #define KS8995_REG_TPC3		0x63    /* TOS Priority Control 3 */
50 #define KS8995_REG_TPC4		0x64    /* TOS Priority Control 4 */
51 #define KS8995_REG_TPC5		0x65    /* TOS Priority Control 5 */
52 #define KS8995_REG_TPC6		0x66    /* TOS Priority Control 6 */
53 #define KS8995_REG_TPC7		0x67    /* TOS Priority Control 7 */
54 
55 #define KS8995_REG_MAC0		0x68    /* MAC address 0 */
56 #define KS8995_REG_MAC1		0x69    /* MAC address 1 */
57 #define KS8995_REG_MAC2		0x6a    /* MAC address 2 */
58 #define KS8995_REG_MAC3		0x6b    /* MAC address 3 */
59 #define KS8995_REG_MAC4		0x6c    /* MAC address 4 */
60 #define KS8995_REG_MAC5		0x6d    /* MAC address 5 */
61 
62 #define KS8995_REG_IAC0		0x6e    /* Indirect Access Control 0 */
63 #define KS8995_REG_IAC1		0x6f    /* Indirect Access Control 0 */
64 #define KS8995_REG_IAD7		0x70    /* Indirect Access Data 7 */
65 #define KS8995_REG_IAD6		0x71    /* Indirect Access Data 6 */
66 #define KS8995_REG_IAD5		0x72    /* Indirect Access Data 5 */
67 #define KS8995_REG_IAD4		0x73    /* Indirect Access Data 4 */
68 #define KS8995_REG_IAD3		0x74    /* Indirect Access Data 3 */
69 #define KS8995_REG_IAD2		0x75    /* Indirect Access Data 2 */
70 #define KS8995_REG_IAD1		0x76    /* Indirect Access Data 1 */
71 #define KS8995_REG_IAD0		0x77    /* Indirect Access Data 0 */
72 
73 #define KS8995_REGS_SIZE	0x80
74 
75 #define ID1_CHIPID_M		0xf
76 #define ID1_CHIPID_S		4
77 #define ID1_REVISION_M		0x7
78 #define ID1_REVISION_S		1
79 #define ID1_START_SW		1	/* start the switch */
80 
81 #define FAMILY_KS8995		0x95
82 #define CHIPID_M		0
83 
84 #define KS8995_CMD_WRITE	0x02U
85 #define KS8995_CMD_READ		0x03U
86 
87 #define KS8995_RESET_DELAY	10 /* usec */
88 
89 struct ks8995_pdata {
90 	/* not yet implemented */
91 };
92 
93 struct ks8995_switch {
94 	struct spi_device	*spi;
95 	struct mutex		lock;
96 	struct ks8995_pdata	*pdata;
97 };
98 
99 static inline u8 get_chip_id(u8 val)
100 {
101 	return (val >> ID1_CHIPID_S) & ID1_CHIPID_M;
102 }
103 
104 static inline u8 get_chip_rev(u8 val)
105 {
106 	return (val >> ID1_REVISION_S) & ID1_REVISION_M;
107 }
108 
109 /* ------------------------------------------------------------------------ */
110 static int ks8995_read(struct ks8995_switch *ks, char *buf,
111 		 unsigned offset, size_t count)
112 {
113 	u8 cmd[2];
114 	struct spi_transfer t[2];
115 	struct spi_message m;
116 	int err;
117 
118 	spi_message_init(&m);
119 
120 	memset(&t, 0, sizeof(t));
121 
122 	t[0].tx_buf = cmd;
123 	t[0].len = sizeof(cmd);
124 	spi_message_add_tail(&t[0], &m);
125 
126 	t[1].rx_buf = buf;
127 	t[1].len = count;
128 	spi_message_add_tail(&t[1], &m);
129 
130 	cmd[0] = KS8995_CMD_READ;
131 	cmd[1] = offset;
132 
133 	mutex_lock(&ks->lock);
134 	err = spi_sync(ks->spi, &m);
135 	mutex_unlock(&ks->lock);
136 
137 	return err ? err : count;
138 }
139 
140 
141 static int ks8995_write(struct ks8995_switch *ks, char *buf,
142 		 unsigned offset, size_t count)
143 {
144 	u8 cmd[2];
145 	struct spi_transfer t[2];
146 	struct spi_message m;
147 	int err;
148 
149 	spi_message_init(&m);
150 
151 	memset(&t, 0, sizeof(t));
152 
153 	t[0].tx_buf = cmd;
154 	t[0].len = sizeof(cmd);
155 	spi_message_add_tail(&t[0], &m);
156 
157 	t[1].tx_buf = buf;
158 	t[1].len = count;
159 	spi_message_add_tail(&t[1], &m);
160 
161 	cmd[0] = KS8995_CMD_WRITE;
162 	cmd[1] = offset;
163 
164 	mutex_lock(&ks->lock);
165 	err = spi_sync(ks->spi, &m);
166 	mutex_unlock(&ks->lock);
167 
168 	return err ? err : count;
169 }
170 
171 static inline int ks8995_read_reg(struct ks8995_switch *ks, u8 addr, u8 *buf)
172 {
173 	return ks8995_read(ks, buf, addr, 1) != 1;
174 }
175 
176 static inline int ks8995_write_reg(struct ks8995_switch *ks, u8 addr, u8 val)
177 {
178 	char buf = val;
179 
180 	return ks8995_write(ks, &buf, addr, 1) != 1;
181 }
182 
183 /* ------------------------------------------------------------------------ */
184 
185 static int ks8995_stop(struct ks8995_switch *ks)
186 {
187 	return ks8995_write_reg(ks, KS8995_REG_ID1, 0);
188 }
189 
190 static int ks8995_start(struct ks8995_switch *ks)
191 {
192 	return ks8995_write_reg(ks, KS8995_REG_ID1, 1);
193 }
194 
195 static int ks8995_reset(struct ks8995_switch *ks)
196 {
197 	int err;
198 
199 	err = ks8995_stop(ks);
200 	if (err)
201 		return err;
202 
203 	udelay(KS8995_RESET_DELAY);
204 
205 	return ks8995_start(ks);
206 }
207 
208 /* ------------------------------------------------------------------------ */
209 
210 static ssize_t ks8995_registers_read(struct file *filp, struct kobject *kobj,
211 	struct bin_attribute *bin_attr, char *buf, loff_t off, size_t count)
212 {
213 	struct device *dev;
214 	struct ks8995_switch *ks8995;
215 
216 	dev = container_of(kobj, struct device, kobj);
217 	ks8995 = dev_get_drvdata(dev);
218 
219 	if (unlikely(off > KS8995_REGS_SIZE))
220 		return 0;
221 
222 	if ((off + count) > KS8995_REGS_SIZE)
223 		count = KS8995_REGS_SIZE - off;
224 
225 	if (unlikely(!count))
226 		return count;
227 
228 	return ks8995_read(ks8995, buf, off, count);
229 }
230 
231 
232 static ssize_t ks8995_registers_write(struct file *filp, struct kobject *kobj,
233 	struct bin_attribute *bin_attr, char *buf, loff_t off, size_t count)
234 {
235 	struct device *dev;
236 	struct ks8995_switch *ks8995;
237 
238 	dev = container_of(kobj, struct device, kobj);
239 	ks8995 = dev_get_drvdata(dev);
240 
241 	if (unlikely(off >= KS8995_REGS_SIZE))
242 		return -EFBIG;
243 
244 	if ((off + count) > KS8995_REGS_SIZE)
245 		count = KS8995_REGS_SIZE - off;
246 
247 	if (unlikely(!count))
248 		return count;
249 
250 	return ks8995_write(ks8995, buf, off, count);
251 }
252 
253 
254 static struct bin_attribute ks8995_registers_attr = {
255 	.attr = {
256 		.name   = "registers",
257 		.mode   = S_IRUSR | S_IWUSR,
258 	},
259 	.size   = KS8995_REGS_SIZE,
260 	.read   = ks8995_registers_read,
261 	.write  = ks8995_registers_write,
262 };
263 
264 /* ------------------------------------------------------------------------ */
265 
266 static int ks8995_probe(struct spi_device *spi)
267 {
268 	struct ks8995_switch    *ks;
269 	struct ks8995_pdata     *pdata;
270 	u8      ids[2];
271 	int     err;
272 
273 	/* Chip description */
274 	pdata = spi->dev.platform_data;
275 
276 	ks = kzalloc(sizeof(*ks), GFP_KERNEL);
277 	if (!ks)
278 		return -ENOMEM;
279 
280 	mutex_init(&ks->lock);
281 	ks->pdata = pdata;
282 	ks->spi = spi_dev_get(spi);
283 	spi_set_drvdata(spi, ks);
284 
285 	spi->mode = SPI_MODE_0;
286 	spi->bits_per_word = 8;
287 	err = spi_setup(spi);
288 	if (err) {
289 		dev_err(&spi->dev, "spi_setup failed, err=%d\n", err);
290 		goto err_drvdata;
291 	}
292 
293 	err = ks8995_read(ks, ids, KS8995_REG_ID0, sizeof(ids));
294 	if (err < 0) {
295 		dev_err(&spi->dev, "unable to read id registers, err=%d\n",
296 				err);
297 		goto err_drvdata;
298 	}
299 
300 	switch (ids[0]) {
301 	case FAMILY_KS8995:
302 		break;
303 	default:
304 		dev_err(&spi->dev, "unknown family id:%02x\n", ids[0]);
305 		err = -ENODEV;
306 		goto err_drvdata;
307 	}
308 
309 	err = ks8995_reset(ks);
310 	if (err)
311 		goto err_drvdata;
312 
313 	err = sysfs_create_bin_file(&spi->dev.kobj, &ks8995_registers_attr);
314 	if (err) {
315 		dev_err(&spi->dev, "unable to create sysfs file, err=%d\n",
316 				    err);
317 		goto err_drvdata;
318 	}
319 
320 	dev_info(&spi->dev, "KS89%02X device found, Chip ID:%01x, "
321 			"Revision:%01x\n", ids[0],
322 			get_chip_id(ids[1]), get_chip_rev(ids[1]));
323 
324 	return 0;
325 
326 err_drvdata:
327 	kfree(ks);
328 	return err;
329 }
330 
331 static int ks8995_remove(struct spi_device *spi)
332 {
333 	struct ks8995_data      *ks8995;
334 
335 	ks8995 = spi_get_drvdata(spi);
336 	sysfs_remove_bin_file(&spi->dev.kobj, &ks8995_registers_attr);
337 
338 	kfree(ks8995);
339 
340 	return 0;
341 }
342 
343 /* ------------------------------------------------------------------------ */
344 
345 static struct spi_driver ks8995_driver = {
346 	.driver = {
347 		.name	    = "spi-ks8995",
348 		.owner	   = THIS_MODULE,
349 	},
350 	.probe	  = ks8995_probe,
351 	.remove	  = ks8995_remove,
352 };
353 
354 module_spi_driver(ks8995_driver);
355 
356 MODULE_DESCRIPTION(DRV_DESC);
357 MODULE_VERSION(DRV_VERSION);
358 MODULE_AUTHOR("Gabor Juhos <juhosg at openwrt.org>");
359 MODULE_LICENSE("GPL v2");
360