100db8189SAndy Fleming /* 200db8189SAndy Fleming * drivers/net/phy/qsemi.c 300db8189SAndy Fleming * 400db8189SAndy Fleming * Driver for Quality Semiconductor PHYs 500db8189SAndy Fleming * 600db8189SAndy Fleming * Author: Andy Fleming 700db8189SAndy Fleming * 800db8189SAndy Fleming * Copyright (c) 2004 Freescale Semiconductor, Inc. 900db8189SAndy Fleming * 1000db8189SAndy Fleming * This program is free software; you can redistribute it and/or modify it 1100db8189SAndy Fleming * under the terms of the GNU General Public License as published by the 1200db8189SAndy Fleming * Free Software Foundation; either version 2 of the License, or (at your 1300db8189SAndy Fleming * option) any later version. 1400db8189SAndy Fleming * 1500db8189SAndy Fleming */ 1600db8189SAndy Fleming #include <linux/kernel.h> 1700db8189SAndy Fleming #include <linux/string.h> 1800db8189SAndy Fleming #include <linux/errno.h> 1900db8189SAndy Fleming #include <linux/unistd.h> 2000db8189SAndy Fleming #include <linux/interrupt.h> 2100db8189SAndy Fleming #include <linux/init.h> 2200db8189SAndy Fleming #include <linux/delay.h> 2300db8189SAndy Fleming #include <linux/netdevice.h> 2400db8189SAndy Fleming #include <linux/etherdevice.h> 2500db8189SAndy Fleming #include <linux/skbuff.h> 2600db8189SAndy Fleming #include <linux/spinlock.h> 2700db8189SAndy Fleming #include <linux/mm.h> 2800db8189SAndy Fleming #include <linux/module.h> 2900db8189SAndy Fleming #include <linux/mii.h> 3000db8189SAndy Fleming #include <linux/ethtool.h> 3100db8189SAndy Fleming #include <linux/phy.h> 3200db8189SAndy Fleming 3300db8189SAndy Fleming #include <asm/io.h> 3400db8189SAndy Fleming #include <asm/irq.h> 357c0f6ba6SLinus Torvalds #include <linux/uaccess.h> 3600db8189SAndy Fleming 3700db8189SAndy Fleming /* ------------------------------------------------------------------------- */ 3800db8189SAndy Fleming /* The Quality Semiconductor QS6612 is used on the RPX CLLF */ 3900db8189SAndy Fleming 4000db8189SAndy Fleming /* register definitions */ 4100db8189SAndy Fleming 4200db8189SAndy Fleming #define MII_QS6612_MCR 17 /* Mode Control Register */ 4300db8189SAndy Fleming #define MII_QS6612_FTR 27 /* Factory Test Register */ 4400db8189SAndy Fleming #define MII_QS6612_MCO 28 /* Misc. Control Register */ 4500db8189SAndy Fleming #define MII_QS6612_ISR 29 /* Interrupt Source Register */ 4600db8189SAndy Fleming #define MII_QS6612_IMR 30 /* Interrupt Mask Register */ 4700db8189SAndy Fleming #define MII_QS6612_IMR_INIT 0x003a 4800db8189SAndy Fleming #define MII_QS6612_PCR 31 /* 100BaseTx PHY Control Reg. */ 4900db8189SAndy Fleming 5000db8189SAndy Fleming #define QS6612_PCR_AN_COMPLETE 0x1000 5100db8189SAndy Fleming #define QS6612_PCR_RLBEN 0x0200 5200db8189SAndy Fleming #define QS6612_PCR_DCREN 0x0100 5300db8189SAndy Fleming #define QS6612_PCR_4B5BEN 0x0040 5400db8189SAndy Fleming #define QS6612_PCR_TX_ISOLATE 0x0020 5500db8189SAndy Fleming #define QS6612_PCR_MLT3_DIS 0x0002 5600db8189SAndy Fleming #define QS6612_PCR_SCRM_DESCRM 0x0001 5700db8189SAndy Fleming 5800db8189SAndy Fleming MODULE_DESCRIPTION("Quality Semiconductor PHY driver"); 5900db8189SAndy Fleming MODULE_AUTHOR("Andy Fleming"); 6000db8189SAndy Fleming MODULE_LICENSE("GPL"); 6100db8189SAndy Fleming 6200db8189SAndy Fleming /* Returns 0, unless there's a write error */ 6300db8189SAndy Fleming static int qs6612_config_init(struct phy_device *phydev) 6400db8189SAndy Fleming { 6500db8189SAndy Fleming /* The PHY powers up isolated on the RPX, 6600db8189SAndy Fleming * so send a command to allow operation. 6700db8189SAndy Fleming * XXX - My docs indicate this should be 0x0940 6800db8189SAndy Fleming * ...or something. The current value sets three 6900db8189SAndy Fleming * reserved bits, bit 11, which specifies it should be 7000db8189SAndy Fleming * set to one, bit 10, which specifies it should be set 7100db8189SAndy Fleming * to 0, and bit 7, which doesn't specify. However, my 7200db8189SAndy Fleming * docs are preliminary, and I will leave it like this 7300db8189SAndy Fleming * until someone more knowledgable corrects me or it. 7400db8189SAndy Fleming * -- Andy Fleming 7500db8189SAndy Fleming */ 7600db8189SAndy Fleming return phy_write(phydev, MII_QS6612_PCR, 0x0dc0); 7700db8189SAndy Fleming } 7800db8189SAndy Fleming 7900db8189SAndy Fleming static int qs6612_ack_interrupt(struct phy_device *phydev) 8000db8189SAndy Fleming { 8100db8189SAndy Fleming int err; 8200db8189SAndy Fleming 8300db8189SAndy Fleming err = phy_read(phydev, MII_QS6612_ISR); 8400db8189SAndy Fleming 8500db8189SAndy Fleming if (err < 0) 8600db8189SAndy Fleming return err; 8700db8189SAndy Fleming 8800db8189SAndy Fleming err = phy_read(phydev, MII_BMSR); 8900db8189SAndy Fleming 9000db8189SAndy Fleming if (err < 0) 9100db8189SAndy Fleming return err; 9200db8189SAndy Fleming 9300db8189SAndy Fleming err = phy_read(phydev, MII_EXPANSION); 9400db8189SAndy Fleming 9500db8189SAndy Fleming if (err < 0) 9600db8189SAndy Fleming return err; 9700db8189SAndy Fleming 9800db8189SAndy Fleming return 0; 9900db8189SAndy Fleming } 10000db8189SAndy Fleming 10100db8189SAndy Fleming static int qs6612_config_intr(struct phy_device *phydev) 10200db8189SAndy Fleming { 10300db8189SAndy Fleming int err; 10400db8189SAndy Fleming if (phydev->interrupts == PHY_INTERRUPT_ENABLED) 10500db8189SAndy Fleming err = phy_write(phydev, MII_QS6612_IMR, 10600db8189SAndy Fleming MII_QS6612_IMR_INIT); 10700db8189SAndy Fleming else 10800db8189SAndy Fleming err = phy_write(phydev, MII_QS6612_IMR, 0); 10900db8189SAndy Fleming 11000db8189SAndy Fleming return err; 11100db8189SAndy Fleming 11200db8189SAndy Fleming } 11300db8189SAndy Fleming 114116dffa0SJohan Hovold static struct phy_driver qs6612_driver[] = { { 11500db8189SAndy Fleming .phy_id = 0x00181440, 11600db8189SAndy Fleming .name = "QS6612", 11700db8189SAndy Fleming .phy_id_mask = 0xfffffff0, 11800db8189SAndy Fleming .features = PHY_BASIC_FEATURES, 11900db8189SAndy Fleming .flags = PHY_HAS_INTERRUPT, 12000db8189SAndy Fleming .config_init = qs6612_config_init, 12100db8189SAndy Fleming .config_aneg = genphy_config_aneg, 12200db8189SAndy Fleming .read_status = genphy_read_status, 12300db8189SAndy Fleming .ack_interrupt = qs6612_ack_interrupt, 12400db8189SAndy Fleming .config_intr = qs6612_config_intr, 125116dffa0SJohan Hovold } }; 12600db8189SAndy Fleming 127116dffa0SJohan Hovold module_phy_driver(qs6612_driver); 1284e4f10f6SDavid Woodhouse 129cf93c945SUwe Kleine-König static struct mdio_device_id __maybe_unused qs6612_tbl[] = { 1304e4f10f6SDavid Woodhouse { 0x00181440, 0xfffffff0 }, 1314e4f10f6SDavid Woodhouse { } 1324e4f10f6SDavid Woodhouse }; 1334e4f10f6SDavid Woodhouse 1344e4f10f6SDavid Woodhouse MODULE_DEVICE_TABLE(mdio, qs6612_tbl); 135