1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "sfp.h" 24 #include "swphy.h" 25 26 #define SUPPORTED_INTERFACES \ 27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 29 #define ADVERTISED_INTERFACES \ 30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 32 33 enum { 34 PHYLINK_DISABLE_STOPPED, 35 PHYLINK_DISABLE_LINK, 36 PHYLINK_DISABLE_MAC_WOL, 37 }; 38 39 /** 40 * struct phylink - internal data type for phylink 41 */ 42 struct phylink { 43 /* private: */ 44 struct net_device *netdev; 45 const struct phylink_mac_ops *mac_ops; 46 struct phylink_config *config; 47 struct phylink_pcs *pcs; 48 struct device *dev; 49 unsigned int old_link_state:1; 50 51 unsigned long phylink_disable_state; /* bitmask of disables */ 52 struct phy_device *phydev; 53 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 54 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 55 u8 cur_link_an_mode; 56 u8 link_port; /* The current non-phy ethtool port */ 57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 58 59 /* The link configuration settings */ 60 struct phylink_link_state link_config; 61 62 /* The current settings */ 63 phy_interface_t cur_interface; 64 65 struct gpio_desc *link_gpio; 66 unsigned int link_irq; 67 struct timer_list link_poll; 68 void (*get_fixed_state)(struct net_device *dev, 69 struct phylink_link_state *s); 70 71 struct mutex state_mutex; 72 struct phylink_link_state phy_state; 73 struct work_struct resolve; 74 75 bool mac_link_dropped; 76 bool using_mac_select_pcs; 77 78 struct sfp_bus *sfp_bus; 79 bool sfp_may_have_phy; 80 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 81 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 82 u8 sfp_port; 83 }; 84 85 #define phylink_printk(level, pl, fmt, ...) \ 86 do { \ 87 if ((pl)->config->type == PHYLINK_NETDEV) \ 88 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 89 else if ((pl)->config->type == PHYLINK_DEV) \ 90 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 91 } while (0) 92 93 #define phylink_err(pl, fmt, ...) \ 94 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 95 #define phylink_warn(pl, fmt, ...) \ 96 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 97 #define phylink_info(pl, fmt, ...) \ 98 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 99 #if defined(CONFIG_DYNAMIC_DEBUG) 100 #define phylink_dbg(pl, fmt, ...) \ 101 do { \ 102 if ((pl)->config->type == PHYLINK_NETDEV) \ 103 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 104 else if ((pl)->config->type == PHYLINK_DEV) \ 105 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 106 } while (0) 107 #elif defined(DEBUG) 108 #define phylink_dbg(pl, fmt, ...) \ 109 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 110 #else 111 #define phylink_dbg(pl, fmt, ...) \ 112 ({ \ 113 if (0) \ 114 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 115 }) 116 #endif 117 118 /** 119 * phylink_set_port_modes() - set the port type modes in the ethtool mask 120 * @mask: ethtool link mode mask 121 * 122 * Sets all the port type modes in the ethtool mask. MAC drivers should 123 * use this in their 'validate' callback. 124 */ 125 void phylink_set_port_modes(unsigned long *mask) 126 { 127 phylink_set(mask, TP); 128 phylink_set(mask, AUI); 129 phylink_set(mask, MII); 130 phylink_set(mask, FIBRE); 131 phylink_set(mask, BNC); 132 phylink_set(mask, Backplane); 133 } 134 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 135 136 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 137 { 138 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 139 140 phylink_set_port_modes(tmp); 141 phylink_set(tmp, Autoneg); 142 phylink_set(tmp, Pause); 143 phylink_set(tmp, Asym_Pause); 144 145 return linkmode_subset(linkmode, tmp); 146 } 147 148 static const char *phylink_an_mode_str(unsigned int mode) 149 { 150 static const char *modestr[] = { 151 [MLO_AN_PHY] = "phy", 152 [MLO_AN_FIXED] = "fixed", 153 [MLO_AN_INBAND] = "inband", 154 }; 155 156 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 157 } 158 159 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 160 { 161 switch (interface) { 162 case PHY_INTERFACE_MODE_SGMII: 163 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 164 return 1250; 165 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 166 return 3125; 167 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 168 return 5156; 169 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 170 return 10313; 171 default: 172 return 0; 173 } 174 } 175 176 /** 177 * phylink_interface_max_speed() - get the maximum speed of a phy interface 178 * @interface: phy interface mode defined by &typedef phy_interface_t 179 * 180 * Determine the maximum speed of a phy interface. This is intended to help 181 * determine the correct speed to pass to the MAC when the phy is performing 182 * rate matching. 183 * 184 * Return: The maximum speed of @interface 185 */ 186 static int phylink_interface_max_speed(phy_interface_t interface) 187 { 188 switch (interface) { 189 case PHY_INTERFACE_MODE_100BASEX: 190 case PHY_INTERFACE_MODE_REVRMII: 191 case PHY_INTERFACE_MODE_RMII: 192 case PHY_INTERFACE_MODE_SMII: 193 case PHY_INTERFACE_MODE_REVMII: 194 case PHY_INTERFACE_MODE_MII: 195 return SPEED_100; 196 197 case PHY_INTERFACE_MODE_TBI: 198 case PHY_INTERFACE_MODE_MOCA: 199 case PHY_INTERFACE_MODE_RTBI: 200 case PHY_INTERFACE_MODE_1000BASEX: 201 case PHY_INTERFACE_MODE_1000BASEKX: 202 case PHY_INTERFACE_MODE_TRGMII: 203 case PHY_INTERFACE_MODE_RGMII_TXID: 204 case PHY_INTERFACE_MODE_RGMII_RXID: 205 case PHY_INTERFACE_MODE_RGMII_ID: 206 case PHY_INTERFACE_MODE_RGMII: 207 case PHY_INTERFACE_MODE_QSGMII: 208 case PHY_INTERFACE_MODE_SGMII: 209 case PHY_INTERFACE_MODE_GMII: 210 return SPEED_1000; 211 212 case PHY_INTERFACE_MODE_2500BASEX: 213 return SPEED_2500; 214 215 case PHY_INTERFACE_MODE_5GBASER: 216 return SPEED_5000; 217 218 case PHY_INTERFACE_MODE_XGMII: 219 case PHY_INTERFACE_MODE_RXAUI: 220 case PHY_INTERFACE_MODE_XAUI: 221 case PHY_INTERFACE_MODE_10GBASER: 222 case PHY_INTERFACE_MODE_10GKR: 223 case PHY_INTERFACE_MODE_USXGMII: 224 case PHY_INTERFACE_MODE_QUSGMII: 225 return SPEED_10000; 226 227 case PHY_INTERFACE_MODE_25GBASER: 228 return SPEED_25000; 229 230 case PHY_INTERFACE_MODE_XLGMII: 231 return SPEED_40000; 232 233 case PHY_INTERFACE_MODE_INTERNAL: 234 case PHY_INTERFACE_MODE_NA: 235 case PHY_INTERFACE_MODE_MAX: 236 /* No idea! Garbage in, unknown out */ 237 return SPEED_UNKNOWN; 238 } 239 240 /* If we get here, someone forgot to add an interface mode above */ 241 WARN_ON_ONCE(1); 242 return SPEED_UNKNOWN; 243 } 244 245 /** 246 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 247 * @linkmodes: ethtool linkmode mask (must be already initialised) 248 * @caps: bitmask of MAC capabilities 249 * 250 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 251 * supported by the @caps. @linkmodes must have been initialised previously. 252 */ 253 void phylink_caps_to_linkmodes(unsigned long *linkmodes, unsigned long caps) 254 { 255 if (caps & MAC_SYM_PAUSE) 256 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 257 258 if (caps & MAC_ASYM_PAUSE) 259 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 260 261 if (caps & MAC_10HD) { 262 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes); 263 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes); 264 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes); 265 } 266 267 if (caps & MAC_10FD) { 268 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes); 269 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes); 270 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes); 271 } 272 273 if (caps & MAC_100HD) { 274 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes); 275 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes); 276 } 277 278 if (caps & MAC_100FD) { 279 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes); 280 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes); 281 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes); 282 } 283 284 if (caps & MAC_1000HD) 285 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes); 286 287 if (caps & MAC_1000FD) { 288 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes); 289 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes); 290 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes); 291 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes); 292 } 293 294 if (caps & MAC_2500FD) { 295 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes); 296 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes); 297 } 298 299 if (caps & MAC_5000FD) 300 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes); 301 302 if (caps & MAC_10000FD) { 303 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes); 304 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes); 305 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes); 306 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes); 307 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes); 308 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes); 309 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes); 310 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes); 311 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes); 312 } 313 314 if (caps & MAC_25000FD) { 315 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes); 316 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes); 317 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes); 318 } 319 320 if (caps & MAC_40000FD) { 321 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes); 322 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes); 323 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes); 324 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes); 325 } 326 327 if (caps & MAC_50000FD) { 328 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes); 329 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes); 330 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes); 331 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes); 332 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes); 333 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes); 334 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 335 linkmodes); 336 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes); 337 } 338 339 if (caps & MAC_56000FD) { 340 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes); 341 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes); 342 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes); 343 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes); 344 } 345 346 if (caps & MAC_100000FD) { 347 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes); 348 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes); 349 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes); 350 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 351 linkmodes); 352 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes); 353 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes); 354 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes); 355 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 356 linkmodes); 357 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes); 358 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes); 359 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes); 360 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 361 linkmodes); 362 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes); 363 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes); 364 } 365 366 if (caps & MAC_200000FD) { 367 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes); 368 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes); 369 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 370 linkmodes); 371 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes); 372 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes); 373 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes); 374 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes); 375 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 376 linkmodes); 377 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes); 378 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes); 379 } 380 381 if (caps & MAC_400000FD) { 382 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes); 383 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes); 384 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 385 linkmodes); 386 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes); 387 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes); 388 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes); 389 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes); 390 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 391 linkmodes); 392 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes); 393 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes); 394 } 395 } 396 EXPORT_SYMBOL_GPL(phylink_caps_to_linkmodes); 397 398 static struct { 399 unsigned long mask; 400 int speed; 401 unsigned int duplex; 402 } phylink_caps_params[] = { 403 { MAC_400000FD, SPEED_400000, DUPLEX_FULL }, 404 { MAC_200000FD, SPEED_200000, DUPLEX_FULL }, 405 { MAC_100000FD, SPEED_100000, DUPLEX_FULL }, 406 { MAC_56000FD, SPEED_56000, DUPLEX_FULL }, 407 { MAC_50000FD, SPEED_50000, DUPLEX_FULL }, 408 { MAC_40000FD, SPEED_40000, DUPLEX_FULL }, 409 { MAC_25000FD, SPEED_25000, DUPLEX_FULL }, 410 { MAC_20000FD, SPEED_20000, DUPLEX_FULL }, 411 { MAC_10000FD, SPEED_10000, DUPLEX_FULL }, 412 { MAC_5000FD, SPEED_5000, DUPLEX_FULL }, 413 { MAC_2500FD, SPEED_2500, DUPLEX_FULL }, 414 { MAC_1000FD, SPEED_1000, DUPLEX_FULL }, 415 { MAC_1000HD, SPEED_1000, DUPLEX_HALF }, 416 { MAC_100FD, SPEED_100, DUPLEX_FULL }, 417 { MAC_100HD, SPEED_100, DUPLEX_HALF }, 418 { MAC_10FD, SPEED_10, DUPLEX_FULL }, 419 { MAC_10HD, SPEED_10, DUPLEX_HALF }, 420 }; 421 422 /** 423 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 424 * @speed: the speed to search for 425 * @duplex: the duplex to search for 426 * 427 * Find the mac capability for a given speed and duplex. 428 * 429 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 430 * there were no matches. 431 */ 432 static unsigned long phylink_cap_from_speed_duplex(int speed, 433 unsigned int duplex) 434 { 435 int i; 436 437 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 438 if (speed == phylink_caps_params[i].speed && 439 duplex == phylink_caps_params[i].duplex) 440 return phylink_caps_params[i].mask; 441 } 442 443 return 0; 444 } 445 446 /** 447 * phylink_get_capabilities() - get capabilities for a given MAC 448 * @interface: phy interface mode defined by &typedef phy_interface_t 449 * @mac_capabilities: bitmask of MAC capabilities 450 * @rate_matching: type of rate matching being performed 451 * 452 * Get the MAC capabilities that are supported by the @interface mode and 453 * @mac_capabilities. 454 */ 455 unsigned long phylink_get_capabilities(phy_interface_t interface, 456 unsigned long mac_capabilities, 457 int rate_matching) 458 { 459 int max_speed = phylink_interface_max_speed(interface); 460 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 461 unsigned long matched_caps = 0; 462 463 switch (interface) { 464 case PHY_INTERFACE_MODE_USXGMII: 465 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD; 466 fallthrough; 467 468 case PHY_INTERFACE_MODE_RGMII_TXID: 469 case PHY_INTERFACE_MODE_RGMII_RXID: 470 case PHY_INTERFACE_MODE_RGMII_ID: 471 case PHY_INTERFACE_MODE_RGMII: 472 case PHY_INTERFACE_MODE_QSGMII: 473 case PHY_INTERFACE_MODE_QUSGMII: 474 case PHY_INTERFACE_MODE_SGMII: 475 case PHY_INTERFACE_MODE_GMII: 476 caps |= MAC_1000HD | MAC_1000FD; 477 fallthrough; 478 479 case PHY_INTERFACE_MODE_REVRMII: 480 case PHY_INTERFACE_MODE_RMII: 481 case PHY_INTERFACE_MODE_SMII: 482 case PHY_INTERFACE_MODE_REVMII: 483 case PHY_INTERFACE_MODE_MII: 484 caps |= MAC_10HD | MAC_10FD; 485 fallthrough; 486 487 case PHY_INTERFACE_MODE_100BASEX: 488 caps |= MAC_100HD | MAC_100FD; 489 break; 490 491 case PHY_INTERFACE_MODE_TBI: 492 case PHY_INTERFACE_MODE_MOCA: 493 case PHY_INTERFACE_MODE_RTBI: 494 case PHY_INTERFACE_MODE_1000BASEX: 495 caps |= MAC_1000HD; 496 fallthrough; 497 case PHY_INTERFACE_MODE_1000BASEKX: 498 case PHY_INTERFACE_MODE_TRGMII: 499 caps |= MAC_1000FD; 500 break; 501 502 case PHY_INTERFACE_MODE_2500BASEX: 503 caps |= MAC_2500FD; 504 break; 505 506 case PHY_INTERFACE_MODE_5GBASER: 507 caps |= MAC_5000FD; 508 break; 509 510 case PHY_INTERFACE_MODE_XGMII: 511 case PHY_INTERFACE_MODE_RXAUI: 512 case PHY_INTERFACE_MODE_XAUI: 513 case PHY_INTERFACE_MODE_10GBASER: 514 case PHY_INTERFACE_MODE_10GKR: 515 caps |= MAC_10000FD; 516 break; 517 518 case PHY_INTERFACE_MODE_25GBASER: 519 caps |= MAC_25000FD; 520 break; 521 522 case PHY_INTERFACE_MODE_XLGMII: 523 caps |= MAC_40000FD; 524 break; 525 526 case PHY_INTERFACE_MODE_INTERNAL: 527 caps |= ~0; 528 break; 529 530 case PHY_INTERFACE_MODE_NA: 531 case PHY_INTERFACE_MODE_MAX: 532 break; 533 } 534 535 switch (rate_matching) { 536 case RATE_MATCH_OPEN_LOOP: 537 /* TODO */ 538 fallthrough; 539 case RATE_MATCH_NONE: 540 matched_caps = 0; 541 break; 542 case RATE_MATCH_PAUSE: { 543 /* The MAC must support asymmetric pause towards the local 544 * device for this. We could allow just symmetric pause, but 545 * then we might have to renegotiate if the link partner 546 * doesn't support pause. This is because there's no way to 547 * accept pause frames without transmitting them if we only 548 * support symmetric pause. 549 */ 550 if (!(mac_capabilities & MAC_SYM_PAUSE) || 551 !(mac_capabilities & MAC_ASYM_PAUSE)) 552 break; 553 554 /* We can't adapt if the MAC doesn't support the interface's 555 * max speed at full duplex. 556 */ 557 if (mac_capabilities & 558 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) { 559 /* Although a duplex-matching phy might exist, we 560 * conservatively remove these modes because the MAC 561 * will not be aware of the half-duplex nature of the 562 * link. 563 */ 564 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 565 matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD); 566 } 567 break; 568 } 569 case RATE_MATCH_CRS: 570 /* The MAC must support half duplex at the interface's max 571 * speed. 572 */ 573 if (mac_capabilities & 574 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 575 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 576 matched_caps &= mac_capabilities; 577 } 578 break; 579 } 580 581 return (caps & mac_capabilities) | matched_caps; 582 } 583 EXPORT_SYMBOL_GPL(phylink_get_capabilities); 584 585 /** 586 * phylink_validate_mask_caps() - Restrict link modes based on caps 587 * @supported: ethtool bitmask for supported link modes. 588 * @state: pointer to a &struct phylink_link_state. 589 * @mac_capabilities: bitmask of MAC capabilities 590 * 591 * Calculate the supported link modes based on @mac_capabilities, and restrict 592 * @supported and @state based on that. Use this function if your capabiliies 593 * aren't constant, such as if they vary depending on the interface. 594 */ 595 void phylink_validate_mask_caps(unsigned long *supported, 596 struct phylink_link_state *state, 597 unsigned long mac_capabilities) 598 { 599 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 600 unsigned long caps; 601 602 phylink_set_port_modes(mask); 603 phylink_set(mask, Autoneg); 604 caps = phylink_get_capabilities(state->interface, mac_capabilities, 605 state->rate_matching); 606 phylink_caps_to_linkmodes(mask, caps); 607 608 linkmode_and(supported, supported, mask); 609 linkmode_and(state->advertising, state->advertising, mask); 610 } 611 EXPORT_SYMBOL_GPL(phylink_validate_mask_caps); 612 613 /** 614 * phylink_generic_validate() - generic validate() callback implementation 615 * @config: a pointer to a &struct phylink_config. 616 * @supported: ethtool bitmask for supported link modes. 617 * @state: a pointer to a &struct phylink_link_state. 618 * 619 * Generic implementation of the validate() callback that MAC drivers can 620 * use when they pass the range of supported interfaces and MAC capabilities. 621 */ 622 void phylink_generic_validate(struct phylink_config *config, 623 unsigned long *supported, 624 struct phylink_link_state *state) 625 { 626 phylink_validate_mask_caps(supported, state, config->mac_capabilities); 627 } 628 EXPORT_SYMBOL_GPL(phylink_generic_validate); 629 630 static int phylink_validate_mac_and_pcs(struct phylink *pl, 631 unsigned long *supported, 632 struct phylink_link_state *state) 633 { 634 struct phylink_pcs *pcs; 635 int ret; 636 637 /* Get the PCS for this interface mode */ 638 if (pl->using_mac_select_pcs) { 639 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 640 if (IS_ERR(pcs)) 641 return PTR_ERR(pcs); 642 } else { 643 pcs = pl->pcs; 644 } 645 646 if (pcs) { 647 /* The PCS, if present, must be setup before phylink_create() 648 * has been called. If the ops is not initialised, print an 649 * error and backtrace rather than oopsing the kernel. 650 */ 651 if (!pcs->ops) { 652 phylink_err(pl, "interface %s: uninitialised PCS\n", 653 phy_modes(state->interface)); 654 dump_stack(); 655 return -EINVAL; 656 } 657 658 /* Validate the link parameters with the PCS */ 659 if (pcs->ops->pcs_validate) { 660 ret = pcs->ops->pcs_validate(pcs, supported, state); 661 if (ret < 0 || phylink_is_empty_linkmode(supported)) 662 return -EINVAL; 663 664 /* Ensure the advertising mask is a subset of the 665 * supported mask. 666 */ 667 linkmode_and(state->advertising, state->advertising, 668 supported); 669 } 670 } 671 672 /* Then validate the link parameters with the MAC */ 673 if (pl->mac_ops->validate) 674 pl->mac_ops->validate(pl->config, supported, state); 675 else 676 phylink_generic_validate(pl->config, supported, state); 677 678 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 679 } 680 681 static int phylink_validate_mask(struct phylink *pl, unsigned long *supported, 682 struct phylink_link_state *state, 683 const unsigned long *interfaces) 684 { 685 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 686 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 687 __ETHTOOL_DECLARE_LINK_MODE_MASK(s); 688 struct phylink_link_state t; 689 int intf; 690 691 for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) { 692 if (test_bit(intf, interfaces)) { 693 linkmode_copy(s, supported); 694 695 t = *state; 696 t.interface = intf; 697 if (!phylink_validate_mac_and_pcs(pl, s, &t)) { 698 linkmode_or(all_s, all_s, s); 699 linkmode_or(all_adv, all_adv, t.advertising); 700 } 701 } 702 } 703 704 linkmode_copy(supported, all_s); 705 linkmode_copy(state->advertising, all_adv); 706 707 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 708 } 709 710 static int phylink_validate(struct phylink *pl, unsigned long *supported, 711 struct phylink_link_state *state) 712 { 713 const unsigned long *interfaces = pl->config->supported_interfaces; 714 715 if (state->interface == PHY_INTERFACE_MODE_NA) 716 return phylink_validate_mask(pl, supported, state, interfaces); 717 718 if (!test_bit(state->interface, interfaces)) 719 return -EINVAL; 720 721 return phylink_validate_mac_and_pcs(pl, supported, state); 722 } 723 724 static int phylink_parse_fixedlink(struct phylink *pl, 725 const struct fwnode_handle *fwnode) 726 { 727 struct fwnode_handle *fixed_node; 728 bool pause, asym_pause, autoneg; 729 const struct phy_setting *s; 730 struct gpio_desc *desc; 731 u32 speed; 732 int ret; 733 734 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 735 if (fixed_node) { 736 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 737 738 pl->link_config.speed = speed; 739 pl->link_config.duplex = DUPLEX_HALF; 740 741 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 742 pl->link_config.duplex = DUPLEX_FULL; 743 744 /* We treat the "pause" and "asym-pause" terminology as 745 * defining the link partner's ability. 746 */ 747 if (fwnode_property_read_bool(fixed_node, "pause")) 748 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 749 pl->link_config.lp_advertising); 750 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 751 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 752 pl->link_config.lp_advertising); 753 754 if (ret == 0) { 755 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 756 GPIOD_IN, "?"); 757 758 if (!IS_ERR(desc)) 759 pl->link_gpio = desc; 760 else if (desc == ERR_PTR(-EPROBE_DEFER)) 761 ret = -EPROBE_DEFER; 762 } 763 fwnode_handle_put(fixed_node); 764 765 if (ret) 766 return ret; 767 } else { 768 u32 prop[5]; 769 770 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 771 NULL, 0); 772 if (ret != ARRAY_SIZE(prop)) { 773 phylink_err(pl, "broken fixed-link?\n"); 774 return -EINVAL; 775 } 776 777 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 778 prop, ARRAY_SIZE(prop)); 779 if (!ret) { 780 pl->link_config.duplex = prop[1] ? 781 DUPLEX_FULL : DUPLEX_HALF; 782 pl->link_config.speed = prop[2]; 783 if (prop[3]) 784 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 785 pl->link_config.lp_advertising); 786 if (prop[4]) 787 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 788 pl->link_config.lp_advertising); 789 } 790 } 791 792 if (pl->link_config.speed > SPEED_1000 && 793 pl->link_config.duplex != DUPLEX_FULL) 794 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 795 pl->link_config.speed); 796 797 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 798 linkmode_copy(pl->link_config.advertising, pl->supported); 799 phylink_validate(pl, pl->supported, &pl->link_config); 800 801 pause = phylink_test(pl->supported, Pause); 802 asym_pause = phylink_test(pl->supported, Asym_Pause); 803 autoneg = phylink_test(pl->supported, Autoneg); 804 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, 805 pl->supported, true); 806 linkmode_zero(pl->supported); 807 phylink_set(pl->supported, MII); 808 809 if (pause) 810 phylink_set(pl->supported, Pause); 811 812 if (asym_pause) 813 phylink_set(pl->supported, Asym_Pause); 814 815 if (autoneg) 816 phylink_set(pl->supported, Autoneg); 817 818 if (s) { 819 __set_bit(s->bit, pl->supported); 820 __set_bit(s->bit, pl->link_config.lp_advertising); 821 } else { 822 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 823 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 824 pl->link_config.speed); 825 } 826 827 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 828 pl->supported); 829 830 pl->link_config.link = 1; 831 pl->link_config.an_complete = 1; 832 833 return 0; 834 } 835 836 static int phylink_parse_mode(struct phylink *pl, 837 const struct fwnode_handle *fwnode) 838 { 839 struct fwnode_handle *dn; 840 const char *managed; 841 842 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 843 if (dn || fwnode_property_present(fwnode, "fixed-link")) 844 pl->cfg_link_an_mode = MLO_AN_FIXED; 845 fwnode_handle_put(dn); 846 847 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 848 strcmp(managed, "in-band-status") == 0) || 849 pl->config->ovr_an_inband) { 850 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 851 phylink_err(pl, 852 "can't use both fixed-link and in-band-status\n"); 853 return -EINVAL; 854 } 855 856 linkmode_zero(pl->supported); 857 phylink_set(pl->supported, MII); 858 phylink_set(pl->supported, Autoneg); 859 phylink_set(pl->supported, Asym_Pause); 860 phylink_set(pl->supported, Pause); 861 pl->cfg_link_an_mode = MLO_AN_INBAND; 862 863 switch (pl->link_config.interface) { 864 case PHY_INTERFACE_MODE_SGMII: 865 case PHY_INTERFACE_MODE_QSGMII: 866 case PHY_INTERFACE_MODE_QUSGMII: 867 case PHY_INTERFACE_MODE_RGMII: 868 case PHY_INTERFACE_MODE_RGMII_ID: 869 case PHY_INTERFACE_MODE_RGMII_RXID: 870 case PHY_INTERFACE_MODE_RGMII_TXID: 871 case PHY_INTERFACE_MODE_RTBI: 872 phylink_set(pl->supported, 10baseT_Half); 873 phylink_set(pl->supported, 10baseT_Full); 874 phylink_set(pl->supported, 100baseT_Half); 875 phylink_set(pl->supported, 100baseT_Full); 876 phylink_set(pl->supported, 1000baseT_Half); 877 phylink_set(pl->supported, 1000baseT_Full); 878 break; 879 880 case PHY_INTERFACE_MODE_1000BASEX: 881 phylink_set(pl->supported, 1000baseX_Full); 882 break; 883 884 case PHY_INTERFACE_MODE_2500BASEX: 885 phylink_set(pl->supported, 2500baseX_Full); 886 break; 887 888 case PHY_INTERFACE_MODE_5GBASER: 889 phylink_set(pl->supported, 5000baseT_Full); 890 break; 891 892 case PHY_INTERFACE_MODE_25GBASER: 893 phylink_set(pl->supported, 25000baseCR_Full); 894 phylink_set(pl->supported, 25000baseKR_Full); 895 phylink_set(pl->supported, 25000baseSR_Full); 896 fallthrough; 897 case PHY_INTERFACE_MODE_USXGMII: 898 case PHY_INTERFACE_MODE_10GKR: 899 case PHY_INTERFACE_MODE_10GBASER: 900 phylink_set(pl->supported, 10baseT_Half); 901 phylink_set(pl->supported, 10baseT_Full); 902 phylink_set(pl->supported, 100baseT_Half); 903 phylink_set(pl->supported, 100baseT_Full); 904 phylink_set(pl->supported, 1000baseT_Half); 905 phylink_set(pl->supported, 1000baseT_Full); 906 phylink_set(pl->supported, 1000baseX_Full); 907 phylink_set(pl->supported, 1000baseKX_Full); 908 phylink_set(pl->supported, 2500baseT_Full); 909 phylink_set(pl->supported, 2500baseX_Full); 910 phylink_set(pl->supported, 5000baseT_Full); 911 phylink_set(pl->supported, 10000baseT_Full); 912 phylink_set(pl->supported, 10000baseKR_Full); 913 phylink_set(pl->supported, 10000baseKX4_Full); 914 phylink_set(pl->supported, 10000baseCR_Full); 915 phylink_set(pl->supported, 10000baseSR_Full); 916 phylink_set(pl->supported, 10000baseLR_Full); 917 phylink_set(pl->supported, 10000baseLRM_Full); 918 phylink_set(pl->supported, 10000baseER_Full); 919 break; 920 921 case PHY_INTERFACE_MODE_XLGMII: 922 phylink_set(pl->supported, 25000baseCR_Full); 923 phylink_set(pl->supported, 25000baseKR_Full); 924 phylink_set(pl->supported, 25000baseSR_Full); 925 phylink_set(pl->supported, 40000baseKR4_Full); 926 phylink_set(pl->supported, 40000baseCR4_Full); 927 phylink_set(pl->supported, 40000baseSR4_Full); 928 phylink_set(pl->supported, 40000baseLR4_Full); 929 phylink_set(pl->supported, 50000baseCR2_Full); 930 phylink_set(pl->supported, 50000baseKR2_Full); 931 phylink_set(pl->supported, 50000baseSR2_Full); 932 phylink_set(pl->supported, 50000baseKR_Full); 933 phylink_set(pl->supported, 50000baseSR_Full); 934 phylink_set(pl->supported, 50000baseCR_Full); 935 phylink_set(pl->supported, 50000baseLR_ER_FR_Full); 936 phylink_set(pl->supported, 50000baseDR_Full); 937 phylink_set(pl->supported, 100000baseKR4_Full); 938 phylink_set(pl->supported, 100000baseSR4_Full); 939 phylink_set(pl->supported, 100000baseCR4_Full); 940 phylink_set(pl->supported, 100000baseLR4_ER4_Full); 941 phylink_set(pl->supported, 100000baseKR2_Full); 942 phylink_set(pl->supported, 100000baseSR2_Full); 943 phylink_set(pl->supported, 100000baseCR2_Full); 944 phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full); 945 phylink_set(pl->supported, 100000baseDR2_Full); 946 break; 947 948 default: 949 phylink_err(pl, 950 "incorrect link mode %s for in-band status\n", 951 phy_modes(pl->link_config.interface)); 952 return -EINVAL; 953 } 954 955 linkmode_copy(pl->link_config.advertising, pl->supported); 956 957 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 958 phylink_err(pl, 959 "failed to validate link configuration for in-band status\n"); 960 return -EINVAL; 961 } 962 } 963 964 return 0; 965 } 966 967 static void phylink_apply_manual_flow(struct phylink *pl, 968 struct phylink_link_state *state) 969 { 970 /* If autoneg is disabled, pause AN is also disabled */ 971 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 972 state->advertising)) 973 state->pause &= ~MLO_PAUSE_AN; 974 975 /* Manual configuration of pause modes */ 976 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 977 state->pause = pl->link_config.pause; 978 } 979 980 static void phylink_resolve_an_pause(struct phylink_link_state *state) 981 { 982 bool tx_pause, rx_pause; 983 984 if (state->duplex == DUPLEX_FULL) { 985 linkmode_resolve_pause(state->advertising, 986 state->lp_advertising, 987 &tx_pause, &rx_pause); 988 if (tx_pause) 989 state->pause |= MLO_PAUSE_TX; 990 if (rx_pause) 991 state->pause |= MLO_PAUSE_RX; 992 } 993 } 994 995 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int mode, 996 const struct phylink_link_state *state, 997 bool permit_pause_to_mac) 998 { 999 if (!pcs) 1000 return 0; 1001 1002 return pcs->ops->pcs_config(pcs, mode, state->interface, 1003 state->advertising, permit_pause_to_mac); 1004 } 1005 1006 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int mode, 1007 phy_interface_t interface, int speed, 1008 int duplex) 1009 { 1010 if (pcs && pcs->ops->pcs_link_up) 1011 pcs->ops->pcs_link_up(pcs, mode, interface, speed, duplex); 1012 } 1013 1014 static void phylink_pcs_poll_stop(struct phylink *pl) 1015 { 1016 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 1017 del_timer(&pl->link_poll); 1018 } 1019 1020 static void phylink_pcs_poll_start(struct phylink *pl) 1021 { 1022 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 1023 mod_timer(&pl->link_poll, jiffies + HZ); 1024 } 1025 1026 static void phylink_mac_config(struct phylink *pl, 1027 const struct phylink_link_state *state) 1028 { 1029 phylink_dbg(pl, 1030 "%s: mode=%s/%s/%s/%s/%s adv=%*pb pause=%02x link=%u\n", 1031 __func__, phylink_an_mode_str(pl->cur_link_an_mode), 1032 phy_modes(state->interface), 1033 phy_speed_to_str(state->speed), 1034 phy_duplex_to_str(state->duplex), 1035 phy_rate_matching_to_str(state->rate_matching), 1036 __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising, 1037 state->pause, state->link); 1038 1039 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, state); 1040 } 1041 1042 static void phylink_mac_pcs_an_restart(struct phylink *pl) 1043 { 1044 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1045 pl->link_config.advertising) && 1046 phy_interface_mode_is_8023z(pl->link_config.interface) && 1047 phylink_autoneg_inband(pl->cur_link_an_mode)) { 1048 if (pl->pcs) 1049 pl->pcs->ops->pcs_an_restart(pl->pcs); 1050 else if (pl->config->legacy_pre_march2020) 1051 pl->mac_ops->mac_an_restart(pl->config); 1052 } 1053 } 1054 1055 static void phylink_major_config(struct phylink *pl, bool restart, 1056 const struct phylink_link_state *state) 1057 { 1058 struct phylink_pcs *pcs = NULL; 1059 bool pcs_changed = false; 1060 unsigned int rate_kbd; 1061 int err; 1062 1063 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); 1064 1065 if (pl->using_mac_select_pcs) { 1066 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1067 if (IS_ERR(pcs)) { 1068 phylink_err(pl, 1069 "mac_select_pcs unexpectedly failed: %pe\n", 1070 pcs); 1071 return; 1072 } 1073 1074 pcs_changed = pcs && pl->pcs != pcs; 1075 } 1076 1077 phylink_pcs_poll_stop(pl); 1078 1079 if (pl->mac_ops->mac_prepare) { 1080 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode, 1081 state->interface); 1082 if (err < 0) { 1083 phylink_err(pl, "mac_prepare failed: %pe\n", 1084 ERR_PTR(err)); 1085 return; 1086 } 1087 } 1088 1089 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1090 * for the change. 1091 */ 1092 if (pcs_changed) 1093 pl->pcs = pcs; 1094 1095 phylink_mac_config(pl, state); 1096 1097 err = phylink_pcs_config(pl->pcs, pl->cur_link_an_mode, state, 1098 !!(pl->link_config.pause & 1099 MLO_PAUSE_AN)); 1100 if (err < 0) 1101 phylink_err(pl, "pcs_config failed: %pe\n", 1102 ERR_PTR(err)); 1103 else if (err > 0) 1104 restart = true; 1105 1106 if (restart) 1107 phylink_mac_pcs_an_restart(pl); 1108 1109 if (pl->mac_ops->mac_finish) { 1110 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode, 1111 state->interface); 1112 if (err < 0) 1113 phylink_err(pl, "mac_finish failed: %pe\n", 1114 ERR_PTR(err)); 1115 } 1116 1117 if (pl->sfp_bus) { 1118 rate_kbd = phylink_interface_signal_rate(state->interface); 1119 if (rate_kbd) 1120 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1121 } 1122 1123 phylink_pcs_poll_start(pl); 1124 } 1125 1126 /* 1127 * Reconfigure for a change of inband advertisement. 1128 * If we have a separate PCS, we only need to call its pcs_config() method, 1129 * and then restart AN if it indicates something changed. Otherwise, we do 1130 * the full MAC reconfiguration. 1131 */ 1132 static int phylink_change_inband_advert(struct phylink *pl) 1133 { 1134 int ret; 1135 1136 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1137 return 0; 1138 1139 if (!pl->pcs && pl->config->legacy_pre_march2020) { 1140 /* Legacy method */ 1141 phylink_mac_config(pl, &pl->link_config); 1142 phylink_mac_pcs_an_restart(pl); 1143 return 0; 1144 } 1145 1146 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1147 phylink_an_mode_str(pl->cur_link_an_mode), 1148 phy_modes(pl->link_config.interface), 1149 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1150 pl->link_config.pause); 1151 1152 /* Modern PCS-based method; update the advert at the PCS, and 1153 * restart negotiation if the pcs_config() helper indicates that 1154 * the programmed advertisement has changed. 1155 */ 1156 ret = phylink_pcs_config(pl->pcs, pl->cur_link_an_mode, 1157 &pl->link_config, 1158 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1159 if (ret < 0) 1160 return ret; 1161 1162 if (ret > 0) 1163 phylink_mac_pcs_an_restart(pl); 1164 1165 return 0; 1166 } 1167 1168 static void phylink_mac_pcs_get_state(struct phylink *pl, 1169 struct phylink_link_state *state) 1170 { 1171 linkmode_copy(state->advertising, pl->link_config.advertising); 1172 linkmode_zero(state->lp_advertising); 1173 state->interface = pl->link_config.interface; 1174 state->rate_matching = pl->link_config.rate_matching; 1175 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1176 state->advertising)) { 1177 state->speed = SPEED_UNKNOWN; 1178 state->duplex = DUPLEX_UNKNOWN; 1179 state->pause = MLO_PAUSE_NONE; 1180 } else { 1181 state->speed = pl->link_config.speed; 1182 state->duplex = pl->link_config.duplex; 1183 state->pause = pl->link_config.pause; 1184 } 1185 state->an_complete = 0; 1186 state->link = 1; 1187 1188 if (pl->pcs) 1189 pl->pcs->ops->pcs_get_state(pl->pcs, state); 1190 else if (pl->mac_ops->mac_pcs_get_state && 1191 pl->config->legacy_pre_march2020) 1192 pl->mac_ops->mac_pcs_get_state(pl->config, state); 1193 else 1194 state->link = 0; 1195 } 1196 1197 /* The fixed state is... fixed except for the link state, 1198 * which may be determined by a GPIO or a callback. 1199 */ 1200 static void phylink_get_fixed_state(struct phylink *pl, 1201 struct phylink_link_state *state) 1202 { 1203 *state = pl->link_config; 1204 if (pl->config->get_fixed_state) 1205 pl->config->get_fixed_state(pl->config, state); 1206 else if (pl->link_gpio) 1207 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1208 1209 state->pause = MLO_PAUSE_NONE; 1210 phylink_resolve_an_pause(state); 1211 } 1212 1213 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1214 { 1215 struct phylink_link_state link_state; 1216 1217 switch (pl->cur_link_an_mode) { 1218 case MLO_AN_PHY: 1219 link_state = pl->phy_state; 1220 break; 1221 1222 case MLO_AN_FIXED: 1223 phylink_get_fixed_state(pl, &link_state); 1224 break; 1225 1226 case MLO_AN_INBAND: 1227 link_state = pl->link_config; 1228 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1229 link_state.pause = MLO_PAUSE_NONE; 1230 break; 1231 1232 default: /* can't happen */ 1233 return; 1234 } 1235 1236 link_state.link = false; 1237 1238 phylink_apply_manual_flow(pl, &link_state); 1239 phylink_major_config(pl, force_restart, &link_state); 1240 } 1241 1242 static const char *phylink_pause_to_str(int pause) 1243 { 1244 switch (pause & MLO_PAUSE_TXRX_MASK) { 1245 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1246 return "rx/tx"; 1247 case MLO_PAUSE_TX: 1248 return "tx"; 1249 case MLO_PAUSE_RX: 1250 return "rx"; 1251 default: 1252 return "off"; 1253 } 1254 } 1255 1256 static void phylink_link_up(struct phylink *pl, 1257 struct phylink_link_state link_state) 1258 { 1259 struct net_device *ndev = pl->netdev; 1260 int speed, duplex; 1261 bool rx_pause; 1262 1263 speed = link_state.speed; 1264 duplex = link_state.duplex; 1265 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1266 1267 switch (link_state.rate_matching) { 1268 case RATE_MATCH_PAUSE: 1269 /* The PHY is doing rate matchion from the media rate (in 1270 * the link_state) to the interface speed, and will send 1271 * pause frames to the MAC to limit its transmission speed. 1272 */ 1273 speed = phylink_interface_max_speed(link_state.interface); 1274 duplex = DUPLEX_FULL; 1275 rx_pause = true; 1276 break; 1277 1278 case RATE_MATCH_CRS: 1279 /* The PHY is doing rate matchion from the media rate (in 1280 * the link_state) to the interface speed, and will cause 1281 * collisions to the MAC to limit its transmission speed. 1282 */ 1283 speed = phylink_interface_max_speed(link_state.interface); 1284 duplex = DUPLEX_HALF; 1285 break; 1286 } 1287 1288 pl->cur_interface = link_state.interface; 1289 1290 phylink_pcs_link_up(pl->pcs, pl->cur_link_an_mode, pl->cur_interface, 1291 speed, duplex); 1292 1293 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode, 1294 pl->cur_interface, speed, duplex, 1295 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1296 1297 if (ndev) 1298 netif_carrier_on(ndev); 1299 1300 phylink_info(pl, 1301 "Link is Up - %s/%s - flow control %s\n", 1302 phy_speed_to_str(link_state.speed), 1303 phy_duplex_to_str(link_state.duplex), 1304 phylink_pause_to_str(link_state.pause)); 1305 } 1306 1307 static void phylink_link_down(struct phylink *pl) 1308 { 1309 struct net_device *ndev = pl->netdev; 1310 1311 if (ndev) 1312 netif_carrier_off(ndev); 1313 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode, 1314 pl->cur_interface); 1315 phylink_info(pl, "Link is Down\n"); 1316 } 1317 1318 static void phylink_resolve(struct work_struct *w) 1319 { 1320 struct phylink *pl = container_of(w, struct phylink, resolve); 1321 struct phylink_link_state link_state; 1322 struct net_device *ndev = pl->netdev; 1323 bool mac_config = false; 1324 bool retrigger = false; 1325 bool cur_link_state; 1326 1327 mutex_lock(&pl->state_mutex); 1328 if (pl->netdev) 1329 cur_link_state = netif_carrier_ok(ndev); 1330 else 1331 cur_link_state = pl->old_link_state; 1332 1333 if (pl->phylink_disable_state) { 1334 pl->mac_link_dropped = false; 1335 link_state.link = false; 1336 } else if (pl->mac_link_dropped) { 1337 link_state.link = false; 1338 retrigger = true; 1339 } else { 1340 switch (pl->cur_link_an_mode) { 1341 case MLO_AN_PHY: 1342 link_state = pl->phy_state; 1343 phylink_apply_manual_flow(pl, &link_state); 1344 mac_config = link_state.link; 1345 break; 1346 1347 case MLO_AN_FIXED: 1348 phylink_get_fixed_state(pl, &link_state); 1349 mac_config = link_state.link; 1350 break; 1351 1352 case MLO_AN_INBAND: 1353 phylink_mac_pcs_get_state(pl, &link_state); 1354 1355 /* The PCS may have a latching link-fail indicator. 1356 * If the link was up, bring the link down and 1357 * re-trigger the resolve. Otherwise, re-read the 1358 * PCS state to get the current status of the link. 1359 */ 1360 if (!link_state.link) { 1361 if (cur_link_state) 1362 retrigger = true; 1363 else 1364 phylink_mac_pcs_get_state(pl, 1365 &link_state); 1366 } 1367 1368 /* If we have a phy, the "up" state is the union of 1369 * both the PHY and the MAC 1370 */ 1371 if (pl->phydev) 1372 link_state.link &= pl->phy_state.link; 1373 1374 /* Only update if the PHY link is up */ 1375 if (pl->phydev && pl->phy_state.link) { 1376 /* If the interface has changed, force a 1377 * link down event if the link isn't already 1378 * down, and re-resolve. 1379 */ 1380 if (link_state.interface != 1381 pl->phy_state.interface) { 1382 retrigger = true; 1383 link_state.link = false; 1384 } 1385 link_state.interface = pl->phy_state.interface; 1386 1387 /* If we are doing rate matching, then the 1388 * link speed/duplex comes from the PHY 1389 */ 1390 if (pl->phy_state.rate_matching) { 1391 link_state.rate_matching = 1392 pl->phy_state.rate_matching; 1393 link_state.speed = pl->phy_state.speed; 1394 link_state.duplex = 1395 pl->phy_state.duplex; 1396 } 1397 1398 /* If we have a PHY, we need to update with 1399 * the PHY flow control bits. 1400 */ 1401 link_state.pause = pl->phy_state.pause; 1402 mac_config = true; 1403 } 1404 phylink_apply_manual_flow(pl, &link_state); 1405 break; 1406 } 1407 } 1408 1409 if (mac_config) { 1410 if (link_state.interface != pl->link_config.interface) { 1411 /* The interface has changed, force the link down and 1412 * then reconfigure. 1413 */ 1414 if (cur_link_state) { 1415 phylink_link_down(pl); 1416 cur_link_state = false; 1417 } 1418 phylink_major_config(pl, false, &link_state); 1419 pl->link_config.interface = link_state.interface; 1420 } else if (!pl->pcs && pl->config->legacy_pre_march2020) { 1421 /* The interface remains unchanged, only the speed, 1422 * duplex or pause settings have changed. Call the 1423 * old mac_config() method to configure the MAC/PCS 1424 * only if we do not have a legacy MAC driver. 1425 */ 1426 phylink_mac_config(pl, &link_state); 1427 } 1428 } 1429 1430 if (link_state.link != cur_link_state) { 1431 pl->old_link_state = link_state.link; 1432 if (!link_state.link) 1433 phylink_link_down(pl); 1434 else 1435 phylink_link_up(pl, link_state); 1436 } 1437 if (!link_state.link && retrigger) { 1438 pl->mac_link_dropped = false; 1439 queue_work(system_power_efficient_wq, &pl->resolve); 1440 } 1441 mutex_unlock(&pl->state_mutex); 1442 } 1443 1444 static void phylink_run_resolve(struct phylink *pl) 1445 { 1446 if (!pl->phylink_disable_state) 1447 queue_work(system_power_efficient_wq, &pl->resolve); 1448 } 1449 1450 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1451 { 1452 unsigned long state = pl->phylink_disable_state; 1453 1454 set_bit(bit, &pl->phylink_disable_state); 1455 if (state == 0) { 1456 queue_work(system_power_efficient_wq, &pl->resolve); 1457 flush_work(&pl->resolve); 1458 } 1459 } 1460 1461 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1462 { 1463 clear_bit(bit, &pl->phylink_disable_state); 1464 phylink_run_resolve(pl); 1465 } 1466 1467 static void phylink_fixed_poll(struct timer_list *t) 1468 { 1469 struct phylink *pl = container_of(t, struct phylink, link_poll); 1470 1471 mod_timer(t, jiffies + HZ); 1472 1473 phylink_run_resolve(pl); 1474 } 1475 1476 static const struct sfp_upstream_ops sfp_phylink_ops; 1477 1478 static int phylink_register_sfp(struct phylink *pl, 1479 const struct fwnode_handle *fwnode) 1480 { 1481 struct sfp_bus *bus; 1482 int ret; 1483 1484 if (!fwnode) 1485 return 0; 1486 1487 bus = sfp_bus_find_fwnode(fwnode); 1488 if (IS_ERR(bus)) { 1489 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1490 return PTR_ERR(bus); 1491 } 1492 1493 pl->sfp_bus = bus; 1494 1495 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1496 sfp_bus_put(bus); 1497 1498 return ret; 1499 } 1500 1501 /** 1502 * phylink_create() - create a phylink instance 1503 * @config: a pointer to the target &struct phylink_config 1504 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1505 * interface 1506 * @iface: the desired link mode defined by &typedef phy_interface_t 1507 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1508 * 1509 * Create a new phylink instance, and parse the link parameters found in @np. 1510 * This will parse in-band modes, fixed-link or SFP configuration. 1511 * 1512 * Note: the rtnl lock must not be held when calling this function. 1513 * 1514 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1515 * must use IS_ERR() to check for errors from this function. 1516 */ 1517 struct phylink *phylink_create(struct phylink_config *config, 1518 const struct fwnode_handle *fwnode, 1519 phy_interface_t iface, 1520 const struct phylink_mac_ops *mac_ops) 1521 { 1522 bool using_mac_select_pcs = false; 1523 struct phylink *pl; 1524 int ret; 1525 1526 /* Validate the supplied configuration */ 1527 if (phy_interface_empty(config->supported_interfaces)) { 1528 dev_err(config->dev, 1529 "phylink: error: empty supported_interfaces\n"); 1530 return ERR_PTR(-EINVAL); 1531 } 1532 1533 if (mac_ops->mac_select_pcs && 1534 mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) != 1535 ERR_PTR(-EOPNOTSUPP)) 1536 using_mac_select_pcs = true; 1537 1538 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1539 if (!pl) 1540 return ERR_PTR(-ENOMEM); 1541 1542 mutex_init(&pl->state_mutex); 1543 INIT_WORK(&pl->resolve, phylink_resolve); 1544 1545 pl->config = config; 1546 if (config->type == PHYLINK_NETDEV) { 1547 pl->netdev = to_net_dev(config->dev); 1548 } else if (config->type == PHYLINK_DEV) { 1549 pl->dev = config->dev; 1550 } else { 1551 kfree(pl); 1552 return ERR_PTR(-EINVAL); 1553 } 1554 1555 pl->using_mac_select_pcs = using_mac_select_pcs; 1556 pl->phy_state.interface = iface; 1557 pl->link_interface = iface; 1558 if (iface == PHY_INTERFACE_MODE_MOCA) 1559 pl->link_port = PORT_BNC; 1560 else 1561 pl->link_port = PORT_MII; 1562 pl->link_config.interface = iface; 1563 pl->link_config.pause = MLO_PAUSE_AN; 1564 pl->link_config.speed = SPEED_UNKNOWN; 1565 pl->link_config.duplex = DUPLEX_UNKNOWN; 1566 pl->mac_ops = mac_ops; 1567 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1568 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1569 1570 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 1571 linkmode_copy(pl->link_config.advertising, pl->supported); 1572 phylink_validate(pl, pl->supported, &pl->link_config); 1573 1574 ret = phylink_parse_mode(pl, fwnode); 1575 if (ret < 0) { 1576 kfree(pl); 1577 return ERR_PTR(ret); 1578 } 1579 1580 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1581 ret = phylink_parse_fixedlink(pl, fwnode); 1582 if (ret < 0) { 1583 kfree(pl); 1584 return ERR_PTR(ret); 1585 } 1586 } 1587 1588 pl->cur_link_an_mode = pl->cfg_link_an_mode; 1589 1590 ret = phylink_register_sfp(pl, fwnode); 1591 if (ret < 0) { 1592 kfree(pl); 1593 return ERR_PTR(ret); 1594 } 1595 1596 return pl; 1597 } 1598 EXPORT_SYMBOL_GPL(phylink_create); 1599 1600 /** 1601 * phylink_destroy() - cleanup and destroy the phylink instance 1602 * @pl: a pointer to a &struct phylink returned from phylink_create() 1603 * 1604 * Destroy a phylink instance. Any PHY that has been attached must have been 1605 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1606 * 1607 * Note: the rtnl lock must not be held when calling this function. 1608 */ 1609 void phylink_destroy(struct phylink *pl) 1610 { 1611 sfp_bus_del_upstream(pl->sfp_bus); 1612 if (pl->link_gpio) 1613 gpiod_put(pl->link_gpio); 1614 1615 cancel_work_sync(&pl->resolve); 1616 kfree(pl); 1617 } 1618 EXPORT_SYMBOL_GPL(phylink_destroy); 1619 1620 /** 1621 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1622 * @pl: a pointer to a &struct phylink returned from phylink_create() 1623 * 1624 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1625 * no PHY is needed. 1626 * 1627 * Returns true if phylink will be expecting a PHY. 1628 */ 1629 bool phylink_expects_phy(struct phylink *pl) 1630 { 1631 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1632 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1633 phy_interface_mode_is_8023z(pl->link_config.interface))) 1634 return false; 1635 return true; 1636 } 1637 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1638 1639 static void phylink_phy_change(struct phy_device *phydev, bool up) 1640 { 1641 struct phylink *pl = phydev->phylink; 1642 bool tx_pause, rx_pause; 1643 1644 phy_get_pause(phydev, &tx_pause, &rx_pause); 1645 1646 mutex_lock(&pl->state_mutex); 1647 pl->phy_state.speed = phydev->speed; 1648 pl->phy_state.duplex = phydev->duplex; 1649 pl->phy_state.rate_matching = phydev->rate_matching; 1650 pl->phy_state.pause = MLO_PAUSE_NONE; 1651 if (tx_pause) 1652 pl->phy_state.pause |= MLO_PAUSE_TX; 1653 if (rx_pause) 1654 pl->phy_state.pause |= MLO_PAUSE_RX; 1655 pl->phy_state.interface = phydev->interface; 1656 pl->phy_state.link = up; 1657 mutex_unlock(&pl->state_mutex); 1658 1659 phylink_run_resolve(pl); 1660 1661 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down", 1662 phy_modes(phydev->interface), 1663 phy_speed_to_str(phydev->speed), 1664 phy_duplex_to_str(phydev->duplex), 1665 phy_rate_matching_to_str(phydev->rate_matching), 1666 phylink_pause_to_str(pl->phy_state.pause)); 1667 } 1668 1669 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 1670 phy_interface_t interface) 1671 { 1672 struct phylink_link_state config; 1673 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 1674 char *irq_str; 1675 int ret; 1676 1677 /* 1678 * This is the new way of dealing with flow control for PHYs, 1679 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 1680 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 1681 * using our validate call to the MAC, we rely upon the MAC 1682 * clearing the bits from both supported and advertising fields. 1683 */ 1684 phy_support_asym_pause(phy); 1685 1686 memset(&config, 0, sizeof(config)); 1687 linkmode_copy(supported, phy->supported); 1688 linkmode_copy(config.advertising, phy->advertising); 1689 1690 /* Check whether we would use rate matching for the proposed interface 1691 * mode. 1692 */ 1693 config.rate_matching = phy_get_rate_matching(phy, interface); 1694 1695 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 1696 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 1697 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 1698 * their Serdes is either unnecessary or not reasonable. 1699 * 1700 * For these which switch interface modes, we really need to know which 1701 * interface modes the PHY supports to properly work out which ethtool 1702 * linkmodes can be supported. For now, as a work-around, we validate 1703 * against all interface modes, which may lead to more ethtool link 1704 * modes being advertised than are actually supported. 1705 */ 1706 if (phy->is_c45 && config.rate_matching == RATE_MATCH_NONE && 1707 interface != PHY_INTERFACE_MODE_RXAUI && 1708 interface != PHY_INTERFACE_MODE_XAUI && 1709 interface != PHY_INTERFACE_MODE_USXGMII) 1710 config.interface = PHY_INTERFACE_MODE_NA; 1711 else 1712 config.interface = interface; 1713 1714 ret = phylink_validate(pl, supported, &config); 1715 if (ret) { 1716 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 1717 phy_modes(config.interface), 1718 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 1719 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 1720 ERR_PTR(ret)); 1721 return ret; 1722 } 1723 1724 phy->phylink = pl; 1725 phy->phy_link_change = phylink_phy_change; 1726 1727 irq_str = phy_attached_info_irq(phy); 1728 phylink_info(pl, 1729 "PHY [%s] driver [%s] (irq=%s)\n", 1730 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 1731 kfree(irq_str); 1732 1733 mutex_lock(&phy->lock); 1734 mutex_lock(&pl->state_mutex); 1735 pl->phydev = phy; 1736 pl->phy_state.interface = interface; 1737 pl->phy_state.pause = MLO_PAUSE_NONE; 1738 pl->phy_state.speed = SPEED_UNKNOWN; 1739 pl->phy_state.duplex = DUPLEX_UNKNOWN; 1740 pl->phy_state.rate_matching = RATE_MATCH_NONE; 1741 linkmode_copy(pl->supported, supported); 1742 linkmode_copy(pl->link_config.advertising, config.advertising); 1743 1744 /* Restrict the phy advertisement according to the MAC support. */ 1745 linkmode_copy(phy->advertising, config.advertising); 1746 mutex_unlock(&pl->state_mutex); 1747 mutex_unlock(&phy->lock); 1748 1749 phylink_dbg(pl, 1750 "phy: %s setting supported %*pb advertising %*pb\n", 1751 phy_modes(interface), 1752 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 1753 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 1754 1755 if (phy_interrupt_is_valid(phy)) 1756 phy_request_interrupt(phy); 1757 1758 if (pl->config->mac_managed_pm) 1759 phy->mac_managed_pm = true; 1760 1761 return 0; 1762 } 1763 1764 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 1765 phy_interface_t interface) 1766 { 1767 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 1768 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1769 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 1770 return -EINVAL; 1771 1772 if (pl->phydev) 1773 return -EBUSY; 1774 1775 return phy_attach_direct(pl->netdev, phy, 0, interface); 1776 } 1777 1778 /** 1779 * phylink_connect_phy() - connect a PHY to the phylink instance 1780 * @pl: a pointer to a &struct phylink returned from phylink_create() 1781 * @phy: a pointer to a &struct phy_device. 1782 * 1783 * Connect @phy to the phylink instance specified by @pl by calling 1784 * phy_attach_direct(). Configure the @phy according to the MAC driver's 1785 * capabilities, start the PHYLIB state machine and enable any interrupts 1786 * that the PHY supports. 1787 * 1788 * This updates the phylink's ethtool supported and advertising link mode 1789 * masks. 1790 * 1791 * Returns 0 on success or a negative errno. 1792 */ 1793 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 1794 { 1795 int ret; 1796 1797 /* Use PHY device/driver interface */ 1798 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1799 pl->link_interface = phy->interface; 1800 pl->link_config.interface = pl->link_interface; 1801 } 1802 1803 ret = phylink_attach_phy(pl, phy, pl->link_interface); 1804 if (ret < 0) 1805 return ret; 1806 1807 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 1808 if (ret) 1809 phy_detach(phy); 1810 1811 return ret; 1812 } 1813 EXPORT_SYMBOL_GPL(phylink_connect_phy); 1814 1815 /** 1816 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 1817 * @pl: a pointer to a &struct phylink returned from phylink_create() 1818 * @dn: a pointer to a &struct device_node. 1819 * @flags: PHY-specific flags to communicate to the PHY device driver 1820 * 1821 * Connect the phy specified in the device node @dn to the phylink instance 1822 * specified by @pl. Actions specified in phylink_connect_phy() will be 1823 * performed. 1824 * 1825 * Returns 0 on success or a negative errno. 1826 */ 1827 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 1828 u32 flags) 1829 { 1830 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 1831 } 1832 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 1833 1834 /** 1835 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 1836 * @pl: a pointer to a &struct phylink returned from phylink_create() 1837 * @fwnode: a pointer to a &struct fwnode_handle. 1838 * @flags: PHY-specific flags to communicate to the PHY device driver 1839 * 1840 * Connect the phy specified @fwnode to the phylink instance specified 1841 * by @pl. 1842 * 1843 * Returns 0 on success or a negative errno. 1844 */ 1845 int phylink_fwnode_phy_connect(struct phylink *pl, 1846 const struct fwnode_handle *fwnode, 1847 u32 flags) 1848 { 1849 struct fwnode_handle *phy_fwnode; 1850 struct phy_device *phy_dev; 1851 int ret; 1852 1853 /* Fixed links and 802.3z are handled without needing a PHY */ 1854 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1855 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1856 phy_interface_mode_is_8023z(pl->link_interface))) 1857 return 0; 1858 1859 phy_fwnode = fwnode_get_phy_node(fwnode); 1860 if (IS_ERR(phy_fwnode)) { 1861 if (pl->cfg_link_an_mode == MLO_AN_PHY) 1862 return -ENODEV; 1863 return 0; 1864 } 1865 1866 phy_dev = fwnode_phy_find_device(phy_fwnode); 1867 /* We're done with the phy_node handle */ 1868 fwnode_handle_put(phy_fwnode); 1869 if (!phy_dev) 1870 return -ENODEV; 1871 1872 /* Use PHY device/driver interface */ 1873 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1874 pl->link_interface = phy_dev->interface; 1875 pl->link_config.interface = pl->link_interface; 1876 } 1877 1878 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 1879 pl->link_interface); 1880 phy_device_free(phy_dev); 1881 if (ret) 1882 return ret; 1883 1884 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 1885 if (ret) 1886 phy_detach(phy_dev); 1887 1888 return ret; 1889 } 1890 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 1891 1892 /** 1893 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 1894 * instance. 1895 * @pl: a pointer to a &struct phylink returned from phylink_create() 1896 * 1897 * Disconnect any current PHY from the phylink instance described by @pl. 1898 */ 1899 void phylink_disconnect_phy(struct phylink *pl) 1900 { 1901 struct phy_device *phy; 1902 1903 ASSERT_RTNL(); 1904 1905 phy = pl->phydev; 1906 if (phy) { 1907 mutex_lock(&phy->lock); 1908 mutex_lock(&pl->state_mutex); 1909 pl->phydev = NULL; 1910 mutex_unlock(&pl->state_mutex); 1911 mutex_unlock(&phy->lock); 1912 flush_work(&pl->resolve); 1913 1914 phy_disconnect(phy); 1915 } 1916 } 1917 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 1918 1919 /** 1920 * phylink_mac_change() - notify phylink of a change in MAC state 1921 * @pl: a pointer to a &struct phylink returned from phylink_create() 1922 * @up: indicates whether the link is currently up. 1923 * 1924 * The MAC driver should call this driver when the state of its link 1925 * changes (eg, link failure, new negotiation results, etc.) 1926 */ 1927 void phylink_mac_change(struct phylink *pl, bool up) 1928 { 1929 if (!up) 1930 pl->mac_link_dropped = true; 1931 phylink_run_resolve(pl); 1932 phylink_dbg(pl, "mac link %s\n", up ? "up" : "down"); 1933 } 1934 EXPORT_SYMBOL_GPL(phylink_mac_change); 1935 1936 static irqreturn_t phylink_link_handler(int irq, void *data) 1937 { 1938 struct phylink *pl = data; 1939 1940 phylink_run_resolve(pl); 1941 1942 return IRQ_HANDLED; 1943 } 1944 1945 /** 1946 * phylink_start() - start a phylink instance 1947 * @pl: a pointer to a &struct phylink returned from phylink_create() 1948 * 1949 * Start the phylink instance specified by @pl, configuring the MAC for the 1950 * desired link mode(s) and negotiation style. This should be called from the 1951 * network device driver's &struct net_device_ops ndo_open() method. 1952 */ 1953 void phylink_start(struct phylink *pl) 1954 { 1955 bool poll = false; 1956 1957 ASSERT_RTNL(); 1958 1959 phylink_info(pl, "configuring for %s/%s link mode\n", 1960 phylink_an_mode_str(pl->cur_link_an_mode), 1961 phy_modes(pl->link_config.interface)); 1962 1963 /* Always set the carrier off */ 1964 if (pl->netdev) 1965 netif_carrier_off(pl->netdev); 1966 1967 /* Apply the link configuration to the MAC when starting. This allows 1968 * a fixed-link to start with the correct parameters, and also 1969 * ensures that we set the appropriate advertisement for Serdes links. 1970 * 1971 * Restart autonegotiation if using 802.3z to ensure that the link 1972 * parameters are properly negotiated. This is necessary for DSA 1973 * switches using 802.3z negotiation to ensure they see our modes. 1974 */ 1975 phylink_mac_initial_config(pl, true); 1976 1977 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 1978 1979 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 1980 int irq = gpiod_to_irq(pl->link_gpio); 1981 1982 if (irq > 0) { 1983 if (!request_irq(irq, phylink_link_handler, 1984 IRQF_TRIGGER_RISING | 1985 IRQF_TRIGGER_FALLING, 1986 "netdev link", pl)) 1987 pl->link_irq = irq; 1988 else 1989 irq = 0; 1990 } 1991 if (irq <= 0) 1992 poll = true; 1993 } 1994 1995 switch (pl->cfg_link_an_mode) { 1996 case MLO_AN_FIXED: 1997 poll |= pl->config->poll_fixed_state; 1998 break; 1999 case MLO_AN_INBAND: 2000 if (pl->pcs) 2001 poll |= pl->pcs->poll; 2002 break; 2003 } 2004 if (poll) 2005 mod_timer(&pl->link_poll, jiffies + HZ); 2006 if (pl->phydev) 2007 phy_start(pl->phydev); 2008 if (pl->sfp_bus) 2009 sfp_upstream_start(pl->sfp_bus); 2010 } 2011 EXPORT_SYMBOL_GPL(phylink_start); 2012 2013 /** 2014 * phylink_stop() - stop a phylink instance 2015 * @pl: a pointer to a &struct phylink returned from phylink_create() 2016 * 2017 * Stop the phylink instance specified by @pl. This should be called from the 2018 * network device driver's &struct net_device_ops ndo_stop() method. The 2019 * network device's carrier state should not be changed prior to calling this 2020 * function. 2021 * 2022 * This will synchronously bring down the link if the link is not already 2023 * down (in other words, it will trigger a mac_link_down() method call.) 2024 */ 2025 void phylink_stop(struct phylink *pl) 2026 { 2027 ASSERT_RTNL(); 2028 2029 if (pl->sfp_bus) 2030 sfp_upstream_stop(pl->sfp_bus); 2031 if (pl->phydev) 2032 phy_stop(pl->phydev); 2033 del_timer_sync(&pl->link_poll); 2034 if (pl->link_irq) { 2035 free_irq(pl->link_irq, pl); 2036 pl->link_irq = 0; 2037 } 2038 2039 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2040 } 2041 EXPORT_SYMBOL_GPL(phylink_stop); 2042 2043 /** 2044 * phylink_suspend() - handle a network device suspend event 2045 * @pl: a pointer to a &struct phylink returned from phylink_create() 2046 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2047 * 2048 * Handle a network device suspend event. There are several cases: 2049 * 2050 * - If Wake-on-Lan is not active, we can bring down the link between 2051 * the MAC and PHY by calling phylink_stop(). 2052 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2053 * can also bring down the link between the MAC and PHY. 2054 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2055 * still needs to receive packets, so we can not bring the link down. 2056 */ 2057 void phylink_suspend(struct phylink *pl, bool mac_wol) 2058 { 2059 ASSERT_RTNL(); 2060 2061 if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) { 2062 /* Wake-on-Lan enabled, MAC handling */ 2063 mutex_lock(&pl->state_mutex); 2064 2065 /* Stop the resolver bringing the link up */ 2066 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2067 2068 /* Disable the carrier, to prevent transmit timeouts, 2069 * but one would hope all packets have been sent. This 2070 * also means phylink_resolve() will do nothing. 2071 */ 2072 if (pl->netdev) 2073 netif_carrier_off(pl->netdev); 2074 else 2075 pl->old_link_state = false; 2076 2077 /* We do not call mac_link_down() here as we want the 2078 * link to remain up to receive the WoL packets. 2079 */ 2080 mutex_unlock(&pl->state_mutex); 2081 } else { 2082 phylink_stop(pl); 2083 } 2084 } 2085 EXPORT_SYMBOL_GPL(phylink_suspend); 2086 2087 /** 2088 * phylink_resume() - handle a network device resume event 2089 * @pl: a pointer to a &struct phylink returned from phylink_create() 2090 * 2091 * Undo the effects of phylink_suspend(), returning the link to an 2092 * operational state. 2093 */ 2094 void phylink_resume(struct phylink *pl) 2095 { 2096 ASSERT_RTNL(); 2097 2098 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2099 /* Wake-on-Lan enabled, MAC handling */ 2100 2101 /* Call mac_link_down() so we keep the overall state balanced. 2102 * Do this under the state_mutex lock for consistency. This 2103 * will cause a "Link Down" message to be printed during 2104 * resume, which is harmless - the true link state will be 2105 * printed when we run a resolve. 2106 */ 2107 mutex_lock(&pl->state_mutex); 2108 phylink_link_down(pl); 2109 mutex_unlock(&pl->state_mutex); 2110 2111 /* Re-apply the link parameters so that all the settings get 2112 * restored to the MAC. 2113 */ 2114 phylink_mac_initial_config(pl, true); 2115 2116 /* Re-enable and re-resolve the link parameters */ 2117 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2118 } else { 2119 phylink_start(pl); 2120 } 2121 } 2122 EXPORT_SYMBOL_GPL(phylink_resume); 2123 2124 /** 2125 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2126 * @pl: a pointer to a &struct phylink returned from phylink_create() 2127 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2128 * 2129 * Read the wake on lan parameters from the PHY attached to the phylink 2130 * instance specified by @pl. If no PHY is currently attached, report no 2131 * support for wake on lan. 2132 */ 2133 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2134 { 2135 ASSERT_RTNL(); 2136 2137 wol->supported = 0; 2138 wol->wolopts = 0; 2139 2140 if (pl->phydev) 2141 phy_ethtool_get_wol(pl->phydev, wol); 2142 } 2143 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2144 2145 /** 2146 * phylink_ethtool_set_wol() - set wake on lan parameters 2147 * @pl: a pointer to a &struct phylink returned from phylink_create() 2148 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2149 * 2150 * Set the wake on lan parameters for the PHY attached to the phylink 2151 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2152 * error. 2153 * 2154 * Returns zero on success or negative errno code. 2155 */ 2156 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2157 { 2158 int ret = -EOPNOTSUPP; 2159 2160 ASSERT_RTNL(); 2161 2162 if (pl->phydev) 2163 ret = phy_ethtool_set_wol(pl->phydev, wol); 2164 2165 return ret; 2166 } 2167 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2168 2169 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2170 { 2171 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2172 2173 linkmode_zero(mask); 2174 phylink_set_port_modes(mask); 2175 2176 linkmode_and(dst, dst, mask); 2177 linkmode_or(dst, dst, b); 2178 } 2179 2180 static void phylink_get_ksettings(const struct phylink_link_state *state, 2181 struct ethtool_link_ksettings *kset) 2182 { 2183 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2184 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2185 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2186 kset->base.speed = state->speed; 2187 kset->base.duplex = state->duplex; 2188 } 2189 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2190 state->advertising) ? 2191 AUTONEG_ENABLE : AUTONEG_DISABLE; 2192 } 2193 2194 /** 2195 * phylink_ethtool_ksettings_get() - get the current link settings 2196 * @pl: a pointer to a &struct phylink returned from phylink_create() 2197 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2198 * 2199 * Read the current link settings for the phylink instance specified by @pl. 2200 * This will be the link settings read from the MAC, PHY or fixed link 2201 * settings depending on the current negotiation mode. 2202 */ 2203 int phylink_ethtool_ksettings_get(struct phylink *pl, 2204 struct ethtool_link_ksettings *kset) 2205 { 2206 struct phylink_link_state link_state; 2207 2208 ASSERT_RTNL(); 2209 2210 if (pl->phydev) 2211 phy_ethtool_ksettings_get(pl->phydev, kset); 2212 else 2213 kset->base.port = pl->link_port; 2214 2215 linkmode_copy(kset->link_modes.supported, pl->supported); 2216 2217 switch (pl->cur_link_an_mode) { 2218 case MLO_AN_FIXED: 2219 /* We are using fixed settings. Report these as the 2220 * current link settings - and note that these also 2221 * represent the supported speeds/duplex/pause modes. 2222 */ 2223 phylink_get_fixed_state(pl, &link_state); 2224 phylink_get_ksettings(&link_state, kset); 2225 break; 2226 2227 case MLO_AN_INBAND: 2228 /* If there is a phy attached, then use the reported 2229 * settings from the phy with no modification. 2230 */ 2231 if (pl->phydev) 2232 break; 2233 2234 phylink_mac_pcs_get_state(pl, &link_state); 2235 2236 /* The MAC is reporting the link results from its own PCS 2237 * layer via in-band status. Report these as the current 2238 * link settings. 2239 */ 2240 phylink_get_ksettings(&link_state, kset); 2241 break; 2242 } 2243 2244 return 0; 2245 } 2246 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2247 2248 /** 2249 * phylink_ethtool_ksettings_set() - set the link settings 2250 * @pl: a pointer to a &struct phylink returned from phylink_create() 2251 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2252 */ 2253 int phylink_ethtool_ksettings_set(struct phylink *pl, 2254 const struct ethtool_link_ksettings *kset) 2255 { 2256 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2257 struct phylink_link_state config; 2258 const struct phy_setting *s; 2259 2260 ASSERT_RTNL(); 2261 2262 /* Mask out unsupported advertisements */ 2263 linkmode_and(config.advertising, kset->link_modes.advertising, 2264 pl->supported); 2265 2266 if (pl->phydev) { 2267 /* We can rely on phylib for this update; we also do not need 2268 * to update the pl->link_config settings: 2269 * - the configuration returned via ksettings_get() will come 2270 * from phylib whenever a PHY is present. 2271 * - link_config.interface will be updated by the PHY calling 2272 * back via phylink_phy_change() and a subsequent resolve. 2273 * - initial link configuration for PHY mode comes from the 2274 * last phy state updated via phylink_phy_change(). 2275 * - other configuration changes (e.g. pause modes) are 2276 * performed directly via phylib. 2277 * - if in in-band mode with a PHY, the link configuration 2278 * is passed on the link from the PHY, and all of 2279 * link_config.{speed,duplex,an_enabled,pause} are not used. 2280 * - the only possible use would be link_config.advertising 2281 * pause modes when in 1000base-X mode with a PHY, but in 2282 * the presence of a PHY, this should not be changed as that 2283 * should be determined from the media side advertisement. 2284 */ 2285 return phy_ethtool_ksettings_set(pl->phydev, kset); 2286 } 2287 2288 config = pl->link_config; 2289 2290 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 2291 switch (kset->base.autoneg) { 2292 case AUTONEG_DISABLE: 2293 /* Autonegotiation disabled, select a suitable speed and 2294 * duplex. 2295 */ 2296 s = phy_lookup_setting(kset->base.speed, kset->base.duplex, 2297 pl->supported, false); 2298 if (!s) 2299 return -EINVAL; 2300 2301 /* If we have a fixed link, refuse to change link parameters. 2302 * If the link parameters match, accept them but do nothing. 2303 */ 2304 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2305 if (s->speed != pl->link_config.speed || 2306 s->duplex != pl->link_config.duplex) 2307 return -EINVAL; 2308 return 0; 2309 } 2310 2311 config.speed = s->speed; 2312 config.duplex = s->duplex; 2313 break; 2314 2315 case AUTONEG_ENABLE: 2316 /* If we have a fixed link, allow autonegotiation (since that 2317 * is our default case) but do not allow the advertisement to 2318 * be changed. If the advertisement matches, simply return. 2319 */ 2320 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2321 if (!linkmode_equal(config.advertising, 2322 pl->link_config.advertising)) 2323 return -EINVAL; 2324 return 0; 2325 } 2326 2327 config.speed = SPEED_UNKNOWN; 2328 config.duplex = DUPLEX_UNKNOWN; 2329 break; 2330 2331 default: 2332 return -EINVAL; 2333 } 2334 2335 /* We have ruled out the case with a PHY attached, and the 2336 * fixed-link cases. All that is left are in-band links. 2337 */ 2338 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2339 kset->base.autoneg == AUTONEG_ENABLE); 2340 2341 /* If this link is with an SFP, ensure that changes to advertised modes 2342 * also cause the associated interface to be selected such that the 2343 * link can be configured correctly. 2344 */ 2345 if (pl->sfp_bus) { 2346 config.interface = sfp_select_interface(pl->sfp_bus, 2347 config.advertising); 2348 if (config.interface == PHY_INTERFACE_MODE_NA) { 2349 phylink_err(pl, 2350 "selection of interface failed, advertisement %*pb\n", 2351 __ETHTOOL_LINK_MODE_MASK_NBITS, 2352 config.advertising); 2353 return -EINVAL; 2354 } 2355 2356 /* Revalidate with the selected interface */ 2357 linkmode_copy(support, pl->supported); 2358 if (phylink_validate(pl, support, &config)) { 2359 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2360 phylink_an_mode_str(pl->cur_link_an_mode), 2361 phy_modes(config.interface), 2362 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2363 return -EINVAL; 2364 } 2365 } else { 2366 /* Validate without changing the current supported mask. */ 2367 linkmode_copy(support, pl->supported); 2368 if (phylink_validate(pl, support, &config)) 2369 return -EINVAL; 2370 } 2371 2372 /* If autonegotiation is enabled, we must have an advertisement */ 2373 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2374 config.advertising) && 2375 phylink_is_empty_linkmode(config.advertising)) 2376 return -EINVAL; 2377 2378 mutex_lock(&pl->state_mutex); 2379 pl->link_config.speed = config.speed; 2380 pl->link_config.duplex = config.duplex; 2381 2382 if (pl->link_config.interface != config.interface) { 2383 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2384 /* We need to force the link down, then change the interface */ 2385 if (pl->old_link_state) { 2386 phylink_link_down(pl); 2387 pl->old_link_state = false; 2388 } 2389 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2390 &pl->phylink_disable_state)) 2391 phylink_major_config(pl, false, &config); 2392 pl->link_config.interface = config.interface; 2393 linkmode_copy(pl->link_config.advertising, config.advertising); 2394 } else if (!linkmode_equal(pl->link_config.advertising, 2395 config.advertising)) { 2396 linkmode_copy(pl->link_config.advertising, config.advertising); 2397 phylink_change_inband_advert(pl); 2398 } 2399 mutex_unlock(&pl->state_mutex); 2400 2401 return 0; 2402 } 2403 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 2404 2405 /** 2406 * phylink_ethtool_nway_reset() - restart negotiation 2407 * @pl: a pointer to a &struct phylink returned from phylink_create() 2408 * 2409 * Restart negotiation for the phylink instance specified by @pl. This will 2410 * cause any attached phy to restart negotiation with the link partner, and 2411 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 2412 * negotiation. 2413 * 2414 * Returns zero on success, or negative error code. 2415 */ 2416 int phylink_ethtool_nway_reset(struct phylink *pl) 2417 { 2418 int ret = 0; 2419 2420 ASSERT_RTNL(); 2421 2422 if (pl->phydev) 2423 ret = phy_restart_aneg(pl->phydev); 2424 phylink_mac_pcs_an_restart(pl); 2425 2426 return ret; 2427 } 2428 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 2429 2430 /** 2431 * phylink_ethtool_get_pauseparam() - get the current pause parameters 2432 * @pl: a pointer to a &struct phylink returned from phylink_create() 2433 * @pause: a pointer to a &struct ethtool_pauseparam 2434 */ 2435 void phylink_ethtool_get_pauseparam(struct phylink *pl, 2436 struct ethtool_pauseparam *pause) 2437 { 2438 ASSERT_RTNL(); 2439 2440 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 2441 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 2442 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 2443 } 2444 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 2445 2446 /** 2447 * phylink_ethtool_set_pauseparam() - set the current pause parameters 2448 * @pl: a pointer to a &struct phylink returned from phylink_create() 2449 * @pause: a pointer to a &struct ethtool_pauseparam 2450 */ 2451 int phylink_ethtool_set_pauseparam(struct phylink *pl, 2452 struct ethtool_pauseparam *pause) 2453 { 2454 struct phylink_link_state *config = &pl->link_config; 2455 bool manual_changed; 2456 int pause_state; 2457 2458 ASSERT_RTNL(); 2459 2460 if (pl->cur_link_an_mode == MLO_AN_FIXED) 2461 return -EOPNOTSUPP; 2462 2463 if (!phylink_test(pl->supported, Pause) && 2464 !phylink_test(pl->supported, Asym_Pause)) 2465 return -EOPNOTSUPP; 2466 2467 if (!phylink_test(pl->supported, Asym_Pause) && 2468 pause->rx_pause != pause->tx_pause) 2469 return -EINVAL; 2470 2471 pause_state = 0; 2472 if (pause->autoneg) 2473 pause_state |= MLO_PAUSE_AN; 2474 if (pause->rx_pause) 2475 pause_state |= MLO_PAUSE_RX; 2476 if (pause->tx_pause) 2477 pause_state |= MLO_PAUSE_TX; 2478 2479 mutex_lock(&pl->state_mutex); 2480 /* 2481 * See the comments for linkmode_set_pause(), wrt the deficiencies 2482 * with the current implementation. A solution to this issue would 2483 * be: 2484 * ethtool Local device 2485 * rx tx Pause AsymDir 2486 * 0 0 0 0 2487 * 1 0 1 1 2488 * 0 1 0 1 2489 * 1 1 1 1 2490 * and then use the ethtool rx/tx enablement status to mask the 2491 * rx/tx pause resolution. 2492 */ 2493 linkmode_set_pause(config->advertising, pause->tx_pause, 2494 pause->rx_pause); 2495 2496 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 2497 (!(pause_state & MLO_PAUSE_AN) && 2498 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 2499 2500 config->pause = pause_state; 2501 2502 /* Update our in-band advertisement, triggering a renegotiation if 2503 * the advertisement changed. 2504 */ 2505 if (!pl->phydev) 2506 phylink_change_inband_advert(pl); 2507 2508 mutex_unlock(&pl->state_mutex); 2509 2510 /* If we have a PHY, a change of the pause frame advertisement will 2511 * cause phylib to renegotiate (if AN is enabled) which will in turn 2512 * call our phylink_phy_change() and trigger a resolve. Note that 2513 * we can't hold our state mutex while calling phy_set_asym_pause(). 2514 */ 2515 if (pl->phydev) 2516 phy_set_asym_pause(pl->phydev, pause->rx_pause, 2517 pause->tx_pause); 2518 2519 /* If the manual pause settings changed, make sure we trigger a 2520 * resolve to update their state; we can not guarantee that the 2521 * link will cycle. 2522 */ 2523 if (manual_changed) { 2524 pl->mac_link_dropped = true; 2525 phylink_run_resolve(pl); 2526 } 2527 2528 return 0; 2529 } 2530 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 2531 2532 /** 2533 * phylink_get_eee_err() - read the energy efficient ethernet error 2534 * counter 2535 * @pl: a pointer to a &struct phylink returned from phylink_create(). 2536 * 2537 * Read the Energy Efficient Ethernet error counter from the PHY associated 2538 * with the phylink instance specified by @pl. 2539 * 2540 * Returns positive error counter value, or negative error code. 2541 */ 2542 int phylink_get_eee_err(struct phylink *pl) 2543 { 2544 int ret = 0; 2545 2546 ASSERT_RTNL(); 2547 2548 if (pl->phydev) 2549 ret = phy_get_eee_err(pl->phydev); 2550 2551 return ret; 2552 } 2553 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 2554 2555 /** 2556 * phylink_init_eee() - init and check the EEE features 2557 * @pl: a pointer to a &struct phylink returned from phylink_create() 2558 * @clk_stop_enable: allow PHY to stop receive clock 2559 * 2560 * Must be called either with RTNL held or within mac_link_up() 2561 */ 2562 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) 2563 { 2564 int ret = -EOPNOTSUPP; 2565 2566 if (pl->phydev) 2567 ret = phy_init_eee(pl->phydev, clk_stop_enable); 2568 2569 return ret; 2570 } 2571 EXPORT_SYMBOL_GPL(phylink_init_eee); 2572 2573 /** 2574 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 2575 * @pl: a pointer to a &struct phylink returned from phylink_create() 2576 * @eee: a pointer to a &struct ethtool_eee for the read parameters 2577 */ 2578 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee) 2579 { 2580 int ret = -EOPNOTSUPP; 2581 2582 ASSERT_RTNL(); 2583 2584 if (pl->phydev) 2585 ret = phy_ethtool_get_eee(pl->phydev, eee); 2586 2587 return ret; 2588 } 2589 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 2590 2591 /** 2592 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 2593 * @pl: a pointer to a &struct phylink returned from phylink_create() 2594 * @eee: a pointer to a &struct ethtool_eee for the desired parameters 2595 */ 2596 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee) 2597 { 2598 int ret = -EOPNOTSUPP; 2599 2600 ASSERT_RTNL(); 2601 2602 if (pl->phydev) 2603 ret = phy_ethtool_set_eee(pl->phydev, eee); 2604 2605 return ret; 2606 } 2607 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 2608 2609 /* This emulates MII registers for a fixed-mode phy operating as per the 2610 * passed in state. "aneg" defines if we report negotiation is possible. 2611 * 2612 * FIXME: should deal with negotiation state too. 2613 */ 2614 static int phylink_mii_emul_read(unsigned int reg, 2615 struct phylink_link_state *state) 2616 { 2617 struct fixed_phy_status fs; 2618 unsigned long *lpa = state->lp_advertising; 2619 int val; 2620 2621 fs.link = state->link; 2622 fs.speed = state->speed; 2623 fs.duplex = state->duplex; 2624 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 2625 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 2626 2627 val = swphy_read_reg(reg, &fs); 2628 if (reg == MII_BMSR) { 2629 if (!state->an_complete) 2630 val &= ~BMSR_ANEGCOMPLETE; 2631 } 2632 return val; 2633 } 2634 2635 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 2636 unsigned int reg) 2637 { 2638 struct phy_device *phydev = pl->phydev; 2639 int prtad, devad; 2640 2641 if (mdio_phy_id_is_c45(phy_id)) { 2642 prtad = mdio_phy_id_prtad(phy_id); 2643 devad = mdio_phy_id_devad(phy_id); 2644 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2645 reg); 2646 } 2647 2648 if (phydev->is_c45) { 2649 switch (reg) { 2650 case MII_BMCR: 2651 case MII_BMSR: 2652 case MII_PHYSID1: 2653 case MII_PHYSID2: 2654 devad = __ffs(phydev->c45_ids.mmds_present); 2655 break; 2656 case MII_ADVERTISE: 2657 case MII_LPA: 2658 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2659 return -EINVAL; 2660 devad = MDIO_MMD_AN; 2661 if (reg == MII_ADVERTISE) 2662 reg = MDIO_AN_ADVERTISE; 2663 else 2664 reg = MDIO_AN_LPA; 2665 break; 2666 default: 2667 return -EINVAL; 2668 } 2669 prtad = phy_id; 2670 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2671 reg); 2672 } 2673 2674 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 2675 } 2676 2677 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 2678 unsigned int reg, unsigned int val) 2679 { 2680 struct phy_device *phydev = pl->phydev; 2681 int prtad, devad; 2682 2683 if (mdio_phy_id_is_c45(phy_id)) { 2684 prtad = mdio_phy_id_prtad(phy_id); 2685 devad = mdio_phy_id_devad(phy_id); 2686 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 2687 reg, val); 2688 } 2689 2690 if (phydev->is_c45) { 2691 switch (reg) { 2692 case MII_BMCR: 2693 case MII_BMSR: 2694 case MII_PHYSID1: 2695 case MII_PHYSID2: 2696 devad = __ffs(phydev->c45_ids.mmds_present); 2697 break; 2698 case MII_ADVERTISE: 2699 case MII_LPA: 2700 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2701 return -EINVAL; 2702 devad = MDIO_MMD_AN; 2703 if (reg == MII_ADVERTISE) 2704 reg = MDIO_AN_ADVERTISE; 2705 else 2706 reg = MDIO_AN_LPA; 2707 break; 2708 default: 2709 return -EINVAL; 2710 } 2711 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 2712 reg, val); 2713 } 2714 2715 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 2716 } 2717 2718 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 2719 unsigned int reg) 2720 { 2721 struct phylink_link_state state; 2722 int val = 0xffff; 2723 2724 switch (pl->cur_link_an_mode) { 2725 case MLO_AN_FIXED: 2726 if (phy_id == 0) { 2727 phylink_get_fixed_state(pl, &state); 2728 val = phylink_mii_emul_read(reg, &state); 2729 } 2730 break; 2731 2732 case MLO_AN_PHY: 2733 return -EOPNOTSUPP; 2734 2735 case MLO_AN_INBAND: 2736 if (phy_id == 0) { 2737 phylink_mac_pcs_get_state(pl, &state); 2738 val = phylink_mii_emul_read(reg, &state); 2739 } 2740 break; 2741 } 2742 2743 return val & 0xffff; 2744 } 2745 2746 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 2747 unsigned int reg, unsigned int val) 2748 { 2749 switch (pl->cur_link_an_mode) { 2750 case MLO_AN_FIXED: 2751 break; 2752 2753 case MLO_AN_PHY: 2754 return -EOPNOTSUPP; 2755 2756 case MLO_AN_INBAND: 2757 break; 2758 } 2759 2760 return 0; 2761 } 2762 2763 /** 2764 * phylink_mii_ioctl() - generic mii ioctl interface 2765 * @pl: a pointer to a &struct phylink returned from phylink_create() 2766 * @ifr: a pointer to a &struct ifreq for socket ioctls 2767 * @cmd: ioctl cmd to execute 2768 * 2769 * Perform the specified MII ioctl on the PHY attached to the phylink instance 2770 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 2771 * 2772 * Returns: zero on success or negative error code. 2773 * 2774 * %SIOCGMIIPHY: 2775 * read register from the current PHY. 2776 * %SIOCGMIIREG: 2777 * read register from the specified PHY. 2778 * %SIOCSMIIREG: 2779 * set a register on the specified PHY. 2780 */ 2781 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 2782 { 2783 struct mii_ioctl_data *mii = if_mii(ifr); 2784 int ret; 2785 2786 ASSERT_RTNL(); 2787 2788 if (pl->phydev) { 2789 /* PHYs only exist for MLO_AN_PHY and SGMII */ 2790 switch (cmd) { 2791 case SIOCGMIIPHY: 2792 mii->phy_id = pl->phydev->mdio.addr; 2793 fallthrough; 2794 2795 case SIOCGMIIREG: 2796 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 2797 if (ret >= 0) { 2798 mii->val_out = ret; 2799 ret = 0; 2800 } 2801 break; 2802 2803 case SIOCSMIIREG: 2804 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 2805 mii->val_in); 2806 break; 2807 2808 default: 2809 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 2810 break; 2811 } 2812 } else { 2813 switch (cmd) { 2814 case SIOCGMIIPHY: 2815 mii->phy_id = 0; 2816 fallthrough; 2817 2818 case SIOCGMIIREG: 2819 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 2820 if (ret >= 0) { 2821 mii->val_out = ret; 2822 ret = 0; 2823 } 2824 break; 2825 2826 case SIOCSMIIREG: 2827 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 2828 mii->val_in); 2829 break; 2830 2831 default: 2832 ret = -EOPNOTSUPP; 2833 break; 2834 } 2835 } 2836 2837 return ret; 2838 } 2839 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 2840 2841 /** 2842 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 2843 * link partners 2844 * @pl: a pointer to a &struct phylink returned from phylink_create() 2845 * @sync: perform action synchronously 2846 * 2847 * If we have a PHY that is not part of a SFP module, then set the speed 2848 * as described in the phy_speed_down() function. Please see this function 2849 * for a description of the @sync parameter. 2850 * 2851 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 2852 */ 2853 int phylink_speed_down(struct phylink *pl, bool sync) 2854 { 2855 int ret = 0; 2856 2857 ASSERT_RTNL(); 2858 2859 if (!pl->sfp_bus && pl->phydev) 2860 ret = phy_speed_down(pl->phydev, sync); 2861 2862 return ret; 2863 } 2864 EXPORT_SYMBOL_GPL(phylink_speed_down); 2865 2866 /** 2867 * phylink_speed_up() - restore the advertised speeds prior to the call to 2868 * phylink_speed_down() 2869 * @pl: a pointer to a &struct phylink returned from phylink_create() 2870 * 2871 * If we have a PHY that is not part of a SFP module, then restore the 2872 * PHY speeds as per phy_speed_up(). 2873 * 2874 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 2875 */ 2876 int phylink_speed_up(struct phylink *pl) 2877 { 2878 int ret = 0; 2879 2880 ASSERT_RTNL(); 2881 2882 if (!pl->sfp_bus && pl->phydev) 2883 ret = phy_speed_up(pl->phydev); 2884 2885 return ret; 2886 } 2887 EXPORT_SYMBOL_GPL(phylink_speed_up); 2888 2889 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 2890 { 2891 struct phylink *pl = upstream; 2892 2893 pl->netdev->sfp_bus = bus; 2894 } 2895 2896 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 2897 { 2898 struct phylink *pl = upstream; 2899 2900 pl->netdev->sfp_bus = NULL; 2901 } 2902 2903 static const phy_interface_t phylink_sfp_interface_preference[] = { 2904 PHY_INTERFACE_MODE_25GBASER, 2905 PHY_INTERFACE_MODE_USXGMII, 2906 PHY_INTERFACE_MODE_10GBASER, 2907 PHY_INTERFACE_MODE_5GBASER, 2908 PHY_INTERFACE_MODE_2500BASEX, 2909 PHY_INTERFACE_MODE_SGMII, 2910 PHY_INTERFACE_MODE_1000BASEX, 2911 PHY_INTERFACE_MODE_100BASEX, 2912 }; 2913 2914 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 2915 2916 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 2917 const unsigned long *intf) 2918 { 2919 phy_interface_t interface; 2920 size_t i; 2921 2922 interface = PHY_INTERFACE_MODE_NA; 2923 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 2924 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 2925 interface = phylink_sfp_interface_preference[i]; 2926 break; 2927 } 2928 2929 return interface; 2930 } 2931 2932 static void phylink_sfp_set_config(struct phylink *pl, u8 mode, 2933 unsigned long *supported, 2934 struct phylink_link_state *state) 2935 { 2936 bool changed = false; 2937 2938 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 2939 phylink_an_mode_str(mode), phy_modes(state->interface), 2940 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 2941 2942 if (!linkmode_equal(pl->supported, supported)) { 2943 linkmode_copy(pl->supported, supported); 2944 changed = true; 2945 } 2946 2947 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 2948 linkmode_copy(pl->link_config.advertising, state->advertising); 2949 changed = true; 2950 } 2951 2952 if (pl->cur_link_an_mode != mode || 2953 pl->link_config.interface != state->interface) { 2954 pl->cur_link_an_mode = mode; 2955 pl->link_config.interface = state->interface; 2956 2957 changed = true; 2958 2959 phylink_info(pl, "switched to %s/%s link mode\n", 2960 phylink_an_mode_str(mode), 2961 phy_modes(state->interface)); 2962 } 2963 2964 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 2965 &pl->phylink_disable_state)) 2966 phylink_mac_initial_config(pl, false); 2967 } 2968 2969 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode, 2970 struct phy_device *phy) 2971 { 2972 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1); 2973 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2974 struct phylink_link_state config; 2975 phy_interface_t iface; 2976 int ret; 2977 2978 linkmode_copy(support, phy->supported); 2979 2980 memset(&config, 0, sizeof(config)); 2981 linkmode_copy(config.advertising, phy->advertising); 2982 config.interface = PHY_INTERFACE_MODE_NA; 2983 config.speed = SPEED_UNKNOWN; 2984 config.duplex = DUPLEX_UNKNOWN; 2985 config.pause = MLO_PAUSE_AN; 2986 2987 /* Ignore errors if we're expecting a PHY to attach later */ 2988 ret = phylink_validate(pl, support, &config); 2989 if (ret) { 2990 phylink_err(pl, "validation with support %*pb failed: %pe\n", 2991 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 2992 ERR_PTR(ret)); 2993 return ret; 2994 } 2995 2996 iface = sfp_select_interface(pl->sfp_bus, config.advertising); 2997 if (iface == PHY_INTERFACE_MODE_NA) { 2998 phylink_err(pl, 2999 "selection of interface failed, advertisement %*pb\n", 3000 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising); 3001 return -EINVAL; 3002 } 3003 3004 config.interface = iface; 3005 linkmode_copy(support1, support); 3006 ret = phylink_validate(pl, support1, &config); 3007 if (ret) { 3008 phylink_err(pl, 3009 "validation of %s/%s with support %*pb failed: %pe\n", 3010 phylink_an_mode_str(mode), 3011 phy_modes(config.interface), 3012 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3013 ERR_PTR(ret)); 3014 return ret; 3015 } 3016 3017 pl->link_port = pl->sfp_port; 3018 3019 phylink_sfp_set_config(pl, mode, support, &config); 3020 3021 return 0; 3022 } 3023 3024 static int phylink_sfp_config_optical(struct phylink *pl) 3025 { 3026 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3027 DECLARE_PHY_INTERFACE_MASK(interfaces); 3028 struct phylink_link_state config; 3029 phy_interface_t interface; 3030 int ret; 3031 3032 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3033 (int)PHY_INTERFACE_MODE_MAX, 3034 pl->config->supported_interfaces, 3035 (int)PHY_INTERFACE_MODE_MAX, 3036 pl->sfp_interfaces); 3037 3038 /* Find the union of the supported interfaces by the PCS/MAC and 3039 * the SFP module. 3040 */ 3041 phy_interface_and(interfaces, pl->config->supported_interfaces, 3042 pl->sfp_interfaces); 3043 if (phy_interface_empty(interfaces)) { 3044 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3045 return -EINVAL; 3046 } 3047 3048 memset(&config, 0, sizeof(config)); 3049 linkmode_copy(support, pl->sfp_support); 3050 linkmode_copy(config.advertising, pl->sfp_support); 3051 config.speed = SPEED_UNKNOWN; 3052 config.duplex = DUPLEX_UNKNOWN; 3053 config.pause = MLO_PAUSE_AN; 3054 3055 /* For all the interfaces that are supported, reduce the sfp_support 3056 * mask to only those link modes that can be supported. 3057 */ 3058 ret = phylink_validate_mask(pl, pl->sfp_support, &config, interfaces); 3059 if (ret) { 3060 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3061 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3062 return ret; 3063 } 3064 3065 interface = phylink_choose_sfp_interface(pl, interfaces); 3066 if (interface == PHY_INTERFACE_MODE_NA) { 3067 phylink_err(pl, "failed to select SFP interface\n"); 3068 return -EINVAL; 3069 } 3070 3071 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3072 phy_modes(interface)); 3073 3074 config.interface = interface; 3075 3076 /* Ignore errors if we're expecting a PHY to attach later */ 3077 ret = phylink_validate(pl, support, &config); 3078 if (ret) { 3079 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3080 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3081 ERR_PTR(ret)); 3082 return ret; 3083 } 3084 3085 pl->link_port = pl->sfp_port; 3086 3087 phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config); 3088 3089 return 0; 3090 } 3091 3092 static int phylink_sfp_module_insert(void *upstream, 3093 const struct sfp_eeprom_id *id) 3094 { 3095 struct phylink *pl = upstream; 3096 3097 ASSERT_RTNL(); 3098 3099 linkmode_zero(pl->sfp_support); 3100 phy_interface_zero(pl->sfp_interfaces); 3101 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces); 3102 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support); 3103 3104 /* If this module may have a PHY connecting later, defer until later */ 3105 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 3106 if (pl->sfp_may_have_phy) 3107 return 0; 3108 3109 return phylink_sfp_config_optical(pl); 3110 } 3111 3112 static int phylink_sfp_module_start(void *upstream) 3113 { 3114 struct phylink *pl = upstream; 3115 3116 /* If this SFP module has a PHY, start the PHY now. */ 3117 if (pl->phydev) { 3118 phy_start(pl->phydev); 3119 return 0; 3120 } 3121 3122 /* If the module may have a PHY but we didn't detect one we 3123 * need to configure the MAC here. 3124 */ 3125 if (!pl->sfp_may_have_phy) 3126 return 0; 3127 3128 return phylink_sfp_config_optical(pl); 3129 } 3130 3131 static void phylink_sfp_module_stop(void *upstream) 3132 { 3133 struct phylink *pl = upstream; 3134 3135 /* If this SFP module has a PHY, stop it. */ 3136 if (pl->phydev) 3137 phy_stop(pl->phydev); 3138 } 3139 3140 static void phylink_sfp_link_down(void *upstream) 3141 { 3142 struct phylink *pl = upstream; 3143 3144 ASSERT_RTNL(); 3145 3146 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3147 } 3148 3149 static void phylink_sfp_link_up(void *upstream) 3150 { 3151 struct phylink *pl = upstream; 3152 3153 ASSERT_RTNL(); 3154 3155 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3156 } 3157 3158 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII 3159 * or 802.3z control word, so inband will not work. 3160 */ 3161 static bool phylink_phy_no_inband(struct phy_device *phy) 3162 { 3163 return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1], 3164 0xae025150, 0xfffffff0); 3165 } 3166 3167 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3168 { 3169 struct phylink *pl = upstream; 3170 phy_interface_t interface; 3171 u8 mode; 3172 int ret; 3173 3174 /* 3175 * This is the new way of dealing with flow control for PHYs, 3176 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3177 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3178 * using our validate call to the MAC, we rely upon the MAC 3179 * clearing the bits from both supported and advertising fields. 3180 */ 3181 phy_support_asym_pause(phy); 3182 3183 if (phylink_phy_no_inband(phy)) 3184 mode = MLO_AN_PHY; 3185 else 3186 mode = MLO_AN_INBAND; 3187 3188 /* Set the PHY's host supported interfaces */ 3189 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3190 pl->config->supported_interfaces); 3191 3192 /* Do the initial configuration */ 3193 ret = phylink_sfp_config_phy(pl, mode, phy); 3194 if (ret < 0) 3195 return ret; 3196 3197 interface = pl->link_config.interface; 3198 ret = phylink_attach_phy(pl, phy, interface); 3199 if (ret < 0) 3200 return ret; 3201 3202 ret = phylink_bringup_phy(pl, phy, interface); 3203 if (ret) 3204 phy_detach(phy); 3205 3206 return ret; 3207 } 3208 3209 static void phylink_sfp_disconnect_phy(void *upstream) 3210 { 3211 phylink_disconnect_phy(upstream); 3212 } 3213 3214 static const struct sfp_upstream_ops sfp_phylink_ops = { 3215 .attach = phylink_sfp_attach, 3216 .detach = phylink_sfp_detach, 3217 .module_insert = phylink_sfp_module_insert, 3218 .module_start = phylink_sfp_module_start, 3219 .module_stop = phylink_sfp_module_stop, 3220 .link_up = phylink_sfp_link_up, 3221 .link_down = phylink_sfp_link_down, 3222 .connect_phy = phylink_sfp_connect_phy, 3223 .disconnect_phy = phylink_sfp_disconnect_phy, 3224 }; 3225 3226 /* Helpers for MAC drivers */ 3227 3228 static struct { 3229 int bit; 3230 int speed; 3231 } phylink_c73_priority_resolution[] = { 3232 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 3233 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 3234 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 3235 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 3236 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 3237 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 3238 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 3239 /* 5GBASE-KR not supported */ 3240 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 3241 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 3242 }; 3243 3244 void phylink_resolve_c73(struct phylink_link_state *state) 3245 { 3246 int i; 3247 3248 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 3249 int bit = phylink_c73_priority_resolution[i].bit; 3250 if (linkmode_test_bit(bit, state->advertising) && 3251 linkmode_test_bit(bit, state->lp_advertising)) 3252 break; 3253 } 3254 3255 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 3256 state->speed = phylink_c73_priority_resolution[i].speed; 3257 state->duplex = DUPLEX_FULL; 3258 } else { 3259 /* negotiation failure */ 3260 state->link = false; 3261 } 3262 3263 phylink_resolve_an_pause(state); 3264 } 3265 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 3266 3267 static void phylink_decode_c37_word(struct phylink_link_state *state, 3268 uint16_t config_reg, int speed) 3269 { 3270 int fd_bit; 3271 3272 if (speed == SPEED_2500) 3273 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 3274 else 3275 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 3276 3277 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 3278 3279 if (linkmode_test_bit(fd_bit, state->advertising) && 3280 linkmode_test_bit(fd_bit, state->lp_advertising)) { 3281 state->speed = speed; 3282 state->duplex = DUPLEX_FULL; 3283 } else { 3284 /* negotiation failure */ 3285 state->link = false; 3286 } 3287 3288 phylink_resolve_an_pause(state); 3289 } 3290 3291 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 3292 uint16_t config_reg) 3293 { 3294 if (!(config_reg & LPA_SGMII_LINK)) { 3295 state->link = false; 3296 return; 3297 } 3298 3299 switch (config_reg & LPA_SGMII_SPD_MASK) { 3300 case LPA_SGMII_10: 3301 state->speed = SPEED_10; 3302 break; 3303 case LPA_SGMII_100: 3304 state->speed = SPEED_100; 3305 break; 3306 case LPA_SGMII_1000: 3307 state->speed = SPEED_1000; 3308 break; 3309 default: 3310 state->link = false; 3311 return; 3312 } 3313 if (config_reg & LPA_SGMII_FULL_DUPLEX) 3314 state->duplex = DUPLEX_FULL; 3315 else 3316 state->duplex = DUPLEX_HALF; 3317 } 3318 3319 /** 3320 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3321 * @state: a pointer to a struct phylink_link_state. 3322 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3323 * 3324 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3325 * code word. Decode the USXGMII code word and populate the corresponding fields 3326 * (speed, duplex) into the phylink_link_state structure. 3327 */ 3328 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 3329 uint16_t lpa) 3330 { 3331 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3332 case MDIO_USXGMII_10: 3333 state->speed = SPEED_10; 3334 break; 3335 case MDIO_USXGMII_100: 3336 state->speed = SPEED_100; 3337 break; 3338 case MDIO_USXGMII_1000: 3339 state->speed = SPEED_1000; 3340 break; 3341 case MDIO_USXGMII_2500: 3342 state->speed = SPEED_2500; 3343 break; 3344 case MDIO_USXGMII_5000: 3345 state->speed = SPEED_5000; 3346 break; 3347 case MDIO_USXGMII_10G: 3348 state->speed = SPEED_10000; 3349 break; 3350 default: 3351 state->link = false; 3352 return; 3353 } 3354 3355 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3356 state->duplex = DUPLEX_FULL; 3357 else 3358 state->duplex = DUPLEX_HALF; 3359 } 3360 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 3361 3362 /** 3363 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 3364 * @state: a pointer to a &struct phylink_link_state. 3365 * @bmsr: The value of the %MII_BMSR register 3366 * @lpa: The value of the %MII_LPA register 3367 * 3368 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3369 * clause 37 negotiation and/or SGMII control. 3370 * 3371 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 3372 * the phylink @state structure. This is suitable to be used for implementing 3373 * the mac_pcs_get_state() member of the struct phylink_mac_ops structure if 3374 * accessing @bmsr and @lpa cannot be done with MDIO directly. 3375 */ 3376 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 3377 u16 bmsr, u16 lpa) 3378 { 3379 state->link = !!(bmsr & BMSR_LSTATUS); 3380 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 3381 /* If there is no link or autonegotiation is disabled, the LP advertisement 3382 * data is not meaningful, so don't go any further. 3383 */ 3384 if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3385 state->advertising)) 3386 return; 3387 3388 switch (state->interface) { 3389 case PHY_INTERFACE_MODE_1000BASEX: 3390 phylink_decode_c37_word(state, lpa, SPEED_1000); 3391 break; 3392 3393 case PHY_INTERFACE_MODE_2500BASEX: 3394 phylink_decode_c37_word(state, lpa, SPEED_2500); 3395 break; 3396 3397 case PHY_INTERFACE_MODE_SGMII: 3398 case PHY_INTERFACE_MODE_QSGMII: 3399 case PHY_INTERFACE_MODE_QUSGMII: 3400 phylink_decode_sgmii_word(state, lpa); 3401 break; 3402 3403 default: 3404 state->link = false; 3405 break; 3406 } 3407 } 3408 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 3409 3410 /** 3411 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 3412 * @pcs: a pointer to a &struct mdio_device. 3413 * @state: a pointer to a &struct phylink_link_state. 3414 * 3415 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3416 * clause 37 negotiation and/or SGMII control. 3417 * 3418 * Read the MAC PCS state from the MII device configured in @config and 3419 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 3420 * the phylink @state structure. This is suitable to be directly plugged 3421 * into the mac_pcs_get_state() member of the struct phylink_mac_ops 3422 * structure. 3423 */ 3424 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 3425 struct phylink_link_state *state) 3426 { 3427 int bmsr, lpa; 3428 3429 bmsr = mdiodev_read(pcs, MII_BMSR); 3430 lpa = mdiodev_read(pcs, MII_LPA); 3431 if (bmsr < 0 || lpa < 0) { 3432 state->link = false; 3433 return; 3434 } 3435 3436 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa); 3437 } 3438 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 3439 3440 /** 3441 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 3442 * advertisement 3443 * @interface: the PHY interface mode being configured 3444 * @advertising: the ethtool advertisement mask 3445 * 3446 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3447 * clause 37 negotiation and/or SGMII control. 3448 * 3449 * Encode the clause 37 PCS advertisement as specified by @interface and 3450 * @advertising. 3451 * 3452 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 3453 */ 3454 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 3455 const unsigned long *advertising) 3456 { 3457 u16 adv; 3458 3459 switch (interface) { 3460 case PHY_INTERFACE_MODE_1000BASEX: 3461 case PHY_INTERFACE_MODE_2500BASEX: 3462 adv = ADVERTISE_1000XFULL; 3463 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 3464 advertising)) 3465 adv |= ADVERTISE_1000XPAUSE; 3466 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 3467 advertising)) 3468 adv |= ADVERTISE_1000XPSE_ASYM; 3469 return adv; 3470 case PHY_INTERFACE_MODE_SGMII: 3471 case PHY_INTERFACE_MODE_QSGMII: 3472 return 0x0001; 3473 default: 3474 /* Nothing to do for other modes */ 3475 return -EINVAL; 3476 } 3477 } 3478 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 3479 3480 /** 3481 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 3482 * @pcs: a pointer to a &struct mdio_device. 3483 * @mode: link autonegotiation mode 3484 * @interface: the PHY interface mode being configured 3485 * @advertising: the ethtool advertisement mask 3486 * 3487 * Configure a Clause 22 PCS PHY with the appropriate negotiation 3488 * parameters for the @mode, @interface and @advertising parameters. 3489 * Returns negative error number on failure, zero if the advertisement 3490 * has not changed, or positive if there is a change. 3491 */ 3492 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, unsigned int mode, 3493 phy_interface_t interface, 3494 const unsigned long *advertising) 3495 { 3496 bool changed = 0; 3497 u16 bmcr; 3498 int ret, adv; 3499 3500 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 3501 if (adv >= 0) { 3502 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 3503 MII_ADVERTISE, 0xffff, adv); 3504 if (ret < 0) 3505 return ret; 3506 changed = ret; 3507 } 3508 3509 /* Ensure ISOLATE bit is disabled */ 3510 if (mode == MLO_AN_INBAND && 3511 (interface == PHY_INTERFACE_MODE_SGMII || 3512 interface == PHY_INTERFACE_MODE_QSGMII || 3513 linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, advertising))) 3514 bmcr = BMCR_ANENABLE; 3515 else 3516 bmcr = 0; 3517 3518 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 3519 if (ret < 0) 3520 return ret; 3521 3522 return changed; 3523 } 3524 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 3525 3526 /** 3527 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 3528 * @pcs: a pointer to a &struct mdio_device. 3529 * 3530 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3531 * clause 37 negotiation. 3532 * 3533 * Restart the clause 37 negotiation with the link partner. This is 3534 * suitable to be directly plugged into the mac_pcs_get_state() member 3535 * of the struct phylink_mac_ops structure. 3536 */ 3537 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 3538 { 3539 int val = mdiodev_read(pcs, MII_BMCR); 3540 3541 if (val >= 0) { 3542 val |= BMCR_ANRESTART; 3543 3544 mdiodev_write(pcs, MII_BMCR, val); 3545 } 3546 } 3547 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 3548 3549 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 3550 struct phylink_link_state *state) 3551 { 3552 struct mii_bus *bus = pcs->bus; 3553 int addr = pcs->addr; 3554 int stat; 3555 3556 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 3557 if (stat < 0) { 3558 state->link = false; 3559 return; 3560 } 3561 3562 state->link = !!(stat & MDIO_STAT1_LSTATUS); 3563 if (!state->link) 3564 return; 3565 3566 switch (state->interface) { 3567 case PHY_INTERFACE_MODE_10GBASER: 3568 state->speed = SPEED_10000; 3569 state->duplex = DUPLEX_FULL; 3570 break; 3571 3572 default: 3573 break; 3574 } 3575 } 3576 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 3577 3578 static int __init phylink_init(void) 3579 { 3580 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 3581 __set_bit(phylink_sfp_interface_preference[i], 3582 phylink_sfp_interfaces); 3583 3584 return 0; 3585 } 3586 3587 module_init(phylink_init); 3588 3589 MODULE_LICENSE("GPL v2"); 3590