1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "sfp.h" 24 #include "swphy.h" 25 26 #define SUPPORTED_INTERFACES \ 27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 29 #define ADVERTISED_INTERFACES \ 30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 32 33 enum { 34 PHYLINK_DISABLE_STOPPED, 35 PHYLINK_DISABLE_LINK, 36 PHYLINK_DISABLE_MAC_WOL, 37 }; 38 39 /** 40 * struct phylink - internal data type for phylink 41 */ 42 struct phylink { 43 /* private: */ 44 struct net_device *netdev; 45 const struct phylink_mac_ops *mac_ops; 46 struct phylink_config *config; 47 struct phylink_pcs *pcs; 48 struct device *dev; 49 unsigned int old_link_state:1; 50 51 unsigned long phylink_disable_state; /* bitmask of disables */ 52 struct phy_device *phydev; 53 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 54 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 55 u8 cur_link_an_mode; 56 u8 link_port; /* The current non-phy ethtool port */ 57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 58 59 /* The link configuration settings */ 60 struct phylink_link_state link_config; 61 62 /* The current settings */ 63 phy_interface_t cur_interface; 64 65 struct gpio_desc *link_gpio; 66 unsigned int link_irq; 67 struct timer_list link_poll; 68 void (*get_fixed_state)(struct net_device *dev, 69 struct phylink_link_state *s); 70 71 struct mutex state_mutex; 72 struct phylink_link_state phy_state; 73 struct work_struct resolve; 74 75 bool mac_link_dropped; 76 bool using_mac_select_pcs; 77 78 struct sfp_bus *sfp_bus; 79 bool sfp_may_have_phy; 80 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 81 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 82 u8 sfp_port; 83 }; 84 85 #define phylink_printk(level, pl, fmt, ...) \ 86 do { \ 87 if ((pl)->config->type == PHYLINK_NETDEV) \ 88 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 89 else if ((pl)->config->type == PHYLINK_DEV) \ 90 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 91 } while (0) 92 93 #define phylink_err(pl, fmt, ...) \ 94 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 95 #define phylink_warn(pl, fmt, ...) \ 96 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 97 #define phylink_info(pl, fmt, ...) \ 98 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 99 #if defined(CONFIG_DYNAMIC_DEBUG) 100 #define phylink_dbg(pl, fmt, ...) \ 101 do { \ 102 if ((pl)->config->type == PHYLINK_NETDEV) \ 103 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 104 else if ((pl)->config->type == PHYLINK_DEV) \ 105 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 106 } while (0) 107 #elif defined(DEBUG) 108 #define phylink_dbg(pl, fmt, ...) \ 109 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 110 #else 111 #define phylink_dbg(pl, fmt, ...) \ 112 ({ \ 113 if (0) \ 114 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 115 }) 116 #endif 117 118 /** 119 * phylink_set_port_modes() - set the port type modes in the ethtool mask 120 * @mask: ethtool link mode mask 121 * 122 * Sets all the port type modes in the ethtool mask. MAC drivers should 123 * use this in their 'validate' callback. 124 */ 125 void phylink_set_port_modes(unsigned long *mask) 126 { 127 phylink_set(mask, TP); 128 phylink_set(mask, AUI); 129 phylink_set(mask, MII); 130 phylink_set(mask, FIBRE); 131 phylink_set(mask, BNC); 132 phylink_set(mask, Backplane); 133 } 134 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 135 136 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 137 { 138 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 139 140 phylink_set_port_modes(tmp); 141 phylink_set(tmp, Autoneg); 142 phylink_set(tmp, Pause); 143 phylink_set(tmp, Asym_Pause); 144 145 return linkmode_subset(linkmode, tmp); 146 } 147 148 static const char *phylink_an_mode_str(unsigned int mode) 149 { 150 static const char *modestr[] = { 151 [MLO_AN_PHY] = "phy", 152 [MLO_AN_FIXED] = "fixed", 153 [MLO_AN_INBAND] = "inband", 154 }; 155 156 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 157 } 158 159 /** 160 * phylink_interface_max_speed() - get the maximum speed of a phy interface 161 * @interface: phy interface mode defined by &typedef phy_interface_t 162 * 163 * Determine the maximum speed of a phy interface. This is intended to help 164 * determine the correct speed to pass to the MAC when the phy is performing 165 * rate matching. 166 * 167 * Return: The maximum speed of @interface 168 */ 169 static int phylink_interface_max_speed(phy_interface_t interface) 170 { 171 switch (interface) { 172 case PHY_INTERFACE_MODE_100BASEX: 173 case PHY_INTERFACE_MODE_REVRMII: 174 case PHY_INTERFACE_MODE_RMII: 175 case PHY_INTERFACE_MODE_SMII: 176 case PHY_INTERFACE_MODE_REVMII: 177 case PHY_INTERFACE_MODE_MII: 178 return SPEED_100; 179 180 case PHY_INTERFACE_MODE_TBI: 181 case PHY_INTERFACE_MODE_MOCA: 182 case PHY_INTERFACE_MODE_RTBI: 183 case PHY_INTERFACE_MODE_1000BASEX: 184 case PHY_INTERFACE_MODE_1000BASEKX: 185 case PHY_INTERFACE_MODE_TRGMII: 186 case PHY_INTERFACE_MODE_RGMII_TXID: 187 case PHY_INTERFACE_MODE_RGMII_RXID: 188 case PHY_INTERFACE_MODE_RGMII_ID: 189 case PHY_INTERFACE_MODE_RGMII: 190 case PHY_INTERFACE_MODE_QSGMII: 191 case PHY_INTERFACE_MODE_SGMII: 192 case PHY_INTERFACE_MODE_GMII: 193 return SPEED_1000; 194 195 case PHY_INTERFACE_MODE_2500BASEX: 196 return SPEED_2500; 197 198 case PHY_INTERFACE_MODE_5GBASER: 199 return SPEED_5000; 200 201 case PHY_INTERFACE_MODE_XGMII: 202 case PHY_INTERFACE_MODE_RXAUI: 203 case PHY_INTERFACE_MODE_XAUI: 204 case PHY_INTERFACE_MODE_10GBASER: 205 case PHY_INTERFACE_MODE_10GKR: 206 case PHY_INTERFACE_MODE_USXGMII: 207 case PHY_INTERFACE_MODE_QUSGMII: 208 return SPEED_10000; 209 210 case PHY_INTERFACE_MODE_25GBASER: 211 return SPEED_25000; 212 213 case PHY_INTERFACE_MODE_XLGMII: 214 return SPEED_40000; 215 216 case PHY_INTERFACE_MODE_INTERNAL: 217 case PHY_INTERFACE_MODE_NA: 218 case PHY_INTERFACE_MODE_MAX: 219 /* No idea! Garbage in, unknown out */ 220 return SPEED_UNKNOWN; 221 } 222 223 /* If we get here, someone forgot to add an interface mode above */ 224 WARN_ON_ONCE(1); 225 return SPEED_UNKNOWN; 226 } 227 228 /** 229 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 230 * @linkmodes: ethtool linkmode mask (must be already initialised) 231 * @caps: bitmask of MAC capabilities 232 * 233 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 234 * supported by the @caps. @linkmodes must have been initialised previously. 235 */ 236 void phylink_caps_to_linkmodes(unsigned long *linkmodes, unsigned long caps) 237 { 238 if (caps & MAC_SYM_PAUSE) 239 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 240 241 if (caps & MAC_ASYM_PAUSE) 242 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 243 244 if (caps & MAC_10HD) 245 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes); 246 247 if (caps & MAC_10FD) { 248 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes); 249 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes); 250 } 251 252 if (caps & MAC_100HD) { 253 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes); 254 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes); 255 } 256 257 if (caps & MAC_100FD) { 258 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes); 259 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes); 260 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes); 261 } 262 263 if (caps & MAC_1000HD) 264 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes); 265 266 if (caps & MAC_1000FD) { 267 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes); 268 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes); 269 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes); 270 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes); 271 } 272 273 if (caps & MAC_2500FD) { 274 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes); 275 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes); 276 } 277 278 if (caps & MAC_5000FD) 279 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes); 280 281 if (caps & MAC_10000FD) { 282 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes); 283 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes); 284 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes); 285 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes); 286 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes); 287 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes); 288 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes); 289 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes); 290 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes); 291 } 292 293 if (caps & MAC_25000FD) { 294 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes); 295 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes); 296 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes); 297 } 298 299 if (caps & MAC_40000FD) { 300 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes); 301 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes); 302 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes); 303 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes); 304 } 305 306 if (caps & MAC_50000FD) { 307 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes); 308 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes); 309 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes); 310 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes); 311 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes); 312 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes); 313 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 314 linkmodes); 315 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes); 316 } 317 318 if (caps & MAC_56000FD) { 319 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes); 320 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes); 321 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes); 322 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes); 323 } 324 325 if (caps & MAC_100000FD) { 326 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes); 327 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes); 328 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes); 329 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 330 linkmodes); 331 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes); 332 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes); 333 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes); 334 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 335 linkmodes); 336 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes); 337 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes); 338 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes); 339 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 340 linkmodes); 341 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes); 342 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes); 343 } 344 345 if (caps & MAC_200000FD) { 346 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes); 347 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes); 348 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 349 linkmodes); 350 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes); 351 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes); 352 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes); 353 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes); 354 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 355 linkmodes); 356 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes); 357 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes); 358 } 359 360 if (caps & MAC_400000FD) { 361 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes); 362 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes); 363 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 364 linkmodes); 365 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes); 366 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes); 367 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes); 368 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes); 369 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 370 linkmodes); 371 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes); 372 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes); 373 } 374 } 375 EXPORT_SYMBOL_GPL(phylink_caps_to_linkmodes); 376 377 static struct { 378 unsigned long mask; 379 int speed; 380 unsigned int duplex; 381 } phylink_caps_params[] = { 382 { MAC_400000FD, SPEED_400000, DUPLEX_FULL }, 383 { MAC_200000FD, SPEED_200000, DUPLEX_FULL }, 384 { MAC_100000FD, SPEED_100000, DUPLEX_FULL }, 385 { MAC_56000FD, SPEED_56000, DUPLEX_FULL }, 386 { MAC_50000FD, SPEED_50000, DUPLEX_FULL }, 387 { MAC_40000FD, SPEED_40000, DUPLEX_FULL }, 388 { MAC_25000FD, SPEED_25000, DUPLEX_FULL }, 389 { MAC_20000FD, SPEED_20000, DUPLEX_FULL }, 390 { MAC_10000FD, SPEED_10000, DUPLEX_FULL }, 391 { MAC_5000FD, SPEED_5000, DUPLEX_FULL }, 392 { MAC_2500FD, SPEED_2500, DUPLEX_FULL }, 393 { MAC_1000FD, SPEED_1000, DUPLEX_FULL }, 394 { MAC_1000HD, SPEED_1000, DUPLEX_HALF }, 395 { MAC_100FD, SPEED_100, DUPLEX_FULL }, 396 { MAC_100HD, SPEED_100, DUPLEX_HALF }, 397 { MAC_10FD, SPEED_10, DUPLEX_FULL }, 398 { MAC_10HD, SPEED_10, DUPLEX_HALF }, 399 }; 400 401 /** 402 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 403 * @speed: the speed to search for 404 * @duplex: the duplex to search for 405 * 406 * Find the mac capability for a given speed and duplex. 407 * 408 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 409 * there were no matches. 410 */ 411 static unsigned long phylink_cap_from_speed_duplex(int speed, 412 unsigned int duplex) 413 { 414 int i; 415 416 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 417 if (speed == phylink_caps_params[i].speed && 418 duplex == phylink_caps_params[i].duplex) 419 return phylink_caps_params[i].mask; 420 } 421 422 return 0; 423 } 424 425 /** 426 * phylink_get_capabilities() - get capabilities for a given MAC 427 * @interface: phy interface mode defined by &typedef phy_interface_t 428 * @mac_capabilities: bitmask of MAC capabilities 429 * @rate_matching: type of rate matching being performed 430 * 431 * Get the MAC capabilities that are supported by the @interface mode and 432 * @mac_capabilities. 433 */ 434 unsigned long phylink_get_capabilities(phy_interface_t interface, 435 unsigned long mac_capabilities, 436 int rate_matching) 437 { 438 int max_speed = phylink_interface_max_speed(interface); 439 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 440 unsigned long matched_caps = 0; 441 442 switch (interface) { 443 case PHY_INTERFACE_MODE_USXGMII: 444 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD; 445 fallthrough; 446 447 case PHY_INTERFACE_MODE_RGMII_TXID: 448 case PHY_INTERFACE_MODE_RGMII_RXID: 449 case PHY_INTERFACE_MODE_RGMII_ID: 450 case PHY_INTERFACE_MODE_RGMII: 451 case PHY_INTERFACE_MODE_QSGMII: 452 case PHY_INTERFACE_MODE_QUSGMII: 453 case PHY_INTERFACE_MODE_SGMII: 454 case PHY_INTERFACE_MODE_GMII: 455 caps |= MAC_1000HD | MAC_1000FD; 456 fallthrough; 457 458 case PHY_INTERFACE_MODE_REVRMII: 459 case PHY_INTERFACE_MODE_RMII: 460 case PHY_INTERFACE_MODE_SMII: 461 case PHY_INTERFACE_MODE_REVMII: 462 case PHY_INTERFACE_MODE_MII: 463 caps |= MAC_10HD | MAC_10FD; 464 fallthrough; 465 466 case PHY_INTERFACE_MODE_100BASEX: 467 caps |= MAC_100HD | MAC_100FD; 468 break; 469 470 case PHY_INTERFACE_MODE_TBI: 471 case PHY_INTERFACE_MODE_MOCA: 472 case PHY_INTERFACE_MODE_RTBI: 473 case PHY_INTERFACE_MODE_1000BASEX: 474 caps |= MAC_1000HD; 475 fallthrough; 476 case PHY_INTERFACE_MODE_1000BASEKX: 477 case PHY_INTERFACE_MODE_TRGMII: 478 caps |= MAC_1000FD; 479 break; 480 481 case PHY_INTERFACE_MODE_2500BASEX: 482 caps |= MAC_2500FD; 483 break; 484 485 case PHY_INTERFACE_MODE_5GBASER: 486 caps |= MAC_5000FD; 487 break; 488 489 case PHY_INTERFACE_MODE_XGMII: 490 case PHY_INTERFACE_MODE_RXAUI: 491 case PHY_INTERFACE_MODE_XAUI: 492 case PHY_INTERFACE_MODE_10GBASER: 493 case PHY_INTERFACE_MODE_10GKR: 494 caps |= MAC_10000FD; 495 break; 496 497 case PHY_INTERFACE_MODE_25GBASER: 498 caps |= MAC_25000FD; 499 break; 500 501 case PHY_INTERFACE_MODE_XLGMII: 502 caps |= MAC_40000FD; 503 break; 504 505 case PHY_INTERFACE_MODE_INTERNAL: 506 caps |= ~0; 507 break; 508 509 case PHY_INTERFACE_MODE_NA: 510 case PHY_INTERFACE_MODE_MAX: 511 break; 512 } 513 514 switch (rate_matching) { 515 case RATE_MATCH_OPEN_LOOP: 516 /* TODO */ 517 fallthrough; 518 case RATE_MATCH_NONE: 519 matched_caps = 0; 520 break; 521 case RATE_MATCH_PAUSE: { 522 /* The MAC must support asymmetric pause towards the local 523 * device for this. We could allow just symmetric pause, but 524 * then we might have to renegotiate if the link partner 525 * doesn't support pause. This is because there's no way to 526 * accept pause frames without transmitting them if we only 527 * support symmetric pause. 528 */ 529 if (!(mac_capabilities & MAC_SYM_PAUSE) || 530 !(mac_capabilities & MAC_ASYM_PAUSE)) 531 break; 532 533 /* We can't adapt if the MAC doesn't support the interface's 534 * max speed at full duplex. 535 */ 536 if (mac_capabilities & 537 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) { 538 /* Although a duplex-matching phy might exist, we 539 * conservatively remove these modes because the MAC 540 * will not be aware of the half-duplex nature of the 541 * link. 542 */ 543 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 544 matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD); 545 } 546 break; 547 } 548 case RATE_MATCH_CRS: 549 /* The MAC must support half duplex at the interface's max 550 * speed. 551 */ 552 if (mac_capabilities & 553 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 554 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 555 matched_caps &= mac_capabilities; 556 } 557 break; 558 } 559 560 return (caps & mac_capabilities) | matched_caps; 561 } 562 EXPORT_SYMBOL_GPL(phylink_get_capabilities); 563 564 /** 565 * phylink_generic_validate() - generic validate() callback implementation 566 * @config: a pointer to a &struct phylink_config. 567 * @supported: ethtool bitmask for supported link modes. 568 * @state: a pointer to a &struct phylink_link_state. 569 * 570 * Generic implementation of the validate() callback that MAC drivers can 571 * use when they pass the range of supported interfaces and MAC capabilities. 572 * This makes use of phylink_get_linkmodes(). 573 */ 574 void phylink_generic_validate(struct phylink_config *config, 575 unsigned long *supported, 576 struct phylink_link_state *state) 577 { 578 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 579 unsigned long caps; 580 581 phylink_set_port_modes(mask); 582 phylink_set(mask, Autoneg); 583 caps = phylink_get_capabilities(state->interface, 584 config->mac_capabilities, 585 state->rate_matching); 586 phylink_caps_to_linkmodes(mask, caps); 587 588 linkmode_and(supported, supported, mask); 589 linkmode_and(state->advertising, state->advertising, mask); 590 } 591 EXPORT_SYMBOL_GPL(phylink_generic_validate); 592 593 static int phylink_validate_mac_and_pcs(struct phylink *pl, 594 unsigned long *supported, 595 struct phylink_link_state *state) 596 { 597 struct phylink_pcs *pcs; 598 int ret; 599 600 /* Get the PCS for this interface mode */ 601 if (pl->using_mac_select_pcs) { 602 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 603 if (IS_ERR(pcs)) 604 return PTR_ERR(pcs); 605 } else { 606 pcs = pl->pcs; 607 } 608 609 if (pcs) { 610 /* The PCS, if present, must be setup before phylink_create() 611 * has been called. If the ops is not initialised, print an 612 * error and backtrace rather than oopsing the kernel. 613 */ 614 if (!pcs->ops) { 615 phylink_err(pl, "interface %s: uninitialised PCS\n", 616 phy_modes(state->interface)); 617 dump_stack(); 618 return -EINVAL; 619 } 620 621 /* Validate the link parameters with the PCS */ 622 if (pcs->ops->pcs_validate) { 623 ret = pcs->ops->pcs_validate(pcs, supported, state); 624 if (ret < 0 || phylink_is_empty_linkmode(supported)) 625 return -EINVAL; 626 627 /* Ensure the advertising mask is a subset of the 628 * supported mask. 629 */ 630 linkmode_and(state->advertising, state->advertising, 631 supported); 632 } 633 } 634 635 /* Then validate the link parameters with the MAC */ 636 pl->mac_ops->validate(pl->config, supported, state); 637 638 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 639 } 640 641 static int phylink_validate_mask(struct phylink *pl, unsigned long *supported, 642 struct phylink_link_state *state, 643 const unsigned long *interfaces) 644 { 645 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 646 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 647 __ETHTOOL_DECLARE_LINK_MODE_MASK(s); 648 struct phylink_link_state t; 649 int intf; 650 651 for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) { 652 if (test_bit(intf, interfaces)) { 653 linkmode_copy(s, supported); 654 655 t = *state; 656 t.interface = intf; 657 if (!phylink_validate_mac_and_pcs(pl, s, &t)) { 658 linkmode_or(all_s, all_s, s); 659 linkmode_or(all_adv, all_adv, t.advertising); 660 } 661 } 662 } 663 664 linkmode_copy(supported, all_s); 665 linkmode_copy(state->advertising, all_adv); 666 667 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 668 } 669 670 static int phylink_validate(struct phylink *pl, unsigned long *supported, 671 struct phylink_link_state *state) 672 { 673 const unsigned long *interfaces = pl->config->supported_interfaces; 674 675 if (!phy_interface_empty(interfaces)) { 676 if (state->interface == PHY_INTERFACE_MODE_NA) 677 return phylink_validate_mask(pl, supported, state, 678 interfaces); 679 680 if (!test_bit(state->interface, interfaces)) 681 return -EINVAL; 682 } 683 684 return phylink_validate_mac_and_pcs(pl, supported, state); 685 } 686 687 static int phylink_parse_fixedlink(struct phylink *pl, 688 struct fwnode_handle *fwnode) 689 { 690 struct fwnode_handle *fixed_node; 691 const struct phy_setting *s; 692 struct gpio_desc *desc; 693 u32 speed; 694 int ret; 695 696 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 697 if (fixed_node) { 698 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 699 700 pl->link_config.speed = speed; 701 pl->link_config.duplex = DUPLEX_HALF; 702 703 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 704 pl->link_config.duplex = DUPLEX_FULL; 705 706 /* We treat the "pause" and "asym-pause" terminology as 707 * defining the link partner's ability. 708 */ 709 if (fwnode_property_read_bool(fixed_node, "pause")) 710 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 711 pl->link_config.lp_advertising); 712 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 713 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 714 pl->link_config.lp_advertising); 715 716 if (ret == 0) { 717 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 718 GPIOD_IN, "?"); 719 720 if (!IS_ERR(desc)) 721 pl->link_gpio = desc; 722 else if (desc == ERR_PTR(-EPROBE_DEFER)) 723 ret = -EPROBE_DEFER; 724 } 725 fwnode_handle_put(fixed_node); 726 727 if (ret) 728 return ret; 729 } else { 730 u32 prop[5]; 731 732 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 733 NULL, 0); 734 if (ret != ARRAY_SIZE(prop)) { 735 phylink_err(pl, "broken fixed-link?\n"); 736 return -EINVAL; 737 } 738 739 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 740 prop, ARRAY_SIZE(prop)); 741 if (!ret) { 742 pl->link_config.duplex = prop[1] ? 743 DUPLEX_FULL : DUPLEX_HALF; 744 pl->link_config.speed = prop[2]; 745 if (prop[3]) 746 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 747 pl->link_config.lp_advertising); 748 if (prop[4]) 749 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 750 pl->link_config.lp_advertising); 751 } 752 } 753 754 if (pl->link_config.speed > SPEED_1000 && 755 pl->link_config.duplex != DUPLEX_FULL) 756 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 757 pl->link_config.speed); 758 759 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 760 linkmode_copy(pl->link_config.advertising, pl->supported); 761 phylink_validate(pl, pl->supported, &pl->link_config); 762 763 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, 764 pl->supported, true); 765 linkmode_zero(pl->supported); 766 phylink_set(pl->supported, MII); 767 phylink_set(pl->supported, Pause); 768 phylink_set(pl->supported, Asym_Pause); 769 phylink_set(pl->supported, Autoneg); 770 if (s) { 771 __set_bit(s->bit, pl->supported); 772 __set_bit(s->bit, pl->link_config.lp_advertising); 773 } else { 774 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 775 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 776 pl->link_config.speed); 777 } 778 779 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 780 pl->supported); 781 782 pl->link_config.link = 1; 783 pl->link_config.an_complete = 1; 784 785 return 0; 786 } 787 788 static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode) 789 { 790 struct fwnode_handle *dn; 791 const char *managed; 792 793 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 794 if (dn || fwnode_property_present(fwnode, "fixed-link")) 795 pl->cfg_link_an_mode = MLO_AN_FIXED; 796 fwnode_handle_put(dn); 797 798 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 799 strcmp(managed, "in-band-status") == 0) || 800 pl->config->ovr_an_inband) { 801 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 802 phylink_err(pl, 803 "can't use both fixed-link and in-band-status\n"); 804 return -EINVAL; 805 } 806 807 linkmode_zero(pl->supported); 808 phylink_set(pl->supported, MII); 809 phylink_set(pl->supported, Autoneg); 810 phylink_set(pl->supported, Asym_Pause); 811 phylink_set(pl->supported, Pause); 812 pl->link_config.an_enabled = true; 813 pl->cfg_link_an_mode = MLO_AN_INBAND; 814 815 switch (pl->link_config.interface) { 816 case PHY_INTERFACE_MODE_SGMII: 817 case PHY_INTERFACE_MODE_QSGMII: 818 case PHY_INTERFACE_MODE_QUSGMII: 819 case PHY_INTERFACE_MODE_RGMII: 820 case PHY_INTERFACE_MODE_RGMII_ID: 821 case PHY_INTERFACE_MODE_RGMII_RXID: 822 case PHY_INTERFACE_MODE_RGMII_TXID: 823 case PHY_INTERFACE_MODE_RTBI: 824 phylink_set(pl->supported, 10baseT_Half); 825 phylink_set(pl->supported, 10baseT_Full); 826 phylink_set(pl->supported, 100baseT_Half); 827 phylink_set(pl->supported, 100baseT_Full); 828 phylink_set(pl->supported, 1000baseT_Half); 829 phylink_set(pl->supported, 1000baseT_Full); 830 break; 831 832 case PHY_INTERFACE_MODE_1000BASEX: 833 phylink_set(pl->supported, 1000baseX_Full); 834 break; 835 836 case PHY_INTERFACE_MODE_2500BASEX: 837 phylink_set(pl->supported, 2500baseX_Full); 838 break; 839 840 case PHY_INTERFACE_MODE_5GBASER: 841 phylink_set(pl->supported, 5000baseT_Full); 842 break; 843 844 case PHY_INTERFACE_MODE_25GBASER: 845 phylink_set(pl->supported, 25000baseCR_Full); 846 phylink_set(pl->supported, 25000baseKR_Full); 847 phylink_set(pl->supported, 25000baseSR_Full); 848 fallthrough; 849 case PHY_INTERFACE_MODE_USXGMII: 850 case PHY_INTERFACE_MODE_10GKR: 851 case PHY_INTERFACE_MODE_10GBASER: 852 phylink_set(pl->supported, 10baseT_Half); 853 phylink_set(pl->supported, 10baseT_Full); 854 phylink_set(pl->supported, 100baseT_Half); 855 phylink_set(pl->supported, 100baseT_Full); 856 phylink_set(pl->supported, 1000baseT_Half); 857 phylink_set(pl->supported, 1000baseT_Full); 858 phylink_set(pl->supported, 1000baseX_Full); 859 phylink_set(pl->supported, 1000baseKX_Full); 860 phylink_set(pl->supported, 2500baseT_Full); 861 phylink_set(pl->supported, 2500baseX_Full); 862 phylink_set(pl->supported, 5000baseT_Full); 863 phylink_set(pl->supported, 10000baseT_Full); 864 phylink_set(pl->supported, 10000baseKR_Full); 865 phylink_set(pl->supported, 10000baseKX4_Full); 866 phylink_set(pl->supported, 10000baseCR_Full); 867 phylink_set(pl->supported, 10000baseSR_Full); 868 phylink_set(pl->supported, 10000baseLR_Full); 869 phylink_set(pl->supported, 10000baseLRM_Full); 870 phylink_set(pl->supported, 10000baseER_Full); 871 break; 872 873 case PHY_INTERFACE_MODE_XLGMII: 874 phylink_set(pl->supported, 25000baseCR_Full); 875 phylink_set(pl->supported, 25000baseKR_Full); 876 phylink_set(pl->supported, 25000baseSR_Full); 877 phylink_set(pl->supported, 40000baseKR4_Full); 878 phylink_set(pl->supported, 40000baseCR4_Full); 879 phylink_set(pl->supported, 40000baseSR4_Full); 880 phylink_set(pl->supported, 40000baseLR4_Full); 881 phylink_set(pl->supported, 50000baseCR2_Full); 882 phylink_set(pl->supported, 50000baseKR2_Full); 883 phylink_set(pl->supported, 50000baseSR2_Full); 884 phylink_set(pl->supported, 50000baseKR_Full); 885 phylink_set(pl->supported, 50000baseSR_Full); 886 phylink_set(pl->supported, 50000baseCR_Full); 887 phylink_set(pl->supported, 50000baseLR_ER_FR_Full); 888 phylink_set(pl->supported, 50000baseDR_Full); 889 phylink_set(pl->supported, 100000baseKR4_Full); 890 phylink_set(pl->supported, 100000baseSR4_Full); 891 phylink_set(pl->supported, 100000baseCR4_Full); 892 phylink_set(pl->supported, 100000baseLR4_ER4_Full); 893 phylink_set(pl->supported, 100000baseKR2_Full); 894 phylink_set(pl->supported, 100000baseSR2_Full); 895 phylink_set(pl->supported, 100000baseCR2_Full); 896 phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full); 897 phylink_set(pl->supported, 100000baseDR2_Full); 898 break; 899 900 default: 901 phylink_err(pl, 902 "incorrect link mode %s for in-band status\n", 903 phy_modes(pl->link_config.interface)); 904 return -EINVAL; 905 } 906 907 linkmode_copy(pl->link_config.advertising, pl->supported); 908 909 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 910 phylink_err(pl, 911 "failed to validate link configuration for in-band status\n"); 912 return -EINVAL; 913 } 914 915 /* Check if MAC/PCS also supports Autoneg. */ 916 pl->link_config.an_enabled = phylink_test(pl->supported, Autoneg); 917 } 918 919 return 0; 920 } 921 922 static void phylink_apply_manual_flow(struct phylink *pl, 923 struct phylink_link_state *state) 924 { 925 /* If autoneg is disabled, pause AN is also disabled */ 926 if (!state->an_enabled) 927 state->pause &= ~MLO_PAUSE_AN; 928 929 /* Manual configuration of pause modes */ 930 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 931 state->pause = pl->link_config.pause; 932 } 933 934 static void phylink_resolve_flow(struct phylink_link_state *state) 935 { 936 bool tx_pause, rx_pause; 937 938 state->pause = MLO_PAUSE_NONE; 939 if (state->duplex == DUPLEX_FULL) { 940 linkmode_resolve_pause(state->advertising, 941 state->lp_advertising, 942 &tx_pause, &rx_pause); 943 if (tx_pause) 944 state->pause |= MLO_PAUSE_TX; 945 if (rx_pause) 946 state->pause |= MLO_PAUSE_RX; 947 } 948 } 949 950 static void phylink_pcs_poll_stop(struct phylink *pl) 951 { 952 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 953 del_timer(&pl->link_poll); 954 } 955 956 static void phylink_pcs_poll_start(struct phylink *pl) 957 { 958 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 959 mod_timer(&pl->link_poll, jiffies + HZ); 960 } 961 962 static void phylink_mac_config(struct phylink *pl, 963 const struct phylink_link_state *state) 964 { 965 phylink_dbg(pl, 966 "%s: mode=%s/%s/%s/%s/%s adv=%*pb pause=%02x link=%u an=%u\n", 967 __func__, phylink_an_mode_str(pl->cur_link_an_mode), 968 phy_modes(state->interface), 969 phy_speed_to_str(state->speed), 970 phy_duplex_to_str(state->duplex), 971 phy_rate_matching_to_str(state->rate_matching), 972 __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising, 973 state->pause, state->link, state->an_enabled); 974 975 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, state); 976 } 977 978 static void phylink_mac_pcs_an_restart(struct phylink *pl) 979 { 980 if (pl->link_config.an_enabled && 981 phy_interface_mode_is_8023z(pl->link_config.interface) && 982 phylink_autoneg_inband(pl->cur_link_an_mode)) { 983 if (pl->pcs) 984 pl->pcs->ops->pcs_an_restart(pl->pcs); 985 else if (pl->config->legacy_pre_march2020) 986 pl->mac_ops->mac_an_restart(pl->config); 987 } 988 } 989 990 static void phylink_major_config(struct phylink *pl, bool restart, 991 const struct phylink_link_state *state) 992 { 993 struct phylink_pcs *pcs = NULL; 994 bool pcs_changed = false; 995 int err; 996 997 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); 998 999 if (pl->using_mac_select_pcs) { 1000 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1001 if (IS_ERR(pcs)) { 1002 phylink_err(pl, 1003 "mac_select_pcs unexpectedly failed: %pe\n", 1004 pcs); 1005 return; 1006 } 1007 1008 pcs_changed = pcs && pl->pcs != pcs; 1009 } 1010 1011 phylink_pcs_poll_stop(pl); 1012 1013 if (pl->mac_ops->mac_prepare) { 1014 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode, 1015 state->interface); 1016 if (err < 0) { 1017 phylink_err(pl, "mac_prepare failed: %pe\n", 1018 ERR_PTR(err)); 1019 return; 1020 } 1021 } 1022 1023 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1024 * for the change. 1025 */ 1026 if (pcs_changed) 1027 pl->pcs = pcs; 1028 1029 phylink_mac_config(pl, state); 1030 1031 if (pl->pcs) { 1032 err = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode, 1033 state->interface, 1034 state->advertising, 1035 !!(pl->link_config.pause & 1036 MLO_PAUSE_AN)); 1037 if (err < 0) 1038 phylink_err(pl, "pcs_config failed: %pe\n", 1039 ERR_PTR(err)); 1040 if (err > 0) 1041 restart = true; 1042 } 1043 if (restart) 1044 phylink_mac_pcs_an_restart(pl); 1045 1046 if (pl->mac_ops->mac_finish) { 1047 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode, 1048 state->interface); 1049 if (err < 0) 1050 phylink_err(pl, "mac_finish failed: %pe\n", 1051 ERR_PTR(err)); 1052 } 1053 1054 phylink_pcs_poll_start(pl); 1055 } 1056 1057 /* 1058 * Reconfigure for a change of inband advertisement. 1059 * If we have a separate PCS, we only need to call its pcs_config() method, 1060 * and then restart AN if it indicates something changed. Otherwise, we do 1061 * the full MAC reconfiguration. 1062 */ 1063 static int phylink_change_inband_advert(struct phylink *pl) 1064 { 1065 int ret; 1066 1067 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1068 return 0; 1069 1070 if (!pl->pcs && pl->config->legacy_pre_march2020) { 1071 /* Legacy method */ 1072 phylink_mac_config(pl, &pl->link_config); 1073 phylink_mac_pcs_an_restart(pl); 1074 return 0; 1075 } 1076 1077 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1078 phylink_an_mode_str(pl->cur_link_an_mode), 1079 phy_modes(pl->link_config.interface), 1080 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1081 pl->link_config.pause); 1082 1083 /* Modern PCS-based method; update the advert at the PCS, and 1084 * restart negotiation if the pcs_config() helper indicates that 1085 * the programmed advertisement has changed. 1086 */ 1087 ret = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode, 1088 pl->link_config.interface, 1089 pl->link_config.advertising, 1090 !!(pl->link_config.pause & 1091 MLO_PAUSE_AN)); 1092 if (ret < 0) 1093 return ret; 1094 1095 if (ret > 0) 1096 phylink_mac_pcs_an_restart(pl); 1097 1098 return 0; 1099 } 1100 1101 static void phylink_mac_pcs_get_state(struct phylink *pl, 1102 struct phylink_link_state *state) 1103 { 1104 linkmode_copy(state->advertising, pl->link_config.advertising); 1105 linkmode_zero(state->lp_advertising); 1106 state->interface = pl->link_config.interface; 1107 state->an_enabled = pl->link_config.an_enabled; 1108 state->rate_matching = pl->link_config.rate_matching; 1109 if (state->an_enabled) { 1110 state->speed = SPEED_UNKNOWN; 1111 state->duplex = DUPLEX_UNKNOWN; 1112 state->pause = MLO_PAUSE_NONE; 1113 } else { 1114 state->speed = pl->link_config.speed; 1115 state->duplex = pl->link_config.duplex; 1116 state->pause = pl->link_config.pause; 1117 } 1118 state->an_complete = 0; 1119 state->link = 1; 1120 1121 if (pl->pcs) 1122 pl->pcs->ops->pcs_get_state(pl->pcs, state); 1123 else if (pl->mac_ops->mac_pcs_get_state && 1124 pl->config->legacy_pre_march2020) 1125 pl->mac_ops->mac_pcs_get_state(pl->config, state); 1126 else 1127 state->link = 0; 1128 } 1129 1130 /* The fixed state is... fixed except for the link state, 1131 * which may be determined by a GPIO or a callback. 1132 */ 1133 static void phylink_get_fixed_state(struct phylink *pl, 1134 struct phylink_link_state *state) 1135 { 1136 *state = pl->link_config; 1137 if (pl->config->get_fixed_state) 1138 pl->config->get_fixed_state(pl->config, state); 1139 else if (pl->link_gpio) 1140 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1141 1142 phylink_resolve_flow(state); 1143 } 1144 1145 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1146 { 1147 struct phylink_link_state link_state; 1148 1149 switch (pl->cur_link_an_mode) { 1150 case MLO_AN_PHY: 1151 link_state = pl->phy_state; 1152 break; 1153 1154 case MLO_AN_FIXED: 1155 phylink_get_fixed_state(pl, &link_state); 1156 break; 1157 1158 case MLO_AN_INBAND: 1159 link_state = pl->link_config; 1160 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1161 link_state.pause = MLO_PAUSE_NONE; 1162 break; 1163 1164 default: /* can't happen */ 1165 return; 1166 } 1167 1168 link_state.link = false; 1169 1170 phylink_apply_manual_flow(pl, &link_state); 1171 phylink_major_config(pl, force_restart, &link_state); 1172 } 1173 1174 static const char *phylink_pause_to_str(int pause) 1175 { 1176 switch (pause & MLO_PAUSE_TXRX_MASK) { 1177 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1178 return "rx/tx"; 1179 case MLO_PAUSE_TX: 1180 return "tx"; 1181 case MLO_PAUSE_RX: 1182 return "rx"; 1183 default: 1184 return "off"; 1185 } 1186 } 1187 1188 static void phylink_link_up(struct phylink *pl, 1189 struct phylink_link_state link_state) 1190 { 1191 struct net_device *ndev = pl->netdev; 1192 int speed, duplex; 1193 bool rx_pause; 1194 1195 speed = link_state.speed; 1196 duplex = link_state.duplex; 1197 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1198 1199 switch (link_state.rate_matching) { 1200 case RATE_MATCH_PAUSE: 1201 /* The PHY is doing rate matchion from the media rate (in 1202 * the link_state) to the interface speed, and will send 1203 * pause frames to the MAC to limit its transmission speed. 1204 */ 1205 speed = phylink_interface_max_speed(link_state.interface); 1206 duplex = DUPLEX_FULL; 1207 rx_pause = true; 1208 break; 1209 1210 case RATE_MATCH_CRS: 1211 /* The PHY is doing rate matchion from the media rate (in 1212 * the link_state) to the interface speed, and will cause 1213 * collisions to the MAC to limit its transmission speed. 1214 */ 1215 speed = phylink_interface_max_speed(link_state.interface); 1216 duplex = DUPLEX_HALF; 1217 break; 1218 } 1219 1220 pl->cur_interface = link_state.interface; 1221 1222 if (pl->pcs && pl->pcs->ops->pcs_link_up) 1223 pl->pcs->ops->pcs_link_up(pl->pcs, pl->cur_link_an_mode, 1224 pl->cur_interface, speed, duplex); 1225 1226 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode, 1227 pl->cur_interface, speed, duplex, 1228 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1229 1230 if (ndev) 1231 netif_carrier_on(ndev); 1232 1233 phylink_info(pl, 1234 "Link is Up - %s/%s - flow control %s\n", 1235 phy_speed_to_str(link_state.speed), 1236 phy_duplex_to_str(link_state.duplex), 1237 phylink_pause_to_str(link_state.pause)); 1238 } 1239 1240 static void phylink_link_down(struct phylink *pl) 1241 { 1242 struct net_device *ndev = pl->netdev; 1243 1244 if (ndev) 1245 netif_carrier_off(ndev); 1246 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode, 1247 pl->cur_interface); 1248 phylink_info(pl, "Link is Down\n"); 1249 } 1250 1251 static void phylink_resolve(struct work_struct *w) 1252 { 1253 struct phylink *pl = container_of(w, struct phylink, resolve); 1254 struct phylink_link_state link_state; 1255 struct net_device *ndev = pl->netdev; 1256 bool mac_config = false; 1257 bool retrigger = false; 1258 bool cur_link_state; 1259 1260 mutex_lock(&pl->state_mutex); 1261 if (pl->netdev) 1262 cur_link_state = netif_carrier_ok(ndev); 1263 else 1264 cur_link_state = pl->old_link_state; 1265 1266 if (pl->phylink_disable_state) { 1267 pl->mac_link_dropped = false; 1268 link_state.link = false; 1269 } else if (pl->mac_link_dropped) { 1270 link_state.link = false; 1271 retrigger = true; 1272 } else { 1273 switch (pl->cur_link_an_mode) { 1274 case MLO_AN_PHY: 1275 link_state = pl->phy_state; 1276 phylink_apply_manual_flow(pl, &link_state); 1277 mac_config = link_state.link; 1278 break; 1279 1280 case MLO_AN_FIXED: 1281 phylink_get_fixed_state(pl, &link_state); 1282 mac_config = link_state.link; 1283 break; 1284 1285 case MLO_AN_INBAND: 1286 phylink_mac_pcs_get_state(pl, &link_state); 1287 1288 /* The PCS may have a latching link-fail indicator. 1289 * If the link was up, bring the link down and 1290 * re-trigger the resolve. Otherwise, re-read the 1291 * PCS state to get the current status of the link. 1292 */ 1293 if (!link_state.link) { 1294 if (cur_link_state) 1295 retrigger = true; 1296 else 1297 phylink_mac_pcs_get_state(pl, 1298 &link_state); 1299 } 1300 1301 /* If we have a phy, the "up" state is the union of 1302 * both the PHY and the MAC 1303 */ 1304 if (pl->phydev) 1305 link_state.link &= pl->phy_state.link; 1306 1307 /* Only update if the PHY link is up */ 1308 if (pl->phydev && pl->phy_state.link) { 1309 /* If the interface has changed, force a 1310 * link down event if the link isn't already 1311 * down, and re-resolve. 1312 */ 1313 if (link_state.interface != 1314 pl->phy_state.interface) { 1315 retrigger = true; 1316 link_state.link = false; 1317 } 1318 link_state.interface = pl->phy_state.interface; 1319 1320 /* If we are doing rate matching, then the 1321 * link speed/duplex comes from the PHY 1322 */ 1323 if (pl->phy_state.rate_matching) { 1324 link_state.rate_matching = 1325 pl->phy_state.rate_matching; 1326 link_state.speed = pl->phy_state.speed; 1327 link_state.duplex = 1328 pl->phy_state.duplex; 1329 } 1330 1331 /* If we have a PHY, we need to update with 1332 * the PHY flow control bits. 1333 */ 1334 link_state.pause = pl->phy_state.pause; 1335 mac_config = true; 1336 } 1337 phylink_apply_manual_flow(pl, &link_state); 1338 break; 1339 } 1340 } 1341 1342 if (mac_config) { 1343 if (link_state.interface != pl->link_config.interface) { 1344 /* The interface has changed, force the link down and 1345 * then reconfigure. 1346 */ 1347 if (cur_link_state) { 1348 phylink_link_down(pl); 1349 cur_link_state = false; 1350 } 1351 phylink_major_config(pl, false, &link_state); 1352 pl->link_config.interface = link_state.interface; 1353 } else if (!pl->pcs && pl->config->legacy_pre_march2020) { 1354 /* The interface remains unchanged, only the speed, 1355 * duplex or pause settings have changed. Call the 1356 * old mac_config() method to configure the MAC/PCS 1357 * only if we do not have a legacy MAC driver. 1358 */ 1359 phylink_mac_config(pl, &link_state); 1360 } 1361 } 1362 1363 if (link_state.link != cur_link_state) { 1364 pl->old_link_state = link_state.link; 1365 if (!link_state.link) 1366 phylink_link_down(pl); 1367 else 1368 phylink_link_up(pl, link_state); 1369 } 1370 if (!link_state.link && retrigger) { 1371 pl->mac_link_dropped = false; 1372 queue_work(system_power_efficient_wq, &pl->resolve); 1373 } 1374 mutex_unlock(&pl->state_mutex); 1375 } 1376 1377 static void phylink_run_resolve(struct phylink *pl) 1378 { 1379 if (!pl->phylink_disable_state) 1380 queue_work(system_power_efficient_wq, &pl->resolve); 1381 } 1382 1383 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1384 { 1385 unsigned long state = pl->phylink_disable_state; 1386 1387 set_bit(bit, &pl->phylink_disable_state); 1388 if (state == 0) { 1389 queue_work(system_power_efficient_wq, &pl->resolve); 1390 flush_work(&pl->resolve); 1391 } 1392 } 1393 1394 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1395 { 1396 clear_bit(bit, &pl->phylink_disable_state); 1397 phylink_run_resolve(pl); 1398 } 1399 1400 static void phylink_fixed_poll(struct timer_list *t) 1401 { 1402 struct phylink *pl = container_of(t, struct phylink, link_poll); 1403 1404 mod_timer(t, jiffies + HZ); 1405 1406 phylink_run_resolve(pl); 1407 } 1408 1409 static const struct sfp_upstream_ops sfp_phylink_ops; 1410 1411 static int phylink_register_sfp(struct phylink *pl, 1412 struct fwnode_handle *fwnode) 1413 { 1414 struct sfp_bus *bus; 1415 int ret; 1416 1417 if (!fwnode) 1418 return 0; 1419 1420 bus = sfp_bus_find_fwnode(fwnode); 1421 if (IS_ERR(bus)) { 1422 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1423 return PTR_ERR(bus); 1424 } 1425 1426 pl->sfp_bus = bus; 1427 1428 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1429 sfp_bus_put(bus); 1430 1431 return ret; 1432 } 1433 1434 /** 1435 * phylink_create() - create a phylink instance 1436 * @config: a pointer to the target &struct phylink_config 1437 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1438 * interface 1439 * @iface: the desired link mode defined by &typedef phy_interface_t 1440 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1441 * 1442 * Create a new phylink instance, and parse the link parameters found in @np. 1443 * This will parse in-band modes, fixed-link or SFP configuration. 1444 * 1445 * Note: the rtnl lock must not be held when calling this function. 1446 * 1447 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1448 * must use IS_ERR() to check for errors from this function. 1449 */ 1450 struct phylink *phylink_create(struct phylink_config *config, 1451 struct fwnode_handle *fwnode, 1452 phy_interface_t iface, 1453 const struct phylink_mac_ops *mac_ops) 1454 { 1455 bool using_mac_select_pcs = false; 1456 struct phylink *pl; 1457 int ret; 1458 1459 if (mac_ops->mac_select_pcs && 1460 mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) != 1461 ERR_PTR(-EOPNOTSUPP)) 1462 using_mac_select_pcs = true; 1463 1464 /* Validate the supplied configuration */ 1465 if (using_mac_select_pcs && 1466 phy_interface_empty(config->supported_interfaces)) { 1467 dev_err(config->dev, 1468 "phylink: error: empty supported_interfaces but mac_select_pcs() method present\n"); 1469 return ERR_PTR(-EINVAL); 1470 } 1471 1472 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1473 if (!pl) 1474 return ERR_PTR(-ENOMEM); 1475 1476 mutex_init(&pl->state_mutex); 1477 INIT_WORK(&pl->resolve, phylink_resolve); 1478 1479 pl->config = config; 1480 if (config->type == PHYLINK_NETDEV) { 1481 pl->netdev = to_net_dev(config->dev); 1482 } else if (config->type == PHYLINK_DEV) { 1483 pl->dev = config->dev; 1484 } else { 1485 kfree(pl); 1486 return ERR_PTR(-EINVAL); 1487 } 1488 1489 pl->using_mac_select_pcs = using_mac_select_pcs; 1490 pl->phy_state.interface = iface; 1491 pl->link_interface = iface; 1492 if (iface == PHY_INTERFACE_MODE_MOCA) 1493 pl->link_port = PORT_BNC; 1494 else 1495 pl->link_port = PORT_MII; 1496 pl->link_config.interface = iface; 1497 pl->link_config.pause = MLO_PAUSE_AN; 1498 pl->link_config.speed = SPEED_UNKNOWN; 1499 pl->link_config.duplex = DUPLEX_UNKNOWN; 1500 pl->link_config.an_enabled = true; 1501 pl->mac_ops = mac_ops; 1502 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1503 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1504 1505 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 1506 linkmode_copy(pl->link_config.advertising, pl->supported); 1507 phylink_validate(pl, pl->supported, &pl->link_config); 1508 1509 ret = phylink_parse_mode(pl, fwnode); 1510 if (ret < 0) { 1511 kfree(pl); 1512 return ERR_PTR(ret); 1513 } 1514 1515 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1516 ret = phylink_parse_fixedlink(pl, fwnode); 1517 if (ret < 0) { 1518 kfree(pl); 1519 return ERR_PTR(ret); 1520 } 1521 } 1522 1523 pl->cur_link_an_mode = pl->cfg_link_an_mode; 1524 1525 ret = phylink_register_sfp(pl, fwnode); 1526 if (ret < 0) { 1527 kfree(pl); 1528 return ERR_PTR(ret); 1529 } 1530 1531 return pl; 1532 } 1533 EXPORT_SYMBOL_GPL(phylink_create); 1534 1535 /** 1536 * phylink_destroy() - cleanup and destroy the phylink instance 1537 * @pl: a pointer to a &struct phylink returned from phylink_create() 1538 * 1539 * Destroy a phylink instance. Any PHY that has been attached must have been 1540 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1541 * 1542 * Note: the rtnl lock must not be held when calling this function. 1543 */ 1544 void phylink_destroy(struct phylink *pl) 1545 { 1546 sfp_bus_del_upstream(pl->sfp_bus); 1547 if (pl->link_gpio) 1548 gpiod_put(pl->link_gpio); 1549 1550 cancel_work_sync(&pl->resolve); 1551 kfree(pl); 1552 } 1553 EXPORT_SYMBOL_GPL(phylink_destroy); 1554 1555 static void phylink_phy_change(struct phy_device *phydev, bool up) 1556 { 1557 struct phylink *pl = phydev->phylink; 1558 bool tx_pause, rx_pause; 1559 1560 phy_get_pause(phydev, &tx_pause, &rx_pause); 1561 1562 mutex_lock(&pl->state_mutex); 1563 pl->phy_state.speed = phydev->speed; 1564 pl->phy_state.duplex = phydev->duplex; 1565 pl->phy_state.rate_matching = phydev->rate_matching; 1566 pl->phy_state.pause = MLO_PAUSE_NONE; 1567 if (tx_pause) 1568 pl->phy_state.pause |= MLO_PAUSE_TX; 1569 if (rx_pause) 1570 pl->phy_state.pause |= MLO_PAUSE_RX; 1571 pl->phy_state.interface = phydev->interface; 1572 pl->phy_state.link = up; 1573 mutex_unlock(&pl->state_mutex); 1574 1575 phylink_run_resolve(pl); 1576 1577 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down", 1578 phy_modes(phydev->interface), 1579 phy_speed_to_str(phydev->speed), 1580 phy_duplex_to_str(phydev->duplex), 1581 phy_rate_matching_to_str(phydev->rate_matching), 1582 phylink_pause_to_str(pl->phy_state.pause)); 1583 } 1584 1585 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 1586 phy_interface_t interface) 1587 { 1588 struct phylink_link_state config; 1589 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 1590 char *irq_str; 1591 int ret; 1592 1593 /* 1594 * This is the new way of dealing with flow control for PHYs, 1595 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 1596 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 1597 * using our validate call to the MAC, we rely upon the MAC 1598 * clearing the bits from both supported and advertising fields. 1599 */ 1600 phy_support_asym_pause(phy); 1601 1602 memset(&config, 0, sizeof(config)); 1603 linkmode_copy(supported, phy->supported); 1604 linkmode_copy(config.advertising, phy->advertising); 1605 1606 /* Clause 45 PHYs switch their Serdes lane between several different 1607 * modes, normally 10GBASE-R, SGMII. Some use 2500BASE-X for 2.5G 1608 * speeds. We really need to know which interface modes the PHY and 1609 * MAC supports to properly work out which linkmodes can be supported. 1610 */ 1611 if (phy->is_c45 && 1612 interface != PHY_INTERFACE_MODE_RXAUI && 1613 interface != PHY_INTERFACE_MODE_XAUI && 1614 interface != PHY_INTERFACE_MODE_USXGMII) 1615 config.interface = PHY_INTERFACE_MODE_NA; 1616 else 1617 config.interface = interface; 1618 config.rate_matching = phy_get_rate_matching(phy, config.interface); 1619 1620 ret = phylink_validate(pl, supported, &config); 1621 if (ret) { 1622 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 1623 phy_modes(config.interface), 1624 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 1625 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 1626 ERR_PTR(ret)); 1627 return ret; 1628 } 1629 1630 phy->phylink = pl; 1631 phy->phy_link_change = phylink_phy_change; 1632 1633 irq_str = phy_attached_info_irq(phy); 1634 phylink_info(pl, 1635 "PHY [%s] driver [%s] (irq=%s)\n", 1636 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 1637 kfree(irq_str); 1638 1639 mutex_lock(&phy->lock); 1640 mutex_lock(&pl->state_mutex); 1641 pl->phydev = phy; 1642 pl->phy_state.interface = interface; 1643 pl->phy_state.pause = MLO_PAUSE_NONE; 1644 pl->phy_state.speed = SPEED_UNKNOWN; 1645 pl->phy_state.duplex = DUPLEX_UNKNOWN; 1646 pl->phy_state.rate_matching = RATE_MATCH_NONE; 1647 linkmode_copy(pl->supported, supported); 1648 linkmode_copy(pl->link_config.advertising, config.advertising); 1649 1650 /* Restrict the phy advertisement according to the MAC support. */ 1651 linkmode_copy(phy->advertising, config.advertising); 1652 mutex_unlock(&pl->state_mutex); 1653 mutex_unlock(&phy->lock); 1654 1655 phylink_dbg(pl, 1656 "phy: %s setting supported %*pb advertising %*pb\n", 1657 phy_modes(interface), 1658 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 1659 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 1660 1661 if (phy_interrupt_is_valid(phy)) 1662 phy_request_interrupt(phy); 1663 1664 if (pl->config->mac_managed_pm) 1665 phy->mac_managed_pm = true; 1666 1667 return 0; 1668 } 1669 1670 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 1671 phy_interface_t interface) 1672 { 1673 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 1674 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1675 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 1676 return -EINVAL; 1677 1678 if (pl->phydev) 1679 return -EBUSY; 1680 1681 return phy_attach_direct(pl->netdev, phy, 0, interface); 1682 } 1683 1684 /** 1685 * phylink_connect_phy() - connect a PHY to the phylink instance 1686 * @pl: a pointer to a &struct phylink returned from phylink_create() 1687 * @phy: a pointer to a &struct phy_device. 1688 * 1689 * Connect @phy to the phylink instance specified by @pl by calling 1690 * phy_attach_direct(). Configure the @phy according to the MAC driver's 1691 * capabilities, start the PHYLIB state machine and enable any interrupts 1692 * that the PHY supports. 1693 * 1694 * This updates the phylink's ethtool supported and advertising link mode 1695 * masks. 1696 * 1697 * Returns 0 on success or a negative errno. 1698 */ 1699 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 1700 { 1701 int ret; 1702 1703 /* Use PHY device/driver interface */ 1704 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1705 pl->link_interface = phy->interface; 1706 pl->link_config.interface = pl->link_interface; 1707 } 1708 1709 ret = phylink_attach_phy(pl, phy, pl->link_interface); 1710 if (ret < 0) 1711 return ret; 1712 1713 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 1714 if (ret) 1715 phy_detach(phy); 1716 1717 return ret; 1718 } 1719 EXPORT_SYMBOL_GPL(phylink_connect_phy); 1720 1721 /** 1722 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 1723 * @pl: a pointer to a &struct phylink returned from phylink_create() 1724 * @dn: a pointer to a &struct device_node. 1725 * @flags: PHY-specific flags to communicate to the PHY device driver 1726 * 1727 * Connect the phy specified in the device node @dn to the phylink instance 1728 * specified by @pl. Actions specified in phylink_connect_phy() will be 1729 * performed. 1730 * 1731 * Returns 0 on success or a negative errno. 1732 */ 1733 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 1734 u32 flags) 1735 { 1736 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 1737 } 1738 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 1739 1740 /** 1741 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 1742 * @pl: a pointer to a &struct phylink returned from phylink_create() 1743 * @fwnode: a pointer to a &struct fwnode_handle. 1744 * @flags: PHY-specific flags to communicate to the PHY device driver 1745 * 1746 * Connect the phy specified @fwnode to the phylink instance specified 1747 * by @pl. 1748 * 1749 * Returns 0 on success or a negative errno. 1750 */ 1751 int phylink_fwnode_phy_connect(struct phylink *pl, 1752 struct fwnode_handle *fwnode, 1753 u32 flags) 1754 { 1755 struct fwnode_handle *phy_fwnode; 1756 struct phy_device *phy_dev; 1757 int ret; 1758 1759 /* Fixed links and 802.3z are handled without needing a PHY */ 1760 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1761 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1762 phy_interface_mode_is_8023z(pl->link_interface))) 1763 return 0; 1764 1765 phy_fwnode = fwnode_get_phy_node(fwnode); 1766 if (IS_ERR(phy_fwnode)) { 1767 if (pl->cfg_link_an_mode == MLO_AN_PHY) 1768 return -ENODEV; 1769 return 0; 1770 } 1771 1772 phy_dev = fwnode_phy_find_device(phy_fwnode); 1773 /* We're done with the phy_node handle */ 1774 fwnode_handle_put(phy_fwnode); 1775 if (!phy_dev) 1776 return -ENODEV; 1777 1778 /* Use PHY device/driver interface */ 1779 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1780 pl->link_interface = phy_dev->interface; 1781 pl->link_config.interface = pl->link_interface; 1782 } 1783 1784 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 1785 pl->link_interface); 1786 if (ret) { 1787 phy_device_free(phy_dev); 1788 return ret; 1789 } 1790 1791 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 1792 if (ret) 1793 phy_detach(phy_dev); 1794 1795 return ret; 1796 } 1797 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 1798 1799 /** 1800 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 1801 * instance. 1802 * @pl: a pointer to a &struct phylink returned from phylink_create() 1803 * 1804 * Disconnect any current PHY from the phylink instance described by @pl. 1805 */ 1806 void phylink_disconnect_phy(struct phylink *pl) 1807 { 1808 struct phy_device *phy; 1809 1810 ASSERT_RTNL(); 1811 1812 phy = pl->phydev; 1813 if (phy) { 1814 mutex_lock(&phy->lock); 1815 mutex_lock(&pl->state_mutex); 1816 pl->phydev = NULL; 1817 mutex_unlock(&pl->state_mutex); 1818 mutex_unlock(&phy->lock); 1819 flush_work(&pl->resolve); 1820 1821 phy_disconnect(phy); 1822 } 1823 } 1824 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 1825 1826 /** 1827 * phylink_mac_change() - notify phylink of a change in MAC state 1828 * @pl: a pointer to a &struct phylink returned from phylink_create() 1829 * @up: indicates whether the link is currently up. 1830 * 1831 * The MAC driver should call this driver when the state of its link 1832 * changes (eg, link failure, new negotiation results, etc.) 1833 */ 1834 void phylink_mac_change(struct phylink *pl, bool up) 1835 { 1836 if (!up) 1837 pl->mac_link_dropped = true; 1838 phylink_run_resolve(pl); 1839 phylink_dbg(pl, "mac link %s\n", up ? "up" : "down"); 1840 } 1841 EXPORT_SYMBOL_GPL(phylink_mac_change); 1842 1843 static irqreturn_t phylink_link_handler(int irq, void *data) 1844 { 1845 struct phylink *pl = data; 1846 1847 phylink_run_resolve(pl); 1848 1849 return IRQ_HANDLED; 1850 } 1851 1852 /** 1853 * phylink_start() - start a phylink instance 1854 * @pl: a pointer to a &struct phylink returned from phylink_create() 1855 * 1856 * Start the phylink instance specified by @pl, configuring the MAC for the 1857 * desired link mode(s) and negotiation style. This should be called from the 1858 * network device driver's &struct net_device_ops ndo_open() method. 1859 */ 1860 void phylink_start(struct phylink *pl) 1861 { 1862 bool poll = false; 1863 1864 ASSERT_RTNL(); 1865 1866 phylink_info(pl, "configuring for %s/%s link mode\n", 1867 phylink_an_mode_str(pl->cur_link_an_mode), 1868 phy_modes(pl->link_config.interface)); 1869 1870 /* Always set the carrier off */ 1871 if (pl->netdev) 1872 netif_carrier_off(pl->netdev); 1873 1874 /* Apply the link configuration to the MAC when starting. This allows 1875 * a fixed-link to start with the correct parameters, and also 1876 * ensures that we set the appropriate advertisement for Serdes links. 1877 * 1878 * Restart autonegotiation if using 802.3z to ensure that the link 1879 * parameters are properly negotiated. This is necessary for DSA 1880 * switches using 802.3z negotiation to ensure they see our modes. 1881 */ 1882 phylink_mac_initial_config(pl, true); 1883 1884 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 1885 1886 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 1887 int irq = gpiod_to_irq(pl->link_gpio); 1888 1889 if (irq > 0) { 1890 if (!request_irq(irq, phylink_link_handler, 1891 IRQF_TRIGGER_RISING | 1892 IRQF_TRIGGER_FALLING, 1893 "netdev link", pl)) 1894 pl->link_irq = irq; 1895 else 1896 irq = 0; 1897 } 1898 if (irq <= 0) 1899 poll = true; 1900 } 1901 1902 switch (pl->cfg_link_an_mode) { 1903 case MLO_AN_FIXED: 1904 poll |= pl->config->poll_fixed_state; 1905 break; 1906 case MLO_AN_INBAND: 1907 if (pl->pcs) 1908 poll |= pl->pcs->poll; 1909 break; 1910 } 1911 if (poll) 1912 mod_timer(&pl->link_poll, jiffies + HZ); 1913 if (pl->phydev) 1914 phy_start(pl->phydev); 1915 if (pl->sfp_bus) 1916 sfp_upstream_start(pl->sfp_bus); 1917 } 1918 EXPORT_SYMBOL_GPL(phylink_start); 1919 1920 /** 1921 * phylink_stop() - stop a phylink instance 1922 * @pl: a pointer to a &struct phylink returned from phylink_create() 1923 * 1924 * Stop the phylink instance specified by @pl. This should be called from the 1925 * network device driver's &struct net_device_ops ndo_stop() method. The 1926 * network device's carrier state should not be changed prior to calling this 1927 * function. 1928 * 1929 * This will synchronously bring down the link if the link is not already 1930 * down (in other words, it will trigger a mac_link_down() method call.) 1931 */ 1932 void phylink_stop(struct phylink *pl) 1933 { 1934 ASSERT_RTNL(); 1935 1936 if (pl->sfp_bus) 1937 sfp_upstream_stop(pl->sfp_bus); 1938 if (pl->phydev) 1939 phy_stop(pl->phydev); 1940 del_timer_sync(&pl->link_poll); 1941 if (pl->link_irq) { 1942 free_irq(pl->link_irq, pl); 1943 pl->link_irq = 0; 1944 } 1945 1946 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 1947 } 1948 EXPORT_SYMBOL_GPL(phylink_stop); 1949 1950 /** 1951 * phylink_suspend() - handle a network device suspend event 1952 * @pl: a pointer to a &struct phylink returned from phylink_create() 1953 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 1954 * 1955 * Handle a network device suspend event. There are several cases: 1956 * 1957 * - If Wake-on-Lan is not active, we can bring down the link between 1958 * the MAC and PHY by calling phylink_stop(). 1959 * - If Wake-on-Lan is active, and being handled only by the PHY, we 1960 * can also bring down the link between the MAC and PHY. 1961 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 1962 * still needs to receive packets, so we can not bring the link down. 1963 */ 1964 void phylink_suspend(struct phylink *pl, bool mac_wol) 1965 { 1966 ASSERT_RTNL(); 1967 1968 if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) { 1969 /* Wake-on-Lan enabled, MAC handling */ 1970 mutex_lock(&pl->state_mutex); 1971 1972 /* Stop the resolver bringing the link up */ 1973 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 1974 1975 /* Disable the carrier, to prevent transmit timeouts, 1976 * but one would hope all packets have been sent. This 1977 * also means phylink_resolve() will do nothing. 1978 */ 1979 if (pl->netdev) 1980 netif_carrier_off(pl->netdev); 1981 else 1982 pl->old_link_state = false; 1983 1984 /* We do not call mac_link_down() here as we want the 1985 * link to remain up to receive the WoL packets. 1986 */ 1987 mutex_unlock(&pl->state_mutex); 1988 } else { 1989 phylink_stop(pl); 1990 } 1991 } 1992 EXPORT_SYMBOL_GPL(phylink_suspend); 1993 1994 /** 1995 * phylink_resume() - handle a network device resume event 1996 * @pl: a pointer to a &struct phylink returned from phylink_create() 1997 * 1998 * Undo the effects of phylink_suspend(), returning the link to an 1999 * operational state. 2000 */ 2001 void phylink_resume(struct phylink *pl) 2002 { 2003 ASSERT_RTNL(); 2004 2005 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2006 /* Wake-on-Lan enabled, MAC handling */ 2007 2008 /* Call mac_link_down() so we keep the overall state balanced. 2009 * Do this under the state_mutex lock for consistency. This 2010 * will cause a "Link Down" message to be printed during 2011 * resume, which is harmless - the true link state will be 2012 * printed when we run a resolve. 2013 */ 2014 mutex_lock(&pl->state_mutex); 2015 phylink_link_down(pl); 2016 mutex_unlock(&pl->state_mutex); 2017 2018 /* Re-apply the link parameters so that all the settings get 2019 * restored to the MAC. 2020 */ 2021 phylink_mac_initial_config(pl, true); 2022 2023 /* Re-enable and re-resolve the link parameters */ 2024 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2025 } else { 2026 phylink_start(pl); 2027 } 2028 } 2029 EXPORT_SYMBOL_GPL(phylink_resume); 2030 2031 /** 2032 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2033 * @pl: a pointer to a &struct phylink returned from phylink_create() 2034 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2035 * 2036 * Read the wake on lan parameters from the PHY attached to the phylink 2037 * instance specified by @pl. If no PHY is currently attached, report no 2038 * support for wake on lan. 2039 */ 2040 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2041 { 2042 ASSERT_RTNL(); 2043 2044 wol->supported = 0; 2045 wol->wolopts = 0; 2046 2047 if (pl->phydev) 2048 phy_ethtool_get_wol(pl->phydev, wol); 2049 } 2050 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2051 2052 /** 2053 * phylink_ethtool_set_wol() - set wake on lan parameters 2054 * @pl: a pointer to a &struct phylink returned from phylink_create() 2055 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2056 * 2057 * Set the wake on lan parameters for the PHY attached to the phylink 2058 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2059 * error. 2060 * 2061 * Returns zero on success or negative errno code. 2062 */ 2063 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2064 { 2065 int ret = -EOPNOTSUPP; 2066 2067 ASSERT_RTNL(); 2068 2069 if (pl->phydev) 2070 ret = phy_ethtool_set_wol(pl->phydev, wol); 2071 2072 return ret; 2073 } 2074 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2075 2076 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2077 { 2078 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2079 2080 linkmode_zero(mask); 2081 phylink_set_port_modes(mask); 2082 2083 linkmode_and(dst, dst, mask); 2084 linkmode_or(dst, dst, b); 2085 } 2086 2087 static void phylink_get_ksettings(const struct phylink_link_state *state, 2088 struct ethtool_link_ksettings *kset) 2089 { 2090 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2091 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2092 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2093 kset->base.speed = state->speed; 2094 kset->base.duplex = state->duplex; 2095 } 2096 kset->base.autoneg = state->an_enabled ? AUTONEG_ENABLE : 2097 AUTONEG_DISABLE; 2098 } 2099 2100 /** 2101 * phylink_ethtool_ksettings_get() - get the current link settings 2102 * @pl: a pointer to a &struct phylink returned from phylink_create() 2103 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2104 * 2105 * Read the current link settings for the phylink instance specified by @pl. 2106 * This will be the link settings read from the MAC, PHY or fixed link 2107 * settings depending on the current negotiation mode. 2108 */ 2109 int phylink_ethtool_ksettings_get(struct phylink *pl, 2110 struct ethtool_link_ksettings *kset) 2111 { 2112 struct phylink_link_state link_state; 2113 2114 ASSERT_RTNL(); 2115 2116 if (pl->phydev) 2117 phy_ethtool_ksettings_get(pl->phydev, kset); 2118 else 2119 kset->base.port = pl->link_port; 2120 2121 linkmode_copy(kset->link_modes.supported, pl->supported); 2122 2123 switch (pl->cur_link_an_mode) { 2124 case MLO_AN_FIXED: 2125 /* We are using fixed settings. Report these as the 2126 * current link settings - and note that these also 2127 * represent the supported speeds/duplex/pause modes. 2128 */ 2129 phylink_get_fixed_state(pl, &link_state); 2130 phylink_get_ksettings(&link_state, kset); 2131 break; 2132 2133 case MLO_AN_INBAND: 2134 /* If there is a phy attached, then use the reported 2135 * settings from the phy with no modification. 2136 */ 2137 if (pl->phydev) 2138 break; 2139 2140 phylink_mac_pcs_get_state(pl, &link_state); 2141 2142 /* The MAC is reporting the link results from its own PCS 2143 * layer via in-band status. Report these as the current 2144 * link settings. 2145 */ 2146 phylink_get_ksettings(&link_state, kset); 2147 break; 2148 } 2149 2150 return 0; 2151 } 2152 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2153 2154 /** 2155 * phylink_ethtool_ksettings_set() - set the link settings 2156 * @pl: a pointer to a &struct phylink returned from phylink_create() 2157 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2158 */ 2159 int phylink_ethtool_ksettings_set(struct phylink *pl, 2160 const struct ethtool_link_ksettings *kset) 2161 { 2162 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2163 struct phylink_link_state config; 2164 const struct phy_setting *s; 2165 2166 ASSERT_RTNL(); 2167 2168 if (pl->phydev) { 2169 /* We can rely on phylib for this update; we also do not need 2170 * to update the pl->link_config settings: 2171 * - the configuration returned via ksettings_get() will come 2172 * from phylib whenever a PHY is present. 2173 * - link_config.interface will be updated by the PHY calling 2174 * back via phylink_phy_change() and a subsequent resolve. 2175 * - initial link configuration for PHY mode comes from the 2176 * last phy state updated via phylink_phy_change(). 2177 * - other configuration changes (e.g. pause modes) are 2178 * performed directly via phylib. 2179 * - if in in-band mode with a PHY, the link configuration 2180 * is passed on the link from the PHY, and all of 2181 * link_config.{speed,duplex,an_enabled,pause} are not used. 2182 * - the only possible use would be link_config.advertising 2183 * pause modes when in 1000base-X mode with a PHY, but in 2184 * the presence of a PHY, this should not be changed as that 2185 * should be determined from the media side advertisement. 2186 */ 2187 return phy_ethtool_ksettings_set(pl->phydev, kset); 2188 } 2189 2190 config = pl->link_config; 2191 2192 /* Mask out unsupported advertisements */ 2193 linkmode_and(config.advertising, kset->link_modes.advertising, 2194 pl->supported); 2195 2196 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 2197 switch (kset->base.autoneg) { 2198 case AUTONEG_DISABLE: 2199 /* Autonegotiation disabled, select a suitable speed and 2200 * duplex. 2201 */ 2202 s = phy_lookup_setting(kset->base.speed, kset->base.duplex, 2203 pl->supported, false); 2204 if (!s) 2205 return -EINVAL; 2206 2207 /* If we have a fixed link, refuse to change link parameters. 2208 * If the link parameters match, accept them but do nothing. 2209 */ 2210 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2211 if (s->speed != pl->link_config.speed || 2212 s->duplex != pl->link_config.duplex) 2213 return -EINVAL; 2214 return 0; 2215 } 2216 2217 config.speed = s->speed; 2218 config.duplex = s->duplex; 2219 break; 2220 2221 case AUTONEG_ENABLE: 2222 /* If we have a fixed link, allow autonegotiation (since that 2223 * is our default case) but do not allow the advertisement to 2224 * be changed. If the advertisement matches, simply return. 2225 */ 2226 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2227 if (!linkmode_equal(config.advertising, 2228 pl->link_config.advertising)) 2229 return -EINVAL; 2230 return 0; 2231 } 2232 2233 config.speed = SPEED_UNKNOWN; 2234 config.duplex = DUPLEX_UNKNOWN; 2235 break; 2236 2237 default: 2238 return -EINVAL; 2239 } 2240 2241 /* We have ruled out the case with a PHY attached, and the 2242 * fixed-link cases. All that is left are in-band links. 2243 */ 2244 config.an_enabled = kset->base.autoneg == AUTONEG_ENABLE; 2245 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2246 config.an_enabled); 2247 2248 /* If this link is with an SFP, ensure that changes to advertised modes 2249 * also cause the associated interface to be selected such that the 2250 * link can be configured correctly. 2251 */ 2252 if (pl->sfp_bus) { 2253 config.interface = sfp_select_interface(pl->sfp_bus, 2254 config.advertising); 2255 if (config.interface == PHY_INTERFACE_MODE_NA) { 2256 phylink_err(pl, 2257 "selection of interface failed, advertisement %*pb\n", 2258 __ETHTOOL_LINK_MODE_MASK_NBITS, 2259 config.advertising); 2260 return -EINVAL; 2261 } 2262 2263 /* Revalidate with the selected interface */ 2264 linkmode_copy(support, pl->supported); 2265 if (phylink_validate(pl, support, &config)) { 2266 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2267 phylink_an_mode_str(pl->cur_link_an_mode), 2268 phy_modes(config.interface), 2269 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2270 return -EINVAL; 2271 } 2272 } else { 2273 /* Validate without changing the current supported mask. */ 2274 linkmode_copy(support, pl->supported); 2275 if (phylink_validate(pl, support, &config)) 2276 return -EINVAL; 2277 } 2278 2279 /* If autonegotiation is enabled, we must have an advertisement */ 2280 if (config.an_enabled && phylink_is_empty_linkmode(config.advertising)) 2281 return -EINVAL; 2282 2283 mutex_lock(&pl->state_mutex); 2284 pl->link_config.speed = config.speed; 2285 pl->link_config.duplex = config.duplex; 2286 pl->link_config.an_enabled = config.an_enabled; 2287 2288 if (pl->link_config.interface != config.interface) { 2289 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2290 /* We need to force the link down, then change the interface */ 2291 if (pl->old_link_state) { 2292 phylink_link_down(pl); 2293 pl->old_link_state = false; 2294 } 2295 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2296 &pl->phylink_disable_state)) 2297 phylink_major_config(pl, false, &config); 2298 pl->link_config.interface = config.interface; 2299 linkmode_copy(pl->link_config.advertising, config.advertising); 2300 } else if (!linkmode_equal(pl->link_config.advertising, 2301 config.advertising)) { 2302 linkmode_copy(pl->link_config.advertising, config.advertising); 2303 phylink_change_inband_advert(pl); 2304 } 2305 mutex_unlock(&pl->state_mutex); 2306 2307 return 0; 2308 } 2309 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 2310 2311 /** 2312 * phylink_ethtool_nway_reset() - restart negotiation 2313 * @pl: a pointer to a &struct phylink returned from phylink_create() 2314 * 2315 * Restart negotiation for the phylink instance specified by @pl. This will 2316 * cause any attached phy to restart negotiation with the link partner, and 2317 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 2318 * negotiation. 2319 * 2320 * Returns zero on success, or negative error code. 2321 */ 2322 int phylink_ethtool_nway_reset(struct phylink *pl) 2323 { 2324 int ret = 0; 2325 2326 ASSERT_RTNL(); 2327 2328 if (pl->phydev) 2329 ret = phy_restart_aneg(pl->phydev); 2330 phylink_mac_pcs_an_restart(pl); 2331 2332 return ret; 2333 } 2334 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 2335 2336 /** 2337 * phylink_ethtool_get_pauseparam() - get the current pause parameters 2338 * @pl: a pointer to a &struct phylink returned from phylink_create() 2339 * @pause: a pointer to a &struct ethtool_pauseparam 2340 */ 2341 void phylink_ethtool_get_pauseparam(struct phylink *pl, 2342 struct ethtool_pauseparam *pause) 2343 { 2344 ASSERT_RTNL(); 2345 2346 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 2347 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 2348 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 2349 } 2350 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 2351 2352 /** 2353 * phylink_ethtool_set_pauseparam() - set the current pause parameters 2354 * @pl: a pointer to a &struct phylink returned from phylink_create() 2355 * @pause: a pointer to a &struct ethtool_pauseparam 2356 */ 2357 int phylink_ethtool_set_pauseparam(struct phylink *pl, 2358 struct ethtool_pauseparam *pause) 2359 { 2360 struct phylink_link_state *config = &pl->link_config; 2361 bool manual_changed; 2362 int pause_state; 2363 2364 ASSERT_RTNL(); 2365 2366 if (pl->cur_link_an_mode == MLO_AN_FIXED) 2367 return -EOPNOTSUPP; 2368 2369 if (!phylink_test(pl->supported, Pause) && 2370 !phylink_test(pl->supported, Asym_Pause)) 2371 return -EOPNOTSUPP; 2372 2373 if (!phylink_test(pl->supported, Asym_Pause) && 2374 pause->rx_pause != pause->tx_pause) 2375 return -EINVAL; 2376 2377 pause_state = 0; 2378 if (pause->autoneg) 2379 pause_state |= MLO_PAUSE_AN; 2380 if (pause->rx_pause) 2381 pause_state |= MLO_PAUSE_RX; 2382 if (pause->tx_pause) 2383 pause_state |= MLO_PAUSE_TX; 2384 2385 mutex_lock(&pl->state_mutex); 2386 /* 2387 * See the comments for linkmode_set_pause(), wrt the deficiencies 2388 * with the current implementation. A solution to this issue would 2389 * be: 2390 * ethtool Local device 2391 * rx tx Pause AsymDir 2392 * 0 0 0 0 2393 * 1 0 1 1 2394 * 0 1 0 1 2395 * 1 1 1 1 2396 * and then use the ethtool rx/tx enablement status to mask the 2397 * rx/tx pause resolution. 2398 */ 2399 linkmode_set_pause(config->advertising, pause->tx_pause, 2400 pause->rx_pause); 2401 2402 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 2403 (!(pause_state & MLO_PAUSE_AN) && 2404 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 2405 2406 config->pause = pause_state; 2407 2408 /* Update our in-band advertisement, triggering a renegotiation if 2409 * the advertisement changed. 2410 */ 2411 if (!pl->phydev) 2412 phylink_change_inband_advert(pl); 2413 2414 mutex_unlock(&pl->state_mutex); 2415 2416 /* If we have a PHY, a change of the pause frame advertisement will 2417 * cause phylib to renegotiate (if AN is enabled) which will in turn 2418 * call our phylink_phy_change() and trigger a resolve. Note that 2419 * we can't hold our state mutex while calling phy_set_asym_pause(). 2420 */ 2421 if (pl->phydev) 2422 phy_set_asym_pause(pl->phydev, pause->rx_pause, 2423 pause->tx_pause); 2424 2425 /* If the manual pause settings changed, make sure we trigger a 2426 * resolve to update their state; we can not guarantee that the 2427 * link will cycle. 2428 */ 2429 if (manual_changed) { 2430 pl->mac_link_dropped = true; 2431 phylink_run_resolve(pl); 2432 } 2433 2434 return 0; 2435 } 2436 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 2437 2438 /** 2439 * phylink_get_eee_err() - read the energy efficient ethernet error 2440 * counter 2441 * @pl: a pointer to a &struct phylink returned from phylink_create(). 2442 * 2443 * Read the Energy Efficient Ethernet error counter from the PHY associated 2444 * with the phylink instance specified by @pl. 2445 * 2446 * Returns positive error counter value, or negative error code. 2447 */ 2448 int phylink_get_eee_err(struct phylink *pl) 2449 { 2450 int ret = 0; 2451 2452 ASSERT_RTNL(); 2453 2454 if (pl->phydev) 2455 ret = phy_get_eee_err(pl->phydev); 2456 2457 return ret; 2458 } 2459 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 2460 2461 /** 2462 * phylink_init_eee() - init and check the EEE features 2463 * @pl: a pointer to a &struct phylink returned from phylink_create() 2464 * @clk_stop_enable: allow PHY to stop receive clock 2465 * 2466 * Must be called either with RTNL held or within mac_link_up() 2467 */ 2468 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) 2469 { 2470 int ret = -EOPNOTSUPP; 2471 2472 if (pl->phydev) 2473 ret = phy_init_eee(pl->phydev, clk_stop_enable); 2474 2475 return ret; 2476 } 2477 EXPORT_SYMBOL_GPL(phylink_init_eee); 2478 2479 /** 2480 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 2481 * @pl: a pointer to a &struct phylink returned from phylink_create() 2482 * @eee: a pointer to a &struct ethtool_eee for the read parameters 2483 */ 2484 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee) 2485 { 2486 int ret = -EOPNOTSUPP; 2487 2488 ASSERT_RTNL(); 2489 2490 if (pl->phydev) 2491 ret = phy_ethtool_get_eee(pl->phydev, eee); 2492 2493 return ret; 2494 } 2495 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 2496 2497 /** 2498 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 2499 * @pl: a pointer to a &struct phylink returned from phylink_create() 2500 * @eee: a pointer to a &struct ethtool_eee for the desired parameters 2501 */ 2502 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee) 2503 { 2504 int ret = -EOPNOTSUPP; 2505 2506 ASSERT_RTNL(); 2507 2508 if (pl->phydev) 2509 ret = phy_ethtool_set_eee(pl->phydev, eee); 2510 2511 return ret; 2512 } 2513 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 2514 2515 /* This emulates MII registers for a fixed-mode phy operating as per the 2516 * passed in state. "aneg" defines if we report negotiation is possible. 2517 * 2518 * FIXME: should deal with negotiation state too. 2519 */ 2520 static int phylink_mii_emul_read(unsigned int reg, 2521 struct phylink_link_state *state) 2522 { 2523 struct fixed_phy_status fs; 2524 unsigned long *lpa = state->lp_advertising; 2525 int val; 2526 2527 fs.link = state->link; 2528 fs.speed = state->speed; 2529 fs.duplex = state->duplex; 2530 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 2531 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 2532 2533 val = swphy_read_reg(reg, &fs); 2534 if (reg == MII_BMSR) { 2535 if (!state->an_complete) 2536 val &= ~BMSR_ANEGCOMPLETE; 2537 } 2538 return val; 2539 } 2540 2541 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 2542 unsigned int reg) 2543 { 2544 struct phy_device *phydev = pl->phydev; 2545 int prtad, devad; 2546 2547 if (mdio_phy_id_is_c45(phy_id)) { 2548 prtad = mdio_phy_id_prtad(phy_id); 2549 devad = mdio_phy_id_devad(phy_id); 2550 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2551 reg); 2552 } 2553 2554 if (phydev->is_c45) { 2555 switch (reg) { 2556 case MII_BMCR: 2557 case MII_BMSR: 2558 case MII_PHYSID1: 2559 case MII_PHYSID2: 2560 devad = __ffs(phydev->c45_ids.mmds_present); 2561 break; 2562 case MII_ADVERTISE: 2563 case MII_LPA: 2564 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2565 return -EINVAL; 2566 devad = MDIO_MMD_AN; 2567 if (reg == MII_ADVERTISE) 2568 reg = MDIO_AN_ADVERTISE; 2569 else 2570 reg = MDIO_AN_LPA; 2571 break; 2572 default: 2573 return -EINVAL; 2574 } 2575 prtad = phy_id; 2576 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2577 reg); 2578 } 2579 2580 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 2581 } 2582 2583 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 2584 unsigned int reg, unsigned int val) 2585 { 2586 struct phy_device *phydev = pl->phydev; 2587 int prtad, devad; 2588 2589 if (mdio_phy_id_is_c45(phy_id)) { 2590 prtad = mdio_phy_id_prtad(phy_id); 2591 devad = mdio_phy_id_devad(phy_id); 2592 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 2593 reg, val); 2594 } 2595 2596 if (phydev->is_c45) { 2597 switch (reg) { 2598 case MII_BMCR: 2599 case MII_BMSR: 2600 case MII_PHYSID1: 2601 case MII_PHYSID2: 2602 devad = __ffs(phydev->c45_ids.mmds_present); 2603 break; 2604 case MII_ADVERTISE: 2605 case MII_LPA: 2606 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2607 return -EINVAL; 2608 devad = MDIO_MMD_AN; 2609 if (reg == MII_ADVERTISE) 2610 reg = MDIO_AN_ADVERTISE; 2611 else 2612 reg = MDIO_AN_LPA; 2613 break; 2614 default: 2615 return -EINVAL; 2616 } 2617 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 2618 reg, val); 2619 } 2620 2621 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 2622 } 2623 2624 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 2625 unsigned int reg) 2626 { 2627 struct phylink_link_state state; 2628 int val = 0xffff; 2629 2630 switch (pl->cur_link_an_mode) { 2631 case MLO_AN_FIXED: 2632 if (phy_id == 0) { 2633 phylink_get_fixed_state(pl, &state); 2634 val = phylink_mii_emul_read(reg, &state); 2635 } 2636 break; 2637 2638 case MLO_AN_PHY: 2639 return -EOPNOTSUPP; 2640 2641 case MLO_AN_INBAND: 2642 if (phy_id == 0) { 2643 phylink_mac_pcs_get_state(pl, &state); 2644 val = phylink_mii_emul_read(reg, &state); 2645 } 2646 break; 2647 } 2648 2649 return val & 0xffff; 2650 } 2651 2652 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 2653 unsigned int reg, unsigned int val) 2654 { 2655 switch (pl->cur_link_an_mode) { 2656 case MLO_AN_FIXED: 2657 break; 2658 2659 case MLO_AN_PHY: 2660 return -EOPNOTSUPP; 2661 2662 case MLO_AN_INBAND: 2663 break; 2664 } 2665 2666 return 0; 2667 } 2668 2669 /** 2670 * phylink_mii_ioctl() - generic mii ioctl interface 2671 * @pl: a pointer to a &struct phylink returned from phylink_create() 2672 * @ifr: a pointer to a &struct ifreq for socket ioctls 2673 * @cmd: ioctl cmd to execute 2674 * 2675 * Perform the specified MII ioctl on the PHY attached to the phylink instance 2676 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 2677 * 2678 * Returns: zero on success or negative error code. 2679 * 2680 * %SIOCGMIIPHY: 2681 * read register from the current PHY. 2682 * %SIOCGMIIREG: 2683 * read register from the specified PHY. 2684 * %SIOCSMIIREG: 2685 * set a register on the specified PHY. 2686 */ 2687 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 2688 { 2689 struct mii_ioctl_data *mii = if_mii(ifr); 2690 int ret; 2691 2692 ASSERT_RTNL(); 2693 2694 if (pl->phydev) { 2695 /* PHYs only exist for MLO_AN_PHY and SGMII */ 2696 switch (cmd) { 2697 case SIOCGMIIPHY: 2698 mii->phy_id = pl->phydev->mdio.addr; 2699 fallthrough; 2700 2701 case SIOCGMIIREG: 2702 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 2703 if (ret >= 0) { 2704 mii->val_out = ret; 2705 ret = 0; 2706 } 2707 break; 2708 2709 case SIOCSMIIREG: 2710 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 2711 mii->val_in); 2712 break; 2713 2714 default: 2715 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 2716 break; 2717 } 2718 } else { 2719 switch (cmd) { 2720 case SIOCGMIIPHY: 2721 mii->phy_id = 0; 2722 fallthrough; 2723 2724 case SIOCGMIIREG: 2725 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 2726 if (ret >= 0) { 2727 mii->val_out = ret; 2728 ret = 0; 2729 } 2730 break; 2731 2732 case SIOCSMIIREG: 2733 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 2734 mii->val_in); 2735 break; 2736 2737 default: 2738 ret = -EOPNOTSUPP; 2739 break; 2740 } 2741 } 2742 2743 return ret; 2744 } 2745 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 2746 2747 /** 2748 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 2749 * link partners 2750 * @pl: a pointer to a &struct phylink returned from phylink_create() 2751 * @sync: perform action synchronously 2752 * 2753 * If we have a PHY that is not part of a SFP module, then set the speed 2754 * as described in the phy_speed_down() function. Please see this function 2755 * for a description of the @sync parameter. 2756 * 2757 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 2758 */ 2759 int phylink_speed_down(struct phylink *pl, bool sync) 2760 { 2761 int ret = 0; 2762 2763 ASSERT_RTNL(); 2764 2765 if (!pl->sfp_bus && pl->phydev) 2766 ret = phy_speed_down(pl->phydev, sync); 2767 2768 return ret; 2769 } 2770 EXPORT_SYMBOL_GPL(phylink_speed_down); 2771 2772 /** 2773 * phylink_speed_up() - restore the advertised speeds prior to the call to 2774 * phylink_speed_down() 2775 * @pl: a pointer to a &struct phylink returned from phylink_create() 2776 * 2777 * If we have a PHY that is not part of a SFP module, then restore the 2778 * PHY speeds as per phy_speed_up(). 2779 * 2780 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 2781 */ 2782 int phylink_speed_up(struct phylink *pl) 2783 { 2784 int ret = 0; 2785 2786 ASSERT_RTNL(); 2787 2788 if (!pl->sfp_bus && pl->phydev) 2789 ret = phy_speed_up(pl->phydev); 2790 2791 return ret; 2792 } 2793 EXPORT_SYMBOL_GPL(phylink_speed_up); 2794 2795 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 2796 { 2797 struct phylink *pl = upstream; 2798 2799 pl->netdev->sfp_bus = bus; 2800 } 2801 2802 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 2803 { 2804 struct phylink *pl = upstream; 2805 2806 pl->netdev->sfp_bus = NULL; 2807 } 2808 2809 static const phy_interface_t phylink_sfp_interface_preference[] = { 2810 PHY_INTERFACE_MODE_25GBASER, 2811 PHY_INTERFACE_MODE_USXGMII, 2812 PHY_INTERFACE_MODE_10GBASER, 2813 PHY_INTERFACE_MODE_5GBASER, 2814 PHY_INTERFACE_MODE_2500BASEX, 2815 PHY_INTERFACE_MODE_SGMII, 2816 PHY_INTERFACE_MODE_1000BASEX, 2817 PHY_INTERFACE_MODE_100BASEX, 2818 }; 2819 2820 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 2821 2822 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 2823 const unsigned long *intf) 2824 { 2825 phy_interface_t interface; 2826 size_t i; 2827 2828 interface = PHY_INTERFACE_MODE_NA; 2829 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 2830 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 2831 interface = phylink_sfp_interface_preference[i]; 2832 break; 2833 } 2834 2835 return interface; 2836 } 2837 2838 static void phylink_sfp_set_config(struct phylink *pl, u8 mode, 2839 unsigned long *supported, 2840 struct phylink_link_state *state) 2841 { 2842 bool changed = false; 2843 2844 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 2845 phylink_an_mode_str(mode), phy_modes(state->interface), 2846 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 2847 2848 if (!linkmode_equal(pl->supported, supported)) { 2849 linkmode_copy(pl->supported, supported); 2850 changed = true; 2851 } 2852 2853 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 2854 linkmode_copy(pl->link_config.advertising, state->advertising); 2855 changed = true; 2856 } 2857 2858 if (pl->cur_link_an_mode != mode || 2859 pl->link_config.interface != state->interface) { 2860 pl->cur_link_an_mode = mode; 2861 pl->link_config.interface = state->interface; 2862 2863 changed = true; 2864 2865 phylink_info(pl, "switched to %s/%s link mode\n", 2866 phylink_an_mode_str(mode), 2867 phy_modes(state->interface)); 2868 } 2869 2870 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 2871 &pl->phylink_disable_state)) 2872 phylink_mac_initial_config(pl, false); 2873 } 2874 2875 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode, 2876 struct phy_device *phy) 2877 { 2878 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1); 2879 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2880 struct phylink_link_state config; 2881 phy_interface_t iface; 2882 int ret; 2883 2884 linkmode_copy(support, phy->supported); 2885 2886 memset(&config, 0, sizeof(config)); 2887 linkmode_copy(config.advertising, phy->advertising); 2888 config.interface = PHY_INTERFACE_MODE_NA; 2889 config.speed = SPEED_UNKNOWN; 2890 config.duplex = DUPLEX_UNKNOWN; 2891 config.pause = MLO_PAUSE_AN; 2892 config.an_enabled = pl->link_config.an_enabled; 2893 2894 /* Ignore errors if we're expecting a PHY to attach later */ 2895 ret = phylink_validate(pl, support, &config); 2896 if (ret) { 2897 phylink_err(pl, "validation with support %*pb failed: %pe\n", 2898 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 2899 ERR_PTR(ret)); 2900 return ret; 2901 } 2902 2903 iface = sfp_select_interface(pl->sfp_bus, config.advertising); 2904 if (iface == PHY_INTERFACE_MODE_NA) { 2905 phylink_err(pl, 2906 "selection of interface failed, advertisement %*pb\n", 2907 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising); 2908 return -EINVAL; 2909 } 2910 2911 config.interface = iface; 2912 linkmode_copy(support1, support); 2913 ret = phylink_validate(pl, support1, &config); 2914 if (ret) { 2915 phylink_err(pl, 2916 "validation of %s/%s with support %*pb failed: %pe\n", 2917 phylink_an_mode_str(mode), 2918 phy_modes(config.interface), 2919 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 2920 ERR_PTR(ret)); 2921 return ret; 2922 } 2923 2924 pl->link_port = pl->sfp_port; 2925 2926 phylink_sfp_set_config(pl, mode, support, &config); 2927 2928 return 0; 2929 } 2930 2931 static int phylink_sfp_config_optical(struct phylink *pl) 2932 { 2933 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2934 DECLARE_PHY_INTERFACE_MASK(interfaces); 2935 struct phylink_link_state config; 2936 phy_interface_t interface; 2937 int ret; 2938 2939 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 2940 (int)PHY_INTERFACE_MODE_MAX, 2941 pl->config->supported_interfaces, 2942 (int)PHY_INTERFACE_MODE_MAX, 2943 pl->sfp_interfaces); 2944 2945 /* Find the union of the supported interfaces by the PCS/MAC and 2946 * the SFP module. 2947 */ 2948 phy_interface_and(interfaces, pl->config->supported_interfaces, 2949 pl->sfp_interfaces); 2950 if (phy_interface_empty(interfaces)) { 2951 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 2952 return -EINVAL; 2953 } 2954 2955 memset(&config, 0, sizeof(config)); 2956 linkmode_copy(support, pl->sfp_support); 2957 linkmode_copy(config.advertising, pl->sfp_support); 2958 config.speed = SPEED_UNKNOWN; 2959 config.duplex = DUPLEX_UNKNOWN; 2960 config.pause = MLO_PAUSE_AN; 2961 config.an_enabled = true; 2962 2963 /* For all the interfaces that are supported, reduce the sfp_support 2964 * mask to only those link modes that can be supported. 2965 */ 2966 ret = phylink_validate_mask(pl, pl->sfp_support, &config, interfaces); 2967 if (ret) { 2968 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 2969 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2970 return ret; 2971 } 2972 2973 interface = phylink_choose_sfp_interface(pl, interfaces); 2974 if (interface == PHY_INTERFACE_MODE_NA) { 2975 phylink_err(pl, "failed to select SFP interface\n"); 2976 return -EINVAL; 2977 } 2978 2979 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 2980 phy_modes(interface)); 2981 2982 config.interface = interface; 2983 2984 /* Ignore errors if we're expecting a PHY to attach later */ 2985 ret = phylink_validate(pl, support, &config); 2986 if (ret) { 2987 phylink_err(pl, "validation with support %*pb failed: %pe\n", 2988 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 2989 ERR_PTR(ret)); 2990 return ret; 2991 } 2992 2993 pl->link_port = pl->sfp_port; 2994 2995 phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config); 2996 2997 return 0; 2998 } 2999 3000 static int phylink_sfp_module_insert(void *upstream, 3001 const struct sfp_eeprom_id *id) 3002 { 3003 struct phylink *pl = upstream; 3004 3005 ASSERT_RTNL(); 3006 3007 linkmode_zero(pl->sfp_support); 3008 phy_interface_zero(pl->sfp_interfaces); 3009 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces); 3010 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support); 3011 3012 /* If this module may have a PHY connecting later, defer until later */ 3013 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 3014 if (pl->sfp_may_have_phy) 3015 return 0; 3016 3017 return phylink_sfp_config_optical(pl); 3018 } 3019 3020 static int phylink_sfp_module_start(void *upstream) 3021 { 3022 struct phylink *pl = upstream; 3023 3024 /* If this SFP module has a PHY, start the PHY now. */ 3025 if (pl->phydev) { 3026 phy_start(pl->phydev); 3027 return 0; 3028 } 3029 3030 /* If the module may have a PHY but we didn't detect one we 3031 * need to configure the MAC here. 3032 */ 3033 if (!pl->sfp_may_have_phy) 3034 return 0; 3035 3036 return phylink_sfp_config_optical(pl); 3037 } 3038 3039 static void phylink_sfp_module_stop(void *upstream) 3040 { 3041 struct phylink *pl = upstream; 3042 3043 /* If this SFP module has a PHY, stop it. */ 3044 if (pl->phydev) 3045 phy_stop(pl->phydev); 3046 } 3047 3048 static void phylink_sfp_link_down(void *upstream) 3049 { 3050 struct phylink *pl = upstream; 3051 3052 ASSERT_RTNL(); 3053 3054 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3055 } 3056 3057 static void phylink_sfp_link_up(void *upstream) 3058 { 3059 struct phylink *pl = upstream; 3060 3061 ASSERT_RTNL(); 3062 3063 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3064 } 3065 3066 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII 3067 * or 802.3z control word, so inband will not work. 3068 */ 3069 static bool phylink_phy_no_inband(struct phy_device *phy) 3070 { 3071 return phy->is_c45 && 3072 (phy->c45_ids.device_ids[1] & 0xfffffff0) == 0xae025150; 3073 } 3074 3075 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3076 { 3077 struct phylink *pl = upstream; 3078 phy_interface_t interface; 3079 u8 mode; 3080 int ret; 3081 3082 /* 3083 * This is the new way of dealing with flow control for PHYs, 3084 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3085 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3086 * using our validate call to the MAC, we rely upon the MAC 3087 * clearing the bits from both supported and advertising fields. 3088 */ 3089 phy_support_asym_pause(phy); 3090 3091 if (phylink_phy_no_inband(phy)) 3092 mode = MLO_AN_PHY; 3093 else 3094 mode = MLO_AN_INBAND; 3095 3096 /* Set the PHY's host supported interfaces */ 3097 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3098 pl->config->supported_interfaces); 3099 3100 /* Do the initial configuration */ 3101 ret = phylink_sfp_config_phy(pl, mode, phy); 3102 if (ret < 0) 3103 return ret; 3104 3105 interface = pl->link_config.interface; 3106 ret = phylink_attach_phy(pl, phy, interface); 3107 if (ret < 0) 3108 return ret; 3109 3110 ret = phylink_bringup_phy(pl, phy, interface); 3111 if (ret) 3112 phy_detach(phy); 3113 3114 return ret; 3115 } 3116 3117 static void phylink_sfp_disconnect_phy(void *upstream) 3118 { 3119 phylink_disconnect_phy(upstream); 3120 } 3121 3122 static const struct sfp_upstream_ops sfp_phylink_ops = { 3123 .attach = phylink_sfp_attach, 3124 .detach = phylink_sfp_detach, 3125 .module_insert = phylink_sfp_module_insert, 3126 .module_start = phylink_sfp_module_start, 3127 .module_stop = phylink_sfp_module_stop, 3128 .link_up = phylink_sfp_link_up, 3129 .link_down = phylink_sfp_link_down, 3130 .connect_phy = phylink_sfp_connect_phy, 3131 .disconnect_phy = phylink_sfp_disconnect_phy, 3132 }; 3133 3134 /* Helpers for MAC drivers */ 3135 3136 static void phylink_decode_c37_word(struct phylink_link_state *state, 3137 uint16_t config_reg, int speed) 3138 { 3139 bool tx_pause, rx_pause; 3140 int fd_bit; 3141 3142 if (speed == SPEED_2500) 3143 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 3144 else 3145 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 3146 3147 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 3148 3149 if (linkmode_test_bit(fd_bit, state->advertising) && 3150 linkmode_test_bit(fd_bit, state->lp_advertising)) { 3151 state->speed = speed; 3152 state->duplex = DUPLEX_FULL; 3153 } else { 3154 /* negotiation failure */ 3155 state->link = false; 3156 } 3157 3158 linkmode_resolve_pause(state->advertising, state->lp_advertising, 3159 &tx_pause, &rx_pause); 3160 3161 if (tx_pause) 3162 state->pause |= MLO_PAUSE_TX; 3163 if (rx_pause) 3164 state->pause |= MLO_PAUSE_RX; 3165 } 3166 3167 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 3168 uint16_t config_reg) 3169 { 3170 if (!(config_reg & LPA_SGMII_LINK)) { 3171 state->link = false; 3172 return; 3173 } 3174 3175 switch (config_reg & LPA_SGMII_SPD_MASK) { 3176 case LPA_SGMII_10: 3177 state->speed = SPEED_10; 3178 break; 3179 case LPA_SGMII_100: 3180 state->speed = SPEED_100; 3181 break; 3182 case LPA_SGMII_1000: 3183 state->speed = SPEED_1000; 3184 break; 3185 default: 3186 state->link = false; 3187 return; 3188 } 3189 if (config_reg & LPA_SGMII_FULL_DUPLEX) 3190 state->duplex = DUPLEX_FULL; 3191 else 3192 state->duplex = DUPLEX_HALF; 3193 } 3194 3195 /** 3196 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3197 * @state: a pointer to a struct phylink_link_state. 3198 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3199 * 3200 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3201 * code word. Decode the USXGMII code word and populate the corresponding fields 3202 * (speed, duplex) into the phylink_link_state structure. 3203 */ 3204 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 3205 uint16_t lpa) 3206 { 3207 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3208 case MDIO_USXGMII_10: 3209 state->speed = SPEED_10; 3210 break; 3211 case MDIO_USXGMII_100: 3212 state->speed = SPEED_100; 3213 break; 3214 case MDIO_USXGMII_1000: 3215 state->speed = SPEED_1000; 3216 break; 3217 case MDIO_USXGMII_2500: 3218 state->speed = SPEED_2500; 3219 break; 3220 case MDIO_USXGMII_5000: 3221 state->speed = SPEED_5000; 3222 break; 3223 case MDIO_USXGMII_10G: 3224 state->speed = SPEED_10000; 3225 break; 3226 default: 3227 state->link = false; 3228 return; 3229 } 3230 3231 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3232 state->duplex = DUPLEX_FULL; 3233 else 3234 state->duplex = DUPLEX_HALF; 3235 } 3236 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 3237 3238 /** 3239 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 3240 * @state: a pointer to a &struct phylink_link_state. 3241 * @bmsr: The value of the %MII_BMSR register 3242 * @lpa: The value of the %MII_LPA register 3243 * 3244 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3245 * clause 37 negotiation and/or SGMII control. 3246 * 3247 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 3248 * the phylink @state structure. This is suitable to be used for implementing 3249 * the mac_pcs_get_state() member of the struct phylink_mac_ops structure if 3250 * accessing @bmsr and @lpa cannot be done with MDIO directly. 3251 */ 3252 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 3253 u16 bmsr, u16 lpa) 3254 { 3255 state->link = !!(bmsr & BMSR_LSTATUS); 3256 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 3257 /* If there is no link or autonegotiation is disabled, the LP advertisement 3258 * data is not meaningful, so don't go any further. 3259 */ 3260 if (!state->link || !state->an_enabled) 3261 return; 3262 3263 switch (state->interface) { 3264 case PHY_INTERFACE_MODE_1000BASEX: 3265 phylink_decode_c37_word(state, lpa, SPEED_1000); 3266 break; 3267 3268 case PHY_INTERFACE_MODE_2500BASEX: 3269 phylink_decode_c37_word(state, lpa, SPEED_2500); 3270 break; 3271 3272 case PHY_INTERFACE_MODE_SGMII: 3273 case PHY_INTERFACE_MODE_QSGMII: 3274 case PHY_INTERFACE_MODE_QUSGMII: 3275 phylink_decode_sgmii_word(state, lpa); 3276 break; 3277 3278 default: 3279 state->link = false; 3280 break; 3281 } 3282 } 3283 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 3284 3285 /** 3286 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 3287 * @pcs: a pointer to a &struct mdio_device. 3288 * @state: a pointer to a &struct phylink_link_state. 3289 * 3290 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3291 * clause 37 negotiation and/or SGMII control. 3292 * 3293 * Read the MAC PCS state from the MII device configured in @config and 3294 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 3295 * the phylink @state structure. This is suitable to be directly plugged 3296 * into the mac_pcs_get_state() member of the struct phylink_mac_ops 3297 * structure. 3298 */ 3299 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 3300 struct phylink_link_state *state) 3301 { 3302 int bmsr, lpa; 3303 3304 bmsr = mdiodev_read(pcs, MII_BMSR); 3305 lpa = mdiodev_read(pcs, MII_LPA); 3306 if (bmsr < 0 || lpa < 0) { 3307 state->link = false; 3308 return; 3309 } 3310 3311 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa); 3312 } 3313 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 3314 3315 /** 3316 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 3317 * advertisement 3318 * @interface: the PHY interface mode being configured 3319 * @advertising: the ethtool advertisement mask 3320 * 3321 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3322 * clause 37 negotiation and/or SGMII control. 3323 * 3324 * Encode the clause 37 PCS advertisement as specified by @interface and 3325 * @advertising. 3326 * 3327 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 3328 */ 3329 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 3330 const unsigned long *advertising) 3331 { 3332 u16 adv; 3333 3334 switch (interface) { 3335 case PHY_INTERFACE_MODE_1000BASEX: 3336 case PHY_INTERFACE_MODE_2500BASEX: 3337 adv = ADVERTISE_1000XFULL; 3338 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 3339 advertising)) 3340 adv |= ADVERTISE_1000XPAUSE; 3341 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 3342 advertising)) 3343 adv |= ADVERTISE_1000XPSE_ASYM; 3344 return adv; 3345 case PHY_INTERFACE_MODE_SGMII: 3346 case PHY_INTERFACE_MODE_QSGMII: 3347 return 0x0001; 3348 default: 3349 /* Nothing to do for other modes */ 3350 return -EINVAL; 3351 } 3352 } 3353 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 3354 3355 /** 3356 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 3357 * @pcs: a pointer to a &struct mdio_device. 3358 * @mode: link autonegotiation mode 3359 * @interface: the PHY interface mode being configured 3360 * @advertising: the ethtool advertisement mask 3361 * 3362 * Configure a Clause 22 PCS PHY with the appropriate negotiation 3363 * parameters for the @mode, @interface and @advertising parameters. 3364 * Returns negative error number on failure, zero if the advertisement 3365 * has not changed, or positive if there is a change. 3366 */ 3367 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, unsigned int mode, 3368 phy_interface_t interface, 3369 const unsigned long *advertising) 3370 { 3371 bool changed = 0; 3372 u16 bmcr; 3373 int ret, adv; 3374 3375 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 3376 if (adv >= 0) { 3377 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 3378 MII_ADVERTISE, 0xffff, adv); 3379 if (ret < 0) 3380 return ret; 3381 changed = ret; 3382 } 3383 3384 /* Ensure ISOLATE bit is disabled */ 3385 if (mode == MLO_AN_INBAND && 3386 (interface == PHY_INTERFACE_MODE_SGMII || 3387 interface == PHY_INTERFACE_MODE_QSGMII || 3388 linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, advertising))) 3389 bmcr = BMCR_ANENABLE; 3390 else 3391 bmcr = 0; 3392 3393 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 3394 if (ret < 0) 3395 return ret; 3396 3397 return changed; 3398 } 3399 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 3400 3401 /** 3402 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 3403 * @pcs: a pointer to a &struct mdio_device. 3404 * 3405 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3406 * clause 37 negotiation. 3407 * 3408 * Restart the clause 37 negotiation with the link partner. This is 3409 * suitable to be directly plugged into the mac_pcs_get_state() member 3410 * of the struct phylink_mac_ops structure. 3411 */ 3412 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 3413 { 3414 int val = mdiodev_read(pcs, MII_BMCR); 3415 3416 if (val >= 0) { 3417 val |= BMCR_ANRESTART; 3418 3419 mdiodev_write(pcs, MII_BMCR, val); 3420 } 3421 } 3422 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 3423 3424 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 3425 struct phylink_link_state *state) 3426 { 3427 struct mii_bus *bus = pcs->bus; 3428 int addr = pcs->addr; 3429 int stat; 3430 3431 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 3432 if (stat < 0) { 3433 state->link = false; 3434 return; 3435 } 3436 3437 state->link = !!(stat & MDIO_STAT1_LSTATUS); 3438 if (!state->link) 3439 return; 3440 3441 switch (state->interface) { 3442 case PHY_INTERFACE_MODE_10GBASER: 3443 state->speed = SPEED_10000; 3444 state->duplex = DUPLEX_FULL; 3445 break; 3446 3447 default: 3448 break; 3449 } 3450 } 3451 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 3452 3453 static int __init phylink_init(void) 3454 { 3455 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 3456 __set_bit(phylink_sfp_interface_preference[i], 3457 phylink_sfp_interfaces); 3458 3459 return 0; 3460 } 3461 3462 module_init(phylink_init); 3463 3464 MODULE_LICENSE("GPL v2"); 3465