1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "sfp.h" 24 #include "swphy.h" 25 26 #define SUPPORTED_INTERFACES \ 27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 29 #define ADVERTISED_INTERFACES \ 30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 32 33 enum { 34 PHYLINK_DISABLE_STOPPED, 35 PHYLINK_DISABLE_LINK, 36 PHYLINK_DISABLE_MAC_WOL, 37 }; 38 39 /** 40 * struct phylink - internal data type for phylink 41 */ 42 struct phylink { 43 /* private: */ 44 struct net_device *netdev; 45 const struct phylink_mac_ops *mac_ops; 46 struct phylink_config *config; 47 struct phylink_pcs *pcs; 48 struct device *dev; 49 unsigned int old_link_state:1; 50 51 unsigned long phylink_disable_state; /* bitmask of disables */ 52 struct phy_device *phydev; 53 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 54 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 55 u8 cur_link_an_mode; 56 u8 link_port; /* The current non-phy ethtool port */ 57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 58 59 /* The link configuration settings */ 60 struct phylink_link_state link_config; 61 62 /* The current settings */ 63 phy_interface_t cur_interface; 64 65 struct gpio_desc *link_gpio; 66 unsigned int link_irq; 67 struct timer_list link_poll; 68 void (*get_fixed_state)(struct net_device *dev, 69 struct phylink_link_state *s); 70 71 struct mutex state_mutex; 72 struct phylink_link_state phy_state; 73 struct work_struct resolve; 74 75 bool mac_link_dropped; 76 bool using_mac_select_pcs; 77 78 struct sfp_bus *sfp_bus; 79 bool sfp_may_have_phy; 80 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 81 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 82 u8 sfp_port; 83 }; 84 85 #define phylink_printk(level, pl, fmt, ...) \ 86 do { \ 87 if ((pl)->config->type == PHYLINK_NETDEV) \ 88 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 89 else if ((pl)->config->type == PHYLINK_DEV) \ 90 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 91 } while (0) 92 93 #define phylink_err(pl, fmt, ...) \ 94 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 95 #define phylink_warn(pl, fmt, ...) \ 96 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 97 #define phylink_info(pl, fmt, ...) \ 98 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 99 #if defined(CONFIG_DYNAMIC_DEBUG) 100 #define phylink_dbg(pl, fmt, ...) \ 101 do { \ 102 if ((pl)->config->type == PHYLINK_NETDEV) \ 103 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 104 else if ((pl)->config->type == PHYLINK_DEV) \ 105 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 106 } while (0) 107 #elif defined(DEBUG) 108 #define phylink_dbg(pl, fmt, ...) \ 109 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 110 #else 111 #define phylink_dbg(pl, fmt, ...) \ 112 ({ \ 113 if (0) \ 114 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 115 }) 116 #endif 117 118 /** 119 * phylink_set_port_modes() - set the port type modes in the ethtool mask 120 * @mask: ethtool link mode mask 121 * 122 * Sets all the port type modes in the ethtool mask. MAC drivers should 123 * use this in their 'validate' callback. 124 */ 125 void phylink_set_port_modes(unsigned long *mask) 126 { 127 phylink_set(mask, TP); 128 phylink_set(mask, AUI); 129 phylink_set(mask, MII); 130 phylink_set(mask, FIBRE); 131 phylink_set(mask, BNC); 132 phylink_set(mask, Backplane); 133 } 134 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 135 136 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 137 { 138 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 139 140 phylink_set_port_modes(tmp); 141 phylink_set(tmp, Autoneg); 142 phylink_set(tmp, Pause); 143 phylink_set(tmp, Asym_Pause); 144 145 return linkmode_subset(linkmode, tmp); 146 } 147 148 static const char *phylink_an_mode_str(unsigned int mode) 149 { 150 static const char *modestr[] = { 151 [MLO_AN_PHY] = "phy", 152 [MLO_AN_FIXED] = "fixed", 153 [MLO_AN_INBAND] = "inband", 154 }; 155 156 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 157 } 158 159 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 160 { 161 switch (interface) { 162 case PHY_INTERFACE_MODE_SGMII: 163 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 164 return 1250; 165 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 166 return 3125; 167 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 168 return 5156; 169 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 170 return 10313; 171 default: 172 return 0; 173 } 174 } 175 176 /** 177 * phylink_interface_max_speed() - get the maximum speed of a phy interface 178 * @interface: phy interface mode defined by &typedef phy_interface_t 179 * 180 * Determine the maximum speed of a phy interface. This is intended to help 181 * determine the correct speed to pass to the MAC when the phy is performing 182 * rate matching. 183 * 184 * Return: The maximum speed of @interface 185 */ 186 static int phylink_interface_max_speed(phy_interface_t interface) 187 { 188 switch (interface) { 189 case PHY_INTERFACE_MODE_100BASEX: 190 case PHY_INTERFACE_MODE_REVRMII: 191 case PHY_INTERFACE_MODE_RMII: 192 case PHY_INTERFACE_MODE_SMII: 193 case PHY_INTERFACE_MODE_REVMII: 194 case PHY_INTERFACE_MODE_MII: 195 return SPEED_100; 196 197 case PHY_INTERFACE_MODE_TBI: 198 case PHY_INTERFACE_MODE_MOCA: 199 case PHY_INTERFACE_MODE_RTBI: 200 case PHY_INTERFACE_MODE_1000BASEX: 201 case PHY_INTERFACE_MODE_1000BASEKX: 202 case PHY_INTERFACE_MODE_TRGMII: 203 case PHY_INTERFACE_MODE_RGMII_TXID: 204 case PHY_INTERFACE_MODE_RGMII_RXID: 205 case PHY_INTERFACE_MODE_RGMII_ID: 206 case PHY_INTERFACE_MODE_RGMII: 207 case PHY_INTERFACE_MODE_QSGMII: 208 case PHY_INTERFACE_MODE_SGMII: 209 case PHY_INTERFACE_MODE_GMII: 210 return SPEED_1000; 211 212 case PHY_INTERFACE_MODE_2500BASEX: 213 return SPEED_2500; 214 215 case PHY_INTERFACE_MODE_5GBASER: 216 return SPEED_5000; 217 218 case PHY_INTERFACE_MODE_XGMII: 219 case PHY_INTERFACE_MODE_RXAUI: 220 case PHY_INTERFACE_MODE_XAUI: 221 case PHY_INTERFACE_MODE_10GBASER: 222 case PHY_INTERFACE_MODE_10GKR: 223 case PHY_INTERFACE_MODE_USXGMII: 224 case PHY_INTERFACE_MODE_QUSGMII: 225 return SPEED_10000; 226 227 case PHY_INTERFACE_MODE_25GBASER: 228 return SPEED_25000; 229 230 case PHY_INTERFACE_MODE_XLGMII: 231 return SPEED_40000; 232 233 case PHY_INTERFACE_MODE_INTERNAL: 234 case PHY_INTERFACE_MODE_NA: 235 case PHY_INTERFACE_MODE_MAX: 236 /* No idea! Garbage in, unknown out */ 237 return SPEED_UNKNOWN; 238 } 239 240 /* If we get here, someone forgot to add an interface mode above */ 241 WARN_ON_ONCE(1); 242 return SPEED_UNKNOWN; 243 } 244 245 /** 246 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 247 * @linkmodes: ethtool linkmode mask (must be already initialised) 248 * @caps: bitmask of MAC capabilities 249 * 250 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 251 * supported by the @caps. @linkmodes must have been initialised previously. 252 */ 253 void phylink_caps_to_linkmodes(unsigned long *linkmodes, unsigned long caps) 254 { 255 if (caps & MAC_SYM_PAUSE) 256 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 257 258 if (caps & MAC_ASYM_PAUSE) 259 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 260 261 if (caps & MAC_10HD) { 262 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes); 263 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes); 264 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes); 265 } 266 267 if (caps & MAC_10FD) { 268 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes); 269 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes); 270 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes); 271 } 272 273 if (caps & MAC_100HD) { 274 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes); 275 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes); 276 } 277 278 if (caps & MAC_100FD) { 279 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes); 280 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes); 281 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes); 282 } 283 284 if (caps & MAC_1000HD) 285 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes); 286 287 if (caps & MAC_1000FD) { 288 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes); 289 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes); 290 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes); 291 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes); 292 } 293 294 if (caps & MAC_2500FD) { 295 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes); 296 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes); 297 } 298 299 if (caps & MAC_5000FD) 300 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes); 301 302 if (caps & MAC_10000FD) { 303 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes); 304 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes); 305 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes); 306 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes); 307 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes); 308 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes); 309 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes); 310 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes); 311 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes); 312 } 313 314 if (caps & MAC_25000FD) { 315 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes); 316 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes); 317 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes); 318 } 319 320 if (caps & MAC_40000FD) { 321 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes); 322 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes); 323 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes); 324 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes); 325 } 326 327 if (caps & MAC_50000FD) { 328 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes); 329 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes); 330 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes); 331 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes); 332 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes); 333 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes); 334 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 335 linkmodes); 336 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes); 337 } 338 339 if (caps & MAC_56000FD) { 340 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes); 341 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes); 342 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes); 343 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes); 344 } 345 346 if (caps & MAC_100000FD) { 347 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes); 348 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes); 349 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes); 350 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 351 linkmodes); 352 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes); 353 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes); 354 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes); 355 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 356 linkmodes); 357 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes); 358 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes); 359 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes); 360 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 361 linkmodes); 362 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes); 363 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes); 364 } 365 366 if (caps & MAC_200000FD) { 367 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes); 368 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes); 369 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 370 linkmodes); 371 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes); 372 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes); 373 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes); 374 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes); 375 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 376 linkmodes); 377 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes); 378 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes); 379 } 380 381 if (caps & MAC_400000FD) { 382 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes); 383 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes); 384 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 385 linkmodes); 386 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes); 387 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes); 388 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes); 389 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes); 390 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 391 linkmodes); 392 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes); 393 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes); 394 } 395 } 396 EXPORT_SYMBOL_GPL(phylink_caps_to_linkmodes); 397 398 static struct { 399 unsigned long mask; 400 int speed; 401 unsigned int duplex; 402 } phylink_caps_params[] = { 403 { MAC_400000FD, SPEED_400000, DUPLEX_FULL }, 404 { MAC_200000FD, SPEED_200000, DUPLEX_FULL }, 405 { MAC_100000FD, SPEED_100000, DUPLEX_FULL }, 406 { MAC_56000FD, SPEED_56000, DUPLEX_FULL }, 407 { MAC_50000FD, SPEED_50000, DUPLEX_FULL }, 408 { MAC_40000FD, SPEED_40000, DUPLEX_FULL }, 409 { MAC_25000FD, SPEED_25000, DUPLEX_FULL }, 410 { MAC_20000FD, SPEED_20000, DUPLEX_FULL }, 411 { MAC_10000FD, SPEED_10000, DUPLEX_FULL }, 412 { MAC_5000FD, SPEED_5000, DUPLEX_FULL }, 413 { MAC_2500FD, SPEED_2500, DUPLEX_FULL }, 414 { MAC_1000FD, SPEED_1000, DUPLEX_FULL }, 415 { MAC_1000HD, SPEED_1000, DUPLEX_HALF }, 416 { MAC_100FD, SPEED_100, DUPLEX_FULL }, 417 { MAC_100HD, SPEED_100, DUPLEX_HALF }, 418 { MAC_10FD, SPEED_10, DUPLEX_FULL }, 419 { MAC_10HD, SPEED_10, DUPLEX_HALF }, 420 }; 421 422 /** 423 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 424 * @speed: the speed to search for 425 * @duplex: the duplex to search for 426 * 427 * Find the mac capability for a given speed and duplex. 428 * 429 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 430 * there were no matches. 431 */ 432 static unsigned long phylink_cap_from_speed_duplex(int speed, 433 unsigned int duplex) 434 { 435 int i; 436 437 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 438 if (speed == phylink_caps_params[i].speed && 439 duplex == phylink_caps_params[i].duplex) 440 return phylink_caps_params[i].mask; 441 } 442 443 return 0; 444 } 445 446 /** 447 * phylink_get_capabilities() - get capabilities for a given MAC 448 * @interface: phy interface mode defined by &typedef phy_interface_t 449 * @mac_capabilities: bitmask of MAC capabilities 450 * @rate_matching: type of rate matching being performed 451 * 452 * Get the MAC capabilities that are supported by the @interface mode and 453 * @mac_capabilities. 454 */ 455 unsigned long phylink_get_capabilities(phy_interface_t interface, 456 unsigned long mac_capabilities, 457 int rate_matching) 458 { 459 int max_speed = phylink_interface_max_speed(interface); 460 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 461 unsigned long matched_caps = 0; 462 463 switch (interface) { 464 case PHY_INTERFACE_MODE_USXGMII: 465 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD; 466 fallthrough; 467 468 case PHY_INTERFACE_MODE_RGMII_TXID: 469 case PHY_INTERFACE_MODE_RGMII_RXID: 470 case PHY_INTERFACE_MODE_RGMII_ID: 471 case PHY_INTERFACE_MODE_RGMII: 472 case PHY_INTERFACE_MODE_QSGMII: 473 case PHY_INTERFACE_MODE_QUSGMII: 474 case PHY_INTERFACE_MODE_SGMII: 475 case PHY_INTERFACE_MODE_GMII: 476 caps |= MAC_1000HD | MAC_1000FD; 477 fallthrough; 478 479 case PHY_INTERFACE_MODE_REVRMII: 480 case PHY_INTERFACE_MODE_RMII: 481 case PHY_INTERFACE_MODE_SMII: 482 case PHY_INTERFACE_MODE_REVMII: 483 case PHY_INTERFACE_MODE_MII: 484 caps |= MAC_10HD | MAC_10FD; 485 fallthrough; 486 487 case PHY_INTERFACE_MODE_100BASEX: 488 caps |= MAC_100HD | MAC_100FD; 489 break; 490 491 case PHY_INTERFACE_MODE_TBI: 492 case PHY_INTERFACE_MODE_MOCA: 493 case PHY_INTERFACE_MODE_RTBI: 494 case PHY_INTERFACE_MODE_1000BASEX: 495 caps |= MAC_1000HD; 496 fallthrough; 497 case PHY_INTERFACE_MODE_1000BASEKX: 498 case PHY_INTERFACE_MODE_TRGMII: 499 caps |= MAC_1000FD; 500 break; 501 502 case PHY_INTERFACE_MODE_2500BASEX: 503 caps |= MAC_2500FD; 504 break; 505 506 case PHY_INTERFACE_MODE_5GBASER: 507 caps |= MAC_5000FD; 508 break; 509 510 case PHY_INTERFACE_MODE_XGMII: 511 case PHY_INTERFACE_MODE_RXAUI: 512 case PHY_INTERFACE_MODE_XAUI: 513 case PHY_INTERFACE_MODE_10GBASER: 514 case PHY_INTERFACE_MODE_10GKR: 515 caps |= MAC_10000FD; 516 break; 517 518 case PHY_INTERFACE_MODE_25GBASER: 519 caps |= MAC_25000FD; 520 break; 521 522 case PHY_INTERFACE_MODE_XLGMII: 523 caps |= MAC_40000FD; 524 break; 525 526 case PHY_INTERFACE_MODE_INTERNAL: 527 caps |= ~0; 528 break; 529 530 case PHY_INTERFACE_MODE_NA: 531 case PHY_INTERFACE_MODE_MAX: 532 break; 533 } 534 535 switch (rate_matching) { 536 case RATE_MATCH_OPEN_LOOP: 537 /* TODO */ 538 fallthrough; 539 case RATE_MATCH_NONE: 540 matched_caps = 0; 541 break; 542 case RATE_MATCH_PAUSE: { 543 /* The MAC must support asymmetric pause towards the local 544 * device for this. We could allow just symmetric pause, but 545 * then we might have to renegotiate if the link partner 546 * doesn't support pause. This is because there's no way to 547 * accept pause frames without transmitting them if we only 548 * support symmetric pause. 549 */ 550 if (!(mac_capabilities & MAC_SYM_PAUSE) || 551 !(mac_capabilities & MAC_ASYM_PAUSE)) 552 break; 553 554 /* We can't adapt if the MAC doesn't support the interface's 555 * max speed at full duplex. 556 */ 557 if (mac_capabilities & 558 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) { 559 /* Although a duplex-matching phy might exist, we 560 * conservatively remove these modes because the MAC 561 * will not be aware of the half-duplex nature of the 562 * link. 563 */ 564 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 565 matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD); 566 } 567 break; 568 } 569 case RATE_MATCH_CRS: 570 /* The MAC must support half duplex at the interface's max 571 * speed. 572 */ 573 if (mac_capabilities & 574 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 575 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 576 matched_caps &= mac_capabilities; 577 } 578 break; 579 } 580 581 return (caps & mac_capabilities) | matched_caps; 582 } 583 EXPORT_SYMBOL_GPL(phylink_get_capabilities); 584 585 /** 586 * phylink_validate_mask_caps() - Restrict link modes based on caps 587 * @supported: ethtool bitmask for supported link modes. 588 * @state: pointer to a &struct phylink_link_state. 589 * @mac_capabilities: bitmask of MAC capabilities 590 * 591 * Calculate the supported link modes based on @mac_capabilities, and restrict 592 * @supported and @state based on that. Use this function if your capabiliies 593 * aren't constant, such as if they vary depending on the interface. 594 */ 595 void phylink_validate_mask_caps(unsigned long *supported, 596 struct phylink_link_state *state, 597 unsigned long mac_capabilities) 598 { 599 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 600 unsigned long caps; 601 602 phylink_set_port_modes(mask); 603 phylink_set(mask, Autoneg); 604 caps = phylink_get_capabilities(state->interface, mac_capabilities, 605 state->rate_matching); 606 phylink_caps_to_linkmodes(mask, caps); 607 608 linkmode_and(supported, supported, mask); 609 linkmode_and(state->advertising, state->advertising, mask); 610 } 611 EXPORT_SYMBOL_GPL(phylink_validate_mask_caps); 612 613 /** 614 * phylink_generic_validate() - generic validate() callback implementation 615 * @config: a pointer to a &struct phylink_config. 616 * @supported: ethtool bitmask for supported link modes. 617 * @state: a pointer to a &struct phylink_link_state. 618 * 619 * Generic implementation of the validate() callback that MAC drivers can 620 * use when they pass the range of supported interfaces and MAC capabilities. 621 */ 622 void phylink_generic_validate(struct phylink_config *config, 623 unsigned long *supported, 624 struct phylink_link_state *state) 625 { 626 phylink_validate_mask_caps(supported, state, config->mac_capabilities); 627 } 628 EXPORT_SYMBOL_GPL(phylink_generic_validate); 629 630 static int phylink_validate_mac_and_pcs(struct phylink *pl, 631 unsigned long *supported, 632 struct phylink_link_state *state) 633 { 634 struct phylink_pcs *pcs; 635 int ret; 636 637 /* Get the PCS for this interface mode */ 638 if (pl->using_mac_select_pcs) { 639 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 640 if (IS_ERR(pcs)) 641 return PTR_ERR(pcs); 642 } else { 643 pcs = pl->pcs; 644 } 645 646 if (pcs) { 647 /* The PCS, if present, must be setup before phylink_create() 648 * has been called. If the ops is not initialised, print an 649 * error and backtrace rather than oopsing the kernel. 650 */ 651 if (!pcs->ops) { 652 phylink_err(pl, "interface %s: uninitialised PCS\n", 653 phy_modes(state->interface)); 654 dump_stack(); 655 return -EINVAL; 656 } 657 658 /* Validate the link parameters with the PCS */ 659 if (pcs->ops->pcs_validate) { 660 ret = pcs->ops->pcs_validate(pcs, supported, state); 661 if (ret < 0 || phylink_is_empty_linkmode(supported)) 662 return -EINVAL; 663 664 /* Ensure the advertising mask is a subset of the 665 * supported mask. 666 */ 667 linkmode_and(state->advertising, state->advertising, 668 supported); 669 } 670 } 671 672 /* Then validate the link parameters with the MAC */ 673 if (pl->mac_ops->validate) 674 pl->mac_ops->validate(pl->config, supported, state); 675 else 676 phylink_generic_validate(pl->config, supported, state); 677 678 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 679 } 680 681 static int phylink_validate_mask(struct phylink *pl, unsigned long *supported, 682 struct phylink_link_state *state, 683 const unsigned long *interfaces) 684 { 685 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 686 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 687 __ETHTOOL_DECLARE_LINK_MODE_MASK(s); 688 struct phylink_link_state t; 689 int intf; 690 691 for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) { 692 if (test_bit(intf, interfaces)) { 693 linkmode_copy(s, supported); 694 695 t = *state; 696 t.interface = intf; 697 if (!phylink_validate_mac_and_pcs(pl, s, &t)) { 698 linkmode_or(all_s, all_s, s); 699 linkmode_or(all_adv, all_adv, t.advertising); 700 } 701 } 702 } 703 704 linkmode_copy(supported, all_s); 705 linkmode_copy(state->advertising, all_adv); 706 707 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 708 } 709 710 static int phylink_validate(struct phylink *pl, unsigned long *supported, 711 struct phylink_link_state *state) 712 { 713 const unsigned long *interfaces = pl->config->supported_interfaces; 714 715 if (state->interface == PHY_INTERFACE_MODE_NA) 716 return phylink_validate_mask(pl, supported, state, interfaces); 717 718 if (!test_bit(state->interface, interfaces)) 719 return -EINVAL; 720 721 return phylink_validate_mac_and_pcs(pl, supported, state); 722 } 723 724 static int phylink_parse_fixedlink(struct phylink *pl, 725 const struct fwnode_handle *fwnode) 726 { 727 struct fwnode_handle *fixed_node; 728 bool pause, asym_pause, autoneg; 729 const struct phy_setting *s; 730 struct gpio_desc *desc; 731 u32 speed; 732 int ret; 733 734 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 735 if (fixed_node) { 736 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 737 738 pl->link_config.speed = speed; 739 pl->link_config.duplex = DUPLEX_HALF; 740 741 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 742 pl->link_config.duplex = DUPLEX_FULL; 743 744 /* We treat the "pause" and "asym-pause" terminology as 745 * defining the link partner's ability. 746 */ 747 if (fwnode_property_read_bool(fixed_node, "pause")) 748 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 749 pl->link_config.lp_advertising); 750 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 751 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 752 pl->link_config.lp_advertising); 753 754 if (ret == 0) { 755 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 756 GPIOD_IN, "?"); 757 758 if (!IS_ERR(desc)) 759 pl->link_gpio = desc; 760 else if (desc == ERR_PTR(-EPROBE_DEFER)) 761 ret = -EPROBE_DEFER; 762 } 763 fwnode_handle_put(fixed_node); 764 765 if (ret) 766 return ret; 767 } else { 768 u32 prop[5]; 769 770 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 771 NULL, 0); 772 if (ret != ARRAY_SIZE(prop)) { 773 phylink_err(pl, "broken fixed-link?\n"); 774 return -EINVAL; 775 } 776 777 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 778 prop, ARRAY_SIZE(prop)); 779 if (!ret) { 780 pl->link_config.duplex = prop[1] ? 781 DUPLEX_FULL : DUPLEX_HALF; 782 pl->link_config.speed = prop[2]; 783 if (prop[3]) 784 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 785 pl->link_config.lp_advertising); 786 if (prop[4]) 787 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 788 pl->link_config.lp_advertising); 789 } 790 } 791 792 if (pl->link_config.speed > SPEED_1000 && 793 pl->link_config.duplex != DUPLEX_FULL) 794 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 795 pl->link_config.speed); 796 797 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 798 linkmode_copy(pl->link_config.advertising, pl->supported); 799 phylink_validate(pl, pl->supported, &pl->link_config); 800 801 pause = phylink_test(pl->supported, Pause); 802 asym_pause = phylink_test(pl->supported, Asym_Pause); 803 autoneg = phylink_test(pl->supported, Autoneg); 804 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, 805 pl->supported, true); 806 linkmode_zero(pl->supported); 807 phylink_set(pl->supported, MII); 808 809 if (pause) 810 phylink_set(pl->supported, Pause); 811 812 if (asym_pause) 813 phylink_set(pl->supported, Asym_Pause); 814 815 if (autoneg) 816 phylink_set(pl->supported, Autoneg); 817 818 if (s) { 819 __set_bit(s->bit, pl->supported); 820 __set_bit(s->bit, pl->link_config.lp_advertising); 821 } else { 822 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 823 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 824 pl->link_config.speed); 825 } 826 827 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 828 pl->supported); 829 830 pl->link_config.link = 1; 831 pl->link_config.an_complete = 1; 832 833 return 0; 834 } 835 836 static int phylink_parse_mode(struct phylink *pl, 837 const struct fwnode_handle *fwnode) 838 { 839 struct fwnode_handle *dn; 840 const char *managed; 841 842 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 843 if (dn || fwnode_property_present(fwnode, "fixed-link")) 844 pl->cfg_link_an_mode = MLO_AN_FIXED; 845 fwnode_handle_put(dn); 846 847 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 848 strcmp(managed, "in-band-status") == 0) || 849 pl->config->ovr_an_inband) { 850 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 851 phylink_err(pl, 852 "can't use both fixed-link and in-band-status\n"); 853 return -EINVAL; 854 } 855 856 linkmode_zero(pl->supported); 857 phylink_set(pl->supported, MII); 858 phylink_set(pl->supported, Autoneg); 859 phylink_set(pl->supported, Asym_Pause); 860 phylink_set(pl->supported, Pause); 861 pl->cfg_link_an_mode = MLO_AN_INBAND; 862 863 switch (pl->link_config.interface) { 864 case PHY_INTERFACE_MODE_SGMII: 865 case PHY_INTERFACE_MODE_QSGMII: 866 case PHY_INTERFACE_MODE_QUSGMII: 867 case PHY_INTERFACE_MODE_RGMII: 868 case PHY_INTERFACE_MODE_RGMII_ID: 869 case PHY_INTERFACE_MODE_RGMII_RXID: 870 case PHY_INTERFACE_MODE_RGMII_TXID: 871 case PHY_INTERFACE_MODE_RTBI: 872 phylink_set(pl->supported, 10baseT_Half); 873 phylink_set(pl->supported, 10baseT_Full); 874 phylink_set(pl->supported, 100baseT_Half); 875 phylink_set(pl->supported, 100baseT_Full); 876 phylink_set(pl->supported, 1000baseT_Half); 877 phylink_set(pl->supported, 1000baseT_Full); 878 break; 879 880 case PHY_INTERFACE_MODE_1000BASEX: 881 phylink_set(pl->supported, 1000baseX_Full); 882 break; 883 884 case PHY_INTERFACE_MODE_2500BASEX: 885 phylink_set(pl->supported, 2500baseX_Full); 886 break; 887 888 case PHY_INTERFACE_MODE_5GBASER: 889 phylink_set(pl->supported, 5000baseT_Full); 890 break; 891 892 case PHY_INTERFACE_MODE_25GBASER: 893 phylink_set(pl->supported, 25000baseCR_Full); 894 phylink_set(pl->supported, 25000baseKR_Full); 895 phylink_set(pl->supported, 25000baseSR_Full); 896 fallthrough; 897 case PHY_INTERFACE_MODE_USXGMII: 898 case PHY_INTERFACE_MODE_10GKR: 899 case PHY_INTERFACE_MODE_10GBASER: 900 phylink_set(pl->supported, 10baseT_Half); 901 phylink_set(pl->supported, 10baseT_Full); 902 phylink_set(pl->supported, 100baseT_Half); 903 phylink_set(pl->supported, 100baseT_Full); 904 phylink_set(pl->supported, 1000baseT_Half); 905 phylink_set(pl->supported, 1000baseT_Full); 906 phylink_set(pl->supported, 1000baseX_Full); 907 phylink_set(pl->supported, 1000baseKX_Full); 908 phylink_set(pl->supported, 2500baseT_Full); 909 phylink_set(pl->supported, 2500baseX_Full); 910 phylink_set(pl->supported, 5000baseT_Full); 911 phylink_set(pl->supported, 10000baseT_Full); 912 phylink_set(pl->supported, 10000baseKR_Full); 913 phylink_set(pl->supported, 10000baseKX4_Full); 914 phylink_set(pl->supported, 10000baseCR_Full); 915 phylink_set(pl->supported, 10000baseSR_Full); 916 phylink_set(pl->supported, 10000baseLR_Full); 917 phylink_set(pl->supported, 10000baseLRM_Full); 918 phylink_set(pl->supported, 10000baseER_Full); 919 break; 920 921 case PHY_INTERFACE_MODE_XLGMII: 922 phylink_set(pl->supported, 25000baseCR_Full); 923 phylink_set(pl->supported, 25000baseKR_Full); 924 phylink_set(pl->supported, 25000baseSR_Full); 925 phylink_set(pl->supported, 40000baseKR4_Full); 926 phylink_set(pl->supported, 40000baseCR4_Full); 927 phylink_set(pl->supported, 40000baseSR4_Full); 928 phylink_set(pl->supported, 40000baseLR4_Full); 929 phylink_set(pl->supported, 50000baseCR2_Full); 930 phylink_set(pl->supported, 50000baseKR2_Full); 931 phylink_set(pl->supported, 50000baseSR2_Full); 932 phylink_set(pl->supported, 50000baseKR_Full); 933 phylink_set(pl->supported, 50000baseSR_Full); 934 phylink_set(pl->supported, 50000baseCR_Full); 935 phylink_set(pl->supported, 50000baseLR_ER_FR_Full); 936 phylink_set(pl->supported, 50000baseDR_Full); 937 phylink_set(pl->supported, 100000baseKR4_Full); 938 phylink_set(pl->supported, 100000baseSR4_Full); 939 phylink_set(pl->supported, 100000baseCR4_Full); 940 phylink_set(pl->supported, 100000baseLR4_ER4_Full); 941 phylink_set(pl->supported, 100000baseKR2_Full); 942 phylink_set(pl->supported, 100000baseSR2_Full); 943 phylink_set(pl->supported, 100000baseCR2_Full); 944 phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full); 945 phylink_set(pl->supported, 100000baseDR2_Full); 946 break; 947 948 default: 949 phylink_err(pl, 950 "incorrect link mode %s for in-band status\n", 951 phy_modes(pl->link_config.interface)); 952 return -EINVAL; 953 } 954 955 linkmode_copy(pl->link_config.advertising, pl->supported); 956 957 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 958 phylink_err(pl, 959 "failed to validate link configuration for in-band status\n"); 960 return -EINVAL; 961 } 962 } 963 964 return 0; 965 } 966 967 static void phylink_apply_manual_flow(struct phylink *pl, 968 struct phylink_link_state *state) 969 { 970 /* If autoneg is disabled, pause AN is also disabled */ 971 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 972 state->advertising)) 973 state->pause &= ~MLO_PAUSE_AN; 974 975 /* Manual configuration of pause modes */ 976 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 977 state->pause = pl->link_config.pause; 978 } 979 980 static void phylink_resolve_flow(struct phylink_link_state *state) 981 { 982 bool tx_pause, rx_pause; 983 984 state->pause = MLO_PAUSE_NONE; 985 if (state->duplex == DUPLEX_FULL) { 986 linkmode_resolve_pause(state->advertising, 987 state->lp_advertising, 988 &tx_pause, &rx_pause); 989 if (tx_pause) 990 state->pause |= MLO_PAUSE_TX; 991 if (rx_pause) 992 state->pause |= MLO_PAUSE_RX; 993 } 994 } 995 996 static void phylink_pcs_poll_stop(struct phylink *pl) 997 { 998 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 999 del_timer(&pl->link_poll); 1000 } 1001 1002 static void phylink_pcs_poll_start(struct phylink *pl) 1003 { 1004 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 1005 mod_timer(&pl->link_poll, jiffies + HZ); 1006 } 1007 1008 static void phylink_mac_config(struct phylink *pl, 1009 const struct phylink_link_state *state) 1010 { 1011 phylink_dbg(pl, 1012 "%s: mode=%s/%s/%s/%s/%s adv=%*pb pause=%02x link=%u\n", 1013 __func__, phylink_an_mode_str(pl->cur_link_an_mode), 1014 phy_modes(state->interface), 1015 phy_speed_to_str(state->speed), 1016 phy_duplex_to_str(state->duplex), 1017 phy_rate_matching_to_str(state->rate_matching), 1018 __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising, 1019 state->pause, state->link); 1020 1021 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, state); 1022 } 1023 1024 static void phylink_mac_pcs_an_restart(struct phylink *pl) 1025 { 1026 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1027 pl->link_config.advertising) && 1028 phy_interface_mode_is_8023z(pl->link_config.interface) && 1029 phylink_autoneg_inband(pl->cur_link_an_mode)) { 1030 if (pl->pcs) 1031 pl->pcs->ops->pcs_an_restart(pl->pcs); 1032 else if (pl->config->legacy_pre_march2020) 1033 pl->mac_ops->mac_an_restart(pl->config); 1034 } 1035 } 1036 1037 static void phylink_major_config(struct phylink *pl, bool restart, 1038 const struct phylink_link_state *state) 1039 { 1040 struct phylink_pcs *pcs = NULL; 1041 bool pcs_changed = false; 1042 unsigned int rate_kbd; 1043 int err; 1044 1045 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); 1046 1047 if (pl->using_mac_select_pcs) { 1048 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1049 if (IS_ERR(pcs)) { 1050 phylink_err(pl, 1051 "mac_select_pcs unexpectedly failed: %pe\n", 1052 pcs); 1053 return; 1054 } 1055 1056 pcs_changed = pcs && pl->pcs != pcs; 1057 } 1058 1059 phylink_pcs_poll_stop(pl); 1060 1061 if (pl->mac_ops->mac_prepare) { 1062 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode, 1063 state->interface); 1064 if (err < 0) { 1065 phylink_err(pl, "mac_prepare failed: %pe\n", 1066 ERR_PTR(err)); 1067 return; 1068 } 1069 } 1070 1071 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1072 * for the change. 1073 */ 1074 if (pcs_changed) 1075 pl->pcs = pcs; 1076 1077 phylink_mac_config(pl, state); 1078 1079 if (pl->pcs) { 1080 err = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode, 1081 state->interface, 1082 state->advertising, 1083 !!(pl->link_config.pause & 1084 MLO_PAUSE_AN)); 1085 if (err < 0) 1086 phylink_err(pl, "pcs_config failed: %pe\n", 1087 ERR_PTR(err)); 1088 if (err > 0) 1089 restart = true; 1090 } 1091 if (restart) 1092 phylink_mac_pcs_an_restart(pl); 1093 1094 if (pl->mac_ops->mac_finish) { 1095 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode, 1096 state->interface); 1097 if (err < 0) 1098 phylink_err(pl, "mac_finish failed: %pe\n", 1099 ERR_PTR(err)); 1100 } 1101 1102 if (pl->sfp_bus) { 1103 rate_kbd = phylink_interface_signal_rate(state->interface); 1104 if (rate_kbd) 1105 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1106 } 1107 1108 phylink_pcs_poll_start(pl); 1109 } 1110 1111 /* 1112 * Reconfigure for a change of inband advertisement. 1113 * If we have a separate PCS, we only need to call its pcs_config() method, 1114 * and then restart AN if it indicates something changed. Otherwise, we do 1115 * the full MAC reconfiguration. 1116 */ 1117 static int phylink_change_inband_advert(struct phylink *pl) 1118 { 1119 int ret; 1120 1121 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1122 return 0; 1123 1124 if (!pl->pcs && pl->config->legacy_pre_march2020) { 1125 /* Legacy method */ 1126 phylink_mac_config(pl, &pl->link_config); 1127 phylink_mac_pcs_an_restart(pl); 1128 return 0; 1129 } 1130 1131 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1132 phylink_an_mode_str(pl->cur_link_an_mode), 1133 phy_modes(pl->link_config.interface), 1134 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1135 pl->link_config.pause); 1136 1137 /* Modern PCS-based method; update the advert at the PCS, and 1138 * restart negotiation if the pcs_config() helper indicates that 1139 * the programmed advertisement has changed. 1140 */ 1141 ret = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode, 1142 pl->link_config.interface, 1143 pl->link_config.advertising, 1144 !!(pl->link_config.pause & 1145 MLO_PAUSE_AN)); 1146 if (ret < 0) 1147 return ret; 1148 1149 if (ret > 0) 1150 phylink_mac_pcs_an_restart(pl); 1151 1152 return 0; 1153 } 1154 1155 static void phylink_mac_pcs_get_state(struct phylink *pl, 1156 struct phylink_link_state *state) 1157 { 1158 linkmode_copy(state->advertising, pl->link_config.advertising); 1159 linkmode_zero(state->lp_advertising); 1160 state->interface = pl->link_config.interface; 1161 state->rate_matching = pl->link_config.rate_matching; 1162 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1163 state->advertising)) { 1164 state->speed = SPEED_UNKNOWN; 1165 state->duplex = DUPLEX_UNKNOWN; 1166 state->pause = MLO_PAUSE_NONE; 1167 } else { 1168 state->speed = pl->link_config.speed; 1169 state->duplex = pl->link_config.duplex; 1170 state->pause = pl->link_config.pause; 1171 } 1172 state->an_complete = 0; 1173 state->link = 1; 1174 1175 if (pl->pcs) 1176 pl->pcs->ops->pcs_get_state(pl->pcs, state); 1177 else if (pl->mac_ops->mac_pcs_get_state && 1178 pl->config->legacy_pre_march2020) 1179 pl->mac_ops->mac_pcs_get_state(pl->config, state); 1180 else 1181 state->link = 0; 1182 } 1183 1184 /* The fixed state is... fixed except for the link state, 1185 * which may be determined by a GPIO or a callback. 1186 */ 1187 static void phylink_get_fixed_state(struct phylink *pl, 1188 struct phylink_link_state *state) 1189 { 1190 *state = pl->link_config; 1191 if (pl->config->get_fixed_state) 1192 pl->config->get_fixed_state(pl->config, state); 1193 else if (pl->link_gpio) 1194 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1195 1196 phylink_resolve_flow(state); 1197 } 1198 1199 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1200 { 1201 struct phylink_link_state link_state; 1202 1203 switch (pl->cur_link_an_mode) { 1204 case MLO_AN_PHY: 1205 link_state = pl->phy_state; 1206 break; 1207 1208 case MLO_AN_FIXED: 1209 phylink_get_fixed_state(pl, &link_state); 1210 break; 1211 1212 case MLO_AN_INBAND: 1213 link_state = pl->link_config; 1214 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1215 link_state.pause = MLO_PAUSE_NONE; 1216 break; 1217 1218 default: /* can't happen */ 1219 return; 1220 } 1221 1222 link_state.link = false; 1223 1224 phylink_apply_manual_flow(pl, &link_state); 1225 phylink_major_config(pl, force_restart, &link_state); 1226 } 1227 1228 static const char *phylink_pause_to_str(int pause) 1229 { 1230 switch (pause & MLO_PAUSE_TXRX_MASK) { 1231 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1232 return "rx/tx"; 1233 case MLO_PAUSE_TX: 1234 return "tx"; 1235 case MLO_PAUSE_RX: 1236 return "rx"; 1237 default: 1238 return "off"; 1239 } 1240 } 1241 1242 static void phylink_link_up(struct phylink *pl, 1243 struct phylink_link_state link_state) 1244 { 1245 struct net_device *ndev = pl->netdev; 1246 int speed, duplex; 1247 bool rx_pause; 1248 1249 speed = link_state.speed; 1250 duplex = link_state.duplex; 1251 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1252 1253 switch (link_state.rate_matching) { 1254 case RATE_MATCH_PAUSE: 1255 /* The PHY is doing rate matchion from the media rate (in 1256 * the link_state) to the interface speed, and will send 1257 * pause frames to the MAC to limit its transmission speed. 1258 */ 1259 speed = phylink_interface_max_speed(link_state.interface); 1260 duplex = DUPLEX_FULL; 1261 rx_pause = true; 1262 break; 1263 1264 case RATE_MATCH_CRS: 1265 /* The PHY is doing rate matchion from the media rate (in 1266 * the link_state) to the interface speed, and will cause 1267 * collisions to the MAC to limit its transmission speed. 1268 */ 1269 speed = phylink_interface_max_speed(link_state.interface); 1270 duplex = DUPLEX_HALF; 1271 break; 1272 } 1273 1274 pl->cur_interface = link_state.interface; 1275 1276 if (pl->pcs && pl->pcs->ops->pcs_link_up) 1277 pl->pcs->ops->pcs_link_up(pl->pcs, pl->cur_link_an_mode, 1278 pl->cur_interface, speed, duplex); 1279 1280 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode, 1281 pl->cur_interface, speed, duplex, 1282 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1283 1284 if (ndev) 1285 netif_carrier_on(ndev); 1286 1287 phylink_info(pl, 1288 "Link is Up - %s/%s - flow control %s\n", 1289 phy_speed_to_str(link_state.speed), 1290 phy_duplex_to_str(link_state.duplex), 1291 phylink_pause_to_str(link_state.pause)); 1292 } 1293 1294 static void phylink_link_down(struct phylink *pl) 1295 { 1296 struct net_device *ndev = pl->netdev; 1297 1298 if (ndev) 1299 netif_carrier_off(ndev); 1300 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode, 1301 pl->cur_interface); 1302 phylink_info(pl, "Link is Down\n"); 1303 } 1304 1305 static void phylink_resolve(struct work_struct *w) 1306 { 1307 struct phylink *pl = container_of(w, struct phylink, resolve); 1308 struct phylink_link_state link_state; 1309 struct net_device *ndev = pl->netdev; 1310 bool mac_config = false; 1311 bool retrigger = false; 1312 bool cur_link_state; 1313 1314 mutex_lock(&pl->state_mutex); 1315 if (pl->netdev) 1316 cur_link_state = netif_carrier_ok(ndev); 1317 else 1318 cur_link_state = pl->old_link_state; 1319 1320 if (pl->phylink_disable_state) { 1321 pl->mac_link_dropped = false; 1322 link_state.link = false; 1323 } else if (pl->mac_link_dropped) { 1324 link_state.link = false; 1325 retrigger = true; 1326 } else { 1327 switch (pl->cur_link_an_mode) { 1328 case MLO_AN_PHY: 1329 link_state = pl->phy_state; 1330 phylink_apply_manual_flow(pl, &link_state); 1331 mac_config = link_state.link; 1332 break; 1333 1334 case MLO_AN_FIXED: 1335 phylink_get_fixed_state(pl, &link_state); 1336 mac_config = link_state.link; 1337 break; 1338 1339 case MLO_AN_INBAND: 1340 phylink_mac_pcs_get_state(pl, &link_state); 1341 1342 /* The PCS may have a latching link-fail indicator. 1343 * If the link was up, bring the link down and 1344 * re-trigger the resolve. Otherwise, re-read the 1345 * PCS state to get the current status of the link. 1346 */ 1347 if (!link_state.link) { 1348 if (cur_link_state) 1349 retrigger = true; 1350 else 1351 phylink_mac_pcs_get_state(pl, 1352 &link_state); 1353 } 1354 1355 /* If we have a phy, the "up" state is the union of 1356 * both the PHY and the MAC 1357 */ 1358 if (pl->phydev) 1359 link_state.link &= pl->phy_state.link; 1360 1361 /* Only update if the PHY link is up */ 1362 if (pl->phydev && pl->phy_state.link) { 1363 /* If the interface has changed, force a 1364 * link down event if the link isn't already 1365 * down, and re-resolve. 1366 */ 1367 if (link_state.interface != 1368 pl->phy_state.interface) { 1369 retrigger = true; 1370 link_state.link = false; 1371 } 1372 link_state.interface = pl->phy_state.interface; 1373 1374 /* If we are doing rate matching, then the 1375 * link speed/duplex comes from the PHY 1376 */ 1377 if (pl->phy_state.rate_matching) { 1378 link_state.rate_matching = 1379 pl->phy_state.rate_matching; 1380 link_state.speed = pl->phy_state.speed; 1381 link_state.duplex = 1382 pl->phy_state.duplex; 1383 } 1384 1385 /* If we have a PHY, we need to update with 1386 * the PHY flow control bits. 1387 */ 1388 link_state.pause = pl->phy_state.pause; 1389 mac_config = true; 1390 } 1391 phylink_apply_manual_flow(pl, &link_state); 1392 break; 1393 } 1394 } 1395 1396 if (mac_config) { 1397 if (link_state.interface != pl->link_config.interface) { 1398 /* The interface has changed, force the link down and 1399 * then reconfigure. 1400 */ 1401 if (cur_link_state) { 1402 phylink_link_down(pl); 1403 cur_link_state = false; 1404 } 1405 phylink_major_config(pl, false, &link_state); 1406 pl->link_config.interface = link_state.interface; 1407 } else if (!pl->pcs && pl->config->legacy_pre_march2020) { 1408 /* The interface remains unchanged, only the speed, 1409 * duplex or pause settings have changed. Call the 1410 * old mac_config() method to configure the MAC/PCS 1411 * only if we do not have a legacy MAC driver. 1412 */ 1413 phylink_mac_config(pl, &link_state); 1414 } 1415 } 1416 1417 if (link_state.link != cur_link_state) { 1418 pl->old_link_state = link_state.link; 1419 if (!link_state.link) 1420 phylink_link_down(pl); 1421 else 1422 phylink_link_up(pl, link_state); 1423 } 1424 if (!link_state.link && retrigger) { 1425 pl->mac_link_dropped = false; 1426 queue_work(system_power_efficient_wq, &pl->resolve); 1427 } 1428 mutex_unlock(&pl->state_mutex); 1429 } 1430 1431 static void phylink_run_resolve(struct phylink *pl) 1432 { 1433 if (!pl->phylink_disable_state) 1434 queue_work(system_power_efficient_wq, &pl->resolve); 1435 } 1436 1437 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1438 { 1439 unsigned long state = pl->phylink_disable_state; 1440 1441 set_bit(bit, &pl->phylink_disable_state); 1442 if (state == 0) { 1443 queue_work(system_power_efficient_wq, &pl->resolve); 1444 flush_work(&pl->resolve); 1445 } 1446 } 1447 1448 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1449 { 1450 clear_bit(bit, &pl->phylink_disable_state); 1451 phylink_run_resolve(pl); 1452 } 1453 1454 static void phylink_fixed_poll(struct timer_list *t) 1455 { 1456 struct phylink *pl = container_of(t, struct phylink, link_poll); 1457 1458 mod_timer(t, jiffies + HZ); 1459 1460 phylink_run_resolve(pl); 1461 } 1462 1463 static const struct sfp_upstream_ops sfp_phylink_ops; 1464 1465 static int phylink_register_sfp(struct phylink *pl, 1466 const struct fwnode_handle *fwnode) 1467 { 1468 struct sfp_bus *bus; 1469 int ret; 1470 1471 if (!fwnode) 1472 return 0; 1473 1474 bus = sfp_bus_find_fwnode(fwnode); 1475 if (IS_ERR(bus)) { 1476 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1477 return PTR_ERR(bus); 1478 } 1479 1480 pl->sfp_bus = bus; 1481 1482 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1483 sfp_bus_put(bus); 1484 1485 return ret; 1486 } 1487 1488 /** 1489 * phylink_create() - create a phylink instance 1490 * @config: a pointer to the target &struct phylink_config 1491 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1492 * interface 1493 * @iface: the desired link mode defined by &typedef phy_interface_t 1494 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1495 * 1496 * Create a new phylink instance, and parse the link parameters found in @np. 1497 * This will parse in-band modes, fixed-link or SFP configuration. 1498 * 1499 * Note: the rtnl lock must not be held when calling this function. 1500 * 1501 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1502 * must use IS_ERR() to check for errors from this function. 1503 */ 1504 struct phylink *phylink_create(struct phylink_config *config, 1505 const struct fwnode_handle *fwnode, 1506 phy_interface_t iface, 1507 const struct phylink_mac_ops *mac_ops) 1508 { 1509 bool using_mac_select_pcs = false; 1510 struct phylink *pl; 1511 int ret; 1512 1513 /* Validate the supplied configuration */ 1514 if (phy_interface_empty(config->supported_interfaces)) { 1515 dev_err(config->dev, 1516 "phylink: error: empty supported_interfaces\n"); 1517 return ERR_PTR(-EINVAL); 1518 } 1519 1520 if (mac_ops->mac_select_pcs && 1521 mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) != 1522 ERR_PTR(-EOPNOTSUPP)) 1523 using_mac_select_pcs = true; 1524 1525 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1526 if (!pl) 1527 return ERR_PTR(-ENOMEM); 1528 1529 mutex_init(&pl->state_mutex); 1530 INIT_WORK(&pl->resolve, phylink_resolve); 1531 1532 pl->config = config; 1533 if (config->type == PHYLINK_NETDEV) { 1534 pl->netdev = to_net_dev(config->dev); 1535 } else if (config->type == PHYLINK_DEV) { 1536 pl->dev = config->dev; 1537 } else { 1538 kfree(pl); 1539 return ERR_PTR(-EINVAL); 1540 } 1541 1542 pl->using_mac_select_pcs = using_mac_select_pcs; 1543 pl->phy_state.interface = iface; 1544 pl->link_interface = iface; 1545 if (iface == PHY_INTERFACE_MODE_MOCA) 1546 pl->link_port = PORT_BNC; 1547 else 1548 pl->link_port = PORT_MII; 1549 pl->link_config.interface = iface; 1550 pl->link_config.pause = MLO_PAUSE_AN; 1551 pl->link_config.speed = SPEED_UNKNOWN; 1552 pl->link_config.duplex = DUPLEX_UNKNOWN; 1553 pl->mac_ops = mac_ops; 1554 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1555 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1556 1557 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 1558 linkmode_copy(pl->link_config.advertising, pl->supported); 1559 phylink_validate(pl, pl->supported, &pl->link_config); 1560 1561 ret = phylink_parse_mode(pl, fwnode); 1562 if (ret < 0) { 1563 kfree(pl); 1564 return ERR_PTR(ret); 1565 } 1566 1567 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1568 ret = phylink_parse_fixedlink(pl, fwnode); 1569 if (ret < 0) { 1570 kfree(pl); 1571 return ERR_PTR(ret); 1572 } 1573 } 1574 1575 pl->cur_link_an_mode = pl->cfg_link_an_mode; 1576 1577 ret = phylink_register_sfp(pl, fwnode); 1578 if (ret < 0) { 1579 kfree(pl); 1580 return ERR_PTR(ret); 1581 } 1582 1583 return pl; 1584 } 1585 EXPORT_SYMBOL_GPL(phylink_create); 1586 1587 /** 1588 * phylink_destroy() - cleanup and destroy the phylink instance 1589 * @pl: a pointer to a &struct phylink returned from phylink_create() 1590 * 1591 * Destroy a phylink instance. Any PHY that has been attached must have been 1592 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1593 * 1594 * Note: the rtnl lock must not be held when calling this function. 1595 */ 1596 void phylink_destroy(struct phylink *pl) 1597 { 1598 sfp_bus_del_upstream(pl->sfp_bus); 1599 if (pl->link_gpio) 1600 gpiod_put(pl->link_gpio); 1601 1602 cancel_work_sync(&pl->resolve); 1603 kfree(pl); 1604 } 1605 EXPORT_SYMBOL_GPL(phylink_destroy); 1606 1607 /** 1608 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1609 * @pl: a pointer to a &struct phylink returned from phylink_create() 1610 * 1611 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1612 * no PHY is needed. 1613 * 1614 * Returns true if phylink will be expecting a PHY. 1615 */ 1616 bool phylink_expects_phy(struct phylink *pl) 1617 { 1618 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1619 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1620 phy_interface_mode_is_8023z(pl->link_config.interface))) 1621 return false; 1622 return true; 1623 } 1624 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1625 1626 static void phylink_phy_change(struct phy_device *phydev, bool up) 1627 { 1628 struct phylink *pl = phydev->phylink; 1629 bool tx_pause, rx_pause; 1630 1631 phy_get_pause(phydev, &tx_pause, &rx_pause); 1632 1633 mutex_lock(&pl->state_mutex); 1634 pl->phy_state.speed = phydev->speed; 1635 pl->phy_state.duplex = phydev->duplex; 1636 pl->phy_state.rate_matching = phydev->rate_matching; 1637 pl->phy_state.pause = MLO_PAUSE_NONE; 1638 if (tx_pause) 1639 pl->phy_state.pause |= MLO_PAUSE_TX; 1640 if (rx_pause) 1641 pl->phy_state.pause |= MLO_PAUSE_RX; 1642 pl->phy_state.interface = phydev->interface; 1643 pl->phy_state.link = up; 1644 mutex_unlock(&pl->state_mutex); 1645 1646 phylink_run_resolve(pl); 1647 1648 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down", 1649 phy_modes(phydev->interface), 1650 phy_speed_to_str(phydev->speed), 1651 phy_duplex_to_str(phydev->duplex), 1652 phy_rate_matching_to_str(phydev->rate_matching), 1653 phylink_pause_to_str(pl->phy_state.pause)); 1654 } 1655 1656 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 1657 phy_interface_t interface) 1658 { 1659 struct phylink_link_state config; 1660 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 1661 char *irq_str; 1662 int ret; 1663 1664 /* 1665 * This is the new way of dealing with flow control for PHYs, 1666 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 1667 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 1668 * using our validate call to the MAC, we rely upon the MAC 1669 * clearing the bits from both supported and advertising fields. 1670 */ 1671 phy_support_asym_pause(phy); 1672 1673 memset(&config, 0, sizeof(config)); 1674 linkmode_copy(supported, phy->supported); 1675 linkmode_copy(config.advertising, phy->advertising); 1676 1677 /* Check whether we would use rate matching for the proposed interface 1678 * mode. 1679 */ 1680 config.rate_matching = phy_get_rate_matching(phy, interface); 1681 1682 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 1683 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 1684 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 1685 * their Serdes is either unnecessary or not reasonable. 1686 * 1687 * For these which switch interface modes, we really need to know which 1688 * interface modes the PHY supports to properly work out which ethtool 1689 * linkmodes can be supported. For now, as a work-around, we validate 1690 * against all interface modes, which may lead to more ethtool link 1691 * modes being advertised than are actually supported. 1692 */ 1693 if (phy->is_c45 && config.rate_matching == RATE_MATCH_NONE && 1694 interface != PHY_INTERFACE_MODE_RXAUI && 1695 interface != PHY_INTERFACE_MODE_XAUI && 1696 interface != PHY_INTERFACE_MODE_USXGMII) 1697 config.interface = PHY_INTERFACE_MODE_NA; 1698 else 1699 config.interface = interface; 1700 1701 ret = phylink_validate(pl, supported, &config); 1702 if (ret) { 1703 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 1704 phy_modes(config.interface), 1705 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 1706 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 1707 ERR_PTR(ret)); 1708 return ret; 1709 } 1710 1711 phy->phylink = pl; 1712 phy->phy_link_change = phylink_phy_change; 1713 1714 irq_str = phy_attached_info_irq(phy); 1715 phylink_info(pl, 1716 "PHY [%s] driver [%s] (irq=%s)\n", 1717 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 1718 kfree(irq_str); 1719 1720 mutex_lock(&phy->lock); 1721 mutex_lock(&pl->state_mutex); 1722 pl->phydev = phy; 1723 pl->phy_state.interface = interface; 1724 pl->phy_state.pause = MLO_PAUSE_NONE; 1725 pl->phy_state.speed = SPEED_UNKNOWN; 1726 pl->phy_state.duplex = DUPLEX_UNKNOWN; 1727 pl->phy_state.rate_matching = RATE_MATCH_NONE; 1728 linkmode_copy(pl->supported, supported); 1729 linkmode_copy(pl->link_config.advertising, config.advertising); 1730 1731 /* Restrict the phy advertisement according to the MAC support. */ 1732 linkmode_copy(phy->advertising, config.advertising); 1733 mutex_unlock(&pl->state_mutex); 1734 mutex_unlock(&phy->lock); 1735 1736 phylink_dbg(pl, 1737 "phy: %s setting supported %*pb advertising %*pb\n", 1738 phy_modes(interface), 1739 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 1740 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 1741 1742 if (phy_interrupt_is_valid(phy)) 1743 phy_request_interrupt(phy); 1744 1745 if (pl->config->mac_managed_pm) 1746 phy->mac_managed_pm = true; 1747 1748 return 0; 1749 } 1750 1751 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 1752 phy_interface_t interface) 1753 { 1754 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 1755 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1756 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 1757 return -EINVAL; 1758 1759 if (pl->phydev) 1760 return -EBUSY; 1761 1762 return phy_attach_direct(pl->netdev, phy, 0, interface); 1763 } 1764 1765 /** 1766 * phylink_connect_phy() - connect a PHY to the phylink instance 1767 * @pl: a pointer to a &struct phylink returned from phylink_create() 1768 * @phy: a pointer to a &struct phy_device. 1769 * 1770 * Connect @phy to the phylink instance specified by @pl by calling 1771 * phy_attach_direct(). Configure the @phy according to the MAC driver's 1772 * capabilities, start the PHYLIB state machine and enable any interrupts 1773 * that the PHY supports. 1774 * 1775 * This updates the phylink's ethtool supported and advertising link mode 1776 * masks. 1777 * 1778 * Returns 0 on success or a negative errno. 1779 */ 1780 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 1781 { 1782 int ret; 1783 1784 /* Use PHY device/driver interface */ 1785 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1786 pl->link_interface = phy->interface; 1787 pl->link_config.interface = pl->link_interface; 1788 } 1789 1790 ret = phylink_attach_phy(pl, phy, pl->link_interface); 1791 if (ret < 0) 1792 return ret; 1793 1794 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 1795 if (ret) 1796 phy_detach(phy); 1797 1798 return ret; 1799 } 1800 EXPORT_SYMBOL_GPL(phylink_connect_phy); 1801 1802 /** 1803 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 1804 * @pl: a pointer to a &struct phylink returned from phylink_create() 1805 * @dn: a pointer to a &struct device_node. 1806 * @flags: PHY-specific flags to communicate to the PHY device driver 1807 * 1808 * Connect the phy specified in the device node @dn to the phylink instance 1809 * specified by @pl. Actions specified in phylink_connect_phy() will be 1810 * performed. 1811 * 1812 * Returns 0 on success or a negative errno. 1813 */ 1814 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 1815 u32 flags) 1816 { 1817 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 1818 } 1819 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 1820 1821 /** 1822 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 1823 * @pl: a pointer to a &struct phylink returned from phylink_create() 1824 * @fwnode: a pointer to a &struct fwnode_handle. 1825 * @flags: PHY-specific flags to communicate to the PHY device driver 1826 * 1827 * Connect the phy specified @fwnode to the phylink instance specified 1828 * by @pl. 1829 * 1830 * Returns 0 on success or a negative errno. 1831 */ 1832 int phylink_fwnode_phy_connect(struct phylink *pl, 1833 const struct fwnode_handle *fwnode, 1834 u32 flags) 1835 { 1836 struct fwnode_handle *phy_fwnode; 1837 struct phy_device *phy_dev; 1838 int ret; 1839 1840 /* Fixed links and 802.3z are handled without needing a PHY */ 1841 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1842 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1843 phy_interface_mode_is_8023z(pl->link_interface))) 1844 return 0; 1845 1846 phy_fwnode = fwnode_get_phy_node(fwnode); 1847 if (IS_ERR(phy_fwnode)) { 1848 if (pl->cfg_link_an_mode == MLO_AN_PHY) 1849 return -ENODEV; 1850 return 0; 1851 } 1852 1853 phy_dev = fwnode_phy_find_device(phy_fwnode); 1854 /* We're done with the phy_node handle */ 1855 fwnode_handle_put(phy_fwnode); 1856 if (!phy_dev) 1857 return -ENODEV; 1858 1859 /* Use PHY device/driver interface */ 1860 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1861 pl->link_interface = phy_dev->interface; 1862 pl->link_config.interface = pl->link_interface; 1863 } 1864 1865 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 1866 pl->link_interface); 1867 phy_device_free(phy_dev); 1868 if (ret) 1869 return ret; 1870 1871 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 1872 if (ret) 1873 phy_detach(phy_dev); 1874 1875 return ret; 1876 } 1877 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 1878 1879 /** 1880 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 1881 * instance. 1882 * @pl: a pointer to a &struct phylink returned from phylink_create() 1883 * 1884 * Disconnect any current PHY from the phylink instance described by @pl. 1885 */ 1886 void phylink_disconnect_phy(struct phylink *pl) 1887 { 1888 struct phy_device *phy; 1889 1890 ASSERT_RTNL(); 1891 1892 phy = pl->phydev; 1893 if (phy) { 1894 mutex_lock(&phy->lock); 1895 mutex_lock(&pl->state_mutex); 1896 pl->phydev = NULL; 1897 mutex_unlock(&pl->state_mutex); 1898 mutex_unlock(&phy->lock); 1899 flush_work(&pl->resolve); 1900 1901 phy_disconnect(phy); 1902 } 1903 } 1904 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 1905 1906 /** 1907 * phylink_mac_change() - notify phylink of a change in MAC state 1908 * @pl: a pointer to a &struct phylink returned from phylink_create() 1909 * @up: indicates whether the link is currently up. 1910 * 1911 * The MAC driver should call this driver when the state of its link 1912 * changes (eg, link failure, new negotiation results, etc.) 1913 */ 1914 void phylink_mac_change(struct phylink *pl, bool up) 1915 { 1916 if (!up) 1917 pl->mac_link_dropped = true; 1918 phylink_run_resolve(pl); 1919 phylink_dbg(pl, "mac link %s\n", up ? "up" : "down"); 1920 } 1921 EXPORT_SYMBOL_GPL(phylink_mac_change); 1922 1923 static irqreturn_t phylink_link_handler(int irq, void *data) 1924 { 1925 struct phylink *pl = data; 1926 1927 phylink_run_resolve(pl); 1928 1929 return IRQ_HANDLED; 1930 } 1931 1932 /** 1933 * phylink_start() - start a phylink instance 1934 * @pl: a pointer to a &struct phylink returned from phylink_create() 1935 * 1936 * Start the phylink instance specified by @pl, configuring the MAC for the 1937 * desired link mode(s) and negotiation style. This should be called from the 1938 * network device driver's &struct net_device_ops ndo_open() method. 1939 */ 1940 void phylink_start(struct phylink *pl) 1941 { 1942 bool poll = false; 1943 1944 ASSERT_RTNL(); 1945 1946 phylink_info(pl, "configuring for %s/%s link mode\n", 1947 phylink_an_mode_str(pl->cur_link_an_mode), 1948 phy_modes(pl->link_config.interface)); 1949 1950 /* Always set the carrier off */ 1951 if (pl->netdev) 1952 netif_carrier_off(pl->netdev); 1953 1954 /* Apply the link configuration to the MAC when starting. This allows 1955 * a fixed-link to start with the correct parameters, and also 1956 * ensures that we set the appropriate advertisement for Serdes links. 1957 * 1958 * Restart autonegotiation if using 802.3z to ensure that the link 1959 * parameters are properly negotiated. This is necessary for DSA 1960 * switches using 802.3z negotiation to ensure they see our modes. 1961 */ 1962 phylink_mac_initial_config(pl, true); 1963 1964 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 1965 1966 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 1967 int irq = gpiod_to_irq(pl->link_gpio); 1968 1969 if (irq > 0) { 1970 if (!request_irq(irq, phylink_link_handler, 1971 IRQF_TRIGGER_RISING | 1972 IRQF_TRIGGER_FALLING, 1973 "netdev link", pl)) 1974 pl->link_irq = irq; 1975 else 1976 irq = 0; 1977 } 1978 if (irq <= 0) 1979 poll = true; 1980 } 1981 1982 switch (pl->cfg_link_an_mode) { 1983 case MLO_AN_FIXED: 1984 poll |= pl->config->poll_fixed_state; 1985 break; 1986 case MLO_AN_INBAND: 1987 if (pl->pcs) 1988 poll |= pl->pcs->poll; 1989 break; 1990 } 1991 if (poll) 1992 mod_timer(&pl->link_poll, jiffies + HZ); 1993 if (pl->phydev) 1994 phy_start(pl->phydev); 1995 if (pl->sfp_bus) 1996 sfp_upstream_start(pl->sfp_bus); 1997 } 1998 EXPORT_SYMBOL_GPL(phylink_start); 1999 2000 /** 2001 * phylink_stop() - stop a phylink instance 2002 * @pl: a pointer to a &struct phylink returned from phylink_create() 2003 * 2004 * Stop the phylink instance specified by @pl. This should be called from the 2005 * network device driver's &struct net_device_ops ndo_stop() method. The 2006 * network device's carrier state should not be changed prior to calling this 2007 * function. 2008 * 2009 * This will synchronously bring down the link if the link is not already 2010 * down (in other words, it will trigger a mac_link_down() method call.) 2011 */ 2012 void phylink_stop(struct phylink *pl) 2013 { 2014 ASSERT_RTNL(); 2015 2016 if (pl->sfp_bus) 2017 sfp_upstream_stop(pl->sfp_bus); 2018 if (pl->phydev) 2019 phy_stop(pl->phydev); 2020 del_timer_sync(&pl->link_poll); 2021 if (pl->link_irq) { 2022 free_irq(pl->link_irq, pl); 2023 pl->link_irq = 0; 2024 } 2025 2026 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2027 } 2028 EXPORT_SYMBOL_GPL(phylink_stop); 2029 2030 /** 2031 * phylink_suspend() - handle a network device suspend event 2032 * @pl: a pointer to a &struct phylink returned from phylink_create() 2033 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2034 * 2035 * Handle a network device suspend event. There are several cases: 2036 * 2037 * - If Wake-on-Lan is not active, we can bring down the link between 2038 * the MAC and PHY by calling phylink_stop(). 2039 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2040 * can also bring down the link between the MAC and PHY. 2041 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2042 * still needs to receive packets, so we can not bring the link down. 2043 */ 2044 void phylink_suspend(struct phylink *pl, bool mac_wol) 2045 { 2046 ASSERT_RTNL(); 2047 2048 if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) { 2049 /* Wake-on-Lan enabled, MAC handling */ 2050 mutex_lock(&pl->state_mutex); 2051 2052 /* Stop the resolver bringing the link up */ 2053 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2054 2055 /* Disable the carrier, to prevent transmit timeouts, 2056 * but one would hope all packets have been sent. This 2057 * also means phylink_resolve() will do nothing. 2058 */ 2059 if (pl->netdev) 2060 netif_carrier_off(pl->netdev); 2061 else 2062 pl->old_link_state = false; 2063 2064 /* We do not call mac_link_down() here as we want the 2065 * link to remain up to receive the WoL packets. 2066 */ 2067 mutex_unlock(&pl->state_mutex); 2068 } else { 2069 phylink_stop(pl); 2070 } 2071 } 2072 EXPORT_SYMBOL_GPL(phylink_suspend); 2073 2074 /** 2075 * phylink_resume() - handle a network device resume event 2076 * @pl: a pointer to a &struct phylink returned from phylink_create() 2077 * 2078 * Undo the effects of phylink_suspend(), returning the link to an 2079 * operational state. 2080 */ 2081 void phylink_resume(struct phylink *pl) 2082 { 2083 ASSERT_RTNL(); 2084 2085 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2086 /* Wake-on-Lan enabled, MAC handling */ 2087 2088 /* Call mac_link_down() so we keep the overall state balanced. 2089 * Do this under the state_mutex lock for consistency. This 2090 * will cause a "Link Down" message to be printed during 2091 * resume, which is harmless - the true link state will be 2092 * printed when we run a resolve. 2093 */ 2094 mutex_lock(&pl->state_mutex); 2095 phylink_link_down(pl); 2096 mutex_unlock(&pl->state_mutex); 2097 2098 /* Re-apply the link parameters so that all the settings get 2099 * restored to the MAC. 2100 */ 2101 phylink_mac_initial_config(pl, true); 2102 2103 /* Re-enable and re-resolve the link parameters */ 2104 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2105 } else { 2106 phylink_start(pl); 2107 } 2108 } 2109 EXPORT_SYMBOL_GPL(phylink_resume); 2110 2111 /** 2112 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2113 * @pl: a pointer to a &struct phylink returned from phylink_create() 2114 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2115 * 2116 * Read the wake on lan parameters from the PHY attached to the phylink 2117 * instance specified by @pl. If no PHY is currently attached, report no 2118 * support for wake on lan. 2119 */ 2120 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2121 { 2122 ASSERT_RTNL(); 2123 2124 wol->supported = 0; 2125 wol->wolopts = 0; 2126 2127 if (pl->phydev) 2128 phy_ethtool_get_wol(pl->phydev, wol); 2129 } 2130 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2131 2132 /** 2133 * phylink_ethtool_set_wol() - set wake on lan parameters 2134 * @pl: a pointer to a &struct phylink returned from phylink_create() 2135 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2136 * 2137 * Set the wake on lan parameters for the PHY attached to the phylink 2138 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2139 * error. 2140 * 2141 * Returns zero on success or negative errno code. 2142 */ 2143 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2144 { 2145 int ret = -EOPNOTSUPP; 2146 2147 ASSERT_RTNL(); 2148 2149 if (pl->phydev) 2150 ret = phy_ethtool_set_wol(pl->phydev, wol); 2151 2152 return ret; 2153 } 2154 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2155 2156 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2157 { 2158 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2159 2160 linkmode_zero(mask); 2161 phylink_set_port_modes(mask); 2162 2163 linkmode_and(dst, dst, mask); 2164 linkmode_or(dst, dst, b); 2165 } 2166 2167 static void phylink_get_ksettings(const struct phylink_link_state *state, 2168 struct ethtool_link_ksettings *kset) 2169 { 2170 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2171 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2172 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2173 kset->base.speed = state->speed; 2174 kset->base.duplex = state->duplex; 2175 } 2176 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2177 state->advertising) ? 2178 AUTONEG_ENABLE : AUTONEG_DISABLE; 2179 } 2180 2181 /** 2182 * phylink_ethtool_ksettings_get() - get the current link settings 2183 * @pl: a pointer to a &struct phylink returned from phylink_create() 2184 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2185 * 2186 * Read the current link settings for the phylink instance specified by @pl. 2187 * This will be the link settings read from the MAC, PHY or fixed link 2188 * settings depending on the current negotiation mode. 2189 */ 2190 int phylink_ethtool_ksettings_get(struct phylink *pl, 2191 struct ethtool_link_ksettings *kset) 2192 { 2193 struct phylink_link_state link_state; 2194 2195 ASSERT_RTNL(); 2196 2197 if (pl->phydev) 2198 phy_ethtool_ksettings_get(pl->phydev, kset); 2199 else 2200 kset->base.port = pl->link_port; 2201 2202 linkmode_copy(kset->link_modes.supported, pl->supported); 2203 2204 switch (pl->cur_link_an_mode) { 2205 case MLO_AN_FIXED: 2206 /* We are using fixed settings. Report these as the 2207 * current link settings - and note that these also 2208 * represent the supported speeds/duplex/pause modes. 2209 */ 2210 phylink_get_fixed_state(pl, &link_state); 2211 phylink_get_ksettings(&link_state, kset); 2212 break; 2213 2214 case MLO_AN_INBAND: 2215 /* If there is a phy attached, then use the reported 2216 * settings from the phy with no modification. 2217 */ 2218 if (pl->phydev) 2219 break; 2220 2221 phylink_mac_pcs_get_state(pl, &link_state); 2222 2223 /* The MAC is reporting the link results from its own PCS 2224 * layer via in-band status. Report these as the current 2225 * link settings. 2226 */ 2227 phylink_get_ksettings(&link_state, kset); 2228 break; 2229 } 2230 2231 return 0; 2232 } 2233 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2234 2235 /** 2236 * phylink_ethtool_ksettings_set() - set the link settings 2237 * @pl: a pointer to a &struct phylink returned from phylink_create() 2238 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2239 */ 2240 int phylink_ethtool_ksettings_set(struct phylink *pl, 2241 const struct ethtool_link_ksettings *kset) 2242 { 2243 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2244 struct phylink_link_state config; 2245 const struct phy_setting *s; 2246 2247 ASSERT_RTNL(); 2248 2249 /* Mask out unsupported advertisements */ 2250 linkmode_and(config.advertising, kset->link_modes.advertising, 2251 pl->supported); 2252 2253 if (pl->phydev) { 2254 /* We can rely on phylib for this update; we also do not need 2255 * to update the pl->link_config settings: 2256 * - the configuration returned via ksettings_get() will come 2257 * from phylib whenever a PHY is present. 2258 * - link_config.interface will be updated by the PHY calling 2259 * back via phylink_phy_change() and a subsequent resolve. 2260 * - initial link configuration for PHY mode comes from the 2261 * last phy state updated via phylink_phy_change(). 2262 * - other configuration changes (e.g. pause modes) are 2263 * performed directly via phylib. 2264 * - if in in-band mode with a PHY, the link configuration 2265 * is passed on the link from the PHY, and all of 2266 * link_config.{speed,duplex,an_enabled,pause} are not used. 2267 * - the only possible use would be link_config.advertising 2268 * pause modes when in 1000base-X mode with a PHY, but in 2269 * the presence of a PHY, this should not be changed as that 2270 * should be determined from the media side advertisement. 2271 */ 2272 return phy_ethtool_ksettings_set(pl->phydev, kset); 2273 } 2274 2275 config = pl->link_config; 2276 2277 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 2278 switch (kset->base.autoneg) { 2279 case AUTONEG_DISABLE: 2280 /* Autonegotiation disabled, select a suitable speed and 2281 * duplex. 2282 */ 2283 s = phy_lookup_setting(kset->base.speed, kset->base.duplex, 2284 pl->supported, false); 2285 if (!s) 2286 return -EINVAL; 2287 2288 /* If we have a fixed link, refuse to change link parameters. 2289 * If the link parameters match, accept them but do nothing. 2290 */ 2291 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2292 if (s->speed != pl->link_config.speed || 2293 s->duplex != pl->link_config.duplex) 2294 return -EINVAL; 2295 return 0; 2296 } 2297 2298 config.speed = s->speed; 2299 config.duplex = s->duplex; 2300 break; 2301 2302 case AUTONEG_ENABLE: 2303 /* If we have a fixed link, allow autonegotiation (since that 2304 * is our default case) but do not allow the advertisement to 2305 * be changed. If the advertisement matches, simply return. 2306 */ 2307 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2308 if (!linkmode_equal(config.advertising, 2309 pl->link_config.advertising)) 2310 return -EINVAL; 2311 return 0; 2312 } 2313 2314 config.speed = SPEED_UNKNOWN; 2315 config.duplex = DUPLEX_UNKNOWN; 2316 break; 2317 2318 default: 2319 return -EINVAL; 2320 } 2321 2322 /* We have ruled out the case with a PHY attached, and the 2323 * fixed-link cases. All that is left are in-band links. 2324 */ 2325 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2326 kset->base.autoneg == AUTONEG_ENABLE); 2327 2328 /* If this link is with an SFP, ensure that changes to advertised modes 2329 * also cause the associated interface to be selected such that the 2330 * link can be configured correctly. 2331 */ 2332 if (pl->sfp_bus) { 2333 config.interface = sfp_select_interface(pl->sfp_bus, 2334 config.advertising); 2335 if (config.interface == PHY_INTERFACE_MODE_NA) { 2336 phylink_err(pl, 2337 "selection of interface failed, advertisement %*pb\n", 2338 __ETHTOOL_LINK_MODE_MASK_NBITS, 2339 config.advertising); 2340 return -EINVAL; 2341 } 2342 2343 /* Revalidate with the selected interface */ 2344 linkmode_copy(support, pl->supported); 2345 if (phylink_validate(pl, support, &config)) { 2346 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2347 phylink_an_mode_str(pl->cur_link_an_mode), 2348 phy_modes(config.interface), 2349 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2350 return -EINVAL; 2351 } 2352 } else { 2353 /* Validate without changing the current supported mask. */ 2354 linkmode_copy(support, pl->supported); 2355 if (phylink_validate(pl, support, &config)) 2356 return -EINVAL; 2357 } 2358 2359 /* If autonegotiation is enabled, we must have an advertisement */ 2360 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2361 config.advertising) && 2362 phylink_is_empty_linkmode(config.advertising)) 2363 return -EINVAL; 2364 2365 mutex_lock(&pl->state_mutex); 2366 pl->link_config.speed = config.speed; 2367 pl->link_config.duplex = config.duplex; 2368 2369 if (pl->link_config.interface != config.interface) { 2370 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2371 /* We need to force the link down, then change the interface */ 2372 if (pl->old_link_state) { 2373 phylink_link_down(pl); 2374 pl->old_link_state = false; 2375 } 2376 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2377 &pl->phylink_disable_state)) 2378 phylink_major_config(pl, false, &config); 2379 pl->link_config.interface = config.interface; 2380 linkmode_copy(pl->link_config.advertising, config.advertising); 2381 } else if (!linkmode_equal(pl->link_config.advertising, 2382 config.advertising)) { 2383 linkmode_copy(pl->link_config.advertising, config.advertising); 2384 phylink_change_inband_advert(pl); 2385 } 2386 mutex_unlock(&pl->state_mutex); 2387 2388 return 0; 2389 } 2390 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 2391 2392 /** 2393 * phylink_ethtool_nway_reset() - restart negotiation 2394 * @pl: a pointer to a &struct phylink returned from phylink_create() 2395 * 2396 * Restart negotiation for the phylink instance specified by @pl. This will 2397 * cause any attached phy to restart negotiation with the link partner, and 2398 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 2399 * negotiation. 2400 * 2401 * Returns zero on success, or negative error code. 2402 */ 2403 int phylink_ethtool_nway_reset(struct phylink *pl) 2404 { 2405 int ret = 0; 2406 2407 ASSERT_RTNL(); 2408 2409 if (pl->phydev) 2410 ret = phy_restart_aneg(pl->phydev); 2411 phylink_mac_pcs_an_restart(pl); 2412 2413 return ret; 2414 } 2415 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 2416 2417 /** 2418 * phylink_ethtool_get_pauseparam() - get the current pause parameters 2419 * @pl: a pointer to a &struct phylink returned from phylink_create() 2420 * @pause: a pointer to a &struct ethtool_pauseparam 2421 */ 2422 void phylink_ethtool_get_pauseparam(struct phylink *pl, 2423 struct ethtool_pauseparam *pause) 2424 { 2425 ASSERT_RTNL(); 2426 2427 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 2428 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 2429 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 2430 } 2431 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 2432 2433 /** 2434 * phylink_ethtool_set_pauseparam() - set the current pause parameters 2435 * @pl: a pointer to a &struct phylink returned from phylink_create() 2436 * @pause: a pointer to a &struct ethtool_pauseparam 2437 */ 2438 int phylink_ethtool_set_pauseparam(struct phylink *pl, 2439 struct ethtool_pauseparam *pause) 2440 { 2441 struct phylink_link_state *config = &pl->link_config; 2442 bool manual_changed; 2443 int pause_state; 2444 2445 ASSERT_RTNL(); 2446 2447 if (pl->cur_link_an_mode == MLO_AN_FIXED) 2448 return -EOPNOTSUPP; 2449 2450 if (!phylink_test(pl->supported, Pause) && 2451 !phylink_test(pl->supported, Asym_Pause)) 2452 return -EOPNOTSUPP; 2453 2454 if (!phylink_test(pl->supported, Asym_Pause) && 2455 pause->rx_pause != pause->tx_pause) 2456 return -EINVAL; 2457 2458 pause_state = 0; 2459 if (pause->autoneg) 2460 pause_state |= MLO_PAUSE_AN; 2461 if (pause->rx_pause) 2462 pause_state |= MLO_PAUSE_RX; 2463 if (pause->tx_pause) 2464 pause_state |= MLO_PAUSE_TX; 2465 2466 mutex_lock(&pl->state_mutex); 2467 /* 2468 * See the comments for linkmode_set_pause(), wrt the deficiencies 2469 * with the current implementation. A solution to this issue would 2470 * be: 2471 * ethtool Local device 2472 * rx tx Pause AsymDir 2473 * 0 0 0 0 2474 * 1 0 1 1 2475 * 0 1 0 1 2476 * 1 1 1 1 2477 * and then use the ethtool rx/tx enablement status to mask the 2478 * rx/tx pause resolution. 2479 */ 2480 linkmode_set_pause(config->advertising, pause->tx_pause, 2481 pause->rx_pause); 2482 2483 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 2484 (!(pause_state & MLO_PAUSE_AN) && 2485 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 2486 2487 config->pause = pause_state; 2488 2489 /* Update our in-band advertisement, triggering a renegotiation if 2490 * the advertisement changed. 2491 */ 2492 if (!pl->phydev) 2493 phylink_change_inband_advert(pl); 2494 2495 mutex_unlock(&pl->state_mutex); 2496 2497 /* If we have a PHY, a change of the pause frame advertisement will 2498 * cause phylib to renegotiate (if AN is enabled) which will in turn 2499 * call our phylink_phy_change() and trigger a resolve. Note that 2500 * we can't hold our state mutex while calling phy_set_asym_pause(). 2501 */ 2502 if (pl->phydev) 2503 phy_set_asym_pause(pl->phydev, pause->rx_pause, 2504 pause->tx_pause); 2505 2506 /* If the manual pause settings changed, make sure we trigger a 2507 * resolve to update their state; we can not guarantee that the 2508 * link will cycle. 2509 */ 2510 if (manual_changed) { 2511 pl->mac_link_dropped = true; 2512 phylink_run_resolve(pl); 2513 } 2514 2515 return 0; 2516 } 2517 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 2518 2519 /** 2520 * phylink_get_eee_err() - read the energy efficient ethernet error 2521 * counter 2522 * @pl: a pointer to a &struct phylink returned from phylink_create(). 2523 * 2524 * Read the Energy Efficient Ethernet error counter from the PHY associated 2525 * with the phylink instance specified by @pl. 2526 * 2527 * Returns positive error counter value, or negative error code. 2528 */ 2529 int phylink_get_eee_err(struct phylink *pl) 2530 { 2531 int ret = 0; 2532 2533 ASSERT_RTNL(); 2534 2535 if (pl->phydev) 2536 ret = phy_get_eee_err(pl->phydev); 2537 2538 return ret; 2539 } 2540 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 2541 2542 /** 2543 * phylink_init_eee() - init and check the EEE features 2544 * @pl: a pointer to a &struct phylink returned from phylink_create() 2545 * @clk_stop_enable: allow PHY to stop receive clock 2546 * 2547 * Must be called either with RTNL held or within mac_link_up() 2548 */ 2549 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) 2550 { 2551 int ret = -EOPNOTSUPP; 2552 2553 if (pl->phydev) 2554 ret = phy_init_eee(pl->phydev, clk_stop_enable); 2555 2556 return ret; 2557 } 2558 EXPORT_SYMBOL_GPL(phylink_init_eee); 2559 2560 /** 2561 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 2562 * @pl: a pointer to a &struct phylink returned from phylink_create() 2563 * @eee: a pointer to a &struct ethtool_eee for the read parameters 2564 */ 2565 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee) 2566 { 2567 int ret = -EOPNOTSUPP; 2568 2569 ASSERT_RTNL(); 2570 2571 if (pl->phydev) 2572 ret = phy_ethtool_get_eee(pl->phydev, eee); 2573 2574 return ret; 2575 } 2576 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 2577 2578 /** 2579 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 2580 * @pl: a pointer to a &struct phylink returned from phylink_create() 2581 * @eee: a pointer to a &struct ethtool_eee for the desired parameters 2582 */ 2583 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee) 2584 { 2585 int ret = -EOPNOTSUPP; 2586 2587 ASSERT_RTNL(); 2588 2589 if (pl->phydev) 2590 ret = phy_ethtool_set_eee(pl->phydev, eee); 2591 2592 return ret; 2593 } 2594 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 2595 2596 /* This emulates MII registers for a fixed-mode phy operating as per the 2597 * passed in state. "aneg" defines if we report negotiation is possible. 2598 * 2599 * FIXME: should deal with negotiation state too. 2600 */ 2601 static int phylink_mii_emul_read(unsigned int reg, 2602 struct phylink_link_state *state) 2603 { 2604 struct fixed_phy_status fs; 2605 unsigned long *lpa = state->lp_advertising; 2606 int val; 2607 2608 fs.link = state->link; 2609 fs.speed = state->speed; 2610 fs.duplex = state->duplex; 2611 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 2612 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 2613 2614 val = swphy_read_reg(reg, &fs); 2615 if (reg == MII_BMSR) { 2616 if (!state->an_complete) 2617 val &= ~BMSR_ANEGCOMPLETE; 2618 } 2619 return val; 2620 } 2621 2622 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 2623 unsigned int reg) 2624 { 2625 struct phy_device *phydev = pl->phydev; 2626 int prtad, devad; 2627 2628 if (mdio_phy_id_is_c45(phy_id)) { 2629 prtad = mdio_phy_id_prtad(phy_id); 2630 devad = mdio_phy_id_devad(phy_id); 2631 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2632 reg); 2633 } 2634 2635 if (phydev->is_c45) { 2636 switch (reg) { 2637 case MII_BMCR: 2638 case MII_BMSR: 2639 case MII_PHYSID1: 2640 case MII_PHYSID2: 2641 devad = __ffs(phydev->c45_ids.mmds_present); 2642 break; 2643 case MII_ADVERTISE: 2644 case MII_LPA: 2645 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2646 return -EINVAL; 2647 devad = MDIO_MMD_AN; 2648 if (reg == MII_ADVERTISE) 2649 reg = MDIO_AN_ADVERTISE; 2650 else 2651 reg = MDIO_AN_LPA; 2652 break; 2653 default: 2654 return -EINVAL; 2655 } 2656 prtad = phy_id; 2657 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2658 reg); 2659 } 2660 2661 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 2662 } 2663 2664 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 2665 unsigned int reg, unsigned int val) 2666 { 2667 struct phy_device *phydev = pl->phydev; 2668 int prtad, devad; 2669 2670 if (mdio_phy_id_is_c45(phy_id)) { 2671 prtad = mdio_phy_id_prtad(phy_id); 2672 devad = mdio_phy_id_devad(phy_id); 2673 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 2674 reg, val); 2675 } 2676 2677 if (phydev->is_c45) { 2678 switch (reg) { 2679 case MII_BMCR: 2680 case MII_BMSR: 2681 case MII_PHYSID1: 2682 case MII_PHYSID2: 2683 devad = __ffs(phydev->c45_ids.mmds_present); 2684 break; 2685 case MII_ADVERTISE: 2686 case MII_LPA: 2687 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2688 return -EINVAL; 2689 devad = MDIO_MMD_AN; 2690 if (reg == MII_ADVERTISE) 2691 reg = MDIO_AN_ADVERTISE; 2692 else 2693 reg = MDIO_AN_LPA; 2694 break; 2695 default: 2696 return -EINVAL; 2697 } 2698 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 2699 reg, val); 2700 } 2701 2702 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 2703 } 2704 2705 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 2706 unsigned int reg) 2707 { 2708 struct phylink_link_state state; 2709 int val = 0xffff; 2710 2711 switch (pl->cur_link_an_mode) { 2712 case MLO_AN_FIXED: 2713 if (phy_id == 0) { 2714 phylink_get_fixed_state(pl, &state); 2715 val = phylink_mii_emul_read(reg, &state); 2716 } 2717 break; 2718 2719 case MLO_AN_PHY: 2720 return -EOPNOTSUPP; 2721 2722 case MLO_AN_INBAND: 2723 if (phy_id == 0) { 2724 phylink_mac_pcs_get_state(pl, &state); 2725 val = phylink_mii_emul_read(reg, &state); 2726 } 2727 break; 2728 } 2729 2730 return val & 0xffff; 2731 } 2732 2733 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 2734 unsigned int reg, unsigned int val) 2735 { 2736 switch (pl->cur_link_an_mode) { 2737 case MLO_AN_FIXED: 2738 break; 2739 2740 case MLO_AN_PHY: 2741 return -EOPNOTSUPP; 2742 2743 case MLO_AN_INBAND: 2744 break; 2745 } 2746 2747 return 0; 2748 } 2749 2750 /** 2751 * phylink_mii_ioctl() - generic mii ioctl interface 2752 * @pl: a pointer to a &struct phylink returned from phylink_create() 2753 * @ifr: a pointer to a &struct ifreq for socket ioctls 2754 * @cmd: ioctl cmd to execute 2755 * 2756 * Perform the specified MII ioctl on the PHY attached to the phylink instance 2757 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 2758 * 2759 * Returns: zero on success or negative error code. 2760 * 2761 * %SIOCGMIIPHY: 2762 * read register from the current PHY. 2763 * %SIOCGMIIREG: 2764 * read register from the specified PHY. 2765 * %SIOCSMIIREG: 2766 * set a register on the specified PHY. 2767 */ 2768 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 2769 { 2770 struct mii_ioctl_data *mii = if_mii(ifr); 2771 int ret; 2772 2773 ASSERT_RTNL(); 2774 2775 if (pl->phydev) { 2776 /* PHYs only exist for MLO_AN_PHY and SGMII */ 2777 switch (cmd) { 2778 case SIOCGMIIPHY: 2779 mii->phy_id = pl->phydev->mdio.addr; 2780 fallthrough; 2781 2782 case SIOCGMIIREG: 2783 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 2784 if (ret >= 0) { 2785 mii->val_out = ret; 2786 ret = 0; 2787 } 2788 break; 2789 2790 case SIOCSMIIREG: 2791 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 2792 mii->val_in); 2793 break; 2794 2795 default: 2796 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 2797 break; 2798 } 2799 } else { 2800 switch (cmd) { 2801 case SIOCGMIIPHY: 2802 mii->phy_id = 0; 2803 fallthrough; 2804 2805 case SIOCGMIIREG: 2806 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 2807 if (ret >= 0) { 2808 mii->val_out = ret; 2809 ret = 0; 2810 } 2811 break; 2812 2813 case SIOCSMIIREG: 2814 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 2815 mii->val_in); 2816 break; 2817 2818 default: 2819 ret = -EOPNOTSUPP; 2820 break; 2821 } 2822 } 2823 2824 return ret; 2825 } 2826 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 2827 2828 /** 2829 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 2830 * link partners 2831 * @pl: a pointer to a &struct phylink returned from phylink_create() 2832 * @sync: perform action synchronously 2833 * 2834 * If we have a PHY that is not part of a SFP module, then set the speed 2835 * as described in the phy_speed_down() function. Please see this function 2836 * for a description of the @sync parameter. 2837 * 2838 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 2839 */ 2840 int phylink_speed_down(struct phylink *pl, bool sync) 2841 { 2842 int ret = 0; 2843 2844 ASSERT_RTNL(); 2845 2846 if (!pl->sfp_bus && pl->phydev) 2847 ret = phy_speed_down(pl->phydev, sync); 2848 2849 return ret; 2850 } 2851 EXPORT_SYMBOL_GPL(phylink_speed_down); 2852 2853 /** 2854 * phylink_speed_up() - restore the advertised speeds prior to the call to 2855 * phylink_speed_down() 2856 * @pl: a pointer to a &struct phylink returned from phylink_create() 2857 * 2858 * If we have a PHY that is not part of a SFP module, then restore the 2859 * PHY speeds as per phy_speed_up(). 2860 * 2861 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 2862 */ 2863 int phylink_speed_up(struct phylink *pl) 2864 { 2865 int ret = 0; 2866 2867 ASSERT_RTNL(); 2868 2869 if (!pl->sfp_bus && pl->phydev) 2870 ret = phy_speed_up(pl->phydev); 2871 2872 return ret; 2873 } 2874 EXPORT_SYMBOL_GPL(phylink_speed_up); 2875 2876 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 2877 { 2878 struct phylink *pl = upstream; 2879 2880 pl->netdev->sfp_bus = bus; 2881 } 2882 2883 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 2884 { 2885 struct phylink *pl = upstream; 2886 2887 pl->netdev->sfp_bus = NULL; 2888 } 2889 2890 static const phy_interface_t phylink_sfp_interface_preference[] = { 2891 PHY_INTERFACE_MODE_25GBASER, 2892 PHY_INTERFACE_MODE_USXGMII, 2893 PHY_INTERFACE_MODE_10GBASER, 2894 PHY_INTERFACE_MODE_5GBASER, 2895 PHY_INTERFACE_MODE_2500BASEX, 2896 PHY_INTERFACE_MODE_SGMII, 2897 PHY_INTERFACE_MODE_1000BASEX, 2898 PHY_INTERFACE_MODE_100BASEX, 2899 }; 2900 2901 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 2902 2903 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 2904 const unsigned long *intf) 2905 { 2906 phy_interface_t interface; 2907 size_t i; 2908 2909 interface = PHY_INTERFACE_MODE_NA; 2910 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 2911 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 2912 interface = phylink_sfp_interface_preference[i]; 2913 break; 2914 } 2915 2916 return interface; 2917 } 2918 2919 static void phylink_sfp_set_config(struct phylink *pl, u8 mode, 2920 unsigned long *supported, 2921 struct phylink_link_state *state) 2922 { 2923 bool changed = false; 2924 2925 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 2926 phylink_an_mode_str(mode), phy_modes(state->interface), 2927 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 2928 2929 if (!linkmode_equal(pl->supported, supported)) { 2930 linkmode_copy(pl->supported, supported); 2931 changed = true; 2932 } 2933 2934 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 2935 linkmode_copy(pl->link_config.advertising, state->advertising); 2936 changed = true; 2937 } 2938 2939 if (pl->cur_link_an_mode != mode || 2940 pl->link_config.interface != state->interface) { 2941 pl->cur_link_an_mode = mode; 2942 pl->link_config.interface = state->interface; 2943 2944 changed = true; 2945 2946 phylink_info(pl, "switched to %s/%s link mode\n", 2947 phylink_an_mode_str(mode), 2948 phy_modes(state->interface)); 2949 } 2950 2951 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 2952 &pl->phylink_disable_state)) 2953 phylink_mac_initial_config(pl, false); 2954 } 2955 2956 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode, 2957 struct phy_device *phy) 2958 { 2959 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1); 2960 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2961 struct phylink_link_state config; 2962 phy_interface_t iface; 2963 int ret; 2964 2965 linkmode_copy(support, phy->supported); 2966 2967 memset(&config, 0, sizeof(config)); 2968 linkmode_copy(config.advertising, phy->advertising); 2969 config.interface = PHY_INTERFACE_MODE_NA; 2970 config.speed = SPEED_UNKNOWN; 2971 config.duplex = DUPLEX_UNKNOWN; 2972 config.pause = MLO_PAUSE_AN; 2973 2974 /* Ignore errors if we're expecting a PHY to attach later */ 2975 ret = phylink_validate(pl, support, &config); 2976 if (ret) { 2977 phylink_err(pl, "validation with support %*pb failed: %pe\n", 2978 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 2979 ERR_PTR(ret)); 2980 return ret; 2981 } 2982 2983 iface = sfp_select_interface(pl->sfp_bus, config.advertising); 2984 if (iface == PHY_INTERFACE_MODE_NA) { 2985 phylink_err(pl, 2986 "selection of interface failed, advertisement %*pb\n", 2987 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising); 2988 return -EINVAL; 2989 } 2990 2991 config.interface = iface; 2992 linkmode_copy(support1, support); 2993 ret = phylink_validate(pl, support1, &config); 2994 if (ret) { 2995 phylink_err(pl, 2996 "validation of %s/%s with support %*pb failed: %pe\n", 2997 phylink_an_mode_str(mode), 2998 phy_modes(config.interface), 2999 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3000 ERR_PTR(ret)); 3001 return ret; 3002 } 3003 3004 pl->link_port = pl->sfp_port; 3005 3006 phylink_sfp_set_config(pl, mode, support, &config); 3007 3008 return 0; 3009 } 3010 3011 static int phylink_sfp_config_optical(struct phylink *pl) 3012 { 3013 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3014 DECLARE_PHY_INTERFACE_MASK(interfaces); 3015 struct phylink_link_state config; 3016 phy_interface_t interface; 3017 int ret; 3018 3019 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3020 (int)PHY_INTERFACE_MODE_MAX, 3021 pl->config->supported_interfaces, 3022 (int)PHY_INTERFACE_MODE_MAX, 3023 pl->sfp_interfaces); 3024 3025 /* Find the union of the supported interfaces by the PCS/MAC and 3026 * the SFP module. 3027 */ 3028 phy_interface_and(interfaces, pl->config->supported_interfaces, 3029 pl->sfp_interfaces); 3030 if (phy_interface_empty(interfaces)) { 3031 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3032 return -EINVAL; 3033 } 3034 3035 memset(&config, 0, sizeof(config)); 3036 linkmode_copy(support, pl->sfp_support); 3037 linkmode_copy(config.advertising, pl->sfp_support); 3038 config.speed = SPEED_UNKNOWN; 3039 config.duplex = DUPLEX_UNKNOWN; 3040 config.pause = MLO_PAUSE_AN; 3041 3042 /* For all the interfaces that are supported, reduce the sfp_support 3043 * mask to only those link modes that can be supported. 3044 */ 3045 ret = phylink_validate_mask(pl, pl->sfp_support, &config, interfaces); 3046 if (ret) { 3047 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3048 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3049 return ret; 3050 } 3051 3052 interface = phylink_choose_sfp_interface(pl, interfaces); 3053 if (interface == PHY_INTERFACE_MODE_NA) { 3054 phylink_err(pl, "failed to select SFP interface\n"); 3055 return -EINVAL; 3056 } 3057 3058 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3059 phy_modes(interface)); 3060 3061 config.interface = interface; 3062 3063 /* Ignore errors if we're expecting a PHY to attach later */ 3064 ret = phylink_validate(pl, support, &config); 3065 if (ret) { 3066 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3067 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3068 ERR_PTR(ret)); 3069 return ret; 3070 } 3071 3072 pl->link_port = pl->sfp_port; 3073 3074 phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config); 3075 3076 return 0; 3077 } 3078 3079 static int phylink_sfp_module_insert(void *upstream, 3080 const struct sfp_eeprom_id *id) 3081 { 3082 struct phylink *pl = upstream; 3083 3084 ASSERT_RTNL(); 3085 3086 linkmode_zero(pl->sfp_support); 3087 phy_interface_zero(pl->sfp_interfaces); 3088 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces); 3089 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support); 3090 3091 /* If this module may have a PHY connecting later, defer until later */ 3092 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 3093 if (pl->sfp_may_have_phy) 3094 return 0; 3095 3096 return phylink_sfp_config_optical(pl); 3097 } 3098 3099 static int phylink_sfp_module_start(void *upstream) 3100 { 3101 struct phylink *pl = upstream; 3102 3103 /* If this SFP module has a PHY, start the PHY now. */ 3104 if (pl->phydev) { 3105 phy_start(pl->phydev); 3106 return 0; 3107 } 3108 3109 /* If the module may have a PHY but we didn't detect one we 3110 * need to configure the MAC here. 3111 */ 3112 if (!pl->sfp_may_have_phy) 3113 return 0; 3114 3115 return phylink_sfp_config_optical(pl); 3116 } 3117 3118 static void phylink_sfp_module_stop(void *upstream) 3119 { 3120 struct phylink *pl = upstream; 3121 3122 /* If this SFP module has a PHY, stop it. */ 3123 if (pl->phydev) 3124 phy_stop(pl->phydev); 3125 } 3126 3127 static void phylink_sfp_link_down(void *upstream) 3128 { 3129 struct phylink *pl = upstream; 3130 3131 ASSERT_RTNL(); 3132 3133 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3134 } 3135 3136 static void phylink_sfp_link_up(void *upstream) 3137 { 3138 struct phylink *pl = upstream; 3139 3140 ASSERT_RTNL(); 3141 3142 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3143 } 3144 3145 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII 3146 * or 802.3z control word, so inband will not work. 3147 */ 3148 static bool phylink_phy_no_inband(struct phy_device *phy) 3149 { 3150 return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1], 3151 0xae025150, 0xfffffff0); 3152 } 3153 3154 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3155 { 3156 struct phylink *pl = upstream; 3157 phy_interface_t interface; 3158 u8 mode; 3159 int ret; 3160 3161 /* 3162 * This is the new way of dealing with flow control for PHYs, 3163 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3164 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3165 * using our validate call to the MAC, we rely upon the MAC 3166 * clearing the bits from both supported and advertising fields. 3167 */ 3168 phy_support_asym_pause(phy); 3169 3170 if (phylink_phy_no_inband(phy)) 3171 mode = MLO_AN_PHY; 3172 else 3173 mode = MLO_AN_INBAND; 3174 3175 /* Set the PHY's host supported interfaces */ 3176 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3177 pl->config->supported_interfaces); 3178 3179 /* Do the initial configuration */ 3180 ret = phylink_sfp_config_phy(pl, mode, phy); 3181 if (ret < 0) 3182 return ret; 3183 3184 interface = pl->link_config.interface; 3185 ret = phylink_attach_phy(pl, phy, interface); 3186 if (ret < 0) 3187 return ret; 3188 3189 ret = phylink_bringup_phy(pl, phy, interface); 3190 if (ret) 3191 phy_detach(phy); 3192 3193 return ret; 3194 } 3195 3196 static void phylink_sfp_disconnect_phy(void *upstream) 3197 { 3198 phylink_disconnect_phy(upstream); 3199 } 3200 3201 static const struct sfp_upstream_ops sfp_phylink_ops = { 3202 .attach = phylink_sfp_attach, 3203 .detach = phylink_sfp_detach, 3204 .module_insert = phylink_sfp_module_insert, 3205 .module_start = phylink_sfp_module_start, 3206 .module_stop = phylink_sfp_module_stop, 3207 .link_up = phylink_sfp_link_up, 3208 .link_down = phylink_sfp_link_down, 3209 .connect_phy = phylink_sfp_connect_phy, 3210 .disconnect_phy = phylink_sfp_disconnect_phy, 3211 }; 3212 3213 /* Helpers for MAC drivers */ 3214 3215 static void phylink_decode_c37_word(struct phylink_link_state *state, 3216 uint16_t config_reg, int speed) 3217 { 3218 bool tx_pause, rx_pause; 3219 int fd_bit; 3220 3221 if (speed == SPEED_2500) 3222 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 3223 else 3224 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 3225 3226 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 3227 3228 if (linkmode_test_bit(fd_bit, state->advertising) && 3229 linkmode_test_bit(fd_bit, state->lp_advertising)) { 3230 state->speed = speed; 3231 state->duplex = DUPLEX_FULL; 3232 } else { 3233 /* negotiation failure */ 3234 state->link = false; 3235 } 3236 3237 linkmode_resolve_pause(state->advertising, state->lp_advertising, 3238 &tx_pause, &rx_pause); 3239 3240 if (tx_pause) 3241 state->pause |= MLO_PAUSE_TX; 3242 if (rx_pause) 3243 state->pause |= MLO_PAUSE_RX; 3244 } 3245 3246 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 3247 uint16_t config_reg) 3248 { 3249 if (!(config_reg & LPA_SGMII_LINK)) { 3250 state->link = false; 3251 return; 3252 } 3253 3254 switch (config_reg & LPA_SGMII_SPD_MASK) { 3255 case LPA_SGMII_10: 3256 state->speed = SPEED_10; 3257 break; 3258 case LPA_SGMII_100: 3259 state->speed = SPEED_100; 3260 break; 3261 case LPA_SGMII_1000: 3262 state->speed = SPEED_1000; 3263 break; 3264 default: 3265 state->link = false; 3266 return; 3267 } 3268 if (config_reg & LPA_SGMII_FULL_DUPLEX) 3269 state->duplex = DUPLEX_FULL; 3270 else 3271 state->duplex = DUPLEX_HALF; 3272 } 3273 3274 /** 3275 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3276 * @state: a pointer to a struct phylink_link_state. 3277 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3278 * 3279 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3280 * code word. Decode the USXGMII code word and populate the corresponding fields 3281 * (speed, duplex) into the phylink_link_state structure. 3282 */ 3283 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 3284 uint16_t lpa) 3285 { 3286 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3287 case MDIO_USXGMII_10: 3288 state->speed = SPEED_10; 3289 break; 3290 case MDIO_USXGMII_100: 3291 state->speed = SPEED_100; 3292 break; 3293 case MDIO_USXGMII_1000: 3294 state->speed = SPEED_1000; 3295 break; 3296 case MDIO_USXGMII_2500: 3297 state->speed = SPEED_2500; 3298 break; 3299 case MDIO_USXGMII_5000: 3300 state->speed = SPEED_5000; 3301 break; 3302 case MDIO_USXGMII_10G: 3303 state->speed = SPEED_10000; 3304 break; 3305 default: 3306 state->link = false; 3307 return; 3308 } 3309 3310 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3311 state->duplex = DUPLEX_FULL; 3312 else 3313 state->duplex = DUPLEX_HALF; 3314 } 3315 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 3316 3317 /** 3318 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 3319 * @state: a pointer to a &struct phylink_link_state. 3320 * @bmsr: The value of the %MII_BMSR register 3321 * @lpa: The value of the %MII_LPA register 3322 * 3323 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3324 * clause 37 negotiation and/or SGMII control. 3325 * 3326 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 3327 * the phylink @state structure. This is suitable to be used for implementing 3328 * the mac_pcs_get_state() member of the struct phylink_mac_ops structure if 3329 * accessing @bmsr and @lpa cannot be done with MDIO directly. 3330 */ 3331 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 3332 u16 bmsr, u16 lpa) 3333 { 3334 state->link = !!(bmsr & BMSR_LSTATUS); 3335 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 3336 /* If there is no link or autonegotiation is disabled, the LP advertisement 3337 * data is not meaningful, so don't go any further. 3338 */ 3339 if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3340 state->advertising)) 3341 return; 3342 3343 switch (state->interface) { 3344 case PHY_INTERFACE_MODE_1000BASEX: 3345 phylink_decode_c37_word(state, lpa, SPEED_1000); 3346 break; 3347 3348 case PHY_INTERFACE_MODE_2500BASEX: 3349 phylink_decode_c37_word(state, lpa, SPEED_2500); 3350 break; 3351 3352 case PHY_INTERFACE_MODE_SGMII: 3353 case PHY_INTERFACE_MODE_QSGMII: 3354 case PHY_INTERFACE_MODE_QUSGMII: 3355 phylink_decode_sgmii_word(state, lpa); 3356 break; 3357 3358 default: 3359 state->link = false; 3360 break; 3361 } 3362 } 3363 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 3364 3365 /** 3366 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 3367 * @pcs: a pointer to a &struct mdio_device. 3368 * @state: a pointer to a &struct phylink_link_state. 3369 * 3370 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3371 * clause 37 negotiation and/or SGMII control. 3372 * 3373 * Read the MAC PCS state from the MII device configured in @config and 3374 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 3375 * the phylink @state structure. This is suitable to be directly plugged 3376 * into the mac_pcs_get_state() member of the struct phylink_mac_ops 3377 * structure. 3378 */ 3379 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 3380 struct phylink_link_state *state) 3381 { 3382 int bmsr, lpa; 3383 3384 bmsr = mdiodev_read(pcs, MII_BMSR); 3385 lpa = mdiodev_read(pcs, MII_LPA); 3386 if (bmsr < 0 || lpa < 0) { 3387 state->link = false; 3388 return; 3389 } 3390 3391 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa); 3392 } 3393 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 3394 3395 /** 3396 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 3397 * advertisement 3398 * @interface: the PHY interface mode being configured 3399 * @advertising: the ethtool advertisement mask 3400 * 3401 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3402 * clause 37 negotiation and/or SGMII control. 3403 * 3404 * Encode the clause 37 PCS advertisement as specified by @interface and 3405 * @advertising. 3406 * 3407 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 3408 */ 3409 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 3410 const unsigned long *advertising) 3411 { 3412 u16 adv; 3413 3414 switch (interface) { 3415 case PHY_INTERFACE_MODE_1000BASEX: 3416 case PHY_INTERFACE_MODE_2500BASEX: 3417 adv = ADVERTISE_1000XFULL; 3418 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 3419 advertising)) 3420 adv |= ADVERTISE_1000XPAUSE; 3421 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 3422 advertising)) 3423 adv |= ADVERTISE_1000XPSE_ASYM; 3424 return adv; 3425 case PHY_INTERFACE_MODE_SGMII: 3426 case PHY_INTERFACE_MODE_QSGMII: 3427 return 0x0001; 3428 default: 3429 /* Nothing to do for other modes */ 3430 return -EINVAL; 3431 } 3432 } 3433 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 3434 3435 /** 3436 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 3437 * @pcs: a pointer to a &struct mdio_device. 3438 * @mode: link autonegotiation mode 3439 * @interface: the PHY interface mode being configured 3440 * @advertising: the ethtool advertisement mask 3441 * 3442 * Configure a Clause 22 PCS PHY with the appropriate negotiation 3443 * parameters for the @mode, @interface and @advertising parameters. 3444 * Returns negative error number on failure, zero if the advertisement 3445 * has not changed, or positive if there is a change. 3446 */ 3447 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, unsigned int mode, 3448 phy_interface_t interface, 3449 const unsigned long *advertising) 3450 { 3451 bool changed = 0; 3452 u16 bmcr; 3453 int ret, adv; 3454 3455 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 3456 if (adv >= 0) { 3457 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 3458 MII_ADVERTISE, 0xffff, adv); 3459 if (ret < 0) 3460 return ret; 3461 changed = ret; 3462 } 3463 3464 /* Ensure ISOLATE bit is disabled */ 3465 if (mode == MLO_AN_INBAND && 3466 (interface == PHY_INTERFACE_MODE_SGMII || 3467 interface == PHY_INTERFACE_MODE_QSGMII || 3468 linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, advertising))) 3469 bmcr = BMCR_ANENABLE; 3470 else 3471 bmcr = 0; 3472 3473 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 3474 if (ret < 0) 3475 return ret; 3476 3477 return changed; 3478 } 3479 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 3480 3481 /** 3482 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 3483 * @pcs: a pointer to a &struct mdio_device. 3484 * 3485 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3486 * clause 37 negotiation. 3487 * 3488 * Restart the clause 37 negotiation with the link partner. This is 3489 * suitable to be directly plugged into the mac_pcs_get_state() member 3490 * of the struct phylink_mac_ops structure. 3491 */ 3492 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 3493 { 3494 int val = mdiodev_read(pcs, MII_BMCR); 3495 3496 if (val >= 0) { 3497 val |= BMCR_ANRESTART; 3498 3499 mdiodev_write(pcs, MII_BMCR, val); 3500 } 3501 } 3502 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 3503 3504 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 3505 struct phylink_link_state *state) 3506 { 3507 struct mii_bus *bus = pcs->bus; 3508 int addr = pcs->addr; 3509 int stat; 3510 3511 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 3512 if (stat < 0) { 3513 state->link = false; 3514 return; 3515 } 3516 3517 state->link = !!(stat & MDIO_STAT1_LSTATUS); 3518 if (!state->link) 3519 return; 3520 3521 switch (state->interface) { 3522 case PHY_INTERFACE_MODE_10GBASER: 3523 state->speed = SPEED_10000; 3524 state->duplex = DUPLEX_FULL; 3525 break; 3526 3527 default: 3528 break; 3529 } 3530 } 3531 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 3532 3533 static int __init phylink_init(void) 3534 { 3535 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 3536 __set_bit(phylink_sfp_interface_preference[i], 3537 phylink_sfp_interfaces); 3538 3539 return 0; 3540 } 3541 3542 module_init(phylink_init); 3543 3544 MODULE_LICENSE("GPL v2"); 3545