1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "sfp.h" 24 #include "swphy.h" 25 26 #define SUPPORTED_INTERFACES \ 27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 29 #define ADVERTISED_INTERFACES \ 30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 32 33 enum { 34 PHYLINK_DISABLE_STOPPED, 35 PHYLINK_DISABLE_LINK, 36 PHYLINK_DISABLE_MAC_WOL, 37 }; 38 39 /** 40 * struct phylink - internal data type for phylink 41 */ 42 struct phylink { 43 /* private: */ 44 struct net_device *netdev; 45 const struct phylink_mac_ops *mac_ops; 46 struct phylink_config *config; 47 struct phylink_pcs *pcs; 48 struct device *dev; 49 unsigned int old_link_state:1; 50 51 unsigned long phylink_disable_state; /* bitmask of disables */ 52 struct phy_device *phydev; 53 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 54 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 55 u8 cur_link_an_mode; 56 u8 link_port; /* The current non-phy ethtool port */ 57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 58 59 /* The link configuration settings */ 60 struct phylink_link_state link_config; 61 62 /* The current settings */ 63 phy_interface_t cur_interface; 64 65 struct gpio_desc *link_gpio; 66 unsigned int link_irq; 67 struct timer_list link_poll; 68 void (*get_fixed_state)(struct net_device *dev, 69 struct phylink_link_state *s); 70 71 struct mutex state_mutex; 72 struct phylink_link_state phy_state; 73 struct work_struct resolve; 74 75 bool mac_link_dropped; 76 bool using_mac_select_pcs; 77 78 struct sfp_bus *sfp_bus; 79 bool sfp_may_have_phy; 80 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 81 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 82 u8 sfp_port; 83 }; 84 85 #define phylink_printk(level, pl, fmt, ...) \ 86 do { \ 87 if ((pl)->config->type == PHYLINK_NETDEV) \ 88 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 89 else if ((pl)->config->type == PHYLINK_DEV) \ 90 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 91 } while (0) 92 93 #define phylink_err(pl, fmt, ...) \ 94 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 95 #define phylink_warn(pl, fmt, ...) \ 96 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 97 #define phylink_info(pl, fmt, ...) \ 98 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 99 #if defined(CONFIG_DYNAMIC_DEBUG) 100 #define phylink_dbg(pl, fmt, ...) \ 101 do { \ 102 if ((pl)->config->type == PHYLINK_NETDEV) \ 103 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 104 else if ((pl)->config->type == PHYLINK_DEV) \ 105 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 106 } while (0) 107 #elif defined(DEBUG) 108 #define phylink_dbg(pl, fmt, ...) \ 109 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 110 #else 111 #define phylink_dbg(pl, fmt, ...) \ 112 ({ \ 113 if (0) \ 114 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 115 }) 116 #endif 117 118 /** 119 * phylink_set_port_modes() - set the port type modes in the ethtool mask 120 * @mask: ethtool link mode mask 121 * 122 * Sets all the port type modes in the ethtool mask. MAC drivers should 123 * use this in their 'validate' callback. 124 */ 125 void phylink_set_port_modes(unsigned long *mask) 126 { 127 phylink_set(mask, TP); 128 phylink_set(mask, AUI); 129 phylink_set(mask, MII); 130 phylink_set(mask, FIBRE); 131 phylink_set(mask, BNC); 132 phylink_set(mask, Backplane); 133 } 134 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 135 136 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 137 { 138 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 139 140 phylink_set_port_modes(tmp); 141 phylink_set(tmp, Autoneg); 142 phylink_set(tmp, Pause); 143 phylink_set(tmp, Asym_Pause); 144 145 return linkmode_subset(linkmode, tmp); 146 } 147 148 static const char *phylink_an_mode_str(unsigned int mode) 149 { 150 static const char *modestr[] = { 151 [MLO_AN_PHY] = "phy", 152 [MLO_AN_FIXED] = "fixed", 153 [MLO_AN_INBAND] = "inband", 154 }; 155 156 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 157 } 158 159 /** 160 * phylink_interface_max_speed() - get the maximum speed of a phy interface 161 * @interface: phy interface mode defined by &typedef phy_interface_t 162 * 163 * Determine the maximum speed of a phy interface. This is intended to help 164 * determine the correct speed to pass to the MAC when the phy is performing 165 * rate matching. 166 * 167 * Return: The maximum speed of @interface 168 */ 169 static int phylink_interface_max_speed(phy_interface_t interface) 170 { 171 switch (interface) { 172 case PHY_INTERFACE_MODE_100BASEX: 173 case PHY_INTERFACE_MODE_REVRMII: 174 case PHY_INTERFACE_MODE_RMII: 175 case PHY_INTERFACE_MODE_SMII: 176 case PHY_INTERFACE_MODE_REVMII: 177 case PHY_INTERFACE_MODE_MII: 178 return SPEED_100; 179 180 case PHY_INTERFACE_MODE_TBI: 181 case PHY_INTERFACE_MODE_MOCA: 182 case PHY_INTERFACE_MODE_RTBI: 183 case PHY_INTERFACE_MODE_1000BASEX: 184 case PHY_INTERFACE_MODE_1000BASEKX: 185 case PHY_INTERFACE_MODE_TRGMII: 186 case PHY_INTERFACE_MODE_RGMII_TXID: 187 case PHY_INTERFACE_MODE_RGMII_RXID: 188 case PHY_INTERFACE_MODE_RGMII_ID: 189 case PHY_INTERFACE_MODE_RGMII: 190 case PHY_INTERFACE_MODE_QSGMII: 191 case PHY_INTERFACE_MODE_SGMII: 192 case PHY_INTERFACE_MODE_GMII: 193 return SPEED_1000; 194 195 case PHY_INTERFACE_MODE_2500BASEX: 196 return SPEED_2500; 197 198 case PHY_INTERFACE_MODE_5GBASER: 199 return SPEED_5000; 200 201 case PHY_INTERFACE_MODE_XGMII: 202 case PHY_INTERFACE_MODE_RXAUI: 203 case PHY_INTERFACE_MODE_XAUI: 204 case PHY_INTERFACE_MODE_10GBASER: 205 case PHY_INTERFACE_MODE_10GKR: 206 case PHY_INTERFACE_MODE_USXGMII: 207 case PHY_INTERFACE_MODE_QUSGMII: 208 return SPEED_10000; 209 210 case PHY_INTERFACE_MODE_25GBASER: 211 return SPEED_25000; 212 213 case PHY_INTERFACE_MODE_XLGMII: 214 return SPEED_40000; 215 216 case PHY_INTERFACE_MODE_INTERNAL: 217 case PHY_INTERFACE_MODE_NA: 218 case PHY_INTERFACE_MODE_MAX: 219 /* No idea! Garbage in, unknown out */ 220 return SPEED_UNKNOWN; 221 } 222 223 /* If we get here, someone forgot to add an interface mode above */ 224 WARN_ON_ONCE(1); 225 return SPEED_UNKNOWN; 226 } 227 228 /** 229 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 230 * @linkmodes: ethtool linkmode mask (must be already initialised) 231 * @caps: bitmask of MAC capabilities 232 * 233 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 234 * supported by the @caps. @linkmodes must have been initialised previously. 235 */ 236 void phylink_caps_to_linkmodes(unsigned long *linkmodes, unsigned long caps) 237 { 238 if (caps & MAC_SYM_PAUSE) 239 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 240 241 if (caps & MAC_ASYM_PAUSE) 242 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 243 244 if (caps & MAC_10HD) 245 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes); 246 247 if (caps & MAC_10FD) { 248 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes); 249 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes); 250 } 251 252 if (caps & MAC_100HD) { 253 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes); 254 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes); 255 } 256 257 if (caps & MAC_100FD) { 258 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes); 259 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes); 260 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes); 261 } 262 263 if (caps & MAC_1000HD) 264 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes); 265 266 if (caps & MAC_1000FD) { 267 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes); 268 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes); 269 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes); 270 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes); 271 } 272 273 if (caps & MAC_2500FD) { 274 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes); 275 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes); 276 } 277 278 if (caps & MAC_5000FD) 279 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes); 280 281 if (caps & MAC_10000FD) { 282 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes); 283 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes); 284 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes); 285 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes); 286 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes); 287 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes); 288 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes); 289 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes); 290 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes); 291 } 292 293 if (caps & MAC_25000FD) { 294 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes); 295 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes); 296 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes); 297 } 298 299 if (caps & MAC_40000FD) { 300 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes); 301 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes); 302 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes); 303 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes); 304 } 305 306 if (caps & MAC_50000FD) { 307 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes); 308 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes); 309 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes); 310 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes); 311 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes); 312 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes); 313 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 314 linkmodes); 315 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes); 316 } 317 318 if (caps & MAC_56000FD) { 319 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes); 320 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes); 321 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes); 322 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes); 323 } 324 325 if (caps & MAC_100000FD) { 326 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes); 327 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes); 328 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes); 329 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 330 linkmodes); 331 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes); 332 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes); 333 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes); 334 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 335 linkmodes); 336 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes); 337 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes); 338 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes); 339 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 340 linkmodes); 341 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes); 342 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes); 343 } 344 345 if (caps & MAC_200000FD) { 346 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes); 347 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes); 348 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 349 linkmodes); 350 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes); 351 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes); 352 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes); 353 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes); 354 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 355 linkmodes); 356 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes); 357 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes); 358 } 359 360 if (caps & MAC_400000FD) { 361 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes); 362 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes); 363 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 364 linkmodes); 365 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes); 366 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes); 367 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes); 368 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes); 369 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 370 linkmodes); 371 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes); 372 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes); 373 } 374 } 375 EXPORT_SYMBOL_GPL(phylink_caps_to_linkmodes); 376 377 static struct { 378 unsigned long mask; 379 int speed; 380 unsigned int duplex; 381 } phylink_caps_params[] = { 382 { MAC_400000FD, SPEED_400000, DUPLEX_FULL }, 383 { MAC_200000FD, SPEED_200000, DUPLEX_FULL }, 384 { MAC_100000FD, SPEED_100000, DUPLEX_FULL }, 385 { MAC_56000FD, SPEED_56000, DUPLEX_FULL }, 386 { MAC_50000FD, SPEED_50000, DUPLEX_FULL }, 387 { MAC_40000FD, SPEED_40000, DUPLEX_FULL }, 388 { MAC_25000FD, SPEED_25000, DUPLEX_FULL }, 389 { MAC_20000FD, SPEED_20000, DUPLEX_FULL }, 390 { MAC_10000FD, SPEED_10000, DUPLEX_FULL }, 391 { MAC_5000FD, SPEED_5000, DUPLEX_FULL }, 392 { MAC_2500FD, SPEED_2500, DUPLEX_FULL }, 393 { MAC_1000FD, SPEED_1000, DUPLEX_FULL }, 394 { MAC_1000HD, SPEED_1000, DUPLEX_HALF }, 395 { MAC_100FD, SPEED_100, DUPLEX_FULL }, 396 { MAC_100HD, SPEED_100, DUPLEX_HALF }, 397 { MAC_10FD, SPEED_10, DUPLEX_FULL }, 398 { MAC_10HD, SPEED_10, DUPLEX_HALF }, 399 }; 400 401 /** 402 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 403 * @speed: the speed to search for 404 * @duplex: the duplex to search for 405 * 406 * Find the mac capability for a given speed and duplex. 407 * 408 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 409 * there were no matches. 410 */ 411 static unsigned long phylink_cap_from_speed_duplex(int speed, 412 unsigned int duplex) 413 { 414 int i; 415 416 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 417 if (speed == phylink_caps_params[i].speed && 418 duplex == phylink_caps_params[i].duplex) 419 return phylink_caps_params[i].mask; 420 } 421 422 return 0; 423 } 424 425 /** 426 * phylink_get_capabilities() - get capabilities for a given MAC 427 * @interface: phy interface mode defined by &typedef phy_interface_t 428 * @mac_capabilities: bitmask of MAC capabilities 429 * @rate_matching: type of rate matching being performed 430 * 431 * Get the MAC capabilities that are supported by the @interface mode and 432 * @mac_capabilities. 433 */ 434 unsigned long phylink_get_capabilities(phy_interface_t interface, 435 unsigned long mac_capabilities, 436 int rate_matching) 437 { 438 int max_speed = phylink_interface_max_speed(interface); 439 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 440 unsigned long matched_caps = 0; 441 442 switch (interface) { 443 case PHY_INTERFACE_MODE_USXGMII: 444 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD; 445 fallthrough; 446 447 case PHY_INTERFACE_MODE_RGMII_TXID: 448 case PHY_INTERFACE_MODE_RGMII_RXID: 449 case PHY_INTERFACE_MODE_RGMII_ID: 450 case PHY_INTERFACE_MODE_RGMII: 451 case PHY_INTERFACE_MODE_QSGMII: 452 case PHY_INTERFACE_MODE_QUSGMII: 453 case PHY_INTERFACE_MODE_SGMII: 454 case PHY_INTERFACE_MODE_GMII: 455 caps |= MAC_1000HD | MAC_1000FD; 456 fallthrough; 457 458 case PHY_INTERFACE_MODE_REVRMII: 459 case PHY_INTERFACE_MODE_RMII: 460 case PHY_INTERFACE_MODE_SMII: 461 case PHY_INTERFACE_MODE_REVMII: 462 case PHY_INTERFACE_MODE_MII: 463 caps |= MAC_10HD | MAC_10FD; 464 fallthrough; 465 466 case PHY_INTERFACE_MODE_100BASEX: 467 caps |= MAC_100HD | MAC_100FD; 468 break; 469 470 case PHY_INTERFACE_MODE_TBI: 471 case PHY_INTERFACE_MODE_MOCA: 472 case PHY_INTERFACE_MODE_RTBI: 473 case PHY_INTERFACE_MODE_1000BASEX: 474 caps |= MAC_1000HD; 475 fallthrough; 476 case PHY_INTERFACE_MODE_1000BASEKX: 477 case PHY_INTERFACE_MODE_TRGMII: 478 caps |= MAC_1000FD; 479 break; 480 481 case PHY_INTERFACE_MODE_2500BASEX: 482 caps |= MAC_2500FD; 483 break; 484 485 case PHY_INTERFACE_MODE_5GBASER: 486 caps |= MAC_5000FD; 487 break; 488 489 case PHY_INTERFACE_MODE_XGMII: 490 case PHY_INTERFACE_MODE_RXAUI: 491 case PHY_INTERFACE_MODE_XAUI: 492 case PHY_INTERFACE_MODE_10GBASER: 493 case PHY_INTERFACE_MODE_10GKR: 494 caps |= MAC_10000FD; 495 break; 496 497 case PHY_INTERFACE_MODE_25GBASER: 498 caps |= MAC_25000FD; 499 break; 500 501 case PHY_INTERFACE_MODE_XLGMII: 502 caps |= MAC_40000FD; 503 break; 504 505 case PHY_INTERFACE_MODE_INTERNAL: 506 caps |= ~0; 507 break; 508 509 case PHY_INTERFACE_MODE_NA: 510 case PHY_INTERFACE_MODE_MAX: 511 break; 512 } 513 514 switch (rate_matching) { 515 case RATE_MATCH_OPEN_LOOP: 516 /* TODO */ 517 fallthrough; 518 case RATE_MATCH_NONE: 519 matched_caps = 0; 520 break; 521 case RATE_MATCH_PAUSE: { 522 /* The MAC must support asymmetric pause towards the local 523 * device for this. We could allow just symmetric pause, but 524 * then we might have to renegotiate if the link partner 525 * doesn't support pause. This is because there's no way to 526 * accept pause frames without transmitting them if we only 527 * support symmetric pause. 528 */ 529 if (!(mac_capabilities & MAC_SYM_PAUSE) || 530 !(mac_capabilities & MAC_ASYM_PAUSE)) 531 break; 532 533 /* We can't adapt if the MAC doesn't support the interface's 534 * max speed at full duplex. 535 */ 536 if (mac_capabilities & 537 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) { 538 /* Although a duplex-matching phy might exist, we 539 * conservatively remove these modes because the MAC 540 * will not be aware of the half-duplex nature of the 541 * link. 542 */ 543 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 544 matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD); 545 } 546 break; 547 } 548 case RATE_MATCH_CRS: 549 /* The MAC must support half duplex at the interface's max 550 * speed. 551 */ 552 if (mac_capabilities & 553 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 554 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 555 matched_caps &= mac_capabilities; 556 } 557 break; 558 } 559 560 return (caps & mac_capabilities) | matched_caps; 561 } 562 EXPORT_SYMBOL_GPL(phylink_get_capabilities); 563 564 /** 565 * phylink_validate_mask_caps() - Restrict link modes based on caps 566 * @supported: ethtool bitmask for supported link modes. 567 * @state: pointer to a &struct phylink_link_state. 568 * @mac_capabilities: bitmask of MAC capabilities 569 * 570 * Calculate the supported link modes based on @mac_capabilities, and restrict 571 * @supported and @state based on that. Use this function if your capabiliies 572 * aren't constant, such as if they vary depending on the interface. 573 */ 574 void phylink_validate_mask_caps(unsigned long *supported, 575 struct phylink_link_state *state, 576 unsigned long mac_capabilities) 577 { 578 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 579 unsigned long caps; 580 581 phylink_set_port_modes(mask); 582 phylink_set(mask, Autoneg); 583 caps = phylink_get_capabilities(state->interface, mac_capabilities, 584 state->rate_matching); 585 phylink_caps_to_linkmodes(mask, caps); 586 587 linkmode_and(supported, supported, mask); 588 linkmode_and(state->advertising, state->advertising, mask); 589 } 590 EXPORT_SYMBOL_GPL(phylink_validate_mask_caps); 591 592 /** 593 * phylink_generic_validate() - generic validate() callback implementation 594 * @config: a pointer to a &struct phylink_config. 595 * @supported: ethtool bitmask for supported link modes. 596 * @state: a pointer to a &struct phylink_link_state. 597 * 598 * Generic implementation of the validate() callback that MAC drivers can 599 * use when they pass the range of supported interfaces and MAC capabilities. 600 */ 601 void phylink_generic_validate(struct phylink_config *config, 602 unsigned long *supported, 603 struct phylink_link_state *state) 604 { 605 phylink_validate_mask_caps(supported, state, config->mac_capabilities); 606 } 607 EXPORT_SYMBOL_GPL(phylink_generic_validate); 608 609 static int phylink_validate_mac_and_pcs(struct phylink *pl, 610 unsigned long *supported, 611 struct phylink_link_state *state) 612 { 613 struct phylink_pcs *pcs; 614 int ret; 615 616 /* Get the PCS for this interface mode */ 617 if (pl->using_mac_select_pcs) { 618 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 619 if (IS_ERR(pcs)) 620 return PTR_ERR(pcs); 621 } else { 622 pcs = pl->pcs; 623 } 624 625 if (pcs) { 626 /* The PCS, if present, must be setup before phylink_create() 627 * has been called. If the ops is not initialised, print an 628 * error and backtrace rather than oopsing the kernel. 629 */ 630 if (!pcs->ops) { 631 phylink_err(pl, "interface %s: uninitialised PCS\n", 632 phy_modes(state->interface)); 633 dump_stack(); 634 return -EINVAL; 635 } 636 637 /* Validate the link parameters with the PCS */ 638 if (pcs->ops->pcs_validate) { 639 ret = pcs->ops->pcs_validate(pcs, supported, state); 640 if (ret < 0 || phylink_is_empty_linkmode(supported)) 641 return -EINVAL; 642 643 /* Ensure the advertising mask is a subset of the 644 * supported mask. 645 */ 646 linkmode_and(state->advertising, state->advertising, 647 supported); 648 } 649 } 650 651 /* Then validate the link parameters with the MAC */ 652 pl->mac_ops->validate(pl->config, supported, state); 653 654 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 655 } 656 657 static int phylink_validate_mask(struct phylink *pl, unsigned long *supported, 658 struct phylink_link_state *state, 659 const unsigned long *interfaces) 660 { 661 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 662 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 663 __ETHTOOL_DECLARE_LINK_MODE_MASK(s); 664 struct phylink_link_state t; 665 int intf; 666 667 for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) { 668 if (test_bit(intf, interfaces)) { 669 linkmode_copy(s, supported); 670 671 t = *state; 672 t.interface = intf; 673 if (!phylink_validate_mac_and_pcs(pl, s, &t)) { 674 linkmode_or(all_s, all_s, s); 675 linkmode_or(all_adv, all_adv, t.advertising); 676 } 677 } 678 } 679 680 linkmode_copy(supported, all_s); 681 linkmode_copy(state->advertising, all_adv); 682 683 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 684 } 685 686 static int phylink_validate(struct phylink *pl, unsigned long *supported, 687 struct phylink_link_state *state) 688 { 689 const unsigned long *interfaces = pl->config->supported_interfaces; 690 691 if (!phy_interface_empty(interfaces)) { 692 if (state->interface == PHY_INTERFACE_MODE_NA) 693 return phylink_validate_mask(pl, supported, state, 694 interfaces); 695 696 if (!test_bit(state->interface, interfaces)) 697 return -EINVAL; 698 } 699 700 return phylink_validate_mac_and_pcs(pl, supported, state); 701 } 702 703 static int phylink_parse_fixedlink(struct phylink *pl, 704 struct fwnode_handle *fwnode) 705 { 706 struct fwnode_handle *fixed_node; 707 const struct phy_setting *s; 708 struct gpio_desc *desc; 709 u32 speed; 710 int ret; 711 712 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 713 if (fixed_node) { 714 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 715 716 pl->link_config.speed = speed; 717 pl->link_config.duplex = DUPLEX_HALF; 718 719 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 720 pl->link_config.duplex = DUPLEX_FULL; 721 722 /* We treat the "pause" and "asym-pause" terminology as 723 * defining the link partner's ability. 724 */ 725 if (fwnode_property_read_bool(fixed_node, "pause")) 726 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 727 pl->link_config.lp_advertising); 728 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 729 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 730 pl->link_config.lp_advertising); 731 732 if (ret == 0) { 733 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 734 GPIOD_IN, "?"); 735 736 if (!IS_ERR(desc)) 737 pl->link_gpio = desc; 738 else if (desc == ERR_PTR(-EPROBE_DEFER)) 739 ret = -EPROBE_DEFER; 740 } 741 fwnode_handle_put(fixed_node); 742 743 if (ret) 744 return ret; 745 } else { 746 u32 prop[5]; 747 748 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 749 NULL, 0); 750 if (ret != ARRAY_SIZE(prop)) { 751 phylink_err(pl, "broken fixed-link?\n"); 752 return -EINVAL; 753 } 754 755 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 756 prop, ARRAY_SIZE(prop)); 757 if (!ret) { 758 pl->link_config.duplex = prop[1] ? 759 DUPLEX_FULL : DUPLEX_HALF; 760 pl->link_config.speed = prop[2]; 761 if (prop[3]) 762 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 763 pl->link_config.lp_advertising); 764 if (prop[4]) 765 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 766 pl->link_config.lp_advertising); 767 } 768 } 769 770 if (pl->link_config.speed > SPEED_1000 && 771 pl->link_config.duplex != DUPLEX_FULL) 772 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 773 pl->link_config.speed); 774 775 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 776 linkmode_copy(pl->link_config.advertising, pl->supported); 777 phylink_validate(pl, pl->supported, &pl->link_config); 778 779 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, 780 pl->supported, true); 781 linkmode_zero(pl->supported); 782 phylink_set(pl->supported, MII); 783 phylink_set(pl->supported, Pause); 784 phylink_set(pl->supported, Asym_Pause); 785 phylink_set(pl->supported, Autoneg); 786 if (s) { 787 __set_bit(s->bit, pl->supported); 788 __set_bit(s->bit, pl->link_config.lp_advertising); 789 } else { 790 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 791 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 792 pl->link_config.speed); 793 } 794 795 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 796 pl->supported); 797 798 pl->link_config.link = 1; 799 pl->link_config.an_complete = 1; 800 801 return 0; 802 } 803 804 static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode) 805 { 806 struct fwnode_handle *dn; 807 const char *managed; 808 809 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 810 if (dn || fwnode_property_present(fwnode, "fixed-link")) 811 pl->cfg_link_an_mode = MLO_AN_FIXED; 812 fwnode_handle_put(dn); 813 814 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 815 strcmp(managed, "in-band-status") == 0) || 816 pl->config->ovr_an_inband) { 817 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 818 phylink_err(pl, 819 "can't use both fixed-link and in-band-status\n"); 820 return -EINVAL; 821 } 822 823 linkmode_zero(pl->supported); 824 phylink_set(pl->supported, MII); 825 phylink_set(pl->supported, Autoneg); 826 phylink_set(pl->supported, Asym_Pause); 827 phylink_set(pl->supported, Pause); 828 pl->link_config.an_enabled = true; 829 pl->cfg_link_an_mode = MLO_AN_INBAND; 830 831 switch (pl->link_config.interface) { 832 case PHY_INTERFACE_MODE_SGMII: 833 case PHY_INTERFACE_MODE_QSGMII: 834 case PHY_INTERFACE_MODE_QUSGMII: 835 case PHY_INTERFACE_MODE_RGMII: 836 case PHY_INTERFACE_MODE_RGMII_ID: 837 case PHY_INTERFACE_MODE_RGMII_RXID: 838 case PHY_INTERFACE_MODE_RGMII_TXID: 839 case PHY_INTERFACE_MODE_RTBI: 840 phylink_set(pl->supported, 10baseT_Half); 841 phylink_set(pl->supported, 10baseT_Full); 842 phylink_set(pl->supported, 100baseT_Half); 843 phylink_set(pl->supported, 100baseT_Full); 844 phylink_set(pl->supported, 1000baseT_Half); 845 phylink_set(pl->supported, 1000baseT_Full); 846 break; 847 848 case PHY_INTERFACE_MODE_1000BASEX: 849 phylink_set(pl->supported, 1000baseX_Full); 850 break; 851 852 case PHY_INTERFACE_MODE_2500BASEX: 853 phylink_set(pl->supported, 2500baseX_Full); 854 break; 855 856 case PHY_INTERFACE_MODE_5GBASER: 857 phylink_set(pl->supported, 5000baseT_Full); 858 break; 859 860 case PHY_INTERFACE_MODE_25GBASER: 861 phylink_set(pl->supported, 25000baseCR_Full); 862 phylink_set(pl->supported, 25000baseKR_Full); 863 phylink_set(pl->supported, 25000baseSR_Full); 864 fallthrough; 865 case PHY_INTERFACE_MODE_USXGMII: 866 case PHY_INTERFACE_MODE_10GKR: 867 case PHY_INTERFACE_MODE_10GBASER: 868 phylink_set(pl->supported, 10baseT_Half); 869 phylink_set(pl->supported, 10baseT_Full); 870 phylink_set(pl->supported, 100baseT_Half); 871 phylink_set(pl->supported, 100baseT_Full); 872 phylink_set(pl->supported, 1000baseT_Half); 873 phylink_set(pl->supported, 1000baseT_Full); 874 phylink_set(pl->supported, 1000baseX_Full); 875 phylink_set(pl->supported, 1000baseKX_Full); 876 phylink_set(pl->supported, 2500baseT_Full); 877 phylink_set(pl->supported, 2500baseX_Full); 878 phylink_set(pl->supported, 5000baseT_Full); 879 phylink_set(pl->supported, 10000baseT_Full); 880 phylink_set(pl->supported, 10000baseKR_Full); 881 phylink_set(pl->supported, 10000baseKX4_Full); 882 phylink_set(pl->supported, 10000baseCR_Full); 883 phylink_set(pl->supported, 10000baseSR_Full); 884 phylink_set(pl->supported, 10000baseLR_Full); 885 phylink_set(pl->supported, 10000baseLRM_Full); 886 phylink_set(pl->supported, 10000baseER_Full); 887 break; 888 889 case PHY_INTERFACE_MODE_XLGMII: 890 phylink_set(pl->supported, 25000baseCR_Full); 891 phylink_set(pl->supported, 25000baseKR_Full); 892 phylink_set(pl->supported, 25000baseSR_Full); 893 phylink_set(pl->supported, 40000baseKR4_Full); 894 phylink_set(pl->supported, 40000baseCR4_Full); 895 phylink_set(pl->supported, 40000baseSR4_Full); 896 phylink_set(pl->supported, 40000baseLR4_Full); 897 phylink_set(pl->supported, 50000baseCR2_Full); 898 phylink_set(pl->supported, 50000baseKR2_Full); 899 phylink_set(pl->supported, 50000baseSR2_Full); 900 phylink_set(pl->supported, 50000baseKR_Full); 901 phylink_set(pl->supported, 50000baseSR_Full); 902 phylink_set(pl->supported, 50000baseCR_Full); 903 phylink_set(pl->supported, 50000baseLR_ER_FR_Full); 904 phylink_set(pl->supported, 50000baseDR_Full); 905 phylink_set(pl->supported, 100000baseKR4_Full); 906 phylink_set(pl->supported, 100000baseSR4_Full); 907 phylink_set(pl->supported, 100000baseCR4_Full); 908 phylink_set(pl->supported, 100000baseLR4_ER4_Full); 909 phylink_set(pl->supported, 100000baseKR2_Full); 910 phylink_set(pl->supported, 100000baseSR2_Full); 911 phylink_set(pl->supported, 100000baseCR2_Full); 912 phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full); 913 phylink_set(pl->supported, 100000baseDR2_Full); 914 break; 915 916 default: 917 phylink_err(pl, 918 "incorrect link mode %s for in-band status\n", 919 phy_modes(pl->link_config.interface)); 920 return -EINVAL; 921 } 922 923 linkmode_copy(pl->link_config.advertising, pl->supported); 924 925 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 926 phylink_err(pl, 927 "failed to validate link configuration for in-band status\n"); 928 return -EINVAL; 929 } 930 931 /* Check if MAC/PCS also supports Autoneg. */ 932 pl->link_config.an_enabled = phylink_test(pl->supported, Autoneg); 933 } 934 935 return 0; 936 } 937 938 static void phylink_apply_manual_flow(struct phylink *pl, 939 struct phylink_link_state *state) 940 { 941 /* If autoneg is disabled, pause AN is also disabled */ 942 if (!state->an_enabled) 943 state->pause &= ~MLO_PAUSE_AN; 944 945 /* Manual configuration of pause modes */ 946 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 947 state->pause = pl->link_config.pause; 948 } 949 950 static void phylink_resolve_flow(struct phylink_link_state *state) 951 { 952 bool tx_pause, rx_pause; 953 954 state->pause = MLO_PAUSE_NONE; 955 if (state->duplex == DUPLEX_FULL) { 956 linkmode_resolve_pause(state->advertising, 957 state->lp_advertising, 958 &tx_pause, &rx_pause); 959 if (tx_pause) 960 state->pause |= MLO_PAUSE_TX; 961 if (rx_pause) 962 state->pause |= MLO_PAUSE_RX; 963 } 964 } 965 966 static void phylink_pcs_poll_stop(struct phylink *pl) 967 { 968 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 969 del_timer(&pl->link_poll); 970 } 971 972 static void phylink_pcs_poll_start(struct phylink *pl) 973 { 974 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 975 mod_timer(&pl->link_poll, jiffies + HZ); 976 } 977 978 static void phylink_mac_config(struct phylink *pl, 979 const struct phylink_link_state *state) 980 { 981 phylink_dbg(pl, 982 "%s: mode=%s/%s/%s/%s/%s adv=%*pb pause=%02x link=%u an=%u\n", 983 __func__, phylink_an_mode_str(pl->cur_link_an_mode), 984 phy_modes(state->interface), 985 phy_speed_to_str(state->speed), 986 phy_duplex_to_str(state->duplex), 987 phy_rate_matching_to_str(state->rate_matching), 988 __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising, 989 state->pause, state->link, state->an_enabled); 990 991 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, state); 992 } 993 994 static void phylink_mac_pcs_an_restart(struct phylink *pl) 995 { 996 if (pl->link_config.an_enabled && 997 phy_interface_mode_is_8023z(pl->link_config.interface) && 998 phylink_autoneg_inband(pl->cur_link_an_mode)) { 999 if (pl->pcs) 1000 pl->pcs->ops->pcs_an_restart(pl->pcs); 1001 else if (pl->config->legacy_pre_march2020) 1002 pl->mac_ops->mac_an_restart(pl->config); 1003 } 1004 } 1005 1006 static void phylink_major_config(struct phylink *pl, bool restart, 1007 const struct phylink_link_state *state) 1008 { 1009 struct phylink_pcs *pcs = NULL; 1010 bool pcs_changed = false; 1011 int err; 1012 1013 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); 1014 1015 if (pl->using_mac_select_pcs) { 1016 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1017 if (IS_ERR(pcs)) { 1018 phylink_err(pl, 1019 "mac_select_pcs unexpectedly failed: %pe\n", 1020 pcs); 1021 return; 1022 } 1023 1024 pcs_changed = pcs && pl->pcs != pcs; 1025 } 1026 1027 phylink_pcs_poll_stop(pl); 1028 1029 if (pl->mac_ops->mac_prepare) { 1030 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode, 1031 state->interface); 1032 if (err < 0) { 1033 phylink_err(pl, "mac_prepare failed: %pe\n", 1034 ERR_PTR(err)); 1035 return; 1036 } 1037 } 1038 1039 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1040 * for the change. 1041 */ 1042 if (pcs_changed) 1043 pl->pcs = pcs; 1044 1045 phylink_mac_config(pl, state); 1046 1047 if (pl->pcs) { 1048 err = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode, 1049 state->interface, 1050 state->advertising, 1051 !!(pl->link_config.pause & 1052 MLO_PAUSE_AN)); 1053 if (err < 0) 1054 phylink_err(pl, "pcs_config failed: %pe\n", 1055 ERR_PTR(err)); 1056 if (err > 0) 1057 restart = true; 1058 } 1059 if (restart) 1060 phylink_mac_pcs_an_restart(pl); 1061 1062 if (pl->mac_ops->mac_finish) { 1063 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode, 1064 state->interface); 1065 if (err < 0) 1066 phylink_err(pl, "mac_finish failed: %pe\n", 1067 ERR_PTR(err)); 1068 } 1069 1070 phylink_pcs_poll_start(pl); 1071 } 1072 1073 /* 1074 * Reconfigure for a change of inband advertisement. 1075 * If we have a separate PCS, we only need to call its pcs_config() method, 1076 * and then restart AN if it indicates something changed. Otherwise, we do 1077 * the full MAC reconfiguration. 1078 */ 1079 static int phylink_change_inband_advert(struct phylink *pl) 1080 { 1081 int ret; 1082 1083 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1084 return 0; 1085 1086 if (!pl->pcs && pl->config->legacy_pre_march2020) { 1087 /* Legacy method */ 1088 phylink_mac_config(pl, &pl->link_config); 1089 phylink_mac_pcs_an_restart(pl); 1090 return 0; 1091 } 1092 1093 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1094 phylink_an_mode_str(pl->cur_link_an_mode), 1095 phy_modes(pl->link_config.interface), 1096 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1097 pl->link_config.pause); 1098 1099 /* Modern PCS-based method; update the advert at the PCS, and 1100 * restart negotiation if the pcs_config() helper indicates that 1101 * the programmed advertisement has changed. 1102 */ 1103 ret = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode, 1104 pl->link_config.interface, 1105 pl->link_config.advertising, 1106 !!(pl->link_config.pause & 1107 MLO_PAUSE_AN)); 1108 if (ret < 0) 1109 return ret; 1110 1111 if (ret > 0) 1112 phylink_mac_pcs_an_restart(pl); 1113 1114 return 0; 1115 } 1116 1117 static void phylink_mac_pcs_get_state(struct phylink *pl, 1118 struct phylink_link_state *state) 1119 { 1120 linkmode_copy(state->advertising, pl->link_config.advertising); 1121 linkmode_zero(state->lp_advertising); 1122 state->interface = pl->link_config.interface; 1123 state->an_enabled = pl->link_config.an_enabled; 1124 state->rate_matching = pl->link_config.rate_matching; 1125 if (state->an_enabled) { 1126 state->speed = SPEED_UNKNOWN; 1127 state->duplex = DUPLEX_UNKNOWN; 1128 state->pause = MLO_PAUSE_NONE; 1129 } else { 1130 state->speed = pl->link_config.speed; 1131 state->duplex = pl->link_config.duplex; 1132 state->pause = pl->link_config.pause; 1133 } 1134 state->an_complete = 0; 1135 state->link = 1; 1136 1137 if (pl->pcs) 1138 pl->pcs->ops->pcs_get_state(pl->pcs, state); 1139 else if (pl->mac_ops->mac_pcs_get_state && 1140 pl->config->legacy_pre_march2020) 1141 pl->mac_ops->mac_pcs_get_state(pl->config, state); 1142 else 1143 state->link = 0; 1144 } 1145 1146 /* The fixed state is... fixed except for the link state, 1147 * which may be determined by a GPIO or a callback. 1148 */ 1149 static void phylink_get_fixed_state(struct phylink *pl, 1150 struct phylink_link_state *state) 1151 { 1152 *state = pl->link_config; 1153 if (pl->config->get_fixed_state) 1154 pl->config->get_fixed_state(pl->config, state); 1155 else if (pl->link_gpio) 1156 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1157 1158 phylink_resolve_flow(state); 1159 } 1160 1161 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1162 { 1163 struct phylink_link_state link_state; 1164 1165 switch (pl->cur_link_an_mode) { 1166 case MLO_AN_PHY: 1167 link_state = pl->phy_state; 1168 break; 1169 1170 case MLO_AN_FIXED: 1171 phylink_get_fixed_state(pl, &link_state); 1172 break; 1173 1174 case MLO_AN_INBAND: 1175 link_state = pl->link_config; 1176 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1177 link_state.pause = MLO_PAUSE_NONE; 1178 break; 1179 1180 default: /* can't happen */ 1181 return; 1182 } 1183 1184 link_state.link = false; 1185 1186 phylink_apply_manual_flow(pl, &link_state); 1187 phylink_major_config(pl, force_restart, &link_state); 1188 } 1189 1190 static const char *phylink_pause_to_str(int pause) 1191 { 1192 switch (pause & MLO_PAUSE_TXRX_MASK) { 1193 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1194 return "rx/tx"; 1195 case MLO_PAUSE_TX: 1196 return "tx"; 1197 case MLO_PAUSE_RX: 1198 return "rx"; 1199 default: 1200 return "off"; 1201 } 1202 } 1203 1204 static void phylink_link_up(struct phylink *pl, 1205 struct phylink_link_state link_state) 1206 { 1207 struct net_device *ndev = pl->netdev; 1208 int speed, duplex; 1209 bool rx_pause; 1210 1211 speed = link_state.speed; 1212 duplex = link_state.duplex; 1213 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1214 1215 switch (link_state.rate_matching) { 1216 case RATE_MATCH_PAUSE: 1217 /* The PHY is doing rate matchion from the media rate (in 1218 * the link_state) to the interface speed, and will send 1219 * pause frames to the MAC to limit its transmission speed. 1220 */ 1221 speed = phylink_interface_max_speed(link_state.interface); 1222 duplex = DUPLEX_FULL; 1223 rx_pause = true; 1224 break; 1225 1226 case RATE_MATCH_CRS: 1227 /* The PHY is doing rate matchion from the media rate (in 1228 * the link_state) to the interface speed, and will cause 1229 * collisions to the MAC to limit its transmission speed. 1230 */ 1231 speed = phylink_interface_max_speed(link_state.interface); 1232 duplex = DUPLEX_HALF; 1233 break; 1234 } 1235 1236 pl->cur_interface = link_state.interface; 1237 1238 if (pl->pcs && pl->pcs->ops->pcs_link_up) 1239 pl->pcs->ops->pcs_link_up(pl->pcs, pl->cur_link_an_mode, 1240 pl->cur_interface, speed, duplex); 1241 1242 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode, 1243 pl->cur_interface, speed, duplex, 1244 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1245 1246 if (ndev) 1247 netif_carrier_on(ndev); 1248 1249 phylink_info(pl, 1250 "Link is Up - %s/%s - flow control %s\n", 1251 phy_speed_to_str(link_state.speed), 1252 phy_duplex_to_str(link_state.duplex), 1253 phylink_pause_to_str(link_state.pause)); 1254 } 1255 1256 static void phylink_link_down(struct phylink *pl) 1257 { 1258 struct net_device *ndev = pl->netdev; 1259 1260 if (ndev) 1261 netif_carrier_off(ndev); 1262 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode, 1263 pl->cur_interface); 1264 phylink_info(pl, "Link is Down\n"); 1265 } 1266 1267 static void phylink_resolve(struct work_struct *w) 1268 { 1269 struct phylink *pl = container_of(w, struct phylink, resolve); 1270 struct phylink_link_state link_state; 1271 struct net_device *ndev = pl->netdev; 1272 bool mac_config = false; 1273 bool retrigger = false; 1274 bool cur_link_state; 1275 1276 mutex_lock(&pl->state_mutex); 1277 if (pl->netdev) 1278 cur_link_state = netif_carrier_ok(ndev); 1279 else 1280 cur_link_state = pl->old_link_state; 1281 1282 if (pl->phylink_disable_state) { 1283 pl->mac_link_dropped = false; 1284 link_state.link = false; 1285 } else if (pl->mac_link_dropped) { 1286 link_state.link = false; 1287 retrigger = true; 1288 } else { 1289 switch (pl->cur_link_an_mode) { 1290 case MLO_AN_PHY: 1291 link_state = pl->phy_state; 1292 phylink_apply_manual_flow(pl, &link_state); 1293 mac_config = link_state.link; 1294 break; 1295 1296 case MLO_AN_FIXED: 1297 phylink_get_fixed_state(pl, &link_state); 1298 mac_config = link_state.link; 1299 break; 1300 1301 case MLO_AN_INBAND: 1302 phylink_mac_pcs_get_state(pl, &link_state); 1303 1304 /* The PCS may have a latching link-fail indicator. 1305 * If the link was up, bring the link down and 1306 * re-trigger the resolve. Otherwise, re-read the 1307 * PCS state to get the current status of the link. 1308 */ 1309 if (!link_state.link) { 1310 if (cur_link_state) 1311 retrigger = true; 1312 else 1313 phylink_mac_pcs_get_state(pl, 1314 &link_state); 1315 } 1316 1317 /* If we have a phy, the "up" state is the union of 1318 * both the PHY and the MAC 1319 */ 1320 if (pl->phydev) 1321 link_state.link &= pl->phy_state.link; 1322 1323 /* Only update if the PHY link is up */ 1324 if (pl->phydev && pl->phy_state.link) { 1325 /* If the interface has changed, force a 1326 * link down event if the link isn't already 1327 * down, and re-resolve. 1328 */ 1329 if (link_state.interface != 1330 pl->phy_state.interface) { 1331 retrigger = true; 1332 link_state.link = false; 1333 } 1334 link_state.interface = pl->phy_state.interface; 1335 1336 /* If we are doing rate matching, then the 1337 * link speed/duplex comes from the PHY 1338 */ 1339 if (pl->phy_state.rate_matching) { 1340 link_state.rate_matching = 1341 pl->phy_state.rate_matching; 1342 link_state.speed = pl->phy_state.speed; 1343 link_state.duplex = 1344 pl->phy_state.duplex; 1345 } 1346 1347 /* If we have a PHY, we need to update with 1348 * the PHY flow control bits. 1349 */ 1350 link_state.pause = pl->phy_state.pause; 1351 mac_config = true; 1352 } 1353 phylink_apply_manual_flow(pl, &link_state); 1354 break; 1355 } 1356 } 1357 1358 if (mac_config) { 1359 if (link_state.interface != pl->link_config.interface) { 1360 /* The interface has changed, force the link down and 1361 * then reconfigure. 1362 */ 1363 if (cur_link_state) { 1364 phylink_link_down(pl); 1365 cur_link_state = false; 1366 } 1367 phylink_major_config(pl, false, &link_state); 1368 pl->link_config.interface = link_state.interface; 1369 } else if (!pl->pcs && pl->config->legacy_pre_march2020) { 1370 /* The interface remains unchanged, only the speed, 1371 * duplex or pause settings have changed. Call the 1372 * old mac_config() method to configure the MAC/PCS 1373 * only if we do not have a legacy MAC driver. 1374 */ 1375 phylink_mac_config(pl, &link_state); 1376 } 1377 } 1378 1379 if (link_state.link != cur_link_state) { 1380 pl->old_link_state = link_state.link; 1381 if (!link_state.link) 1382 phylink_link_down(pl); 1383 else 1384 phylink_link_up(pl, link_state); 1385 } 1386 if (!link_state.link && retrigger) { 1387 pl->mac_link_dropped = false; 1388 queue_work(system_power_efficient_wq, &pl->resolve); 1389 } 1390 mutex_unlock(&pl->state_mutex); 1391 } 1392 1393 static void phylink_run_resolve(struct phylink *pl) 1394 { 1395 if (!pl->phylink_disable_state) 1396 queue_work(system_power_efficient_wq, &pl->resolve); 1397 } 1398 1399 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1400 { 1401 unsigned long state = pl->phylink_disable_state; 1402 1403 set_bit(bit, &pl->phylink_disable_state); 1404 if (state == 0) { 1405 queue_work(system_power_efficient_wq, &pl->resolve); 1406 flush_work(&pl->resolve); 1407 } 1408 } 1409 1410 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1411 { 1412 clear_bit(bit, &pl->phylink_disable_state); 1413 phylink_run_resolve(pl); 1414 } 1415 1416 static void phylink_fixed_poll(struct timer_list *t) 1417 { 1418 struct phylink *pl = container_of(t, struct phylink, link_poll); 1419 1420 mod_timer(t, jiffies + HZ); 1421 1422 phylink_run_resolve(pl); 1423 } 1424 1425 static const struct sfp_upstream_ops sfp_phylink_ops; 1426 1427 static int phylink_register_sfp(struct phylink *pl, 1428 struct fwnode_handle *fwnode) 1429 { 1430 struct sfp_bus *bus; 1431 int ret; 1432 1433 if (!fwnode) 1434 return 0; 1435 1436 bus = sfp_bus_find_fwnode(fwnode); 1437 if (IS_ERR(bus)) { 1438 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1439 return PTR_ERR(bus); 1440 } 1441 1442 pl->sfp_bus = bus; 1443 1444 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1445 sfp_bus_put(bus); 1446 1447 return ret; 1448 } 1449 1450 /** 1451 * phylink_create() - create a phylink instance 1452 * @config: a pointer to the target &struct phylink_config 1453 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1454 * interface 1455 * @iface: the desired link mode defined by &typedef phy_interface_t 1456 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1457 * 1458 * Create a new phylink instance, and parse the link parameters found in @np. 1459 * This will parse in-band modes, fixed-link or SFP configuration. 1460 * 1461 * Note: the rtnl lock must not be held when calling this function. 1462 * 1463 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1464 * must use IS_ERR() to check for errors from this function. 1465 */ 1466 struct phylink *phylink_create(struct phylink_config *config, 1467 struct fwnode_handle *fwnode, 1468 phy_interface_t iface, 1469 const struct phylink_mac_ops *mac_ops) 1470 { 1471 bool using_mac_select_pcs = false; 1472 struct phylink *pl; 1473 int ret; 1474 1475 if (mac_ops->mac_select_pcs && 1476 mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) != 1477 ERR_PTR(-EOPNOTSUPP)) 1478 using_mac_select_pcs = true; 1479 1480 /* Validate the supplied configuration */ 1481 if (using_mac_select_pcs && 1482 phy_interface_empty(config->supported_interfaces)) { 1483 dev_err(config->dev, 1484 "phylink: error: empty supported_interfaces but mac_select_pcs() method present\n"); 1485 return ERR_PTR(-EINVAL); 1486 } 1487 1488 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1489 if (!pl) 1490 return ERR_PTR(-ENOMEM); 1491 1492 mutex_init(&pl->state_mutex); 1493 INIT_WORK(&pl->resolve, phylink_resolve); 1494 1495 pl->config = config; 1496 if (config->type == PHYLINK_NETDEV) { 1497 pl->netdev = to_net_dev(config->dev); 1498 } else if (config->type == PHYLINK_DEV) { 1499 pl->dev = config->dev; 1500 } else { 1501 kfree(pl); 1502 return ERR_PTR(-EINVAL); 1503 } 1504 1505 pl->using_mac_select_pcs = using_mac_select_pcs; 1506 pl->phy_state.interface = iface; 1507 pl->link_interface = iface; 1508 if (iface == PHY_INTERFACE_MODE_MOCA) 1509 pl->link_port = PORT_BNC; 1510 else 1511 pl->link_port = PORT_MII; 1512 pl->link_config.interface = iface; 1513 pl->link_config.pause = MLO_PAUSE_AN; 1514 pl->link_config.speed = SPEED_UNKNOWN; 1515 pl->link_config.duplex = DUPLEX_UNKNOWN; 1516 pl->link_config.an_enabled = true; 1517 pl->mac_ops = mac_ops; 1518 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1519 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1520 1521 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 1522 linkmode_copy(pl->link_config.advertising, pl->supported); 1523 phylink_validate(pl, pl->supported, &pl->link_config); 1524 1525 ret = phylink_parse_mode(pl, fwnode); 1526 if (ret < 0) { 1527 kfree(pl); 1528 return ERR_PTR(ret); 1529 } 1530 1531 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1532 ret = phylink_parse_fixedlink(pl, fwnode); 1533 if (ret < 0) { 1534 kfree(pl); 1535 return ERR_PTR(ret); 1536 } 1537 } 1538 1539 pl->cur_link_an_mode = pl->cfg_link_an_mode; 1540 1541 ret = phylink_register_sfp(pl, fwnode); 1542 if (ret < 0) { 1543 kfree(pl); 1544 return ERR_PTR(ret); 1545 } 1546 1547 return pl; 1548 } 1549 EXPORT_SYMBOL_GPL(phylink_create); 1550 1551 /** 1552 * phylink_destroy() - cleanup and destroy the phylink instance 1553 * @pl: a pointer to a &struct phylink returned from phylink_create() 1554 * 1555 * Destroy a phylink instance. Any PHY that has been attached must have been 1556 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1557 * 1558 * Note: the rtnl lock must not be held when calling this function. 1559 */ 1560 void phylink_destroy(struct phylink *pl) 1561 { 1562 sfp_bus_del_upstream(pl->sfp_bus); 1563 if (pl->link_gpio) 1564 gpiod_put(pl->link_gpio); 1565 1566 cancel_work_sync(&pl->resolve); 1567 kfree(pl); 1568 } 1569 EXPORT_SYMBOL_GPL(phylink_destroy); 1570 1571 static void phylink_phy_change(struct phy_device *phydev, bool up) 1572 { 1573 struct phylink *pl = phydev->phylink; 1574 bool tx_pause, rx_pause; 1575 1576 phy_get_pause(phydev, &tx_pause, &rx_pause); 1577 1578 mutex_lock(&pl->state_mutex); 1579 pl->phy_state.speed = phydev->speed; 1580 pl->phy_state.duplex = phydev->duplex; 1581 pl->phy_state.rate_matching = phydev->rate_matching; 1582 pl->phy_state.pause = MLO_PAUSE_NONE; 1583 if (tx_pause) 1584 pl->phy_state.pause |= MLO_PAUSE_TX; 1585 if (rx_pause) 1586 pl->phy_state.pause |= MLO_PAUSE_RX; 1587 pl->phy_state.interface = phydev->interface; 1588 pl->phy_state.link = up; 1589 mutex_unlock(&pl->state_mutex); 1590 1591 phylink_run_resolve(pl); 1592 1593 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down", 1594 phy_modes(phydev->interface), 1595 phy_speed_to_str(phydev->speed), 1596 phy_duplex_to_str(phydev->duplex), 1597 phy_rate_matching_to_str(phydev->rate_matching), 1598 phylink_pause_to_str(pl->phy_state.pause)); 1599 } 1600 1601 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 1602 phy_interface_t interface) 1603 { 1604 struct phylink_link_state config; 1605 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 1606 char *irq_str; 1607 int ret; 1608 1609 /* 1610 * This is the new way of dealing with flow control for PHYs, 1611 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 1612 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 1613 * using our validate call to the MAC, we rely upon the MAC 1614 * clearing the bits from both supported and advertising fields. 1615 */ 1616 phy_support_asym_pause(phy); 1617 1618 memset(&config, 0, sizeof(config)); 1619 linkmode_copy(supported, phy->supported); 1620 linkmode_copy(config.advertising, phy->advertising); 1621 1622 /* Clause 45 PHYs switch their Serdes lane between several different 1623 * modes, normally 10GBASE-R, SGMII. Some use 2500BASE-X for 2.5G 1624 * speeds. We really need to know which interface modes the PHY and 1625 * MAC supports to properly work out which linkmodes can be supported. 1626 */ 1627 if (phy->is_c45 && 1628 interface != PHY_INTERFACE_MODE_RXAUI && 1629 interface != PHY_INTERFACE_MODE_XAUI && 1630 interface != PHY_INTERFACE_MODE_USXGMII) 1631 config.interface = PHY_INTERFACE_MODE_NA; 1632 else 1633 config.interface = interface; 1634 config.rate_matching = phy_get_rate_matching(phy, config.interface); 1635 1636 ret = phylink_validate(pl, supported, &config); 1637 if (ret) { 1638 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 1639 phy_modes(config.interface), 1640 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 1641 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 1642 ERR_PTR(ret)); 1643 return ret; 1644 } 1645 1646 phy->phylink = pl; 1647 phy->phy_link_change = phylink_phy_change; 1648 1649 irq_str = phy_attached_info_irq(phy); 1650 phylink_info(pl, 1651 "PHY [%s] driver [%s] (irq=%s)\n", 1652 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 1653 kfree(irq_str); 1654 1655 mutex_lock(&phy->lock); 1656 mutex_lock(&pl->state_mutex); 1657 pl->phydev = phy; 1658 pl->phy_state.interface = interface; 1659 pl->phy_state.pause = MLO_PAUSE_NONE; 1660 pl->phy_state.speed = SPEED_UNKNOWN; 1661 pl->phy_state.duplex = DUPLEX_UNKNOWN; 1662 pl->phy_state.rate_matching = RATE_MATCH_NONE; 1663 linkmode_copy(pl->supported, supported); 1664 linkmode_copy(pl->link_config.advertising, config.advertising); 1665 1666 /* Restrict the phy advertisement according to the MAC support. */ 1667 linkmode_copy(phy->advertising, config.advertising); 1668 mutex_unlock(&pl->state_mutex); 1669 mutex_unlock(&phy->lock); 1670 1671 phylink_dbg(pl, 1672 "phy: %s setting supported %*pb advertising %*pb\n", 1673 phy_modes(interface), 1674 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 1675 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 1676 1677 if (phy_interrupt_is_valid(phy)) 1678 phy_request_interrupt(phy); 1679 1680 if (pl->config->mac_managed_pm) 1681 phy->mac_managed_pm = true; 1682 1683 return 0; 1684 } 1685 1686 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 1687 phy_interface_t interface) 1688 { 1689 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 1690 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1691 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 1692 return -EINVAL; 1693 1694 if (pl->phydev) 1695 return -EBUSY; 1696 1697 return phy_attach_direct(pl->netdev, phy, 0, interface); 1698 } 1699 1700 /** 1701 * phylink_connect_phy() - connect a PHY to the phylink instance 1702 * @pl: a pointer to a &struct phylink returned from phylink_create() 1703 * @phy: a pointer to a &struct phy_device. 1704 * 1705 * Connect @phy to the phylink instance specified by @pl by calling 1706 * phy_attach_direct(). Configure the @phy according to the MAC driver's 1707 * capabilities, start the PHYLIB state machine and enable any interrupts 1708 * that the PHY supports. 1709 * 1710 * This updates the phylink's ethtool supported and advertising link mode 1711 * masks. 1712 * 1713 * Returns 0 on success or a negative errno. 1714 */ 1715 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 1716 { 1717 int ret; 1718 1719 /* Use PHY device/driver interface */ 1720 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1721 pl->link_interface = phy->interface; 1722 pl->link_config.interface = pl->link_interface; 1723 } 1724 1725 ret = phylink_attach_phy(pl, phy, pl->link_interface); 1726 if (ret < 0) 1727 return ret; 1728 1729 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 1730 if (ret) 1731 phy_detach(phy); 1732 1733 return ret; 1734 } 1735 EXPORT_SYMBOL_GPL(phylink_connect_phy); 1736 1737 /** 1738 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 1739 * @pl: a pointer to a &struct phylink returned from phylink_create() 1740 * @dn: a pointer to a &struct device_node. 1741 * @flags: PHY-specific flags to communicate to the PHY device driver 1742 * 1743 * Connect the phy specified in the device node @dn to the phylink instance 1744 * specified by @pl. Actions specified in phylink_connect_phy() will be 1745 * performed. 1746 * 1747 * Returns 0 on success or a negative errno. 1748 */ 1749 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 1750 u32 flags) 1751 { 1752 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 1753 } 1754 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 1755 1756 /** 1757 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 1758 * @pl: a pointer to a &struct phylink returned from phylink_create() 1759 * @fwnode: a pointer to a &struct fwnode_handle. 1760 * @flags: PHY-specific flags to communicate to the PHY device driver 1761 * 1762 * Connect the phy specified @fwnode to the phylink instance specified 1763 * by @pl. 1764 * 1765 * Returns 0 on success or a negative errno. 1766 */ 1767 int phylink_fwnode_phy_connect(struct phylink *pl, 1768 struct fwnode_handle *fwnode, 1769 u32 flags) 1770 { 1771 struct fwnode_handle *phy_fwnode; 1772 struct phy_device *phy_dev; 1773 int ret; 1774 1775 /* Fixed links and 802.3z are handled without needing a PHY */ 1776 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1777 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1778 phy_interface_mode_is_8023z(pl->link_interface))) 1779 return 0; 1780 1781 phy_fwnode = fwnode_get_phy_node(fwnode); 1782 if (IS_ERR(phy_fwnode)) { 1783 if (pl->cfg_link_an_mode == MLO_AN_PHY) 1784 return -ENODEV; 1785 return 0; 1786 } 1787 1788 phy_dev = fwnode_phy_find_device(phy_fwnode); 1789 /* We're done with the phy_node handle */ 1790 fwnode_handle_put(phy_fwnode); 1791 if (!phy_dev) 1792 return -ENODEV; 1793 1794 /* Use PHY device/driver interface */ 1795 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1796 pl->link_interface = phy_dev->interface; 1797 pl->link_config.interface = pl->link_interface; 1798 } 1799 1800 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 1801 pl->link_interface); 1802 if (ret) { 1803 phy_device_free(phy_dev); 1804 return ret; 1805 } 1806 1807 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 1808 if (ret) 1809 phy_detach(phy_dev); 1810 1811 return ret; 1812 } 1813 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 1814 1815 /** 1816 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 1817 * instance. 1818 * @pl: a pointer to a &struct phylink returned from phylink_create() 1819 * 1820 * Disconnect any current PHY from the phylink instance described by @pl. 1821 */ 1822 void phylink_disconnect_phy(struct phylink *pl) 1823 { 1824 struct phy_device *phy; 1825 1826 ASSERT_RTNL(); 1827 1828 phy = pl->phydev; 1829 if (phy) { 1830 mutex_lock(&phy->lock); 1831 mutex_lock(&pl->state_mutex); 1832 pl->phydev = NULL; 1833 mutex_unlock(&pl->state_mutex); 1834 mutex_unlock(&phy->lock); 1835 flush_work(&pl->resolve); 1836 1837 phy_disconnect(phy); 1838 } 1839 } 1840 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 1841 1842 /** 1843 * phylink_mac_change() - notify phylink of a change in MAC state 1844 * @pl: a pointer to a &struct phylink returned from phylink_create() 1845 * @up: indicates whether the link is currently up. 1846 * 1847 * The MAC driver should call this driver when the state of its link 1848 * changes (eg, link failure, new negotiation results, etc.) 1849 */ 1850 void phylink_mac_change(struct phylink *pl, bool up) 1851 { 1852 if (!up) 1853 pl->mac_link_dropped = true; 1854 phylink_run_resolve(pl); 1855 phylink_dbg(pl, "mac link %s\n", up ? "up" : "down"); 1856 } 1857 EXPORT_SYMBOL_GPL(phylink_mac_change); 1858 1859 static irqreturn_t phylink_link_handler(int irq, void *data) 1860 { 1861 struct phylink *pl = data; 1862 1863 phylink_run_resolve(pl); 1864 1865 return IRQ_HANDLED; 1866 } 1867 1868 /** 1869 * phylink_start() - start a phylink instance 1870 * @pl: a pointer to a &struct phylink returned from phylink_create() 1871 * 1872 * Start the phylink instance specified by @pl, configuring the MAC for the 1873 * desired link mode(s) and negotiation style. This should be called from the 1874 * network device driver's &struct net_device_ops ndo_open() method. 1875 */ 1876 void phylink_start(struct phylink *pl) 1877 { 1878 bool poll = false; 1879 1880 ASSERT_RTNL(); 1881 1882 phylink_info(pl, "configuring for %s/%s link mode\n", 1883 phylink_an_mode_str(pl->cur_link_an_mode), 1884 phy_modes(pl->link_config.interface)); 1885 1886 /* Always set the carrier off */ 1887 if (pl->netdev) 1888 netif_carrier_off(pl->netdev); 1889 1890 /* Apply the link configuration to the MAC when starting. This allows 1891 * a fixed-link to start with the correct parameters, and also 1892 * ensures that we set the appropriate advertisement for Serdes links. 1893 * 1894 * Restart autonegotiation if using 802.3z to ensure that the link 1895 * parameters are properly negotiated. This is necessary for DSA 1896 * switches using 802.3z negotiation to ensure they see our modes. 1897 */ 1898 phylink_mac_initial_config(pl, true); 1899 1900 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 1901 1902 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 1903 int irq = gpiod_to_irq(pl->link_gpio); 1904 1905 if (irq > 0) { 1906 if (!request_irq(irq, phylink_link_handler, 1907 IRQF_TRIGGER_RISING | 1908 IRQF_TRIGGER_FALLING, 1909 "netdev link", pl)) 1910 pl->link_irq = irq; 1911 else 1912 irq = 0; 1913 } 1914 if (irq <= 0) 1915 poll = true; 1916 } 1917 1918 switch (pl->cfg_link_an_mode) { 1919 case MLO_AN_FIXED: 1920 poll |= pl->config->poll_fixed_state; 1921 break; 1922 case MLO_AN_INBAND: 1923 if (pl->pcs) 1924 poll |= pl->pcs->poll; 1925 break; 1926 } 1927 if (poll) 1928 mod_timer(&pl->link_poll, jiffies + HZ); 1929 if (pl->phydev) 1930 phy_start(pl->phydev); 1931 if (pl->sfp_bus) 1932 sfp_upstream_start(pl->sfp_bus); 1933 } 1934 EXPORT_SYMBOL_GPL(phylink_start); 1935 1936 /** 1937 * phylink_stop() - stop a phylink instance 1938 * @pl: a pointer to a &struct phylink returned from phylink_create() 1939 * 1940 * Stop the phylink instance specified by @pl. This should be called from the 1941 * network device driver's &struct net_device_ops ndo_stop() method. The 1942 * network device's carrier state should not be changed prior to calling this 1943 * function. 1944 * 1945 * This will synchronously bring down the link if the link is not already 1946 * down (in other words, it will trigger a mac_link_down() method call.) 1947 */ 1948 void phylink_stop(struct phylink *pl) 1949 { 1950 ASSERT_RTNL(); 1951 1952 if (pl->sfp_bus) 1953 sfp_upstream_stop(pl->sfp_bus); 1954 if (pl->phydev) 1955 phy_stop(pl->phydev); 1956 del_timer_sync(&pl->link_poll); 1957 if (pl->link_irq) { 1958 free_irq(pl->link_irq, pl); 1959 pl->link_irq = 0; 1960 } 1961 1962 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 1963 } 1964 EXPORT_SYMBOL_GPL(phylink_stop); 1965 1966 /** 1967 * phylink_suspend() - handle a network device suspend event 1968 * @pl: a pointer to a &struct phylink returned from phylink_create() 1969 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 1970 * 1971 * Handle a network device suspend event. There are several cases: 1972 * 1973 * - If Wake-on-Lan is not active, we can bring down the link between 1974 * the MAC and PHY by calling phylink_stop(). 1975 * - If Wake-on-Lan is active, and being handled only by the PHY, we 1976 * can also bring down the link between the MAC and PHY. 1977 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 1978 * still needs to receive packets, so we can not bring the link down. 1979 */ 1980 void phylink_suspend(struct phylink *pl, bool mac_wol) 1981 { 1982 ASSERT_RTNL(); 1983 1984 if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) { 1985 /* Wake-on-Lan enabled, MAC handling */ 1986 mutex_lock(&pl->state_mutex); 1987 1988 /* Stop the resolver bringing the link up */ 1989 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 1990 1991 /* Disable the carrier, to prevent transmit timeouts, 1992 * but one would hope all packets have been sent. This 1993 * also means phylink_resolve() will do nothing. 1994 */ 1995 if (pl->netdev) 1996 netif_carrier_off(pl->netdev); 1997 else 1998 pl->old_link_state = false; 1999 2000 /* We do not call mac_link_down() here as we want the 2001 * link to remain up to receive the WoL packets. 2002 */ 2003 mutex_unlock(&pl->state_mutex); 2004 } else { 2005 phylink_stop(pl); 2006 } 2007 } 2008 EXPORT_SYMBOL_GPL(phylink_suspend); 2009 2010 /** 2011 * phylink_resume() - handle a network device resume event 2012 * @pl: a pointer to a &struct phylink returned from phylink_create() 2013 * 2014 * Undo the effects of phylink_suspend(), returning the link to an 2015 * operational state. 2016 */ 2017 void phylink_resume(struct phylink *pl) 2018 { 2019 ASSERT_RTNL(); 2020 2021 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2022 /* Wake-on-Lan enabled, MAC handling */ 2023 2024 /* Call mac_link_down() so we keep the overall state balanced. 2025 * Do this under the state_mutex lock for consistency. This 2026 * will cause a "Link Down" message to be printed during 2027 * resume, which is harmless - the true link state will be 2028 * printed when we run a resolve. 2029 */ 2030 mutex_lock(&pl->state_mutex); 2031 phylink_link_down(pl); 2032 mutex_unlock(&pl->state_mutex); 2033 2034 /* Re-apply the link parameters so that all the settings get 2035 * restored to the MAC. 2036 */ 2037 phylink_mac_initial_config(pl, true); 2038 2039 /* Re-enable and re-resolve the link parameters */ 2040 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2041 } else { 2042 phylink_start(pl); 2043 } 2044 } 2045 EXPORT_SYMBOL_GPL(phylink_resume); 2046 2047 /** 2048 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2049 * @pl: a pointer to a &struct phylink returned from phylink_create() 2050 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2051 * 2052 * Read the wake on lan parameters from the PHY attached to the phylink 2053 * instance specified by @pl. If no PHY is currently attached, report no 2054 * support for wake on lan. 2055 */ 2056 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2057 { 2058 ASSERT_RTNL(); 2059 2060 wol->supported = 0; 2061 wol->wolopts = 0; 2062 2063 if (pl->phydev) 2064 phy_ethtool_get_wol(pl->phydev, wol); 2065 } 2066 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2067 2068 /** 2069 * phylink_ethtool_set_wol() - set wake on lan parameters 2070 * @pl: a pointer to a &struct phylink returned from phylink_create() 2071 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2072 * 2073 * Set the wake on lan parameters for the PHY attached to the phylink 2074 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2075 * error. 2076 * 2077 * Returns zero on success or negative errno code. 2078 */ 2079 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2080 { 2081 int ret = -EOPNOTSUPP; 2082 2083 ASSERT_RTNL(); 2084 2085 if (pl->phydev) 2086 ret = phy_ethtool_set_wol(pl->phydev, wol); 2087 2088 return ret; 2089 } 2090 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2091 2092 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2093 { 2094 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2095 2096 linkmode_zero(mask); 2097 phylink_set_port_modes(mask); 2098 2099 linkmode_and(dst, dst, mask); 2100 linkmode_or(dst, dst, b); 2101 } 2102 2103 static void phylink_get_ksettings(const struct phylink_link_state *state, 2104 struct ethtool_link_ksettings *kset) 2105 { 2106 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2107 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2108 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2109 kset->base.speed = state->speed; 2110 kset->base.duplex = state->duplex; 2111 } 2112 kset->base.autoneg = state->an_enabled ? AUTONEG_ENABLE : 2113 AUTONEG_DISABLE; 2114 } 2115 2116 /** 2117 * phylink_ethtool_ksettings_get() - get the current link settings 2118 * @pl: a pointer to a &struct phylink returned from phylink_create() 2119 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2120 * 2121 * Read the current link settings for the phylink instance specified by @pl. 2122 * This will be the link settings read from the MAC, PHY or fixed link 2123 * settings depending on the current negotiation mode. 2124 */ 2125 int phylink_ethtool_ksettings_get(struct phylink *pl, 2126 struct ethtool_link_ksettings *kset) 2127 { 2128 struct phylink_link_state link_state; 2129 2130 ASSERT_RTNL(); 2131 2132 if (pl->phydev) 2133 phy_ethtool_ksettings_get(pl->phydev, kset); 2134 else 2135 kset->base.port = pl->link_port; 2136 2137 linkmode_copy(kset->link_modes.supported, pl->supported); 2138 2139 switch (pl->cur_link_an_mode) { 2140 case MLO_AN_FIXED: 2141 /* We are using fixed settings. Report these as the 2142 * current link settings - and note that these also 2143 * represent the supported speeds/duplex/pause modes. 2144 */ 2145 phylink_get_fixed_state(pl, &link_state); 2146 phylink_get_ksettings(&link_state, kset); 2147 break; 2148 2149 case MLO_AN_INBAND: 2150 /* If there is a phy attached, then use the reported 2151 * settings from the phy with no modification. 2152 */ 2153 if (pl->phydev) 2154 break; 2155 2156 phylink_mac_pcs_get_state(pl, &link_state); 2157 2158 /* The MAC is reporting the link results from its own PCS 2159 * layer via in-band status. Report these as the current 2160 * link settings. 2161 */ 2162 phylink_get_ksettings(&link_state, kset); 2163 break; 2164 } 2165 2166 return 0; 2167 } 2168 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2169 2170 /** 2171 * phylink_ethtool_ksettings_set() - set the link settings 2172 * @pl: a pointer to a &struct phylink returned from phylink_create() 2173 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2174 */ 2175 int phylink_ethtool_ksettings_set(struct phylink *pl, 2176 const struct ethtool_link_ksettings *kset) 2177 { 2178 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2179 struct phylink_link_state config; 2180 const struct phy_setting *s; 2181 2182 ASSERT_RTNL(); 2183 2184 if (pl->phydev) { 2185 /* We can rely on phylib for this update; we also do not need 2186 * to update the pl->link_config settings: 2187 * - the configuration returned via ksettings_get() will come 2188 * from phylib whenever a PHY is present. 2189 * - link_config.interface will be updated by the PHY calling 2190 * back via phylink_phy_change() and a subsequent resolve. 2191 * - initial link configuration for PHY mode comes from the 2192 * last phy state updated via phylink_phy_change(). 2193 * - other configuration changes (e.g. pause modes) are 2194 * performed directly via phylib. 2195 * - if in in-band mode with a PHY, the link configuration 2196 * is passed on the link from the PHY, and all of 2197 * link_config.{speed,duplex,an_enabled,pause} are not used. 2198 * - the only possible use would be link_config.advertising 2199 * pause modes when in 1000base-X mode with a PHY, but in 2200 * the presence of a PHY, this should not be changed as that 2201 * should be determined from the media side advertisement. 2202 */ 2203 return phy_ethtool_ksettings_set(pl->phydev, kset); 2204 } 2205 2206 config = pl->link_config; 2207 2208 /* Mask out unsupported advertisements */ 2209 linkmode_and(config.advertising, kset->link_modes.advertising, 2210 pl->supported); 2211 2212 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 2213 switch (kset->base.autoneg) { 2214 case AUTONEG_DISABLE: 2215 /* Autonegotiation disabled, select a suitable speed and 2216 * duplex. 2217 */ 2218 s = phy_lookup_setting(kset->base.speed, kset->base.duplex, 2219 pl->supported, false); 2220 if (!s) 2221 return -EINVAL; 2222 2223 /* If we have a fixed link, refuse to change link parameters. 2224 * If the link parameters match, accept them but do nothing. 2225 */ 2226 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2227 if (s->speed != pl->link_config.speed || 2228 s->duplex != pl->link_config.duplex) 2229 return -EINVAL; 2230 return 0; 2231 } 2232 2233 config.speed = s->speed; 2234 config.duplex = s->duplex; 2235 break; 2236 2237 case AUTONEG_ENABLE: 2238 /* If we have a fixed link, allow autonegotiation (since that 2239 * is our default case) but do not allow the advertisement to 2240 * be changed. If the advertisement matches, simply return. 2241 */ 2242 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2243 if (!linkmode_equal(config.advertising, 2244 pl->link_config.advertising)) 2245 return -EINVAL; 2246 return 0; 2247 } 2248 2249 config.speed = SPEED_UNKNOWN; 2250 config.duplex = DUPLEX_UNKNOWN; 2251 break; 2252 2253 default: 2254 return -EINVAL; 2255 } 2256 2257 /* We have ruled out the case with a PHY attached, and the 2258 * fixed-link cases. All that is left are in-band links. 2259 */ 2260 config.an_enabled = kset->base.autoneg == AUTONEG_ENABLE; 2261 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2262 config.an_enabled); 2263 2264 /* If this link is with an SFP, ensure that changes to advertised modes 2265 * also cause the associated interface to be selected such that the 2266 * link can be configured correctly. 2267 */ 2268 if (pl->sfp_bus) { 2269 config.interface = sfp_select_interface(pl->sfp_bus, 2270 config.advertising); 2271 if (config.interface == PHY_INTERFACE_MODE_NA) { 2272 phylink_err(pl, 2273 "selection of interface failed, advertisement %*pb\n", 2274 __ETHTOOL_LINK_MODE_MASK_NBITS, 2275 config.advertising); 2276 return -EINVAL; 2277 } 2278 2279 /* Revalidate with the selected interface */ 2280 linkmode_copy(support, pl->supported); 2281 if (phylink_validate(pl, support, &config)) { 2282 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2283 phylink_an_mode_str(pl->cur_link_an_mode), 2284 phy_modes(config.interface), 2285 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2286 return -EINVAL; 2287 } 2288 } else { 2289 /* Validate without changing the current supported mask. */ 2290 linkmode_copy(support, pl->supported); 2291 if (phylink_validate(pl, support, &config)) 2292 return -EINVAL; 2293 } 2294 2295 /* If autonegotiation is enabled, we must have an advertisement */ 2296 if (config.an_enabled && phylink_is_empty_linkmode(config.advertising)) 2297 return -EINVAL; 2298 2299 mutex_lock(&pl->state_mutex); 2300 pl->link_config.speed = config.speed; 2301 pl->link_config.duplex = config.duplex; 2302 pl->link_config.an_enabled = config.an_enabled; 2303 2304 if (pl->link_config.interface != config.interface) { 2305 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2306 /* We need to force the link down, then change the interface */ 2307 if (pl->old_link_state) { 2308 phylink_link_down(pl); 2309 pl->old_link_state = false; 2310 } 2311 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2312 &pl->phylink_disable_state)) 2313 phylink_major_config(pl, false, &config); 2314 pl->link_config.interface = config.interface; 2315 linkmode_copy(pl->link_config.advertising, config.advertising); 2316 } else if (!linkmode_equal(pl->link_config.advertising, 2317 config.advertising)) { 2318 linkmode_copy(pl->link_config.advertising, config.advertising); 2319 phylink_change_inband_advert(pl); 2320 } 2321 mutex_unlock(&pl->state_mutex); 2322 2323 return 0; 2324 } 2325 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 2326 2327 /** 2328 * phylink_ethtool_nway_reset() - restart negotiation 2329 * @pl: a pointer to a &struct phylink returned from phylink_create() 2330 * 2331 * Restart negotiation for the phylink instance specified by @pl. This will 2332 * cause any attached phy to restart negotiation with the link partner, and 2333 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 2334 * negotiation. 2335 * 2336 * Returns zero on success, or negative error code. 2337 */ 2338 int phylink_ethtool_nway_reset(struct phylink *pl) 2339 { 2340 int ret = 0; 2341 2342 ASSERT_RTNL(); 2343 2344 if (pl->phydev) 2345 ret = phy_restart_aneg(pl->phydev); 2346 phylink_mac_pcs_an_restart(pl); 2347 2348 return ret; 2349 } 2350 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 2351 2352 /** 2353 * phylink_ethtool_get_pauseparam() - get the current pause parameters 2354 * @pl: a pointer to a &struct phylink returned from phylink_create() 2355 * @pause: a pointer to a &struct ethtool_pauseparam 2356 */ 2357 void phylink_ethtool_get_pauseparam(struct phylink *pl, 2358 struct ethtool_pauseparam *pause) 2359 { 2360 ASSERT_RTNL(); 2361 2362 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 2363 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 2364 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 2365 } 2366 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 2367 2368 /** 2369 * phylink_ethtool_set_pauseparam() - set the current pause parameters 2370 * @pl: a pointer to a &struct phylink returned from phylink_create() 2371 * @pause: a pointer to a &struct ethtool_pauseparam 2372 */ 2373 int phylink_ethtool_set_pauseparam(struct phylink *pl, 2374 struct ethtool_pauseparam *pause) 2375 { 2376 struct phylink_link_state *config = &pl->link_config; 2377 bool manual_changed; 2378 int pause_state; 2379 2380 ASSERT_RTNL(); 2381 2382 if (pl->cur_link_an_mode == MLO_AN_FIXED) 2383 return -EOPNOTSUPP; 2384 2385 if (!phylink_test(pl->supported, Pause) && 2386 !phylink_test(pl->supported, Asym_Pause)) 2387 return -EOPNOTSUPP; 2388 2389 if (!phylink_test(pl->supported, Asym_Pause) && 2390 pause->rx_pause != pause->tx_pause) 2391 return -EINVAL; 2392 2393 pause_state = 0; 2394 if (pause->autoneg) 2395 pause_state |= MLO_PAUSE_AN; 2396 if (pause->rx_pause) 2397 pause_state |= MLO_PAUSE_RX; 2398 if (pause->tx_pause) 2399 pause_state |= MLO_PAUSE_TX; 2400 2401 mutex_lock(&pl->state_mutex); 2402 /* 2403 * See the comments for linkmode_set_pause(), wrt the deficiencies 2404 * with the current implementation. A solution to this issue would 2405 * be: 2406 * ethtool Local device 2407 * rx tx Pause AsymDir 2408 * 0 0 0 0 2409 * 1 0 1 1 2410 * 0 1 0 1 2411 * 1 1 1 1 2412 * and then use the ethtool rx/tx enablement status to mask the 2413 * rx/tx pause resolution. 2414 */ 2415 linkmode_set_pause(config->advertising, pause->tx_pause, 2416 pause->rx_pause); 2417 2418 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 2419 (!(pause_state & MLO_PAUSE_AN) && 2420 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 2421 2422 config->pause = pause_state; 2423 2424 /* Update our in-band advertisement, triggering a renegotiation if 2425 * the advertisement changed. 2426 */ 2427 if (!pl->phydev) 2428 phylink_change_inband_advert(pl); 2429 2430 mutex_unlock(&pl->state_mutex); 2431 2432 /* If we have a PHY, a change of the pause frame advertisement will 2433 * cause phylib to renegotiate (if AN is enabled) which will in turn 2434 * call our phylink_phy_change() and trigger a resolve. Note that 2435 * we can't hold our state mutex while calling phy_set_asym_pause(). 2436 */ 2437 if (pl->phydev) 2438 phy_set_asym_pause(pl->phydev, pause->rx_pause, 2439 pause->tx_pause); 2440 2441 /* If the manual pause settings changed, make sure we trigger a 2442 * resolve to update their state; we can not guarantee that the 2443 * link will cycle. 2444 */ 2445 if (manual_changed) { 2446 pl->mac_link_dropped = true; 2447 phylink_run_resolve(pl); 2448 } 2449 2450 return 0; 2451 } 2452 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 2453 2454 /** 2455 * phylink_get_eee_err() - read the energy efficient ethernet error 2456 * counter 2457 * @pl: a pointer to a &struct phylink returned from phylink_create(). 2458 * 2459 * Read the Energy Efficient Ethernet error counter from the PHY associated 2460 * with the phylink instance specified by @pl. 2461 * 2462 * Returns positive error counter value, or negative error code. 2463 */ 2464 int phylink_get_eee_err(struct phylink *pl) 2465 { 2466 int ret = 0; 2467 2468 ASSERT_RTNL(); 2469 2470 if (pl->phydev) 2471 ret = phy_get_eee_err(pl->phydev); 2472 2473 return ret; 2474 } 2475 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 2476 2477 /** 2478 * phylink_init_eee() - init and check the EEE features 2479 * @pl: a pointer to a &struct phylink returned from phylink_create() 2480 * @clk_stop_enable: allow PHY to stop receive clock 2481 * 2482 * Must be called either with RTNL held or within mac_link_up() 2483 */ 2484 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) 2485 { 2486 int ret = -EOPNOTSUPP; 2487 2488 if (pl->phydev) 2489 ret = phy_init_eee(pl->phydev, clk_stop_enable); 2490 2491 return ret; 2492 } 2493 EXPORT_SYMBOL_GPL(phylink_init_eee); 2494 2495 /** 2496 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 2497 * @pl: a pointer to a &struct phylink returned from phylink_create() 2498 * @eee: a pointer to a &struct ethtool_eee for the read parameters 2499 */ 2500 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee) 2501 { 2502 int ret = -EOPNOTSUPP; 2503 2504 ASSERT_RTNL(); 2505 2506 if (pl->phydev) 2507 ret = phy_ethtool_get_eee(pl->phydev, eee); 2508 2509 return ret; 2510 } 2511 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 2512 2513 /** 2514 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 2515 * @pl: a pointer to a &struct phylink returned from phylink_create() 2516 * @eee: a pointer to a &struct ethtool_eee for the desired parameters 2517 */ 2518 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee) 2519 { 2520 int ret = -EOPNOTSUPP; 2521 2522 ASSERT_RTNL(); 2523 2524 if (pl->phydev) 2525 ret = phy_ethtool_set_eee(pl->phydev, eee); 2526 2527 return ret; 2528 } 2529 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 2530 2531 /* This emulates MII registers for a fixed-mode phy operating as per the 2532 * passed in state. "aneg" defines if we report negotiation is possible. 2533 * 2534 * FIXME: should deal with negotiation state too. 2535 */ 2536 static int phylink_mii_emul_read(unsigned int reg, 2537 struct phylink_link_state *state) 2538 { 2539 struct fixed_phy_status fs; 2540 unsigned long *lpa = state->lp_advertising; 2541 int val; 2542 2543 fs.link = state->link; 2544 fs.speed = state->speed; 2545 fs.duplex = state->duplex; 2546 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 2547 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 2548 2549 val = swphy_read_reg(reg, &fs); 2550 if (reg == MII_BMSR) { 2551 if (!state->an_complete) 2552 val &= ~BMSR_ANEGCOMPLETE; 2553 } 2554 return val; 2555 } 2556 2557 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 2558 unsigned int reg) 2559 { 2560 struct phy_device *phydev = pl->phydev; 2561 int prtad, devad; 2562 2563 if (mdio_phy_id_is_c45(phy_id)) { 2564 prtad = mdio_phy_id_prtad(phy_id); 2565 devad = mdio_phy_id_devad(phy_id); 2566 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2567 reg); 2568 } 2569 2570 if (phydev->is_c45) { 2571 switch (reg) { 2572 case MII_BMCR: 2573 case MII_BMSR: 2574 case MII_PHYSID1: 2575 case MII_PHYSID2: 2576 devad = __ffs(phydev->c45_ids.mmds_present); 2577 break; 2578 case MII_ADVERTISE: 2579 case MII_LPA: 2580 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2581 return -EINVAL; 2582 devad = MDIO_MMD_AN; 2583 if (reg == MII_ADVERTISE) 2584 reg = MDIO_AN_ADVERTISE; 2585 else 2586 reg = MDIO_AN_LPA; 2587 break; 2588 default: 2589 return -EINVAL; 2590 } 2591 prtad = phy_id; 2592 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2593 reg); 2594 } 2595 2596 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 2597 } 2598 2599 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 2600 unsigned int reg, unsigned int val) 2601 { 2602 struct phy_device *phydev = pl->phydev; 2603 int prtad, devad; 2604 2605 if (mdio_phy_id_is_c45(phy_id)) { 2606 prtad = mdio_phy_id_prtad(phy_id); 2607 devad = mdio_phy_id_devad(phy_id); 2608 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 2609 reg, val); 2610 } 2611 2612 if (phydev->is_c45) { 2613 switch (reg) { 2614 case MII_BMCR: 2615 case MII_BMSR: 2616 case MII_PHYSID1: 2617 case MII_PHYSID2: 2618 devad = __ffs(phydev->c45_ids.mmds_present); 2619 break; 2620 case MII_ADVERTISE: 2621 case MII_LPA: 2622 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2623 return -EINVAL; 2624 devad = MDIO_MMD_AN; 2625 if (reg == MII_ADVERTISE) 2626 reg = MDIO_AN_ADVERTISE; 2627 else 2628 reg = MDIO_AN_LPA; 2629 break; 2630 default: 2631 return -EINVAL; 2632 } 2633 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 2634 reg, val); 2635 } 2636 2637 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 2638 } 2639 2640 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 2641 unsigned int reg) 2642 { 2643 struct phylink_link_state state; 2644 int val = 0xffff; 2645 2646 switch (pl->cur_link_an_mode) { 2647 case MLO_AN_FIXED: 2648 if (phy_id == 0) { 2649 phylink_get_fixed_state(pl, &state); 2650 val = phylink_mii_emul_read(reg, &state); 2651 } 2652 break; 2653 2654 case MLO_AN_PHY: 2655 return -EOPNOTSUPP; 2656 2657 case MLO_AN_INBAND: 2658 if (phy_id == 0) { 2659 phylink_mac_pcs_get_state(pl, &state); 2660 val = phylink_mii_emul_read(reg, &state); 2661 } 2662 break; 2663 } 2664 2665 return val & 0xffff; 2666 } 2667 2668 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 2669 unsigned int reg, unsigned int val) 2670 { 2671 switch (pl->cur_link_an_mode) { 2672 case MLO_AN_FIXED: 2673 break; 2674 2675 case MLO_AN_PHY: 2676 return -EOPNOTSUPP; 2677 2678 case MLO_AN_INBAND: 2679 break; 2680 } 2681 2682 return 0; 2683 } 2684 2685 /** 2686 * phylink_mii_ioctl() - generic mii ioctl interface 2687 * @pl: a pointer to a &struct phylink returned from phylink_create() 2688 * @ifr: a pointer to a &struct ifreq for socket ioctls 2689 * @cmd: ioctl cmd to execute 2690 * 2691 * Perform the specified MII ioctl on the PHY attached to the phylink instance 2692 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 2693 * 2694 * Returns: zero on success or negative error code. 2695 * 2696 * %SIOCGMIIPHY: 2697 * read register from the current PHY. 2698 * %SIOCGMIIREG: 2699 * read register from the specified PHY. 2700 * %SIOCSMIIREG: 2701 * set a register on the specified PHY. 2702 */ 2703 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 2704 { 2705 struct mii_ioctl_data *mii = if_mii(ifr); 2706 int ret; 2707 2708 ASSERT_RTNL(); 2709 2710 if (pl->phydev) { 2711 /* PHYs only exist for MLO_AN_PHY and SGMII */ 2712 switch (cmd) { 2713 case SIOCGMIIPHY: 2714 mii->phy_id = pl->phydev->mdio.addr; 2715 fallthrough; 2716 2717 case SIOCGMIIREG: 2718 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 2719 if (ret >= 0) { 2720 mii->val_out = ret; 2721 ret = 0; 2722 } 2723 break; 2724 2725 case SIOCSMIIREG: 2726 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 2727 mii->val_in); 2728 break; 2729 2730 default: 2731 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 2732 break; 2733 } 2734 } else { 2735 switch (cmd) { 2736 case SIOCGMIIPHY: 2737 mii->phy_id = 0; 2738 fallthrough; 2739 2740 case SIOCGMIIREG: 2741 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 2742 if (ret >= 0) { 2743 mii->val_out = ret; 2744 ret = 0; 2745 } 2746 break; 2747 2748 case SIOCSMIIREG: 2749 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 2750 mii->val_in); 2751 break; 2752 2753 default: 2754 ret = -EOPNOTSUPP; 2755 break; 2756 } 2757 } 2758 2759 return ret; 2760 } 2761 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 2762 2763 /** 2764 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 2765 * link partners 2766 * @pl: a pointer to a &struct phylink returned from phylink_create() 2767 * @sync: perform action synchronously 2768 * 2769 * If we have a PHY that is not part of a SFP module, then set the speed 2770 * as described in the phy_speed_down() function. Please see this function 2771 * for a description of the @sync parameter. 2772 * 2773 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 2774 */ 2775 int phylink_speed_down(struct phylink *pl, bool sync) 2776 { 2777 int ret = 0; 2778 2779 ASSERT_RTNL(); 2780 2781 if (!pl->sfp_bus && pl->phydev) 2782 ret = phy_speed_down(pl->phydev, sync); 2783 2784 return ret; 2785 } 2786 EXPORT_SYMBOL_GPL(phylink_speed_down); 2787 2788 /** 2789 * phylink_speed_up() - restore the advertised speeds prior to the call to 2790 * phylink_speed_down() 2791 * @pl: a pointer to a &struct phylink returned from phylink_create() 2792 * 2793 * If we have a PHY that is not part of a SFP module, then restore the 2794 * PHY speeds as per phy_speed_up(). 2795 * 2796 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 2797 */ 2798 int phylink_speed_up(struct phylink *pl) 2799 { 2800 int ret = 0; 2801 2802 ASSERT_RTNL(); 2803 2804 if (!pl->sfp_bus && pl->phydev) 2805 ret = phy_speed_up(pl->phydev); 2806 2807 return ret; 2808 } 2809 EXPORT_SYMBOL_GPL(phylink_speed_up); 2810 2811 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 2812 { 2813 struct phylink *pl = upstream; 2814 2815 pl->netdev->sfp_bus = bus; 2816 } 2817 2818 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 2819 { 2820 struct phylink *pl = upstream; 2821 2822 pl->netdev->sfp_bus = NULL; 2823 } 2824 2825 static const phy_interface_t phylink_sfp_interface_preference[] = { 2826 PHY_INTERFACE_MODE_25GBASER, 2827 PHY_INTERFACE_MODE_USXGMII, 2828 PHY_INTERFACE_MODE_10GBASER, 2829 PHY_INTERFACE_MODE_5GBASER, 2830 PHY_INTERFACE_MODE_2500BASEX, 2831 PHY_INTERFACE_MODE_SGMII, 2832 PHY_INTERFACE_MODE_1000BASEX, 2833 PHY_INTERFACE_MODE_100BASEX, 2834 }; 2835 2836 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 2837 2838 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 2839 const unsigned long *intf) 2840 { 2841 phy_interface_t interface; 2842 size_t i; 2843 2844 interface = PHY_INTERFACE_MODE_NA; 2845 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 2846 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 2847 interface = phylink_sfp_interface_preference[i]; 2848 break; 2849 } 2850 2851 return interface; 2852 } 2853 2854 static void phylink_sfp_set_config(struct phylink *pl, u8 mode, 2855 unsigned long *supported, 2856 struct phylink_link_state *state) 2857 { 2858 bool changed = false; 2859 2860 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 2861 phylink_an_mode_str(mode), phy_modes(state->interface), 2862 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 2863 2864 if (!linkmode_equal(pl->supported, supported)) { 2865 linkmode_copy(pl->supported, supported); 2866 changed = true; 2867 } 2868 2869 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 2870 linkmode_copy(pl->link_config.advertising, state->advertising); 2871 changed = true; 2872 } 2873 2874 if (pl->cur_link_an_mode != mode || 2875 pl->link_config.interface != state->interface) { 2876 pl->cur_link_an_mode = mode; 2877 pl->link_config.interface = state->interface; 2878 2879 changed = true; 2880 2881 phylink_info(pl, "switched to %s/%s link mode\n", 2882 phylink_an_mode_str(mode), 2883 phy_modes(state->interface)); 2884 } 2885 2886 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 2887 &pl->phylink_disable_state)) 2888 phylink_mac_initial_config(pl, false); 2889 } 2890 2891 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode, 2892 struct phy_device *phy) 2893 { 2894 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1); 2895 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2896 struct phylink_link_state config; 2897 phy_interface_t iface; 2898 int ret; 2899 2900 linkmode_copy(support, phy->supported); 2901 2902 memset(&config, 0, sizeof(config)); 2903 linkmode_copy(config.advertising, phy->advertising); 2904 config.interface = PHY_INTERFACE_MODE_NA; 2905 config.speed = SPEED_UNKNOWN; 2906 config.duplex = DUPLEX_UNKNOWN; 2907 config.pause = MLO_PAUSE_AN; 2908 config.an_enabled = pl->link_config.an_enabled; 2909 2910 /* Ignore errors if we're expecting a PHY to attach later */ 2911 ret = phylink_validate(pl, support, &config); 2912 if (ret) { 2913 phylink_err(pl, "validation with support %*pb failed: %pe\n", 2914 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 2915 ERR_PTR(ret)); 2916 return ret; 2917 } 2918 2919 iface = sfp_select_interface(pl->sfp_bus, config.advertising); 2920 if (iface == PHY_INTERFACE_MODE_NA) { 2921 phylink_err(pl, 2922 "selection of interface failed, advertisement %*pb\n", 2923 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising); 2924 return -EINVAL; 2925 } 2926 2927 config.interface = iface; 2928 linkmode_copy(support1, support); 2929 ret = phylink_validate(pl, support1, &config); 2930 if (ret) { 2931 phylink_err(pl, 2932 "validation of %s/%s with support %*pb failed: %pe\n", 2933 phylink_an_mode_str(mode), 2934 phy_modes(config.interface), 2935 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 2936 ERR_PTR(ret)); 2937 return ret; 2938 } 2939 2940 pl->link_port = pl->sfp_port; 2941 2942 phylink_sfp_set_config(pl, mode, support, &config); 2943 2944 return 0; 2945 } 2946 2947 static int phylink_sfp_config_optical(struct phylink *pl) 2948 { 2949 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2950 DECLARE_PHY_INTERFACE_MASK(interfaces); 2951 struct phylink_link_state config; 2952 phy_interface_t interface; 2953 int ret; 2954 2955 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 2956 (int)PHY_INTERFACE_MODE_MAX, 2957 pl->config->supported_interfaces, 2958 (int)PHY_INTERFACE_MODE_MAX, 2959 pl->sfp_interfaces); 2960 2961 /* Find the union of the supported interfaces by the PCS/MAC and 2962 * the SFP module. 2963 */ 2964 phy_interface_and(interfaces, pl->config->supported_interfaces, 2965 pl->sfp_interfaces); 2966 if (phy_interface_empty(interfaces)) { 2967 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 2968 return -EINVAL; 2969 } 2970 2971 memset(&config, 0, sizeof(config)); 2972 linkmode_copy(support, pl->sfp_support); 2973 linkmode_copy(config.advertising, pl->sfp_support); 2974 config.speed = SPEED_UNKNOWN; 2975 config.duplex = DUPLEX_UNKNOWN; 2976 config.pause = MLO_PAUSE_AN; 2977 config.an_enabled = true; 2978 2979 /* For all the interfaces that are supported, reduce the sfp_support 2980 * mask to only those link modes that can be supported. 2981 */ 2982 ret = phylink_validate_mask(pl, pl->sfp_support, &config, interfaces); 2983 if (ret) { 2984 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 2985 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2986 return ret; 2987 } 2988 2989 interface = phylink_choose_sfp_interface(pl, interfaces); 2990 if (interface == PHY_INTERFACE_MODE_NA) { 2991 phylink_err(pl, "failed to select SFP interface\n"); 2992 return -EINVAL; 2993 } 2994 2995 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 2996 phy_modes(interface)); 2997 2998 config.interface = interface; 2999 3000 /* Ignore errors if we're expecting a PHY to attach later */ 3001 ret = phylink_validate(pl, support, &config); 3002 if (ret) { 3003 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3004 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3005 ERR_PTR(ret)); 3006 return ret; 3007 } 3008 3009 pl->link_port = pl->sfp_port; 3010 3011 phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config); 3012 3013 return 0; 3014 } 3015 3016 static int phylink_sfp_module_insert(void *upstream, 3017 const struct sfp_eeprom_id *id) 3018 { 3019 struct phylink *pl = upstream; 3020 3021 ASSERT_RTNL(); 3022 3023 linkmode_zero(pl->sfp_support); 3024 phy_interface_zero(pl->sfp_interfaces); 3025 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces); 3026 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support); 3027 3028 /* If this module may have a PHY connecting later, defer until later */ 3029 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 3030 if (pl->sfp_may_have_phy) 3031 return 0; 3032 3033 return phylink_sfp_config_optical(pl); 3034 } 3035 3036 static int phylink_sfp_module_start(void *upstream) 3037 { 3038 struct phylink *pl = upstream; 3039 3040 /* If this SFP module has a PHY, start the PHY now. */ 3041 if (pl->phydev) { 3042 phy_start(pl->phydev); 3043 return 0; 3044 } 3045 3046 /* If the module may have a PHY but we didn't detect one we 3047 * need to configure the MAC here. 3048 */ 3049 if (!pl->sfp_may_have_phy) 3050 return 0; 3051 3052 return phylink_sfp_config_optical(pl); 3053 } 3054 3055 static void phylink_sfp_module_stop(void *upstream) 3056 { 3057 struct phylink *pl = upstream; 3058 3059 /* If this SFP module has a PHY, stop it. */ 3060 if (pl->phydev) 3061 phy_stop(pl->phydev); 3062 } 3063 3064 static void phylink_sfp_link_down(void *upstream) 3065 { 3066 struct phylink *pl = upstream; 3067 3068 ASSERT_RTNL(); 3069 3070 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3071 } 3072 3073 static void phylink_sfp_link_up(void *upstream) 3074 { 3075 struct phylink *pl = upstream; 3076 3077 ASSERT_RTNL(); 3078 3079 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3080 } 3081 3082 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII 3083 * or 802.3z control word, so inband will not work. 3084 */ 3085 static bool phylink_phy_no_inband(struct phy_device *phy) 3086 { 3087 return phy->is_c45 && 3088 (phy->c45_ids.device_ids[1] & 0xfffffff0) == 0xae025150; 3089 } 3090 3091 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3092 { 3093 struct phylink *pl = upstream; 3094 phy_interface_t interface; 3095 u8 mode; 3096 int ret; 3097 3098 /* 3099 * This is the new way of dealing with flow control for PHYs, 3100 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3101 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3102 * using our validate call to the MAC, we rely upon the MAC 3103 * clearing the bits from both supported and advertising fields. 3104 */ 3105 phy_support_asym_pause(phy); 3106 3107 if (phylink_phy_no_inband(phy)) 3108 mode = MLO_AN_PHY; 3109 else 3110 mode = MLO_AN_INBAND; 3111 3112 /* Set the PHY's host supported interfaces */ 3113 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3114 pl->config->supported_interfaces); 3115 3116 /* Do the initial configuration */ 3117 ret = phylink_sfp_config_phy(pl, mode, phy); 3118 if (ret < 0) 3119 return ret; 3120 3121 interface = pl->link_config.interface; 3122 ret = phylink_attach_phy(pl, phy, interface); 3123 if (ret < 0) 3124 return ret; 3125 3126 ret = phylink_bringup_phy(pl, phy, interface); 3127 if (ret) 3128 phy_detach(phy); 3129 3130 return ret; 3131 } 3132 3133 static void phylink_sfp_disconnect_phy(void *upstream) 3134 { 3135 phylink_disconnect_phy(upstream); 3136 } 3137 3138 static const struct sfp_upstream_ops sfp_phylink_ops = { 3139 .attach = phylink_sfp_attach, 3140 .detach = phylink_sfp_detach, 3141 .module_insert = phylink_sfp_module_insert, 3142 .module_start = phylink_sfp_module_start, 3143 .module_stop = phylink_sfp_module_stop, 3144 .link_up = phylink_sfp_link_up, 3145 .link_down = phylink_sfp_link_down, 3146 .connect_phy = phylink_sfp_connect_phy, 3147 .disconnect_phy = phylink_sfp_disconnect_phy, 3148 }; 3149 3150 /* Helpers for MAC drivers */ 3151 3152 static void phylink_decode_c37_word(struct phylink_link_state *state, 3153 uint16_t config_reg, int speed) 3154 { 3155 bool tx_pause, rx_pause; 3156 int fd_bit; 3157 3158 if (speed == SPEED_2500) 3159 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 3160 else 3161 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 3162 3163 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 3164 3165 if (linkmode_test_bit(fd_bit, state->advertising) && 3166 linkmode_test_bit(fd_bit, state->lp_advertising)) { 3167 state->speed = speed; 3168 state->duplex = DUPLEX_FULL; 3169 } else { 3170 /* negotiation failure */ 3171 state->link = false; 3172 } 3173 3174 linkmode_resolve_pause(state->advertising, state->lp_advertising, 3175 &tx_pause, &rx_pause); 3176 3177 if (tx_pause) 3178 state->pause |= MLO_PAUSE_TX; 3179 if (rx_pause) 3180 state->pause |= MLO_PAUSE_RX; 3181 } 3182 3183 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 3184 uint16_t config_reg) 3185 { 3186 if (!(config_reg & LPA_SGMII_LINK)) { 3187 state->link = false; 3188 return; 3189 } 3190 3191 switch (config_reg & LPA_SGMII_SPD_MASK) { 3192 case LPA_SGMII_10: 3193 state->speed = SPEED_10; 3194 break; 3195 case LPA_SGMII_100: 3196 state->speed = SPEED_100; 3197 break; 3198 case LPA_SGMII_1000: 3199 state->speed = SPEED_1000; 3200 break; 3201 default: 3202 state->link = false; 3203 return; 3204 } 3205 if (config_reg & LPA_SGMII_FULL_DUPLEX) 3206 state->duplex = DUPLEX_FULL; 3207 else 3208 state->duplex = DUPLEX_HALF; 3209 } 3210 3211 /** 3212 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3213 * @state: a pointer to a struct phylink_link_state. 3214 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3215 * 3216 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3217 * code word. Decode the USXGMII code word and populate the corresponding fields 3218 * (speed, duplex) into the phylink_link_state structure. 3219 */ 3220 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 3221 uint16_t lpa) 3222 { 3223 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3224 case MDIO_USXGMII_10: 3225 state->speed = SPEED_10; 3226 break; 3227 case MDIO_USXGMII_100: 3228 state->speed = SPEED_100; 3229 break; 3230 case MDIO_USXGMII_1000: 3231 state->speed = SPEED_1000; 3232 break; 3233 case MDIO_USXGMII_2500: 3234 state->speed = SPEED_2500; 3235 break; 3236 case MDIO_USXGMII_5000: 3237 state->speed = SPEED_5000; 3238 break; 3239 case MDIO_USXGMII_10G: 3240 state->speed = SPEED_10000; 3241 break; 3242 default: 3243 state->link = false; 3244 return; 3245 } 3246 3247 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3248 state->duplex = DUPLEX_FULL; 3249 else 3250 state->duplex = DUPLEX_HALF; 3251 } 3252 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 3253 3254 /** 3255 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 3256 * @state: a pointer to a &struct phylink_link_state. 3257 * @bmsr: The value of the %MII_BMSR register 3258 * @lpa: The value of the %MII_LPA register 3259 * 3260 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3261 * clause 37 negotiation and/or SGMII control. 3262 * 3263 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 3264 * the phylink @state structure. This is suitable to be used for implementing 3265 * the mac_pcs_get_state() member of the struct phylink_mac_ops structure if 3266 * accessing @bmsr and @lpa cannot be done with MDIO directly. 3267 */ 3268 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 3269 u16 bmsr, u16 lpa) 3270 { 3271 state->link = !!(bmsr & BMSR_LSTATUS); 3272 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 3273 /* If there is no link or autonegotiation is disabled, the LP advertisement 3274 * data is not meaningful, so don't go any further. 3275 */ 3276 if (!state->link || !state->an_enabled) 3277 return; 3278 3279 switch (state->interface) { 3280 case PHY_INTERFACE_MODE_1000BASEX: 3281 phylink_decode_c37_word(state, lpa, SPEED_1000); 3282 break; 3283 3284 case PHY_INTERFACE_MODE_2500BASEX: 3285 phylink_decode_c37_word(state, lpa, SPEED_2500); 3286 break; 3287 3288 case PHY_INTERFACE_MODE_SGMII: 3289 case PHY_INTERFACE_MODE_QSGMII: 3290 case PHY_INTERFACE_MODE_QUSGMII: 3291 phylink_decode_sgmii_word(state, lpa); 3292 break; 3293 3294 default: 3295 state->link = false; 3296 break; 3297 } 3298 } 3299 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 3300 3301 /** 3302 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 3303 * @pcs: a pointer to a &struct mdio_device. 3304 * @state: a pointer to a &struct phylink_link_state. 3305 * 3306 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3307 * clause 37 negotiation and/or SGMII control. 3308 * 3309 * Read the MAC PCS state from the MII device configured in @config and 3310 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 3311 * the phylink @state structure. This is suitable to be directly plugged 3312 * into the mac_pcs_get_state() member of the struct phylink_mac_ops 3313 * structure. 3314 */ 3315 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 3316 struct phylink_link_state *state) 3317 { 3318 int bmsr, lpa; 3319 3320 bmsr = mdiodev_read(pcs, MII_BMSR); 3321 lpa = mdiodev_read(pcs, MII_LPA); 3322 if (bmsr < 0 || lpa < 0) { 3323 state->link = false; 3324 return; 3325 } 3326 3327 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa); 3328 } 3329 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 3330 3331 /** 3332 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 3333 * advertisement 3334 * @interface: the PHY interface mode being configured 3335 * @advertising: the ethtool advertisement mask 3336 * 3337 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3338 * clause 37 negotiation and/or SGMII control. 3339 * 3340 * Encode the clause 37 PCS advertisement as specified by @interface and 3341 * @advertising. 3342 * 3343 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 3344 */ 3345 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 3346 const unsigned long *advertising) 3347 { 3348 u16 adv; 3349 3350 switch (interface) { 3351 case PHY_INTERFACE_MODE_1000BASEX: 3352 case PHY_INTERFACE_MODE_2500BASEX: 3353 adv = ADVERTISE_1000XFULL; 3354 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 3355 advertising)) 3356 adv |= ADVERTISE_1000XPAUSE; 3357 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 3358 advertising)) 3359 adv |= ADVERTISE_1000XPSE_ASYM; 3360 return adv; 3361 case PHY_INTERFACE_MODE_SGMII: 3362 case PHY_INTERFACE_MODE_QSGMII: 3363 return 0x0001; 3364 default: 3365 /* Nothing to do for other modes */ 3366 return -EINVAL; 3367 } 3368 } 3369 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 3370 3371 /** 3372 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 3373 * @pcs: a pointer to a &struct mdio_device. 3374 * @mode: link autonegotiation mode 3375 * @interface: the PHY interface mode being configured 3376 * @advertising: the ethtool advertisement mask 3377 * 3378 * Configure a Clause 22 PCS PHY with the appropriate negotiation 3379 * parameters for the @mode, @interface and @advertising parameters. 3380 * Returns negative error number on failure, zero if the advertisement 3381 * has not changed, or positive if there is a change. 3382 */ 3383 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, unsigned int mode, 3384 phy_interface_t interface, 3385 const unsigned long *advertising) 3386 { 3387 bool changed = 0; 3388 u16 bmcr; 3389 int ret, adv; 3390 3391 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 3392 if (adv >= 0) { 3393 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 3394 MII_ADVERTISE, 0xffff, adv); 3395 if (ret < 0) 3396 return ret; 3397 changed = ret; 3398 } 3399 3400 /* Ensure ISOLATE bit is disabled */ 3401 if (mode == MLO_AN_INBAND && 3402 (interface == PHY_INTERFACE_MODE_SGMII || 3403 interface == PHY_INTERFACE_MODE_QSGMII || 3404 linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, advertising))) 3405 bmcr = BMCR_ANENABLE; 3406 else 3407 bmcr = 0; 3408 3409 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 3410 if (ret < 0) 3411 return ret; 3412 3413 return changed; 3414 } 3415 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 3416 3417 /** 3418 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 3419 * @pcs: a pointer to a &struct mdio_device. 3420 * 3421 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3422 * clause 37 negotiation. 3423 * 3424 * Restart the clause 37 negotiation with the link partner. This is 3425 * suitable to be directly plugged into the mac_pcs_get_state() member 3426 * of the struct phylink_mac_ops structure. 3427 */ 3428 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 3429 { 3430 int val = mdiodev_read(pcs, MII_BMCR); 3431 3432 if (val >= 0) { 3433 val |= BMCR_ANRESTART; 3434 3435 mdiodev_write(pcs, MII_BMCR, val); 3436 } 3437 } 3438 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 3439 3440 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 3441 struct phylink_link_state *state) 3442 { 3443 struct mii_bus *bus = pcs->bus; 3444 int addr = pcs->addr; 3445 int stat; 3446 3447 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 3448 if (stat < 0) { 3449 state->link = false; 3450 return; 3451 } 3452 3453 state->link = !!(stat & MDIO_STAT1_LSTATUS); 3454 if (!state->link) 3455 return; 3456 3457 switch (state->interface) { 3458 case PHY_INTERFACE_MODE_10GBASER: 3459 state->speed = SPEED_10000; 3460 state->duplex = DUPLEX_FULL; 3461 break; 3462 3463 default: 3464 break; 3465 } 3466 } 3467 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 3468 3469 static int __init phylink_init(void) 3470 { 3471 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 3472 __set_bit(phylink_sfp_interface_preference[i], 3473 phylink_sfp_interfaces); 3474 3475 return 0; 3476 } 3477 3478 module_init(phylink_init); 3479 3480 MODULE_LICENSE("GPL v2"); 3481