1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "sfp.h" 24 #include "swphy.h" 25 26 #define SUPPORTED_INTERFACES \ 27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 29 #define ADVERTISED_INTERFACES \ 30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 32 33 enum { 34 PHYLINK_DISABLE_STOPPED, 35 PHYLINK_DISABLE_LINK, 36 PHYLINK_DISABLE_MAC_WOL, 37 }; 38 39 /** 40 * struct phylink - internal data type for phylink 41 */ 42 struct phylink { 43 /* private: */ 44 struct net_device *netdev; 45 const struct phylink_mac_ops *mac_ops; 46 struct phylink_config *config; 47 struct phylink_pcs *pcs; 48 struct device *dev; 49 unsigned int old_link_state:1; 50 51 unsigned long phylink_disable_state; /* bitmask of disables */ 52 struct phy_device *phydev; 53 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 54 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 55 u8 cur_link_an_mode; 56 u8 link_port; /* The current non-phy ethtool port */ 57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 58 59 /* The link configuration settings */ 60 struct phylink_link_state link_config; 61 62 /* The current settings */ 63 phy_interface_t cur_interface; 64 65 struct gpio_desc *link_gpio; 66 unsigned int link_irq; 67 struct timer_list link_poll; 68 void (*get_fixed_state)(struct net_device *dev, 69 struct phylink_link_state *s); 70 71 struct mutex state_mutex; 72 struct phylink_link_state phy_state; 73 struct work_struct resolve; 74 75 bool mac_link_dropped; 76 bool using_mac_select_pcs; 77 78 struct sfp_bus *sfp_bus; 79 bool sfp_may_have_phy; 80 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 81 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 82 u8 sfp_port; 83 }; 84 85 #define phylink_printk(level, pl, fmt, ...) \ 86 do { \ 87 if ((pl)->config->type == PHYLINK_NETDEV) \ 88 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 89 else if ((pl)->config->type == PHYLINK_DEV) \ 90 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 91 } while (0) 92 93 #define phylink_err(pl, fmt, ...) \ 94 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 95 #define phylink_warn(pl, fmt, ...) \ 96 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 97 #define phylink_info(pl, fmt, ...) \ 98 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 99 #if defined(CONFIG_DYNAMIC_DEBUG) 100 #define phylink_dbg(pl, fmt, ...) \ 101 do { \ 102 if ((pl)->config->type == PHYLINK_NETDEV) \ 103 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 104 else if ((pl)->config->type == PHYLINK_DEV) \ 105 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 106 } while (0) 107 #elif defined(DEBUG) 108 #define phylink_dbg(pl, fmt, ...) \ 109 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 110 #else 111 #define phylink_dbg(pl, fmt, ...) \ 112 ({ \ 113 if (0) \ 114 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 115 }) 116 #endif 117 118 /** 119 * phylink_set_port_modes() - set the port type modes in the ethtool mask 120 * @mask: ethtool link mode mask 121 * 122 * Sets all the port type modes in the ethtool mask. MAC drivers should 123 * use this in their 'validate' callback. 124 */ 125 void phylink_set_port_modes(unsigned long *mask) 126 { 127 phylink_set(mask, TP); 128 phylink_set(mask, AUI); 129 phylink_set(mask, MII); 130 phylink_set(mask, FIBRE); 131 phylink_set(mask, BNC); 132 phylink_set(mask, Backplane); 133 } 134 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 135 136 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 137 { 138 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 139 140 phylink_set_port_modes(tmp); 141 phylink_set(tmp, Autoneg); 142 phylink_set(tmp, Pause); 143 phylink_set(tmp, Asym_Pause); 144 145 return linkmode_subset(linkmode, tmp); 146 } 147 148 static const char *phylink_an_mode_str(unsigned int mode) 149 { 150 static const char *modestr[] = { 151 [MLO_AN_PHY] = "phy", 152 [MLO_AN_FIXED] = "fixed", 153 [MLO_AN_INBAND] = "inband", 154 }; 155 156 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 157 } 158 159 /** 160 * phylink_interface_max_speed() - get the maximum speed of a phy interface 161 * @interface: phy interface mode defined by &typedef phy_interface_t 162 * 163 * Determine the maximum speed of a phy interface. This is intended to help 164 * determine the correct speed to pass to the MAC when the phy is performing 165 * rate matching. 166 * 167 * Return: The maximum speed of @interface 168 */ 169 static int phylink_interface_max_speed(phy_interface_t interface) 170 { 171 switch (interface) { 172 case PHY_INTERFACE_MODE_100BASEX: 173 case PHY_INTERFACE_MODE_REVRMII: 174 case PHY_INTERFACE_MODE_RMII: 175 case PHY_INTERFACE_MODE_SMII: 176 case PHY_INTERFACE_MODE_REVMII: 177 case PHY_INTERFACE_MODE_MII: 178 return SPEED_100; 179 180 case PHY_INTERFACE_MODE_TBI: 181 case PHY_INTERFACE_MODE_MOCA: 182 case PHY_INTERFACE_MODE_RTBI: 183 case PHY_INTERFACE_MODE_1000BASEX: 184 case PHY_INTERFACE_MODE_1000BASEKX: 185 case PHY_INTERFACE_MODE_TRGMII: 186 case PHY_INTERFACE_MODE_RGMII_TXID: 187 case PHY_INTERFACE_MODE_RGMII_RXID: 188 case PHY_INTERFACE_MODE_RGMII_ID: 189 case PHY_INTERFACE_MODE_RGMII: 190 case PHY_INTERFACE_MODE_QSGMII: 191 case PHY_INTERFACE_MODE_SGMII: 192 case PHY_INTERFACE_MODE_GMII: 193 return SPEED_1000; 194 195 case PHY_INTERFACE_MODE_2500BASEX: 196 return SPEED_2500; 197 198 case PHY_INTERFACE_MODE_5GBASER: 199 return SPEED_5000; 200 201 case PHY_INTERFACE_MODE_XGMII: 202 case PHY_INTERFACE_MODE_RXAUI: 203 case PHY_INTERFACE_MODE_XAUI: 204 case PHY_INTERFACE_MODE_10GBASER: 205 case PHY_INTERFACE_MODE_10GKR: 206 case PHY_INTERFACE_MODE_USXGMII: 207 case PHY_INTERFACE_MODE_QUSGMII: 208 return SPEED_10000; 209 210 case PHY_INTERFACE_MODE_25GBASER: 211 return SPEED_25000; 212 213 case PHY_INTERFACE_MODE_XLGMII: 214 return SPEED_40000; 215 216 case PHY_INTERFACE_MODE_INTERNAL: 217 case PHY_INTERFACE_MODE_NA: 218 case PHY_INTERFACE_MODE_MAX: 219 /* No idea! Garbage in, unknown out */ 220 return SPEED_UNKNOWN; 221 } 222 223 /* If we get here, someone forgot to add an interface mode above */ 224 WARN_ON_ONCE(1); 225 return SPEED_UNKNOWN; 226 } 227 228 /** 229 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 230 * @linkmodes: ethtool linkmode mask (must be already initialised) 231 * @caps: bitmask of MAC capabilities 232 * 233 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 234 * supported by the @caps. @linkmodes must have been initialised previously. 235 */ 236 void phylink_caps_to_linkmodes(unsigned long *linkmodes, unsigned long caps) 237 { 238 if (caps & MAC_SYM_PAUSE) 239 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 240 241 if (caps & MAC_ASYM_PAUSE) 242 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 243 244 if (caps & MAC_10HD) { 245 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes); 246 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes); 247 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes); 248 } 249 250 if (caps & MAC_10FD) { 251 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes); 252 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes); 253 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes); 254 } 255 256 if (caps & MAC_100HD) { 257 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes); 258 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes); 259 } 260 261 if (caps & MAC_100FD) { 262 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes); 263 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes); 264 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes); 265 } 266 267 if (caps & MAC_1000HD) 268 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes); 269 270 if (caps & MAC_1000FD) { 271 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes); 272 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes); 273 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes); 274 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes); 275 } 276 277 if (caps & MAC_2500FD) { 278 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes); 279 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes); 280 } 281 282 if (caps & MAC_5000FD) 283 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes); 284 285 if (caps & MAC_10000FD) { 286 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes); 287 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes); 288 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes); 289 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes); 290 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes); 291 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes); 292 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes); 293 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes); 294 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes); 295 } 296 297 if (caps & MAC_25000FD) { 298 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes); 299 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes); 300 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes); 301 } 302 303 if (caps & MAC_40000FD) { 304 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes); 305 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes); 306 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes); 307 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes); 308 } 309 310 if (caps & MAC_50000FD) { 311 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes); 312 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes); 313 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes); 314 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes); 315 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes); 316 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes); 317 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 318 linkmodes); 319 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes); 320 } 321 322 if (caps & MAC_56000FD) { 323 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes); 324 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes); 325 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes); 326 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes); 327 } 328 329 if (caps & MAC_100000FD) { 330 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes); 331 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes); 332 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes); 333 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 334 linkmodes); 335 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes); 336 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes); 337 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes); 338 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 339 linkmodes); 340 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes); 341 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes); 342 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes); 343 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 344 linkmodes); 345 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes); 346 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes); 347 } 348 349 if (caps & MAC_200000FD) { 350 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes); 351 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes); 352 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 353 linkmodes); 354 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes); 355 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes); 356 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes); 357 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes); 358 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 359 linkmodes); 360 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes); 361 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes); 362 } 363 364 if (caps & MAC_400000FD) { 365 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes); 366 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes); 367 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 368 linkmodes); 369 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes); 370 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes); 371 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes); 372 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes); 373 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 374 linkmodes); 375 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes); 376 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes); 377 } 378 } 379 EXPORT_SYMBOL_GPL(phylink_caps_to_linkmodes); 380 381 static struct { 382 unsigned long mask; 383 int speed; 384 unsigned int duplex; 385 } phylink_caps_params[] = { 386 { MAC_400000FD, SPEED_400000, DUPLEX_FULL }, 387 { MAC_200000FD, SPEED_200000, DUPLEX_FULL }, 388 { MAC_100000FD, SPEED_100000, DUPLEX_FULL }, 389 { MAC_56000FD, SPEED_56000, DUPLEX_FULL }, 390 { MAC_50000FD, SPEED_50000, DUPLEX_FULL }, 391 { MAC_40000FD, SPEED_40000, DUPLEX_FULL }, 392 { MAC_25000FD, SPEED_25000, DUPLEX_FULL }, 393 { MAC_20000FD, SPEED_20000, DUPLEX_FULL }, 394 { MAC_10000FD, SPEED_10000, DUPLEX_FULL }, 395 { MAC_5000FD, SPEED_5000, DUPLEX_FULL }, 396 { MAC_2500FD, SPEED_2500, DUPLEX_FULL }, 397 { MAC_1000FD, SPEED_1000, DUPLEX_FULL }, 398 { MAC_1000HD, SPEED_1000, DUPLEX_HALF }, 399 { MAC_100FD, SPEED_100, DUPLEX_FULL }, 400 { MAC_100HD, SPEED_100, DUPLEX_HALF }, 401 { MAC_10FD, SPEED_10, DUPLEX_FULL }, 402 { MAC_10HD, SPEED_10, DUPLEX_HALF }, 403 }; 404 405 /** 406 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 407 * @speed: the speed to search for 408 * @duplex: the duplex to search for 409 * 410 * Find the mac capability for a given speed and duplex. 411 * 412 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 413 * there were no matches. 414 */ 415 static unsigned long phylink_cap_from_speed_duplex(int speed, 416 unsigned int duplex) 417 { 418 int i; 419 420 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 421 if (speed == phylink_caps_params[i].speed && 422 duplex == phylink_caps_params[i].duplex) 423 return phylink_caps_params[i].mask; 424 } 425 426 return 0; 427 } 428 429 /** 430 * phylink_get_capabilities() - get capabilities for a given MAC 431 * @interface: phy interface mode defined by &typedef phy_interface_t 432 * @mac_capabilities: bitmask of MAC capabilities 433 * @rate_matching: type of rate matching being performed 434 * 435 * Get the MAC capabilities that are supported by the @interface mode and 436 * @mac_capabilities. 437 */ 438 unsigned long phylink_get_capabilities(phy_interface_t interface, 439 unsigned long mac_capabilities, 440 int rate_matching) 441 { 442 int max_speed = phylink_interface_max_speed(interface); 443 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 444 unsigned long matched_caps = 0; 445 446 switch (interface) { 447 case PHY_INTERFACE_MODE_USXGMII: 448 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD; 449 fallthrough; 450 451 case PHY_INTERFACE_MODE_RGMII_TXID: 452 case PHY_INTERFACE_MODE_RGMII_RXID: 453 case PHY_INTERFACE_MODE_RGMII_ID: 454 case PHY_INTERFACE_MODE_RGMII: 455 case PHY_INTERFACE_MODE_QSGMII: 456 case PHY_INTERFACE_MODE_QUSGMII: 457 case PHY_INTERFACE_MODE_SGMII: 458 case PHY_INTERFACE_MODE_GMII: 459 caps |= MAC_1000HD | MAC_1000FD; 460 fallthrough; 461 462 case PHY_INTERFACE_MODE_REVRMII: 463 case PHY_INTERFACE_MODE_RMII: 464 case PHY_INTERFACE_MODE_SMII: 465 case PHY_INTERFACE_MODE_REVMII: 466 case PHY_INTERFACE_MODE_MII: 467 caps |= MAC_10HD | MAC_10FD; 468 fallthrough; 469 470 case PHY_INTERFACE_MODE_100BASEX: 471 caps |= MAC_100HD | MAC_100FD; 472 break; 473 474 case PHY_INTERFACE_MODE_TBI: 475 case PHY_INTERFACE_MODE_MOCA: 476 case PHY_INTERFACE_MODE_RTBI: 477 case PHY_INTERFACE_MODE_1000BASEX: 478 caps |= MAC_1000HD; 479 fallthrough; 480 case PHY_INTERFACE_MODE_1000BASEKX: 481 case PHY_INTERFACE_MODE_TRGMII: 482 caps |= MAC_1000FD; 483 break; 484 485 case PHY_INTERFACE_MODE_2500BASEX: 486 caps |= MAC_2500FD; 487 break; 488 489 case PHY_INTERFACE_MODE_5GBASER: 490 caps |= MAC_5000FD; 491 break; 492 493 case PHY_INTERFACE_MODE_XGMII: 494 case PHY_INTERFACE_MODE_RXAUI: 495 case PHY_INTERFACE_MODE_XAUI: 496 case PHY_INTERFACE_MODE_10GBASER: 497 case PHY_INTERFACE_MODE_10GKR: 498 caps |= MAC_10000FD; 499 break; 500 501 case PHY_INTERFACE_MODE_25GBASER: 502 caps |= MAC_25000FD; 503 break; 504 505 case PHY_INTERFACE_MODE_XLGMII: 506 caps |= MAC_40000FD; 507 break; 508 509 case PHY_INTERFACE_MODE_INTERNAL: 510 caps |= ~0; 511 break; 512 513 case PHY_INTERFACE_MODE_NA: 514 case PHY_INTERFACE_MODE_MAX: 515 break; 516 } 517 518 switch (rate_matching) { 519 case RATE_MATCH_OPEN_LOOP: 520 /* TODO */ 521 fallthrough; 522 case RATE_MATCH_NONE: 523 matched_caps = 0; 524 break; 525 case RATE_MATCH_PAUSE: { 526 /* The MAC must support asymmetric pause towards the local 527 * device for this. We could allow just symmetric pause, but 528 * then we might have to renegotiate if the link partner 529 * doesn't support pause. This is because there's no way to 530 * accept pause frames without transmitting them if we only 531 * support symmetric pause. 532 */ 533 if (!(mac_capabilities & MAC_SYM_PAUSE) || 534 !(mac_capabilities & MAC_ASYM_PAUSE)) 535 break; 536 537 /* We can't adapt if the MAC doesn't support the interface's 538 * max speed at full duplex. 539 */ 540 if (mac_capabilities & 541 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) { 542 /* Although a duplex-matching phy might exist, we 543 * conservatively remove these modes because the MAC 544 * will not be aware of the half-duplex nature of the 545 * link. 546 */ 547 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 548 matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD); 549 } 550 break; 551 } 552 case RATE_MATCH_CRS: 553 /* The MAC must support half duplex at the interface's max 554 * speed. 555 */ 556 if (mac_capabilities & 557 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 558 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 559 matched_caps &= mac_capabilities; 560 } 561 break; 562 } 563 564 return (caps & mac_capabilities) | matched_caps; 565 } 566 EXPORT_SYMBOL_GPL(phylink_get_capabilities); 567 568 /** 569 * phylink_validate_mask_caps() - Restrict link modes based on caps 570 * @supported: ethtool bitmask for supported link modes. 571 * @state: pointer to a &struct phylink_link_state. 572 * @mac_capabilities: bitmask of MAC capabilities 573 * 574 * Calculate the supported link modes based on @mac_capabilities, and restrict 575 * @supported and @state based on that. Use this function if your capabiliies 576 * aren't constant, such as if they vary depending on the interface. 577 */ 578 void phylink_validate_mask_caps(unsigned long *supported, 579 struct phylink_link_state *state, 580 unsigned long mac_capabilities) 581 { 582 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 583 unsigned long caps; 584 585 phylink_set_port_modes(mask); 586 phylink_set(mask, Autoneg); 587 caps = phylink_get_capabilities(state->interface, mac_capabilities, 588 state->rate_matching); 589 phylink_caps_to_linkmodes(mask, caps); 590 591 linkmode_and(supported, supported, mask); 592 linkmode_and(state->advertising, state->advertising, mask); 593 } 594 EXPORT_SYMBOL_GPL(phylink_validate_mask_caps); 595 596 /** 597 * phylink_generic_validate() - generic validate() callback implementation 598 * @config: a pointer to a &struct phylink_config. 599 * @supported: ethtool bitmask for supported link modes. 600 * @state: a pointer to a &struct phylink_link_state. 601 * 602 * Generic implementation of the validate() callback that MAC drivers can 603 * use when they pass the range of supported interfaces and MAC capabilities. 604 */ 605 void phylink_generic_validate(struct phylink_config *config, 606 unsigned long *supported, 607 struct phylink_link_state *state) 608 { 609 phylink_validate_mask_caps(supported, state, config->mac_capabilities); 610 } 611 EXPORT_SYMBOL_GPL(phylink_generic_validate); 612 613 static int phylink_validate_mac_and_pcs(struct phylink *pl, 614 unsigned long *supported, 615 struct phylink_link_state *state) 616 { 617 struct phylink_pcs *pcs; 618 int ret; 619 620 /* Get the PCS for this interface mode */ 621 if (pl->using_mac_select_pcs) { 622 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 623 if (IS_ERR(pcs)) 624 return PTR_ERR(pcs); 625 } else { 626 pcs = pl->pcs; 627 } 628 629 if (pcs) { 630 /* The PCS, if present, must be setup before phylink_create() 631 * has been called. If the ops is not initialised, print an 632 * error and backtrace rather than oopsing the kernel. 633 */ 634 if (!pcs->ops) { 635 phylink_err(pl, "interface %s: uninitialised PCS\n", 636 phy_modes(state->interface)); 637 dump_stack(); 638 return -EINVAL; 639 } 640 641 /* Validate the link parameters with the PCS */ 642 if (pcs->ops->pcs_validate) { 643 ret = pcs->ops->pcs_validate(pcs, supported, state); 644 if (ret < 0 || phylink_is_empty_linkmode(supported)) 645 return -EINVAL; 646 647 /* Ensure the advertising mask is a subset of the 648 * supported mask. 649 */ 650 linkmode_and(state->advertising, state->advertising, 651 supported); 652 } 653 } 654 655 /* Then validate the link parameters with the MAC */ 656 if (pl->mac_ops->validate) 657 pl->mac_ops->validate(pl->config, supported, state); 658 else 659 phylink_generic_validate(pl->config, supported, state); 660 661 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 662 } 663 664 static int phylink_validate_mask(struct phylink *pl, unsigned long *supported, 665 struct phylink_link_state *state, 666 const unsigned long *interfaces) 667 { 668 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 669 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 670 __ETHTOOL_DECLARE_LINK_MODE_MASK(s); 671 struct phylink_link_state t; 672 int intf; 673 674 for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) { 675 if (test_bit(intf, interfaces)) { 676 linkmode_copy(s, supported); 677 678 t = *state; 679 t.interface = intf; 680 if (!phylink_validate_mac_and_pcs(pl, s, &t)) { 681 linkmode_or(all_s, all_s, s); 682 linkmode_or(all_adv, all_adv, t.advertising); 683 } 684 } 685 } 686 687 linkmode_copy(supported, all_s); 688 linkmode_copy(state->advertising, all_adv); 689 690 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 691 } 692 693 static int phylink_validate(struct phylink *pl, unsigned long *supported, 694 struct phylink_link_state *state) 695 { 696 const unsigned long *interfaces = pl->config->supported_interfaces; 697 698 if (!phy_interface_empty(interfaces)) { 699 if (state->interface == PHY_INTERFACE_MODE_NA) 700 return phylink_validate_mask(pl, supported, state, 701 interfaces); 702 703 if (!test_bit(state->interface, interfaces)) 704 return -EINVAL; 705 } 706 707 return phylink_validate_mac_and_pcs(pl, supported, state); 708 } 709 710 static int phylink_parse_fixedlink(struct phylink *pl, 711 struct fwnode_handle *fwnode) 712 { 713 struct fwnode_handle *fixed_node; 714 bool pause, asym_pause, autoneg; 715 const struct phy_setting *s; 716 struct gpio_desc *desc; 717 u32 speed; 718 int ret; 719 720 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 721 if (fixed_node) { 722 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 723 724 pl->link_config.speed = speed; 725 pl->link_config.duplex = DUPLEX_HALF; 726 727 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 728 pl->link_config.duplex = DUPLEX_FULL; 729 730 /* We treat the "pause" and "asym-pause" terminology as 731 * defining the link partner's ability. 732 */ 733 if (fwnode_property_read_bool(fixed_node, "pause")) 734 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 735 pl->link_config.lp_advertising); 736 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 737 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 738 pl->link_config.lp_advertising); 739 740 if (ret == 0) { 741 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 742 GPIOD_IN, "?"); 743 744 if (!IS_ERR(desc)) 745 pl->link_gpio = desc; 746 else if (desc == ERR_PTR(-EPROBE_DEFER)) 747 ret = -EPROBE_DEFER; 748 } 749 fwnode_handle_put(fixed_node); 750 751 if (ret) 752 return ret; 753 } else { 754 u32 prop[5]; 755 756 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 757 NULL, 0); 758 if (ret != ARRAY_SIZE(prop)) { 759 phylink_err(pl, "broken fixed-link?\n"); 760 return -EINVAL; 761 } 762 763 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 764 prop, ARRAY_SIZE(prop)); 765 if (!ret) { 766 pl->link_config.duplex = prop[1] ? 767 DUPLEX_FULL : DUPLEX_HALF; 768 pl->link_config.speed = prop[2]; 769 if (prop[3]) 770 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 771 pl->link_config.lp_advertising); 772 if (prop[4]) 773 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 774 pl->link_config.lp_advertising); 775 } 776 } 777 778 if (pl->link_config.speed > SPEED_1000 && 779 pl->link_config.duplex != DUPLEX_FULL) 780 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 781 pl->link_config.speed); 782 783 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 784 linkmode_copy(pl->link_config.advertising, pl->supported); 785 phylink_validate(pl, pl->supported, &pl->link_config); 786 787 pause = phylink_test(pl->supported, Pause); 788 asym_pause = phylink_test(pl->supported, Asym_Pause); 789 autoneg = phylink_test(pl->supported, Autoneg); 790 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, 791 pl->supported, true); 792 linkmode_zero(pl->supported); 793 phylink_set(pl->supported, MII); 794 795 if (pause) 796 phylink_set(pl->supported, Pause); 797 798 if (asym_pause) 799 phylink_set(pl->supported, Asym_Pause); 800 801 if (autoneg) 802 phylink_set(pl->supported, Autoneg); 803 804 if (s) { 805 __set_bit(s->bit, pl->supported); 806 __set_bit(s->bit, pl->link_config.lp_advertising); 807 } else { 808 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 809 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 810 pl->link_config.speed); 811 } 812 813 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 814 pl->supported); 815 816 pl->link_config.link = 1; 817 pl->link_config.an_complete = 1; 818 819 return 0; 820 } 821 822 static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode) 823 { 824 struct fwnode_handle *dn; 825 const char *managed; 826 827 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 828 if (dn || fwnode_property_present(fwnode, "fixed-link")) 829 pl->cfg_link_an_mode = MLO_AN_FIXED; 830 fwnode_handle_put(dn); 831 832 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 833 strcmp(managed, "in-band-status") == 0) || 834 pl->config->ovr_an_inband) { 835 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 836 phylink_err(pl, 837 "can't use both fixed-link and in-band-status\n"); 838 return -EINVAL; 839 } 840 841 linkmode_zero(pl->supported); 842 phylink_set(pl->supported, MII); 843 phylink_set(pl->supported, Autoneg); 844 phylink_set(pl->supported, Asym_Pause); 845 phylink_set(pl->supported, Pause); 846 pl->cfg_link_an_mode = MLO_AN_INBAND; 847 848 switch (pl->link_config.interface) { 849 case PHY_INTERFACE_MODE_SGMII: 850 case PHY_INTERFACE_MODE_QSGMII: 851 case PHY_INTERFACE_MODE_QUSGMII: 852 case PHY_INTERFACE_MODE_RGMII: 853 case PHY_INTERFACE_MODE_RGMII_ID: 854 case PHY_INTERFACE_MODE_RGMII_RXID: 855 case PHY_INTERFACE_MODE_RGMII_TXID: 856 case PHY_INTERFACE_MODE_RTBI: 857 phylink_set(pl->supported, 10baseT_Half); 858 phylink_set(pl->supported, 10baseT_Full); 859 phylink_set(pl->supported, 100baseT_Half); 860 phylink_set(pl->supported, 100baseT_Full); 861 phylink_set(pl->supported, 1000baseT_Half); 862 phylink_set(pl->supported, 1000baseT_Full); 863 break; 864 865 case PHY_INTERFACE_MODE_1000BASEX: 866 phylink_set(pl->supported, 1000baseX_Full); 867 break; 868 869 case PHY_INTERFACE_MODE_2500BASEX: 870 phylink_set(pl->supported, 2500baseX_Full); 871 break; 872 873 case PHY_INTERFACE_MODE_5GBASER: 874 phylink_set(pl->supported, 5000baseT_Full); 875 break; 876 877 case PHY_INTERFACE_MODE_25GBASER: 878 phylink_set(pl->supported, 25000baseCR_Full); 879 phylink_set(pl->supported, 25000baseKR_Full); 880 phylink_set(pl->supported, 25000baseSR_Full); 881 fallthrough; 882 case PHY_INTERFACE_MODE_USXGMII: 883 case PHY_INTERFACE_MODE_10GKR: 884 case PHY_INTERFACE_MODE_10GBASER: 885 phylink_set(pl->supported, 10baseT_Half); 886 phylink_set(pl->supported, 10baseT_Full); 887 phylink_set(pl->supported, 100baseT_Half); 888 phylink_set(pl->supported, 100baseT_Full); 889 phylink_set(pl->supported, 1000baseT_Half); 890 phylink_set(pl->supported, 1000baseT_Full); 891 phylink_set(pl->supported, 1000baseX_Full); 892 phylink_set(pl->supported, 1000baseKX_Full); 893 phylink_set(pl->supported, 2500baseT_Full); 894 phylink_set(pl->supported, 2500baseX_Full); 895 phylink_set(pl->supported, 5000baseT_Full); 896 phylink_set(pl->supported, 10000baseT_Full); 897 phylink_set(pl->supported, 10000baseKR_Full); 898 phylink_set(pl->supported, 10000baseKX4_Full); 899 phylink_set(pl->supported, 10000baseCR_Full); 900 phylink_set(pl->supported, 10000baseSR_Full); 901 phylink_set(pl->supported, 10000baseLR_Full); 902 phylink_set(pl->supported, 10000baseLRM_Full); 903 phylink_set(pl->supported, 10000baseER_Full); 904 break; 905 906 case PHY_INTERFACE_MODE_XLGMII: 907 phylink_set(pl->supported, 25000baseCR_Full); 908 phylink_set(pl->supported, 25000baseKR_Full); 909 phylink_set(pl->supported, 25000baseSR_Full); 910 phylink_set(pl->supported, 40000baseKR4_Full); 911 phylink_set(pl->supported, 40000baseCR4_Full); 912 phylink_set(pl->supported, 40000baseSR4_Full); 913 phylink_set(pl->supported, 40000baseLR4_Full); 914 phylink_set(pl->supported, 50000baseCR2_Full); 915 phylink_set(pl->supported, 50000baseKR2_Full); 916 phylink_set(pl->supported, 50000baseSR2_Full); 917 phylink_set(pl->supported, 50000baseKR_Full); 918 phylink_set(pl->supported, 50000baseSR_Full); 919 phylink_set(pl->supported, 50000baseCR_Full); 920 phylink_set(pl->supported, 50000baseLR_ER_FR_Full); 921 phylink_set(pl->supported, 50000baseDR_Full); 922 phylink_set(pl->supported, 100000baseKR4_Full); 923 phylink_set(pl->supported, 100000baseSR4_Full); 924 phylink_set(pl->supported, 100000baseCR4_Full); 925 phylink_set(pl->supported, 100000baseLR4_ER4_Full); 926 phylink_set(pl->supported, 100000baseKR2_Full); 927 phylink_set(pl->supported, 100000baseSR2_Full); 928 phylink_set(pl->supported, 100000baseCR2_Full); 929 phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full); 930 phylink_set(pl->supported, 100000baseDR2_Full); 931 break; 932 933 default: 934 phylink_err(pl, 935 "incorrect link mode %s for in-band status\n", 936 phy_modes(pl->link_config.interface)); 937 return -EINVAL; 938 } 939 940 linkmode_copy(pl->link_config.advertising, pl->supported); 941 942 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 943 phylink_err(pl, 944 "failed to validate link configuration for in-band status\n"); 945 return -EINVAL; 946 } 947 } 948 949 return 0; 950 } 951 952 static void phylink_apply_manual_flow(struct phylink *pl, 953 struct phylink_link_state *state) 954 { 955 /* If autoneg is disabled, pause AN is also disabled */ 956 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 957 state->advertising)) 958 state->pause &= ~MLO_PAUSE_AN; 959 960 /* Manual configuration of pause modes */ 961 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 962 state->pause = pl->link_config.pause; 963 } 964 965 static void phylink_resolve_flow(struct phylink_link_state *state) 966 { 967 bool tx_pause, rx_pause; 968 969 state->pause = MLO_PAUSE_NONE; 970 if (state->duplex == DUPLEX_FULL) { 971 linkmode_resolve_pause(state->advertising, 972 state->lp_advertising, 973 &tx_pause, &rx_pause); 974 if (tx_pause) 975 state->pause |= MLO_PAUSE_TX; 976 if (rx_pause) 977 state->pause |= MLO_PAUSE_RX; 978 } 979 } 980 981 static void phylink_pcs_poll_stop(struct phylink *pl) 982 { 983 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 984 del_timer(&pl->link_poll); 985 } 986 987 static void phylink_pcs_poll_start(struct phylink *pl) 988 { 989 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 990 mod_timer(&pl->link_poll, jiffies + HZ); 991 } 992 993 static void phylink_mac_config(struct phylink *pl, 994 const struct phylink_link_state *state) 995 { 996 phylink_dbg(pl, 997 "%s: mode=%s/%s/%s/%s/%s adv=%*pb pause=%02x link=%u\n", 998 __func__, phylink_an_mode_str(pl->cur_link_an_mode), 999 phy_modes(state->interface), 1000 phy_speed_to_str(state->speed), 1001 phy_duplex_to_str(state->duplex), 1002 phy_rate_matching_to_str(state->rate_matching), 1003 __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising, 1004 state->pause, state->link); 1005 1006 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, state); 1007 } 1008 1009 static void phylink_mac_pcs_an_restart(struct phylink *pl) 1010 { 1011 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1012 pl->link_config.advertising) && 1013 phy_interface_mode_is_8023z(pl->link_config.interface) && 1014 phylink_autoneg_inband(pl->cur_link_an_mode)) { 1015 if (pl->pcs) 1016 pl->pcs->ops->pcs_an_restart(pl->pcs); 1017 else if (pl->config->legacy_pre_march2020) 1018 pl->mac_ops->mac_an_restart(pl->config); 1019 } 1020 } 1021 1022 static void phylink_major_config(struct phylink *pl, bool restart, 1023 const struct phylink_link_state *state) 1024 { 1025 struct phylink_pcs *pcs = NULL; 1026 bool pcs_changed = false; 1027 int err; 1028 1029 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); 1030 1031 if (pl->using_mac_select_pcs) { 1032 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1033 if (IS_ERR(pcs)) { 1034 phylink_err(pl, 1035 "mac_select_pcs unexpectedly failed: %pe\n", 1036 pcs); 1037 return; 1038 } 1039 1040 pcs_changed = pcs && pl->pcs != pcs; 1041 } 1042 1043 phylink_pcs_poll_stop(pl); 1044 1045 if (pl->mac_ops->mac_prepare) { 1046 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode, 1047 state->interface); 1048 if (err < 0) { 1049 phylink_err(pl, "mac_prepare failed: %pe\n", 1050 ERR_PTR(err)); 1051 return; 1052 } 1053 } 1054 1055 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1056 * for the change. 1057 */ 1058 if (pcs_changed) 1059 pl->pcs = pcs; 1060 1061 phylink_mac_config(pl, state); 1062 1063 if (pl->pcs) { 1064 err = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode, 1065 state->interface, 1066 state->advertising, 1067 !!(pl->link_config.pause & 1068 MLO_PAUSE_AN)); 1069 if (err < 0) 1070 phylink_err(pl, "pcs_config failed: %pe\n", 1071 ERR_PTR(err)); 1072 if (err > 0) 1073 restart = true; 1074 } 1075 if (restart) 1076 phylink_mac_pcs_an_restart(pl); 1077 1078 if (pl->mac_ops->mac_finish) { 1079 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode, 1080 state->interface); 1081 if (err < 0) 1082 phylink_err(pl, "mac_finish failed: %pe\n", 1083 ERR_PTR(err)); 1084 } 1085 1086 phylink_pcs_poll_start(pl); 1087 } 1088 1089 /* 1090 * Reconfigure for a change of inband advertisement. 1091 * If we have a separate PCS, we only need to call its pcs_config() method, 1092 * and then restart AN if it indicates something changed. Otherwise, we do 1093 * the full MAC reconfiguration. 1094 */ 1095 static int phylink_change_inband_advert(struct phylink *pl) 1096 { 1097 int ret; 1098 1099 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1100 return 0; 1101 1102 if (!pl->pcs && pl->config->legacy_pre_march2020) { 1103 /* Legacy method */ 1104 phylink_mac_config(pl, &pl->link_config); 1105 phylink_mac_pcs_an_restart(pl); 1106 return 0; 1107 } 1108 1109 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1110 phylink_an_mode_str(pl->cur_link_an_mode), 1111 phy_modes(pl->link_config.interface), 1112 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1113 pl->link_config.pause); 1114 1115 /* Modern PCS-based method; update the advert at the PCS, and 1116 * restart negotiation if the pcs_config() helper indicates that 1117 * the programmed advertisement has changed. 1118 */ 1119 ret = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode, 1120 pl->link_config.interface, 1121 pl->link_config.advertising, 1122 !!(pl->link_config.pause & 1123 MLO_PAUSE_AN)); 1124 if (ret < 0) 1125 return ret; 1126 1127 if (ret > 0) 1128 phylink_mac_pcs_an_restart(pl); 1129 1130 return 0; 1131 } 1132 1133 static void phylink_mac_pcs_get_state(struct phylink *pl, 1134 struct phylink_link_state *state) 1135 { 1136 linkmode_copy(state->advertising, pl->link_config.advertising); 1137 linkmode_zero(state->lp_advertising); 1138 state->interface = pl->link_config.interface; 1139 state->rate_matching = pl->link_config.rate_matching; 1140 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1141 state->advertising)) { 1142 state->speed = SPEED_UNKNOWN; 1143 state->duplex = DUPLEX_UNKNOWN; 1144 state->pause = MLO_PAUSE_NONE; 1145 } else { 1146 state->speed = pl->link_config.speed; 1147 state->duplex = pl->link_config.duplex; 1148 state->pause = pl->link_config.pause; 1149 } 1150 state->an_complete = 0; 1151 state->link = 1; 1152 1153 if (pl->pcs) 1154 pl->pcs->ops->pcs_get_state(pl->pcs, state); 1155 else if (pl->mac_ops->mac_pcs_get_state && 1156 pl->config->legacy_pre_march2020) 1157 pl->mac_ops->mac_pcs_get_state(pl->config, state); 1158 else 1159 state->link = 0; 1160 } 1161 1162 /* The fixed state is... fixed except for the link state, 1163 * which may be determined by a GPIO or a callback. 1164 */ 1165 static void phylink_get_fixed_state(struct phylink *pl, 1166 struct phylink_link_state *state) 1167 { 1168 *state = pl->link_config; 1169 if (pl->config->get_fixed_state) 1170 pl->config->get_fixed_state(pl->config, state); 1171 else if (pl->link_gpio) 1172 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1173 1174 phylink_resolve_flow(state); 1175 } 1176 1177 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1178 { 1179 struct phylink_link_state link_state; 1180 1181 switch (pl->cur_link_an_mode) { 1182 case MLO_AN_PHY: 1183 link_state = pl->phy_state; 1184 break; 1185 1186 case MLO_AN_FIXED: 1187 phylink_get_fixed_state(pl, &link_state); 1188 break; 1189 1190 case MLO_AN_INBAND: 1191 link_state = pl->link_config; 1192 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1193 link_state.pause = MLO_PAUSE_NONE; 1194 break; 1195 1196 default: /* can't happen */ 1197 return; 1198 } 1199 1200 link_state.link = false; 1201 1202 phylink_apply_manual_flow(pl, &link_state); 1203 phylink_major_config(pl, force_restart, &link_state); 1204 } 1205 1206 static const char *phylink_pause_to_str(int pause) 1207 { 1208 switch (pause & MLO_PAUSE_TXRX_MASK) { 1209 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1210 return "rx/tx"; 1211 case MLO_PAUSE_TX: 1212 return "tx"; 1213 case MLO_PAUSE_RX: 1214 return "rx"; 1215 default: 1216 return "off"; 1217 } 1218 } 1219 1220 static void phylink_link_up(struct phylink *pl, 1221 struct phylink_link_state link_state) 1222 { 1223 struct net_device *ndev = pl->netdev; 1224 int speed, duplex; 1225 bool rx_pause; 1226 1227 speed = link_state.speed; 1228 duplex = link_state.duplex; 1229 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1230 1231 switch (link_state.rate_matching) { 1232 case RATE_MATCH_PAUSE: 1233 /* The PHY is doing rate matchion from the media rate (in 1234 * the link_state) to the interface speed, and will send 1235 * pause frames to the MAC to limit its transmission speed. 1236 */ 1237 speed = phylink_interface_max_speed(link_state.interface); 1238 duplex = DUPLEX_FULL; 1239 rx_pause = true; 1240 break; 1241 1242 case RATE_MATCH_CRS: 1243 /* The PHY is doing rate matchion from the media rate (in 1244 * the link_state) to the interface speed, and will cause 1245 * collisions to the MAC to limit its transmission speed. 1246 */ 1247 speed = phylink_interface_max_speed(link_state.interface); 1248 duplex = DUPLEX_HALF; 1249 break; 1250 } 1251 1252 pl->cur_interface = link_state.interface; 1253 1254 if (pl->pcs && pl->pcs->ops->pcs_link_up) 1255 pl->pcs->ops->pcs_link_up(pl->pcs, pl->cur_link_an_mode, 1256 pl->cur_interface, speed, duplex); 1257 1258 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode, 1259 pl->cur_interface, speed, duplex, 1260 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1261 1262 if (ndev) 1263 netif_carrier_on(ndev); 1264 1265 phylink_info(pl, 1266 "Link is Up - %s/%s - flow control %s\n", 1267 phy_speed_to_str(link_state.speed), 1268 phy_duplex_to_str(link_state.duplex), 1269 phylink_pause_to_str(link_state.pause)); 1270 } 1271 1272 static void phylink_link_down(struct phylink *pl) 1273 { 1274 struct net_device *ndev = pl->netdev; 1275 1276 if (ndev) 1277 netif_carrier_off(ndev); 1278 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode, 1279 pl->cur_interface); 1280 phylink_info(pl, "Link is Down\n"); 1281 } 1282 1283 static void phylink_resolve(struct work_struct *w) 1284 { 1285 struct phylink *pl = container_of(w, struct phylink, resolve); 1286 struct phylink_link_state link_state; 1287 struct net_device *ndev = pl->netdev; 1288 bool mac_config = false; 1289 bool retrigger = false; 1290 bool cur_link_state; 1291 1292 mutex_lock(&pl->state_mutex); 1293 if (pl->netdev) 1294 cur_link_state = netif_carrier_ok(ndev); 1295 else 1296 cur_link_state = pl->old_link_state; 1297 1298 if (pl->phylink_disable_state) { 1299 pl->mac_link_dropped = false; 1300 link_state.link = false; 1301 } else if (pl->mac_link_dropped) { 1302 link_state.link = false; 1303 retrigger = true; 1304 } else { 1305 switch (pl->cur_link_an_mode) { 1306 case MLO_AN_PHY: 1307 link_state = pl->phy_state; 1308 phylink_apply_manual_flow(pl, &link_state); 1309 mac_config = link_state.link; 1310 break; 1311 1312 case MLO_AN_FIXED: 1313 phylink_get_fixed_state(pl, &link_state); 1314 mac_config = link_state.link; 1315 break; 1316 1317 case MLO_AN_INBAND: 1318 phylink_mac_pcs_get_state(pl, &link_state); 1319 1320 /* The PCS may have a latching link-fail indicator. 1321 * If the link was up, bring the link down and 1322 * re-trigger the resolve. Otherwise, re-read the 1323 * PCS state to get the current status of the link. 1324 */ 1325 if (!link_state.link) { 1326 if (cur_link_state) 1327 retrigger = true; 1328 else 1329 phylink_mac_pcs_get_state(pl, 1330 &link_state); 1331 } 1332 1333 /* If we have a phy, the "up" state is the union of 1334 * both the PHY and the MAC 1335 */ 1336 if (pl->phydev) 1337 link_state.link &= pl->phy_state.link; 1338 1339 /* Only update if the PHY link is up */ 1340 if (pl->phydev && pl->phy_state.link) { 1341 /* If the interface has changed, force a 1342 * link down event if the link isn't already 1343 * down, and re-resolve. 1344 */ 1345 if (link_state.interface != 1346 pl->phy_state.interface) { 1347 retrigger = true; 1348 link_state.link = false; 1349 } 1350 link_state.interface = pl->phy_state.interface; 1351 1352 /* If we are doing rate matching, then the 1353 * link speed/duplex comes from the PHY 1354 */ 1355 if (pl->phy_state.rate_matching) { 1356 link_state.rate_matching = 1357 pl->phy_state.rate_matching; 1358 link_state.speed = pl->phy_state.speed; 1359 link_state.duplex = 1360 pl->phy_state.duplex; 1361 } 1362 1363 /* If we have a PHY, we need to update with 1364 * the PHY flow control bits. 1365 */ 1366 link_state.pause = pl->phy_state.pause; 1367 mac_config = true; 1368 } 1369 phylink_apply_manual_flow(pl, &link_state); 1370 break; 1371 } 1372 } 1373 1374 if (mac_config) { 1375 if (link_state.interface != pl->link_config.interface) { 1376 /* The interface has changed, force the link down and 1377 * then reconfigure. 1378 */ 1379 if (cur_link_state) { 1380 phylink_link_down(pl); 1381 cur_link_state = false; 1382 } 1383 phylink_major_config(pl, false, &link_state); 1384 pl->link_config.interface = link_state.interface; 1385 } else if (!pl->pcs && pl->config->legacy_pre_march2020) { 1386 /* The interface remains unchanged, only the speed, 1387 * duplex or pause settings have changed. Call the 1388 * old mac_config() method to configure the MAC/PCS 1389 * only if we do not have a legacy MAC driver. 1390 */ 1391 phylink_mac_config(pl, &link_state); 1392 } 1393 } 1394 1395 if (link_state.link != cur_link_state) { 1396 pl->old_link_state = link_state.link; 1397 if (!link_state.link) 1398 phylink_link_down(pl); 1399 else 1400 phylink_link_up(pl, link_state); 1401 } 1402 if (!link_state.link && retrigger) { 1403 pl->mac_link_dropped = false; 1404 queue_work(system_power_efficient_wq, &pl->resolve); 1405 } 1406 mutex_unlock(&pl->state_mutex); 1407 } 1408 1409 static void phylink_run_resolve(struct phylink *pl) 1410 { 1411 if (!pl->phylink_disable_state) 1412 queue_work(system_power_efficient_wq, &pl->resolve); 1413 } 1414 1415 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1416 { 1417 unsigned long state = pl->phylink_disable_state; 1418 1419 set_bit(bit, &pl->phylink_disable_state); 1420 if (state == 0) { 1421 queue_work(system_power_efficient_wq, &pl->resolve); 1422 flush_work(&pl->resolve); 1423 } 1424 } 1425 1426 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1427 { 1428 clear_bit(bit, &pl->phylink_disable_state); 1429 phylink_run_resolve(pl); 1430 } 1431 1432 static void phylink_fixed_poll(struct timer_list *t) 1433 { 1434 struct phylink *pl = container_of(t, struct phylink, link_poll); 1435 1436 mod_timer(t, jiffies + HZ); 1437 1438 phylink_run_resolve(pl); 1439 } 1440 1441 static const struct sfp_upstream_ops sfp_phylink_ops; 1442 1443 static int phylink_register_sfp(struct phylink *pl, 1444 struct fwnode_handle *fwnode) 1445 { 1446 struct sfp_bus *bus; 1447 int ret; 1448 1449 if (!fwnode) 1450 return 0; 1451 1452 bus = sfp_bus_find_fwnode(fwnode); 1453 if (IS_ERR(bus)) { 1454 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1455 return PTR_ERR(bus); 1456 } 1457 1458 pl->sfp_bus = bus; 1459 1460 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1461 sfp_bus_put(bus); 1462 1463 return ret; 1464 } 1465 1466 /** 1467 * phylink_create() - create a phylink instance 1468 * @config: a pointer to the target &struct phylink_config 1469 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1470 * interface 1471 * @iface: the desired link mode defined by &typedef phy_interface_t 1472 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1473 * 1474 * Create a new phylink instance, and parse the link parameters found in @np. 1475 * This will parse in-band modes, fixed-link or SFP configuration. 1476 * 1477 * Note: the rtnl lock must not be held when calling this function. 1478 * 1479 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1480 * must use IS_ERR() to check for errors from this function. 1481 */ 1482 struct phylink *phylink_create(struct phylink_config *config, 1483 struct fwnode_handle *fwnode, 1484 phy_interface_t iface, 1485 const struct phylink_mac_ops *mac_ops) 1486 { 1487 bool using_mac_select_pcs = false; 1488 struct phylink *pl; 1489 int ret; 1490 1491 if (mac_ops->mac_select_pcs && 1492 mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) != 1493 ERR_PTR(-EOPNOTSUPP)) 1494 using_mac_select_pcs = true; 1495 1496 /* Validate the supplied configuration */ 1497 if (using_mac_select_pcs && 1498 phy_interface_empty(config->supported_interfaces)) { 1499 dev_err(config->dev, 1500 "phylink: error: empty supported_interfaces but mac_select_pcs() method present\n"); 1501 return ERR_PTR(-EINVAL); 1502 } 1503 1504 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1505 if (!pl) 1506 return ERR_PTR(-ENOMEM); 1507 1508 mutex_init(&pl->state_mutex); 1509 INIT_WORK(&pl->resolve, phylink_resolve); 1510 1511 pl->config = config; 1512 if (config->type == PHYLINK_NETDEV) { 1513 pl->netdev = to_net_dev(config->dev); 1514 } else if (config->type == PHYLINK_DEV) { 1515 pl->dev = config->dev; 1516 } else { 1517 kfree(pl); 1518 return ERR_PTR(-EINVAL); 1519 } 1520 1521 pl->using_mac_select_pcs = using_mac_select_pcs; 1522 pl->phy_state.interface = iface; 1523 pl->link_interface = iface; 1524 if (iface == PHY_INTERFACE_MODE_MOCA) 1525 pl->link_port = PORT_BNC; 1526 else 1527 pl->link_port = PORT_MII; 1528 pl->link_config.interface = iface; 1529 pl->link_config.pause = MLO_PAUSE_AN; 1530 pl->link_config.speed = SPEED_UNKNOWN; 1531 pl->link_config.duplex = DUPLEX_UNKNOWN; 1532 pl->mac_ops = mac_ops; 1533 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1534 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1535 1536 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 1537 linkmode_copy(pl->link_config.advertising, pl->supported); 1538 phylink_validate(pl, pl->supported, &pl->link_config); 1539 1540 ret = phylink_parse_mode(pl, fwnode); 1541 if (ret < 0) { 1542 kfree(pl); 1543 return ERR_PTR(ret); 1544 } 1545 1546 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1547 ret = phylink_parse_fixedlink(pl, fwnode); 1548 if (ret < 0) { 1549 kfree(pl); 1550 return ERR_PTR(ret); 1551 } 1552 } 1553 1554 pl->cur_link_an_mode = pl->cfg_link_an_mode; 1555 1556 ret = phylink_register_sfp(pl, fwnode); 1557 if (ret < 0) { 1558 kfree(pl); 1559 return ERR_PTR(ret); 1560 } 1561 1562 return pl; 1563 } 1564 EXPORT_SYMBOL_GPL(phylink_create); 1565 1566 /** 1567 * phylink_destroy() - cleanup and destroy the phylink instance 1568 * @pl: a pointer to a &struct phylink returned from phylink_create() 1569 * 1570 * Destroy a phylink instance. Any PHY that has been attached must have been 1571 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1572 * 1573 * Note: the rtnl lock must not be held when calling this function. 1574 */ 1575 void phylink_destroy(struct phylink *pl) 1576 { 1577 sfp_bus_del_upstream(pl->sfp_bus); 1578 if (pl->link_gpio) 1579 gpiod_put(pl->link_gpio); 1580 1581 cancel_work_sync(&pl->resolve); 1582 kfree(pl); 1583 } 1584 EXPORT_SYMBOL_GPL(phylink_destroy); 1585 1586 /** 1587 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1588 * @pl: a pointer to a &struct phylink returned from phylink_create() 1589 * 1590 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1591 * no PHY is needed. 1592 * 1593 * Returns true if phylink will be expecting a PHY. 1594 */ 1595 bool phylink_expects_phy(struct phylink *pl) 1596 { 1597 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1598 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1599 phy_interface_mode_is_8023z(pl->link_config.interface))) 1600 return false; 1601 return true; 1602 } 1603 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1604 1605 static void phylink_phy_change(struct phy_device *phydev, bool up) 1606 { 1607 struct phylink *pl = phydev->phylink; 1608 bool tx_pause, rx_pause; 1609 1610 phy_get_pause(phydev, &tx_pause, &rx_pause); 1611 1612 mutex_lock(&pl->state_mutex); 1613 pl->phy_state.speed = phydev->speed; 1614 pl->phy_state.duplex = phydev->duplex; 1615 pl->phy_state.rate_matching = phydev->rate_matching; 1616 pl->phy_state.pause = MLO_PAUSE_NONE; 1617 if (tx_pause) 1618 pl->phy_state.pause |= MLO_PAUSE_TX; 1619 if (rx_pause) 1620 pl->phy_state.pause |= MLO_PAUSE_RX; 1621 pl->phy_state.interface = phydev->interface; 1622 pl->phy_state.link = up; 1623 mutex_unlock(&pl->state_mutex); 1624 1625 phylink_run_resolve(pl); 1626 1627 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down", 1628 phy_modes(phydev->interface), 1629 phy_speed_to_str(phydev->speed), 1630 phy_duplex_to_str(phydev->duplex), 1631 phy_rate_matching_to_str(phydev->rate_matching), 1632 phylink_pause_to_str(pl->phy_state.pause)); 1633 } 1634 1635 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 1636 phy_interface_t interface) 1637 { 1638 struct phylink_link_state config; 1639 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 1640 char *irq_str; 1641 int ret; 1642 1643 /* 1644 * This is the new way of dealing with flow control for PHYs, 1645 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 1646 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 1647 * using our validate call to the MAC, we rely upon the MAC 1648 * clearing the bits from both supported and advertising fields. 1649 */ 1650 phy_support_asym_pause(phy); 1651 1652 memset(&config, 0, sizeof(config)); 1653 linkmode_copy(supported, phy->supported); 1654 linkmode_copy(config.advertising, phy->advertising); 1655 1656 /* Check whether we would use rate matching for the proposed interface 1657 * mode. 1658 */ 1659 config.rate_matching = phy_get_rate_matching(phy, interface); 1660 1661 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 1662 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 1663 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 1664 * their Serdes is either unnecessary or not reasonable. 1665 * 1666 * For these which switch interface modes, we really need to know which 1667 * interface modes the PHY supports to properly work out which ethtool 1668 * linkmodes can be supported. For now, as a work-around, we validate 1669 * against all interface modes, which may lead to more ethtool link 1670 * modes being advertised than are actually supported. 1671 */ 1672 if (phy->is_c45 && config.rate_matching == RATE_MATCH_NONE && 1673 interface != PHY_INTERFACE_MODE_RXAUI && 1674 interface != PHY_INTERFACE_MODE_XAUI && 1675 interface != PHY_INTERFACE_MODE_USXGMII) 1676 config.interface = PHY_INTERFACE_MODE_NA; 1677 else 1678 config.interface = interface; 1679 1680 ret = phylink_validate(pl, supported, &config); 1681 if (ret) { 1682 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 1683 phy_modes(config.interface), 1684 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 1685 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 1686 ERR_PTR(ret)); 1687 return ret; 1688 } 1689 1690 phy->phylink = pl; 1691 phy->phy_link_change = phylink_phy_change; 1692 1693 irq_str = phy_attached_info_irq(phy); 1694 phylink_info(pl, 1695 "PHY [%s] driver [%s] (irq=%s)\n", 1696 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 1697 kfree(irq_str); 1698 1699 mutex_lock(&phy->lock); 1700 mutex_lock(&pl->state_mutex); 1701 pl->phydev = phy; 1702 pl->phy_state.interface = interface; 1703 pl->phy_state.pause = MLO_PAUSE_NONE; 1704 pl->phy_state.speed = SPEED_UNKNOWN; 1705 pl->phy_state.duplex = DUPLEX_UNKNOWN; 1706 pl->phy_state.rate_matching = RATE_MATCH_NONE; 1707 linkmode_copy(pl->supported, supported); 1708 linkmode_copy(pl->link_config.advertising, config.advertising); 1709 1710 /* Restrict the phy advertisement according to the MAC support. */ 1711 linkmode_copy(phy->advertising, config.advertising); 1712 mutex_unlock(&pl->state_mutex); 1713 mutex_unlock(&phy->lock); 1714 1715 phylink_dbg(pl, 1716 "phy: %s setting supported %*pb advertising %*pb\n", 1717 phy_modes(interface), 1718 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 1719 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 1720 1721 if (phy_interrupt_is_valid(phy)) 1722 phy_request_interrupt(phy); 1723 1724 if (pl->config->mac_managed_pm) 1725 phy->mac_managed_pm = true; 1726 1727 return 0; 1728 } 1729 1730 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 1731 phy_interface_t interface) 1732 { 1733 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 1734 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1735 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 1736 return -EINVAL; 1737 1738 if (pl->phydev) 1739 return -EBUSY; 1740 1741 return phy_attach_direct(pl->netdev, phy, 0, interface); 1742 } 1743 1744 /** 1745 * phylink_connect_phy() - connect a PHY to the phylink instance 1746 * @pl: a pointer to a &struct phylink returned from phylink_create() 1747 * @phy: a pointer to a &struct phy_device. 1748 * 1749 * Connect @phy to the phylink instance specified by @pl by calling 1750 * phy_attach_direct(). Configure the @phy according to the MAC driver's 1751 * capabilities, start the PHYLIB state machine and enable any interrupts 1752 * that the PHY supports. 1753 * 1754 * This updates the phylink's ethtool supported and advertising link mode 1755 * masks. 1756 * 1757 * Returns 0 on success or a negative errno. 1758 */ 1759 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 1760 { 1761 int ret; 1762 1763 /* Use PHY device/driver interface */ 1764 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1765 pl->link_interface = phy->interface; 1766 pl->link_config.interface = pl->link_interface; 1767 } 1768 1769 ret = phylink_attach_phy(pl, phy, pl->link_interface); 1770 if (ret < 0) 1771 return ret; 1772 1773 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 1774 if (ret) 1775 phy_detach(phy); 1776 1777 return ret; 1778 } 1779 EXPORT_SYMBOL_GPL(phylink_connect_phy); 1780 1781 /** 1782 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 1783 * @pl: a pointer to a &struct phylink returned from phylink_create() 1784 * @dn: a pointer to a &struct device_node. 1785 * @flags: PHY-specific flags to communicate to the PHY device driver 1786 * 1787 * Connect the phy specified in the device node @dn to the phylink instance 1788 * specified by @pl. Actions specified in phylink_connect_phy() will be 1789 * performed. 1790 * 1791 * Returns 0 on success or a negative errno. 1792 */ 1793 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 1794 u32 flags) 1795 { 1796 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 1797 } 1798 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 1799 1800 /** 1801 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 1802 * @pl: a pointer to a &struct phylink returned from phylink_create() 1803 * @fwnode: a pointer to a &struct fwnode_handle. 1804 * @flags: PHY-specific flags to communicate to the PHY device driver 1805 * 1806 * Connect the phy specified @fwnode to the phylink instance specified 1807 * by @pl. 1808 * 1809 * Returns 0 on success or a negative errno. 1810 */ 1811 int phylink_fwnode_phy_connect(struct phylink *pl, 1812 struct fwnode_handle *fwnode, 1813 u32 flags) 1814 { 1815 struct fwnode_handle *phy_fwnode; 1816 struct phy_device *phy_dev; 1817 int ret; 1818 1819 /* Fixed links and 802.3z are handled without needing a PHY */ 1820 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1821 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1822 phy_interface_mode_is_8023z(pl->link_interface))) 1823 return 0; 1824 1825 phy_fwnode = fwnode_get_phy_node(fwnode); 1826 if (IS_ERR(phy_fwnode)) { 1827 if (pl->cfg_link_an_mode == MLO_AN_PHY) 1828 return -ENODEV; 1829 return 0; 1830 } 1831 1832 phy_dev = fwnode_phy_find_device(phy_fwnode); 1833 /* We're done with the phy_node handle */ 1834 fwnode_handle_put(phy_fwnode); 1835 if (!phy_dev) 1836 return -ENODEV; 1837 1838 /* Use PHY device/driver interface */ 1839 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1840 pl->link_interface = phy_dev->interface; 1841 pl->link_config.interface = pl->link_interface; 1842 } 1843 1844 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 1845 pl->link_interface); 1846 phy_device_free(phy_dev); 1847 if (ret) 1848 return ret; 1849 1850 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 1851 if (ret) 1852 phy_detach(phy_dev); 1853 1854 return ret; 1855 } 1856 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 1857 1858 /** 1859 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 1860 * instance. 1861 * @pl: a pointer to a &struct phylink returned from phylink_create() 1862 * 1863 * Disconnect any current PHY from the phylink instance described by @pl. 1864 */ 1865 void phylink_disconnect_phy(struct phylink *pl) 1866 { 1867 struct phy_device *phy; 1868 1869 ASSERT_RTNL(); 1870 1871 phy = pl->phydev; 1872 if (phy) { 1873 mutex_lock(&phy->lock); 1874 mutex_lock(&pl->state_mutex); 1875 pl->phydev = NULL; 1876 mutex_unlock(&pl->state_mutex); 1877 mutex_unlock(&phy->lock); 1878 flush_work(&pl->resolve); 1879 1880 phy_disconnect(phy); 1881 } 1882 } 1883 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 1884 1885 /** 1886 * phylink_mac_change() - notify phylink of a change in MAC state 1887 * @pl: a pointer to a &struct phylink returned from phylink_create() 1888 * @up: indicates whether the link is currently up. 1889 * 1890 * The MAC driver should call this driver when the state of its link 1891 * changes (eg, link failure, new negotiation results, etc.) 1892 */ 1893 void phylink_mac_change(struct phylink *pl, bool up) 1894 { 1895 if (!up) 1896 pl->mac_link_dropped = true; 1897 phylink_run_resolve(pl); 1898 phylink_dbg(pl, "mac link %s\n", up ? "up" : "down"); 1899 } 1900 EXPORT_SYMBOL_GPL(phylink_mac_change); 1901 1902 static irqreturn_t phylink_link_handler(int irq, void *data) 1903 { 1904 struct phylink *pl = data; 1905 1906 phylink_run_resolve(pl); 1907 1908 return IRQ_HANDLED; 1909 } 1910 1911 /** 1912 * phylink_start() - start a phylink instance 1913 * @pl: a pointer to a &struct phylink returned from phylink_create() 1914 * 1915 * Start the phylink instance specified by @pl, configuring the MAC for the 1916 * desired link mode(s) and negotiation style. This should be called from the 1917 * network device driver's &struct net_device_ops ndo_open() method. 1918 */ 1919 void phylink_start(struct phylink *pl) 1920 { 1921 bool poll = false; 1922 1923 ASSERT_RTNL(); 1924 1925 phylink_info(pl, "configuring for %s/%s link mode\n", 1926 phylink_an_mode_str(pl->cur_link_an_mode), 1927 phy_modes(pl->link_config.interface)); 1928 1929 /* Always set the carrier off */ 1930 if (pl->netdev) 1931 netif_carrier_off(pl->netdev); 1932 1933 /* Apply the link configuration to the MAC when starting. This allows 1934 * a fixed-link to start with the correct parameters, and also 1935 * ensures that we set the appropriate advertisement for Serdes links. 1936 * 1937 * Restart autonegotiation if using 802.3z to ensure that the link 1938 * parameters are properly negotiated. This is necessary for DSA 1939 * switches using 802.3z negotiation to ensure they see our modes. 1940 */ 1941 phylink_mac_initial_config(pl, true); 1942 1943 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 1944 1945 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 1946 int irq = gpiod_to_irq(pl->link_gpio); 1947 1948 if (irq > 0) { 1949 if (!request_irq(irq, phylink_link_handler, 1950 IRQF_TRIGGER_RISING | 1951 IRQF_TRIGGER_FALLING, 1952 "netdev link", pl)) 1953 pl->link_irq = irq; 1954 else 1955 irq = 0; 1956 } 1957 if (irq <= 0) 1958 poll = true; 1959 } 1960 1961 switch (pl->cfg_link_an_mode) { 1962 case MLO_AN_FIXED: 1963 poll |= pl->config->poll_fixed_state; 1964 break; 1965 case MLO_AN_INBAND: 1966 if (pl->pcs) 1967 poll |= pl->pcs->poll; 1968 break; 1969 } 1970 if (poll) 1971 mod_timer(&pl->link_poll, jiffies + HZ); 1972 if (pl->phydev) 1973 phy_start(pl->phydev); 1974 if (pl->sfp_bus) 1975 sfp_upstream_start(pl->sfp_bus); 1976 } 1977 EXPORT_SYMBOL_GPL(phylink_start); 1978 1979 /** 1980 * phylink_stop() - stop a phylink instance 1981 * @pl: a pointer to a &struct phylink returned from phylink_create() 1982 * 1983 * Stop the phylink instance specified by @pl. This should be called from the 1984 * network device driver's &struct net_device_ops ndo_stop() method. The 1985 * network device's carrier state should not be changed prior to calling this 1986 * function. 1987 * 1988 * This will synchronously bring down the link if the link is not already 1989 * down (in other words, it will trigger a mac_link_down() method call.) 1990 */ 1991 void phylink_stop(struct phylink *pl) 1992 { 1993 ASSERT_RTNL(); 1994 1995 if (pl->sfp_bus) 1996 sfp_upstream_stop(pl->sfp_bus); 1997 if (pl->phydev) 1998 phy_stop(pl->phydev); 1999 del_timer_sync(&pl->link_poll); 2000 if (pl->link_irq) { 2001 free_irq(pl->link_irq, pl); 2002 pl->link_irq = 0; 2003 } 2004 2005 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2006 } 2007 EXPORT_SYMBOL_GPL(phylink_stop); 2008 2009 /** 2010 * phylink_suspend() - handle a network device suspend event 2011 * @pl: a pointer to a &struct phylink returned from phylink_create() 2012 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2013 * 2014 * Handle a network device suspend event. There are several cases: 2015 * 2016 * - If Wake-on-Lan is not active, we can bring down the link between 2017 * the MAC and PHY by calling phylink_stop(). 2018 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2019 * can also bring down the link between the MAC and PHY. 2020 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2021 * still needs to receive packets, so we can not bring the link down. 2022 */ 2023 void phylink_suspend(struct phylink *pl, bool mac_wol) 2024 { 2025 ASSERT_RTNL(); 2026 2027 if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) { 2028 /* Wake-on-Lan enabled, MAC handling */ 2029 mutex_lock(&pl->state_mutex); 2030 2031 /* Stop the resolver bringing the link up */ 2032 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2033 2034 /* Disable the carrier, to prevent transmit timeouts, 2035 * but one would hope all packets have been sent. This 2036 * also means phylink_resolve() will do nothing. 2037 */ 2038 if (pl->netdev) 2039 netif_carrier_off(pl->netdev); 2040 else 2041 pl->old_link_state = false; 2042 2043 /* We do not call mac_link_down() here as we want the 2044 * link to remain up to receive the WoL packets. 2045 */ 2046 mutex_unlock(&pl->state_mutex); 2047 } else { 2048 phylink_stop(pl); 2049 } 2050 } 2051 EXPORT_SYMBOL_GPL(phylink_suspend); 2052 2053 /** 2054 * phylink_resume() - handle a network device resume event 2055 * @pl: a pointer to a &struct phylink returned from phylink_create() 2056 * 2057 * Undo the effects of phylink_suspend(), returning the link to an 2058 * operational state. 2059 */ 2060 void phylink_resume(struct phylink *pl) 2061 { 2062 ASSERT_RTNL(); 2063 2064 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2065 /* Wake-on-Lan enabled, MAC handling */ 2066 2067 /* Call mac_link_down() so we keep the overall state balanced. 2068 * Do this under the state_mutex lock for consistency. This 2069 * will cause a "Link Down" message to be printed during 2070 * resume, which is harmless - the true link state will be 2071 * printed when we run a resolve. 2072 */ 2073 mutex_lock(&pl->state_mutex); 2074 phylink_link_down(pl); 2075 mutex_unlock(&pl->state_mutex); 2076 2077 /* Re-apply the link parameters so that all the settings get 2078 * restored to the MAC. 2079 */ 2080 phylink_mac_initial_config(pl, true); 2081 2082 /* Re-enable and re-resolve the link parameters */ 2083 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2084 } else { 2085 phylink_start(pl); 2086 } 2087 } 2088 EXPORT_SYMBOL_GPL(phylink_resume); 2089 2090 /** 2091 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2092 * @pl: a pointer to a &struct phylink returned from phylink_create() 2093 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2094 * 2095 * Read the wake on lan parameters from the PHY attached to the phylink 2096 * instance specified by @pl. If no PHY is currently attached, report no 2097 * support for wake on lan. 2098 */ 2099 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2100 { 2101 ASSERT_RTNL(); 2102 2103 wol->supported = 0; 2104 wol->wolopts = 0; 2105 2106 if (pl->phydev) 2107 phy_ethtool_get_wol(pl->phydev, wol); 2108 } 2109 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2110 2111 /** 2112 * phylink_ethtool_set_wol() - set wake on lan parameters 2113 * @pl: a pointer to a &struct phylink returned from phylink_create() 2114 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2115 * 2116 * Set the wake on lan parameters for the PHY attached to the phylink 2117 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2118 * error. 2119 * 2120 * Returns zero on success or negative errno code. 2121 */ 2122 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2123 { 2124 int ret = -EOPNOTSUPP; 2125 2126 ASSERT_RTNL(); 2127 2128 if (pl->phydev) 2129 ret = phy_ethtool_set_wol(pl->phydev, wol); 2130 2131 return ret; 2132 } 2133 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2134 2135 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2136 { 2137 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2138 2139 linkmode_zero(mask); 2140 phylink_set_port_modes(mask); 2141 2142 linkmode_and(dst, dst, mask); 2143 linkmode_or(dst, dst, b); 2144 } 2145 2146 static void phylink_get_ksettings(const struct phylink_link_state *state, 2147 struct ethtool_link_ksettings *kset) 2148 { 2149 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2150 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2151 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2152 kset->base.speed = state->speed; 2153 kset->base.duplex = state->duplex; 2154 } 2155 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2156 state->advertising) ? 2157 AUTONEG_ENABLE : AUTONEG_DISABLE; 2158 } 2159 2160 /** 2161 * phylink_ethtool_ksettings_get() - get the current link settings 2162 * @pl: a pointer to a &struct phylink returned from phylink_create() 2163 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2164 * 2165 * Read the current link settings for the phylink instance specified by @pl. 2166 * This will be the link settings read from the MAC, PHY or fixed link 2167 * settings depending on the current negotiation mode. 2168 */ 2169 int phylink_ethtool_ksettings_get(struct phylink *pl, 2170 struct ethtool_link_ksettings *kset) 2171 { 2172 struct phylink_link_state link_state; 2173 2174 ASSERT_RTNL(); 2175 2176 if (pl->phydev) 2177 phy_ethtool_ksettings_get(pl->phydev, kset); 2178 else 2179 kset->base.port = pl->link_port; 2180 2181 linkmode_copy(kset->link_modes.supported, pl->supported); 2182 2183 switch (pl->cur_link_an_mode) { 2184 case MLO_AN_FIXED: 2185 /* We are using fixed settings. Report these as the 2186 * current link settings - and note that these also 2187 * represent the supported speeds/duplex/pause modes. 2188 */ 2189 phylink_get_fixed_state(pl, &link_state); 2190 phylink_get_ksettings(&link_state, kset); 2191 break; 2192 2193 case MLO_AN_INBAND: 2194 /* If there is a phy attached, then use the reported 2195 * settings from the phy with no modification. 2196 */ 2197 if (pl->phydev) 2198 break; 2199 2200 phylink_mac_pcs_get_state(pl, &link_state); 2201 2202 /* The MAC is reporting the link results from its own PCS 2203 * layer via in-band status. Report these as the current 2204 * link settings. 2205 */ 2206 phylink_get_ksettings(&link_state, kset); 2207 break; 2208 } 2209 2210 return 0; 2211 } 2212 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2213 2214 /** 2215 * phylink_ethtool_ksettings_set() - set the link settings 2216 * @pl: a pointer to a &struct phylink returned from phylink_create() 2217 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2218 */ 2219 int phylink_ethtool_ksettings_set(struct phylink *pl, 2220 const struct ethtool_link_ksettings *kset) 2221 { 2222 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2223 struct phylink_link_state config; 2224 const struct phy_setting *s; 2225 2226 ASSERT_RTNL(); 2227 2228 /* Mask out unsupported advertisements */ 2229 linkmode_and(config.advertising, kset->link_modes.advertising, 2230 pl->supported); 2231 2232 if (pl->phydev) { 2233 /* We can rely on phylib for this update; we also do not need 2234 * to update the pl->link_config settings: 2235 * - the configuration returned via ksettings_get() will come 2236 * from phylib whenever a PHY is present. 2237 * - link_config.interface will be updated by the PHY calling 2238 * back via phylink_phy_change() and a subsequent resolve. 2239 * - initial link configuration for PHY mode comes from the 2240 * last phy state updated via phylink_phy_change(). 2241 * - other configuration changes (e.g. pause modes) are 2242 * performed directly via phylib. 2243 * - if in in-band mode with a PHY, the link configuration 2244 * is passed on the link from the PHY, and all of 2245 * link_config.{speed,duplex,an_enabled,pause} are not used. 2246 * - the only possible use would be link_config.advertising 2247 * pause modes when in 1000base-X mode with a PHY, but in 2248 * the presence of a PHY, this should not be changed as that 2249 * should be determined from the media side advertisement. 2250 */ 2251 return phy_ethtool_ksettings_set(pl->phydev, kset); 2252 } 2253 2254 config = pl->link_config; 2255 2256 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 2257 switch (kset->base.autoneg) { 2258 case AUTONEG_DISABLE: 2259 /* Autonegotiation disabled, select a suitable speed and 2260 * duplex. 2261 */ 2262 s = phy_lookup_setting(kset->base.speed, kset->base.duplex, 2263 pl->supported, false); 2264 if (!s) 2265 return -EINVAL; 2266 2267 /* If we have a fixed link, refuse to change link parameters. 2268 * If the link parameters match, accept them but do nothing. 2269 */ 2270 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2271 if (s->speed != pl->link_config.speed || 2272 s->duplex != pl->link_config.duplex) 2273 return -EINVAL; 2274 return 0; 2275 } 2276 2277 config.speed = s->speed; 2278 config.duplex = s->duplex; 2279 break; 2280 2281 case AUTONEG_ENABLE: 2282 /* If we have a fixed link, allow autonegotiation (since that 2283 * is our default case) but do not allow the advertisement to 2284 * be changed. If the advertisement matches, simply return. 2285 */ 2286 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2287 if (!linkmode_equal(config.advertising, 2288 pl->link_config.advertising)) 2289 return -EINVAL; 2290 return 0; 2291 } 2292 2293 config.speed = SPEED_UNKNOWN; 2294 config.duplex = DUPLEX_UNKNOWN; 2295 break; 2296 2297 default: 2298 return -EINVAL; 2299 } 2300 2301 /* We have ruled out the case with a PHY attached, and the 2302 * fixed-link cases. All that is left are in-band links. 2303 */ 2304 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2305 kset->base.autoneg == AUTONEG_ENABLE); 2306 2307 /* If this link is with an SFP, ensure that changes to advertised modes 2308 * also cause the associated interface to be selected such that the 2309 * link can be configured correctly. 2310 */ 2311 if (pl->sfp_bus) { 2312 config.interface = sfp_select_interface(pl->sfp_bus, 2313 config.advertising); 2314 if (config.interface == PHY_INTERFACE_MODE_NA) { 2315 phylink_err(pl, 2316 "selection of interface failed, advertisement %*pb\n", 2317 __ETHTOOL_LINK_MODE_MASK_NBITS, 2318 config.advertising); 2319 return -EINVAL; 2320 } 2321 2322 /* Revalidate with the selected interface */ 2323 linkmode_copy(support, pl->supported); 2324 if (phylink_validate(pl, support, &config)) { 2325 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2326 phylink_an_mode_str(pl->cur_link_an_mode), 2327 phy_modes(config.interface), 2328 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2329 return -EINVAL; 2330 } 2331 } else { 2332 /* Validate without changing the current supported mask. */ 2333 linkmode_copy(support, pl->supported); 2334 if (phylink_validate(pl, support, &config)) 2335 return -EINVAL; 2336 } 2337 2338 /* If autonegotiation is enabled, we must have an advertisement */ 2339 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2340 config.advertising) && 2341 phylink_is_empty_linkmode(config.advertising)) 2342 return -EINVAL; 2343 2344 mutex_lock(&pl->state_mutex); 2345 pl->link_config.speed = config.speed; 2346 pl->link_config.duplex = config.duplex; 2347 2348 if (pl->link_config.interface != config.interface) { 2349 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2350 /* We need to force the link down, then change the interface */ 2351 if (pl->old_link_state) { 2352 phylink_link_down(pl); 2353 pl->old_link_state = false; 2354 } 2355 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2356 &pl->phylink_disable_state)) 2357 phylink_major_config(pl, false, &config); 2358 pl->link_config.interface = config.interface; 2359 linkmode_copy(pl->link_config.advertising, config.advertising); 2360 } else if (!linkmode_equal(pl->link_config.advertising, 2361 config.advertising)) { 2362 linkmode_copy(pl->link_config.advertising, config.advertising); 2363 phylink_change_inband_advert(pl); 2364 } 2365 mutex_unlock(&pl->state_mutex); 2366 2367 return 0; 2368 } 2369 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 2370 2371 /** 2372 * phylink_ethtool_nway_reset() - restart negotiation 2373 * @pl: a pointer to a &struct phylink returned from phylink_create() 2374 * 2375 * Restart negotiation for the phylink instance specified by @pl. This will 2376 * cause any attached phy to restart negotiation with the link partner, and 2377 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 2378 * negotiation. 2379 * 2380 * Returns zero on success, or negative error code. 2381 */ 2382 int phylink_ethtool_nway_reset(struct phylink *pl) 2383 { 2384 int ret = 0; 2385 2386 ASSERT_RTNL(); 2387 2388 if (pl->phydev) 2389 ret = phy_restart_aneg(pl->phydev); 2390 phylink_mac_pcs_an_restart(pl); 2391 2392 return ret; 2393 } 2394 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 2395 2396 /** 2397 * phylink_ethtool_get_pauseparam() - get the current pause parameters 2398 * @pl: a pointer to a &struct phylink returned from phylink_create() 2399 * @pause: a pointer to a &struct ethtool_pauseparam 2400 */ 2401 void phylink_ethtool_get_pauseparam(struct phylink *pl, 2402 struct ethtool_pauseparam *pause) 2403 { 2404 ASSERT_RTNL(); 2405 2406 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 2407 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 2408 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 2409 } 2410 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 2411 2412 /** 2413 * phylink_ethtool_set_pauseparam() - set the current pause parameters 2414 * @pl: a pointer to a &struct phylink returned from phylink_create() 2415 * @pause: a pointer to a &struct ethtool_pauseparam 2416 */ 2417 int phylink_ethtool_set_pauseparam(struct phylink *pl, 2418 struct ethtool_pauseparam *pause) 2419 { 2420 struct phylink_link_state *config = &pl->link_config; 2421 bool manual_changed; 2422 int pause_state; 2423 2424 ASSERT_RTNL(); 2425 2426 if (pl->cur_link_an_mode == MLO_AN_FIXED) 2427 return -EOPNOTSUPP; 2428 2429 if (!phylink_test(pl->supported, Pause) && 2430 !phylink_test(pl->supported, Asym_Pause)) 2431 return -EOPNOTSUPP; 2432 2433 if (!phylink_test(pl->supported, Asym_Pause) && 2434 pause->rx_pause != pause->tx_pause) 2435 return -EINVAL; 2436 2437 pause_state = 0; 2438 if (pause->autoneg) 2439 pause_state |= MLO_PAUSE_AN; 2440 if (pause->rx_pause) 2441 pause_state |= MLO_PAUSE_RX; 2442 if (pause->tx_pause) 2443 pause_state |= MLO_PAUSE_TX; 2444 2445 mutex_lock(&pl->state_mutex); 2446 /* 2447 * See the comments for linkmode_set_pause(), wrt the deficiencies 2448 * with the current implementation. A solution to this issue would 2449 * be: 2450 * ethtool Local device 2451 * rx tx Pause AsymDir 2452 * 0 0 0 0 2453 * 1 0 1 1 2454 * 0 1 0 1 2455 * 1 1 1 1 2456 * and then use the ethtool rx/tx enablement status to mask the 2457 * rx/tx pause resolution. 2458 */ 2459 linkmode_set_pause(config->advertising, pause->tx_pause, 2460 pause->rx_pause); 2461 2462 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 2463 (!(pause_state & MLO_PAUSE_AN) && 2464 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 2465 2466 config->pause = pause_state; 2467 2468 /* Update our in-band advertisement, triggering a renegotiation if 2469 * the advertisement changed. 2470 */ 2471 if (!pl->phydev) 2472 phylink_change_inband_advert(pl); 2473 2474 mutex_unlock(&pl->state_mutex); 2475 2476 /* If we have a PHY, a change of the pause frame advertisement will 2477 * cause phylib to renegotiate (if AN is enabled) which will in turn 2478 * call our phylink_phy_change() and trigger a resolve. Note that 2479 * we can't hold our state mutex while calling phy_set_asym_pause(). 2480 */ 2481 if (pl->phydev) 2482 phy_set_asym_pause(pl->phydev, pause->rx_pause, 2483 pause->tx_pause); 2484 2485 /* If the manual pause settings changed, make sure we trigger a 2486 * resolve to update their state; we can not guarantee that the 2487 * link will cycle. 2488 */ 2489 if (manual_changed) { 2490 pl->mac_link_dropped = true; 2491 phylink_run_resolve(pl); 2492 } 2493 2494 return 0; 2495 } 2496 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 2497 2498 /** 2499 * phylink_get_eee_err() - read the energy efficient ethernet error 2500 * counter 2501 * @pl: a pointer to a &struct phylink returned from phylink_create(). 2502 * 2503 * Read the Energy Efficient Ethernet error counter from the PHY associated 2504 * with the phylink instance specified by @pl. 2505 * 2506 * Returns positive error counter value, or negative error code. 2507 */ 2508 int phylink_get_eee_err(struct phylink *pl) 2509 { 2510 int ret = 0; 2511 2512 ASSERT_RTNL(); 2513 2514 if (pl->phydev) 2515 ret = phy_get_eee_err(pl->phydev); 2516 2517 return ret; 2518 } 2519 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 2520 2521 /** 2522 * phylink_init_eee() - init and check the EEE features 2523 * @pl: a pointer to a &struct phylink returned from phylink_create() 2524 * @clk_stop_enable: allow PHY to stop receive clock 2525 * 2526 * Must be called either with RTNL held or within mac_link_up() 2527 */ 2528 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) 2529 { 2530 int ret = -EOPNOTSUPP; 2531 2532 if (pl->phydev) 2533 ret = phy_init_eee(pl->phydev, clk_stop_enable); 2534 2535 return ret; 2536 } 2537 EXPORT_SYMBOL_GPL(phylink_init_eee); 2538 2539 /** 2540 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 2541 * @pl: a pointer to a &struct phylink returned from phylink_create() 2542 * @eee: a pointer to a &struct ethtool_eee for the read parameters 2543 */ 2544 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee) 2545 { 2546 int ret = -EOPNOTSUPP; 2547 2548 ASSERT_RTNL(); 2549 2550 if (pl->phydev) 2551 ret = phy_ethtool_get_eee(pl->phydev, eee); 2552 2553 return ret; 2554 } 2555 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 2556 2557 /** 2558 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 2559 * @pl: a pointer to a &struct phylink returned from phylink_create() 2560 * @eee: a pointer to a &struct ethtool_eee for the desired parameters 2561 */ 2562 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee) 2563 { 2564 int ret = -EOPNOTSUPP; 2565 2566 ASSERT_RTNL(); 2567 2568 if (pl->phydev) 2569 ret = phy_ethtool_set_eee(pl->phydev, eee); 2570 2571 return ret; 2572 } 2573 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 2574 2575 /* This emulates MII registers for a fixed-mode phy operating as per the 2576 * passed in state. "aneg" defines if we report negotiation is possible. 2577 * 2578 * FIXME: should deal with negotiation state too. 2579 */ 2580 static int phylink_mii_emul_read(unsigned int reg, 2581 struct phylink_link_state *state) 2582 { 2583 struct fixed_phy_status fs; 2584 unsigned long *lpa = state->lp_advertising; 2585 int val; 2586 2587 fs.link = state->link; 2588 fs.speed = state->speed; 2589 fs.duplex = state->duplex; 2590 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 2591 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 2592 2593 val = swphy_read_reg(reg, &fs); 2594 if (reg == MII_BMSR) { 2595 if (!state->an_complete) 2596 val &= ~BMSR_ANEGCOMPLETE; 2597 } 2598 return val; 2599 } 2600 2601 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 2602 unsigned int reg) 2603 { 2604 struct phy_device *phydev = pl->phydev; 2605 int prtad, devad; 2606 2607 if (mdio_phy_id_is_c45(phy_id)) { 2608 prtad = mdio_phy_id_prtad(phy_id); 2609 devad = mdio_phy_id_devad(phy_id); 2610 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2611 reg); 2612 } 2613 2614 if (phydev->is_c45) { 2615 switch (reg) { 2616 case MII_BMCR: 2617 case MII_BMSR: 2618 case MII_PHYSID1: 2619 case MII_PHYSID2: 2620 devad = __ffs(phydev->c45_ids.mmds_present); 2621 break; 2622 case MII_ADVERTISE: 2623 case MII_LPA: 2624 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2625 return -EINVAL; 2626 devad = MDIO_MMD_AN; 2627 if (reg == MII_ADVERTISE) 2628 reg = MDIO_AN_ADVERTISE; 2629 else 2630 reg = MDIO_AN_LPA; 2631 break; 2632 default: 2633 return -EINVAL; 2634 } 2635 prtad = phy_id; 2636 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2637 reg); 2638 } 2639 2640 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 2641 } 2642 2643 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 2644 unsigned int reg, unsigned int val) 2645 { 2646 struct phy_device *phydev = pl->phydev; 2647 int prtad, devad; 2648 2649 if (mdio_phy_id_is_c45(phy_id)) { 2650 prtad = mdio_phy_id_prtad(phy_id); 2651 devad = mdio_phy_id_devad(phy_id); 2652 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 2653 reg, val); 2654 } 2655 2656 if (phydev->is_c45) { 2657 switch (reg) { 2658 case MII_BMCR: 2659 case MII_BMSR: 2660 case MII_PHYSID1: 2661 case MII_PHYSID2: 2662 devad = __ffs(phydev->c45_ids.mmds_present); 2663 break; 2664 case MII_ADVERTISE: 2665 case MII_LPA: 2666 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2667 return -EINVAL; 2668 devad = MDIO_MMD_AN; 2669 if (reg == MII_ADVERTISE) 2670 reg = MDIO_AN_ADVERTISE; 2671 else 2672 reg = MDIO_AN_LPA; 2673 break; 2674 default: 2675 return -EINVAL; 2676 } 2677 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 2678 reg, val); 2679 } 2680 2681 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 2682 } 2683 2684 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 2685 unsigned int reg) 2686 { 2687 struct phylink_link_state state; 2688 int val = 0xffff; 2689 2690 switch (pl->cur_link_an_mode) { 2691 case MLO_AN_FIXED: 2692 if (phy_id == 0) { 2693 phylink_get_fixed_state(pl, &state); 2694 val = phylink_mii_emul_read(reg, &state); 2695 } 2696 break; 2697 2698 case MLO_AN_PHY: 2699 return -EOPNOTSUPP; 2700 2701 case MLO_AN_INBAND: 2702 if (phy_id == 0) { 2703 phylink_mac_pcs_get_state(pl, &state); 2704 val = phylink_mii_emul_read(reg, &state); 2705 } 2706 break; 2707 } 2708 2709 return val & 0xffff; 2710 } 2711 2712 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 2713 unsigned int reg, unsigned int val) 2714 { 2715 switch (pl->cur_link_an_mode) { 2716 case MLO_AN_FIXED: 2717 break; 2718 2719 case MLO_AN_PHY: 2720 return -EOPNOTSUPP; 2721 2722 case MLO_AN_INBAND: 2723 break; 2724 } 2725 2726 return 0; 2727 } 2728 2729 /** 2730 * phylink_mii_ioctl() - generic mii ioctl interface 2731 * @pl: a pointer to a &struct phylink returned from phylink_create() 2732 * @ifr: a pointer to a &struct ifreq for socket ioctls 2733 * @cmd: ioctl cmd to execute 2734 * 2735 * Perform the specified MII ioctl on the PHY attached to the phylink instance 2736 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 2737 * 2738 * Returns: zero on success or negative error code. 2739 * 2740 * %SIOCGMIIPHY: 2741 * read register from the current PHY. 2742 * %SIOCGMIIREG: 2743 * read register from the specified PHY. 2744 * %SIOCSMIIREG: 2745 * set a register on the specified PHY. 2746 */ 2747 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 2748 { 2749 struct mii_ioctl_data *mii = if_mii(ifr); 2750 int ret; 2751 2752 ASSERT_RTNL(); 2753 2754 if (pl->phydev) { 2755 /* PHYs only exist for MLO_AN_PHY and SGMII */ 2756 switch (cmd) { 2757 case SIOCGMIIPHY: 2758 mii->phy_id = pl->phydev->mdio.addr; 2759 fallthrough; 2760 2761 case SIOCGMIIREG: 2762 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 2763 if (ret >= 0) { 2764 mii->val_out = ret; 2765 ret = 0; 2766 } 2767 break; 2768 2769 case SIOCSMIIREG: 2770 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 2771 mii->val_in); 2772 break; 2773 2774 default: 2775 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 2776 break; 2777 } 2778 } else { 2779 switch (cmd) { 2780 case SIOCGMIIPHY: 2781 mii->phy_id = 0; 2782 fallthrough; 2783 2784 case SIOCGMIIREG: 2785 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 2786 if (ret >= 0) { 2787 mii->val_out = ret; 2788 ret = 0; 2789 } 2790 break; 2791 2792 case SIOCSMIIREG: 2793 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 2794 mii->val_in); 2795 break; 2796 2797 default: 2798 ret = -EOPNOTSUPP; 2799 break; 2800 } 2801 } 2802 2803 return ret; 2804 } 2805 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 2806 2807 /** 2808 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 2809 * link partners 2810 * @pl: a pointer to a &struct phylink returned from phylink_create() 2811 * @sync: perform action synchronously 2812 * 2813 * If we have a PHY that is not part of a SFP module, then set the speed 2814 * as described in the phy_speed_down() function. Please see this function 2815 * for a description of the @sync parameter. 2816 * 2817 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 2818 */ 2819 int phylink_speed_down(struct phylink *pl, bool sync) 2820 { 2821 int ret = 0; 2822 2823 ASSERT_RTNL(); 2824 2825 if (!pl->sfp_bus && pl->phydev) 2826 ret = phy_speed_down(pl->phydev, sync); 2827 2828 return ret; 2829 } 2830 EXPORT_SYMBOL_GPL(phylink_speed_down); 2831 2832 /** 2833 * phylink_speed_up() - restore the advertised speeds prior to the call to 2834 * phylink_speed_down() 2835 * @pl: a pointer to a &struct phylink returned from phylink_create() 2836 * 2837 * If we have a PHY that is not part of a SFP module, then restore the 2838 * PHY speeds as per phy_speed_up(). 2839 * 2840 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 2841 */ 2842 int phylink_speed_up(struct phylink *pl) 2843 { 2844 int ret = 0; 2845 2846 ASSERT_RTNL(); 2847 2848 if (!pl->sfp_bus && pl->phydev) 2849 ret = phy_speed_up(pl->phydev); 2850 2851 return ret; 2852 } 2853 EXPORT_SYMBOL_GPL(phylink_speed_up); 2854 2855 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 2856 { 2857 struct phylink *pl = upstream; 2858 2859 pl->netdev->sfp_bus = bus; 2860 } 2861 2862 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 2863 { 2864 struct phylink *pl = upstream; 2865 2866 pl->netdev->sfp_bus = NULL; 2867 } 2868 2869 static const phy_interface_t phylink_sfp_interface_preference[] = { 2870 PHY_INTERFACE_MODE_25GBASER, 2871 PHY_INTERFACE_MODE_USXGMII, 2872 PHY_INTERFACE_MODE_10GBASER, 2873 PHY_INTERFACE_MODE_5GBASER, 2874 PHY_INTERFACE_MODE_2500BASEX, 2875 PHY_INTERFACE_MODE_SGMII, 2876 PHY_INTERFACE_MODE_1000BASEX, 2877 PHY_INTERFACE_MODE_100BASEX, 2878 }; 2879 2880 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 2881 2882 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 2883 const unsigned long *intf) 2884 { 2885 phy_interface_t interface; 2886 size_t i; 2887 2888 interface = PHY_INTERFACE_MODE_NA; 2889 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 2890 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 2891 interface = phylink_sfp_interface_preference[i]; 2892 break; 2893 } 2894 2895 return interface; 2896 } 2897 2898 static void phylink_sfp_set_config(struct phylink *pl, u8 mode, 2899 unsigned long *supported, 2900 struct phylink_link_state *state) 2901 { 2902 bool changed = false; 2903 2904 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 2905 phylink_an_mode_str(mode), phy_modes(state->interface), 2906 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 2907 2908 if (!linkmode_equal(pl->supported, supported)) { 2909 linkmode_copy(pl->supported, supported); 2910 changed = true; 2911 } 2912 2913 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 2914 linkmode_copy(pl->link_config.advertising, state->advertising); 2915 changed = true; 2916 } 2917 2918 if (pl->cur_link_an_mode != mode || 2919 pl->link_config.interface != state->interface) { 2920 pl->cur_link_an_mode = mode; 2921 pl->link_config.interface = state->interface; 2922 2923 changed = true; 2924 2925 phylink_info(pl, "switched to %s/%s link mode\n", 2926 phylink_an_mode_str(mode), 2927 phy_modes(state->interface)); 2928 } 2929 2930 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 2931 &pl->phylink_disable_state)) 2932 phylink_mac_initial_config(pl, false); 2933 } 2934 2935 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode, 2936 struct phy_device *phy) 2937 { 2938 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1); 2939 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2940 struct phylink_link_state config; 2941 phy_interface_t iface; 2942 int ret; 2943 2944 linkmode_copy(support, phy->supported); 2945 2946 memset(&config, 0, sizeof(config)); 2947 linkmode_copy(config.advertising, phy->advertising); 2948 config.interface = PHY_INTERFACE_MODE_NA; 2949 config.speed = SPEED_UNKNOWN; 2950 config.duplex = DUPLEX_UNKNOWN; 2951 config.pause = MLO_PAUSE_AN; 2952 2953 /* Ignore errors if we're expecting a PHY to attach later */ 2954 ret = phylink_validate(pl, support, &config); 2955 if (ret) { 2956 phylink_err(pl, "validation with support %*pb failed: %pe\n", 2957 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 2958 ERR_PTR(ret)); 2959 return ret; 2960 } 2961 2962 iface = sfp_select_interface(pl->sfp_bus, config.advertising); 2963 if (iface == PHY_INTERFACE_MODE_NA) { 2964 phylink_err(pl, 2965 "selection of interface failed, advertisement %*pb\n", 2966 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising); 2967 return -EINVAL; 2968 } 2969 2970 config.interface = iface; 2971 linkmode_copy(support1, support); 2972 ret = phylink_validate(pl, support1, &config); 2973 if (ret) { 2974 phylink_err(pl, 2975 "validation of %s/%s with support %*pb failed: %pe\n", 2976 phylink_an_mode_str(mode), 2977 phy_modes(config.interface), 2978 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 2979 ERR_PTR(ret)); 2980 return ret; 2981 } 2982 2983 pl->link_port = pl->sfp_port; 2984 2985 phylink_sfp_set_config(pl, mode, support, &config); 2986 2987 return 0; 2988 } 2989 2990 static int phylink_sfp_config_optical(struct phylink *pl) 2991 { 2992 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2993 DECLARE_PHY_INTERFACE_MASK(interfaces); 2994 struct phylink_link_state config; 2995 phy_interface_t interface; 2996 int ret; 2997 2998 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 2999 (int)PHY_INTERFACE_MODE_MAX, 3000 pl->config->supported_interfaces, 3001 (int)PHY_INTERFACE_MODE_MAX, 3002 pl->sfp_interfaces); 3003 3004 /* Find the union of the supported interfaces by the PCS/MAC and 3005 * the SFP module. 3006 */ 3007 phy_interface_and(interfaces, pl->config->supported_interfaces, 3008 pl->sfp_interfaces); 3009 if (phy_interface_empty(interfaces)) { 3010 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3011 return -EINVAL; 3012 } 3013 3014 memset(&config, 0, sizeof(config)); 3015 linkmode_copy(support, pl->sfp_support); 3016 linkmode_copy(config.advertising, pl->sfp_support); 3017 config.speed = SPEED_UNKNOWN; 3018 config.duplex = DUPLEX_UNKNOWN; 3019 config.pause = MLO_PAUSE_AN; 3020 3021 /* For all the interfaces that are supported, reduce the sfp_support 3022 * mask to only those link modes that can be supported. 3023 */ 3024 ret = phylink_validate_mask(pl, pl->sfp_support, &config, interfaces); 3025 if (ret) { 3026 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3027 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3028 return ret; 3029 } 3030 3031 interface = phylink_choose_sfp_interface(pl, interfaces); 3032 if (interface == PHY_INTERFACE_MODE_NA) { 3033 phylink_err(pl, "failed to select SFP interface\n"); 3034 return -EINVAL; 3035 } 3036 3037 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3038 phy_modes(interface)); 3039 3040 config.interface = interface; 3041 3042 /* Ignore errors if we're expecting a PHY to attach later */ 3043 ret = phylink_validate(pl, support, &config); 3044 if (ret) { 3045 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3046 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3047 ERR_PTR(ret)); 3048 return ret; 3049 } 3050 3051 pl->link_port = pl->sfp_port; 3052 3053 phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config); 3054 3055 return 0; 3056 } 3057 3058 static int phylink_sfp_module_insert(void *upstream, 3059 const struct sfp_eeprom_id *id) 3060 { 3061 struct phylink *pl = upstream; 3062 3063 ASSERT_RTNL(); 3064 3065 linkmode_zero(pl->sfp_support); 3066 phy_interface_zero(pl->sfp_interfaces); 3067 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces); 3068 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support); 3069 3070 /* If this module may have a PHY connecting later, defer until later */ 3071 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 3072 if (pl->sfp_may_have_phy) 3073 return 0; 3074 3075 return phylink_sfp_config_optical(pl); 3076 } 3077 3078 static int phylink_sfp_module_start(void *upstream) 3079 { 3080 struct phylink *pl = upstream; 3081 3082 /* If this SFP module has a PHY, start the PHY now. */ 3083 if (pl->phydev) { 3084 phy_start(pl->phydev); 3085 return 0; 3086 } 3087 3088 /* If the module may have a PHY but we didn't detect one we 3089 * need to configure the MAC here. 3090 */ 3091 if (!pl->sfp_may_have_phy) 3092 return 0; 3093 3094 return phylink_sfp_config_optical(pl); 3095 } 3096 3097 static void phylink_sfp_module_stop(void *upstream) 3098 { 3099 struct phylink *pl = upstream; 3100 3101 /* If this SFP module has a PHY, stop it. */ 3102 if (pl->phydev) 3103 phy_stop(pl->phydev); 3104 } 3105 3106 static void phylink_sfp_link_down(void *upstream) 3107 { 3108 struct phylink *pl = upstream; 3109 3110 ASSERT_RTNL(); 3111 3112 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3113 } 3114 3115 static void phylink_sfp_link_up(void *upstream) 3116 { 3117 struct phylink *pl = upstream; 3118 3119 ASSERT_RTNL(); 3120 3121 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3122 } 3123 3124 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII 3125 * or 802.3z control word, so inband will not work. 3126 */ 3127 static bool phylink_phy_no_inband(struct phy_device *phy) 3128 { 3129 return phy->is_c45 && 3130 (phy->c45_ids.device_ids[1] & 0xfffffff0) == 0xae025150; 3131 } 3132 3133 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3134 { 3135 struct phylink *pl = upstream; 3136 phy_interface_t interface; 3137 u8 mode; 3138 int ret; 3139 3140 /* 3141 * This is the new way of dealing with flow control for PHYs, 3142 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3143 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3144 * using our validate call to the MAC, we rely upon the MAC 3145 * clearing the bits from both supported and advertising fields. 3146 */ 3147 phy_support_asym_pause(phy); 3148 3149 if (phylink_phy_no_inband(phy)) 3150 mode = MLO_AN_PHY; 3151 else 3152 mode = MLO_AN_INBAND; 3153 3154 /* Set the PHY's host supported interfaces */ 3155 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3156 pl->config->supported_interfaces); 3157 3158 /* Do the initial configuration */ 3159 ret = phylink_sfp_config_phy(pl, mode, phy); 3160 if (ret < 0) 3161 return ret; 3162 3163 interface = pl->link_config.interface; 3164 ret = phylink_attach_phy(pl, phy, interface); 3165 if (ret < 0) 3166 return ret; 3167 3168 ret = phylink_bringup_phy(pl, phy, interface); 3169 if (ret) 3170 phy_detach(phy); 3171 3172 return ret; 3173 } 3174 3175 static void phylink_sfp_disconnect_phy(void *upstream) 3176 { 3177 phylink_disconnect_phy(upstream); 3178 } 3179 3180 static const struct sfp_upstream_ops sfp_phylink_ops = { 3181 .attach = phylink_sfp_attach, 3182 .detach = phylink_sfp_detach, 3183 .module_insert = phylink_sfp_module_insert, 3184 .module_start = phylink_sfp_module_start, 3185 .module_stop = phylink_sfp_module_stop, 3186 .link_up = phylink_sfp_link_up, 3187 .link_down = phylink_sfp_link_down, 3188 .connect_phy = phylink_sfp_connect_phy, 3189 .disconnect_phy = phylink_sfp_disconnect_phy, 3190 }; 3191 3192 /* Helpers for MAC drivers */ 3193 3194 static void phylink_decode_c37_word(struct phylink_link_state *state, 3195 uint16_t config_reg, int speed) 3196 { 3197 bool tx_pause, rx_pause; 3198 int fd_bit; 3199 3200 if (speed == SPEED_2500) 3201 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 3202 else 3203 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 3204 3205 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 3206 3207 if (linkmode_test_bit(fd_bit, state->advertising) && 3208 linkmode_test_bit(fd_bit, state->lp_advertising)) { 3209 state->speed = speed; 3210 state->duplex = DUPLEX_FULL; 3211 } else { 3212 /* negotiation failure */ 3213 state->link = false; 3214 } 3215 3216 linkmode_resolve_pause(state->advertising, state->lp_advertising, 3217 &tx_pause, &rx_pause); 3218 3219 if (tx_pause) 3220 state->pause |= MLO_PAUSE_TX; 3221 if (rx_pause) 3222 state->pause |= MLO_PAUSE_RX; 3223 } 3224 3225 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 3226 uint16_t config_reg) 3227 { 3228 if (!(config_reg & LPA_SGMII_LINK)) { 3229 state->link = false; 3230 return; 3231 } 3232 3233 switch (config_reg & LPA_SGMII_SPD_MASK) { 3234 case LPA_SGMII_10: 3235 state->speed = SPEED_10; 3236 break; 3237 case LPA_SGMII_100: 3238 state->speed = SPEED_100; 3239 break; 3240 case LPA_SGMII_1000: 3241 state->speed = SPEED_1000; 3242 break; 3243 default: 3244 state->link = false; 3245 return; 3246 } 3247 if (config_reg & LPA_SGMII_FULL_DUPLEX) 3248 state->duplex = DUPLEX_FULL; 3249 else 3250 state->duplex = DUPLEX_HALF; 3251 } 3252 3253 /** 3254 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3255 * @state: a pointer to a struct phylink_link_state. 3256 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3257 * 3258 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3259 * code word. Decode the USXGMII code word and populate the corresponding fields 3260 * (speed, duplex) into the phylink_link_state structure. 3261 */ 3262 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 3263 uint16_t lpa) 3264 { 3265 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3266 case MDIO_USXGMII_10: 3267 state->speed = SPEED_10; 3268 break; 3269 case MDIO_USXGMII_100: 3270 state->speed = SPEED_100; 3271 break; 3272 case MDIO_USXGMII_1000: 3273 state->speed = SPEED_1000; 3274 break; 3275 case MDIO_USXGMII_2500: 3276 state->speed = SPEED_2500; 3277 break; 3278 case MDIO_USXGMII_5000: 3279 state->speed = SPEED_5000; 3280 break; 3281 case MDIO_USXGMII_10G: 3282 state->speed = SPEED_10000; 3283 break; 3284 default: 3285 state->link = false; 3286 return; 3287 } 3288 3289 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3290 state->duplex = DUPLEX_FULL; 3291 else 3292 state->duplex = DUPLEX_HALF; 3293 } 3294 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 3295 3296 /** 3297 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 3298 * @state: a pointer to a &struct phylink_link_state. 3299 * @bmsr: The value of the %MII_BMSR register 3300 * @lpa: The value of the %MII_LPA register 3301 * 3302 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3303 * clause 37 negotiation and/or SGMII control. 3304 * 3305 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 3306 * the phylink @state structure. This is suitable to be used for implementing 3307 * the mac_pcs_get_state() member of the struct phylink_mac_ops structure if 3308 * accessing @bmsr and @lpa cannot be done with MDIO directly. 3309 */ 3310 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 3311 u16 bmsr, u16 lpa) 3312 { 3313 state->link = !!(bmsr & BMSR_LSTATUS); 3314 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 3315 /* If there is no link or autonegotiation is disabled, the LP advertisement 3316 * data is not meaningful, so don't go any further. 3317 */ 3318 if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3319 state->advertising)) 3320 return; 3321 3322 switch (state->interface) { 3323 case PHY_INTERFACE_MODE_1000BASEX: 3324 phylink_decode_c37_word(state, lpa, SPEED_1000); 3325 break; 3326 3327 case PHY_INTERFACE_MODE_2500BASEX: 3328 phylink_decode_c37_word(state, lpa, SPEED_2500); 3329 break; 3330 3331 case PHY_INTERFACE_MODE_SGMII: 3332 case PHY_INTERFACE_MODE_QSGMII: 3333 case PHY_INTERFACE_MODE_QUSGMII: 3334 phylink_decode_sgmii_word(state, lpa); 3335 break; 3336 3337 default: 3338 state->link = false; 3339 break; 3340 } 3341 } 3342 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 3343 3344 /** 3345 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 3346 * @pcs: a pointer to a &struct mdio_device. 3347 * @state: a pointer to a &struct phylink_link_state. 3348 * 3349 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3350 * clause 37 negotiation and/or SGMII control. 3351 * 3352 * Read the MAC PCS state from the MII device configured in @config and 3353 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 3354 * the phylink @state structure. This is suitable to be directly plugged 3355 * into the mac_pcs_get_state() member of the struct phylink_mac_ops 3356 * structure. 3357 */ 3358 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 3359 struct phylink_link_state *state) 3360 { 3361 int bmsr, lpa; 3362 3363 bmsr = mdiodev_read(pcs, MII_BMSR); 3364 lpa = mdiodev_read(pcs, MII_LPA); 3365 if (bmsr < 0 || lpa < 0) { 3366 state->link = false; 3367 return; 3368 } 3369 3370 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa); 3371 } 3372 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 3373 3374 /** 3375 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 3376 * advertisement 3377 * @interface: the PHY interface mode being configured 3378 * @advertising: the ethtool advertisement mask 3379 * 3380 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3381 * clause 37 negotiation and/or SGMII control. 3382 * 3383 * Encode the clause 37 PCS advertisement as specified by @interface and 3384 * @advertising. 3385 * 3386 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 3387 */ 3388 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 3389 const unsigned long *advertising) 3390 { 3391 u16 adv; 3392 3393 switch (interface) { 3394 case PHY_INTERFACE_MODE_1000BASEX: 3395 case PHY_INTERFACE_MODE_2500BASEX: 3396 adv = ADVERTISE_1000XFULL; 3397 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 3398 advertising)) 3399 adv |= ADVERTISE_1000XPAUSE; 3400 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 3401 advertising)) 3402 adv |= ADVERTISE_1000XPSE_ASYM; 3403 return adv; 3404 case PHY_INTERFACE_MODE_SGMII: 3405 case PHY_INTERFACE_MODE_QSGMII: 3406 return 0x0001; 3407 default: 3408 /* Nothing to do for other modes */ 3409 return -EINVAL; 3410 } 3411 } 3412 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 3413 3414 /** 3415 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 3416 * @pcs: a pointer to a &struct mdio_device. 3417 * @mode: link autonegotiation mode 3418 * @interface: the PHY interface mode being configured 3419 * @advertising: the ethtool advertisement mask 3420 * 3421 * Configure a Clause 22 PCS PHY with the appropriate negotiation 3422 * parameters for the @mode, @interface and @advertising parameters. 3423 * Returns negative error number on failure, zero if the advertisement 3424 * has not changed, or positive if there is a change. 3425 */ 3426 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, unsigned int mode, 3427 phy_interface_t interface, 3428 const unsigned long *advertising) 3429 { 3430 bool changed = 0; 3431 u16 bmcr; 3432 int ret, adv; 3433 3434 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 3435 if (adv >= 0) { 3436 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 3437 MII_ADVERTISE, 0xffff, adv); 3438 if (ret < 0) 3439 return ret; 3440 changed = ret; 3441 } 3442 3443 /* Ensure ISOLATE bit is disabled */ 3444 if (mode == MLO_AN_INBAND && 3445 (interface == PHY_INTERFACE_MODE_SGMII || 3446 interface == PHY_INTERFACE_MODE_QSGMII || 3447 linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, advertising))) 3448 bmcr = BMCR_ANENABLE; 3449 else 3450 bmcr = 0; 3451 3452 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 3453 if (ret < 0) 3454 return ret; 3455 3456 return changed; 3457 } 3458 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 3459 3460 /** 3461 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 3462 * @pcs: a pointer to a &struct mdio_device. 3463 * 3464 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3465 * clause 37 negotiation. 3466 * 3467 * Restart the clause 37 negotiation with the link partner. This is 3468 * suitable to be directly plugged into the mac_pcs_get_state() member 3469 * of the struct phylink_mac_ops structure. 3470 */ 3471 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 3472 { 3473 int val = mdiodev_read(pcs, MII_BMCR); 3474 3475 if (val >= 0) { 3476 val |= BMCR_ANRESTART; 3477 3478 mdiodev_write(pcs, MII_BMCR, val); 3479 } 3480 } 3481 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 3482 3483 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 3484 struct phylink_link_state *state) 3485 { 3486 struct mii_bus *bus = pcs->bus; 3487 int addr = pcs->addr; 3488 int stat; 3489 3490 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 3491 if (stat < 0) { 3492 state->link = false; 3493 return; 3494 } 3495 3496 state->link = !!(stat & MDIO_STAT1_LSTATUS); 3497 if (!state->link) 3498 return; 3499 3500 switch (state->interface) { 3501 case PHY_INTERFACE_MODE_10GBASER: 3502 state->speed = SPEED_10000; 3503 state->duplex = DUPLEX_FULL; 3504 break; 3505 3506 default: 3507 break; 3508 } 3509 } 3510 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 3511 3512 static int __init phylink_init(void) 3513 { 3514 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 3515 __set_bit(phylink_sfp_interface_preference[i], 3516 phylink_sfp_interfaces); 3517 3518 return 0; 3519 } 3520 3521 module_init(phylink_init); 3522 3523 MODULE_LICENSE("GPL v2"); 3524