1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "sfp.h" 24 #include "swphy.h" 25 26 #define SUPPORTED_INTERFACES \ 27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 29 #define ADVERTISED_INTERFACES \ 30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 32 33 enum { 34 PHYLINK_DISABLE_STOPPED, 35 PHYLINK_DISABLE_LINK, 36 PHYLINK_DISABLE_MAC_WOL, 37 38 PCS_STATE_DOWN = 0, 39 PCS_STATE_STARTING, 40 PCS_STATE_STARTED, 41 }; 42 43 /** 44 * struct phylink - internal data type for phylink 45 */ 46 struct phylink { 47 /* private: */ 48 struct net_device *netdev; 49 const struct phylink_mac_ops *mac_ops; 50 struct phylink_config *config; 51 struct phylink_pcs *pcs; 52 struct device *dev; 53 unsigned int old_link_state:1; 54 55 unsigned long phylink_disable_state; /* bitmask of disables */ 56 struct phy_device *phydev; 57 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 58 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 59 u8 cur_link_an_mode; 60 u8 link_port; /* The current non-phy ethtool port */ 61 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 62 63 /* The link configuration settings */ 64 struct phylink_link_state link_config; 65 66 /* The current settings */ 67 phy_interface_t cur_interface; 68 69 struct gpio_desc *link_gpio; 70 unsigned int link_irq; 71 struct timer_list link_poll; 72 void (*get_fixed_state)(struct net_device *dev, 73 struct phylink_link_state *s); 74 75 struct mutex state_mutex; 76 struct phylink_link_state phy_state; 77 struct work_struct resolve; 78 unsigned int pcs_neg_mode; 79 unsigned int pcs_state; 80 81 bool mac_link_dropped; 82 bool using_mac_select_pcs; 83 84 struct sfp_bus *sfp_bus; 85 bool sfp_may_have_phy; 86 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 87 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 88 u8 sfp_port; 89 }; 90 91 #define phylink_printk(level, pl, fmt, ...) \ 92 do { \ 93 if ((pl)->config->type == PHYLINK_NETDEV) \ 94 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 95 else if ((pl)->config->type == PHYLINK_DEV) \ 96 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 97 } while (0) 98 99 #define phylink_err(pl, fmt, ...) \ 100 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 101 #define phylink_warn(pl, fmt, ...) \ 102 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 103 #define phylink_info(pl, fmt, ...) \ 104 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 105 #if defined(CONFIG_DYNAMIC_DEBUG) 106 #define phylink_dbg(pl, fmt, ...) \ 107 do { \ 108 if ((pl)->config->type == PHYLINK_NETDEV) \ 109 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 110 else if ((pl)->config->type == PHYLINK_DEV) \ 111 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 112 } while (0) 113 #elif defined(DEBUG) 114 #define phylink_dbg(pl, fmt, ...) \ 115 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 116 #else 117 #define phylink_dbg(pl, fmt, ...) \ 118 ({ \ 119 if (0) \ 120 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 121 }) 122 #endif 123 124 /** 125 * phylink_set_port_modes() - set the port type modes in the ethtool mask 126 * @mask: ethtool link mode mask 127 * 128 * Sets all the port type modes in the ethtool mask. MAC drivers should 129 * use this in their 'validate' callback. 130 */ 131 void phylink_set_port_modes(unsigned long *mask) 132 { 133 phylink_set(mask, TP); 134 phylink_set(mask, AUI); 135 phylink_set(mask, MII); 136 phylink_set(mask, FIBRE); 137 phylink_set(mask, BNC); 138 phylink_set(mask, Backplane); 139 } 140 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 141 142 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 143 { 144 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 145 146 phylink_set_port_modes(tmp); 147 phylink_set(tmp, Autoneg); 148 phylink_set(tmp, Pause); 149 phylink_set(tmp, Asym_Pause); 150 151 return linkmode_subset(linkmode, tmp); 152 } 153 154 static const char *phylink_an_mode_str(unsigned int mode) 155 { 156 static const char *modestr[] = { 157 [MLO_AN_PHY] = "phy", 158 [MLO_AN_FIXED] = "fixed", 159 [MLO_AN_INBAND] = "inband", 160 }; 161 162 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 163 } 164 165 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 166 { 167 switch (interface) { 168 case PHY_INTERFACE_MODE_SGMII: 169 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 170 return 1250; 171 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 172 return 3125; 173 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 174 return 5156; 175 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 176 return 10313; 177 default: 178 return 0; 179 } 180 } 181 182 /** 183 * phylink_interface_max_speed() - get the maximum speed of a phy interface 184 * @interface: phy interface mode defined by &typedef phy_interface_t 185 * 186 * Determine the maximum speed of a phy interface. This is intended to help 187 * determine the correct speed to pass to the MAC when the phy is performing 188 * rate matching. 189 * 190 * Return: The maximum speed of @interface 191 */ 192 static int phylink_interface_max_speed(phy_interface_t interface) 193 { 194 switch (interface) { 195 case PHY_INTERFACE_MODE_100BASEX: 196 case PHY_INTERFACE_MODE_REVRMII: 197 case PHY_INTERFACE_MODE_RMII: 198 case PHY_INTERFACE_MODE_SMII: 199 case PHY_INTERFACE_MODE_REVMII: 200 case PHY_INTERFACE_MODE_MII: 201 return SPEED_100; 202 203 case PHY_INTERFACE_MODE_TBI: 204 case PHY_INTERFACE_MODE_MOCA: 205 case PHY_INTERFACE_MODE_RTBI: 206 case PHY_INTERFACE_MODE_1000BASEX: 207 case PHY_INTERFACE_MODE_1000BASEKX: 208 case PHY_INTERFACE_MODE_TRGMII: 209 case PHY_INTERFACE_MODE_RGMII_TXID: 210 case PHY_INTERFACE_MODE_RGMII_RXID: 211 case PHY_INTERFACE_MODE_RGMII_ID: 212 case PHY_INTERFACE_MODE_RGMII: 213 case PHY_INTERFACE_MODE_QSGMII: 214 case PHY_INTERFACE_MODE_QUSGMII: 215 case PHY_INTERFACE_MODE_SGMII: 216 case PHY_INTERFACE_MODE_GMII: 217 return SPEED_1000; 218 219 case PHY_INTERFACE_MODE_2500BASEX: 220 return SPEED_2500; 221 222 case PHY_INTERFACE_MODE_5GBASER: 223 return SPEED_5000; 224 225 case PHY_INTERFACE_MODE_XGMII: 226 case PHY_INTERFACE_MODE_RXAUI: 227 case PHY_INTERFACE_MODE_XAUI: 228 case PHY_INTERFACE_MODE_10GBASER: 229 case PHY_INTERFACE_MODE_10GKR: 230 case PHY_INTERFACE_MODE_USXGMII: 231 return SPEED_10000; 232 233 case PHY_INTERFACE_MODE_25GBASER: 234 return SPEED_25000; 235 236 case PHY_INTERFACE_MODE_XLGMII: 237 return SPEED_40000; 238 239 case PHY_INTERFACE_MODE_INTERNAL: 240 case PHY_INTERFACE_MODE_NA: 241 case PHY_INTERFACE_MODE_MAX: 242 /* No idea! Garbage in, unknown out */ 243 return SPEED_UNKNOWN; 244 } 245 246 /* If we get here, someone forgot to add an interface mode above */ 247 WARN_ON_ONCE(1); 248 return SPEED_UNKNOWN; 249 } 250 251 /** 252 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 253 * @linkmodes: ethtool linkmode mask (must be already initialised) 254 * @caps: bitmask of MAC capabilities 255 * 256 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 257 * supported by the @caps. @linkmodes must have been initialised previously. 258 */ 259 void phylink_caps_to_linkmodes(unsigned long *linkmodes, unsigned long caps) 260 { 261 if (caps & MAC_SYM_PAUSE) 262 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 263 264 if (caps & MAC_ASYM_PAUSE) 265 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 266 267 if (caps & MAC_10HD) { 268 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes); 269 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes); 270 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes); 271 } 272 273 if (caps & MAC_10FD) { 274 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes); 275 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes); 276 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes); 277 } 278 279 if (caps & MAC_100HD) { 280 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes); 281 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes); 282 } 283 284 if (caps & MAC_100FD) { 285 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes); 286 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes); 287 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes); 288 } 289 290 if (caps & MAC_1000HD) 291 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes); 292 293 if (caps & MAC_1000FD) { 294 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes); 295 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes); 296 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes); 297 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes); 298 } 299 300 if (caps & MAC_2500FD) { 301 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes); 302 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes); 303 } 304 305 if (caps & MAC_5000FD) 306 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes); 307 308 if (caps & MAC_10000FD) { 309 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes); 310 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes); 311 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes); 312 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes); 313 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes); 314 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes); 315 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes); 316 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes); 317 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes); 318 } 319 320 if (caps & MAC_25000FD) { 321 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes); 322 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes); 323 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes); 324 } 325 326 if (caps & MAC_40000FD) { 327 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes); 328 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes); 329 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes); 330 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes); 331 } 332 333 if (caps & MAC_50000FD) { 334 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes); 335 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes); 336 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes); 337 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes); 338 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes); 339 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes); 340 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 341 linkmodes); 342 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes); 343 } 344 345 if (caps & MAC_56000FD) { 346 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes); 347 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes); 348 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes); 349 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes); 350 } 351 352 if (caps & MAC_100000FD) { 353 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes); 354 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes); 355 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes); 356 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 357 linkmodes); 358 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes); 359 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes); 360 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes); 361 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 362 linkmodes); 363 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes); 364 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes); 365 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes); 366 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 367 linkmodes); 368 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes); 369 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes); 370 } 371 372 if (caps & MAC_200000FD) { 373 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes); 374 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes); 375 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 376 linkmodes); 377 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes); 378 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes); 379 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes); 380 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes); 381 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 382 linkmodes); 383 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes); 384 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes); 385 } 386 387 if (caps & MAC_400000FD) { 388 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes); 389 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes); 390 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 391 linkmodes); 392 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes); 393 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes); 394 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes); 395 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes); 396 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 397 linkmodes); 398 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes); 399 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes); 400 } 401 } 402 EXPORT_SYMBOL_GPL(phylink_caps_to_linkmodes); 403 404 static struct { 405 unsigned long mask; 406 int speed; 407 unsigned int duplex; 408 } phylink_caps_params[] = { 409 { MAC_400000FD, SPEED_400000, DUPLEX_FULL }, 410 { MAC_200000FD, SPEED_200000, DUPLEX_FULL }, 411 { MAC_100000FD, SPEED_100000, DUPLEX_FULL }, 412 { MAC_56000FD, SPEED_56000, DUPLEX_FULL }, 413 { MAC_50000FD, SPEED_50000, DUPLEX_FULL }, 414 { MAC_40000FD, SPEED_40000, DUPLEX_FULL }, 415 { MAC_25000FD, SPEED_25000, DUPLEX_FULL }, 416 { MAC_20000FD, SPEED_20000, DUPLEX_FULL }, 417 { MAC_10000FD, SPEED_10000, DUPLEX_FULL }, 418 { MAC_5000FD, SPEED_5000, DUPLEX_FULL }, 419 { MAC_2500FD, SPEED_2500, DUPLEX_FULL }, 420 { MAC_1000FD, SPEED_1000, DUPLEX_FULL }, 421 { MAC_1000HD, SPEED_1000, DUPLEX_HALF }, 422 { MAC_100FD, SPEED_100, DUPLEX_FULL }, 423 { MAC_100HD, SPEED_100, DUPLEX_HALF }, 424 { MAC_10FD, SPEED_10, DUPLEX_FULL }, 425 { MAC_10HD, SPEED_10, DUPLEX_HALF }, 426 }; 427 428 /** 429 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 430 * @speed: the speed to search for 431 * @duplex: the duplex to search for 432 * 433 * Find the mac capability for a given speed and duplex. 434 * 435 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 436 * there were no matches. 437 */ 438 static unsigned long phylink_cap_from_speed_duplex(int speed, 439 unsigned int duplex) 440 { 441 int i; 442 443 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 444 if (speed == phylink_caps_params[i].speed && 445 duplex == phylink_caps_params[i].duplex) 446 return phylink_caps_params[i].mask; 447 } 448 449 return 0; 450 } 451 452 /** 453 * phylink_get_capabilities() - get capabilities for a given MAC 454 * @interface: phy interface mode defined by &typedef phy_interface_t 455 * @mac_capabilities: bitmask of MAC capabilities 456 * @rate_matching: type of rate matching being performed 457 * 458 * Get the MAC capabilities that are supported by the @interface mode and 459 * @mac_capabilities. 460 */ 461 unsigned long phylink_get_capabilities(phy_interface_t interface, 462 unsigned long mac_capabilities, 463 int rate_matching) 464 { 465 int max_speed = phylink_interface_max_speed(interface); 466 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 467 unsigned long matched_caps = 0; 468 469 switch (interface) { 470 case PHY_INTERFACE_MODE_USXGMII: 471 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD; 472 fallthrough; 473 474 case PHY_INTERFACE_MODE_RGMII_TXID: 475 case PHY_INTERFACE_MODE_RGMII_RXID: 476 case PHY_INTERFACE_MODE_RGMII_ID: 477 case PHY_INTERFACE_MODE_RGMII: 478 case PHY_INTERFACE_MODE_QSGMII: 479 case PHY_INTERFACE_MODE_QUSGMII: 480 case PHY_INTERFACE_MODE_SGMII: 481 case PHY_INTERFACE_MODE_GMII: 482 caps |= MAC_1000HD | MAC_1000FD; 483 fallthrough; 484 485 case PHY_INTERFACE_MODE_REVRMII: 486 case PHY_INTERFACE_MODE_RMII: 487 case PHY_INTERFACE_MODE_SMII: 488 case PHY_INTERFACE_MODE_REVMII: 489 case PHY_INTERFACE_MODE_MII: 490 caps |= MAC_10HD | MAC_10FD; 491 fallthrough; 492 493 case PHY_INTERFACE_MODE_100BASEX: 494 caps |= MAC_100HD | MAC_100FD; 495 break; 496 497 case PHY_INTERFACE_MODE_TBI: 498 case PHY_INTERFACE_MODE_MOCA: 499 case PHY_INTERFACE_MODE_RTBI: 500 case PHY_INTERFACE_MODE_1000BASEX: 501 caps |= MAC_1000HD; 502 fallthrough; 503 case PHY_INTERFACE_MODE_1000BASEKX: 504 case PHY_INTERFACE_MODE_TRGMII: 505 caps |= MAC_1000FD; 506 break; 507 508 case PHY_INTERFACE_MODE_2500BASEX: 509 caps |= MAC_2500FD; 510 break; 511 512 case PHY_INTERFACE_MODE_5GBASER: 513 caps |= MAC_5000FD; 514 break; 515 516 case PHY_INTERFACE_MODE_XGMII: 517 case PHY_INTERFACE_MODE_RXAUI: 518 case PHY_INTERFACE_MODE_XAUI: 519 case PHY_INTERFACE_MODE_10GBASER: 520 case PHY_INTERFACE_MODE_10GKR: 521 caps |= MAC_10000FD; 522 break; 523 524 case PHY_INTERFACE_MODE_25GBASER: 525 caps |= MAC_25000FD; 526 break; 527 528 case PHY_INTERFACE_MODE_XLGMII: 529 caps |= MAC_40000FD; 530 break; 531 532 case PHY_INTERFACE_MODE_INTERNAL: 533 caps |= ~0; 534 break; 535 536 case PHY_INTERFACE_MODE_NA: 537 case PHY_INTERFACE_MODE_MAX: 538 break; 539 } 540 541 switch (rate_matching) { 542 case RATE_MATCH_OPEN_LOOP: 543 /* TODO */ 544 fallthrough; 545 case RATE_MATCH_NONE: 546 matched_caps = 0; 547 break; 548 case RATE_MATCH_PAUSE: { 549 /* The MAC must support asymmetric pause towards the local 550 * device for this. We could allow just symmetric pause, but 551 * then we might have to renegotiate if the link partner 552 * doesn't support pause. This is because there's no way to 553 * accept pause frames without transmitting them if we only 554 * support symmetric pause. 555 */ 556 if (!(mac_capabilities & MAC_SYM_PAUSE) || 557 !(mac_capabilities & MAC_ASYM_PAUSE)) 558 break; 559 560 /* We can't adapt if the MAC doesn't support the interface's 561 * max speed at full duplex. 562 */ 563 if (mac_capabilities & 564 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) { 565 /* Although a duplex-matching phy might exist, we 566 * conservatively remove these modes because the MAC 567 * will not be aware of the half-duplex nature of the 568 * link. 569 */ 570 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 571 matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD); 572 } 573 break; 574 } 575 case RATE_MATCH_CRS: 576 /* The MAC must support half duplex at the interface's max 577 * speed. 578 */ 579 if (mac_capabilities & 580 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 581 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 582 matched_caps &= mac_capabilities; 583 } 584 break; 585 } 586 587 return (caps & mac_capabilities) | matched_caps; 588 } 589 EXPORT_SYMBOL_GPL(phylink_get_capabilities); 590 591 /** 592 * phylink_validate_mask_caps() - Restrict link modes based on caps 593 * @supported: ethtool bitmask for supported link modes. 594 * @state: pointer to a &struct phylink_link_state. 595 * @mac_capabilities: bitmask of MAC capabilities 596 * 597 * Calculate the supported link modes based on @mac_capabilities, and restrict 598 * @supported and @state based on that. Use this function if your capabiliies 599 * aren't constant, such as if they vary depending on the interface. 600 */ 601 void phylink_validate_mask_caps(unsigned long *supported, 602 struct phylink_link_state *state, 603 unsigned long mac_capabilities) 604 { 605 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 606 unsigned long caps; 607 608 phylink_set_port_modes(mask); 609 phylink_set(mask, Autoneg); 610 caps = phylink_get_capabilities(state->interface, mac_capabilities, 611 state->rate_matching); 612 phylink_caps_to_linkmodes(mask, caps); 613 614 linkmode_and(supported, supported, mask); 615 linkmode_and(state->advertising, state->advertising, mask); 616 } 617 EXPORT_SYMBOL_GPL(phylink_validate_mask_caps); 618 619 /** 620 * phylink_generic_validate() - generic validate() callback implementation 621 * @config: a pointer to a &struct phylink_config. 622 * @supported: ethtool bitmask for supported link modes. 623 * @state: a pointer to a &struct phylink_link_state. 624 * 625 * Generic implementation of the validate() callback that MAC drivers can 626 * use when they pass the range of supported interfaces and MAC capabilities. 627 */ 628 void phylink_generic_validate(struct phylink_config *config, 629 unsigned long *supported, 630 struct phylink_link_state *state) 631 { 632 phylink_validate_mask_caps(supported, state, config->mac_capabilities); 633 } 634 EXPORT_SYMBOL_GPL(phylink_generic_validate); 635 636 static int phylink_validate_mac_and_pcs(struct phylink *pl, 637 unsigned long *supported, 638 struct phylink_link_state *state) 639 { 640 struct phylink_pcs *pcs; 641 int ret; 642 643 /* Get the PCS for this interface mode */ 644 if (pl->using_mac_select_pcs) { 645 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 646 if (IS_ERR(pcs)) 647 return PTR_ERR(pcs); 648 } else { 649 pcs = pl->pcs; 650 } 651 652 if (pcs) { 653 /* The PCS, if present, must be setup before phylink_create() 654 * has been called. If the ops is not initialised, print an 655 * error and backtrace rather than oopsing the kernel. 656 */ 657 if (!pcs->ops) { 658 phylink_err(pl, "interface %s: uninitialised PCS\n", 659 phy_modes(state->interface)); 660 dump_stack(); 661 return -EINVAL; 662 } 663 664 /* Validate the link parameters with the PCS */ 665 if (pcs->ops->pcs_validate) { 666 ret = pcs->ops->pcs_validate(pcs, supported, state); 667 if (ret < 0 || phylink_is_empty_linkmode(supported)) 668 return -EINVAL; 669 670 /* Ensure the advertising mask is a subset of the 671 * supported mask. 672 */ 673 linkmode_and(state->advertising, state->advertising, 674 supported); 675 } 676 } 677 678 /* Then validate the link parameters with the MAC */ 679 if (pl->mac_ops->validate) 680 pl->mac_ops->validate(pl->config, supported, state); 681 else 682 phylink_generic_validate(pl->config, supported, state); 683 684 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 685 } 686 687 static int phylink_validate_mask(struct phylink *pl, unsigned long *supported, 688 struct phylink_link_state *state, 689 const unsigned long *interfaces) 690 { 691 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 692 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 693 __ETHTOOL_DECLARE_LINK_MODE_MASK(s); 694 struct phylink_link_state t; 695 int intf; 696 697 for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) { 698 if (test_bit(intf, interfaces)) { 699 linkmode_copy(s, supported); 700 701 t = *state; 702 t.interface = intf; 703 if (!phylink_validate_mac_and_pcs(pl, s, &t)) { 704 linkmode_or(all_s, all_s, s); 705 linkmode_or(all_adv, all_adv, t.advertising); 706 } 707 } 708 } 709 710 linkmode_copy(supported, all_s); 711 linkmode_copy(state->advertising, all_adv); 712 713 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 714 } 715 716 static int phylink_validate(struct phylink *pl, unsigned long *supported, 717 struct phylink_link_state *state) 718 { 719 const unsigned long *interfaces = pl->config->supported_interfaces; 720 721 if (state->interface == PHY_INTERFACE_MODE_NA) 722 return phylink_validate_mask(pl, supported, state, interfaces); 723 724 if (!test_bit(state->interface, interfaces)) 725 return -EINVAL; 726 727 return phylink_validate_mac_and_pcs(pl, supported, state); 728 } 729 730 static int phylink_parse_fixedlink(struct phylink *pl, 731 const struct fwnode_handle *fwnode) 732 { 733 struct fwnode_handle *fixed_node; 734 bool pause, asym_pause, autoneg; 735 const struct phy_setting *s; 736 struct gpio_desc *desc; 737 u32 speed; 738 int ret; 739 740 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 741 if (fixed_node) { 742 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 743 744 pl->link_config.speed = speed; 745 pl->link_config.duplex = DUPLEX_HALF; 746 747 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 748 pl->link_config.duplex = DUPLEX_FULL; 749 750 /* We treat the "pause" and "asym-pause" terminology as 751 * defining the link partner's ability. 752 */ 753 if (fwnode_property_read_bool(fixed_node, "pause")) 754 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 755 pl->link_config.lp_advertising); 756 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 757 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 758 pl->link_config.lp_advertising); 759 760 if (ret == 0) { 761 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 762 GPIOD_IN, "?"); 763 764 if (!IS_ERR(desc)) 765 pl->link_gpio = desc; 766 else if (desc == ERR_PTR(-EPROBE_DEFER)) 767 ret = -EPROBE_DEFER; 768 } 769 fwnode_handle_put(fixed_node); 770 771 if (ret) 772 return ret; 773 } else { 774 u32 prop[5]; 775 776 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 777 NULL, 0); 778 if (ret != ARRAY_SIZE(prop)) { 779 phylink_err(pl, "broken fixed-link?\n"); 780 return -EINVAL; 781 } 782 783 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 784 prop, ARRAY_SIZE(prop)); 785 if (!ret) { 786 pl->link_config.duplex = prop[1] ? 787 DUPLEX_FULL : DUPLEX_HALF; 788 pl->link_config.speed = prop[2]; 789 if (prop[3]) 790 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 791 pl->link_config.lp_advertising); 792 if (prop[4]) 793 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 794 pl->link_config.lp_advertising); 795 } 796 } 797 798 if (pl->link_config.speed > SPEED_1000 && 799 pl->link_config.duplex != DUPLEX_FULL) 800 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 801 pl->link_config.speed); 802 803 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 804 linkmode_copy(pl->link_config.advertising, pl->supported); 805 phylink_validate(pl, pl->supported, &pl->link_config); 806 807 pause = phylink_test(pl->supported, Pause); 808 asym_pause = phylink_test(pl->supported, Asym_Pause); 809 autoneg = phylink_test(pl->supported, Autoneg); 810 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, 811 pl->supported, true); 812 linkmode_zero(pl->supported); 813 phylink_set(pl->supported, MII); 814 815 if (pause) 816 phylink_set(pl->supported, Pause); 817 818 if (asym_pause) 819 phylink_set(pl->supported, Asym_Pause); 820 821 if (autoneg) 822 phylink_set(pl->supported, Autoneg); 823 824 if (s) { 825 __set_bit(s->bit, pl->supported); 826 __set_bit(s->bit, pl->link_config.lp_advertising); 827 } else { 828 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 829 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 830 pl->link_config.speed); 831 } 832 833 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 834 pl->supported); 835 836 pl->link_config.link = 1; 837 pl->link_config.an_complete = 1; 838 839 return 0; 840 } 841 842 static int phylink_parse_mode(struct phylink *pl, 843 const struct fwnode_handle *fwnode) 844 { 845 struct fwnode_handle *dn; 846 const char *managed; 847 848 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 849 if (dn || fwnode_property_present(fwnode, "fixed-link")) 850 pl->cfg_link_an_mode = MLO_AN_FIXED; 851 fwnode_handle_put(dn); 852 853 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 854 strcmp(managed, "in-band-status") == 0) || 855 pl->config->ovr_an_inband) { 856 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 857 phylink_err(pl, 858 "can't use both fixed-link and in-band-status\n"); 859 return -EINVAL; 860 } 861 862 linkmode_zero(pl->supported); 863 phylink_set(pl->supported, MII); 864 phylink_set(pl->supported, Autoneg); 865 phylink_set(pl->supported, Asym_Pause); 866 phylink_set(pl->supported, Pause); 867 pl->cfg_link_an_mode = MLO_AN_INBAND; 868 869 switch (pl->link_config.interface) { 870 case PHY_INTERFACE_MODE_SGMII: 871 case PHY_INTERFACE_MODE_QSGMII: 872 case PHY_INTERFACE_MODE_QUSGMII: 873 case PHY_INTERFACE_MODE_RGMII: 874 case PHY_INTERFACE_MODE_RGMII_ID: 875 case PHY_INTERFACE_MODE_RGMII_RXID: 876 case PHY_INTERFACE_MODE_RGMII_TXID: 877 case PHY_INTERFACE_MODE_RTBI: 878 phylink_set(pl->supported, 10baseT_Half); 879 phylink_set(pl->supported, 10baseT_Full); 880 phylink_set(pl->supported, 100baseT_Half); 881 phylink_set(pl->supported, 100baseT_Full); 882 phylink_set(pl->supported, 1000baseT_Half); 883 phylink_set(pl->supported, 1000baseT_Full); 884 break; 885 886 case PHY_INTERFACE_MODE_1000BASEX: 887 phylink_set(pl->supported, 1000baseX_Full); 888 break; 889 890 case PHY_INTERFACE_MODE_2500BASEX: 891 phylink_set(pl->supported, 2500baseX_Full); 892 break; 893 894 case PHY_INTERFACE_MODE_5GBASER: 895 phylink_set(pl->supported, 5000baseT_Full); 896 break; 897 898 case PHY_INTERFACE_MODE_25GBASER: 899 phylink_set(pl->supported, 25000baseCR_Full); 900 phylink_set(pl->supported, 25000baseKR_Full); 901 phylink_set(pl->supported, 25000baseSR_Full); 902 fallthrough; 903 case PHY_INTERFACE_MODE_USXGMII: 904 case PHY_INTERFACE_MODE_10GKR: 905 case PHY_INTERFACE_MODE_10GBASER: 906 phylink_set(pl->supported, 10baseT_Half); 907 phylink_set(pl->supported, 10baseT_Full); 908 phylink_set(pl->supported, 100baseT_Half); 909 phylink_set(pl->supported, 100baseT_Full); 910 phylink_set(pl->supported, 1000baseT_Half); 911 phylink_set(pl->supported, 1000baseT_Full); 912 phylink_set(pl->supported, 1000baseX_Full); 913 phylink_set(pl->supported, 1000baseKX_Full); 914 phylink_set(pl->supported, 2500baseT_Full); 915 phylink_set(pl->supported, 2500baseX_Full); 916 phylink_set(pl->supported, 5000baseT_Full); 917 phylink_set(pl->supported, 10000baseT_Full); 918 phylink_set(pl->supported, 10000baseKR_Full); 919 phylink_set(pl->supported, 10000baseKX4_Full); 920 phylink_set(pl->supported, 10000baseCR_Full); 921 phylink_set(pl->supported, 10000baseSR_Full); 922 phylink_set(pl->supported, 10000baseLR_Full); 923 phylink_set(pl->supported, 10000baseLRM_Full); 924 phylink_set(pl->supported, 10000baseER_Full); 925 break; 926 927 case PHY_INTERFACE_MODE_XLGMII: 928 phylink_set(pl->supported, 25000baseCR_Full); 929 phylink_set(pl->supported, 25000baseKR_Full); 930 phylink_set(pl->supported, 25000baseSR_Full); 931 phylink_set(pl->supported, 40000baseKR4_Full); 932 phylink_set(pl->supported, 40000baseCR4_Full); 933 phylink_set(pl->supported, 40000baseSR4_Full); 934 phylink_set(pl->supported, 40000baseLR4_Full); 935 phylink_set(pl->supported, 50000baseCR2_Full); 936 phylink_set(pl->supported, 50000baseKR2_Full); 937 phylink_set(pl->supported, 50000baseSR2_Full); 938 phylink_set(pl->supported, 50000baseKR_Full); 939 phylink_set(pl->supported, 50000baseSR_Full); 940 phylink_set(pl->supported, 50000baseCR_Full); 941 phylink_set(pl->supported, 50000baseLR_ER_FR_Full); 942 phylink_set(pl->supported, 50000baseDR_Full); 943 phylink_set(pl->supported, 100000baseKR4_Full); 944 phylink_set(pl->supported, 100000baseSR4_Full); 945 phylink_set(pl->supported, 100000baseCR4_Full); 946 phylink_set(pl->supported, 100000baseLR4_ER4_Full); 947 phylink_set(pl->supported, 100000baseKR2_Full); 948 phylink_set(pl->supported, 100000baseSR2_Full); 949 phylink_set(pl->supported, 100000baseCR2_Full); 950 phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full); 951 phylink_set(pl->supported, 100000baseDR2_Full); 952 break; 953 954 default: 955 phylink_err(pl, 956 "incorrect link mode %s for in-band status\n", 957 phy_modes(pl->link_config.interface)); 958 return -EINVAL; 959 } 960 961 linkmode_copy(pl->link_config.advertising, pl->supported); 962 963 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 964 phylink_err(pl, 965 "failed to validate link configuration for in-band status\n"); 966 return -EINVAL; 967 } 968 } 969 970 return 0; 971 } 972 973 static void phylink_apply_manual_flow(struct phylink *pl, 974 struct phylink_link_state *state) 975 { 976 /* If autoneg is disabled, pause AN is also disabled */ 977 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 978 state->advertising)) 979 state->pause &= ~MLO_PAUSE_AN; 980 981 /* Manual configuration of pause modes */ 982 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 983 state->pause = pl->link_config.pause; 984 } 985 986 static void phylink_resolve_an_pause(struct phylink_link_state *state) 987 { 988 bool tx_pause, rx_pause; 989 990 if (state->duplex == DUPLEX_FULL) { 991 linkmode_resolve_pause(state->advertising, 992 state->lp_advertising, 993 &tx_pause, &rx_pause); 994 if (tx_pause) 995 state->pause |= MLO_PAUSE_TX; 996 if (rx_pause) 997 state->pause |= MLO_PAUSE_RX; 998 } 999 } 1000 1001 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 1002 phy_interface_t interface) 1003 { 1004 if (pcs && pcs->ops->pcs_pre_config) 1005 pcs->ops->pcs_pre_config(pcs, interface); 1006 } 1007 1008 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 1009 phy_interface_t interface) 1010 { 1011 int err = 0; 1012 1013 if (pcs && pcs->ops->pcs_post_config) 1014 err = pcs->ops->pcs_post_config(pcs, interface); 1015 1016 return err; 1017 } 1018 1019 static void phylink_pcs_disable(struct phylink_pcs *pcs) 1020 { 1021 if (pcs && pcs->ops->pcs_disable) 1022 pcs->ops->pcs_disable(pcs); 1023 } 1024 1025 static int phylink_pcs_enable(struct phylink_pcs *pcs) 1026 { 1027 int err = 0; 1028 1029 if (pcs && pcs->ops->pcs_enable) 1030 err = pcs->ops->pcs_enable(pcs); 1031 1032 return err; 1033 } 1034 1035 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 1036 const struct phylink_link_state *state, 1037 bool permit_pause_to_mac) 1038 { 1039 if (!pcs) 1040 return 0; 1041 1042 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 1043 state->advertising, permit_pause_to_mac); 1044 } 1045 1046 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 1047 phy_interface_t interface, int speed, 1048 int duplex) 1049 { 1050 if (pcs && pcs->ops->pcs_link_up) 1051 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 1052 } 1053 1054 static void phylink_pcs_poll_stop(struct phylink *pl) 1055 { 1056 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 1057 del_timer(&pl->link_poll); 1058 } 1059 1060 static void phylink_pcs_poll_start(struct phylink *pl) 1061 { 1062 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 1063 mod_timer(&pl->link_poll, jiffies + HZ); 1064 } 1065 1066 static void phylink_mac_config(struct phylink *pl, 1067 const struct phylink_link_state *state) 1068 { 1069 struct phylink_link_state st = *state; 1070 1071 /* Stop drivers incorrectly using these */ 1072 linkmode_zero(st.lp_advertising); 1073 st.speed = SPEED_UNKNOWN; 1074 st.duplex = DUPLEX_UNKNOWN; 1075 st.an_complete = false; 1076 st.link = false; 1077 1078 phylink_dbg(pl, 1079 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 1080 __func__, phylink_an_mode_str(pl->cur_link_an_mode), 1081 phy_modes(st.interface), 1082 phy_rate_matching_to_str(st.rate_matching), 1083 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 1084 st.pause); 1085 1086 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, &st); 1087 } 1088 1089 static void phylink_pcs_an_restart(struct phylink *pl) 1090 { 1091 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1092 pl->link_config.advertising) && 1093 phy_interface_mode_is_8023z(pl->link_config.interface) && 1094 phylink_autoneg_inband(pl->cur_link_an_mode)) 1095 pl->pcs->ops->pcs_an_restart(pl->pcs); 1096 } 1097 1098 static void phylink_major_config(struct phylink *pl, bool restart, 1099 const struct phylink_link_state *state) 1100 { 1101 struct phylink_pcs *pcs = NULL; 1102 bool pcs_changed = false; 1103 unsigned int rate_kbd; 1104 unsigned int neg_mode; 1105 int err; 1106 1107 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); 1108 1109 pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode, 1110 state->interface, 1111 state->advertising); 1112 1113 if (pl->using_mac_select_pcs) { 1114 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1115 if (IS_ERR(pcs)) { 1116 phylink_err(pl, 1117 "mac_select_pcs unexpectedly failed: %pe\n", 1118 pcs); 1119 return; 1120 } 1121 1122 pcs_changed = pcs && pl->pcs != pcs; 1123 } 1124 1125 phylink_pcs_poll_stop(pl); 1126 1127 if (pl->mac_ops->mac_prepare) { 1128 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode, 1129 state->interface); 1130 if (err < 0) { 1131 phylink_err(pl, "mac_prepare failed: %pe\n", 1132 ERR_PTR(err)); 1133 return; 1134 } 1135 } 1136 1137 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1138 * for the change. 1139 */ 1140 if (pcs_changed) { 1141 phylink_pcs_disable(pl->pcs); 1142 1143 if (pl->pcs) 1144 pl->pcs->phylink = NULL; 1145 1146 pcs->phylink = pl; 1147 1148 pl->pcs = pcs; 1149 } 1150 1151 if (pl->pcs) 1152 phylink_pcs_pre_config(pl->pcs, state->interface); 1153 1154 phylink_mac_config(pl, state); 1155 1156 if (pl->pcs) 1157 phylink_pcs_post_config(pl->pcs, state->interface); 1158 1159 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1160 phylink_pcs_enable(pl->pcs); 1161 1162 neg_mode = pl->cur_link_an_mode; 1163 if (pl->pcs && pl->pcs->neg_mode) 1164 neg_mode = pl->pcs_neg_mode; 1165 1166 err = phylink_pcs_config(pl->pcs, neg_mode, state, 1167 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1168 if (err < 0) 1169 phylink_err(pl, "pcs_config failed: %pe\n", 1170 ERR_PTR(err)); 1171 else if (err > 0) 1172 restart = true; 1173 1174 if (restart) 1175 phylink_pcs_an_restart(pl); 1176 1177 if (pl->mac_ops->mac_finish) { 1178 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode, 1179 state->interface); 1180 if (err < 0) 1181 phylink_err(pl, "mac_finish failed: %pe\n", 1182 ERR_PTR(err)); 1183 } 1184 1185 if (pl->sfp_bus) { 1186 rate_kbd = phylink_interface_signal_rate(state->interface); 1187 if (rate_kbd) 1188 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1189 } 1190 1191 phylink_pcs_poll_start(pl); 1192 } 1193 1194 /* 1195 * Reconfigure for a change of inband advertisement. 1196 * If we have a separate PCS, we only need to call its pcs_config() method, 1197 * and then restart AN if it indicates something changed. Otherwise, we do 1198 * the full MAC reconfiguration. 1199 */ 1200 static int phylink_change_inband_advert(struct phylink *pl) 1201 { 1202 unsigned int neg_mode; 1203 int ret; 1204 1205 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1206 return 0; 1207 1208 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1209 phylink_an_mode_str(pl->cur_link_an_mode), 1210 phy_modes(pl->link_config.interface), 1211 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1212 pl->link_config.pause); 1213 1214 /* Recompute the PCS neg mode */ 1215 pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode, 1216 pl->link_config.interface, 1217 pl->link_config.advertising); 1218 1219 neg_mode = pl->cur_link_an_mode; 1220 if (pl->pcs->neg_mode) 1221 neg_mode = pl->pcs_neg_mode; 1222 1223 /* Modern PCS-based method; update the advert at the PCS, and 1224 * restart negotiation if the pcs_config() helper indicates that 1225 * the programmed advertisement has changed. 1226 */ 1227 ret = phylink_pcs_config(pl->pcs, neg_mode, &pl->link_config, 1228 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1229 if (ret < 0) 1230 return ret; 1231 1232 if (ret > 0) 1233 phylink_pcs_an_restart(pl); 1234 1235 return 0; 1236 } 1237 1238 static void phylink_mac_pcs_get_state(struct phylink *pl, 1239 struct phylink_link_state *state) 1240 { 1241 linkmode_copy(state->advertising, pl->link_config.advertising); 1242 linkmode_zero(state->lp_advertising); 1243 state->interface = pl->link_config.interface; 1244 state->rate_matching = pl->link_config.rate_matching; 1245 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1246 state->advertising)) { 1247 state->speed = SPEED_UNKNOWN; 1248 state->duplex = DUPLEX_UNKNOWN; 1249 state->pause = MLO_PAUSE_NONE; 1250 } else { 1251 state->speed = pl->link_config.speed; 1252 state->duplex = pl->link_config.duplex; 1253 state->pause = pl->link_config.pause; 1254 } 1255 state->an_complete = 0; 1256 state->link = 1; 1257 1258 if (pl->pcs) 1259 pl->pcs->ops->pcs_get_state(pl->pcs, state); 1260 else 1261 state->link = 0; 1262 } 1263 1264 /* The fixed state is... fixed except for the link state, 1265 * which may be determined by a GPIO or a callback. 1266 */ 1267 static void phylink_get_fixed_state(struct phylink *pl, 1268 struct phylink_link_state *state) 1269 { 1270 *state = pl->link_config; 1271 if (pl->config->get_fixed_state) 1272 pl->config->get_fixed_state(pl->config, state); 1273 else if (pl->link_gpio) 1274 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1275 1276 state->pause = MLO_PAUSE_NONE; 1277 phylink_resolve_an_pause(state); 1278 } 1279 1280 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1281 { 1282 struct phylink_link_state link_state; 1283 1284 switch (pl->cur_link_an_mode) { 1285 case MLO_AN_PHY: 1286 link_state = pl->phy_state; 1287 break; 1288 1289 case MLO_AN_FIXED: 1290 phylink_get_fixed_state(pl, &link_state); 1291 break; 1292 1293 case MLO_AN_INBAND: 1294 link_state = pl->link_config; 1295 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1296 link_state.pause = MLO_PAUSE_NONE; 1297 break; 1298 1299 default: /* can't happen */ 1300 return; 1301 } 1302 1303 link_state.link = false; 1304 1305 phylink_apply_manual_flow(pl, &link_state); 1306 phylink_major_config(pl, force_restart, &link_state); 1307 } 1308 1309 static const char *phylink_pause_to_str(int pause) 1310 { 1311 switch (pause & MLO_PAUSE_TXRX_MASK) { 1312 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1313 return "rx/tx"; 1314 case MLO_PAUSE_TX: 1315 return "tx"; 1316 case MLO_PAUSE_RX: 1317 return "rx"; 1318 default: 1319 return "off"; 1320 } 1321 } 1322 1323 static void phylink_link_up(struct phylink *pl, 1324 struct phylink_link_state link_state) 1325 { 1326 struct net_device *ndev = pl->netdev; 1327 unsigned int neg_mode; 1328 int speed, duplex; 1329 bool rx_pause; 1330 1331 speed = link_state.speed; 1332 duplex = link_state.duplex; 1333 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1334 1335 switch (link_state.rate_matching) { 1336 case RATE_MATCH_PAUSE: 1337 /* The PHY is doing rate matchion from the media rate (in 1338 * the link_state) to the interface speed, and will send 1339 * pause frames to the MAC to limit its transmission speed. 1340 */ 1341 speed = phylink_interface_max_speed(link_state.interface); 1342 duplex = DUPLEX_FULL; 1343 rx_pause = true; 1344 break; 1345 1346 case RATE_MATCH_CRS: 1347 /* The PHY is doing rate matchion from the media rate (in 1348 * the link_state) to the interface speed, and will cause 1349 * collisions to the MAC to limit its transmission speed. 1350 */ 1351 speed = phylink_interface_max_speed(link_state.interface); 1352 duplex = DUPLEX_HALF; 1353 break; 1354 } 1355 1356 pl->cur_interface = link_state.interface; 1357 1358 neg_mode = pl->cur_link_an_mode; 1359 if (pl->pcs && pl->pcs->neg_mode) 1360 neg_mode = pl->pcs_neg_mode; 1361 1362 phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed, 1363 duplex); 1364 1365 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode, 1366 pl->cur_interface, speed, duplex, 1367 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1368 1369 if (ndev) 1370 netif_carrier_on(ndev); 1371 1372 phylink_info(pl, 1373 "Link is Up - %s/%s - flow control %s\n", 1374 phy_speed_to_str(link_state.speed), 1375 phy_duplex_to_str(link_state.duplex), 1376 phylink_pause_to_str(link_state.pause)); 1377 } 1378 1379 static void phylink_link_down(struct phylink *pl) 1380 { 1381 struct net_device *ndev = pl->netdev; 1382 1383 if (ndev) 1384 netif_carrier_off(ndev); 1385 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode, 1386 pl->cur_interface); 1387 phylink_info(pl, "Link is Down\n"); 1388 } 1389 1390 static void phylink_resolve(struct work_struct *w) 1391 { 1392 struct phylink *pl = container_of(w, struct phylink, resolve); 1393 struct phylink_link_state link_state; 1394 struct net_device *ndev = pl->netdev; 1395 bool mac_config = false; 1396 bool retrigger = false; 1397 bool cur_link_state; 1398 1399 mutex_lock(&pl->state_mutex); 1400 if (pl->netdev) 1401 cur_link_state = netif_carrier_ok(ndev); 1402 else 1403 cur_link_state = pl->old_link_state; 1404 1405 if (pl->phylink_disable_state) { 1406 pl->mac_link_dropped = false; 1407 link_state.link = false; 1408 } else if (pl->mac_link_dropped) { 1409 link_state.link = false; 1410 retrigger = true; 1411 } else { 1412 switch (pl->cur_link_an_mode) { 1413 case MLO_AN_PHY: 1414 link_state = pl->phy_state; 1415 phylink_apply_manual_flow(pl, &link_state); 1416 mac_config = link_state.link; 1417 break; 1418 1419 case MLO_AN_FIXED: 1420 phylink_get_fixed_state(pl, &link_state); 1421 mac_config = link_state.link; 1422 break; 1423 1424 case MLO_AN_INBAND: 1425 phylink_mac_pcs_get_state(pl, &link_state); 1426 1427 /* The PCS may have a latching link-fail indicator. 1428 * If the link was up, bring the link down and 1429 * re-trigger the resolve. Otherwise, re-read the 1430 * PCS state to get the current status of the link. 1431 */ 1432 if (!link_state.link) { 1433 if (cur_link_state) 1434 retrigger = true; 1435 else 1436 phylink_mac_pcs_get_state(pl, 1437 &link_state); 1438 } 1439 1440 /* If we have a phy, the "up" state is the union of 1441 * both the PHY and the MAC 1442 */ 1443 if (pl->phydev) 1444 link_state.link &= pl->phy_state.link; 1445 1446 /* Only update if the PHY link is up */ 1447 if (pl->phydev && pl->phy_state.link) { 1448 /* If the interface has changed, force a 1449 * link down event if the link isn't already 1450 * down, and re-resolve. 1451 */ 1452 if (link_state.interface != 1453 pl->phy_state.interface) { 1454 retrigger = true; 1455 link_state.link = false; 1456 } 1457 link_state.interface = pl->phy_state.interface; 1458 1459 /* If we are doing rate matching, then the 1460 * link speed/duplex comes from the PHY 1461 */ 1462 if (pl->phy_state.rate_matching) { 1463 link_state.rate_matching = 1464 pl->phy_state.rate_matching; 1465 link_state.speed = pl->phy_state.speed; 1466 link_state.duplex = 1467 pl->phy_state.duplex; 1468 } 1469 1470 /* If we have a PHY, we need to update with 1471 * the PHY flow control bits. 1472 */ 1473 link_state.pause = pl->phy_state.pause; 1474 mac_config = true; 1475 } 1476 phylink_apply_manual_flow(pl, &link_state); 1477 break; 1478 } 1479 } 1480 1481 if (mac_config) { 1482 if (link_state.interface != pl->link_config.interface) { 1483 /* The interface has changed, force the link down and 1484 * then reconfigure. 1485 */ 1486 if (cur_link_state) { 1487 phylink_link_down(pl); 1488 cur_link_state = false; 1489 } 1490 phylink_major_config(pl, false, &link_state); 1491 pl->link_config.interface = link_state.interface; 1492 } 1493 } 1494 1495 if (link_state.link != cur_link_state) { 1496 pl->old_link_state = link_state.link; 1497 if (!link_state.link) 1498 phylink_link_down(pl); 1499 else 1500 phylink_link_up(pl, link_state); 1501 } 1502 if (!link_state.link && retrigger) { 1503 pl->mac_link_dropped = false; 1504 queue_work(system_power_efficient_wq, &pl->resolve); 1505 } 1506 mutex_unlock(&pl->state_mutex); 1507 } 1508 1509 static void phylink_run_resolve(struct phylink *pl) 1510 { 1511 if (!pl->phylink_disable_state) 1512 queue_work(system_power_efficient_wq, &pl->resolve); 1513 } 1514 1515 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1516 { 1517 unsigned long state = pl->phylink_disable_state; 1518 1519 set_bit(bit, &pl->phylink_disable_state); 1520 if (state == 0) { 1521 queue_work(system_power_efficient_wq, &pl->resolve); 1522 flush_work(&pl->resolve); 1523 } 1524 } 1525 1526 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1527 { 1528 clear_bit(bit, &pl->phylink_disable_state); 1529 phylink_run_resolve(pl); 1530 } 1531 1532 static void phylink_fixed_poll(struct timer_list *t) 1533 { 1534 struct phylink *pl = container_of(t, struct phylink, link_poll); 1535 1536 mod_timer(t, jiffies + HZ); 1537 1538 phylink_run_resolve(pl); 1539 } 1540 1541 static const struct sfp_upstream_ops sfp_phylink_ops; 1542 1543 static int phylink_register_sfp(struct phylink *pl, 1544 const struct fwnode_handle *fwnode) 1545 { 1546 struct sfp_bus *bus; 1547 int ret; 1548 1549 if (!fwnode) 1550 return 0; 1551 1552 bus = sfp_bus_find_fwnode(fwnode); 1553 if (IS_ERR(bus)) { 1554 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1555 return PTR_ERR(bus); 1556 } 1557 1558 pl->sfp_bus = bus; 1559 1560 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1561 sfp_bus_put(bus); 1562 1563 return ret; 1564 } 1565 1566 /** 1567 * phylink_create() - create a phylink instance 1568 * @config: a pointer to the target &struct phylink_config 1569 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1570 * interface 1571 * @iface: the desired link mode defined by &typedef phy_interface_t 1572 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1573 * 1574 * Create a new phylink instance, and parse the link parameters found in @np. 1575 * This will parse in-band modes, fixed-link or SFP configuration. 1576 * 1577 * Note: the rtnl lock must not be held when calling this function. 1578 * 1579 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1580 * must use IS_ERR() to check for errors from this function. 1581 */ 1582 struct phylink *phylink_create(struct phylink_config *config, 1583 const struct fwnode_handle *fwnode, 1584 phy_interface_t iface, 1585 const struct phylink_mac_ops *mac_ops) 1586 { 1587 bool using_mac_select_pcs = false; 1588 struct phylink *pl; 1589 int ret; 1590 1591 /* Validate the supplied configuration */ 1592 if (phy_interface_empty(config->supported_interfaces)) { 1593 dev_err(config->dev, 1594 "phylink: error: empty supported_interfaces\n"); 1595 return ERR_PTR(-EINVAL); 1596 } 1597 1598 if (mac_ops->mac_select_pcs && 1599 mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) != 1600 ERR_PTR(-EOPNOTSUPP)) 1601 using_mac_select_pcs = true; 1602 1603 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1604 if (!pl) 1605 return ERR_PTR(-ENOMEM); 1606 1607 mutex_init(&pl->state_mutex); 1608 INIT_WORK(&pl->resolve, phylink_resolve); 1609 1610 pl->config = config; 1611 if (config->type == PHYLINK_NETDEV) { 1612 pl->netdev = to_net_dev(config->dev); 1613 } else if (config->type == PHYLINK_DEV) { 1614 pl->dev = config->dev; 1615 } else { 1616 kfree(pl); 1617 return ERR_PTR(-EINVAL); 1618 } 1619 1620 pl->using_mac_select_pcs = using_mac_select_pcs; 1621 pl->phy_state.interface = iface; 1622 pl->link_interface = iface; 1623 if (iface == PHY_INTERFACE_MODE_MOCA) 1624 pl->link_port = PORT_BNC; 1625 else 1626 pl->link_port = PORT_MII; 1627 pl->link_config.interface = iface; 1628 pl->link_config.pause = MLO_PAUSE_AN; 1629 pl->link_config.speed = SPEED_UNKNOWN; 1630 pl->link_config.duplex = DUPLEX_UNKNOWN; 1631 pl->pcs_state = PCS_STATE_DOWN; 1632 pl->mac_ops = mac_ops; 1633 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1634 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1635 1636 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 1637 linkmode_copy(pl->link_config.advertising, pl->supported); 1638 phylink_validate(pl, pl->supported, &pl->link_config); 1639 1640 ret = phylink_parse_mode(pl, fwnode); 1641 if (ret < 0) { 1642 kfree(pl); 1643 return ERR_PTR(ret); 1644 } 1645 1646 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1647 ret = phylink_parse_fixedlink(pl, fwnode); 1648 if (ret < 0) { 1649 kfree(pl); 1650 return ERR_PTR(ret); 1651 } 1652 } 1653 1654 pl->cur_link_an_mode = pl->cfg_link_an_mode; 1655 1656 ret = phylink_register_sfp(pl, fwnode); 1657 if (ret < 0) { 1658 kfree(pl); 1659 return ERR_PTR(ret); 1660 } 1661 1662 return pl; 1663 } 1664 EXPORT_SYMBOL_GPL(phylink_create); 1665 1666 /** 1667 * phylink_destroy() - cleanup and destroy the phylink instance 1668 * @pl: a pointer to a &struct phylink returned from phylink_create() 1669 * 1670 * Destroy a phylink instance. Any PHY that has been attached must have been 1671 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1672 * 1673 * Note: the rtnl lock must not be held when calling this function. 1674 */ 1675 void phylink_destroy(struct phylink *pl) 1676 { 1677 sfp_bus_del_upstream(pl->sfp_bus); 1678 if (pl->link_gpio) 1679 gpiod_put(pl->link_gpio); 1680 1681 cancel_work_sync(&pl->resolve); 1682 kfree(pl); 1683 } 1684 EXPORT_SYMBOL_GPL(phylink_destroy); 1685 1686 /** 1687 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1688 * @pl: a pointer to a &struct phylink returned from phylink_create() 1689 * 1690 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1691 * no PHY is needed. 1692 * 1693 * Returns true if phylink will be expecting a PHY. 1694 */ 1695 bool phylink_expects_phy(struct phylink *pl) 1696 { 1697 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1698 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1699 phy_interface_mode_is_8023z(pl->link_config.interface))) 1700 return false; 1701 return true; 1702 } 1703 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1704 1705 static void phylink_phy_change(struct phy_device *phydev, bool up) 1706 { 1707 struct phylink *pl = phydev->phylink; 1708 bool tx_pause, rx_pause; 1709 1710 phy_get_pause(phydev, &tx_pause, &rx_pause); 1711 1712 mutex_lock(&pl->state_mutex); 1713 pl->phy_state.speed = phydev->speed; 1714 pl->phy_state.duplex = phydev->duplex; 1715 pl->phy_state.rate_matching = phydev->rate_matching; 1716 pl->phy_state.pause = MLO_PAUSE_NONE; 1717 if (tx_pause) 1718 pl->phy_state.pause |= MLO_PAUSE_TX; 1719 if (rx_pause) 1720 pl->phy_state.pause |= MLO_PAUSE_RX; 1721 pl->phy_state.interface = phydev->interface; 1722 pl->phy_state.link = up; 1723 mutex_unlock(&pl->state_mutex); 1724 1725 phylink_run_resolve(pl); 1726 1727 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down", 1728 phy_modes(phydev->interface), 1729 phy_speed_to_str(phydev->speed), 1730 phy_duplex_to_str(phydev->duplex), 1731 phy_rate_matching_to_str(phydev->rate_matching), 1732 phylink_pause_to_str(pl->phy_state.pause)); 1733 } 1734 1735 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 1736 phy_interface_t interface) 1737 { 1738 struct phylink_link_state config; 1739 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 1740 char *irq_str; 1741 int ret; 1742 1743 /* 1744 * This is the new way of dealing with flow control for PHYs, 1745 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 1746 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 1747 * using our validate call to the MAC, we rely upon the MAC 1748 * clearing the bits from both supported and advertising fields. 1749 */ 1750 phy_support_asym_pause(phy); 1751 1752 memset(&config, 0, sizeof(config)); 1753 linkmode_copy(supported, phy->supported); 1754 linkmode_copy(config.advertising, phy->advertising); 1755 1756 /* Check whether we would use rate matching for the proposed interface 1757 * mode. 1758 */ 1759 config.rate_matching = phy_get_rate_matching(phy, interface); 1760 1761 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 1762 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 1763 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 1764 * their Serdes is either unnecessary or not reasonable. 1765 * 1766 * For these which switch interface modes, we really need to know which 1767 * interface modes the PHY supports to properly work out which ethtool 1768 * linkmodes can be supported. For now, as a work-around, we validate 1769 * against all interface modes, which may lead to more ethtool link 1770 * modes being advertised than are actually supported. 1771 */ 1772 if (phy->is_c45 && config.rate_matching == RATE_MATCH_NONE && 1773 interface != PHY_INTERFACE_MODE_RXAUI && 1774 interface != PHY_INTERFACE_MODE_XAUI && 1775 interface != PHY_INTERFACE_MODE_USXGMII) 1776 config.interface = PHY_INTERFACE_MODE_NA; 1777 else 1778 config.interface = interface; 1779 1780 ret = phylink_validate(pl, supported, &config); 1781 if (ret) { 1782 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 1783 phy_modes(config.interface), 1784 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 1785 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 1786 ERR_PTR(ret)); 1787 return ret; 1788 } 1789 1790 phy->phylink = pl; 1791 phy->phy_link_change = phylink_phy_change; 1792 1793 irq_str = phy_attached_info_irq(phy); 1794 phylink_info(pl, 1795 "PHY [%s] driver [%s] (irq=%s)\n", 1796 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 1797 kfree(irq_str); 1798 1799 mutex_lock(&phy->lock); 1800 mutex_lock(&pl->state_mutex); 1801 pl->phydev = phy; 1802 pl->phy_state.interface = interface; 1803 pl->phy_state.pause = MLO_PAUSE_NONE; 1804 pl->phy_state.speed = SPEED_UNKNOWN; 1805 pl->phy_state.duplex = DUPLEX_UNKNOWN; 1806 pl->phy_state.rate_matching = RATE_MATCH_NONE; 1807 linkmode_copy(pl->supported, supported); 1808 linkmode_copy(pl->link_config.advertising, config.advertising); 1809 1810 /* Restrict the phy advertisement according to the MAC support. */ 1811 linkmode_copy(phy->advertising, config.advertising); 1812 mutex_unlock(&pl->state_mutex); 1813 mutex_unlock(&phy->lock); 1814 1815 phylink_dbg(pl, 1816 "phy: %s setting supported %*pb advertising %*pb\n", 1817 phy_modes(interface), 1818 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 1819 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 1820 1821 if (phy_interrupt_is_valid(phy)) 1822 phy_request_interrupt(phy); 1823 1824 if (pl->config->mac_managed_pm) 1825 phy->mac_managed_pm = true; 1826 1827 return 0; 1828 } 1829 1830 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 1831 phy_interface_t interface) 1832 { 1833 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 1834 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1835 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 1836 return -EINVAL; 1837 1838 if (pl->phydev) 1839 return -EBUSY; 1840 1841 return phy_attach_direct(pl->netdev, phy, 0, interface); 1842 } 1843 1844 /** 1845 * phylink_connect_phy() - connect a PHY to the phylink instance 1846 * @pl: a pointer to a &struct phylink returned from phylink_create() 1847 * @phy: a pointer to a &struct phy_device. 1848 * 1849 * Connect @phy to the phylink instance specified by @pl by calling 1850 * phy_attach_direct(). Configure the @phy according to the MAC driver's 1851 * capabilities, start the PHYLIB state machine and enable any interrupts 1852 * that the PHY supports. 1853 * 1854 * This updates the phylink's ethtool supported and advertising link mode 1855 * masks. 1856 * 1857 * Returns 0 on success or a negative errno. 1858 */ 1859 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 1860 { 1861 int ret; 1862 1863 /* Use PHY device/driver interface */ 1864 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1865 pl->link_interface = phy->interface; 1866 pl->link_config.interface = pl->link_interface; 1867 } 1868 1869 ret = phylink_attach_phy(pl, phy, pl->link_interface); 1870 if (ret < 0) 1871 return ret; 1872 1873 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 1874 if (ret) 1875 phy_detach(phy); 1876 1877 return ret; 1878 } 1879 EXPORT_SYMBOL_GPL(phylink_connect_phy); 1880 1881 /** 1882 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 1883 * @pl: a pointer to a &struct phylink returned from phylink_create() 1884 * @dn: a pointer to a &struct device_node. 1885 * @flags: PHY-specific flags to communicate to the PHY device driver 1886 * 1887 * Connect the phy specified in the device node @dn to the phylink instance 1888 * specified by @pl. Actions specified in phylink_connect_phy() will be 1889 * performed. 1890 * 1891 * Returns 0 on success or a negative errno. 1892 */ 1893 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 1894 u32 flags) 1895 { 1896 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 1897 } 1898 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 1899 1900 /** 1901 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 1902 * @pl: a pointer to a &struct phylink returned from phylink_create() 1903 * @fwnode: a pointer to a &struct fwnode_handle. 1904 * @flags: PHY-specific flags to communicate to the PHY device driver 1905 * 1906 * Connect the phy specified @fwnode to the phylink instance specified 1907 * by @pl. 1908 * 1909 * Returns 0 on success or a negative errno. 1910 */ 1911 int phylink_fwnode_phy_connect(struct phylink *pl, 1912 const struct fwnode_handle *fwnode, 1913 u32 flags) 1914 { 1915 struct fwnode_handle *phy_fwnode; 1916 struct phy_device *phy_dev; 1917 int ret; 1918 1919 /* Fixed links and 802.3z are handled without needing a PHY */ 1920 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1921 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1922 phy_interface_mode_is_8023z(pl->link_interface))) 1923 return 0; 1924 1925 phy_fwnode = fwnode_get_phy_node(fwnode); 1926 if (IS_ERR(phy_fwnode)) { 1927 if (pl->cfg_link_an_mode == MLO_AN_PHY) 1928 return -ENODEV; 1929 return 0; 1930 } 1931 1932 phy_dev = fwnode_phy_find_device(phy_fwnode); 1933 /* We're done with the phy_node handle */ 1934 fwnode_handle_put(phy_fwnode); 1935 if (!phy_dev) 1936 return -ENODEV; 1937 1938 /* Use PHY device/driver interface */ 1939 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1940 pl->link_interface = phy_dev->interface; 1941 pl->link_config.interface = pl->link_interface; 1942 } 1943 1944 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 1945 pl->link_interface); 1946 phy_device_free(phy_dev); 1947 if (ret) 1948 return ret; 1949 1950 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 1951 if (ret) 1952 phy_detach(phy_dev); 1953 1954 return ret; 1955 } 1956 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 1957 1958 /** 1959 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 1960 * instance. 1961 * @pl: a pointer to a &struct phylink returned from phylink_create() 1962 * 1963 * Disconnect any current PHY from the phylink instance described by @pl. 1964 */ 1965 void phylink_disconnect_phy(struct phylink *pl) 1966 { 1967 struct phy_device *phy; 1968 1969 ASSERT_RTNL(); 1970 1971 phy = pl->phydev; 1972 if (phy) { 1973 mutex_lock(&phy->lock); 1974 mutex_lock(&pl->state_mutex); 1975 pl->phydev = NULL; 1976 mutex_unlock(&pl->state_mutex); 1977 mutex_unlock(&phy->lock); 1978 flush_work(&pl->resolve); 1979 1980 phy_disconnect(phy); 1981 } 1982 } 1983 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 1984 1985 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 1986 { 1987 if (!up) 1988 pl->mac_link_dropped = true; 1989 phylink_run_resolve(pl); 1990 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 1991 } 1992 1993 /** 1994 * phylink_mac_change() - notify phylink of a change in MAC state 1995 * @pl: a pointer to a &struct phylink returned from phylink_create() 1996 * @up: indicates whether the link is currently up. 1997 * 1998 * The MAC driver should call this driver when the state of its link 1999 * changes (eg, link failure, new negotiation results, etc.) 2000 */ 2001 void phylink_mac_change(struct phylink *pl, bool up) 2002 { 2003 phylink_link_changed(pl, up, "mac"); 2004 } 2005 EXPORT_SYMBOL_GPL(phylink_mac_change); 2006 2007 /** 2008 * phylink_pcs_change() - notify phylink of a change to PCS link state 2009 * @pcs: pointer to &struct phylink_pcs 2010 * @up: indicates whether the link is currently up. 2011 * 2012 * The PCS driver should call this when the state of its link changes 2013 * (e.g. link failure, new negotiation results, etc.) Note: it should 2014 * not determine "up" by reading the BMSR. If in doubt about the link 2015 * state at interrupt time, then pass true if pcs_get_state() returns 2016 * the latched link-down state, otherwise pass false. 2017 */ 2018 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2019 { 2020 struct phylink *pl = pcs->phylink; 2021 2022 if (pl) 2023 phylink_link_changed(pl, up, "pcs"); 2024 } 2025 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2026 2027 static irqreturn_t phylink_link_handler(int irq, void *data) 2028 { 2029 struct phylink *pl = data; 2030 2031 phylink_run_resolve(pl); 2032 2033 return IRQ_HANDLED; 2034 } 2035 2036 /** 2037 * phylink_start() - start a phylink instance 2038 * @pl: a pointer to a &struct phylink returned from phylink_create() 2039 * 2040 * Start the phylink instance specified by @pl, configuring the MAC for the 2041 * desired link mode(s) and negotiation style. This should be called from the 2042 * network device driver's &struct net_device_ops ndo_open() method. 2043 */ 2044 void phylink_start(struct phylink *pl) 2045 { 2046 bool poll = false; 2047 2048 ASSERT_RTNL(); 2049 2050 phylink_info(pl, "configuring for %s/%s link mode\n", 2051 phylink_an_mode_str(pl->cur_link_an_mode), 2052 phy_modes(pl->link_config.interface)); 2053 2054 /* Always set the carrier off */ 2055 if (pl->netdev) 2056 netif_carrier_off(pl->netdev); 2057 2058 pl->pcs_state = PCS_STATE_STARTING; 2059 2060 /* Apply the link configuration to the MAC when starting. This allows 2061 * a fixed-link to start with the correct parameters, and also 2062 * ensures that we set the appropriate advertisement for Serdes links. 2063 * 2064 * Restart autonegotiation if using 802.3z to ensure that the link 2065 * parameters are properly negotiated. This is necessary for DSA 2066 * switches using 802.3z negotiation to ensure they see our modes. 2067 */ 2068 phylink_mac_initial_config(pl, true); 2069 2070 pl->pcs_state = PCS_STATE_STARTED; 2071 2072 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2073 2074 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2075 int irq = gpiod_to_irq(pl->link_gpio); 2076 2077 if (irq > 0) { 2078 if (!request_irq(irq, phylink_link_handler, 2079 IRQF_TRIGGER_RISING | 2080 IRQF_TRIGGER_FALLING, 2081 "netdev link", pl)) 2082 pl->link_irq = irq; 2083 else 2084 irq = 0; 2085 } 2086 if (irq <= 0) 2087 poll = true; 2088 } 2089 2090 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2091 poll |= pl->config->poll_fixed_state; 2092 2093 if (poll) 2094 mod_timer(&pl->link_poll, jiffies + HZ); 2095 if (pl->phydev) 2096 phy_start(pl->phydev); 2097 if (pl->sfp_bus) 2098 sfp_upstream_start(pl->sfp_bus); 2099 } 2100 EXPORT_SYMBOL_GPL(phylink_start); 2101 2102 /** 2103 * phylink_stop() - stop a phylink instance 2104 * @pl: a pointer to a &struct phylink returned from phylink_create() 2105 * 2106 * Stop the phylink instance specified by @pl. This should be called from the 2107 * network device driver's &struct net_device_ops ndo_stop() method. The 2108 * network device's carrier state should not be changed prior to calling this 2109 * function. 2110 * 2111 * This will synchronously bring down the link if the link is not already 2112 * down (in other words, it will trigger a mac_link_down() method call.) 2113 */ 2114 void phylink_stop(struct phylink *pl) 2115 { 2116 ASSERT_RTNL(); 2117 2118 if (pl->sfp_bus) 2119 sfp_upstream_stop(pl->sfp_bus); 2120 if (pl->phydev) 2121 phy_stop(pl->phydev); 2122 del_timer_sync(&pl->link_poll); 2123 if (pl->link_irq) { 2124 free_irq(pl->link_irq, pl); 2125 pl->link_irq = 0; 2126 } 2127 2128 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2129 2130 pl->pcs_state = PCS_STATE_DOWN; 2131 2132 phylink_pcs_disable(pl->pcs); 2133 } 2134 EXPORT_SYMBOL_GPL(phylink_stop); 2135 2136 /** 2137 * phylink_suspend() - handle a network device suspend event 2138 * @pl: a pointer to a &struct phylink returned from phylink_create() 2139 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2140 * 2141 * Handle a network device suspend event. There are several cases: 2142 * 2143 * - If Wake-on-Lan is not active, we can bring down the link between 2144 * the MAC and PHY by calling phylink_stop(). 2145 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2146 * can also bring down the link between the MAC and PHY. 2147 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2148 * still needs to receive packets, so we can not bring the link down. 2149 */ 2150 void phylink_suspend(struct phylink *pl, bool mac_wol) 2151 { 2152 ASSERT_RTNL(); 2153 2154 if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) { 2155 /* Wake-on-Lan enabled, MAC handling */ 2156 mutex_lock(&pl->state_mutex); 2157 2158 /* Stop the resolver bringing the link up */ 2159 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2160 2161 /* Disable the carrier, to prevent transmit timeouts, 2162 * but one would hope all packets have been sent. This 2163 * also means phylink_resolve() will do nothing. 2164 */ 2165 if (pl->netdev) 2166 netif_carrier_off(pl->netdev); 2167 else 2168 pl->old_link_state = false; 2169 2170 /* We do not call mac_link_down() here as we want the 2171 * link to remain up to receive the WoL packets. 2172 */ 2173 mutex_unlock(&pl->state_mutex); 2174 } else { 2175 phylink_stop(pl); 2176 } 2177 } 2178 EXPORT_SYMBOL_GPL(phylink_suspend); 2179 2180 /** 2181 * phylink_resume() - handle a network device resume event 2182 * @pl: a pointer to a &struct phylink returned from phylink_create() 2183 * 2184 * Undo the effects of phylink_suspend(), returning the link to an 2185 * operational state. 2186 */ 2187 void phylink_resume(struct phylink *pl) 2188 { 2189 ASSERT_RTNL(); 2190 2191 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2192 /* Wake-on-Lan enabled, MAC handling */ 2193 2194 /* Call mac_link_down() so we keep the overall state balanced. 2195 * Do this under the state_mutex lock for consistency. This 2196 * will cause a "Link Down" message to be printed during 2197 * resume, which is harmless - the true link state will be 2198 * printed when we run a resolve. 2199 */ 2200 mutex_lock(&pl->state_mutex); 2201 phylink_link_down(pl); 2202 mutex_unlock(&pl->state_mutex); 2203 2204 /* Re-apply the link parameters so that all the settings get 2205 * restored to the MAC. 2206 */ 2207 phylink_mac_initial_config(pl, true); 2208 2209 /* Re-enable and re-resolve the link parameters */ 2210 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2211 } else { 2212 phylink_start(pl); 2213 } 2214 } 2215 EXPORT_SYMBOL_GPL(phylink_resume); 2216 2217 /** 2218 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2219 * @pl: a pointer to a &struct phylink returned from phylink_create() 2220 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2221 * 2222 * Read the wake on lan parameters from the PHY attached to the phylink 2223 * instance specified by @pl. If no PHY is currently attached, report no 2224 * support for wake on lan. 2225 */ 2226 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2227 { 2228 ASSERT_RTNL(); 2229 2230 wol->supported = 0; 2231 wol->wolopts = 0; 2232 2233 if (pl->phydev) 2234 phy_ethtool_get_wol(pl->phydev, wol); 2235 } 2236 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2237 2238 /** 2239 * phylink_ethtool_set_wol() - set wake on lan parameters 2240 * @pl: a pointer to a &struct phylink returned from phylink_create() 2241 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2242 * 2243 * Set the wake on lan parameters for the PHY attached to the phylink 2244 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2245 * error. 2246 * 2247 * Returns zero on success or negative errno code. 2248 */ 2249 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2250 { 2251 int ret = -EOPNOTSUPP; 2252 2253 ASSERT_RTNL(); 2254 2255 if (pl->phydev) 2256 ret = phy_ethtool_set_wol(pl->phydev, wol); 2257 2258 return ret; 2259 } 2260 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2261 2262 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2263 { 2264 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2265 2266 linkmode_zero(mask); 2267 phylink_set_port_modes(mask); 2268 2269 linkmode_and(dst, dst, mask); 2270 linkmode_or(dst, dst, b); 2271 } 2272 2273 static void phylink_get_ksettings(const struct phylink_link_state *state, 2274 struct ethtool_link_ksettings *kset) 2275 { 2276 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2277 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2278 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2279 kset->base.speed = state->speed; 2280 kset->base.duplex = state->duplex; 2281 } 2282 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2283 state->advertising) ? 2284 AUTONEG_ENABLE : AUTONEG_DISABLE; 2285 } 2286 2287 /** 2288 * phylink_ethtool_ksettings_get() - get the current link settings 2289 * @pl: a pointer to a &struct phylink returned from phylink_create() 2290 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2291 * 2292 * Read the current link settings for the phylink instance specified by @pl. 2293 * This will be the link settings read from the MAC, PHY or fixed link 2294 * settings depending on the current negotiation mode. 2295 */ 2296 int phylink_ethtool_ksettings_get(struct phylink *pl, 2297 struct ethtool_link_ksettings *kset) 2298 { 2299 struct phylink_link_state link_state; 2300 2301 ASSERT_RTNL(); 2302 2303 if (pl->phydev) 2304 phy_ethtool_ksettings_get(pl->phydev, kset); 2305 else 2306 kset->base.port = pl->link_port; 2307 2308 linkmode_copy(kset->link_modes.supported, pl->supported); 2309 2310 switch (pl->cur_link_an_mode) { 2311 case MLO_AN_FIXED: 2312 /* We are using fixed settings. Report these as the 2313 * current link settings - and note that these also 2314 * represent the supported speeds/duplex/pause modes. 2315 */ 2316 phylink_get_fixed_state(pl, &link_state); 2317 phylink_get_ksettings(&link_state, kset); 2318 break; 2319 2320 case MLO_AN_INBAND: 2321 /* If there is a phy attached, then use the reported 2322 * settings from the phy with no modification. 2323 */ 2324 if (pl->phydev) 2325 break; 2326 2327 phylink_mac_pcs_get_state(pl, &link_state); 2328 2329 /* The MAC is reporting the link results from its own PCS 2330 * layer via in-band status. Report these as the current 2331 * link settings. 2332 */ 2333 phylink_get_ksettings(&link_state, kset); 2334 break; 2335 } 2336 2337 return 0; 2338 } 2339 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2340 2341 /** 2342 * phylink_ethtool_ksettings_set() - set the link settings 2343 * @pl: a pointer to a &struct phylink returned from phylink_create() 2344 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2345 */ 2346 int phylink_ethtool_ksettings_set(struct phylink *pl, 2347 const struct ethtool_link_ksettings *kset) 2348 { 2349 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2350 struct phylink_link_state config; 2351 const struct phy_setting *s; 2352 2353 ASSERT_RTNL(); 2354 2355 if (pl->phydev) { 2356 struct ethtool_link_ksettings phy_kset = *kset; 2357 2358 linkmode_and(phy_kset.link_modes.advertising, 2359 phy_kset.link_modes.advertising, 2360 pl->supported); 2361 2362 /* We can rely on phylib for this update; we also do not need 2363 * to update the pl->link_config settings: 2364 * - the configuration returned via ksettings_get() will come 2365 * from phylib whenever a PHY is present. 2366 * - link_config.interface will be updated by the PHY calling 2367 * back via phylink_phy_change() and a subsequent resolve. 2368 * - initial link configuration for PHY mode comes from the 2369 * last phy state updated via phylink_phy_change(). 2370 * - other configuration changes (e.g. pause modes) are 2371 * performed directly via phylib. 2372 * - if in in-band mode with a PHY, the link configuration 2373 * is passed on the link from the PHY, and all of 2374 * link_config.{speed,duplex,an_enabled,pause} are not used. 2375 * - the only possible use would be link_config.advertising 2376 * pause modes when in 1000base-X mode with a PHY, but in 2377 * the presence of a PHY, this should not be changed as that 2378 * should be determined from the media side advertisement. 2379 */ 2380 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 2381 } 2382 2383 config = pl->link_config; 2384 /* Mask out unsupported advertisements */ 2385 linkmode_and(config.advertising, kset->link_modes.advertising, 2386 pl->supported); 2387 2388 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 2389 switch (kset->base.autoneg) { 2390 case AUTONEG_DISABLE: 2391 /* Autonegotiation disabled, select a suitable speed and 2392 * duplex. 2393 */ 2394 s = phy_lookup_setting(kset->base.speed, kset->base.duplex, 2395 pl->supported, false); 2396 if (!s) 2397 return -EINVAL; 2398 2399 /* If we have a fixed link, refuse to change link parameters. 2400 * If the link parameters match, accept them but do nothing. 2401 */ 2402 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2403 if (s->speed != pl->link_config.speed || 2404 s->duplex != pl->link_config.duplex) 2405 return -EINVAL; 2406 return 0; 2407 } 2408 2409 config.speed = s->speed; 2410 config.duplex = s->duplex; 2411 break; 2412 2413 case AUTONEG_ENABLE: 2414 /* If we have a fixed link, allow autonegotiation (since that 2415 * is our default case) but do not allow the advertisement to 2416 * be changed. If the advertisement matches, simply return. 2417 */ 2418 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2419 if (!linkmode_equal(config.advertising, 2420 pl->link_config.advertising)) 2421 return -EINVAL; 2422 return 0; 2423 } 2424 2425 config.speed = SPEED_UNKNOWN; 2426 config.duplex = DUPLEX_UNKNOWN; 2427 break; 2428 2429 default: 2430 return -EINVAL; 2431 } 2432 2433 /* We have ruled out the case with a PHY attached, and the 2434 * fixed-link cases. All that is left are in-band links. 2435 */ 2436 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2437 kset->base.autoneg == AUTONEG_ENABLE); 2438 2439 /* If this link is with an SFP, ensure that changes to advertised modes 2440 * also cause the associated interface to be selected such that the 2441 * link can be configured correctly. 2442 */ 2443 if (pl->sfp_bus) { 2444 config.interface = sfp_select_interface(pl->sfp_bus, 2445 config.advertising); 2446 if (config.interface == PHY_INTERFACE_MODE_NA) { 2447 phylink_err(pl, 2448 "selection of interface failed, advertisement %*pb\n", 2449 __ETHTOOL_LINK_MODE_MASK_NBITS, 2450 config.advertising); 2451 return -EINVAL; 2452 } 2453 2454 /* Revalidate with the selected interface */ 2455 linkmode_copy(support, pl->supported); 2456 if (phylink_validate(pl, support, &config)) { 2457 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2458 phylink_an_mode_str(pl->cur_link_an_mode), 2459 phy_modes(config.interface), 2460 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2461 return -EINVAL; 2462 } 2463 } else { 2464 /* Validate without changing the current supported mask. */ 2465 linkmode_copy(support, pl->supported); 2466 if (phylink_validate(pl, support, &config)) 2467 return -EINVAL; 2468 } 2469 2470 /* If autonegotiation is enabled, we must have an advertisement */ 2471 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2472 config.advertising) && 2473 phylink_is_empty_linkmode(config.advertising)) 2474 return -EINVAL; 2475 2476 mutex_lock(&pl->state_mutex); 2477 pl->link_config.speed = config.speed; 2478 pl->link_config.duplex = config.duplex; 2479 2480 if (pl->link_config.interface != config.interface) { 2481 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2482 /* We need to force the link down, then change the interface */ 2483 if (pl->old_link_state) { 2484 phylink_link_down(pl); 2485 pl->old_link_state = false; 2486 } 2487 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2488 &pl->phylink_disable_state)) 2489 phylink_major_config(pl, false, &config); 2490 pl->link_config.interface = config.interface; 2491 linkmode_copy(pl->link_config.advertising, config.advertising); 2492 } else if (!linkmode_equal(pl->link_config.advertising, 2493 config.advertising)) { 2494 linkmode_copy(pl->link_config.advertising, config.advertising); 2495 phylink_change_inband_advert(pl); 2496 } 2497 mutex_unlock(&pl->state_mutex); 2498 2499 return 0; 2500 } 2501 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 2502 2503 /** 2504 * phylink_ethtool_nway_reset() - restart negotiation 2505 * @pl: a pointer to a &struct phylink returned from phylink_create() 2506 * 2507 * Restart negotiation for the phylink instance specified by @pl. This will 2508 * cause any attached phy to restart negotiation with the link partner, and 2509 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 2510 * negotiation. 2511 * 2512 * Returns zero on success, or negative error code. 2513 */ 2514 int phylink_ethtool_nway_reset(struct phylink *pl) 2515 { 2516 int ret = 0; 2517 2518 ASSERT_RTNL(); 2519 2520 if (pl->phydev) 2521 ret = phy_restart_aneg(pl->phydev); 2522 phylink_pcs_an_restart(pl); 2523 2524 return ret; 2525 } 2526 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 2527 2528 /** 2529 * phylink_ethtool_get_pauseparam() - get the current pause parameters 2530 * @pl: a pointer to a &struct phylink returned from phylink_create() 2531 * @pause: a pointer to a &struct ethtool_pauseparam 2532 */ 2533 void phylink_ethtool_get_pauseparam(struct phylink *pl, 2534 struct ethtool_pauseparam *pause) 2535 { 2536 ASSERT_RTNL(); 2537 2538 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 2539 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 2540 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 2541 } 2542 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 2543 2544 /** 2545 * phylink_ethtool_set_pauseparam() - set the current pause parameters 2546 * @pl: a pointer to a &struct phylink returned from phylink_create() 2547 * @pause: a pointer to a &struct ethtool_pauseparam 2548 */ 2549 int phylink_ethtool_set_pauseparam(struct phylink *pl, 2550 struct ethtool_pauseparam *pause) 2551 { 2552 struct phylink_link_state *config = &pl->link_config; 2553 bool manual_changed; 2554 int pause_state; 2555 2556 ASSERT_RTNL(); 2557 2558 if (pl->cur_link_an_mode == MLO_AN_FIXED) 2559 return -EOPNOTSUPP; 2560 2561 if (!phylink_test(pl->supported, Pause) && 2562 !phylink_test(pl->supported, Asym_Pause)) 2563 return -EOPNOTSUPP; 2564 2565 if (!phylink_test(pl->supported, Asym_Pause) && 2566 pause->rx_pause != pause->tx_pause) 2567 return -EINVAL; 2568 2569 pause_state = 0; 2570 if (pause->autoneg) 2571 pause_state |= MLO_PAUSE_AN; 2572 if (pause->rx_pause) 2573 pause_state |= MLO_PAUSE_RX; 2574 if (pause->tx_pause) 2575 pause_state |= MLO_PAUSE_TX; 2576 2577 mutex_lock(&pl->state_mutex); 2578 /* 2579 * See the comments for linkmode_set_pause(), wrt the deficiencies 2580 * with the current implementation. A solution to this issue would 2581 * be: 2582 * ethtool Local device 2583 * rx tx Pause AsymDir 2584 * 0 0 0 0 2585 * 1 0 1 1 2586 * 0 1 0 1 2587 * 1 1 1 1 2588 * and then use the ethtool rx/tx enablement status to mask the 2589 * rx/tx pause resolution. 2590 */ 2591 linkmode_set_pause(config->advertising, pause->tx_pause, 2592 pause->rx_pause); 2593 2594 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 2595 (!(pause_state & MLO_PAUSE_AN) && 2596 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 2597 2598 config->pause = pause_state; 2599 2600 /* Update our in-band advertisement, triggering a renegotiation if 2601 * the advertisement changed. 2602 */ 2603 if (!pl->phydev) 2604 phylink_change_inband_advert(pl); 2605 2606 mutex_unlock(&pl->state_mutex); 2607 2608 /* If we have a PHY, a change of the pause frame advertisement will 2609 * cause phylib to renegotiate (if AN is enabled) which will in turn 2610 * call our phylink_phy_change() and trigger a resolve. Note that 2611 * we can't hold our state mutex while calling phy_set_asym_pause(). 2612 */ 2613 if (pl->phydev) 2614 phy_set_asym_pause(pl->phydev, pause->rx_pause, 2615 pause->tx_pause); 2616 2617 /* If the manual pause settings changed, make sure we trigger a 2618 * resolve to update their state; we can not guarantee that the 2619 * link will cycle. 2620 */ 2621 if (manual_changed) { 2622 pl->mac_link_dropped = true; 2623 phylink_run_resolve(pl); 2624 } 2625 2626 return 0; 2627 } 2628 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 2629 2630 /** 2631 * phylink_get_eee_err() - read the energy efficient ethernet error 2632 * counter 2633 * @pl: a pointer to a &struct phylink returned from phylink_create(). 2634 * 2635 * Read the Energy Efficient Ethernet error counter from the PHY associated 2636 * with the phylink instance specified by @pl. 2637 * 2638 * Returns positive error counter value, or negative error code. 2639 */ 2640 int phylink_get_eee_err(struct phylink *pl) 2641 { 2642 int ret = 0; 2643 2644 ASSERT_RTNL(); 2645 2646 if (pl->phydev) 2647 ret = phy_get_eee_err(pl->phydev); 2648 2649 return ret; 2650 } 2651 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 2652 2653 /** 2654 * phylink_init_eee() - init and check the EEE features 2655 * @pl: a pointer to a &struct phylink returned from phylink_create() 2656 * @clk_stop_enable: allow PHY to stop receive clock 2657 * 2658 * Must be called either with RTNL held or within mac_link_up() 2659 */ 2660 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) 2661 { 2662 int ret = -EOPNOTSUPP; 2663 2664 if (pl->phydev) 2665 ret = phy_init_eee(pl->phydev, clk_stop_enable); 2666 2667 return ret; 2668 } 2669 EXPORT_SYMBOL_GPL(phylink_init_eee); 2670 2671 /** 2672 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 2673 * @pl: a pointer to a &struct phylink returned from phylink_create() 2674 * @eee: a pointer to a &struct ethtool_eee for the read parameters 2675 */ 2676 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee) 2677 { 2678 int ret = -EOPNOTSUPP; 2679 2680 ASSERT_RTNL(); 2681 2682 if (pl->phydev) 2683 ret = phy_ethtool_get_eee(pl->phydev, eee); 2684 2685 return ret; 2686 } 2687 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 2688 2689 /** 2690 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 2691 * @pl: a pointer to a &struct phylink returned from phylink_create() 2692 * @eee: a pointer to a &struct ethtool_eee for the desired parameters 2693 */ 2694 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee) 2695 { 2696 int ret = -EOPNOTSUPP; 2697 2698 ASSERT_RTNL(); 2699 2700 if (pl->phydev) 2701 ret = phy_ethtool_set_eee(pl->phydev, eee); 2702 2703 return ret; 2704 } 2705 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 2706 2707 /* This emulates MII registers for a fixed-mode phy operating as per the 2708 * passed in state. "aneg" defines if we report negotiation is possible. 2709 * 2710 * FIXME: should deal with negotiation state too. 2711 */ 2712 static int phylink_mii_emul_read(unsigned int reg, 2713 struct phylink_link_state *state) 2714 { 2715 struct fixed_phy_status fs; 2716 unsigned long *lpa = state->lp_advertising; 2717 int val; 2718 2719 fs.link = state->link; 2720 fs.speed = state->speed; 2721 fs.duplex = state->duplex; 2722 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 2723 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 2724 2725 val = swphy_read_reg(reg, &fs); 2726 if (reg == MII_BMSR) { 2727 if (!state->an_complete) 2728 val &= ~BMSR_ANEGCOMPLETE; 2729 } 2730 return val; 2731 } 2732 2733 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 2734 unsigned int reg) 2735 { 2736 struct phy_device *phydev = pl->phydev; 2737 int prtad, devad; 2738 2739 if (mdio_phy_id_is_c45(phy_id)) { 2740 prtad = mdio_phy_id_prtad(phy_id); 2741 devad = mdio_phy_id_devad(phy_id); 2742 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2743 reg); 2744 } 2745 2746 if (phydev->is_c45) { 2747 switch (reg) { 2748 case MII_BMCR: 2749 case MII_BMSR: 2750 case MII_PHYSID1: 2751 case MII_PHYSID2: 2752 devad = __ffs(phydev->c45_ids.mmds_present); 2753 break; 2754 case MII_ADVERTISE: 2755 case MII_LPA: 2756 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2757 return -EINVAL; 2758 devad = MDIO_MMD_AN; 2759 if (reg == MII_ADVERTISE) 2760 reg = MDIO_AN_ADVERTISE; 2761 else 2762 reg = MDIO_AN_LPA; 2763 break; 2764 default: 2765 return -EINVAL; 2766 } 2767 prtad = phy_id; 2768 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2769 reg); 2770 } 2771 2772 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 2773 } 2774 2775 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 2776 unsigned int reg, unsigned int val) 2777 { 2778 struct phy_device *phydev = pl->phydev; 2779 int prtad, devad; 2780 2781 if (mdio_phy_id_is_c45(phy_id)) { 2782 prtad = mdio_phy_id_prtad(phy_id); 2783 devad = mdio_phy_id_devad(phy_id); 2784 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 2785 reg, val); 2786 } 2787 2788 if (phydev->is_c45) { 2789 switch (reg) { 2790 case MII_BMCR: 2791 case MII_BMSR: 2792 case MII_PHYSID1: 2793 case MII_PHYSID2: 2794 devad = __ffs(phydev->c45_ids.mmds_present); 2795 break; 2796 case MII_ADVERTISE: 2797 case MII_LPA: 2798 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2799 return -EINVAL; 2800 devad = MDIO_MMD_AN; 2801 if (reg == MII_ADVERTISE) 2802 reg = MDIO_AN_ADVERTISE; 2803 else 2804 reg = MDIO_AN_LPA; 2805 break; 2806 default: 2807 return -EINVAL; 2808 } 2809 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 2810 reg, val); 2811 } 2812 2813 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 2814 } 2815 2816 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 2817 unsigned int reg) 2818 { 2819 struct phylink_link_state state; 2820 int val = 0xffff; 2821 2822 switch (pl->cur_link_an_mode) { 2823 case MLO_AN_FIXED: 2824 if (phy_id == 0) { 2825 phylink_get_fixed_state(pl, &state); 2826 val = phylink_mii_emul_read(reg, &state); 2827 } 2828 break; 2829 2830 case MLO_AN_PHY: 2831 return -EOPNOTSUPP; 2832 2833 case MLO_AN_INBAND: 2834 if (phy_id == 0) { 2835 phylink_mac_pcs_get_state(pl, &state); 2836 val = phylink_mii_emul_read(reg, &state); 2837 } 2838 break; 2839 } 2840 2841 return val & 0xffff; 2842 } 2843 2844 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 2845 unsigned int reg, unsigned int val) 2846 { 2847 switch (pl->cur_link_an_mode) { 2848 case MLO_AN_FIXED: 2849 break; 2850 2851 case MLO_AN_PHY: 2852 return -EOPNOTSUPP; 2853 2854 case MLO_AN_INBAND: 2855 break; 2856 } 2857 2858 return 0; 2859 } 2860 2861 /** 2862 * phylink_mii_ioctl() - generic mii ioctl interface 2863 * @pl: a pointer to a &struct phylink returned from phylink_create() 2864 * @ifr: a pointer to a &struct ifreq for socket ioctls 2865 * @cmd: ioctl cmd to execute 2866 * 2867 * Perform the specified MII ioctl on the PHY attached to the phylink instance 2868 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 2869 * 2870 * Returns: zero on success or negative error code. 2871 * 2872 * %SIOCGMIIPHY: 2873 * read register from the current PHY. 2874 * %SIOCGMIIREG: 2875 * read register from the specified PHY. 2876 * %SIOCSMIIREG: 2877 * set a register on the specified PHY. 2878 */ 2879 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 2880 { 2881 struct mii_ioctl_data *mii = if_mii(ifr); 2882 int ret; 2883 2884 ASSERT_RTNL(); 2885 2886 if (pl->phydev) { 2887 /* PHYs only exist for MLO_AN_PHY and SGMII */ 2888 switch (cmd) { 2889 case SIOCGMIIPHY: 2890 mii->phy_id = pl->phydev->mdio.addr; 2891 fallthrough; 2892 2893 case SIOCGMIIREG: 2894 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 2895 if (ret >= 0) { 2896 mii->val_out = ret; 2897 ret = 0; 2898 } 2899 break; 2900 2901 case SIOCSMIIREG: 2902 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 2903 mii->val_in); 2904 break; 2905 2906 default: 2907 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 2908 break; 2909 } 2910 } else { 2911 switch (cmd) { 2912 case SIOCGMIIPHY: 2913 mii->phy_id = 0; 2914 fallthrough; 2915 2916 case SIOCGMIIREG: 2917 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 2918 if (ret >= 0) { 2919 mii->val_out = ret; 2920 ret = 0; 2921 } 2922 break; 2923 2924 case SIOCSMIIREG: 2925 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 2926 mii->val_in); 2927 break; 2928 2929 default: 2930 ret = -EOPNOTSUPP; 2931 break; 2932 } 2933 } 2934 2935 return ret; 2936 } 2937 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 2938 2939 /** 2940 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 2941 * link partners 2942 * @pl: a pointer to a &struct phylink returned from phylink_create() 2943 * @sync: perform action synchronously 2944 * 2945 * If we have a PHY that is not part of a SFP module, then set the speed 2946 * as described in the phy_speed_down() function. Please see this function 2947 * for a description of the @sync parameter. 2948 * 2949 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 2950 */ 2951 int phylink_speed_down(struct phylink *pl, bool sync) 2952 { 2953 int ret = 0; 2954 2955 ASSERT_RTNL(); 2956 2957 if (!pl->sfp_bus && pl->phydev) 2958 ret = phy_speed_down(pl->phydev, sync); 2959 2960 return ret; 2961 } 2962 EXPORT_SYMBOL_GPL(phylink_speed_down); 2963 2964 /** 2965 * phylink_speed_up() - restore the advertised speeds prior to the call to 2966 * phylink_speed_down() 2967 * @pl: a pointer to a &struct phylink returned from phylink_create() 2968 * 2969 * If we have a PHY that is not part of a SFP module, then restore the 2970 * PHY speeds as per phy_speed_up(). 2971 * 2972 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 2973 */ 2974 int phylink_speed_up(struct phylink *pl) 2975 { 2976 int ret = 0; 2977 2978 ASSERT_RTNL(); 2979 2980 if (!pl->sfp_bus && pl->phydev) 2981 ret = phy_speed_up(pl->phydev); 2982 2983 return ret; 2984 } 2985 EXPORT_SYMBOL_GPL(phylink_speed_up); 2986 2987 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 2988 { 2989 struct phylink *pl = upstream; 2990 2991 pl->netdev->sfp_bus = bus; 2992 } 2993 2994 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 2995 { 2996 struct phylink *pl = upstream; 2997 2998 pl->netdev->sfp_bus = NULL; 2999 } 3000 3001 static const phy_interface_t phylink_sfp_interface_preference[] = { 3002 PHY_INTERFACE_MODE_25GBASER, 3003 PHY_INTERFACE_MODE_USXGMII, 3004 PHY_INTERFACE_MODE_10GBASER, 3005 PHY_INTERFACE_MODE_5GBASER, 3006 PHY_INTERFACE_MODE_2500BASEX, 3007 PHY_INTERFACE_MODE_SGMII, 3008 PHY_INTERFACE_MODE_1000BASEX, 3009 PHY_INTERFACE_MODE_100BASEX, 3010 }; 3011 3012 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 3013 3014 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3015 const unsigned long *intf) 3016 { 3017 phy_interface_t interface; 3018 size_t i; 3019 3020 interface = PHY_INTERFACE_MODE_NA; 3021 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3022 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3023 interface = phylink_sfp_interface_preference[i]; 3024 break; 3025 } 3026 3027 return interface; 3028 } 3029 3030 static void phylink_sfp_set_config(struct phylink *pl, u8 mode, 3031 unsigned long *supported, 3032 struct phylink_link_state *state) 3033 { 3034 bool changed = false; 3035 3036 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3037 phylink_an_mode_str(mode), phy_modes(state->interface), 3038 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3039 3040 if (!linkmode_equal(pl->supported, supported)) { 3041 linkmode_copy(pl->supported, supported); 3042 changed = true; 3043 } 3044 3045 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3046 linkmode_copy(pl->link_config.advertising, state->advertising); 3047 changed = true; 3048 } 3049 3050 if (pl->cur_link_an_mode != mode || 3051 pl->link_config.interface != state->interface) { 3052 pl->cur_link_an_mode = mode; 3053 pl->link_config.interface = state->interface; 3054 3055 changed = true; 3056 3057 phylink_info(pl, "switched to %s/%s link mode\n", 3058 phylink_an_mode_str(mode), 3059 phy_modes(state->interface)); 3060 } 3061 3062 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3063 &pl->phylink_disable_state)) 3064 phylink_mac_initial_config(pl, false); 3065 } 3066 3067 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode, 3068 struct phy_device *phy) 3069 { 3070 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1); 3071 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3072 struct phylink_link_state config; 3073 phy_interface_t iface; 3074 int ret; 3075 3076 linkmode_copy(support, phy->supported); 3077 3078 memset(&config, 0, sizeof(config)); 3079 linkmode_copy(config.advertising, phy->advertising); 3080 config.interface = PHY_INTERFACE_MODE_NA; 3081 config.speed = SPEED_UNKNOWN; 3082 config.duplex = DUPLEX_UNKNOWN; 3083 config.pause = MLO_PAUSE_AN; 3084 3085 /* Ignore errors if we're expecting a PHY to attach later */ 3086 ret = phylink_validate(pl, support, &config); 3087 if (ret) { 3088 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3089 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3090 ERR_PTR(ret)); 3091 return ret; 3092 } 3093 3094 iface = sfp_select_interface(pl->sfp_bus, config.advertising); 3095 if (iface == PHY_INTERFACE_MODE_NA) { 3096 phylink_err(pl, 3097 "selection of interface failed, advertisement %*pb\n", 3098 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising); 3099 return -EINVAL; 3100 } 3101 3102 config.interface = iface; 3103 linkmode_copy(support1, support); 3104 ret = phylink_validate(pl, support1, &config); 3105 if (ret) { 3106 phylink_err(pl, 3107 "validation of %s/%s with support %*pb failed: %pe\n", 3108 phylink_an_mode_str(mode), 3109 phy_modes(config.interface), 3110 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3111 ERR_PTR(ret)); 3112 return ret; 3113 } 3114 3115 pl->link_port = pl->sfp_port; 3116 3117 phylink_sfp_set_config(pl, mode, support, &config); 3118 3119 return 0; 3120 } 3121 3122 static int phylink_sfp_config_optical(struct phylink *pl) 3123 { 3124 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3125 DECLARE_PHY_INTERFACE_MASK(interfaces); 3126 struct phylink_link_state config; 3127 phy_interface_t interface; 3128 int ret; 3129 3130 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3131 (int)PHY_INTERFACE_MODE_MAX, 3132 pl->config->supported_interfaces, 3133 (int)PHY_INTERFACE_MODE_MAX, 3134 pl->sfp_interfaces); 3135 3136 /* Find the union of the supported interfaces by the PCS/MAC and 3137 * the SFP module. 3138 */ 3139 phy_interface_and(interfaces, pl->config->supported_interfaces, 3140 pl->sfp_interfaces); 3141 if (phy_interface_empty(interfaces)) { 3142 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3143 return -EINVAL; 3144 } 3145 3146 memset(&config, 0, sizeof(config)); 3147 linkmode_copy(support, pl->sfp_support); 3148 linkmode_copy(config.advertising, pl->sfp_support); 3149 config.speed = SPEED_UNKNOWN; 3150 config.duplex = DUPLEX_UNKNOWN; 3151 config.pause = MLO_PAUSE_AN; 3152 3153 /* For all the interfaces that are supported, reduce the sfp_support 3154 * mask to only those link modes that can be supported. 3155 */ 3156 ret = phylink_validate_mask(pl, pl->sfp_support, &config, interfaces); 3157 if (ret) { 3158 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3159 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3160 return ret; 3161 } 3162 3163 interface = phylink_choose_sfp_interface(pl, interfaces); 3164 if (interface == PHY_INTERFACE_MODE_NA) { 3165 phylink_err(pl, "failed to select SFP interface\n"); 3166 return -EINVAL; 3167 } 3168 3169 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3170 phy_modes(interface)); 3171 3172 config.interface = interface; 3173 3174 /* Ignore errors if we're expecting a PHY to attach later */ 3175 ret = phylink_validate(pl, support, &config); 3176 if (ret) { 3177 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3178 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3179 ERR_PTR(ret)); 3180 return ret; 3181 } 3182 3183 pl->link_port = pl->sfp_port; 3184 3185 phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config); 3186 3187 return 0; 3188 } 3189 3190 static int phylink_sfp_module_insert(void *upstream, 3191 const struct sfp_eeprom_id *id) 3192 { 3193 struct phylink *pl = upstream; 3194 3195 ASSERT_RTNL(); 3196 3197 linkmode_zero(pl->sfp_support); 3198 phy_interface_zero(pl->sfp_interfaces); 3199 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces); 3200 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support); 3201 3202 /* If this module may have a PHY connecting later, defer until later */ 3203 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 3204 if (pl->sfp_may_have_phy) 3205 return 0; 3206 3207 return phylink_sfp_config_optical(pl); 3208 } 3209 3210 static int phylink_sfp_module_start(void *upstream) 3211 { 3212 struct phylink *pl = upstream; 3213 3214 /* If this SFP module has a PHY, start the PHY now. */ 3215 if (pl->phydev) { 3216 phy_start(pl->phydev); 3217 return 0; 3218 } 3219 3220 /* If the module may have a PHY but we didn't detect one we 3221 * need to configure the MAC here. 3222 */ 3223 if (!pl->sfp_may_have_phy) 3224 return 0; 3225 3226 return phylink_sfp_config_optical(pl); 3227 } 3228 3229 static void phylink_sfp_module_stop(void *upstream) 3230 { 3231 struct phylink *pl = upstream; 3232 3233 /* If this SFP module has a PHY, stop it. */ 3234 if (pl->phydev) 3235 phy_stop(pl->phydev); 3236 } 3237 3238 static void phylink_sfp_link_down(void *upstream) 3239 { 3240 struct phylink *pl = upstream; 3241 3242 ASSERT_RTNL(); 3243 3244 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3245 } 3246 3247 static void phylink_sfp_link_up(void *upstream) 3248 { 3249 struct phylink *pl = upstream; 3250 3251 ASSERT_RTNL(); 3252 3253 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3254 } 3255 3256 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII 3257 * or 802.3z control word, so inband will not work. 3258 */ 3259 static bool phylink_phy_no_inband(struct phy_device *phy) 3260 { 3261 return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1], 3262 0xae025150, 0xfffffff0); 3263 } 3264 3265 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3266 { 3267 struct phylink *pl = upstream; 3268 phy_interface_t interface; 3269 u8 mode; 3270 int ret; 3271 3272 /* 3273 * This is the new way of dealing with flow control for PHYs, 3274 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3275 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3276 * using our validate call to the MAC, we rely upon the MAC 3277 * clearing the bits from both supported and advertising fields. 3278 */ 3279 phy_support_asym_pause(phy); 3280 3281 if (phylink_phy_no_inband(phy)) 3282 mode = MLO_AN_PHY; 3283 else 3284 mode = MLO_AN_INBAND; 3285 3286 /* Set the PHY's host supported interfaces */ 3287 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3288 pl->config->supported_interfaces); 3289 3290 /* Do the initial configuration */ 3291 ret = phylink_sfp_config_phy(pl, mode, phy); 3292 if (ret < 0) 3293 return ret; 3294 3295 interface = pl->link_config.interface; 3296 ret = phylink_attach_phy(pl, phy, interface); 3297 if (ret < 0) 3298 return ret; 3299 3300 ret = phylink_bringup_phy(pl, phy, interface); 3301 if (ret) 3302 phy_detach(phy); 3303 3304 return ret; 3305 } 3306 3307 static void phylink_sfp_disconnect_phy(void *upstream) 3308 { 3309 phylink_disconnect_phy(upstream); 3310 } 3311 3312 static const struct sfp_upstream_ops sfp_phylink_ops = { 3313 .attach = phylink_sfp_attach, 3314 .detach = phylink_sfp_detach, 3315 .module_insert = phylink_sfp_module_insert, 3316 .module_start = phylink_sfp_module_start, 3317 .module_stop = phylink_sfp_module_stop, 3318 .link_up = phylink_sfp_link_up, 3319 .link_down = phylink_sfp_link_down, 3320 .connect_phy = phylink_sfp_connect_phy, 3321 .disconnect_phy = phylink_sfp_disconnect_phy, 3322 }; 3323 3324 /* Helpers for MAC drivers */ 3325 3326 static struct { 3327 int bit; 3328 int speed; 3329 } phylink_c73_priority_resolution[] = { 3330 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 3331 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 3332 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 3333 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 3334 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 3335 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 3336 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 3337 /* 5GBASE-KR not supported */ 3338 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 3339 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 3340 }; 3341 3342 void phylink_resolve_c73(struct phylink_link_state *state) 3343 { 3344 int i; 3345 3346 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 3347 int bit = phylink_c73_priority_resolution[i].bit; 3348 if (linkmode_test_bit(bit, state->advertising) && 3349 linkmode_test_bit(bit, state->lp_advertising)) 3350 break; 3351 } 3352 3353 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 3354 state->speed = phylink_c73_priority_resolution[i].speed; 3355 state->duplex = DUPLEX_FULL; 3356 } else { 3357 /* negotiation failure */ 3358 state->link = false; 3359 } 3360 3361 phylink_resolve_an_pause(state); 3362 } 3363 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 3364 3365 static void phylink_decode_c37_word(struct phylink_link_state *state, 3366 uint16_t config_reg, int speed) 3367 { 3368 int fd_bit; 3369 3370 if (speed == SPEED_2500) 3371 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 3372 else 3373 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 3374 3375 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 3376 3377 if (linkmode_test_bit(fd_bit, state->advertising) && 3378 linkmode_test_bit(fd_bit, state->lp_advertising)) { 3379 state->speed = speed; 3380 state->duplex = DUPLEX_FULL; 3381 } else { 3382 /* negotiation failure */ 3383 state->link = false; 3384 } 3385 3386 phylink_resolve_an_pause(state); 3387 } 3388 3389 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 3390 uint16_t config_reg) 3391 { 3392 if (!(config_reg & LPA_SGMII_LINK)) { 3393 state->link = false; 3394 return; 3395 } 3396 3397 switch (config_reg & LPA_SGMII_SPD_MASK) { 3398 case LPA_SGMII_10: 3399 state->speed = SPEED_10; 3400 break; 3401 case LPA_SGMII_100: 3402 state->speed = SPEED_100; 3403 break; 3404 case LPA_SGMII_1000: 3405 state->speed = SPEED_1000; 3406 break; 3407 default: 3408 state->link = false; 3409 return; 3410 } 3411 if (config_reg & LPA_SGMII_FULL_DUPLEX) 3412 state->duplex = DUPLEX_FULL; 3413 else 3414 state->duplex = DUPLEX_HALF; 3415 } 3416 3417 /** 3418 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3419 * @state: a pointer to a struct phylink_link_state. 3420 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3421 * 3422 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3423 * code word. Decode the USXGMII code word and populate the corresponding fields 3424 * (speed, duplex) into the phylink_link_state structure. 3425 */ 3426 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 3427 uint16_t lpa) 3428 { 3429 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3430 case MDIO_USXGMII_10: 3431 state->speed = SPEED_10; 3432 break; 3433 case MDIO_USXGMII_100: 3434 state->speed = SPEED_100; 3435 break; 3436 case MDIO_USXGMII_1000: 3437 state->speed = SPEED_1000; 3438 break; 3439 case MDIO_USXGMII_2500: 3440 state->speed = SPEED_2500; 3441 break; 3442 case MDIO_USXGMII_5000: 3443 state->speed = SPEED_5000; 3444 break; 3445 case MDIO_USXGMII_10G: 3446 state->speed = SPEED_10000; 3447 break; 3448 default: 3449 state->link = false; 3450 return; 3451 } 3452 3453 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3454 state->duplex = DUPLEX_FULL; 3455 else 3456 state->duplex = DUPLEX_HALF; 3457 } 3458 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 3459 3460 /** 3461 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 3462 * @state: a pointer to a struct phylink_link_state. 3463 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 3464 * 3465 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 3466 * code word. Decode the USGMII code word and populate the corresponding fields 3467 * (speed, duplex) into the phylink_link_state structure. The structure for this 3468 * word is the same as the USXGMII word, except it only supports speeds up to 3469 * 1Gbps. 3470 */ 3471 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 3472 uint16_t lpa) 3473 { 3474 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3475 case MDIO_USXGMII_10: 3476 state->speed = SPEED_10; 3477 break; 3478 case MDIO_USXGMII_100: 3479 state->speed = SPEED_100; 3480 break; 3481 case MDIO_USXGMII_1000: 3482 state->speed = SPEED_1000; 3483 break; 3484 default: 3485 state->link = false; 3486 return; 3487 } 3488 3489 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3490 state->duplex = DUPLEX_FULL; 3491 else 3492 state->duplex = DUPLEX_HALF; 3493 } 3494 3495 /** 3496 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 3497 * @state: a pointer to a &struct phylink_link_state. 3498 * @bmsr: The value of the %MII_BMSR register 3499 * @lpa: The value of the %MII_LPA register 3500 * 3501 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3502 * clause 37 negotiation and/or SGMII control. 3503 * 3504 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 3505 * the phylink @state structure. This is suitable to be used for implementing 3506 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 3507 * accessing @bmsr and @lpa cannot be done with MDIO directly. 3508 */ 3509 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 3510 u16 bmsr, u16 lpa) 3511 { 3512 state->link = !!(bmsr & BMSR_LSTATUS); 3513 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 3514 /* If there is no link or autonegotiation is disabled, the LP advertisement 3515 * data is not meaningful, so don't go any further. 3516 */ 3517 if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3518 state->advertising)) 3519 return; 3520 3521 switch (state->interface) { 3522 case PHY_INTERFACE_MODE_1000BASEX: 3523 phylink_decode_c37_word(state, lpa, SPEED_1000); 3524 break; 3525 3526 case PHY_INTERFACE_MODE_2500BASEX: 3527 phylink_decode_c37_word(state, lpa, SPEED_2500); 3528 break; 3529 3530 case PHY_INTERFACE_MODE_SGMII: 3531 case PHY_INTERFACE_MODE_QSGMII: 3532 phylink_decode_sgmii_word(state, lpa); 3533 break; 3534 case PHY_INTERFACE_MODE_QUSGMII: 3535 phylink_decode_usgmii_word(state, lpa); 3536 break; 3537 3538 default: 3539 state->link = false; 3540 break; 3541 } 3542 } 3543 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 3544 3545 /** 3546 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 3547 * @pcs: a pointer to a &struct mdio_device. 3548 * @state: a pointer to a &struct phylink_link_state. 3549 * 3550 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3551 * clause 37 negotiation and/or SGMII control. 3552 * 3553 * Read the MAC PCS state from the MII device configured in @config and 3554 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 3555 * the phylink @state structure. This is suitable to be directly plugged 3556 * into the pcs_get_state() member of the struct phylink_pcs_ops 3557 * structure. 3558 */ 3559 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 3560 struct phylink_link_state *state) 3561 { 3562 int bmsr, lpa; 3563 3564 bmsr = mdiodev_read(pcs, MII_BMSR); 3565 lpa = mdiodev_read(pcs, MII_LPA); 3566 if (bmsr < 0 || lpa < 0) { 3567 state->link = false; 3568 return; 3569 } 3570 3571 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa); 3572 } 3573 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 3574 3575 /** 3576 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 3577 * advertisement 3578 * @interface: the PHY interface mode being configured 3579 * @advertising: the ethtool advertisement mask 3580 * 3581 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3582 * clause 37 negotiation and/or SGMII control. 3583 * 3584 * Encode the clause 37 PCS advertisement as specified by @interface and 3585 * @advertising. 3586 * 3587 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 3588 */ 3589 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 3590 const unsigned long *advertising) 3591 { 3592 u16 adv; 3593 3594 switch (interface) { 3595 case PHY_INTERFACE_MODE_1000BASEX: 3596 case PHY_INTERFACE_MODE_2500BASEX: 3597 adv = ADVERTISE_1000XFULL; 3598 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 3599 advertising)) 3600 adv |= ADVERTISE_1000XPAUSE; 3601 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 3602 advertising)) 3603 adv |= ADVERTISE_1000XPSE_ASYM; 3604 return adv; 3605 case PHY_INTERFACE_MODE_SGMII: 3606 case PHY_INTERFACE_MODE_QSGMII: 3607 return 0x0001; 3608 default: 3609 /* Nothing to do for other modes */ 3610 return -EINVAL; 3611 } 3612 } 3613 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 3614 3615 /** 3616 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 3617 * @pcs: a pointer to a &struct mdio_device. 3618 * @interface: the PHY interface mode being configured 3619 * @advertising: the ethtool advertisement mask 3620 * @neg_mode: PCS negotiation mode 3621 * 3622 * Configure a Clause 22 PCS PHY with the appropriate negotiation 3623 * parameters for the @mode, @interface and @advertising parameters. 3624 * Returns negative error number on failure, zero if the advertisement 3625 * has not changed, or positive if there is a change. 3626 */ 3627 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 3628 phy_interface_t interface, 3629 const unsigned long *advertising, 3630 unsigned int neg_mode) 3631 { 3632 bool changed = 0; 3633 u16 bmcr; 3634 int ret, adv; 3635 3636 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 3637 if (adv >= 0) { 3638 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 3639 MII_ADVERTISE, 0xffff, adv); 3640 if (ret < 0) 3641 return ret; 3642 changed = ret; 3643 } 3644 3645 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 3646 bmcr = BMCR_ANENABLE; 3647 else 3648 bmcr = 0; 3649 3650 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 3651 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 3652 if (ret < 0) 3653 return ret; 3654 3655 return changed; 3656 } 3657 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 3658 3659 /** 3660 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 3661 * @pcs: a pointer to a &struct mdio_device. 3662 * 3663 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3664 * clause 37 negotiation. 3665 * 3666 * Restart the clause 37 negotiation with the link partner. This is 3667 * suitable to be directly plugged into the pcs_get_state() member 3668 * of the struct phylink_pcs_ops structure. 3669 */ 3670 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 3671 { 3672 int val = mdiodev_read(pcs, MII_BMCR); 3673 3674 if (val >= 0) { 3675 val |= BMCR_ANRESTART; 3676 3677 mdiodev_write(pcs, MII_BMCR, val); 3678 } 3679 } 3680 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 3681 3682 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 3683 struct phylink_link_state *state) 3684 { 3685 struct mii_bus *bus = pcs->bus; 3686 int addr = pcs->addr; 3687 int stat; 3688 3689 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 3690 if (stat < 0) { 3691 state->link = false; 3692 return; 3693 } 3694 3695 state->link = !!(stat & MDIO_STAT1_LSTATUS); 3696 if (!state->link) 3697 return; 3698 3699 switch (state->interface) { 3700 case PHY_INTERFACE_MODE_10GBASER: 3701 state->speed = SPEED_10000; 3702 state->duplex = DUPLEX_FULL; 3703 break; 3704 3705 default: 3706 break; 3707 } 3708 } 3709 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 3710 3711 static int __init phylink_init(void) 3712 { 3713 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 3714 __set_bit(phylink_sfp_interface_preference[i], 3715 phylink_sfp_interfaces); 3716 3717 return 0; 3718 } 3719 3720 module_init(phylink_init); 3721 3722 MODULE_LICENSE("GPL v2"); 3723