1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "sfp.h" 24 #include "swphy.h" 25 26 #define SUPPORTED_INTERFACES \ 27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 29 #define ADVERTISED_INTERFACES \ 30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 32 33 enum { 34 PHYLINK_DISABLE_STOPPED, 35 PHYLINK_DISABLE_LINK, 36 PHYLINK_DISABLE_MAC_WOL, 37 38 PCS_STATE_DOWN = 0, 39 PCS_STATE_STARTING, 40 PCS_STATE_STARTED, 41 }; 42 43 /** 44 * struct phylink - internal data type for phylink 45 */ 46 struct phylink { 47 /* private: */ 48 struct net_device *netdev; 49 const struct phylink_mac_ops *mac_ops; 50 struct phylink_config *config; 51 struct phylink_pcs *pcs; 52 struct device *dev; 53 unsigned int old_link_state:1; 54 55 unsigned long phylink_disable_state; /* bitmask of disables */ 56 struct phy_device *phydev; 57 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 58 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 59 u8 cur_link_an_mode; 60 u8 link_port; /* The current non-phy ethtool port */ 61 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 62 63 /* The link configuration settings */ 64 struct phylink_link_state link_config; 65 66 /* The current settings */ 67 phy_interface_t cur_interface; 68 69 struct gpio_desc *link_gpio; 70 unsigned int link_irq; 71 struct timer_list link_poll; 72 void (*get_fixed_state)(struct net_device *dev, 73 struct phylink_link_state *s); 74 75 struct mutex state_mutex; 76 struct phylink_link_state phy_state; 77 struct work_struct resolve; 78 unsigned int pcs_neg_mode; 79 unsigned int pcs_state; 80 81 bool mac_link_dropped; 82 bool using_mac_select_pcs; 83 84 struct sfp_bus *sfp_bus; 85 bool sfp_may_have_phy; 86 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 87 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 88 u8 sfp_port; 89 }; 90 91 #define phylink_printk(level, pl, fmt, ...) \ 92 do { \ 93 if ((pl)->config->type == PHYLINK_NETDEV) \ 94 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 95 else if ((pl)->config->type == PHYLINK_DEV) \ 96 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 97 } while (0) 98 99 #define phylink_err(pl, fmt, ...) \ 100 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 101 #define phylink_warn(pl, fmt, ...) \ 102 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 103 #define phylink_info(pl, fmt, ...) \ 104 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 105 #if defined(CONFIG_DYNAMIC_DEBUG) 106 #define phylink_dbg(pl, fmt, ...) \ 107 do { \ 108 if ((pl)->config->type == PHYLINK_NETDEV) \ 109 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 110 else if ((pl)->config->type == PHYLINK_DEV) \ 111 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 112 } while (0) 113 #elif defined(DEBUG) 114 #define phylink_dbg(pl, fmt, ...) \ 115 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 116 #else 117 #define phylink_dbg(pl, fmt, ...) \ 118 ({ \ 119 if (0) \ 120 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 121 }) 122 #endif 123 124 /** 125 * phylink_set_port_modes() - set the port type modes in the ethtool mask 126 * @mask: ethtool link mode mask 127 * 128 * Sets all the port type modes in the ethtool mask. MAC drivers should 129 * use this in their 'validate' callback. 130 */ 131 void phylink_set_port_modes(unsigned long *mask) 132 { 133 phylink_set(mask, TP); 134 phylink_set(mask, AUI); 135 phylink_set(mask, MII); 136 phylink_set(mask, FIBRE); 137 phylink_set(mask, BNC); 138 phylink_set(mask, Backplane); 139 } 140 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 141 142 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 143 { 144 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 145 146 phylink_set_port_modes(tmp); 147 phylink_set(tmp, Autoneg); 148 phylink_set(tmp, Pause); 149 phylink_set(tmp, Asym_Pause); 150 151 return linkmode_subset(linkmode, tmp); 152 } 153 154 static const char *phylink_an_mode_str(unsigned int mode) 155 { 156 static const char *modestr[] = { 157 [MLO_AN_PHY] = "phy", 158 [MLO_AN_FIXED] = "fixed", 159 [MLO_AN_INBAND] = "inband", 160 }; 161 162 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 163 } 164 165 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 166 { 167 switch (interface) { 168 case PHY_INTERFACE_MODE_SGMII: 169 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 170 return 1250; 171 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 172 return 3125; 173 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 174 return 5156; 175 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 176 return 10313; 177 default: 178 return 0; 179 } 180 } 181 182 /** 183 * phylink_interface_max_speed() - get the maximum speed of a phy interface 184 * @interface: phy interface mode defined by &typedef phy_interface_t 185 * 186 * Determine the maximum speed of a phy interface. This is intended to help 187 * determine the correct speed to pass to the MAC when the phy is performing 188 * rate matching. 189 * 190 * Return: The maximum speed of @interface 191 */ 192 static int phylink_interface_max_speed(phy_interface_t interface) 193 { 194 switch (interface) { 195 case PHY_INTERFACE_MODE_100BASEX: 196 case PHY_INTERFACE_MODE_REVRMII: 197 case PHY_INTERFACE_MODE_RMII: 198 case PHY_INTERFACE_MODE_SMII: 199 case PHY_INTERFACE_MODE_REVMII: 200 case PHY_INTERFACE_MODE_MII: 201 return SPEED_100; 202 203 case PHY_INTERFACE_MODE_TBI: 204 case PHY_INTERFACE_MODE_MOCA: 205 case PHY_INTERFACE_MODE_RTBI: 206 case PHY_INTERFACE_MODE_1000BASEX: 207 case PHY_INTERFACE_MODE_1000BASEKX: 208 case PHY_INTERFACE_MODE_TRGMII: 209 case PHY_INTERFACE_MODE_RGMII_TXID: 210 case PHY_INTERFACE_MODE_RGMII_RXID: 211 case PHY_INTERFACE_MODE_RGMII_ID: 212 case PHY_INTERFACE_MODE_RGMII: 213 case PHY_INTERFACE_MODE_PSGMII: 214 case PHY_INTERFACE_MODE_QSGMII: 215 case PHY_INTERFACE_MODE_QUSGMII: 216 case PHY_INTERFACE_MODE_SGMII: 217 case PHY_INTERFACE_MODE_GMII: 218 return SPEED_1000; 219 220 case PHY_INTERFACE_MODE_2500BASEX: 221 return SPEED_2500; 222 223 case PHY_INTERFACE_MODE_5GBASER: 224 return SPEED_5000; 225 226 case PHY_INTERFACE_MODE_XGMII: 227 case PHY_INTERFACE_MODE_RXAUI: 228 case PHY_INTERFACE_MODE_XAUI: 229 case PHY_INTERFACE_MODE_10GBASER: 230 case PHY_INTERFACE_MODE_10GKR: 231 case PHY_INTERFACE_MODE_USXGMII: 232 return SPEED_10000; 233 234 case PHY_INTERFACE_MODE_25GBASER: 235 return SPEED_25000; 236 237 case PHY_INTERFACE_MODE_XLGMII: 238 return SPEED_40000; 239 240 case PHY_INTERFACE_MODE_INTERNAL: 241 case PHY_INTERFACE_MODE_NA: 242 case PHY_INTERFACE_MODE_MAX: 243 /* No idea! Garbage in, unknown out */ 244 return SPEED_UNKNOWN; 245 } 246 247 /* If we get here, someone forgot to add an interface mode above */ 248 WARN_ON_ONCE(1); 249 return SPEED_UNKNOWN; 250 } 251 252 /** 253 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 254 * @linkmodes: ethtool linkmode mask (must be already initialised) 255 * @caps: bitmask of MAC capabilities 256 * 257 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 258 * supported by the @caps. @linkmodes must have been initialised previously. 259 */ 260 void phylink_caps_to_linkmodes(unsigned long *linkmodes, unsigned long caps) 261 { 262 if (caps & MAC_SYM_PAUSE) 263 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 264 265 if (caps & MAC_ASYM_PAUSE) 266 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 267 268 if (caps & MAC_10HD) { 269 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes); 270 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes); 271 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes); 272 } 273 274 if (caps & MAC_10FD) { 275 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes); 276 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes); 277 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes); 278 } 279 280 if (caps & MAC_100HD) { 281 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes); 282 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes); 283 } 284 285 if (caps & MAC_100FD) { 286 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes); 287 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes); 288 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes); 289 } 290 291 if (caps & MAC_1000HD) 292 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes); 293 294 if (caps & MAC_1000FD) { 295 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes); 296 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes); 297 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes); 298 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes); 299 } 300 301 if (caps & MAC_2500FD) { 302 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes); 303 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes); 304 } 305 306 if (caps & MAC_5000FD) 307 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes); 308 309 if (caps & MAC_10000FD) { 310 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes); 311 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes); 312 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes); 313 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes); 314 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes); 315 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes); 316 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes); 317 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes); 318 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes); 319 } 320 321 if (caps & MAC_25000FD) { 322 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes); 323 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes); 324 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes); 325 } 326 327 if (caps & MAC_40000FD) { 328 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes); 329 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes); 330 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes); 331 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes); 332 } 333 334 if (caps & MAC_50000FD) { 335 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes); 336 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes); 337 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes); 338 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes); 339 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes); 340 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes); 341 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 342 linkmodes); 343 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes); 344 } 345 346 if (caps & MAC_56000FD) { 347 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes); 348 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes); 349 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes); 350 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes); 351 } 352 353 if (caps & MAC_100000FD) { 354 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes); 355 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes); 356 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes); 357 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 358 linkmodes); 359 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes); 360 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes); 361 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes); 362 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 363 linkmodes); 364 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes); 365 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes); 366 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes); 367 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 368 linkmodes); 369 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes); 370 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes); 371 } 372 373 if (caps & MAC_200000FD) { 374 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes); 375 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes); 376 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 377 linkmodes); 378 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes); 379 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes); 380 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes); 381 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes); 382 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 383 linkmodes); 384 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes); 385 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes); 386 } 387 388 if (caps & MAC_400000FD) { 389 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes); 390 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes); 391 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 392 linkmodes); 393 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes); 394 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes); 395 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes); 396 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes); 397 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 398 linkmodes); 399 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes); 400 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes); 401 } 402 } 403 EXPORT_SYMBOL_GPL(phylink_caps_to_linkmodes); 404 405 static struct { 406 unsigned long mask; 407 int speed; 408 unsigned int duplex; 409 } phylink_caps_params[] = { 410 { MAC_400000FD, SPEED_400000, DUPLEX_FULL }, 411 { MAC_200000FD, SPEED_200000, DUPLEX_FULL }, 412 { MAC_100000FD, SPEED_100000, DUPLEX_FULL }, 413 { MAC_56000FD, SPEED_56000, DUPLEX_FULL }, 414 { MAC_50000FD, SPEED_50000, DUPLEX_FULL }, 415 { MAC_40000FD, SPEED_40000, DUPLEX_FULL }, 416 { MAC_25000FD, SPEED_25000, DUPLEX_FULL }, 417 { MAC_20000FD, SPEED_20000, DUPLEX_FULL }, 418 { MAC_10000FD, SPEED_10000, DUPLEX_FULL }, 419 { MAC_5000FD, SPEED_5000, DUPLEX_FULL }, 420 { MAC_2500FD, SPEED_2500, DUPLEX_FULL }, 421 { MAC_1000FD, SPEED_1000, DUPLEX_FULL }, 422 { MAC_1000HD, SPEED_1000, DUPLEX_HALF }, 423 { MAC_100FD, SPEED_100, DUPLEX_FULL }, 424 { MAC_100HD, SPEED_100, DUPLEX_HALF }, 425 { MAC_10FD, SPEED_10, DUPLEX_FULL }, 426 { MAC_10HD, SPEED_10, DUPLEX_HALF }, 427 }; 428 429 /** 430 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 431 * @speed: the speed to search for 432 * @duplex: the duplex to search for 433 * 434 * Find the mac capability for a given speed and duplex. 435 * 436 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 437 * there were no matches. 438 */ 439 static unsigned long phylink_cap_from_speed_duplex(int speed, 440 unsigned int duplex) 441 { 442 int i; 443 444 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 445 if (speed == phylink_caps_params[i].speed && 446 duplex == phylink_caps_params[i].duplex) 447 return phylink_caps_params[i].mask; 448 } 449 450 return 0; 451 } 452 453 /** 454 * phylink_get_capabilities() - get capabilities for a given MAC 455 * @interface: phy interface mode defined by &typedef phy_interface_t 456 * @mac_capabilities: bitmask of MAC capabilities 457 * @rate_matching: type of rate matching being performed 458 * 459 * Get the MAC capabilities that are supported by the @interface mode and 460 * @mac_capabilities. 461 */ 462 unsigned long phylink_get_capabilities(phy_interface_t interface, 463 unsigned long mac_capabilities, 464 int rate_matching) 465 { 466 int max_speed = phylink_interface_max_speed(interface); 467 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 468 unsigned long matched_caps = 0; 469 470 switch (interface) { 471 case PHY_INTERFACE_MODE_USXGMII: 472 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD; 473 fallthrough; 474 475 case PHY_INTERFACE_MODE_RGMII_TXID: 476 case PHY_INTERFACE_MODE_RGMII_RXID: 477 case PHY_INTERFACE_MODE_RGMII_ID: 478 case PHY_INTERFACE_MODE_RGMII: 479 case PHY_INTERFACE_MODE_PSGMII: 480 case PHY_INTERFACE_MODE_QSGMII: 481 case PHY_INTERFACE_MODE_QUSGMII: 482 case PHY_INTERFACE_MODE_SGMII: 483 case PHY_INTERFACE_MODE_GMII: 484 caps |= MAC_1000HD | MAC_1000FD; 485 fallthrough; 486 487 case PHY_INTERFACE_MODE_REVRMII: 488 case PHY_INTERFACE_MODE_RMII: 489 case PHY_INTERFACE_MODE_SMII: 490 case PHY_INTERFACE_MODE_REVMII: 491 case PHY_INTERFACE_MODE_MII: 492 caps |= MAC_10HD | MAC_10FD; 493 fallthrough; 494 495 case PHY_INTERFACE_MODE_100BASEX: 496 caps |= MAC_100HD | MAC_100FD; 497 break; 498 499 case PHY_INTERFACE_MODE_TBI: 500 case PHY_INTERFACE_MODE_MOCA: 501 case PHY_INTERFACE_MODE_RTBI: 502 case PHY_INTERFACE_MODE_1000BASEX: 503 caps |= MAC_1000HD; 504 fallthrough; 505 case PHY_INTERFACE_MODE_1000BASEKX: 506 case PHY_INTERFACE_MODE_TRGMII: 507 caps |= MAC_1000FD; 508 break; 509 510 case PHY_INTERFACE_MODE_2500BASEX: 511 caps |= MAC_2500FD; 512 break; 513 514 case PHY_INTERFACE_MODE_5GBASER: 515 caps |= MAC_5000FD; 516 break; 517 518 case PHY_INTERFACE_MODE_XGMII: 519 case PHY_INTERFACE_MODE_RXAUI: 520 case PHY_INTERFACE_MODE_XAUI: 521 case PHY_INTERFACE_MODE_10GBASER: 522 case PHY_INTERFACE_MODE_10GKR: 523 caps |= MAC_10000FD; 524 break; 525 526 case PHY_INTERFACE_MODE_25GBASER: 527 caps |= MAC_25000FD; 528 break; 529 530 case PHY_INTERFACE_MODE_XLGMII: 531 caps |= MAC_40000FD; 532 break; 533 534 case PHY_INTERFACE_MODE_INTERNAL: 535 caps |= ~0; 536 break; 537 538 case PHY_INTERFACE_MODE_NA: 539 case PHY_INTERFACE_MODE_MAX: 540 break; 541 } 542 543 switch (rate_matching) { 544 case RATE_MATCH_OPEN_LOOP: 545 /* TODO */ 546 fallthrough; 547 case RATE_MATCH_NONE: 548 matched_caps = 0; 549 break; 550 case RATE_MATCH_PAUSE: { 551 /* The MAC must support asymmetric pause towards the local 552 * device for this. We could allow just symmetric pause, but 553 * then we might have to renegotiate if the link partner 554 * doesn't support pause. This is because there's no way to 555 * accept pause frames without transmitting them if we only 556 * support symmetric pause. 557 */ 558 if (!(mac_capabilities & MAC_SYM_PAUSE) || 559 !(mac_capabilities & MAC_ASYM_PAUSE)) 560 break; 561 562 /* We can't adapt if the MAC doesn't support the interface's 563 * max speed at full duplex. 564 */ 565 if (mac_capabilities & 566 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) { 567 /* Although a duplex-matching phy might exist, we 568 * conservatively remove these modes because the MAC 569 * will not be aware of the half-duplex nature of the 570 * link. 571 */ 572 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 573 matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD); 574 } 575 break; 576 } 577 case RATE_MATCH_CRS: 578 /* The MAC must support half duplex at the interface's max 579 * speed. 580 */ 581 if (mac_capabilities & 582 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 583 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 584 matched_caps &= mac_capabilities; 585 } 586 break; 587 } 588 589 return (caps & mac_capabilities) | matched_caps; 590 } 591 EXPORT_SYMBOL_GPL(phylink_get_capabilities); 592 593 /** 594 * phylink_validate_mask_caps() - Restrict link modes based on caps 595 * @supported: ethtool bitmask for supported link modes. 596 * @state: pointer to a &struct phylink_link_state. 597 * @mac_capabilities: bitmask of MAC capabilities 598 * 599 * Calculate the supported link modes based on @mac_capabilities, and restrict 600 * @supported and @state based on that. Use this function if your capabiliies 601 * aren't constant, such as if they vary depending on the interface. 602 */ 603 void phylink_validate_mask_caps(unsigned long *supported, 604 struct phylink_link_state *state, 605 unsigned long mac_capabilities) 606 { 607 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 608 unsigned long caps; 609 610 phylink_set_port_modes(mask); 611 phylink_set(mask, Autoneg); 612 caps = phylink_get_capabilities(state->interface, mac_capabilities, 613 state->rate_matching); 614 phylink_caps_to_linkmodes(mask, caps); 615 616 linkmode_and(supported, supported, mask); 617 linkmode_and(state->advertising, state->advertising, mask); 618 } 619 EXPORT_SYMBOL_GPL(phylink_validate_mask_caps); 620 621 /** 622 * phylink_generic_validate() - generic validate() callback implementation 623 * @config: a pointer to a &struct phylink_config. 624 * @supported: ethtool bitmask for supported link modes. 625 * @state: a pointer to a &struct phylink_link_state. 626 * 627 * Generic implementation of the validate() callback that MAC drivers can 628 * use when they pass the range of supported interfaces and MAC capabilities. 629 */ 630 void phylink_generic_validate(struct phylink_config *config, 631 unsigned long *supported, 632 struct phylink_link_state *state) 633 { 634 phylink_validate_mask_caps(supported, state, config->mac_capabilities); 635 } 636 EXPORT_SYMBOL_GPL(phylink_generic_validate); 637 638 static int phylink_validate_mac_and_pcs(struct phylink *pl, 639 unsigned long *supported, 640 struct phylink_link_state *state) 641 { 642 struct phylink_pcs *pcs; 643 int ret; 644 645 /* Get the PCS for this interface mode */ 646 if (pl->using_mac_select_pcs) { 647 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 648 if (IS_ERR(pcs)) 649 return PTR_ERR(pcs); 650 } else { 651 pcs = pl->pcs; 652 } 653 654 if (pcs) { 655 /* The PCS, if present, must be setup before phylink_create() 656 * has been called. If the ops is not initialised, print an 657 * error and backtrace rather than oopsing the kernel. 658 */ 659 if (!pcs->ops) { 660 phylink_err(pl, "interface %s: uninitialised PCS\n", 661 phy_modes(state->interface)); 662 dump_stack(); 663 return -EINVAL; 664 } 665 666 /* Validate the link parameters with the PCS */ 667 if (pcs->ops->pcs_validate) { 668 ret = pcs->ops->pcs_validate(pcs, supported, state); 669 if (ret < 0 || phylink_is_empty_linkmode(supported)) 670 return -EINVAL; 671 672 /* Ensure the advertising mask is a subset of the 673 * supported mask. 674 */ 675 linkmode_and(state->advertising, state->advertising, 676 supported); 677 } 678 } 679 680 /* Then validate the link parameters with the MAC */ 681 if (pl->mac_ops->validate) 682 pl->mac_ops->validate(pl->config, supported, state); 683 else 684 phylink_generic_validate(pl->config, supported, state); 685 686 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 687 } 688 689 static int phylink_validate_mask(struct phylink *pl, unsigned long *supported, 690 struct phylink_link_state *state, 691 const unsigned long *interfaces) 692 { 693 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 694 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 695 __ETHTOOL_DECLARE_LINK_MODE_MASK(s); 696 struct phylink_link_state t; 697 int intf; 698 699 for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) { 700 if (test_bit(intf, interfaces)) { 701 linkmode_copy(s, supported); 702 703 t = *state; 704 t.interface = intf; 705 if (!phylink_validate_mac_and_pcs(pl, s, &t)) { 706 linkmode_or(all_s, all_s, s); 707 linkmode_or(all_adv, all_adv, t.advertising); 708 } 709 } 710 } 711 712 linkmode_copy(supported, all_s); 713 linkmode_copy(state->advertising, all_adv); 714 715 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 716 } 717 718 static int phylink_validate(struct phylink *pl, unsigned long *supported, 719 struct phylink_link_state *state) 720 { 721 const unsigned long *interfaces = pl->config->supported_interfaces; 722 723 if (state->interface == PHY_INTERFACE_MODE_NA) 724 return phylink_validate_mask(pl, supported, state, interfaces); 725 726 if (!test_bit(state->interface, interfaces)) 727 return -EINVAL; 728 729 return phylink_validate_mac_and_pcs(pl, supported, state); 730 } 731 732 static int phylink_parse_fixedlink(struct phylink *pl, 733 const struct fwnode_handle *fwnode) 734 { 735 struct fwnode_handle *fixed_node; 736 bool pause, asym_pause, autoneg; 737 const struct phy_setting *s; 738 struct gpio_desc *desc; 739 u32 speed; 740 int ret; 741 742 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 743 if (fixed_node) { 744 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 745 746 pl->link_config.speed = speed; 747 pl->link_config.duplex = DUPLEX_HALF; 748 749 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 750 pl->link_config.duplex = DUPLEX_FULL; 751 752 /* We treat the "pause" and "asym-pause" terminology as 753 * defining the link partner's ability. 754 */ 755 if (fwnode_property_read_bool(fixed_node, "pause")) 756 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 757 pl->link_config.lp_advertising); 758 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 759 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 760 pl->link_config.lp_advertising); 761 762 if (ret == 0) { 763 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 764 GPIOD_IN, "?"); 765 766 if (!IS_ERR(desc)) 767 pl->link_gpio = desc; 768 else if (desc == ERR_PTR(-EPROBE_DEFER)) 769 ret = -EPROBE_DEFER; 770 } 771 fwnode_handle_put(fixed_node); 772 773 if (ret) 774 return ret; 775 } else { 776 u32 prop[5]; 777 778 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 779 NULL, 0); 780 if (ret != ARRAY_SIZE(prop)) { 781 phylink_err(pl, "broken fixed-link?\n"); 782 return -EINVAL; 783 } 784 785 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 786 prop, ARRAY_SIZE(prop)); 787 if (!ret) { 788 pl->link_config.duplex = prop[1] ? 789 DUPLEX_FULL : DUPLEX_HALF; 790 pl->link_config.speed = prop[2]; 791 if (prop[3]) 792 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 793 pl->link_config.lp_advertising); 794 if (prop[4]) 795 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 796 pl->link_config.lp_advertising); 797 } 798 } 799 800 if (pl->link_config.speed > SPEED_1000 && 801 pl->link_config.duplex != DUPLEX_FULL) 802 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 803 pl->link_config.speed); 804 805 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 806 linkmode_copy(pl->link_config.advertising, pl->supported); 807 phylink_validate(pl, pl->supported, &pl->link_config); 808 809 pause = phylink_test(pl->supported, Pause); 810 asym_pause = phylink_test(pl->supported, Asym_Pause); 811 autoneg = phylink_test(pl->supported, Autoneg); 812 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, 813 pl->supported, true); 814 linkmode_zero(pl->supported); 815 phylink_set(pl->supported, MII); 816 817 if (pause) 818 phylink_set(pl->supported, Pause); 819 820 if (asym_pause) 821 phylink_set(pl->supported, Asym_Pause); 822 823 if (autoneg) 824 phylink_set(pl->supported, Autoneg); 825 826 if (s) { 827 __set_bit(s->bit, pl->supported); 828 __set_bit(s->bit, pl->link_config.lp_advertising); 829 } else { 830 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 831 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 832 pl->link_config.speed); 833 } 834 835 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 836 pl->supported); 837 838 pl->link_config.link = 1; 839 pl->link_config.an_complete = 1; 840 841 return 0; 842 } 843 844 static int phylink_parse_mode(struct phylink *pl, 845 const struct fwnode_handle *fwnode) 846 { 847 struct fwnode_handle *dn; 848 const char *managed; 849 850 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 851 if (dn || fwnode_property_present(fwnode, "fixed-link")) 852 pl->cfg_link_an_mode = MLO_AN_FIXED; 853 fwnode_handle_put(dn); 854 855 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 856 strcmp(managed, "in-band-status") == 0) || 857 pl->config->ovr_an_inband) { 858 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 859 phylink_err(pl, 860 "can't use both fixed-link and in-band-status\n"); 861 return -EINVAL; 862 } 863 864 linkmode_zero(pl->supported); 865 phylink_set(pl->supported, MII); 866 phylink_set(pl->supported, Autoneg); 867 phylink_set(pl->supported, Asym_Pause); 868 phylink_set(pl->supported, Pause); 869 pl->cfg_link_an_mode = MLO_AN_INBAND; 870 871 switch (pl->link_config.interface) { 872 case PHY_INTERFACE_MODE_SGMII: 873 case PHY_INTERFACE_MODE_PSGMII: 874 case PHY_INTERFACE_MODE_QSGMII: 875 case PHY_INTERFACE_MODE_QUSGMII: 876 case PHY_INTERFACE_MODE_RGMII: 877 case PHY_INTERFACE_MODE_RGMII_ID: 878 case PHY_INTERFACE_MODE_RGMII_RXID: 879 case PHY_INTERFACE_MODE_RGMII_TXID: 880 case PHY_INTERFACE_MODE_RTBI: 881 phylink_set(pl->supported, 10baseT_Half); 882 phylink_set(pl->supported, 10baseT_Full); 883 phylink_set(pl->supported, 100baseT_Half); 884 phylink_set(pl->supported, 100baseT_Full); 885 phylink_set(pl->supported, 1000baseT_Half); 886 phylink_set(pl->supported, 1000baseT_Full); 887 break; 888 889 case PHY_INTERFACE_MODE_1000BASEX: 890 phylink_set(pl->supported, 1000baseX_Full); 891 break; 892 893 case PHY_INTERFACE_MODE_2500BASEX: 894 phylink_set(pl->supported, 2500baseX_Full); 895 break; 896 897 case PHY_INTERFACE_MODE_5GBASER: 898 phylink_set(pl->supported, 5000baseT_Full); 899 break; 900 901 case PHY_INTERFACE_MODE_25GBASER: 902 phylink_set(pl->supported, 25000baseCR_Full); 903 phylink_set(pl->supported, 25000baseKR_Full); 904 phylink_set(pl->supported, 25000baseSR_Full); 905 fallthrough; 906 case PHY_INTERFACE_MODE_USXGMII: 907 case PHY_INTERFACE_MODE_10GKR: 908 case PHY_INTERFACE_MODE_10GBASER: 909 phylink_set(pl->supported, 10baseT_Half); 910 phylink_set(pl->supported, 10baseT_Full); 911 phylink_set(pl->supported, 100baseT_Half); 912 phylink_set(pl->supported, 100baseT_Full); 913 phylink_set(pl->supported, 1000baseT_Half); 914 phylink_set(pl->supported, 1000baseT_Full); 915 phylink_set(pl->supported, 1000baseX_Full); 916 phylink_set(pl->supported, 1000baseKX_Full); 917 phylink_set(pl->supported, 2500baseT_Full); 918 phylink_set(pl->supported, 2500baseX_Full); 919 phylink_set(pl->supported, 5000baseT_Full); 920 phylink_set(pl->supported, 10000baseT_Full); 921 phylink_set(pl->supported, 10000baseKR_Full); 922 phylink_set(pl->supported, 10000baseKX4_Full); 923 phylink_set(pl->supported, 10000baseCR_Full); 924 phylink_set(pl->supported, 10000baseSR_Full); 925 phylink_set(pl->supported, 10000baseLR_Full); 926 phylink_set(pl->supported, 10000baseLRM_Full); 927 phylink_set(pl->supported, 10000baseER_Full); 928 break; 929 930 case PHY_INTERFACE_MODE_XLGMII: 931 phylink_set(pl->supported, 25000baseCR_Full); 932 phylink_set(pl->supported, 25000baseKR_Full); 933 phylink_set(pl->supported, 25000baseSR_Full); 934 phylink_set(pl->supported, 40000baseKR4_Full); 935 phylink_set(pl->supported, 40000baseCR4_Full); 936 phylink_set(pl->supported, 40000baseSR4_Full); 937 phylink_set(pl->supported, 40000baseLR4_Full); 938 phylink_set(pl->supported, 50000baseCR2_Full); 939 phylink_set(pl->supported, 50000baseKR2_Full); 940 phylink_set(pl->supported, 50000baseSR2_Full); 941 phylink_set(pl->supported, 50000baseKR_Full); 942 phylink_set(pl->supported, 50000baseSR_Full); 943 phylink_set(pl->supported, 50000baseCR_Full); 944 phylink_set(pl->supported, 50000baseLR_ER_FR_Full); 945 phylink_set(pl->supported, 50000baseDR_Full); 946 phylink_set(pl->supported, 100000baseKR4_Full); 947 phylink_set(pl->supported, 100000baseSR4_Full); 948 phylink_set(pl->supported, 100000baseCR4_Full); 949 phylink_set(pl->supported, 100000baseLR4_ER4_Full); 950 phylink_set(pl->supported, 100000baseKR2_Full); 951 phylink_set(pl->supported, 100000baseSR2_Full); 952 phylink_set(pl->supported, 100000baseCR2_Full); 953 phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full); 954 phylink_set(pl->supported, 100000baseDR2_Full); 955 break; 956 957 default: 958 phylink_err(pl, 959 "incorrect link mode %s for in-band status\n", 960 phy_modes(pl->link_config.interface)); 961 return -EINVAL; 962 } 963 964 linkmode_copy(pl->link_config.advertising, pl->supported); 965 966 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 967 phylink_err(pl, 968 "failed to validate link configuration for in-band status\n"); 969 return -EINVAL; 970 } 971 } 972 973 return 0; 974 } 975 976 static void phylink_apply_manual_flow(struct phylink *pl, 977 struct phylink_link_state *state) 978 { 979 /* If autoneg is disabled, pause AN is also disabled */ 980 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 981 state->advertising)) 982 state->pause &= ~MLO_PAUSE_AN; 983 984 /* Manual configuration of pause modes */ 985 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 986 state->pause = pl->link_config.pause; 987 } 988 989 static void phylink_resolve_an_pause(struct phylink_link_state *state) 990 { 991 bool tx_pause, rx_pause; 992 993 if (state->duplex == DUPLEX_FULL) { 994 linkmode_resolve_pause(state->advertising, 995 state->lp_advertising, 996 &tx_pause, &rx_pause); 997 if (tx_pause) 998 state->pause |= MLO_PAUSE_TX; 999 if (rx_pause) 1000 state->pause |= MLO_PAUSE_RX; 1001 } 1002 } 1003 1004 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 1005 phy_interface_t interface) 1006 { 1007 if (pcs && pcs->ops->pcs_pre_config) 1008 pcs->ops->pcs_pre_config(pcs, interface); 1009 } 1010 1011 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 1012 phy_interface_t interface) 1013 { 1014 int err = 0; 1015 1016 if (pcs && pcs->ops->pcs_post_config) 1017 err = pcs->ops->pcs_post_config(pcs, interface); 1018 1019 return err; 1020 } 1021 1022 static void phylink_pcs_disable(struct phylink_pcs *pcs) 1023 { 1024 if (pcs && pcs->ops->pcs_disable) 1025 pcs->ops->pcs_disable(pcs); 1026 } 1027 1028 static int phylink_pcs_enable(struct phylink_pcs *pcs) 1029 { 1030 int err = 0; 1031 1032 if (pcs && pcs->ops->pcs_enable) 1033 err = pcs->ops->pcs_enable(pcs); 1034 1035 return err; 1036 } 1037 1038 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 1039 const struct phylink_link_state *state, 1040 bool permit_pause_to_mac) 1041 { 1042 if (!pcs) 1043 return 0; 1044 1045 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 1046 state->advertising, permit_pause_to_mac); 1047 } 1048 1049 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 1050 phy_interface_t interface, int speed, 1051 int duplex) 1052 { 1053 if (pcs && pcs->ops->pcs_link_up) 1054 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 1055 } 1056 1057 static void phylink_pcs_poll_stop(struct phylink *pl) 1058 { 1059 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 1060 del_timer(&pl->link_poll); 1061 } 1062 1063 static void phylink_pcs_poll_start(struct phylink *pl) 1064 { 1065 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 1066 mod_timer(&pl->link_poll, jiffies + HZ); 1067 } 1068 1069 static void phylink_mac_config(struct phylink *pl, 1070 const struct phylink_link_state *state) 1071 { 1072 struct phylink_link_state st = *state; 1073 1074 /* Stop drivers incorrectly using these */ 1075 linkmode_zero(st.lp_advertising); 1076 st.speed = SPEED_UNKNOWN; 1077 st.duplex = DUPLEX_UNKNOWN; 1078 st.an_complete = false; 1079 st.link = false; 1080 1081 phylink_dbg(pl, 1082 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 1083 __func__, phylink_an_mode_str(pl->cur_link_an_mode), 1084 phy_modes(st.interface), 1085 phy_rate_matching_to_str(st.rate_matching), 1086 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 1087 st.pause); 1088 1089 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, &st); 1090 } 1091 1092 static void phylink_pcs_an_restart(struct phylink *pl) 1093 { 1094 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1095 pl->link_config.advertising) && 1096 phy_interface_mode_is_8023z(pl->link_config.interface) && 1097 phylink_autoneg_inband(pl->cur_link_an_mode)) 1098 pl->pcs->ops->pcs_an_restart(pl->pcs); 1099 } 1100 1101 static void phylink_major_config(struct phylink *pl, bool restart, 1102 const struct phylink_link_state *state) 1103 { 1104 struct phylink_pcs *pcs = NULL; 1105 bool pcs_changed = false; 1106 unsigned int rate_kbd; 1107 unsigned int neg_mode; 1108 int err; 1109 1110 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); 1111 1112 pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode, 1113 state->interface, 1114 state->advertising); 1115 1116 if (pl->using_mac_select_pcs) { 1117 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1118 if (IS_ERR(pcs)) { 1119 phylink_err(pl, 1120 "mac_select_pcs unexpectedly failed: %pe\n", 1121 pcs); 1122 return; 1123 } 1124 1125 pcs_changed = pcs && pl->pcs != pcs; 1126 } 1127 1128 phylink_pcs_poll_stop(pl); 1129 1130 if (pl->mac_ops->mac_prepare) { 1131 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode, 1132 state->interface); 1133 if (err < 0) { 1134 phylink_err(pl, "mac_prepare failed: %pe\n", 1135 ERR_PTR(err)); 1136 return; 1137 } 1138 } 1139 1140 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1141 * for the change. 1142 */ 1143 if (pcs_changed) { 1144 phylink_pcs_disable(pl->pcs); 1145 1146 if (pl->pcs) 1147 pl->pcs->phylink = NULL; 1148 1149 pcs->phylink = pl; 1150 1151 pl->pcs = pcs; 1152 } 1153 1154 if (pl->pcs) 1155 phylink_pcs_pre_config(pl->pcs, state->interface); 1156 1157 phylink_mac_config(pl, state); 1158 1159 if (pl->pcs) 1160 phylink_pcs_post_config(pl->pcs, state->interface); 1161 1162 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1163 phylink_pcs_enable(pl->pcs); 1164 1165 neg_mode = pl->cur_link_an_mode; 1166 if (pl->pcs && pl->pcs->neg_mode) 1167 neg_mode = pl->pcs_neg_mode; 1168 1169 err = phylink_pcs_config(pl->pcs, neg_mode, state, 1170 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1171 if (err < 0) 1172 phylink_err(pl, "pcs_config failed: %pe\n", 1173 ERR_PTR(err)); 1174 else if (err > 0) 1175 restart = true; 1176 1177 if (restart) 1178 phylink_pcs_an_restart(pl); 1179 1180 if (pl->mac_ops->mac_finish) { 1181 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode, 1182 state->interface); 1183 if (err < 0) 1184 phylink_err(pl, "mac_finish failed: %pe\n", 1185 ERR_PTR(err)); 1186 } 1187 1188 if (pl->sfp_bus) { 1189 rate_kbd = phylink_interface_signal_rate(state->interface); 1190 if (rate_kbd) 1191 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1192 } 1193 1194 phylink_pcs_poll_start(pl); 1195 } 1196 1197 /* 1198 * Reconfigure for a change of inband advertisement. 1199 * If we have a separate PCS, we only need to call its pcs_config() method, 1200 * and then restart AN if it indicates something changed. Otherwise, we do 1201 * the full MAC reconfiguration. 1202 */ 1203 static int phylink_change_inband_advert(struct phylink *pl) 1204 { 1205 unsigned int neg_mode; 1206 int ret; 1207 1208 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1209 return 0; 1210 1211 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1212 phylink_an_mode_str(pl->cur_link_an_mode), 1213 phy_modes(pl->link_config.interface), 1214 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1215 pl->link_config.pause); 1216 1217 /* Recompute the PCS neg mode */ 1218 pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode, 1219 pl->link_config.interface, 1220 pl->link_config.advertising); 1221 1222 neg_mode = pl->cur_link_an_mode; 1223 if (pl->pcs->neg_mode) 1224 neg_mode = pl->pcs_neg_mode; 1225 1226 /* Modern PCS-based method; update the advert at the PCS, and 1227 * restart negotiation if the pcs_config() helper indicates that 1228 * the programmed advertisement has changed. 1229 */ 1230 ret = phylink_pcs_config(pl->pcs, neg_mode, &pl->link_config, 1231 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1232 if (ret < 0) 1233 return ret; 1234 1235 if (ret > 0) 1236 phylink_pcs_an_restart(pl); 1237 1238 return 0; 1239 } 1240 1241 static void phylink_mac_pcs_get_state(struct phylink *pl, 1242 struct phylink_link_state *state) 1243 { 1244 linkmode_copy(state->advertising, pl->link_config.advertising); 1245 linkmode_zero(state->lp_advertising); 1246 state->interface = pl->link_config.interface; 1247 state->rate_matching = pl->link_config.rate_matching; 1248 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1249 state->advertising)) { 1250 state->speed = SPEED_UNKNOWN; 1251 state->duplex = DUPLEX_UNKNOWN; 1252 state->pause = MLO_PAUSE_NONE; 1253 } else { 1254 state->speed = pl->link_config.speed; 1255 state->duplex = pl->link_config.duplex; 1256 state->pause = pl->link_config.pause; 1257 } 1258 state->an_complete = 0; 1259 state->link = 1; 1260 1261 if (pl->pcs) 1262 pl->pcs->ops->pcs_get_state(pl->pcs, state); 1263 else 1264 state->link = 0; 1265 } 1266 1267 /* The fixed state is... fixed except for the link state, 1268 * which may be determined by a GPIO or a callback. 1269 */ 1270 static void phylink_get_fixed_state(struct phylink *pl, 1271 struct phylink_link_state *state) 1272 { 1273 *state = pl->link_config; 1274 if (pl->config->get_fixed_state) 1275 pl->config->get_fixed_state(pl->config, state); 1276 else if (pl->link_gpio) 1277 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1278 1279 state->pause = MLO_PAUSE_NONE; 1280 phylink_resolve_an_pause(state); 1281 } 1282 1283 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1284 { 1285 struct phylink_link_state link_state; 1286 1287 switch (pl->cur_link_an_mode) { 1288 case MLO_AN_PHY: 1289 link_state = pl->phy_state; 1290 break; 1291 1292 case MLO_AN_FIXED: 1293 phylink_get_fixed_state(pl, &link_state); 1294 break; 1295 1296 case MLO_AN_INBAND: 1297 link_state = pl->link_config; 1298 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1299 link_state.pause = MLO_PAUSE_NONE; 1300 break; 1301 1302 default: /* can't happen */ 1303 return; 1304 } 1305 1306 link_state.link = false; 1307 1308 phylink_apply_manual_flow(pl, &link_state); 1309 phylink_major_config(pl, force_restart, &link_state); 1310 } 1311 1312 static const char *phylink_pause_to_str(int pause) 1313 { 1314 switch (pause & MLO_PAUSE_TXRX_MASK) { 1315 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1316 return "rx/tx"; 1317 case MLO_PAUSE_TX: 1318 return "tx"; 1319 case MLO_PAUSE_RX: 1320 return "rx"; 1321 default: 1322 return "off"; 1323 } 1324 } 1325 1326 static void phylink_link_up(struct phylink *pl, 1327 struct phylink_link_state link_state) 1328 { 1329 struct net_device *ndev = pl->netdev; 1330 unsigned int neg_mode; 1331 int speed, duplex; 1332 bool rx_pause; 1333 1334 speed = link_state.speed; 1335 duplex = link_state.duplex; 1336 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1337 1338 switch (link_state.rate_matching) { 1339 case RATE_MATCH_PAUSE: 1340 /* The PHY is doing rate matchion from the media rate (in 1341 * the link_state) to the interface speed, and will send 1342 * pause frames to the MAC to limit its transmission speed. 1343 */ 1344 speed = phylink_interface_max_speed(link_state.interface); 1345 duplex = DUPLEX_FULL; 1346 rx_pause = true; 1347 break; 1348 1349 case RATE_MATCH_CRS: 1350 /* The PHY is doing rate matchion from the media rate (in 1351 * the link_state) to the interface speed, and will cause 1352 * collisions to the MAC to limit its transmission speed. 1353 */ 1354 speed = phylink_interface_max_speed(link_state.interface); 1355 duplex = DUPLEX_HALF; 1356 break; 1357 } 1358 1359 pl->cur_interface = link_state.interface; 1360 1361 neg_mode = pl->cur_link_an_mode; 1362 if (pl->pcs && pl->pcs->neg_mode) 1363 neg_mode = pl->pcs_neg_mode; 1364 1365 phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed, 1366 duplex); 1367 1368 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode, 1369 pl->cur_interface, speed, duplex, 1370 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1371 1372 if (ndev) 1373 netif_carrier_on(ndev); 1374 1375 phylink_info(pl, 1376 "Link is Up - %s/%s - flow control %s\n", 1377 phy_speed_to_str(link_state.speed), 1378 phy_duplex_to_str(link_state.duplex), 1379 phylink_pause_to_str(link_state.pause)); 1380 } 1381 1382 static void phylink_link_down(struct phylink *pl) 1383 { 1384 struct net_device *ndev = pl->netdev; 1385 1386 if (ndev) 1387 netif_carrier_off(ndev); 1388 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode, 1389 pl->cur_interface); 1390 phylink_info(pl, "Link is Down\n"); 1391 } 1392 1393 static void phylink_resolve(struct work_struct *w) 1394 { 1395 struct phylink *pl = container_of(w, struct phylink, resolve); 1396 struct phylink_link_state link_state; 1397 struct net_device *ndev = pl->netdev; 1398 bool mac_config = false; 1399 bool retrigger = false; 1400 bool cur_link_state; 1401 1402 mutex_lock(&pl->state_mutex); 1403 if (pl->netdev) 1404 cur_link_state = netif_carrier_ok(ndev); 1405 else 1406 cur_link_state = pl->old_link_state; 1407 1408 if (pl->phylink_disable_state) { 1409 pl->mac_link_dropped = false; 1410 link_state.link = false; 1411 } else if (pl->mac_link_dropped) { 1412 link_state.link = false; 1413 retrigger = true; 1414 } else { 1415 switch (pl->cur_link_an_mode) { 1416 case MLO_AN_PHY: 1417 link_state = pl->phy_state; 1418 phylink_apply_manual_flow(pl, &link_state); 1419 mac_config = link_state.link; 1420 break; 1421 1422 case MLO_AN_FIXED: 1423 phylink_get_fixed_state(pl, &link_state); 1424 mac_config = link_state.link; 1425 break; 1426 1427 case MLO_AN_INBAND: 1428 phylink_mac_pcs_get_state(pl, &link_state); 1429 1430 /* The PCS may have a latching link-fail indicator. 1431 * If the link was up, bring the link down and 1432 * re-trigger the resolve. Otherwise, re-read the 1433 * PCS state to get the current status of the link. 1434 */ 1435 if (!link_state.link) { 1436 if (cur_link_state) 1437 retrigger = true; 1438 else 1439 phylink_mac_pcs_get_state(pl, 1440 &link_state); 1441 } 1442 1443 /* If we have a phy, the "up" state is the union of 1444 * both the PHY and the MAC 1445 */ 1446 if (pl->phydev) 1447 link_state.link &= pl->phy_state.link; 1448 1449 /* Only update if the PHY link is up */ 1450 if (pl->phydev && pl->phy_state.link) { 1451 /* If the interface has changed, force a 1452 * link down event if the link isn't already 1453 * down, and re-resolve. 1454 */ 1455 if (link_state.interface != 1456 pl->phy_state.interface) { 1457 retrigger = true; 1458 link_state.link = false; 1459 } 1460 link_state.interface = pl->phy_state.interface; 1461 1462 /* If we are doing rate matching, then the 1463 * link speed/duplex comes from the PHY 1464 */ 1465 if (pl->phy_state.rate_matching) { 1466 link_state.rate_matching = 1467 pl->phy_state.rate_matching; 1468 link_state.speed = pl->phy_state.speed; 1469 link_state.duplex = 1470 pl->phy_state.duplex; 1471 } 1472 1473 /* If we have a PHY, we need to update with 1474 * the PHY flow control bits. 1475 */ 1476 link_state.pause = pl->phy_state.pause; 1477 mac_config = true; 1478 } 1479 phylink_apply_manual_flow(pl, &link_state); 1480 break; 1481 } 1482 } 1483 1484 if (mac_config) { 1485 if (link_state.interface != pl->link_config.interface) { 1486 /* The interface has changed, force the link down and 1487 * then reconfigure. 1488 */ 1489 if (cur_link_state) { 1490 phylink_link_down(pl); 1491 cur_link_state = false; 1492 } 1493 phylink_major_config(pl, false, &link_state); 1494 pl->link_config.interface = link_state.interface; 1495 } 1496 } 1497 1498 if (link_state.link != cur_link_state) { 1499 pl->old_link_state = link_state.link; 1500 if (!link_state.link) 1501 phylink_link_down(pl); 1502 else 1503 phylink_link_up(pl, link_state); 1504 } 1505 if (!link_state.link && retrigger) { 1506 pl->mac_link_dropped = false; 1507 queue_work(system_power_efficient_wq, &pl->resolve); 1508 } 1509 mutex_unlock(&pl->state_mutex); 1510 } 1511 1512 static void phylink_run_resolve(struct phylink *pl) 1513 { 1514 if (!pl->phylink_disable_state) 1515 queue_work(system_power_efficient_wq, &pl->resolve); 1516 } 1517 1518 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1519 { 1520 unsigned long state = pl->phylink_disable_state; 1521 1522 set_bit(bit, &pl->phylink_disable_state); 1523 if (state == 0) { 1524 queue_work(system_power_efficient_wq, &pl->resolve); 1525 flush_work(&pl->resolve); 1526 } 1527 } 1528 1529 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1530 { 1531 clear_bit(bit, &pl->phylink_disable_state); 1532 phylink_run_resolve(pl); 1533 } 1534 1535 static void phylink_fixed_poll(struct timer_list *t) 1536 { 1537 struct phylink *pl = container_of(t, struct phylink, link_poll); 1538 1539 mod_timer(t, jiffies + HZ); 1540 1541 phylink_run_resolve(pl); 1542 } 1543 1544 static const struct sfp_upstream_ops sfp_phylink_ops; 1545 1546 static int phylink_register_sfp(struct phylink *pl, 1547 const struct fwnode_handle *fwnode) 1548 { 1549 struct sfp_bus *bus; 1550 int ret; 1551 1552 if (!fwnode) 1553 return 0; 1554 1555 bus = sfp_bus_find_fwnode(fwnode); 1556 if (IS_ERR(bus)) { 1557 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1558 return PTR_ERR(bus); 1559 } 1560 1561 pl->sfp_bus = bus; 1562 1563 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1564 sfp_bus_put(bus); 1565 1566 return ret; 1567 } 1568 1569 /** 1570 * phylink_create() - create a phylink instance 1571 * @config: a pointer to the target &struct phylink_config 1572 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1573 * interface 1574 * @iface: the desired link mode defined by &typedef phy_interface_t 1575 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1576 * 1577 * Create a new phylink instance, and parse the link parameters found in @np. 1578 * This will parse in-band modes, fixed-link or SFP configuration. 1579 * 1580 * Note: the rtnl lock must not be held when calling this function. 1581 * 1582 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1583 * must use IS_ERR() to check for errors from this function. 1584 */ 1585 struct phylink *phylink_create(struct phylink_config *config, 1586 const struct fwnode_handle *fwnode, 1587 phy_interface_t iface, 1588 const struct phylink_mac_ops *mac_ops) 1589 { 1590 bool using_mac_select_pcs = false; 1591 struct phylink *pl; 1592 int ret; 1593 1594 /* Validate the supplied configuration */ 1595 if (phy_interface_empty(config->supported_interfaces)) { 1596 dev_err(config->dev, 1597 "phylink: error: empty supported_interfaces\n"); 1598 return ERR_PTR(-EINVAL); 1599 } 1600 1601 if (mac_ops->mac_select_pcs && 1602 mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) != 1603 ERR_PTR(-EOPNOTSUPP)) 1604 using_mac_select_pcs = true; 1605 1606 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1607 if (!pl) 1608 return ERR_PTR(-ENOMEM); 1609 1610 mutex_init(&pl->state_mutex); 1611 INIT_WORK(&pl->resolve, phylink_resolve); 1612 1613 pl->config = config; 1614 if (config->type == PHYLINK_NETDEV) { 1615 pl->netdev = to_net_dev(config->dev); 1616 } else if (config->type == PHYLINK_DEV) { 1617 pl->dev = config->dev; 1618 } else { 1619 kfree(pl); 1620 return ERR_PTR(-EINVAL); 1621 } 1622 1623 pl->using_mac_select_pcs = using_mac_select_pcs; 1624 pl->phy_state.interface = iface; 1625 pl->link_interface = iface; 1626 if (iface == PHY_INTERFACE_MODE_MOCA) 1627 pl->link_port = PORT_BNC; 1628 else 1629 pl->link_port = PORT_MII; 1630 pl->link_config.interface = iface; 1631 pl->link_config.pause = MLO_PAUSE_AN; 1632 pl->link_config.speed = SPEED_UNKNOWN; 1633 pl->link_config.duplex = DUPLEX_UNKNOWN; 1634 pl->pcs_state = PCS_STATE_DOWN; 1635 pl->mac_ops = mac_ops; 1636 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1637 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1638 1639 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 1640 linkmode_copy(pl->link_config.advertising, pl->supported); 1641 phylink_validate(pl, pl->supported, &pl->link_config); 1642 1643 ret = phylink_parse_mode(pl, fwnode); 1644 if (ret < 0) { 1645 kfree(pl); 1646 return ERR_PTR(ret); 1647 } 1648 1649 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1650 ret = phylink_parse_fixedlink(pl, fwnode); 1651 if (ret < 0) { 1652 kfree(pl); 1653 return ERR_PTR(ret); 1654 } 1655 } 1656 1657 pl->cur_link_an_mode = pl->cfg_link_an_mode; 1658 1659 ret = phylink_register_sfp(pl, fwnode); 1660 if (ret < 0) { 1661 kfree(pl); 1662 return ERR_PTR(ret); 1663 } 1664 1665 return pl; 1666 } 1667 EXPORT_SYMBOL_GPL(phylink_create); 1668 1669 /** 1670 * phylink_destroy() - cleanup and destroy the phylink instance 1671 * @pl: a pointer to a &struct phylink returned from phylink_create() 1672 * 1673 * Destroy a phylink instance. Any PHY that has been attached must have been 1674 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1675 * 1676 * Note: the rtnl lock must not be held when calling this function. 1677 */ 1678 void phylink_destroy(struct phylink *pl) 1679 { 1680 sfp_bus_del_upstream(pl->sfp_bus); 1681 if (pl->link_gpio) 1682 gpiod_put(pl->link_gpio); 1683 1684 cancel_work_sync(&pl->resolve); 1685 kfree(pl); 1686 } 1687 EXPORT_SYMBOL_GPL(phylink_destroy); 1688 1689 /** 1690 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1691 * @pl: a pointer to a &struct phylink returned from phylink_create() 1692 * 1693 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1694 * no PHY is needed. 1695 * 1696 * Returns true if phylink will be expecting a PHY. 1697 */ 1698 bool phylink_expects_phy(struct phylink *pl) 1699 { 1700 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1701 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1702 phy_interface_mode_is_8023z(pl->link_config.interface))) 1703 return false; 1704 return true; 1705 } 1706 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1707 1708 static void phylink_phy_change(struct phy_device *phydev, bool up) 1709 { 1710 struct phylink *pl = phydev->phylink; 1711 bool tx_pause, rx_pause; 1712 1713 phy_get_pause(phydev, &tx_pause, &rx_pause); 1714 1715 mutex_lock(&pl->state_mutex); 1716 pl->phy_state.speed = phydev->speed; 1717 pl->phy_state.duplex = phydev->duplex; 1718 pl->phy_state.rate_matching = phydev->rate_matching; 1719 pl->phy_state.pause = MLO_PAUSE_NONE; 1720 if (tx_pause) 1721 pl->phy_state.pause |= MLO_PAUSE_TX; 1722 if (rx_pause) 1723 pl->phy_state.pause |= MLO_PAUSE_RX; 1724 pl->phy_state.interface = phydev->interface; 1725 pl->phy_state.link = up; 1726 mutex_unlock(&pl->state_mutex); 1727 1728 phylink_run_resolve(pl); 1729 1730 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down", 1731 phy_modes(phydev->interface), 1732 phy_speed_to_str(phydev->speed), 1733 phy_duplex_to_str(phydev->duplex), 1734 phy_rate_matching_to_str(phydev->rate_matching), 1735 phylink_pause_to_str(pl->phy_state.pause)); 1736 } 1737 1738 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 1739 phy_interface_t interface) 1740 { 1741 struct phylink_link_state config; 1742 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 1743 char *irq_str; 1744 int ret; 1745 1746 /* 1747 * This is the new way of dealing with flow control for PHYs, 1748 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 1749 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 1750 * using our validate call to the MAC, we rely upon the MAC 1751 * clearing the bits from both supported and advertising fields. 1752 */ 1753 phy_support_asym_pause(phy); 1754 1755 memset(&config, 0, sizeof(config)); 1756 linkmode_copy(supported, phy->supported); 1757 linkmode_copy(config.advertising, phy->advertising); 1758 1759 /* Check whether we would use rate matching for the proposed interface 1760 * mode. 1761 */ 1762 config.rate_matching = phy_get_rate_matching(phy, interface); 1763 1764 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 1765 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 1766 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 1767 * their Serdes is either unnecessary or not reasonable. 1768 * 1769 * For these which switch interface modes, we really need to know which 1770 * interface modes the PHY supports to properly work out which ethtool 1771 * linkmodes can be supported. For now, as a work-around, we validate 1772 * against all interface modes, which may lead to more ethtool link 1773 * modes being advertised than are actually supported. 1774 */ 1775 if (phy->is_c45 && config.rate_matching == RATE_MATCH_NONE && 1776 interface != PHY_INTERFACE_MODE_RXAUI && 1777 interface != PHY_INTERFACE_MODE_XAUI && 1778 interface != PHY_INTERFACE_MODE_USXGMII) 1779 config.interface = PHY_INTERFACE_MODE_NA; 1780 else 1781 config.interface = interface; 1782 1783 ret = phylink_validate(pl, supported, &config); 1784 if (ret) { 1785 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 1786 phy_modes(config.interface), 1787 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 1788 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 1789 ERR_PTR(ret)); 1790 return ret; 1791 } 1792 1793 phy->phylink = pl; 1794 phy->phy_link_change = phylink_phy_change; 1795 1796 irq_str = phy_attached_info_irq(phy); 1797 phylink_info(pl, 1798 "PHY [%s] driver [%s] (irq=%s)\n", 1799 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 1800 kfree(irq_str); 1801 1802 mutex_lock(&phy->lock); 1803 mutex_lock(&pl->state_mutex); 1804 pl->phydev = phy; 1805 pl->phy_state.interface = interface; 1806 pl->phy_state.pause = MLO_PAUSE_NONE; 1807 pl->phy_state.speed = SPEED_UNKNOWN; 1808 pl->phy_state.duplex = DUPLEX_UNKNOWN; 1809 pl->phy_state.rate_matching = RATE_MATCH_NONE; 1810 linkmode_copy(pl->supported, supported); 1811 linkmode_copy(pl->link_config.advertising, config.advertising); 1812 1813 /* Restrict the phy advertisement according to the MAC support. */ 1814 linkmode_copy(phy->advertising, config.advertising); 1815 mutex_unlock(&pl->state_mutex); 1816 mutex_unlock(&phy->lock); 1817 1818 phylink_dbg(pl, 1819 "phy: %s setting supported %*pb advertising %*pb\n", 1820 phy_modes(interface), 1821 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 1822 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 1823 1824 if (phy_interrupt_is_valid(phy)) 1825 phy_request_interrupt(phy); 1826 1827 if (pl->config->mac_managed_pm) 1828 phy->mac_managed_pm = true; 1829 1830 return 0; 1831 } 1832 1833 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 1834 phy_interface_t interface) 1835 { 1836 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 1837 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1838 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 1839 return -EINVAL; 1840 1841 if (pl->phydev) 1842 return -EBUSY; 1843 1844 return phy_attach_direct(pl->netdev, phy, 0, interface); 1845 } 1846 1847 /** 1848 * phylink_connect_phy() - connect a PHY to the phylink instance 1849 * @pl: a pointer to a &struct phylink returned from phylink_create() 1850 * @phy: a pointer to a &struct phy_device. 1851 * 1852 * Connect @phy to the phylink instance specified by @pl by calling 1853 * phy_attach_direct(). Configure the @phy according to the MAC driver's 1854 * capabilities, start the PHYLIB state machine and enable any interrupts 1855 * that the PHY supports. 1856 * 1857 * This updates the phylink's ethtool supported and advertising link mode 1858 * masks. 1859 * 1860 * Returns 0 on success or a negative errno. 1861 */ 1862 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 1863 { 1864 int ret; 1865 1866 /* Use PHY device/driver interface */ 1867 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1868 pl->link_interface = phy->interface; 1869 pl->link_config.interface = pl->link_interface; 1870 } 1871 1872 ret = phylink_attach_phy(pl, phy, pl->link_interface); 1873 if (ret < 0) 1874 return ret; 1875 1876 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 1877 if (ret) 1878 phy_detach(phy); 1879 1880 return ret; 1881 } 1882 EXPORT_SYMBOL_GPL(phylink_connect_phy); 1883 1884 /** 1885 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 1886 * @pl: a pointer to a &struct phylink returned from phylink_create() 1887 * @dn: a pointer to a &struct device_node. 1888 * @flags: PHY-specific flags to communicate to the PHY device driver 1889 * 1890 * Connect the phy specified in the device node @dn to the phylink instance 1891 * specified by @pl. Actions specified in phylink_connect_phy() will be 1892 * performed. 1893 * 1894 * Returns 0 on success or a negative errno. 1895 */ 1896 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 1897 u32 flags) 1898 { 1899 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 1900 } 1901 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 1902 1903 /** 1904 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 1905 * @pl: a pointer to a &struct phylink returned from phylink_create() 1906 * @fwnode: a pointer to a &struct fwnode_handle. 1907 * @flags: PHY-specific flags to communicate to the PHY device driver 1908 * 1909 * Connect the phy specified @fwnode to the phylink instance specified 1910 * by @pl. 1911 * 1912 * Returns 0 on success or a negative errno. 1913 */ 1914 int phylink_fwnode_phy_connect(struct phylink *pl, 1915 const struct fwnode_handle *fwnode, 1916 u32 flags) 1917 { 1918 struct fwnode_handle *phy_fwnode; 1919 struct phy_device *phy_dev; 1920 int ret; 1921 1922 /* Fixed links and 802.3z are handled without needing a PHY */ 1923 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1924 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1925 phy_interface_mode_is_8023z(pl->link_interface))) 1926 return 0; 1927 1928 phy_fwnode = fwnode_get_phy_node(fwnode); 1929 if (IS_ERR(phy_fwnode)) { 1930 if (pl->cfg_link_an_mode == MLO_AN_PHY) 1931 return -ENODEV; 1932 return 0; 1933 } 1934 1935 phy_dev = fwnode_phy_find_device(phy_fwnode); 1936 /* We're done with the phy_node handle */ 1937 fwnode_handle_put(phy_fwnode); 1938 if (!phy_dev) 1939 return -ENODEV; 1940 1941 /* Use PHY device/driver interface */ 1942 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1943 pl->link_interface = phy_dev->interface; 1944 pl->link_config.interface = pl->link_interface; 1945 } 1946 1947 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 1948 pl->link_interface); 1949 phy_device_free(phy_dev); 1950 if (ret) 1951 return ret; 1952 1953 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 1954 if (ret) 1955 phy_detach(phy_dev); 1956 1957 return ret; 1958 } 1959 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 1960 1961 /** 1962 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 1963 * instance. 1964 * @pl: a pointer to a &struct phylink returned from phylink_create() 1965 * 1966 * Disconnect any current PHY from the phylink instance described by @pl. 1967 */ 1968 void phylink_disconnect_phy(struct phylink *pl) 1969 { 1970 struct phy_device *phy; 1971 1972 ASSERT_RTNL(); 1973 1974 phy = pl->phydev; 1975 if (phy) { 1976 mutex_lock(&phy->lock); 1977 mutex_lock(&pl->state_mutex); 1978 pl->phydev = NULL; 1979 mutex_unlock(&pl->state_mutex); 1980 mutex_unlock(&phy->lock); 1981 flush_work(&pl->resolve); 1982 1983 phy_disconnect(phy); 1984 } 1985 } 1986 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 1987 1988 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 1989 { 1990 if (!up) 1991 pl->mac_link_dropped = true; 1992 phylink_run_resolve(pl); 1993 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 1994 } 1995 1996 /** 1997 * phylink_mac_change() - notify phylink of a change in MAC state 1998 * @pl: a pointer to a &struct phylink returned from phylink_create() 1999 * @up: indicates whether the link is currently up. 2000 * 2001 * The MAC driver should call this driver when the state of its link 2002 * changes (eg, link failure, new negotiation results, etc.) 2003 */ 2004 void phylink_mac_change(struct phylink *pl, bool up) 2005 { 2006 phylink_link_changed(pl, up, "mac"); 2007 } 2008 EXPORT_SYMBOL_GPL(phylink_mac_change); 2009 2010 /** 2011 * phylink_pcs_change() - notify phylink of a change to PCS link state 2012 * @pcs: pointer to &struct phylink_pcs 2013 * @up: indicates whether the link is currently up. 2014 * 2015 * The PCS driver should call this when the state of its link changes 2016 * (e.g. link failure, new negotiation results, etc.) Note: it should 2017 * not determine "up" by reading the BMSR. If in doubt about the link 2018 * state at interrupt time, then pass true if pcs_get_state() returns 2019 * the latched link-down state, otherwise pass false. 2020 */ 2021 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2022 { 2023 struct phylink *pl = pcs->phylink; 2024 2025 if (pl) 2026 phylink_link_changed(pl, up, "pcs"); 2027 } 2028 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2029 2030 static irqreturn_t phylink_link_handler(int irq, void *data) 2031 { 2032 struct phylink *pl = data; 2033 2034 phylink_run_resolve(pl); 2035 2036 return IRQ_HANDLED; 2037 } 2038 2039 /** 2040 * phylink_start() - start a phylink instance 2041 * @pl: a pointer to a &struct phylink returned from phylink_create() 2042 * 2043 * Start the phylink instance specified by @pl, configuring the MAC for the 2044 * desired link mode(s) and negotiation style. This should be called from the 2045 * network device driver's &struct net_device_ops ndo_open() method. 2046 */ 2047 void phylink_start(struct phylink *pl) 2048 { 2049 bool poll = false; 2050 2051 ASSERT_RTNL(); 2052 2053 phylink_info(pl, "configuring for %s/%s link mode\n", 2054 phylink_an_mode_str(pl->cur_link_an_mode), 2055 phy_modes(pl->link_config.interface)); 2056 2057 /* Always set the carrier off */ 2058 if (pl->netdev) 2059 netif_carrier_off(pl->netdev); 2060 2061 pl->pcs_state = PCS_STATE_STARTING; 2062 2063 /* Apply the link configuration to the MAC when starting. This allows 2064 * a fixed-link to start with the correct parameters, and also 2065 * ensures that we set the appropriate advertisement for Serdes links. 2066 * 2067 * Restart autonegotiation if using 802.3z to ensure that the link 2068 * parameters are properly negotiated. This is necessary for DSA 2069 * switches using 802.3z negotiation to ensure they see our modes. 2070 */ 2071 phylink_mac_initial_config(pl, true); 2072 2073 pl->pcs_state = PCS_STATE_STARTED; 2074 2075 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2076 2077 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2078 int irq = gpiod_to_irq(pl->link_gpio); 2079 2080 if (irq > 0) { 2081 if (!request_irq(irq, phylink_link_handler, 2082 IRQF_TRIGGER_RISING | 2083 IRQF_TRIGGER_FALLING, 2084 "netdev link", pl)) 2085 pl->link_irq = irq; 2086 else 2087 irq = 0; 2088 } 2089 if (irq <= 0) 2090 poll = true; 2091 } 2092 2093 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2094 poll |= pl->config->poll_fixed_state; 2095 2096 if (poll) 2097 mod_timer(&pl->link_poll, jiffies + HZ); 2098 if (pl->phydev) 2099 phy_start(pl->phydev); 2100 if (pl->sfp_bus) 2101 sfp_upstream_start(pl->sfp_bus); 2102 } 2103 EXPORT_SYMBOL_GPL(phylink_start); 2104 2105 /** 2106 * phylink_stop() - stop a phylink instance 2107 * @pl: a pointer to a &struct phylink returned from phylink_create() 2108 * 2109 * Stop the phylink instance specified by @pl. This should be called from the 2110 * network device driver's &struct net_device_ops ndo_stop() method. The 2111 * network device's carrier state should not be changed prior to calling this 2112 * function. 2113 * 2114 * This will synchronously bring down the link if the link is not already 2115 * down (in other words, it will trigger a mac_link_down() method call.) 2116 */ 2117 void phylink_stop(struct phylink *pl) 2118 { 2119 ASSERT_RTNL(); 2120 2121 if (pl->sfp_bus) 2122 sfp_upstream_stop(pl->sfp_bus); 2123 if (pl->phydev) 2124 phy_stop(pl->phydev); 2125 del_timer_sync(&pl->link_poll); 2126 if (pl->link_irq) { 2127 free_irq(pl->link_irq, pl); 2128 pl->link_irq = 0; 2129 } 2130 2131 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2132 2133 pl->pcs_state = PCS_STATE_DOWN; 2134 2135 phylink_pcs_disable(pl->pcs); 2136 } 2137 EXPORT_SYMBOL_GPL(phylink_stop); 2138 2139 /** 2140 * phylink_suspend() - handle a network device suspend event 2141 * @pl: a pointer to a &struct phylink returned from phylink_create() 2142 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2143 * 2144 * Handle a network device suspend event. There are several cases: 2145 * 2146 * - If Wake-on-Lan is not active, we can bring down the link between 2147 * the MAC and PHY by calling phylink_stop(). 2148 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2149 * can also bring down the link between the MAC and PHY. 2150 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2151 * still needs to receive packets, so we can not bring the link down. 2152 */ 2153 void phylink_suspend(struct phylink *pl, bool mac_wol) 2154 { 2155 ASSERT_RTNL(); 2156 2157 if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) { 2158 /* Wake-on-Lan enabled, MAC handling */ 2159 mutex_lock(&pl->state_mutex); 2160 2161 /* Stop the resolver bringing the link up */ 2162 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2163 2164 /* Disable the carrier, to prevent transmit timeouts, 2165 * but one would hope all packets have been sent. This 2166 * also means phylink_resolve() will do nothing. 2167 */ 2168 if (pl->netdev) 2169 netif_carrier_off(pl->netdev); 2170 else 2171 pl->old_link_state = false; 2172 2173 /* We do not call mac_link_down() here as we want the 2174 * link to remain up to receive the WoL packets. 2175 */ 2176 mutex_unlock(&pl->state_mutex); 2177 } else { 2178 phylink_stop(pl); 2179 } 2180 } 2181 EXPORT_SYMBOL_GPL(phylink_suspend); 2182 2183 /** 2184 * phylink_resume() - handle a network device resume event 2185 * @pl: a pointer to a &struct phylink returned from phylink_create() 2186 * 2187 * Undo the effects of phylink_suspend(), returning the link to an 2188 * operational state. 2189 */ 2190 void phylink_resume(struct phylink *pl) 2191 { 2192 ASSERT_RTNL(); 2193 2194 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2195 /* Wake-on-Lan enabled, MAC handling */ 2196 2197 /* Call mac_link_down() so we keep the overall state balanced. 2198 * Do this under the state_mutex lock for consistency. This 2199 * will cause a "Link Down" message to be printed during 2200 * resume, which is harmless - the true link state will be 2201 * printed when we run a resolve. 2202 */ 2203 mutex_lock(&pl->state_mutex); 2204 phylink_link_down(pl); 2205 mutex_unlock(&pl->state_mutex); 2206 2207 /* Re-apply the link parameters so that all the settings get 2208 * restored to the MAC. 2209 */ 2210 phylink_mac_initial_config(pl, true); 2211 2212 /* Re-enable and re-resolve the link parameters */ 2213 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2214 } else { 2215 phylink_start(pl); 2216 } 2217 } 2218 EXPORT_SYMBOL_GPL(phylink_resume); 2219 2220 /** 2221 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2222 * @pl: a pointer to a &struct phylink returned from phylink_create() 2223 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2224 * 2225 * Read the wake on lan parameters from the PHY attached to the phylink 2226 * instance specified by @pl. If no PHY is currently attached, report no 2227 * support for wake on lan. 2228 */ 2229 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2230 { 2231 ASSERT_RTNL(); 2232 2233 wol->supported = 0; 2234 wol->wolopts = 0; 2235 2236 if (pl->phydev) 2237 phy_ethtool_get_wol(pl->phydev, wol); 2238 } 2239 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2240 2241 /** 2242 * phylink_ethtool_set_wol() - set wake on lan parameters 2243 * @pl: a pointer to a &struct phylink returned from phylink_create() 2244 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2245 * 2246 * Set the wake on lan parameters for the PHY attached to the phylink 2247 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2248 * error. 2249 * 2250 * Returns zero on success or negative errno code. 2251 */ 2252 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2253 { 2254 int ret = -EOPNOTSUPP; 2255 2256 ASSERT_RTNL(); 2257 2258 if (pl->phydev) 2259 ret = phy_ethtool_set_wol(pl->phydev, wol); 2260 2261 return ret; 2262 } 2263 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2264 2265 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2266 { 2267 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2268 2269 linkmode_zero(mask); 2270 phylink_set_port_modes(mask); 2271 2272 linkmode_and(dst, dst, mask); 2273 linkmode_or(dst, dst, b); 2274 } 2275 2276 static void phylink_get_ksettings(const struct phylink_link_state *state, 2277 struct ethtool_link_ksettings *kset) 2278 { 2279 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2280 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2281 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2282 kset->base.speed = state->speed; 2283 kset->base.duplex = state->duplex; 2284 } 2285 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2286 state->advertising) ? 2287 AUTONEG_ENABLE : AUTONEG_DISABLE; 2288 } 2289 2290 /** 2291 * phylink_ethtool_ksettings_get() - get the current link settings 2292 * @pl: a pointer to a &struct phylink returned from phylink_create() 2293 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2294 * 2295 * Read the current link settings for the phylink instance specified by @pl. 2296 * This will be the link settings read from the MAC, PHY or fixed link 2297 * settings depending on the current negotiation mode. 2298 */ 2299 int phylink_ethtool_ksettings_get(struct phylink *pl, 2300 struct ethtool_link_ksettings *kset) 2301 { 2302 struct phylink_link_state link_state; 2303 2304 ASSERT_RTNL(); 2305 2306 if (pl->phydev) 2307 phy_ethtool_ksettings_get(pl->phydev, kset); 2308 else 2309 kset->base.port = pl->link_port; 2310 2311 linkmode_copy(kset->link_modes.supported, pl->supported); 2312 2313 switch (pl->cur_link_an_mode) { 2314 case MLO_AN_FIXED: 2315 /* We are using fixed settings. Report these as the 2316 * current link settings - and note that these also 2317 * represent the supported speeds/duplex/pause modes. 2318 */ 2319 phylink_get_fixed_state(pl, &link_state); 2320 phylink_get_ksettings(&link_state, kset); 2321 break; 2322 2323 case MLO_AN_INBAND: 2324 /* If there is a phy attached, then use the reported 2325 * settings from the phy with no modification. 2326 */ 2327 if (pl->phydev) 2328 break; 2329 2330 phylink_mac_pcs_get_state(pl, &link_state); 2331 2332 /* The MAC is reporting the link results from its own PCS 2333 * layer via in-band status. Report these as the current 2334 * link settings. 2335 */ 2336 phylink_get_ksettings(&link_state, kset); 2337 break; 2338 } 2339 2340 return 0; 2341 } 2342 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2343 2344 /** 2345 * phylink_ethtool_ksettings_set() - set the link settings 2346 * @pl: a pointer to a &struct phylink returned from phylink_create() 2347 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2348 */ 2349 int phylink_ethtool_ksettings_set(struct phylink *pl, 2350 const struct ethtool_link_ksettings *kset) 2351 { 2352 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2353 struct phylink_link_state config; 2354 const struct phy_setting *s; 2355 2356 ASSERT_RTNL(); 2357 2358 if (pl->phydev) { 2359 struct ethtool_link_ksettings phy_kset = *kset; 2360 2361 linkmode_and(phy_kset.link_modes.advertising, 2362 phy_kset.link_modes.advertising, 2363 pl->supported); 2364 2365 /* We can rely on phylib for this update; we also do not need 2366 * to update the pl->link_config settings: 2367 * - the configuration returned via ksettings_get() will come 2368 * from phylib whenever a PHY is present. 2369 * - link_config.interface will be updated by the PHY calling 2370 * back via phylink_phy_change() and a subsequent resolve. 2371 * - initial link configuration for PHY mode comes from the 2372 * last phy state updated via phylink_phy_change(). 2373 * - other configuration changes (e.g. pause modes) are 2374 * performed directly via phylib. 2375 * - if in in-band mode with a PHY, the link configuration 2376 * is passed on the link from the PHY, and all of 2377 * link_config.{speed,duplex,an_enabled,pause} are not used. 2378 * - the only possible use would be link_config.advertising 2379 * pause modes when in 1000base-X mode with a PHY, but in 2380 * the presence of a PHY, this should not be changed as that 2381 * should be determined from the media side advertisement. 2382 */ 2383 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 2384 } 2385 2386 config = pl->link_config; 2387 /* Mask out unsupported advertisements */ 2388 linkmode_and(config.advertising, kset->link_modes.advertising, 2389 pl->supported); 2390 2391 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 2392 switch (kset->base.autoneg) { 2393 case AUTONEG_DISABLE: 2394 /* Autonegotiation disabled, select a suitable speed and 2395 * duplex. 2396 */ 2397 s = phy_lookup_setting(kset->base.speed, kset->base.duplex, 2398 pl->supported, false); 2399 if (!s) 2400 return -EINVAL; 2401 2402 /* If we have a fixed link, refuse to change link parameters. 2403 * If the link parameters match, accept them but do nothing. 2404 */ 2405 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2406 if (s->speed != pl->link_config.speed || 2407 s->duplex != pl->link_config.duplex) 2408 return -EINVAL; 2409 return 0; 2410 } 2411 2412 config.speed = s->speed; 2413 config.duplex = s->duplex; 2414 break; 2415 2416 case AUTONEG_ENABLE: 2417 /* If we have a fixed link, allow autonegotiation (since that 2418 * is our default case) but do not allow the advertisement to 2419 * be changed. If the advertisement matches, simply return. 2420 */ 2421 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2422 if (!linkmode_equal(config.advertising, 2423 pl->link_config.advertising)) 2424 return -EINVAL; 2425 return 0; 2426 } 2427 2428 config.speed = SPEED_UNKNOWN; 2429 config.duplex = DUPLEX_UNKNOWN; 2430 break; 2431 2432 default: 2433 return -EINVAL; 2434 } 2435 2436 /* We have ruled out the case with a PHY attached, and the 2437 * fixed-link cases. All that is left are in-band links. 2438 */ 2439 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2440 kset->base.autoneg == AUTONEG_ENABLE); 2441 2442 /* If this link is with an SFP, ensure that changes to advertised modes 2443 * also cause the associated interface to be selected such that the 2444 * link can be configured correctly. 2445 */ 2446 if (pl->sfp_bus) { 2447 config.interface = sfp_select_interface(pl->sfp_bus, 2448 config.advertising); 2449 if (config.interface == PHY_INTERFACE_MODE_NA) { 2450 phylink_err(pl, 2451 "selection of interface failed, advertisement %*pb\n", 2452 __ETHTOOL_LINK_MODE_MASK_NBITS, 2453 config.advertising); 2454 return -EINVAL; 2455 } 2456 2457 /* Revalidate with the selected interface */ 2458 linkmode_copy(support, pl->supported); 2459 if (phylink_validate(pl, support, &config)) { 2460 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2461 phylink_an_mode_str(pl->cur_link_an_mode), 2462 phy_modes(config.interface), 2463 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2464 return -EINVAL; 2465 } 2466 } else { 2467 /* Validate without changing the current supported mask. */ 2468 linkmode_copy(support, pl->supported); 2469 if (phylink_validate(pl, support, &config)) 2470 return -EINVAL; 2471 } 2472 2473 /* If autonegotiation is enabled, we must have an advertisement */ 2474 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2475 config.advertising) && 2476 phylink_is_empty_linkmode(config.advertising)) 2477 return -EINVAL; 2478 2479 mutex_lock(&pl->state_mutex); 2480 pl->link_config.speed = config.speed; 2481 pl->link_config.duplex = config.duplex; 2482 2483 if (pl->link_config.interface != config.interface) { 2484 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2485 /* We need to force the link down, then change the interface */ 2486 if (pl->old_link_state) { 2487 phylink_link_down(pl); 2488 pl->old_link_state = false; 2489 } 2490 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2491 &pl->phylink_disable_state)) 2492 phylink_major_config(pl, false, &config); 2493 pl->link_config.interface = config.interface; 2494 linkmode_copy(pl->link_config.advertising, config.advertising); 2495 } else if (!linkmode_equal(pl->link_config.advertising, 2496 config.advertising)) { 2497 linkmode_copy(pl->link_config.advertising, config.advertising); 2498 phylink_change_inband_advert(pl); 2499 } 2500 mutex_unlock(&pl->state_mutex); 2501 2502 return 0; 2503 } 2504 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 2505 2506 /** 2507 * phylink_ethtool_nway_reset() - restart negotiation 2508 * @pl: a pointer to a &struct phylink returned from phylink_create() 2509 * 2510 * Restart negotiation for the phylink instance specified by @pl. This will 2511 * cause any attached phy to restart negotiation with the link partner, and 2512 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 2513 * negotiation. 2514 * 2515 * Returns zero on success, or negative error code. 2516 */ 2517 int phylink_ethtool_nway_reset(struct phylink *pl) 2518 { 2519 int ret = 0; 2520 2521 ASSERT_RTNL(); 2522 2523 if (pl->phydev) 2524 ret = phy_restart_aneg(pl->phydev); 2525 phylink_pcs_an_restart(pl); 2526 2527 return ret; 2528 } 2529 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 2530 2531 /** 2532 * phylink_ethtool_get_pauseparam() - get the current pause parameters 2533 * @pl: a pointer to a &struct phylink returned from phylink_create() 2534 * @pause: a pointer to a &struct ethtool_pauseparam 2535 */ 2536 void phylink_ethtool_get_pauseparam(struct phylink *pl, 2537 struct ethtool_pauseparam *pause) 2538 { 2539 ASSERT_RTNL(); 2540 2541 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 2542 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 2543 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 2544 } 2545 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 2546 2547 /** 2548 * phylink_ethtool_set_pauseparam() - set the current pause parameters 2549 * @pl: a pointer to a &struct phylink returned from phylink_create() 2550 * @pause: a pointer to a &struct ethtool_pauseparam 2551 */ 2552 int phylink_ethtool_set_pauseparam(struct phylink *pl, 2553 struct ethtool_pauseparam *pause) 2554 { 2555 struct phylink_link_state *config = &pl->link_config; 2556 bool manual_changed; 2557 int pause_state; 2558 2559 ASSERT_RTNL(); 2560 2561 if (pl->cur_link_an_mode == MLO_AN_FIXED) 2562 return -EOPNOTSUPP; 2563 2564 if (!phylink_test(pl->supported, Pause) && 2565 !phylink_test(pl->supported, Asym_Pause)) 2566 return -EOPNOTSUPP; 2567 2568 if (!phylink_test(pl->supported, Asym_Pause) && 2569 pause->rx_pause != pause->tx_pause) 2570 return -EINVAL; 2571 2572 pause_state = 0; 2573 if (pause->autoneg) 2574 pause_state |= MLO_PAUSE_AN; 2575 if (pause->rx_pause) 2576 pause_state |= MLO_PAUSE_RX; 2577 if (pause->tx_pause) 2578 pause_state |= MLO_PAUSE_TX; 2579 2580 mutex_lock(&pl->state_mutex); 2581 /* 2582 * See the comments for linkmode_set_pause(), wrt the deficiencies 2583 * with the current implementation. A solution to this issue would 2584 * be: 2585 * ethtool Local device 2586 * rx tx Pause AsymDir 2587 * 0 0 0 0 2588 * 1 0 1 1 2589 * 0 1 0 1 2590 * 1 1 1 1 2591 * and then use the ethtool rx/tx enablement status to mask the 2592 * rx/tx pause resolution. 2593 */ 2594 linkmode_set_pause(config->advertising, pause->tx_pause, 2595 pause->rx_pause); 2596 2597 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 2598 (!(pause_state & MLO_PAUSE_AN) && 2599 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 2600 2601 config->pause = pause_state; 2602 2603 /* Update our in-band advertisement, triggering a renegotiation if 2604 * the advertisement changed. 2605 */ 2606 if (!pl->phydev) 2607 phylink_change_inband_advert(pl); 2608 2609 mutex_unlock(&pl->state_mutex); 2610 2611 /* If we have a PHY, a change of the pause frame advertisement will 2612 * cause phylib to renegotiate (if AN is enabled) which will in turn 2613 * call our phylink_phy_change() and trigger a resolve. Note that 2614 * we can't hold our state mutex while calling phy_set_asym_pause(). 2615 */ 2616 if (pl->phydev) 2617 phy_set_asym_pause(pl->phydev, pause->rx_pause, 2618 pause->tx_pause); 2619 2620 /* If the manual pause settings changed, make sure we trigger a 2621 * resolve to update their state; we can not guarantee that the 2622 * link will cycle. 2623 */ 2624 if (manual_changed) { 2625 pl->mac_link_dropped = true; 2626 phylink_run_resolve(pl); 2627 } 2628 2629 return 0; 2630 } 2631 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 2632 2633 /** 2634 * phylink_get_eee_err() - read the energy efficient ethernet error 2635 * counter 2636 * @pl: a pointer to a &struct phylink returned from phylink_create(). 2637 * 2638 * Read the Energy Efficient Ethernet error counter from the PHY associated 2639 * with the phylink instance specified by @pl. 2640 * 2641 * Returns positive error counter value, or negative error code. 2642 */ 2643 int phylink_get_eee_err(struct phylink *pl) 2644 { 2645 int ret = 0; 2646 2647 ASSERT_RTNL(); 2648 2649 if (pl->phydev) 2650 ret = phy_get_eee_err(pl->phydev); 2651 2652 return ret; 2653 } 2654 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 2655 2656 /** 2657 * phylink_init_eee() - init and check the EEE features 2658 * @pl: a pointer to a &struct phylink returned from phylink_create() 2659 * @clk_stop_enable: allow PHY to stop receive clock 2660 * 2661 * Must be called either with RTNL held or within mac_link_up() 2662 */ 2663 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) 2664 { 2665 int ret = -EOPNOTSUPP; 2666 2667 if (pl->phydev) 2668 ret = phy_init_eee(pl->phydev, clk_stop_enable); 2669 2670 return ret; 2671 } 2672 EXPORT_SYMBOL_GPL(phylink_init_eee); 2673 2674 /** 2675 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 2676 * @pl: a pointer to a &struct phylink returned from phylink_create() 2677 * @eee: a pointer to a &struct ethtool_eee for the read parameters 2678 */ 2679 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee) 2680 { 2681 int ret = -EOPNOTSUPP; 2682 2683 ASSERT_RTNL(); 2684 2685 if (pl->phydev) 2686 ret = phy_ethtool_get_eee(pl->phydev, eee); 2687 2688 return ret; 2689 } 2690 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 2691 2692 /** 2693 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 2694 * @pl: a pointer to a &struct phylink returned from phylink_create() 2695 * @eee: a pointer to a &struct ethtool_eee for the desired parameters 2696 */ 2697 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee) 2698 { 2699 int ret = -EOPNOTSUPP; 2700 2701 ASSERT_RTNL(); 2702 2703 if (pl->phydev) 2704 ret = phy_ethtool_set_eee(pl->phydev, eee); 2705 2706 return ret; 2707 } 2708 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 2709 2710 /* This emulates MII registers for a fixed-mode phy operating as per the 2711 * passed in state. "aneg" defines if we report negotiation is possible. 2712 * 2713 * FIXME: should deal with negotiation state too. 2714 */ 2715 static int phylink_mii_emul_read(unsigned int reg, 2716 struct phylink_link_state *state) 2717 { 2718 struct fixed_phy_status fs; 2719 unsigned long *lpa = state->lp_advertising; 2720 int val; 2721 2722 fs.link = state->link; 2723 fs.speed = state->speed; 2724 fs.duplex = state->duplex; 2725 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 2726 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 2727 2728 val = swphy_read_reg(reg, &fs); 2729 if (reg == MII_BMSR) { 2730 if (!state->an_complete) 2731 val &= ~BMSR_ANEGCOMPLETE; 2732 } 2733 return val; 2734 } 2735 2736 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 2737 unsigned int reg) 2738 { 2739 struct phy_device *phydev = pl->phydev; 2740 int prtad, devad; 2741 2742 if (mdio_phy_id_is_c45(phy_id)) { 2743 prtad = mdio_phy_id_prtad(phy_id); 2744 devad = mdio_phy_id_devad(phy_id); 2745 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2746 reg); 2747 } 2748 2749 if (phydev->is_c45) { 2750 switch (reg) { 2751 case MII_BMCR: 2752 case MII_BMSR: 2753 case MII_PHYSID1: 2754 case MII_PHYSID2: 2755 devad = __ffs(phydev->c45_ids.mmds_present); 2756 break; 2757 case MII_ADVERTISE: 2758 case MII_LPA: 2759 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2760 return -EINVAL; 2761 devad = MDIO_MMD_AN; 2762 if (reg == MII_ADVERTISE) 2763 reg = MDIO_AN_ADVERTISE; 2764 else 2765 reg = MDIO_AN_LPA; 2766 break; 2767 default: 2768 return -EINVAL; 2769 } 2770 prtad = phy_id; 2771 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2772 reg); 2773 } 2774 2775 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 2776 } 2777 2778 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 2779 unsigned int reg, unsigned int val) 2780 { 2781 struct phy_device *phydev = pl->phydev; 2782 int prtad, devad; 2783 2784 if (mdio_phy_id_is_c45(phy_id)) { 2785 prtad = mdio_phy_id_prtad(phy_id); 2786 devad = mdio_phy_id_devad(phy_id); 2787 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 2788 reg, val); 2789 } 2790 2791 if (phydev->is_c45) { 2792 switch (reg) { 2793 case MII_BMCR: 2794 case MII_BMSR: 2795 case MII_PHYSID1: 2796 case MII_PHYSID2: 2797 devad = __ffs(phydev->c45_ids.mmds_present); 2798 break; 2799 case MII_ADVERTISE: 2800 case MII_LPA: 2801 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2802 return -EINVAL; 2803 devad = MDIO_MMD_AN; 2804 if (reg == MII_ADVERTISE) 2805 reg = MDIO_AN_ADVERTISE; 2806 else 2807 reg = MDIO_AN_LPA; 2808 break; 2809 default: 2810 return -EINVAL; 2811 } 2812 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 2813 reg, val); 2814 } 2815 2816 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 2817 } 2818 2819 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 2820 unsigned int reg) 2821 { 2822 struct phylink_link_state state; 2823 int val = 0xffff; 2824 2825 switch (pl->cur_link_an_mode) { 2826 case MLO_AN_FIXED: 2827 if (phy_id == 0) { 2828 phylink_get_fixed_state(pl, &state); 2829 val = phylink_mii_emul_read(reg, &state); 2830 } 2831 break; 2832 2833 case MLO_AN_PHY: 2834 return -EOPNOTSUPP; 2835 2836 case MLO_AN_INBAND: 2837 if (phy_id == 0) { 2838 phylink_mac_pcs_get_state(pl, &state); 2839 val = phylink_mii_emul_read(reg, &state); 2840 } 2841 break; 2842 } 2843 2844 return val & 0xffff; 2845 } 2846 2847 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 2848 unsigned int reg, unsigned int val) 2849 { 2850 switch (pl->cur_link_an_mode) { 2851 case MLO_AN_FIXED: 2852 break; 2853 2854 case MLO_AN_PHY: 2855 return -EOPNOTSUPP; 2856 2857 case MLO_AN_INBAND: 2858 break; 2859 } 2860 2861 return 0; 2862 } 2863 2864 /** 2865 * phylink_mii_ioctl() - generic mii ioctl interface 2866 * @pl: a pointer to a &struct phylink returned from phylink_create() 2867 * @ifr: a pointer to a &struct ifreq for socket ioctls 2868 * @cmd: ioctl cmd to execute 2869 * 2870 * Perform the specified MII ioctl on the PHY attached to the phylink instance 2871 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 2872 * 2873 * Returns: zero on success or negative error code. 2874 * 2875 * %SIOCGMIIPHY: 2876 * read register from the current PHY. 2877 * %SIOCGMIIREG: 2878 * read register from the specified PHY. 2879 * %SIOCSMIIREG: 2880 * set a register on the specified PHY. 2881 */ 2882 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 2883 { 2884 struct mii_ioctl_data *mii = if_mii(ifr); 2885 int ret; 2886 2887 ASSERT_RTNL(); 2888 2889 if (pl->phydev) { 2890 /* PHYs only exist for MLO_AN_PHY and SGMII */ 2891 switch (cmd) { 2892 case SIOCGMIIPHY: 2893 mii->phy_id = pl->phydev->mdio.addr; 2894 fallthrough; 2895 2896 case SIOCGMIIREG: 2897 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 2898 if (ret >= 0) { 2899 mii->val_out = ret; 2900 ret = 0; 2901 } 2902 break; 2903 2904 case SIOCSMIIREG: 2905 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 2906 mii->val_in); 2907 break; 2908 2909 default: 2910 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 2911 break; 2912 } 2913 } else { 2914 switch (cmd) { 2915 case SIOCGMIIPHY: 2916 mii->phy_id = 0; 2917 fallthrough; 2918 2919 case SIOCGMIIREG: 2920 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 2921 if (ret >= 0) { 2922 mii->val_out = ret; 2923 ret = 0; 2924 } 2925 break; 2926 2927 case SIOCSMIIREG: 2928 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 2929 mii->val_in); 2930 break; 2931 2932 default: 2933 ret = -EOPNOTSUPP; 2934 break; 2935 } 2936 } 2937 2938 return ret; 2939 } 2940 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 2941 2942 /** 2943 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 2944 * link partners 2945 * @pl: a pointer to a &struct phylink returned from phylink_create() 2946 * @sync: perform action synchronously 2947 * 2948 * If we have a PHY that is not part of a SFP module, then set the speed 2949 * as described in the phy_speed_down() function. Please see this function 2950 * for a description of the @sync parameter. 2951 * 2952 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 2953 */ 2954 int phylink_speed_down(struct phylink *pl, bool sync) 2955 { 2956 int ret = 0; 2957 2958 ASSERT_RTNL(); 2959 2960 if (!pl->sfp_bus && pl->phydev) 2961 ret = phy_speed_down(pl->phydev, sync); 2962 2963 return ret; 2964 } 2965 EXPORT_SYMBOL_GPL(phylink_speed_down); 2966 2967 /** 2968 * phylink_speed_up() - restore the advertised speeds prior to the call to 2969 * phylink_speed_down() 2970 * @pl: a pointer to a &struct phylink returned from phylink_create() 2971 * 2972 * If we have a PHY that is not part of a SFP module, then restore the 2973 * PHY speeds as per phy_speed_up(). 2974 * 2975 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 2976 */ 2977 int phylink_speed_up(struct phylink *pl) 2978 { 2979 int ret = 0; 2980 2981 ASSERT_RTNL(); 2982 2983 if (!pl->sfp_bus && pl->phydev) 2984 ret = phy_speed_up(pl->phydev); 2985 2986 return ret; 2987 } 2988 EXPORT_SYMBOL_GPL(phylink_speed_up); 2989 2990 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 2991 { 2992 struct phylink *pl = upstream; 2993 2994 pl->netdev->sfp_bus = bus; 2995 } 2996 2997 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 2998 { 2999 struct phylink *pl = upstream; 3000 3001 pl->netdev->sfp_bus = NULL; 3002 } 3003 3004 static const phy_interface_t phylink_sfp_interface_preference[] = { 3005 PHY_INTERFACE_MODE_25GBASER, 3006 PHY_INTERFACE_MODE_USXGMII, 3007 PHY_INTERFACE_MODE_10GBASER, 3008 PHY_INTERFACE_MODE_5GBASER, 3009 PHY_INTERFACE_MODE_2500BASEX, 3010 PHY_INTERFACE_MODE_SGMII, 3011 PHY_INTERFACE_MODE_1000BASEX, 3012 PHY_INTERFACE_MODE_100BASEX, 3013 }; 3014 3015 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 3016 3017 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3018 const unsigned long *intf) 3019 { 3020 phy_interface_t interface; 3021 size_t i; 3022 3023 interface = PHY_INTERFACE_MODE_NA; 3024 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3025 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3026 interface = phylink_sfp_interface_preference[i]; 3027 break; 3028 } 3029 3030 return interface; 3031 } 3032 3033 static void phylink_sfp_set_config(struct phylink *pl, u8 mode, 3034 unsigned long *supported, 3035 struct phylink_link_state *state) 3036 { 3037 bool changed = false; 3038 3039 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3040 phylink_an_mode_str(mode), phy_modes(state->interface), 3041 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3042 3043 if (!linkmode_equal(pl->supported, supported)) { 3044 linkmode_copy(pl->supported, supported); 3045 changed = true; 3046 } 3047 3048 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3049 linkmode_copy(pl->link_config.advertising, state->advertising); 3050 changed = true; 3051 } 3052 3053 if (pl->cur_link_an_mode != mode || 3054 pl->link_config.interface != state->interface) { 3055 pl->cur_link_an_mode = mode; 3056 pl->link_config.interface = state->interface; 3057 3058 changed = true; 3059 3060 phylink_info(pl, "switched to %s/%s link mode\n", 3061 phylink_an_mode_str(mode), 3062 phy_modes(state->interface)); 3063 } 3064 3065 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3066 &pl->phylink_disable_state)) 3067 phylink_mac_initial_config(pl, false); 3068 } 3069 3070 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode, 3071 struct phy_device *phy) 3072 { 3073 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1); 3074 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3075 struct phylink_link_state config; 3076 phy_interface_t iface; 3077 int ret; 3078 3079 linkmode_copy(support, phy->supported); 3080 3081 memset(&config, 0, sizeof(config)); 3082 linkmode_copy(config.advertising, phy->advertising); 3083 config.interface = PHY_INTERFACE_MODE_NA; 3084 config.speed = SPEED_UNKNOWN; 3085 config.duplex = DUPLEX_UNKNOWN; 3086 config.pause = MLO_PAUSE_AN; 3087 3088 /* Ignore errors if we're expecting a PHY to attach later */ 3089 ret = phylink_validate(pl, support, &config); 3090 if (ret) { 3091 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3092 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3093 ERR_PTR(ret)); 3094 return ret; 3095 } 3096 3097 iface = sfp_select_interface(pl->sfp_bus, config.advertising); 3098 if (iface == PHY_INTERFACE_MODE_NA) { 3099 phylink_err(pl, 3100 "selection of interface failed, advertisement %*pb\n", 3101 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising); 3102 return -EINVAL; 3103 } 3104 3105 config.interface = iface; 3106 linkmode_copy(support1, support); 3107 ret = phylink_validate(pl, support1, &config); 3108 if (ret) { 3109 phylink_err(pl, 3110 "validation of %s/%s with support %*pb failed: %pe\n", 3111 phylink_an_mode_str(mode), 3112 phy_modes(config.interface), 3113 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3114 ERR_PTR(ret)); 3115 return ret; 3116 } 3117 3118 pl->link_port = pl->sfp_port; 3119 3120 phylink_sfp_set_config(pl, mode, support, &config); 3121 3122 return 0; 3123 } 3124 3125 static int phylink_sfp_config_optical(struct phylink *pl) 3126 { 3127 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3128 DECLARE_PHY_INTERFACE_MASK(interfaces); 3129 struct phylink_link_state config; 3130 phy_interface_t interface; 3131 int ret; 3132 3133 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3134 (int)PHY_INTERFACE_MODE_MAX, 3135 pl->config->supported_interfaces, 3136 (int)PHY_INTERFACE_MODE_MAX, 3137 pl->sfp_interfaces); 3138 3139 /* Find the union of the supported interfaces by the PCS/MAC and 3140 * the SFP module. 3141 */ 3142 phy_interface_and(interfaces, pl->config->supported_interfaces, 3143 pl->sfp_interfaces); 3144 if (phy_interface_empty(interfaces)) { 3145 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3146 return -EINVAL; 3147 } 3148 3149 memset(&config, 0, sizeof(config)); 3150 linkmode_copy(support, pl->sfp_support); 3151 linkmode_copy(config.advertising, pl->sfp_support); 3152 config.speed = SPEED_UNKNOWN; 3153 config.duplex = DUPLEX_UNKNOWN; 3154 config.pause = MLO_PAUSE_AN; 3155 3156 /* For all the interfaces that are supported, reduce the sfp_support 3157 * mask to only those link modes that can be supported. 3158 */ 3159 ret = phylink_validate_mask(pl, pl->sfp_support, &config, interfaces); 3160 if (ret) { 3161 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3162 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3163 return ret; 3164 } 3165 3166 interface = phylink_choose_sfp_interface(pl, interfaces); 3167 if (interface == PHY_INTERFACE_MODE_NA) { 3168 phylink_err(pl, "failed to select SFP interface\n"); 3169 return -EINVAL; 3170 } 3171 3172 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3173 phy_modes(interface)); 3174 3175 config.interface = interface; 3176 3177 /* Ignore errors if we're expecting a PHY to attach later */ 3178 ret = phylink_validate(pl, support, &config); 3179 if (ret) { 3180 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3181 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3182 ERR_PTR(ret)); 3183 return ret; 3184 } 3185 3186 pl->link_port = pl->sfp_port; 3187 3188 phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config); 3189 3190 return 0; 3191 } 3192 3193 static int phylink_sfp_module_insert(void *upstream, 3194 const struct sfp_eeprom_id *id) 3195 { 3196 struct phylink *pl = upstream; 3197 3198 ASSERT_RTNL(); 3199 3200 linkmode_zero(pl->sfp_support); 3201 phy_interface_zero(pl->sfp_interfaces); 3202 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces); 3203 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support); 3204 3205 /* If this module may have a PHY connecting later, defer until later */ 3206 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 3207 if (pl->sfp_may_have_phy) 3208 return 0; 3209 3210 return phylink_sfp_config_optical(pl); 3211 } 3212 3213 static int phylink_sfp_module_start(void *upstream) 3214 { 3215 struct phylink *pl = upstream; 3216 3217 /* If this SFP module has a PHY, start the PHY now. */ 3218 if (pl->phydev) { 3219 phy_start(pl->phydev); 3220 return 0; 3221 } 3222 3223 /* If the module may have a PHY but we didn't detect one we 3224 * need to configure the MAC here. 3225 */ 3226 if (!pl->sfp_may_have_phy) 3227 return 0; 3228 3229 return phylink_sfp_config_optical(pl); 3230 } 3231 3232 static void phylink_sfp_module_stop(void *upstream) 3233 { 3234 struct phylink *pl = upstream; 3235 3236 /* If this SFP module has a PHY, stop it. */ 3237 if (pl->phydev) 3238 phy_stop(pl->phydev); 3239 } 3240 3241 static void phylink_sfp_link_down(void *upstream) 3242 { 3243 struct phylink *pl = upstream; 3244 3245 ASSERT_RTNL(); 3246 3247 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3248 } 3249 3250 static void phylink_sfp_link_up(void *upstream) 3251 { 3252 struct phylink *pl = upstream; 3253 3254 ASSERT_RTNL(); 3255 3256 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3257 } 3258 3259 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII 3260 * or 802.3z control word, so inband will not work. 3261 */ 3262 static bool phylink_phy_no_inband(struct phy_device *phy) 3263 { 3264 return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1], 3265 0xae025150, 0xfffffff0); 3266 } 3267 3268 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3269 { 3270 struct phylink *pl = upstream; 3271 phy_interface_t interface; 3272 u8 mode; 3273 int ret; 3274 3275 /* 3276 * This is the new way of dealing with flow control for PHYs, 3277 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3278 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3279 * using our validate call to the MAC, we rely upon the MAC 3280 * clearing the bits from both supported and advertising fields. 3281 */ 3282 phy_support_asym_pause(phy); 3283 3284 if (phylink_phy_no_inband(phy)) 3285 mode = MLO_AN_PHY; 3286 else 3287 mode = MLO_AN_INBAND; 3288 3289 /* Set the PHY's host supported interfaces */ 3290 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3291 pl->config->supported_interfaces); 3292 3293 /* Do the initial configuration */ 3294 ret = phylink_sfp_config_phy(pl, mode, phy); 3295 if (ret < 0) 3296 return ret; 3297 3298 interface = pl->link_config.interface; 3299 ret = phylink_attach_phy(pl, phy, interface); 3300 if (ret < 0) 3301 return ret; 3302 3303 ret = phylink_bringup_phy(pl, phy, interface); 3304 if (ret) 3305 phy_detach(phy); 3306 3307 return ret; 3308 } 3309 3310 static void phylink_sfp_disconnect_phy(void *upstream) 3311 { 3312 phylink_disconnect_phy(upstream); 3313 } 3314 3315 static const struct sfp_upstream_ops sfp_phylink_ops = { 3316 .attach = phylink_sfp_attach, 3317 .detach = phylink_sfp_detach, 3318 .module_insert = phylink_sfp_module_insert, 3319 .module_start = phylink_sfp_module_start, 3320 .module_stop = phylink_sfp_module_stop, 3321 .link_up = phylink_sfp_link_up, 3322 .link_down = phylink_sfp_link_down, 3323 .connect_phy = phylink_sfp_connect_phy, 3324 .disconnect_phy = phylink_sfp_disconnect_phy, 3325 }; 3326 3327 /* Helpers for MAC drivers */ 3328 3329 static struct { 3330 int bit; 3331 int speed; 3332 } phylink_c73_priority_resolution[] = { 3333 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 3334 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 3335 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 3336 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 3337 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 3338 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 3339 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 3340 /* 5GBASE-KR not supported */ 3341 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 3342 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 3343 }; 3344 3345 void phylink_resolve_c73(struct phylink_link_state *state) 3346 { 3347 int i; 3348 3349 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 3350 int bit = phylink_c73_priority_resolution[i].bit; 3351 if (linkmode_test_bit(bit, state->advertising) && 3352 linkmode_test_bit(bit, state->lp_advertising)) 3353 break; 3354 } 3355 3356 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 3357 state->speed = phylink_c73_priority_resolution[i].speed; 3358 state->duplex = DUPLEX_FULL; 3359 } else { 3360 /* negotiation failure */ 3361 state->link = false; 3362 } 3363 3364 phylink_resolve_an_pause(state); 3365 } 3366 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 3367 3368 static void phylink_decode_c37_word(struct phylink_link_state *state, 3369 uint16_t config_reg, int speed) 3370 { 3371 int fd_bit; 3372 3373 if (speed == SPEED_2500) 3374 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 3375 else 3376 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 3377 3378 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 3379 3380 if (linkmode_test_bit(fd_bit, state->advertising) && 3381 linkmode_test_bit(fd_bit, state->lp_advertising)) { 3382 state->speed = speed; 3383 state->duplex = DUPLEX_FULL; 3384 } else { 3385 /* negotiation failure */ 3386 state->link = false; 3387 } 3388 3389 phylink_resolve_an_pause(state); 3390 } 3391 3392 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 3393 uint16_t config_reg) 3394 { 3395 if (!(config_reg & LPA_SGMII_LINK)) { 3396 state->link = false; 3397 return; 3398 } 3399 3400 switch (config_reg & LPA_SGMII_SPD_MASK) { 3401 case LPA_SGMII_10: 3402 state->speed = SPEED_10; 3403 break; 3404 case LPA_SGMII_100: 3405 state->speed = SPEED_100; 3406 break; 3407 case LPA_SGMII_1000: 3408 state->speed = SPEED_1000; 3409 break; 3410 default: 3411 state->link = false; 3412 return; 3413 } 3414 if (config_reg & LPA_SGMII_FULL_DUPLEX) 3415 state->duplex = DUPLEX_FULL; 3416 else 3417 state->duplex = DUPLEX_HALF; 3418 } 3419 3420 /** 3421 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3422 * @state: a pointer to a struct phylink_link_state. 3423 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3424 * 3425 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3426 * code word. Decode the USXGMII code word and populate the corresponding fields 3427 * (speed, duplex) into the phylink_link_state structure. 3428 */ 3429 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 3430 uint16_t lpa) 3431 { 3432 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3433 case MDIO_USXGMII_10: 3434 state->speed = SPEED_10; 3435 break; 3436 case MDIO_USXGMII_100: 3437 state->speed = SPEED_100; 3438 break; 3439 case MDIO_USXGMII_1000: 3440 state->speed = SPEED_1000; 3441 break; 3442 case MDIO_USXGMII_2500: 3443 state->speed = SPEED_2500; 3444 break; 3445 case MDIO_USXGMII_5000: 3446 state->speed = SPEED_5000; 3447 break; 3448 case MDIO_USXGMII_10G: 3449 state->speed = SPEED_10000; 3450 break; 3451 default: 3452 state->link = false; 3453 return; 3454 } 3455 3456 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3457 state->duplex = DUPLEX_FULL; 3458 else 3459 state->duplex = DUPLEX_HALF; 3460 } 3461 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 3462 3463 /** 3464 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 3465 * @state: a pointer to a struct phylink_link_state. 3466 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 3467 * 3468 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 3469 * code word. Decode the USGMII code word and populate the corresponding fields 3470 * (speed, duplex) into the phylink_link_state structure. The structure for this 3471 * word is the same as the USXGMII word, except it only supports speeds up to 3472 * 1Gbps. 3473 */ 3474 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 3475 uint16_t lpa) 3476 { 3477 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3478 case MDIO_USXGMII_10: 3479 state->speed = SPEED_10; 3480 break; 3481 case MDIO_USXGMII_100: 3482 state->speed = SPEED_100; 3483 break; 3484 case MDIO_USXGMII_1000: 3485 state->speed = SPEED_1000; 3486 break; 3487 default: 3488 state->link = false; 3489 return; 3490 } 3491 3492 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3493 state->duplex = DUPLEX_FULL; 3494 else 3495 state->duplex = DUPLEX_HALF; 3496 } 3497 3498 /** 3499 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 3500 * @state: a pointer to a &struct phylink_link_state. 3501 * @bmsr: The value of the %MII_BMSR register 3502 * @lpa: The value of the %MII_LPA register 3503 * 3504 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3505 * clause 37 negotiation and/or SGMII control. 3506 * 3507 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 3508 * the phylink @state structure. This is suitable to be used for implementing 3509 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 3510 * accessing @bmsr and @lpa cannot be done with MDIO directly. 3511 */ 3512 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 3513 u16 bmsr, u16 lpa) 3514 { 3515 state->link = !!(bmsr & BMSR_LSTATUS); 3516 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 3517 /* If there is no link or autonegotiation is disabled, the LP advertisement 3518 * data is not meaningful, so don't go any further. 3519 */ 3520 if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3521 state->advertising)) 3522 return; 3523 3524 switch (state->interface) { 3525 case PHY_INTERFACE_MODE_1000BASEX: 3526 phylink_decode_c37_word(state, lpa, SPEED_1000); 3527 break; 3528 3529 case PHY_INTERFACE_MODE_2500BASEX: 3530 phylink_decode_c37_word(state, lpa, SPEED_2500); 3531 break; 3532 3533 case PHY_INTERFACE_MODE_SGMII: 3534 case PHY_INTERFACE_MODE_QSGMII: 3535 phylink_decode_sgmii_word(state, lpa); 3536 break; 3537 case PHY_INTERFACE_MODE_QUSGMII: 3538 phylink_decode_usgmii_word(state, lpa); 3539 break; 3540 3541 default: 3542 state->link = false; 3543 break; 3544 } 3545 } 3546 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 3547 3548 /** 3549 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 3550 * @pcs: a pointer to a &struct mdio_device. 3551 * @state: a pointer to a &struct phylink_link_state. 3552 * 3553 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3554 * clause 37 negotiation and/or SGMII control. 3555 * 3556 * Read the MAC PCS state from the MII device configured in @config and 3557 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 3558 * the phylink @state structure. This is suitable to be directly plugged 3559 * into the pcs_get_state() member of the struct phylink_pcs_ops 3560 * structure. 3561 */ 3562 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 3563 struct phylink_link_state *state) 3564 { 3565 int bmsr, lpa; 3566 3567 bmsr = mdiodev_read(pcs, MII_BMSR); 3568 lpa = mdiodev_read(pcs, MII_LPA); 3569 if (bmsr < 0 || lpa < 0) { 3570 state->link = false; 3571 return; 3572 } 3573 3574 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa); 3575 } 3576 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 3577 3578 /** 3579 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 3580 * advertisement 3581 * @interface: the PHY interface mode being configured 3582 * @advertising: the ethtool advertisement mask 3583 * 3584 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3585 * clause 37 negotiation and/or SGMII control. 3586 * 3587 * Encode the clause 37 PCS advertisement as specified by @interface and 3588 * @advertising. 3589 * 3590 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 3591 */ 3592 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 3593 const unsigned long *advertising) 3594 { 3595 u16 adv; 3596 3597 switch (interface) { 3598 case PHY_INTERFACE_MODE_1000BASEX: 3599 case PHY_INTERFACE_MODE_2500BASEX: 3600 adv = ADVERTISE_1000XFULL; 3601 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 3602 advertising)) 3603 adv |= ADVERTISE_1000XPAUSE; 3604 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 3605 advertising)) 3606 adv |= ADVERTISE_1000XPSE_ASYM; 3607 return adv; 3608 case PHY_INTERFACE_MODE_SGMII: 3609 case PHY_INTERFACE_MODE_QSGMII: 3610 return 0x0001; 3611 default: 3612 /* Nothing to do for other modes */ 3613 return -EINVAL; 3614 } 3615 } 3616 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 3617 3618 /** 3619 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 3620 * @pcs: a pointer to a &struct mdio_device. 3621 * @interface: the PHY interface mode being configured 3622 * @advertising: the ethtool advertisement mask 3623 * @neg_mode: PCS negotiation mode 3624 * 3625 * Configure a Clause 22 PCS PHY with the appropriate negotiation 3626 * parameters for the @mode, @interface and @advertising parameters. 3627 * Returns negative error number on failure, zero if the advertisement 3628 * has not changed, or positive if there is a change. 3629 */ 3630 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 3631 phy_interface_t interface, 3632 const unsigned long *advertising, 3633 unsigned int neg_mode) 3634 { 3635 bool changed = 0; 3636 u16 bmcr; 3637 int ret, adv; 3638 3639 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 3640 if (adv >= 0) { 3641 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 3642 MII_ADVERTISE, 0xffff, adv); 3643 if (ret < 0) 3644 return ret; 3645 changed = ret; 3646 } 3647 3648 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 3649 bmcr = BMCR_ANENABLE; 3650 else 3651 bmcr = 0; 3652 3653 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 3654 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 3655 if (ret < 0) 3656 return ret; 3657 3658 return changed; 3659 } 3660 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 3661 3662 /** 3663 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 3664 * @pcs: a pointer to a &struct mdio_device. 3665 * 3666 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3667 * clause 37 negotiation. 3668 * 3669 * Restart the clause 37 negotiation with the link partner. This is 3670 * suitable to be directly plugged into the pcs_get_state() member 3671 * of the struct phylink_pcs_ops structure. 3672 */ 3673 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 3674 { 3675 int val = mdiodev_read(pcs, MII_BMCR); 3676 3677 if (val >= 0) { 3678 val |= BMCR_ANRESTART; 3679 3680 mdiodev_write(pcs, MII_BMCR, val); 3681 } 3682 } 3683 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 3684 3685 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 3686 struct phylink_link_state *state) 3687 { 3688 struct mii_bus *bus = pcs->bus; 3689 int addr = pcs->addr; 3690 int stat; 3691 3692 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 3693 if (stat < 0) { 3694 state->link = false; 3695 return; 3696 } 3697 3698 state->link = !!(stat & MDIO_STAT1_LSTATUS); 3699 if (!state->link) 3700 return; 3701 3702 switch (state->interface) { 3703 case PHY_INTERFACE_MODE_10GBASER: 3704 state->speed = SPEED_10000; 3705 state->duplex = DUPLEX_FULL; 3706 break; 3707 3708 default: 3709 break; 3710 } 3711 } 3712 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 3713 3714 static int __init phylink_init(void) 3715 { 3716 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 3717 __set_bit(phylink_sfp_interface_preference[i], 3718 phylink_sfp_interfaces); 3719 3720 return 0; 3721 } 3722 3723 module_init(phylink_init); 3724 3725 MODULE_LICENSE("GPL v2"); 3726