1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "sfp.h" 24 #include "swphy.h" 25 26 #define SUPPORTED_INTERFACES \ 27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 29 #define ADVERTISED_INTERFACES \ 30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 32 33 enum { 34 PHYLINK_DISABLE_STOPPED, 35 PHYLINK_DISABLE_LINK, 36 PHYLINK_DISABLE_MAC_WOL, 37 }; 38 39 /** 40 * struct phylink - internal data type for phylink 41 */ 42 struct phylink { 43 /* private: */ 44 struct net_device *netdev; 45 const struct phylink_mac_ops *mac_ops; 46 struct phylink_config *config; 47 struct phylink_pcs *pcs; 48 struct device *dev; 49 unsigned int old_link_state:1; 50 51 unsigned long phylink_disable_state; /* bitmask of disables */ 52 struct phy_device *phydev; 53 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 54 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 55 u8 cur_link_an_mode; 56 u8 link_port; /* The current non-phy ethtool port */ 57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 58 59 /* The link configuration settings */ 60 struct phylink_link_state link_config; 61 62 /* The current settings */ 63 phy_interface_t cur_interface; 64 65 struct gpio_desc *link_gpio; 66 unsigned int link_irq; 67 struct timer_list link_poll; 68 void (*get_fixed_state)(struct net_device *dev, 69 struct phylink_link_state *s); 70 71 struct mutex state_mutex; 72 struct phylink_link_state phy_state; 73 struct work_struct resolve; 74 75 bool mac_link_dropped; 76 bool using_mac_select_pcs; 77 78 struct sfp_bus *sfp_bus; 79 bool sfp_may_have_phy; 80 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 81 u8 sfp_port; 82 }; 83 84 #define phylink_printk(level, pl, fmt, ...) \ 85 do { \ 86 if ((pl)->config->type == PHYLINK_NETDEV) \ 87 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 88 else if ((pl)->config->type == PHYLINK_DEV) \ 89 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 90 } while (0) 91 92 #define phylink_err(pl, fmt, ...) \ 93 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 94 #define phylink_warn(pl, fmt, ...) \ 95 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 96 #define phylink_info(pl, fmt, ...) \ 97 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 98 #if defined(CONFIG_DYNAMIC_DEBUG) 99 #define phylink_dbg(pl, fmt, ...) \ 100 do { \ 101 if ((pl)->config->type == PHYLINK_NETDEV) \ 102 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 103 else if ((pl)->config->type == PHYLINK_DEV) \ 104 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 105 } while (0) 106 #elif defined(DEBUG) 107 #define phylink_dbg(pl, fmt, ...) \ 108 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 109 #else 110 #define phylink_dbg(pl, fmt, ...) \ 111 ({ \ 112 if (0) \ 113 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 114 }) 115 #endif 116 117 /** 118 * phylink_set_port_modes() - set the port type modes in the ethtool mask 119 * @mask: ethtool link mode mask 120 * 121 * Sets all the port type modes in the ethtool mask. MAC drivers should 122 * use this in their 'validate' callback. 123 */ 124 void phylink_set_port_modes(unsigned long *mask) 125 { 126 phylink_set(mask, TP); 127 phylink_set(mask, AUI); 128 phylink_set(mask, MII); 129 phylink_set(mask, FIBRE); 130 phylink_set(mask, BNC); 131 phylink_set(mask, Backplane); 132 } 133 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 134 135 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 136 { 137 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 138 139 phylink_set_port_modes(tmp); 140 phylink_set(tmp, Autoneg); 141 phylink_set(tmp, Pause); 142 phylink_set(tmp, Asym_Pause); 143 144 return linkmode_subset(linkmode, tmp); 145 } 146 147 static const char *phylink_an_mode_str(unsigned int mode) 148 { 149 static const char *modestr[] = { 150 [MLO_AN_PHY] = "phy", 151 [MLO_AN_FIXED] = "fixed", 152 [MLO_AN_INBAND] = "inband", 153 }; 154 155 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 156 } 157 158 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 159 unsigned long caps) 160 { 161 if (caps & MAC_SYM_PAUSE) 162 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 163 164 if (caps & MAC_ASYM_PAUSE) 165 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 166 167 if (caps & MAC_10HD) 168 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes); 169 170 if (caps & MAC_10FD) { 171 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes); 172 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes); 173 } 174 175 if (caps & MAC_100HD) { 176 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes); 177 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes); 178 } 179 180 if (caps & MAC_100FD) { 181 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes); 182 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes); 183 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes); 184 } 185 186 if (caps & MAC_1000HD) 187 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes); 188 189 if (caps & MAC_1000FD) { 190 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes); 191 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes); 192 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes); 193 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes); 194 } 195 196 if (caps & MAC_2500FD) { 197 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes); 198 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes); 199 } 200 201 if (caps & MAC_5000FD) 202 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes); 203 204 if (caps & MAC_10000FD) { 205 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes); 206 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes); 207 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes); 208 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes); 209 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes); 210 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes); 211 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes); 212 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes); 213 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes); 214 } 215 216 if (caps & MAC_25000FD) { 217 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes); 218 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes); 219 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes); 220 } 221 222 if (caps & MAC_40000FD) { 223 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes); 224 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes); 225 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes); 226 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes); 227 } 228 229 if (caps & MAC_50000FD) { 230 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes); 231 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes); 232 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes); 233 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes); 234 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes); 235 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes); 236 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 237 linkmodes); 238 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes); 239 } 240 241 if (caps & MAC_56000FD) { 242 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes); 243 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes); 244 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes); 245 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes); 246 } 247 248 if (caps & MAC_100000FD) { 249 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes); 250 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes); 251 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes); 252 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 253 linkmodes); 254 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes); 255 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes); 256 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes); 257 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 258 linkmodes); 259 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes); 260 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes); 261 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes); 262 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 263 linkmodes); 264 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes); 265 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes); 266 } 267 268 if (caps & MAC_200000FD) { 269 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes); 270 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes); 271 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 272 linkmodes); 273 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes); 274 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes); 275 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes); 276 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes); 277 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 278 linkmodes); 279 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes); 280 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes); 281 } 282 283 if (caps & MAC_400000FD) { 284 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes); 285 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes); 286 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 287 linkmodes); 288 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes); 289 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes); 290 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes); 291 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes); 292 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 293 linkmodes); 294 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes); 295 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes); 296 } 297 } 298 299 /** 300 * phylink_get_linkmodes() - get acceptable link modes 301 * @linkmodes: ethtool linkmode mask (must be already initialised) 302 * @interface: phy interface mode defined by &typedef phy_interface_t 303 * @mac_capabilities: bitmask of MAC capabilities 304 * 305 * Set all possible pause, speed and duplex linkmodes in @linkmodes that 306 * are supported by the @interface mode and @mac_capabilities. @linkmodes 307 * must have been initialised previously. 308 */ 309 void phylink_get_linkmodes(unsigned long *linkmodes, phy_interface_t interface, 310 unsigned long mac_capabilities) 311 { 312 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 313 314 switch (interface) { 315 case PHY_INTERFACE_MODE_USXGMII: 316 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD; 317 fallthrough; 318 319 case PHY_INTERFACE_MODE_RGMII_TXID: 320 case PHY_INTERFACE_MODE_RGMII_RXID: 321 case PHY_INTERFACE_MODE_RGMII_ID: 322 case PHY_INTERFACE_MODE_RGMII: 323 case PHY_INTERFACE_MODE_QSGMII: 324 case PHY_INTERFACE_MODE_QUSGMII: 325 case PHY_INTERFACE_MODE_SGMII: 326 case PHY_INTERFACE_MODE_GMII: 327 caps |= MAC_1000HD | MAC_1000FD; 328 fallthrough; 329 330 case PHY_INTERFACE_MODE_REVRMII: 331 case PHY_INTERFACE_MODE_RMII: 332 case PHY_INTERFACE_MODE_SMII: 333 case PHY_INTERFACE_MODE_REVMII: 334 case PHY_INTERFACE_MODE_MII: 335 caps |= MAC_10HD | MAC_10FD; 336 fallthrough; 337 338 case PHY_INTERFACE_MODE_100BASEX: 339 caps |= MAC_100HD | MAC_100FD; 340 break; 341 342 case PHY_INTERFACE_MODE_TBI: 343 case PHY_INTERFACE_MODE_MOCA: 344 case PHY_INTERFACE_MODE_RTBI: 345 case PHY_INTERFACE_MODE_1000BASEX: 346 caps |= MAC_1000HD; 347 fallthrough; 348 case PHY_INTERFACE_MODE_TRGMII: 349 caps |= MAC_1000FD; 350 break; 351 352 case PHY_INTERFACE_MODE_2500BASEX: 353 caps |= MAC_2500FD; 354 break; 355 356 case PHY_INTERFACE_MODE_5GBASER: 357 caps |= MAC_5000FD; 358 break; 359 360 case PHY_INTERFACE_MODE_XGMII: 361 case PHY_INTERFACE_MODE_RXAUI: 362 case PHY_INTERFACE_MODE_XAUI: 363 case PHY_INTERFACE_MODE_10GBASER: 364 case PHY_INTERFACE_MODE_10GKR: 365 caps |= MAC_10000FD; 366 break; 367 368 case PHY_INTERFACE_MODE_25GBASER: 369 caps |= MAC_25000FD; 370 break; 371 372 case PHY_INTERFACE_MODE_XLGMII: 373 caps |= MAC_40000FD; 374 break; 375 376 case PHY_INTERFACE_MODE_INTERNAL: 377 caps |= ~0; 378 break; 379 380 case PHY_INTERFACE_MODE_NA: 381 case PHY_INTERFACE_MODE_MAX: 382 break; 383 } 384 385 phylink_caps_to_linkmodes(linkmodes, caps & mac_capabilities); 386 } 387 EXPORT_SYMBOL_GPL(phylink_get_linkmodes); 388 389 /** 390 * phylink_generic_validate() - generic validate() callback implementation 391 * @config: a pointer to a &struct phylink_config. 392 * @supported: ethtool bitmask for supported link modes. 393 * @state: a pointer to a &struct phylink_link_state. 394 * 395 * Generic implementation of the validate() callback that MAC drivers can 396 * use when they pass the range of supported interfaces and MAC capabilities. 397 * This makes use of phylink_get_linkmodes(). 398 */ 399 void phylink_generic_validate(struct phylink_config *config, 400 unsigned long *supported, 401 struct phylink_link_state *state) 402 { 403 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 404 405 phylink_set_port_modes(mask); 406 phylink_set(mask, Autoneg); 407 phylink_get_linkmodes(mask, state->interface, config->mac_capabilities); 408 409 linkmode_and(supported, supported, mask); 410 linkmode_and(state->advertising, state->advertising, mask); 411 } 412 EXPORT_SYMBOL_GPL(phylink_generic_validate); 413 414 static int phylink_validate_mac_and_pcs(struct phylink *pl, 415 unsigned long *supported, 416 struct phylink_link_state *state) 417 { 418 struct phylink_pcs *pcs; 419 int ret; 420 421 /* Get the PCS for this interface mode */ 422 if (pl->using_mac_select_pcs) { 423 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 424 if (IS_ERR(pcs)) 425 return PTR_ERR(pcs); 426 } else { 427 pcs = pl->pcs; 428 } 429 430 if (pcs) { 431 /* The PCS, if present, must be setup before phylink_create() 432 * has been called. If the ops is not initialised, print an 433 * error and backtrace rather than oopsing the kernel. 434 */ 435 if (!pcs->ops) { 436 phylink_err(pl, "interface %s: uninitialised PCS\n", 437 phy_modes(state->interface)); 438 dump_stack(); 439 return -EINVAL; 440 } 441 442 /* Validate the link parameters with the PCS */ 443 if (pcs->ops->pcs_validate) { 444 ret = pcs->ops->pcs_validate(pcs, supported, state); 445 if (ret < 0 || phylink_is_empty_linkmode(supported)) 446 return -EINVAL; 447 448 /* Ensure the advertising mask is a subset of the 449 * supported mask. 450 */ 451 linkmode_and(state->advertising, state->advertising, 452 supported); 453 } 454 } 455 456 /* Then validate the link parameters with the MAC */ 457 pl->mac_ops->validate(pl->config, supported, state); 458 459 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 460 } 461 462 static int phylink_validate_any(struct phylink *pl, unsigned long *supported, 463 struct phylink_link_state *state) 464 { 465 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 466 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 467 __ETHTOOL_DECLARE_LINK_MODE_MASK(s); 468 struct phylink_link_state t; 469 int intf; 470 471 for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) { 472 if (test_bit(intf, pl->config->supported_interfaces)) { 473 linkmode_copy(s, supported); 474 475 t = *state; 476 t.interface = intf; 477 if (!phylink_validate_mac_and_pcs(pl, s, &t)) { 478 linkmode_or(all_s, all_s, s); 479 linkmode_or(all_adv, all_adv, t.advertising); 480 } 481 } 482 } 483 484 linkmode_copy(supported, all_s); 485 linkmode_copy(state->advertising, all_adv); 486 487 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 488 } 489 490 static int phylink_validate(struct phylink *pl, unsigned long *supported, 491 struct phylink_link_state *state) 492 { 493 if (!phy_interface_empty(pl->config->supported_interfaces)) { 494 if (state->interface == PHY_INTERFACE_MODE_NA) 495 return phylink_validate_any(pl, supported, state); 496 497 if (!test_bit(state->interface, 498 pl->config->supported_interfaces)) 499 return -EINVAL; 500 } 501 502 return phylink_validate_mac_and_pcs(pl, supported, state); 503 } 504 505 static int phylink_parse_fixedlink(struct phylink *pl, 506 struct fwnode_handle *fwnode) 507 { 508 struct fwnode_handle *fixed_node; 509 const struct phy_setting *s; 510 struct gpio_desc *desc; 511 u32 speed; 512 int ret; 513 514 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 515 if (fixed_node) { 516 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 517 518 pl->link_config.speed = speed; 519 pl->link_config.duplex = DUPLEX_HALF; 520 521 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 522 pl->link_config.duplex = DUPLEX_FULL; 523 524 /* We treat the "pause" and "asym-pause" terminology as 525 * defining the link partner's ability. 526 */ 527 if (fwnode_property_read_bool(fixed_node, "pause")) 528 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 529 pl->link_config.lp_advertising); 530 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 531 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 532 pl->link_config.lp_advertising); 533 534 if (ret == 0) { 535 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 536 GPIOD_IN, "?"); 537 538 if (!IS_ERR(desc)) 539 pl->link_gpio = desc; 540 else if (desc == ERR_PTR(-EPROBE_DEFER)) 541 ret = -EPROBE_DEFER; 542 } 543 fwnode_handle_put(fixed_node); 544 545 if (ret) 546 return ret; 547 } else { 548 u32 prop[5]; 549 550 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 551 NULL, 0); 552 if (ret != ARRAY_SIZE(prop)) { 553 phylink_err(pl, "broken fixed-link?\n"); 554 return -EINVAL; 555 } 556 557 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 558 prop, ARRAY_SIZE(prop)); 559 if (!ret) { 560 pl->link_config.duplex = prop[1] ? 561 DUPLEX_FULL : DUPLEX_HALF; 562 pl->link_config.speed = prop[2]; 563 if (prop[3]) 564 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 565 pl->link_config.lp_advertising); 566 if (prop[4]) 567 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 568 pl->link_config.lp_advertising); 569 } 570 } 571 572 if (pl->link_config.speed > SPEED_1000 && 573 pl->link_config.duplex != DUPLEX_FULL) 574 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 575 pl->link_config.speed); 576 577 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 578 linkmode_copy(pl->link_config.advertising, pl->supported); 579 phylink_validate(pl, pl->supported, &pl->link_config); 580 581 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, 582 pl->supported, true); 583 linkmode_zero(pl->supported); 584 phylink_set(pl->supported, MII); 585 phylink_set(pl->supported, Pause); 586 phylink_set(pl->supported, Asym_Pause); 587 phylink_set(pl->supported, Autoneg); 588 if (s) { 589 __set_bit(s->bit, pl->supported); 590 __set_bit(s->bit, pl->link_config.lp_advertising); 591 } else { 592 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 593 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 594 pl->link_config.speed); 595 } 596 597 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 598 pl->supported); 599 600 pl->link_config.link = 1; 601 pl->link_config.an_complete = 1; 602 603 return 0; 604 } 605 606 static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode) 607 { 608 struct fwnode_handle *dn; 609 const char *managed; 610 611 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 612 if (dn || fwnode_property_present(fwnode, "fixed-link")) 613 pl->cfg_link_an_mode = MLO_AN_FIXED; 614 fwnode_handle_put(dn); 615 616 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 617 strcmp(managed, "in-band-status") == 0) || 618 pl->config->ovr_an_inband) { 619 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 620 phylink_err(pl, 621 "can't use both fixed-link and in-band-status\n"); 622 return -EINVAL; 623 } 624 625 linkmode_zero(pl->supported); 626 phylink_set(pl->supported, MII); 627 phylink_set(pl->supported, Autoneg); 628 phylink_set(pl->supported, Asym_Pause); 629 phylink_set(pl->supported, Pause); 630 pl->link_config.an_enabled = true; 631 pl->cfg_link_an_mode = MLO_AN_INBAND; 632 633 switch (pl->link_config.interface) { 634 case PHY_INTERFACE_MODE_SGMII: 635 case PHY_INTERFACE_MODE_QSGMII: 636 case PHY_INTERFACE_MODE_QUSGMII: 637 case PHY_INTERFACE_MODE_RGMII: 638 case PHY_INTERFACE_MODE_RGMII_ID: 639 case PHY_INTERFACE_MODE_RGMII_RXID: 640 case PHY_INTERFACE_MODE_RGMII_TXID: 641 case PHY_INTERFACE_MODE_RTBI: 642 phylink_set(pl->supported, 10baseT_Half); 643 phylink_set(pl->supported, 10baseT_Full); 644 phylink_set(pl->supported, 100baseT_Half); 645 phylink_set(pl->supported, 100baseT_Full); 646 phylink_set(pl->supported, 1000baseT_Half); 647 phylink_set(pl->supported, 1000baseT_Full); 648 break; 649 650 case PHY_INTERFACE_MODE_1000BASEX: 651 phylink_set(pl->supported, 1000baseX_Full); 652 break; 653 654 case PHY_INTERFACE_MODE_2500BASEX: 655 phylink_set(pl->supported, 2500baseX_Full); 656 break; 657 658 case PHY_INTERFACE_MODE_5GBASER: 659 phylink_set(pl->supported, 5000baseT_Full); 660 break; 661 662 case PHY_INTERFACE_MODE_25GBASER: 663 phylink_set(pl->supported, 25000baseCR_Full); 664 phylink_set(pl->supported, 25000baseKR_Full); 665 phylink_set(pl->supported, 25000baseSR_Full); 666 fallthrough; 667 case PHY_INTERFACE_MODE_USXGMII: 668 case PHY_INTERFACE_MODE_10GKR: 669 case PHY_INTERFACE_MODE_10GBASER: 670 phylink_set(pl->supported, 10baseT_Half); 671 phylink_set(pl->supported, 10baseT_Full); 672 phylink_set(pl->supported, 100baseT_Half); 673 phylink_set(pl->supported, 100baseT_Full); 674 phylink_set(pl->supported, 1000baseT_Half); 675 phylink_set(pl->supported, 1000baseT_Full); 676 phylink_set(pl->supported, 1000baseX_Full); 677 phylink_set(pl->supported, 1000baseKX_Full); 678 phylink_set(pl->supported, 2500baseT_Full); 679 phylink_set(pl->supported, 2500baseX_Full); 680 phylink_set(pl->supported, 5000baseT_Full); 681 phylink_set(pl->supported, 10000baseT_Full); 682 phylink_set(pl->supported, 10000baseKR_Full); 683 phylink_set(pl->supported, 10000baseKX4_Full); 684 phylink_set(pl->supported, 10000baseCR_Full); 685 phylink_set(pl->supported, 10000baseSR_Full); 686 phylink_set(pl->supported, 10000baseLR_Full); 687 phylink_set(pl->supported, 10000baseLRM_Full); 688 phylink_set(pl->supported, 10000baseER_Full); 689 break; 690 691 case PHY_INTERFACE_MODE_XLGMII: 692 phylink_set(pl->supported, 25000baseCR_Full); 693 phylink_set(pl->supported, 25000baseKR_Full); 694 phylink_set(pl->supported, 25000baseSR_Full); 695 phylink_set(pl->supported, 40000baseKR4_Full); 696 phylink_set(pl->supported, 40000baseCR4_Full); 697 phylink_set(pl->supported, 40000baseSR4_Full); 698 phylink_set(pl->supported, 40000baseLR4_Full); 699 phylink_set(pl->supported, 50000baseCR2_Full); 700 phylink_set(pl->supported, 50000baseKR2_Full); 701 phylink_set(pl->supported, 50000baseSR2_Full); 702 phylink_set(pl->supported, 50000baseKR_Full); 703 phylink_set(pl->supported, 50000baseSR_Full); 704 phylink_set(pl->supported, 50000baseCR_Full); 705 phylink_set(pl->supported, 50000baseLR_ER_FR_Full); 706 phylink_set(pl->supported, 50000baseDR_Full); 707 phylink_set(pl->supported, 100000baseKR4_Full); 708 phylink_set(pl->supported, 100000baseSR4_Full); 709 phylink_set(pl->supported, 100000baseCR4_Full); 710 phylink_set(pl->supported, 100000baseLR4_ER4_Full); 711 phylink_set(pl->supported, 100000baseKR2_Full); 712 phylink_set(pl->supported, 100000baseSR2_Full); 713 phylink_set(pl->supported, 100000baseCR2_Full); 714 phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full); 715 phylink_set(pl->supported, 100000baseDR2_Full); 716 break; 717 718 default: 719 phylink_err(pl, 720 "incorrect link mode %s for in-band status\n", 721 phy_modes(pl->link_config.interface)); 722 return -EINVAL; 723 } 724 725 linkmode_copy(pl->link_config.advertising, pl->supported); 726 727 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 728 phylink_err(pl, 729 "failed to validate link configuration for in-band status\n"); 730 return -EINVAL; 731 } 732 733 /* Check if MAC/PCS also supports Autoneg. */ 734 pl->link_config.an_enabled = phylink_test(pl->supported, Autoneg); 735 } 736 737 return 0; 738 } 739 740 static void phylink_apply_manual_flow(struct phylink *pl, 741 struct phylink_link_state *state) 742 { 743 /* If autoneg is disabled, pause AN is also disabled */ 744 if (!state->an_enabled) 745 state->pause &= ~MLO_PAUSE_AN; 746 747 /* Manual configuration of pause modes */ 748 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 749 state->pause = pl->link_config.pause; 750 } 751 752 static void phylink_resolve_flow(struct phylink_link_state *state) 753 { 754 bool tx_pause, rx_pause; 755 756 state->pause = MLO_PAUSE_NONE; 757 if (state->duplex == DUPLEX_FULL) { 758 linkmode_resolve_pause(state->advertising, 759 state->lp_advertising, 760 &tx_pause, &rx_pause); 761 if (tx_pause) 762 state->pause |= MLO_PAUSE_TX; 763 if (rx_pause) 764 state->pause |= MLO_PAUSE_RX; 765 } 766 } 767 768 static void phylink_pcs_poll_stop(struct phylink *pl) 769 { 770 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 771 del_timer(&pl->link_poll); 772 } 773 774 static void phylink_pcs_poll_start(struct phylink *pl) 775 { 776 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 777 mod_timer(&pl->link_poll, jiffies + HZ); 778 } 779 780 static void phylink_mac_config(struct phylink *pl, 781 const struct phylink_link_state *state) 782 { 783 phylink_dbg(pl, 784 "%s: mode=%s/%s/%s/%s adv=%*pb pause=%02x link=%u an=%u\n", 785 __func__, phylink_an_mode_str(pl->cur_link_an_mode), 786 phy_modes(state->interface), 787 phy_speed_to_str(state->speed), 788 phy_duplex_to_str(state->duplex), 789 __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising, 790 state->pause, state->link, state->an_enabled); 791 792 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, state); 793 } 794 795 static void phylink_mac_pcs_an_restart(struct phylink *pl) 796 { 797 if (pl->link_config.an_enabled && 798 phy_interface_mode_is_8023z(pl->link_config.interface) && 799 phylink_autoneg_inband(pl->cur_link_an_mode)) { 800 if (pl->pcs) 801 pl->pcs->ops->pcs_an_restart(pl->pcs); 802 else if (pl->config->legacy_pre_march2020) 803 pl->mac_ops->mac_an_restart(pl->config); 804 } 805 } 806 807 static void phylink_major_config(struct phylink *pl, bool restart, 808 const struct phylink_link_state *state) 809 { 810 struct phylink_pcs *pcs = NULL; 811 bool pcs_changed = false; 812 int err; 813 814 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); 815 816 if (pl->using_mac_select_pcs) { 817 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 818 if (IS_ERR(pcs)) { 819 phylink_err(pl, 820 "mac_select_pcs unexpectedly failed: %pe\n", 821 pcs); 822 return; 823 } 824 825 pcs_changed = pcs && pl->pcs != pcs; 826 } 827 828 phylink_pcs_poll_stop(pl); 829 830 if (pl->mac_ops->mac_prepare) { 831 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode, 832 state->interface); 833 if (err < 0) { 834 phylink_err(pl, "mac_prepare failed: %pe\n", 835 ERR_PTR(err)); 836 return; 837 } 838 } 839 840 /* If we have a new PCS, switch to the new PCS after preparing the MAC 841 * for the change. 842 */ 843 if (pcs_changed) 844 pl->pcs = pcs; 845 846 phylink_mac_config(pl, state); 847 848 if (pl->pcs) { 849 err = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode, 850 state->interface, 851 state->advertising, 852 !!(pl->link_config.pause & 853 MLO_PAUSE_AN)); 854 if (err < 0) 855 phylink_err(pl, "pcs_config failed: %pe\n", 856 ERR_PTR(err)); 857 if (err > 0) 858 restart = true; 859 } 860 if (restart) 861 phylink_mac_pcs_an_restart(pl); 862 863 if (pl->mac_ops->mac_finish) { 864 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode, 865 state->interface); 866 if (err < 0) 867 phylink_err(pl, "mac_finish failed: %pe\n", 868 ERR_PTR(err)); 869 } 870 871 phylink_pcs_poll_start(pl); 872 } 873 874 /* 875 * Reconfigure for a change of inband advertisement. 876 * If we have a separate PCS, we only need to call its pcs_config() method, 877 * and then restart AN if it indicates something changed. Otherwise, we do 878 * the full MAC reconfiguration. 879 */ 880 static int phylink_change_inband_advert(struct phylink *pl) 881 { 882 int ret; 883 884 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 885 return 0; 886 887 if (!pl->pcs && pl->config->legacy_pre_march2020) { 888 /* Legacy method */ 889 phylink_mac_config(pl, &pl->link_config); 890 phylink_mac_pcs_an_restart(pl); 891 return 0; 892 } 893 894 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 895 phylink_an_mode_str(pl->cur_link_an_mode), 896 phy_modes(pl->link_config.interface), 897 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 898 pl->link_config.pause); 899 900 /* Modern PCS-based method; update the advert at the PCS, and 901 * restart negotiation if the pcs_config() helper indicates that 902 * the programmed advertisement has changed. 903 */ 904 ret = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode, 905 pl->link_config.interface, 906 pl->link_config.advertising, 907 !!(pl->link_config.pause & 908 MLO_PAUSE_AN)); 909 if (ret < 0) 910 return ret; 911 912 if (ret > 0) 913 phylink_mac_pcs_an_restart(pl); 914 915 return 0; 916 } 917 918 static void phylink_mac_pcs_get_state(struct phylink *pl, 919 struct phylink_link_state *state) 920 { 921 linkmode_copy(state->advertising, pl->link_config.advertising); 922 linkmode_zero(state->lp_advertising); 923 state->interface = pl->link_config.interface; 924 state->an_enabled = pl->link_config.an_enabled; 925 if (state->an_enabled) { 926 state->speed = SPEED_UNKNOWN; 927 state->duplex = DUPLEX_UNKNOWN; 928 state->pause = MLO_PAUSE_NONE; 929 } else { 930 state->speed = pl->link_config.speed; 931 state->duplex = pl->link_config.duplex; 932 state->pause = pl->link_config.pause; 933 } 934 state->an_complete = 0; 935 state->link = 1; 936 937 if (pl->pcs) 938 pl->pcs->ops->pcs_get_state(pl->pcs, state); 939 else if (pl->mac_ops->mac_pcs_get_state && 940 pl->config->legacy_pre_march2020) 941 pl->mac_ops->mac_pcs_get_state(pl->config, state); 942 else 943 state->link = 0; 944 } 945 946 /* The fixed state is... fixed except for the link state, 947 * which may be determined by a GPIO or a callback. 948 */ 949 static void phylink_get_fixed_state(struct phylink *pl, 950 struct phylink_link_state *state) 951 { 952 *state = pl->link_config; 953 if (pl->config->get_fixed_state) 954 pl->config->get_fixed_state(pl->config, state); 955 else if (pl->link_gpio) 956 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 957 958 phylink_resolve_flow(state); 959 } 960 961 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 962 { 963 struct phylink_link_state link_state; 964 965 switch (pl->cur_link_an_mode) { 966 case MLO_AN_PHY: 967 link_state = pl->phy_state; 968 break; 969 970 case MLO_AN_FIXED: 971 phylink_get_fixed_state(pl, &link_state); 972 break; 973 974 case MLO_AN_INBAND: 975 link_state = pl->link_config; 976 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 977 link_state.pause = MLO_PAUSE_NONE; 978 break; 979 980 default: /* can't happen */ 981 return; 982 } 983 984 link_state.link = false; 985 986 phylink_apply_manual_flow(pl, &link_state); 987 phylink_major_config(pl, force_restart, &link_state); 988 } 989 990 static const char *phylink_pause_to_str(int pause) 991 { 992 switch (pause & MLO_PAUSE_TXRX_MASK) { 993 case MLO_PAUSE_TX | MLO_PAUSE_RX: 994 return "rx/tx"; 995 case MLO_PAUSE_TX: 996 return "tx"; 997 case MLO_PAUSE_RX: 998 return "rx"; 999 default: 1000 return "off"; 1001 } 1002 } 1003 1004 static void phylink_link_up(struct phylink *pl, 1005 struct phylink_link_state link_state) 1006 { 1007 struct net_device *ndev = pl->netdev; 1008 1009 pl->cur_interface = link_state.interface; 1010 1011 if (pl->pcs && pl->pcs->ops->pcs_link_up) 1012 pl->pcs->ops->pcs_link_up(pl->pcs, pl->cur_link_an_mode, 1013 pl->cur_interface, 1014 link_state.speed, link_state.duplex); 1015 1016 pl->mac_ops->mac_link_up(pl->config, pl->phydev, 1017 pl->cur_link_an_mode, pl->cur_interface, 1018 link_state.speed, link_state.duplex, 1019 !!(link_state.pause & MLO_PAUSE_TX), 1020 !!(link_state.pause & MLO_PAUSE_RX)); 1021 1022 if (ndev) 1023 netif_carrier_on(ndev); 1024 1025 phylink_info(pl, 1026 "Link is Up - %s/%s - flow control %s\n", 1027 phy_speed_to_str(link_state.speed), 1028 phy_duplex_to_str(link_state.duplex), 1029 phylink_pause_to_str(link_state.pause)); 1030 } 1031 1032 static void phylink_link_down(struct phylink *pl) 1033 { 1034 struct net_device *ndev = pl->netdev; 1035 1036 if (ndev) 1037 netif_carrier_off(ndev); 1038 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode, 1039 pl->cur_interface); 1040 phylink_info(pl, "Link is Down\n"); 1041 } 1042 1043 static void phylink_resolve(struct work_struct *w) 1044 { 1045 struct phylink *pl = container_of(w, struct phylink, resolve); 1046 struct phylink_link_state link_state; 1047 struct net_device *ndev = pl->netdev; 1048 bool mac_config = false; 1049 bool retrigger = false; 1050 bool cur_link_state; 1051 1052 mutex_lock(&pl->state_mutex); 1053 if (pl->netdev) 1054 cur_link_state = netif_carrier_ok(ndev); 1055 else 1056 cur_link_state = pl->old_link_state; 1057 1058 if (pl->phylink_disable_state) { 1059 pl->mac_link_dropped = false; 1060 link_state.link = false; 1061 } else if (pl->mac_link_dropped) { 1062 link_state.link = false; 1063 retrigger = true; 1064 } else { 1065 switch (pl->cur_link_an_mode) { 1066 case MLO_AN_PHY: 1067 link_state = pl->phy_state; 1068 phylink_apply_manual_flow(pl, &link_state); 1069 mac_config = link_state.link; 1070 break; 1071 1072 case MLO_AN_FIXED: 1073 phylink_get_fixed_state(pl, &link_state); 1074 mac_config = link_state.link; 1075 break; 1076 1077 case MLO_AN_INBAND: 1078 phylink_mac_pcs_get_state(pl, &link_state); 1079 1080 /* The PCS may have a latching link-fail indicator. 1081 * If the link was up, bring the link down and 1082 * re-trigger the resolve. Otherwise, re-read the 1083 * PCS state to get the current status of the link. 1084 */ 1085 if (!link_state.link) { 1086 if (cur_link_state) 1087 retrigger = true; 1088 else 1089 phylink_mac_pcs_get_state(pl, 1090 &link_state); 1091 } 1092 1093 /* If we have a phy, the "up" state is the union of 1094 * both the PHY and the MAC 1095 */ 1096 if (pl->phydev) 1097 link_state.link &= pl->phy_state.link; 1098 1099 /* Only update if the PHY link is up */ 1100 if (pl->phydev && pl->phy_state.link) { 1101 /* If the interface has changed, force a 1102 * link down event if the link isn't already 1103 * down, and re-resolve. 1104 */ 1105 if (link_state.interface != 1106 pl->phy_state.interface) { 1107 retrigger = true; 1108 link_state.link = false; 1109 } 1110 link_state.interface = pl->phy_state.interface; 1111 1112 /* If we have a PHY, we need to update with 1113 * the PHY flow control bits. 1114 */ 1115 link_state.pause = pl->phy_state.pause; 1116 mac_config = true; 1117 } 1118 phylink_apply_manual_flow(pl, &link_state); 1119 break; 1120 } 1121 } 1122 1123 if (mac_config) { 1124 if (link_state.interface != pl->link_config.interface) { 1125 /* The interface has changed, force the link down and 1126 * then reconfigure. 1127 */ 1128 if (cur_link_state) { 1129 phylink_link_down(pl); 1130 cur_link_state = false; 1131 } 1132 phylink_major_config(pl, false, &link_state); 1133 pl->link_config.interface = link_state.interface; 1134 } else if (!pl->pcs && pl->config->legacy_pre_march2020) { 1135 /* The interface remains unchanged, only the speed, 1136 * duplex or pause settings have changed. Call the 1137 * old mac_config() method to configure the MAC/PCS 1138 * only if we do not have a legacy MAC driver. 1139 */ 1140 phylink_mac_config(pl, &link_state); 1141 } 1142 } 1143 1144 if (link_state.link != cur_link_state) { 1145 pl->old_link_state = link_state.link; 1146 if (!link_state.link) 1147 phylink_link_down(pl); 1148 else 1149 phylink_link_up(pl, link_state); 1150 } 1151 if (!link_state.link && retrigger) { 1152 pl->mac_link_dropped = false; 1153 queue_work(system_power_efficient_wq, &pl->resolve); 1154 } 1155 mutex_unlock(&pl->state_mutex); 1156 } 1157 1158 static void phylink_run_resolve(struct phylink *pl) 1159 { 1160 if (!pl->phylink_disable_state) 1161 queue_work(system_power_efficient_wq, &pl->resolve); 1162 } 1163 1164 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1165 { 1166 unsigned long state = pl->phylink_disable_state; 1167 1168 set_bit(bit, &pl->phylink_disable_state); 1169 if (state == 0) { 1170 queue_work(system_power_efficient_wq, &pl->resolve); 1171 flush_work(&pl->resolve); 1172 } 1173 } 1174 1175 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1176 { 1177 clear_bit(bit, &pl->phylink_disable_state); 1178 phylink_run_resolve(pl); 1179 } 1180 1181 static void phylink_fixed_poll(struct timer_list *t) 1182 { 1183 struct phylink *pl = container_of(t, struct phylink, link_poll); 1184 1185 mod_timer(t, jiffies + HZ); 1186 1187 phylink_run_resolve(pl); 1188 } 1189 1190 static const struct sfp_upstream_ops sfp_phylink_ops; 1191 1192 static int phylink_register_sfp(struct phylink *pl, 1193 struct fwnode_handle *fwnode) 1194 { 1195 struct sfp_bus *bus; 1196 int ret; 1197 1198 if (!fwnode) 1199 return 0; 1200 1201 bus = sfp_bus_find_fwnode(fwnode); 1202 if (IS_ERR(bus)) { 1203 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1204 return PTR_ERR(bus); 1205 } 1206 1207 pl->sfp_bus = bus; 1208 1209 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1210 sfp_bus_put(bus); 1211 1212 return ret; 1213 } 1214 1215 /** 1216 * phylink_create() - create a phylink instance 1217 * @config: a pointer to the target &struct phylink_config 1218 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1219 * interface 1220 * @iface: the desired link mode defined by &typedef phy_interface_t 1221 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1222 * 1223 * Create a new phylink instance, and parse the link parameters found in @np. 1224 * This will parse in-band modes, fixed-link or SFP configuration. 1225 * 1226 * Note: the rtnl lock must not be held when calling this function. 1227 * 1228 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1229 * must use IS_ERR() to check for errors from this function. 1230 */ 1231 struct phylink *phylink_create(struct phylink_config *config, 1232 struct fwnode_handle *fwnode, 1233 phy_interface_t iface, 1234 const struct phylink_mac_ops *mac_ops) 1235 { 1236 bool using_mac_select_pcs = false; 1237 struct phylink *pl; 1238 int ret; 1239 1240 if (mac_ops->mac_select_pcs && 1241 mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) != 1242 ERR_PTR(-EOPNOTSUPP)) 1243 using_mac_select_pcs = true; 1244 1245 /* Validate the supplied configuration */ 1246 if (using_mac_select_pcs && 1247 phy_interface_empty(config->supported_interfaces)) { 1248 dev_err(config->dev, 1249 "phylink: error: empty supported_interfaces but mac_select_pcs() method present\n"); 1250 return ERR_PTR(-EINVAL); 1251 } 1252 1253 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1254 if (!pl) 1255 return ERR_PTR(-ENOMEM); 1256 1257 mutex_init(&pl->state_mutex); 1258 INIT_WORK(&pl->resolve, phylink_resolve); 1259 1260 pl->config = config; 1261 if (config->type == PHYLINK_NETDEV) { 1262 pl->netdev = to_net_dev(config->dev); 1263 } else if (config->type == PHYLINK_DEV) { 1264 pl->dev = config->dev; 1265 } else { 1266 kfree(pl); 1267 return ERR_PTR(-EINVAL); 1268 } 1269 1270 pl->using_mac_select_pcs = using_mac_select_pcs; 1271 pl->phy_state.interface = iface; 1272 pl->link_interface = iface; 1273 if (iface == PHY_INTERFACE_MODE_MOCA) 1274 pl->link_port = PORT_BNC; 1275 else 1276 pl->link_port = PORT_MII; 1277 pl->link_config.interface = iface; 1278 pl->link_config.pause = MLO_PAUSE_AN; 1279 pl->link_config.speed = SPEED_UNKNOWN; 1280 pl->link_config.duplex = DUPLEX_UNKNOWN; 1281 pl->link_config.an_enabled = true; 1282 pl->mac_ops = mac_ops; 1283 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1284 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1285 1286 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 1287 linkmode_copy(pl->link_config.advertising, pl->supported); 1288 phylink_validate(pl, pl->supported, &pl->link_config); 1289 1290 ret = phylink_parse_mode(pl, fwnode); 1291 if (ret < 0) { 1292 kfree(pl); 1293 return ERR_PTR(ret); 1294 } 1295 1296 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1297 ret = phylink_parse_fixedlink(pl, fwnode); 1298 if (ret < 0) { 1299 kfree(pl); 1300 return ERR_PTR(ret); 1301 } 1302 } 1303 1304 pl->cur_link_an_mode = pl->cfg_link_an_mode; 1305 1306 ret = phylink_register_sfp(pl, fwnode); 1307 if (ret < 0) { 1308 kfree(pl); 1309 return ERR_PTR(ret); 1310 } 1311 1312 return pl; 1313 } 1314 EXPORT_SYMBOL_GPL(phylink_create); 1315 1316 /** 1317 * phylink_destroy() - cleanup and destroy the phylink instance 1318 * @pl: a pointer to a &struct phylink returned from phylink_create() 1319 * 1320 * Destroy a phylink instance. Any PHY that has been attached must have been 1321 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1322 * 1323 * Note: the rtnl lock must not be held when calling this function. 1324 */ 1325 void phylink_destroy(struct phylink *pl) 1326 { 1327 sfp_bus_del_upstream(pl->sfp_bus); 1328 if (pl->link_gpio) 1329 gpiod_put(pl->link_gpio); 1330 1331 cancel_work_sync(&pl->resolve); 1332 kfree(pl); 1333 } 1334 EXPORT_SYMBOL_GPL(phylink_destroy); 1335 1336 static void phylink_phy_change(struct phy_device *phydev, bool up) 1337 { 1338 struct phylink *pl = phydev->phylink; 1339 bool tx_pause, rx_pause; 1340 1341 phy_get_pause(phydev, &tx_pause, &rx_pause); 1342 1343 mutex_lock(&pl->state_mutex); 1344 pl->phy_state.speed = phydev->speed; 1345 pl->phy_state.duplex = phydev->duplex; 1346 pl->phy_state.pause = MLO_PAUSE_NONE; 1347 if (tx_pause) 1348 pl->phy_state.pause |= MLO_PAUSE_TX; 1349 if (rx_pause) 1350 pl->phy_state.pause |= MLO_PAUSE_RX; 1351 pl->phy_state.interface = phydev->interface; 1352 pl->phy_state.link = up; 1353 mutex_unlock(&pl->state_mutex); 1354 1355 phylink_run_resolve(pl); 1356 1357 phylink_dbg(pl, "phy link %s %s/%s/%s/%s\n", up ? "up" : "down", 1358 phy_modes(phydev->interface), 1359 phy_speed_to_str(phydev->speed), 1360 phy_duplex_to_str(phydev->duplex), 1361 phylink_pause_to_str(pl->phy_state.pause)); 1362 } 1363 1364 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 1365 phy_interface_t interface) 1366 { 1367 struct phylink_link_state config; 1368 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 1369 char *irq_str; 1370 int ret; 1371 1372 /* 1373 * This is the new way of dealing with flow control for PHYs, 1374 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 1375 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 1376 * using our validate call to the MAC, we rely upon the MAC 1377 * clearing the bits from both supported and advertising fields. 1378 */ 1379 phy_support_asym_pause(phy); 1380 1381 memset(&config, 0, sizeof(config)); 1382 linkmode_copy(supported, phy->supported); 1383 linkmode_copy(config.advertising, phy->advertising); 1384 1385 /* Clause 45 PHYs switch their Serdes lane between several different 1386 * modes, normally 10GBASE-R, SGMII. Some use 2500BASE-X for 2.5G 1387 * speeds. We really need to know which interface modes the PHY and 1388 * MAC supports to properly work out which linkmodes can be supported. 1389 */ 1390 if (phy->is_c45 && 1391 interface != PHY_INTERFACE_MODE_RXAUI && 1392 interface != PHY_INTERFACE_MODE_XAUI && 1393 interface != PHY_INTERFACE_MODE_USXGMII) 1394 config.interface = PHY_INTERFACE_MODE_NA; 1395 else 1396 config.interface = interface; 1397 1398 ret = phylink_validate(pl, supported, &config); 1399 if (ret) { 1400 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 1401 phy_modes(config.interface), 1402 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 1403 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 1404 ERR_PTR(ret)); 1405 return ret; 1406 } 1407 1408 phy->phylink = pl; 1409 phy->phy_link_change = phylink_phy_change; 1410 1411 irq_str = phy_attached_info_irq(phy); 1412 phylink_info(pl, 1413 "PHY [%s] driver [%s] (irq=%s)\n", 1414 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 1415 kfree(irq_str); 1416 1417 mutex_lock(&phy->lock); 1418 mutex_lock(&pl->state_mutex); 1419 pl->phydev = phy; 1420 pl->phy_state.interface = interface; 1421 pl->phy_state.pause = MLO_PAUSE_NONE; 1422 pl->phy_state.speed = SPEED_UNKNOWN; 1423 pl->phy_state.duplex = DUPLEX_UNKNOWN; 1424 linkmode_copy(pl->supported, supported); 1425 linkmode_copy(pl->link_config.advertising, config.advertising); 1426 1427 /* Restrict the phy advertisement according to the MAC support. */ 1428 linkmode_copy(phy->advertising, config.advertising); 1429 mutex_unlock(&pl->state_mutex); 1430 mutex_unlock(&phy->lock); 1431 1432 phylink_dbg(pl, 1433 "phy: %s setting supported %*pb advertising %*pb\n", 1434 phy_modes(interface), 1435 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 1436 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 1437 1438 if (phy_interrupt_is_valid(phy)) 1439 phy_request_interrupt(phy); 1440 1441 return 0; 1442 } 1443 1444 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 1445 phy_interface_t interface) 1446 { 1447 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 1448 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1449 phy_interface_mode_is_8023z(interface)))) 1450 return -EINVAL; 1451 1452 if (pl->phydev) 1453 return -EBUSY; 1454 1455 return phy_attach_direct(pl->netdev, phy, 0, interface); 1456 } 1457 1458 /** 1459 * phylink_connect_phy() - connect a PHY to the phylink instance 1460 * @pl: a pointer to a &struct phylink returned from phylink_create() 1461 * @phy: a pointer to a &struct phy_device. 1462 * 1463 * Connect @phy to the phylink instance specified by @pl by calling 1464 * phy_attach_direct(). Configure the @phy according to the MAC driver's 1465 * capabilities, start the PHYLIB state machine and enable any interrupts 1466 * that the PHY supports. 1467 * 1468 * This updates the phylink's ethtool supported and advertising link mode 1469 * masks. 1470 * 1471 * Returns 0 on success or a negative errno. 1472 */ 1473 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 1474 { 1475 int ret; 1476 1477 /* Use PHY device/driver interface */ 1478 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1479 pl->link_interface = phy->interface; 1480 pl->link_config.interface = pl->link_interface; 1481 } 1482 1483 ret = phylink_attach_phy(pl, phy, pl->link_interface); 1484 if (ret < 0) 1485 return ret; 1486 1487 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 1488 if (ret) 1489 phy_detach(phy); 1490 1491 return ret; 1492 } 1493 EXPORT_SYMBOL_GPL(phylink_connect_phy); 1494 1495 /** 1496 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 1497 * @pl: a pointer to a &struct phylink returned from phylink_create() 1498 * @dn: a pointer to a &struct device_node. 1499 * @flags: PHY-specific flags to communicate to the PHY device driver 1500 * 1501 * Connect the phy specified in the device node @dn to the phylink instance 1502 * specified by @pl. Actions specified in phylink_connect_phy() will be 1503 * performed. 1504 * 1505 * Returns 0 on success or a negative errno. 1506 */ 1507 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 1508 u32 flags) 1509 { 1510 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 1511 } 1512 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 1513 1514 /** 1515 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 1516 * @pl: a pointer to a &struct phylink returned from phylink_create() 1517 * @fwnode: a pointer to a &struct fwnode_handle. 1518 * @flags: PHY-specific flags to communicate to the PHY device driver 1519 * 1520 * Connect the phy specified @fwnode to the phylink instance specified 1521 * by @pl. 1522 * 1523 * Returns 0 on success or a negative errno. 1524 */ 1525 int phylink_fwnode_phy_connect(struct phylink *pl, 1526 struct fwnode_handle *fwnode, 1527 u32 flags) 1528 { 1529 struct fwnode_handle *phy_fwnode; 1530 struct phy_device *phy_dev; 1531 int ret; 1532 1533 /* Fixed links and 802.3z are handled without needing a PHY */ 1534 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1535 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1536 phy_interface_mode_is_8023z(pl->link_interface))) 1537 return 0; 1538 1539 phy_fwnode = fwnode_get_phy_node(fwnode); 1540 if (IS_ERR(phy_fwnode)) { 1541 if (pl->cfg_link_an_mode == MLO_AN_PHY) 1542 return -ENODEV; 1543 return 0; 1544 } 1545 1546 phy_dev = fwnode_phy_find_device(phy_fwnode); 1547 /* We're done with the phy_node handle */ 1548 fwnode_handle_put(phy_fwnode); 1549 if (!phy_dev) 1550 return -ENODEV; 1551 1552 /* Use PHY device/driver interface */ 1553 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1554 pl->link_interface = phy_dev->interface; 1555 pl->link_config.interface = pl->link_interface; 1556 } 1557 1558 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 1559 pl->link_interface); 1560 if (ret) { 1561 phy_device_free(phy_dev); 1562 return ret; 1563 } 1564 1565 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 1566 if (ret) 1567 phy_detach(phy_dev); 1568 1569 return ret; 1570 } 1571 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 1572 1573 /** 1574 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 1575 * instance. 1576 * @pl: a pointer to a &struct phylink returned from phylink_create() 1577 * 1578 * Disconnect any current PHY from the phylink instance described by @pl. 1579 */ 1580 void phylink_disconnect_phy(struct phylink *pl) 1581 { 1582 struct phy_device *phy; 1583 1584 ASSERT_RTNL(); 1585 1586 phy = pl->phydev; 1587 if (phy) { 1588 mutex_lock(&phy->lock); 1589 mutex_lock(&pl->state_mutex); 1590 pl->phydev = NULL; 1591 mutex_unlock(&pl->state_mutex); 1592 mutex_unlock(&phy->lock); 1593 flush_work(&pl->resolve); 1594 1595 phy_disconnect(phy); 1596 } 1597 } 1598 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 1599 1600 /** 1601 * phylink_mac_change() - notify phylink of a change in MAC state 1602 * @pl: a pointer to a &struct phylink returned from phylink_create() 1603 * @up: indicates whether the link is currently up. 1604 * 1605 * The MAC driver should call this driver when the state of its link 1606 * changes (eg, link failure, new negotiation results, etc.) 1607 */ 1608 void phylink_mac_change(struct phylink *pl, bool up) 1609 { 1610 if (!up) 1611 pl->mac_link_dropped = true; 1612 phylink_run_resolve(pl); 1613 phylink_dbg(pl, "mac link %s\n", up ? "up" : "down"); 1614 } 1615 EXPORT_SYMBOL_GPL(phylink_mac_change); 1616 1617 static irqreturn_t phylink_link_handler(int irq, void *data) 1618 { 1619 struct phylink *pl = data; 1620 1621 phylink_run_resolve(pl); 1622 1623 return IRQ_HANDLED; 1624 } 1625 1626 /** 1627 * phylink_start() - start a phylink instance 1628 * @pl: a pointer to a &struct phylink returned from phylink_create() 1629 * 1630 * Start the phylink instance specified by @pl, configuring the MAC for the 1631 * desired link mode(s) and negotiation style. This should be called from the 1632 * network device driver's &struct net_device_ops ndo_open() method. 1633 */ 1634 void phylink_start(struct phylink *pl) 1635 { 1636 bool poll = false; 1637 1638 ASSERT_RTNL(); 1639 1640 phylink_info(pl, "configuring for %s/%s link mode\n", 1641 phylink_an_mode_str(pl->cur_link_an_mode), 1642 phy_modes(pl->link_config.interface)); 1643 1644 /* Always set the carrier off */ 1645 if (pl->netdev) 1646 netif_carrier_off(pl->netdev); 1647 1648 /* Apply the link configuration to the MAC when starting. This allows 1649 * a fixed-link to start with the correct parameters, and also 1650 * ensures that we set the appropriate advertisement for Serdes links. 1651 * 1652 * Restart autonegotiation if using 802.3z to ensure that the link 1653 * parameters are properly negotiated. This is necessary for DSA 1654 * switches using 802.3z negotiation to ensure they see our modes. 1655 */ 1656 phylink_mac_initial_config(pl, true); 1657 1658 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 1659 1660 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 1661 int irq = gpiod_to_irq(pl->link_gpio); 1662 1663 if (irq > 0) { 1664 if (!request_irq(irq, phylink_link_handler, 1665 IRQF_TRIGGER_RISING | 1666 IRQF_TRIGGER_FALLING, 1667 "netdev link", pl)) 1668 pl->link_irq = irq; 1669 else 1670 irq = 0; 1671 } 1672 if (irq <= 0) 1673 poll = true; 1674 } 1675 1676 switch (pl->cfg_link_an_mode) { 1677 case MLO_AN_FIXED: 1678 poll |= pl->config->poll_fixed_state; 1679 break; 1680 case MLO_AN_INBAND: 1681 if (pl->pcs) 1682 poll |= pl->pcs->poll; 1683 break; 1684 } 1685 if (poll) 1686 mod_timer(&pl->link_poll, jiffies + HZ); 1687 if (pl->phydev) 1688 phy_start(pl->phydev); 1689 if (pl->sfp_bus) 1690 sfp_upstream_start(pl->sfp_bus); 1691 } 1692 EXPORT_SYMBOL_GPL(phylink_start); 1693 1694 /** 1695 * phylink_stop() - stop a phylink instance 1696 * @pl: a pointer to a &struct phylink returned from phylink_create() 1697 * 1698 * Stop the phylink instance specified by @pl. This should be called from the 1699 * network device driver's &struct net_device_ops ndo_stop() method. The 1700 * network device's carrier state should not be changed prior to calling this 1701 * function. 1702 * 1703 * This will synchronously bring down the link if the link is not already 1704 * down (in other words, it will trigger a mac_link_down() method call.) 1705 */ 1706 void phylink_stop(struct phylink *pl) 1707 { 1708 ASSERT_RTNL(); 1709 1710 if (pl->sfp_bus) 1711 sfp_upstream_stop(pl->sfp_bus); 1712 if (pl->phydev) 1713 phy_stop(pl->phydev); 1714 del_timer_sync(&pl->link_poll); 1715 if (pl->link_irq) { 1716 free_irq(pl->link_irq, pl); 1717 pl->link_irq = 0; 1718 } 1719 1720 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 1721 } 1722 EXPORT_SYMBOL_GPL(phylink_stop); 1723 1724 /** 1725 * phylink_suspend() - handle a network device suspend event 1726 * @pl: a pointer to a &struct phylink returned from phylink_create() 1727 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 1728 * 1729 * Handle a network device suspend event. There are several cases: 1730 * 1731 * - If Wake-on-Lan is not active, we can bring down the link between 1732 * the MAC and PHY by calling phylink_stop(). 1733 * - If Wake-on-Lan is active, and being handled only by the PHY, we 1734 * can also bring down the link between the MAC and PHY. 1735 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 1736 * still needs to receive packets, so we can not bring the link down. 1737 */ 1738 void phylink_suspend(struct phylink *pl, bool mac_wol) 1739 { 1740 ASSERT_RTNL(); 1741 1742 if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) { 1743 /* Wake-on-Lan enabled, MAC handling */ 1744 mutex_lock(&pl->state_mutex); 1745 1746 /* Stop the resolver bringing the link up */ 1747 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 1748 1749 /* Disable the carrier, to prevent transmit timeouts, 1750 * but one would hope all packets have been sent. This 1751 * also means phylink_resolve() will do nothing. 1752 */ 1753 if (pl->netdev) 1754 netif_carrier_off(pl->netdev); 1755 else 1756 pl->old_link_state = false; 1757 1758 /* We do not call mac_link_down() here as we want the 1759 * link to remain up to receive the WoL packets. 1760 */ 1761 mutex_unlock(&pl->state_mutex); 1762 } else { 1763 phylink_stop(pl); 1764 } 1765 } 1766 EXPORT_SYMBOL_GPL(phylink_suspend); 1767 1768 /** 1769 * phylink_resume() - handle a network device resume event 1770 * @pl: a pointer to a &struct phylink returned from phylink_create() 1771 * 1772 * Undo the effects of phylink_suspend(), returning the link to an 1773 * operational state. 1774 */ 1775 void phylink_resume(struct phylink *pl) 1776 { 1777 ASSERT_RTNL(); 1778 1779 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 1780 /* Wake-on-Lan enabled, MAC handling */ 1781 1782 /* Call mac_link_down() so we keep the overall state balanced. 1783 * Do this under the state_mutex lock for consistency. This 1784 * will cause a "Link Down" message to be printed during 1785 * resume, which is harmless - the true link state will be 1786 * printed when we run a resolve. 1787 */ 1788 mutex_lock(&pl->state_mutex); 1789 phylink_link_down(pl); 1790 mutex_unlock(&pl->state_mutex); 1791 1792 /* Re-apply the link parameters so that all the settings get 1793 * restored to the MAC. 1794 */ 1795 phylink_mac_initial_config(pl, true); 1796 1797 /* Re-enable and re-resolve the link parameters */ 1798 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 1799 } else { 1800 phylink_start(pl); 1801 } 1802 } 1803 EXPORT_SYMBOL_GPL(phylink_resume); 1804 1805 /** 1806 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 1807 * @pl: a pointer to a &struct phylink returned from phylink_create() 1808 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 1809 * 1810 * Read the wake on lan parameters from the PHY attached to the phylink 1811 * instance specified by @pl. If no PHY is currently attached, report no 1812 * support for wake on lan. 1813 */ 1814 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 1815 { 1816 ASSERT_RTNL(); 1817 1818 wol->supported = 0; 1819 wol->wolopts = 0; 1820 1821 if (pl->phydev) 1822 phy_ethtool_get_wol(pl->phydev, wol); 1823 } 1824 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 1825 1826 /** 1827 * phylink_ethtool_set_wol() - set wake on lan parameters 1828 * @pl: a pointer to a &struct phylink returned from phylink_create() 1829 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 1830 * 1831 * Set the wake on lan parameters for the PHY attached to the phylink 1832 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 1833 * error. 1834 * 1835 * Returns zero on success or negative errno code. 1836 */ 1837 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 1838 { 1839 int ret = -EOPNOTSUPP; 1840 1841 ASSERT_RTNL(); 1842 1843 if (pl->phydev) 1844 ret = phy_ethtool_set_wol(pl->phydev, wol); 1845 1846 return ret; 1847 } 1848 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 1849 1850 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 1851 { 1852 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 1853 1854 linkmode_zero(mask); 1855 phylink_set_port_modes(mask); 1856 1857 linkmode_and(dst, dst, mask); 1858 linkmode_or(dst, dst, b); 1859 } 1860 1861 static void phylink_get_ksettings(const struct phylink_link_state *state, 1862 struct ethtool_link_ksettings *kset) 1863 { 1864 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 1865 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 1866 kset->base.speed = state->speed; 1867 kset->base.duplex = state->duplex; 1868 kset->base.autoneg = state->an_enabled ? AUTONEG_ENABLE : 1869 AUTONEG_DISABLE; 1870 } 1871 1872 /** 1873 * phylink_ethtool_ksettings_get() - get the current link settings 1874 * @pl: a pointer to a &struct phylink returned from phylink_create() 1875 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 1876 * 1877 * Read the current link settings for the phylink instance specified by @pl. 1878 * This will be the link settings read from the MAC, PHY or fixed link 1879 * settings depending on the current negotiation mode. 1880 */ 1881 int phylink_ethtool_ksettings_get(struct phylink *pl, 1882 struct ethtool_link_ksettings *kset) 1883 { 1884 struct phylink_link_state link_state; 1885 1886 ASSERT_RTNL(); 1887 1888 if (pl->phydev) 1889 phy_ethtool_ksettings_get(pl->phydev, kset); 1890 else 1891 kset->base.port = pl->link_port; 1892 1893 linkmode_copy(kset->link_modes.supported, pl->supported); 1894 1895 switch (pl->cur_link_an_mode) { 1896 case MLO_AN_FIXED: 1897 /* We are using fixed settings. Report these as the 1898 * current link settings - and note that these also 1899 * represent the supported speeds/duplex/pause modes. 1900 */ 1901 phylink_get_fixed_state(pl, &link_state); 1902 phylink_get_ksettings(&link_state, kset); 1903 break; 1904 1905 case MLO_AN_INBAND: 1906 /* If there is a phy attached, then use the reported 1907 * settings from the phy with no modification. 1908 */ 1909 if (pl->phydev) 1910 break; 1911 1912 phylink_mac_pcs_get_state(pl, &link_state); 1913 1914 /* The MAC is reporting the link results from its own PCS 1915 * layer via in-band status. Report these as the current 1916 * link settings. 1917 */ 1918 phylink_get_ksettings(&link_state, kset); 1919 break; 1920 } 1921 1922 return 0; 1923 } 1924 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 1925 1926 /** 1927 * phylink_ethtool_ksettings_set() - set the link settings 1928 * @pl: a pointer to a &struct phylink returned from phylink_create() 1929 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 1930 */ 1931 int phylink_ethtool_ksettings_set(struct phylink *pl, 1932 const struct ethtool_link_ksettings *kset) 1933 { 1934 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 1935 struct phylink_link_state config; 1936 const struct phy_setting *s; 1937 1938 ASSERT_RTNL(); 1939 1940 if (pl->phydev) { 1941 /* We can rely on phylib for this update; we also do not need 1942 * to update the pl->link_config settings: 1943 * - the configuration returned via ksettings_get() will come 1944 * from phylib whenever a PHY is present. 1945 * - link_config.interface will be updated by the PHY calling 1946 * back via phylink_phy_change() and a subsequent resolve. 1947 * - initial link configuration for PHY mode comes from the 1948 * last phy state updated via phylink_phy_change(). 1949 * - other configuration changes (e.g. pause modes) are 1950 * performed directly via phylib. 1951 * - if in in-band mode with a PHY, the link configuration 1952 * is passed on the link from the PHY, and all of 1953 * link_config.{speed,duplex,an_enabled,pause} are not used. 1954 * - the only possible use would be link_config.advertising 1955 * pause modes when in 1000base-X mode with a PHY, but in 1956 * the presence of a PHY, this should not be changed as that 1957 * should be determined from the media side advertisement. 1958 */ 1959 return phy_ethtool_ksettings_set(pl->phydev, kset); 1960 } 1961 1962 config = pl->link_config; 1963 1964 /* Mask out unsupported advertisements */ 1965 linkmode_and(config.advertising, kset->link_modes.advertising, 1966 pl->supported); 1967 1968 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 1969 switch (kset->base.autoneg) { 1970 case AUTONEG_DISABLE: 1971 /* Autonegotiation disabled, select a suitable speed and 1972 * duplex. 1973 */ 1974 s = phy_lookup_setting(kset->base.speed, kset->base.duplex, 1975 pl->supported, false); 1976 if (!s) 1977 return -EINVAL; 1978 1979 /* If we have a fixed link, refuse to change link parameters. 1980 * If the link parameters match, accept them but do nothing. 1981 */ 1982 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 1983 if (s->speed != pl->link_config.speed || 1984 s->duplex != pl->link_config.duplex) 1985 return -EINVAL; 1986 return 0; 1987 } 1988 1989 config.speed = s->speed; 1990 config.duplex = s->duplex; 1991 break; 1992 1993 case AUTONEG_ENABLE: 1994 /* If we have a fixed link, allow autonegotiation (since that 1995 * is our default case) but do not allow the advertisement to 1996 * be changed. If the advertisement matches, simply return. 1997 */ 1998 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 1999 if (!linkmode_equal(config.advertising, 2000 pl->link_config.advertising)) 2001 return -EINVAL; 2002 return 0; 2003 } 2004 2005 config.speed = SPEED_UNKNOWN; 2006 config.duplex = DUPLEX_UNKNOWN; 2007 break; 2008 2009 default: 2010 return -EINVAL; 2011 } 2012 2013 /* We have ruled out the case with a PHY attached, and the 2014 * fixed-link cases. All that is left are in-band links. 2015 */ 2016 config.an_enabled = kset->base.autoneg == AUTONEG_ENABLE; 2017 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2018 config.an_enabled); 2019 2020 /* If this link is with an SFP, ensure that changes to advertised modes 2021 * also cause the associated interface to be selected such that the 2022 * link can be configured correctly. 2023 */ 2024 if (pl->sfp_bus) { 2025 config.interface = sfp_select_interface(pl->sfp_bus, 2026 config.advertising); 2027 if (config.interface == PHY_INTERFACE_MODE_NA) { 2028 phylink_err(pl, 2029 "selection of interface failed, advertisement %*pb\n", 2030 __ETHTOOL_LINK_MODE_MASK_NBITS, 2031 config.advertising); 2032 return -EINVAL; 2033 } 2034 2035 /* Revalidate with the selected interface */ 2036 linkmode_copy(support, pl->supported); 2037 if (phylink_validate(pl, support, &config)) { 2038 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2039 phylink_an_mode_str(pl->cur_link_an_mode), 2040 phy_modes(config.interface), 2041 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2042 return -EINVAL; 2043 } 2044 } else { 2045 /* Validate without changing the current supported mask. */ 2046 linkmode_copy(support, pl->supported); 2047 if (phylink_validate(pl, support, &config)) 2048 return -EINVAL; 2049 } 2050 2051 /* If autonegotiation is enabled, we must have an advertisement */ 2052 if (config.an_enabled && phylink_is_empty_linkmode(config.advertising)) 2053 return -EINVAL; 2054 2055 mutex_lock(&pl->state_mutex); 2056 pl->link_config.speed = config.speed; 2057 pl->link_config.duplex = config.duplex; 2058 pl->link_config.an_enabled = config.an_enabled; 2059 2060 if (pl->link_config.interface != config.interface) { 2061 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2062 /* We need to force the link down, then change the interface */ 2063 if (pl->old_link_state) { 2064 phylink_link_down(pl); 2065 pl->old_link_state = false; 2066 } 2067 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2068 &pl->phylink_disable_state)) 2069 phylink_major_config(pl, false, &config); 2070 pl->link_config.interface = config.interface; 2071 linkmode_copy(pl->link_config.advertising, config.advertising); 2072 } else if (!linkmode_equal(pl->link_config.advertising, 2073 config.advertising)) { 2074 linkmode_copy(pl->link_config.advertising, config.advertising); 2075 phylink_change_inband_advert(pl); 2076 } 2077 mutex_unlock(&pl->state_mutex); 2078 2079 return 0; 2080 } 2081 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 2082 2083 /** 2084 * phylink_ethtool_nway_reset() - restart negotiation 2085 * @pl: a pointer to a &struct phylink returned from phylink_create() 2086 * 2087 * Restart negotiation for the phylink instance specified by @pl. This will 2088 * cause any attached phy to restart negotiation with the link partner, and 2089 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 2090 * negotiation. 2091 * 2092 * Returns zero on success, or negative error code. 2093 */ 2094 int phylink_ethtool_nway_reset(struct phylink *pl) 2095 { 2096 int ret = 0; 2097 2098 ASSERT_RTNL(); 2099 2100 if (pl->phydev) 2101 ret = phy_restart_aneg(pl->phydev); 2102 phylink_mac_pcs_an_restart(pl); 2103 2104 return ret; 2105 } 2106 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 2107 2108 /** 2109 * phylink_ethtool_get_pauseparam() - get the current pause parameters 2110 * @pl: a pointer to a &struct phylink returned from phylink_create() 2111 * @pause: a pointer to a &struct ethtool_pauseparam 2112 */ 2113 void phylink_ethtool_get_pauseparam(struct phylink *pl, 2114 struct ethtool_pauseparam *pause) 2115 { 2116 ASSERT_RTNL(); 2117 2118 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 2119 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 2120 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 2121 } 2122 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 2123 2124 /** 2125 * phylink_ethtool_set_pauseparam() - set the current pause parameters 2126 * @pl: a pointer to a &struct phylink returned from phylink_create() 2127 * @pause: a pointer to a &struct ethtool_pauseparam 2128 */ 2129 int phylink_ethtool_set_pauseparam(struct phylink *pl, 2130 struct ethtool_pauseparam *pause) 2131 { 2132 struct phylink_link_state *config = &pl->link_config; 2133 bool manual_changed; 2134 int pause_state; 2135 2136 ASSERT_RTNL(); 2137 2138 if (pl->cur_link_an_mode == MLO_AN_FIXED) 2139 return -EOPNOTSUPP; 2140 2141 if (!phylink_test(pl->supported, Pause) && 2142 !phylink_test(pl->supported, Asym_Pause)) 2143 return -EOPNOTSUPP; 2144 2145 if (!phylink_test(pl->supported, Asym_Pause) && 2146 pause->rx_pause != pause->tx_pause) 2147 return -EINVAL; 2148 2149 pause_state = 0; 2150 if (pause->autoneg) 2151 pause_state |= MLO_PAUSE_AN; 2152 if (pause->rx_pause) 2153 pause_state |= MLO_PAUSE_RX; 2154 if (pause->tx_pause) 2155 pause_state |= MLO_PAUSE_TX; 2156 2157 mutex_lock(&pl->state_mutex); 2158 /* 2159 * See the comments for linkmode_set_pause(), wrt the deficiencies 2160 * with the current implementation. A solution to this issue would 2161 * be: 2162 * ethtool Local device 2163 * rx tx Pause AsymDir 2164 * 0 0 0 0 2165 * 1 0 1 1 2166 * 0 1 0 1 2167 * 1 1 1 1 2168 * and then use the ethtool rx/tx enablement status to mask the 2169 * rx/tx pause resolution. 2170 */ 2171 linkmode_set_pause(config->advertising, pause->tx_pause, 2172 pause->rx_pause); 2173 2174 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 2175 (!(pause_state & MLO_PAUSE_AN) && 2176 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 2177 2178 config->pause = pause_state; 2179 2180 /* Update our in-band advertisement, triggering a renegotiation if 2181 * the advertisement changed. 2182 */ 2183 if (!pl->phydev) 2184 phylink_change_inband_advert(pl); 2185 2186 mutex_unlock(&pl->state_mutex); 2187 2188 /* If we have a PHY, a change of the pause frame advertisement will 2189 * cause phylib to renegotiate (if AN is enabled) which will in turn 2190 * call our phylink_phy_change() and trigger a resolve. Note that 2191 * we can't hold our state mutex while calling phy_set_asym_pause(). 2192 */ 2193 if (pl->phydev) 2194 phy_set_asym_pause(pl->phydev, pause->rx_pause, 2195 pause->tx_pause); 2196 2197 /* If the manual pause settings changed, make sure we trigger a 2198 * resolve to update their state; we can not guarantee that the 2199 * link will cycle. 2200 */ 2201 if (manual_changed) { 2202 pl->mac_link_dropped = true; 2203 phylink_run_resolve(pl); 2204 } 2205 2206 return 0; 2207 } 2208 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 2209 2210 /** 2211 * phylink_get_eee_err() - read the energy efficient ethernet error 2212 * counter 2213 * @pl: a pointer to a &struct phylink returned from phylink_create(). 2214 * 2215 * Read the Energy Efficient Ethernet error counter from the PHY associated 2216 * with the phylink instance specified by @pl. 2217 * 2218 * Returns positive error counter value, or negative error code. 2219 */ 2220 int phylink_get_eee_err(struct phylink *pl) 2221 { 2222 int ret = 0; 2223 2224 ASSERT_RTNL(); 2225 2226 if (pl->phydev) 2227 ret = phy_get_eee_err(pl->phydev); 2228 2229 return ret; 2230 } 2231 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 2232 2233 /** 2234 * phylink_init_eee() - init and check the EEE features 2235 * @pl: a pointer to a &struct phylink returned from phylink_create() 2236 * @clk_stop_enable: allow PHY to stop receive clock 2237 * 2238 * Must be called either with RTNL held or within mac_link_up() 2239 */ 2240 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) 2241 { 2242 int ret = -EOPNOTSUPP; 2243 2244 if (pl->phydev) 2245 ret = phy_init_eee(pl->phydev, clk_stop_enable); 2246 2247 return ret; 2248 } 2249 EXPORT_SYMBOL_GPL(phylink_init_eee); 2250 2251 /** 2252 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 2253 * @pl: a pointer to a &struct phylink returned from phylink_create() 2254 * @eee: a pointer to a &struct ethtool_eee for the read parameters 2255 */ 2256 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee) 2257 { 2258 int ret = -EOPNOTSUPP; 2259 2260 ASSERT_RTNL(); 2261 2262 if (pl->phydev) 2263 ret = phy_ethtool_get_eee(pl->phydev, eee); 2264 2265 return ret; 2266 } 2267 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 2268 2269 /** 2270 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 2271 * @pl: a pointer to a &struct phylink returned from phylink_create() 2272 * @eee: a pointer to a &struct ethtool_eee for the desired parameters 2273 */ 2274 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee) 2275 { 2276 int ret = -EOPNOTSUPP; 2277 2278 ASSERT_RTNL(); 2279 2280 if (pl->phydev) 2281 ret = phy_ethtool_set_eee(pl->phydev, eee); 2282 2283 return ret; 2284 } 2285 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 2286 2287 /* This emulates MII registers for a fixed-mode phy operating as per the 2288 * passed in state. "aneg" defines if we report negotiation is possible. 2289 * 2290 * FIXME: should deal with negotiation state too. 2291 */ 2292 static int phylink_mii_emul_read(unsigned int reg, 2293 struct phylink_link_state *state) 2294 { 2295 struct fixed_phy_status fs; 2296 unsigned long *lpa = state->lp_advertising; 2297 int val; 2298 2299 fs.link = state->link; 2300 fs.speed = state->speed; 2301 fs.duplex = state->duplex; 2302 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 2303 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 2304 2305 val = swphy_read_reg(reg, &fs); 2306 if (reg == MII_BMSR) { 2307 if (!state->an_complete) 2308 val &= ~BMSR_ANEGCOMPLETE; 2309 } 2310 return val; 2311 } 2312 2313 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 2314 unsigned int reg) 2315 { 2316 struct phy_device *phydev = pl->phydev; 2317 int prtad, devad; 2318 2319 if (mdio_phy_id_is_c45(phy_id)) { 2320 prtad = mdio_phy_id_prtad(phy_id); 2321 devad = mdio_phy_id_devad(phy_id); 2322 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2323 reg); 2324 } 2325 2326 if (phydev->is_c45) { 2327 switch (reg) { 2328 case MII_BMCR: 2329 case MII_BMSR: 2330 case MII_PHYSID1: 2331 case MII_PHYSID2: 2332 devad = __ffs(phydev->c45_ids.mmds_present); 2333 break; 2334 case MII_ADVERTISE: 2335 case MII_LPA: 2336 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2337 return -EINVAL; 2338 devad = MDIO_MMD_AN; 2339 if (reg == MII_ADVERTISE) 2340 reg = MDIO_AN_ADVERTISE; 2341 else 2342 reg = MDIO_AN_LPA; 2343 break; 2344 default: 2345 return -EINVAL; 2346 } 2347 prtad = phy_id; 2348 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2349 reg); 2350 } 2351 2352 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 2353 } 2354 2355 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 2356 unsigned int reg, unsigned int val) 2357 { 2358 struct phy_device *phydev = pl->phydev; 2359 int prtad, devad; 2360 2361 if (mdio_phy_id_is_c45(phy_id)) { 2362 prtad = mdio_phy_id_prtad(phy_id); 2363 devad = mdio_phy_id_devad(phy_id); 2364 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 2365 reg, val); 2366 } 2367 2368 if (phydev->is_c45) { 2369 switch (reg) { 2370 case MII_BMCR: 2371 case MII_BMSR: 2372 case MII_PHYSID1: 2373 case MII_PHYSID2: 2374 devad = __ffs(phydev->c45_ids.mmds_present); 2375 break; 2376 case MII_ADVERTISE: 2377 case MII_LPA: 2378 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2379 return -EINVAL; 2380 devad = MDIO_MMD_AN; 2381 if (reg == MII_ADVERTISE) 2382 reg = MDIO_AN_ADVERTISE; 2383 else 2384 reg = MDIO_AN_LPA; 2385 break; 2386 default: 2387 return -EINVAL; 2388 } 2389 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 2390 reg, val); 2391 } 2392 2393 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 2394 } 2395 2396 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 2397 unsigned int reg) 2398 { 2399 struct phylink_link_state state; 2400 int val = 0xffff; 2401 2402 switch (pl->cur_link_an_mode) { 2403 case MLO_AN_FIXED: 2404 if (phy_id == 0) { 2405 phylink_get_fixed_state(pl, &state); 2406 val = phylink_mii_emul_read(reg, &state); 2407 } 2408 break; 2409 2410 case MLO_AN_PHY: 2411 return -EOPNOTSUPP; 2412 2413 case MLO_AN_INBAND: 2414 if (phy_id == 0) { 2415 phylink_mac_pcs_get_state(pl, &state); 2416 val = phylink_mii_emul_read(reg, &state); 2417 } 2418 break; 2419 } 2420 2421 return val & 0xffff; 2422 } 2423 2424 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 2425 unsigned int reg, unsigned int val) 2426 { 2427 switch (pl->cur_link_an_mode) { 2428 case MLO_AN_FIXED: 2429 break; 2430 2431 case MLO_AN_PHY: 2432 return -EOPNOTSUPP; 2433 2434 case MLO_AN_INBAND: 2435 break; 2436 } 2437 2438 return 0; 2439 } 2440 2441 /** 2442 * phylink_mii_ioctl() - generic mii ioctl interface 2443 * @pl: a pointer to a &struct phylink returned from phylink_create() 2444 * @ifr: a pointer to a &struct ifreq for socket ioctls 2445 * @cmd: ioctl cmd to execute 2446 * 2447 * Perform the specified MII ioctl on the PHY attached to the phylink instance 2448 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 2449 * 2450 * Returns: zero on success or negative error code. 2451 * 2452 * %SIOCGMIIPHY: 2453 * read register from the current PHY. 2454 * %SIOCGMIIREG: 2455 * read register from the specified PHY. 2456 * %SIOCSMIIREG: 2457 * set a register on the specified PHY. 2458 */ 2459 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 2460 { 2461 struct mii_ioctl_data *mii = if_mii(ifr); 2462 int ret; 2463 2464 ASSERT_RTNL(); 2465 2466 if (pl->phydev) { 2467 /* PHYs only exist for MLO_AN_PHY and SGMII */ 2468 switch (cmd) { 2469 case SIOCGMIIPHY: 2470 mii->phy_id = pl->phydev->mdio.addr; 2471 fallthrough; 2472 2473 case SIOCGMIIREG: 2474 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 2475 if (ret >= 0) { 2476 mii->val_out = ret; 2477 ret = 0; 2478 } 2479 break; 2480 2481 case SIOCSMIIREG: 2482 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 2483 mii->val_in); 2484 break; 2485 2486 default: 2487 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 2488 break; 2489 } 2490 } else { 2491 switch (cmd) { 2492 case SIOCGMIIPHY: 2493 mii->phy_id = 0; 2494 fallthrough; 2495 2496 case SIOCGMIIREG: 2497 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 2498 if (ret >= 0) { 2499 mii->val_out = ret; 2500 ret = 0; 2501 } 2502 break; 2503 2504 case SIOCSMIIREG: 2505 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 2506 mii->val_in); 2507 break; 2508 2509 default: 2510 ret = -EOPNOTSUPP; 2511 break; 2512 } 2513 } 2514 2515 return ret; 2516 } 2517 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 2518 2519 /** 2520 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 2521 * link partners 2522 * @pl: a pointer to a &struct phylink returned from phylink_create() 2523 * @sync: perform action synchronously 2524 * 2525 * If we have a PHY that is not part of a SFP module, then set the speed 2526 * as described in the phy_speed_down() function. Please see this function 2527 * for a description of the @sync parameter. 2528 * 2529 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 2530 */ 2531 int phylink_speed_down(struct phylink *pl, bool sync) 2532 { 2533 int ret = 0; 2534 2535 ASSERT_RTNL(); 2536 2537 if (!pl->sfp_bus && pl->phydev) 2538 ret = phy_speed_down(pl->phydev, sync); 2539 2540 return ret; 2541 } 2542 EXPORT_SYMBOL_GPL(phylink_speed_down); 2543 2544 /** 2545 * phylink_speed_up() - restore the advertised speeds prior to the call to 2546 * phylink_speed_down() 2547 * @pl: a pointer to a &struct phylink returned from phylink_create() 2548 * 2549 * If we have a PHY that is not part of a SFP module, then restore the 2550 * PHY speeds as per phy_speed_up(). 2551 * 2552 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 2553 */ 2554 int phylink_speed_up(struct phylink *pl) 2555 { 2556 int ret = 0; 2557 2558 ASSERT_RTNL(); 2559 2560 if (!pl->sfp_bus && pl->phydev) 2561 ret = phy_speed_up(pl->phydev); 2562 2563 return ret; 2564 } 2565 EXPORT_SYMBOL_GPL(phylink_speed_up); 2566 2567 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 2568 { 2569 struct phylink *pl = upstream; 2570 2571 pl->netdev->sfp_bus = bus; 2572 } 2573 2574 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 2575 { 2576 struct phylink *pl = upstream; 2577 2578 pl->netdev->sfp_bus = NULL; 2579 } 2580 2581 static int phylink_sfp_config(struct phylink *pl, u8 mode, 2582 const unsigned long *supported, 2583 const unsigned long *advertising) 2584 { 2585 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1); 2586 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2587 struct phylink_link_state config; 2588 phy_interface_t iface; 2589 bool changed; 2590 int ret; 2591 2592 linkmode_copy(support, supported); 2593 2594 memset(&config, 0, sizeof(config)); 2595 linkmode_copy(config.advertising, advertising); 2596 config.interface = PHY_INTERFACE_MODE_NA; 2597 config.speed = SPEED_UNKNOWN; 2598 config.duplex = DUPLEX_UNKNOWN; 2599 config.pause = MLO_PAUSE_AN; 2600 config.an_enabled = pl->link_config.an_enabled; 2601 2602 /* Ignore errors if we're expecting a PHY to attach later */ 2603 ret = phylink_validate(pl, support, &config); 2604 if (ret) { 2605 phylink_err(pl, "validation with support %*pb failed: %pe\n", 2606 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 2607 ERR_PTR(ret)); 2608 return ret; 2609 } 2610 2611 iface = sfp_select_interface(pl->sfp_bus, config.advertising); 2612 if (iface == PHY_INTERFACE_MODE_NA) { 2613 phylink_err(pl, 2614 "selection of interface failed, advertisement %*pb\n", 2615 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising); 2616 return -EINVAL; 2617 } 2618 2619 config.interface = iface; 2620 linkmode_copy(support1, support); 2621 ret = phylink_validate(pl, support1, &config); 2622 if (ret) { 2623 phylink_err(pl, 2624 "validation of %s/%s with support %*pb failed: %pe\n", 2625 phylink_an_mode_str(mode), 2626 phy_modes(config.interface), 2627 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 2628 ERR_PTR(ret)); 2629 return ret; 2630 } 2631 2632 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 2633 phylink_an_mode_str(mode), phy_modes(config.interface), 2634 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2635 2636 if (phy_interface_mode_is_8023z(iface) && pl->phydev) 2637 return -EINVAL; 2638 2639 changed = !linkmode_equal(pl->supported, support) || 2640 !linkmode_equal(pl->link_config.advertising, 2641 config.advertising); 2642 if (changed) { 2643 linkmode_copy(pl->supported, support); 2644 linkmode_copy(pl->link_config.advertising, config.advertising); 2645 } 2646 2647 if (pl->cur_link_an_mode != mode || 2648 pl->link_config.interface != config.interface) { 2649 pl->link_config.interface = config.interface; 2650 pl->cur_link_an_mode = mode; 2651 2652 changed = true; 2653 2654 phylink_info(pl, "switched to %s/%s link mode\n", 2655 phylink_an_mode_str(mode), 2656 phy_modes(config.interface)); 2657 } 2658 2659 pl->link_port = pl->sfp_port; 2660 2661 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 2662 &pl->phylink_disable_state)) 2663 phylink_mac_initial_config(pl, false); 2664 2665 return ret; 2666 } 2667 2668 static int phylink_sfp_module_insert(void *upstream, 2669 const struct sfp_eeprom_id *id) 2670 { 2671 struct phylink *pl = upstream; 2672 unsigned long *support = pl->sfp_support; 2673 2674 ASSERT_RTNL(); 2675 2676 linkmode_zero(support); 2677 sfp_parse_support(pl->sfp_bus, id, support); 2678 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, support); 2679 2680 /* If this module may have a PHY connecting later, defer until later */ 2681 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 2682 if (pl->sfp_may_have_phy) 2683 return 0; 2684 2685 return phylink_sfp_config(pl, MLO_AN_INBAND, support, support); 2686 } 2687 2688 static int phylink_sfp_module_start(void *upstream) 2689 { 2690 struct phylink *pl = upstream; 2691 2692 /* If this SFP module has a PHY, start the PHY now. */ 2693 if (pl->phydev) { 2694 phy_start(pl->phydev); 2695 return 0; 2696 } 2697 2698 /* If the module may have a PHY but we didn't detect one we 2699 * need to configure the MAC here. 2700 */ 2701 if (!pl->sfp_may_have_phy) 2702 return 0; 2703 2704 return phylink_sfp_config(pl, MLO_AN_INBAND, 2705 pl->sfp_support, pl->sfp_support); 2706 } 2707 2708 static void phylink_sfp_module_stop(void *upstream) 2709 { 2710 struct phylink *pl = upstream; 2711 2712 /* If this SFP module has a PHY, stop it. */ 2713 if (pl->phydev) 2714 phy_stop(pl->phydev); 2715 } 2716 2717 static void phylink_sfp_link_down(void *upstream) 2718 { 2719 struct phylink *pl = upstream; 2720 2721 ASSERT_RTNL(); 2722 2723 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 2724 } 2725 2726 static void phylink_sfp_link_up(void *upstream) 2727 { 2728 struct phylink *pl = upstream; 2729 2730 ASSERT_RTNL(); 2731 2732 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 2733 } 2734 2735 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII 2736 * or 802.3z control word, so inband will not work. 2737 */ 2738 static bool phylink_phy_no_inband(struct phy_device *phy) 2739 { 2740 return phy->is_c45 && 2741 (phy->c45_ids.device_ids[1] & 0xfffffff0) == 0xae025150; 2742 } 2743 2744 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 2745 { 2746 struct phylink *pl = upstream; 2747 phy_interface_t interface; 2748 u8 mode; 2749 int ret; 2750 2751 /* 2752 * This is the new way of dealing with flow control for PHYs, 2753 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 2754 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 2755 * using our validate call to the MAC, we rely upon the MAC 2756 * clearing the bits from both supported and advertising fields. 2757 */ 2758 phy_support_asym_pause(phy); 2759 2760 if (phylink_phy_no_inband(phy)) 2761 mode = MLO_AN_PHY; 2762 else 2763 mode = MLO_AN_INBAND; 2764 2765 /* Do the initial configuration */ 2766 ret = phylink_sfp_config(pl, mode, phy->supported, phy->advertising); 2767 if (ret < 0) 2768 return ret; 2769 2770 interface = pl->link_config.interface; 2771 ret = phylink_attach_phy(pl, phy, interface); 2772 if (ret < 0) 2773 return ret; 2774 2775 ret = phylink_bringup_phy(pl, phy, interface); 2776 if (ret) 2777 phy_detach(phy); 2778 2779 return ret; 2780 } 2781 2782 static void phylink_sfp_disconnect_phy(void *upstream) 2783 { 2784 phylink_disconnect_phy(upstream); 2785 } 2786 2787 static const struct sfp_upstream_ops sfp_phylink_ops = { 2788 .attach = phylink_sfp_attach, 2789 .detach = phylink_sfp_detach, 2790 .module_insert = phylink_sfp_module_insert, 2791 .module_start = phylink_sfp_module_start, 2792 .module_stop = phylink_sfp_module_stop, 2793 .link_up = phylink_sfp_link_up, 2794 .link_down = phylink_sfp_link_down, 2795 .connect_phy = phylink_sfp_connect_phy, 2796 .disconnect_phy = phylink_sfp_disconnect_phy, 2797 }; 2798 2799 /* Helpers for MAC drivers */ 2800 2801 static void phylink_decode_c37_word(struct phylink_link_state *state, 2802 uint16_t config_reg, int speed) 2803 { 2804 bool tx_pause, rx_pause; 2805 int fd_bit; 2806 2807 if (speed == SPEED_2500) 2808 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 2809 else 2810 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 2811 2812 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 2813 2814 if (linkmode_test_bit(fd_bit, state->advertising) && 2815 linkmode_test_bit(fd_bit, state->lp_advertising)) { 2816 state->speed = speed; 2817 state->duplex = DUPLEX_FULL; 2818 } else { 2819 /* negotiation failure */ 2820 state->link = false; 2821 } 2822 2823 linkmode_resolve_pause(state->advertising, state->lp_advertising, 2824 &tx_pause, &rx_pause); 2825 2826 if (tx_pause) 2827 state->pause |= MLO_PAUSE_TX; 2828 if (rx_pause) 2829 state->pause |= MLO_PAUSE_RX; 2830 } 2831 2832 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 2833 uint16_t config_reg) 2834 { 2835 if (!(config_reg & LPA_SGMII_LINK)) { 2836 state->link = false; 2837 return; 2838 } 2839 2840 switch (config_reg & LPA_SGMII_SPD_MASK) { 2841 case LPA_SGMII_10: 2842 state->speed = SPEED_10; 2843 break; 2844 case LPA_SGMII_100: 2845 state->speed = SPEED_100; 2846 break; 2847 case LPA_SGMII_1000: 2848 state->speed = SPEED_1000; 2849 break; 2850 default: 2851 state->link = false; 2852 return; 2853 } 2854 if (config_reg & LPA_SGMII_FULL_DUPLEX) 2855 state->duplex = DUPLEX_FULL; 2856 else 2857 state->duplex = DUPLEX_HALF; 2858 } 2859 2860 /** 2861 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 2862 * @state: a pointer to a struct phylink_link_state. 2863 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 2864 * 2865 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 2866 * code word. Decode the USXGMII code word and populate the corresponding fields 2867 * (speed, duplex) into the phylink_link_state structure. 2868 */ 2869 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 2870 uint16_t lpa) 2871 { 2872 switch (lpa & MDIO_USXGMII_SPD_MASK) { 2873 case MDIO_USXGMII_10: 2874 state->speed = SPEED_10; 2875 break; 2876 case MDIO_USXGMII_100: 2877 state->speed = SPEED_100; 2878 break; 2879 case MDIO_USXGMII_1000: 2880 state->speed = SPEED_1000; 2881 break; 2882 case MDIO_USXGMII_2500: 2883 state->speed = SPEED_2500; 2884 break; 2885 case MDIO_USXGMII_5000: 2886 state->speed = SPEED_5000; 2887 break; 2888 case MDIO_USXGMII_10G: 2889 state->speed = SPEED_10000; 2890 break; 2891 default: 2892 state->link = false; 2893 return; 2894 } 2895 2896 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 2897 state->duplex = DUPLEX_FULL; 2898 else 2899 state->duplex = DUPLEX_HALF; 2900 } 2901 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 2902 2903 /** 2904 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 2905 * @state: a pointer to a &struct phylink_link_state. 2906 * @bmsr: The value of the %MII_BMSR register 2907 * @lpa: The value of the %MII_LPA register 2908 * 2909 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 2910 * clause 37 negotiation and/or SGMII control. 2911 * 2912 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 2913 * the phylink @state structure. This is suitable to be used for implementing 2914 * the mac_pcs_get_state() member of the struct phylink_mac_ops structure if 2915 * accessing @bmsr and @lpa cannot be done with MDIO directly. 2916 */ 2917 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 2918 u16 bmsr, u16 lpa) 2919 { 2920 state->link = !!(bmsr & BMSR_LSTATUS); 2921 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 2922 /* If there is no link or autonegotiation is disabled, the LP advertisement 2923 * data is not meaningful, so don't go any further. 2924 */ 2925 if (!state->link || !state->an_enabled) 2926 return; 2927 2928 switch (state->interface) { 2929 case PHY_INTERFACE_MODE_1000BASEX: 2930 phylink_decode_c37_word(state, lpa, SPEED_1000); 2931 break; 2932 2933 case PHY_INTERFACE_MODE_2500BASEX: 2934 phylink_decode_c37_word(state, lpa, SPEED_2500); 2935 break; 2936 2937 case PHY_INTERFACE_MODE_SGMII: 2938 case PHY_INTERFACE_MODE_QSGMII: 2939 case PHY_INTERFACE_MODE_QUSGMII: 2940 phylink_decode_sgmii_word(state, lpa); 2941 break; 2942 2943 default: 2944 state->link = false; 2945 break; 2946 } 2947 } 2948 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 2949 2950 /** 2951 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 2952 * @pcs: a pointer to a &struct mdio_device. 2953 * @state: a pointer to a &struct phylink_link_state. 2954 * 2955 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 2956 * clause 37 negotiation and/or SGMII control. 2957 * 2958 * Read the MAC PCS state from the MII device configured in @config and 2959 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 2960 * the phylink @state structure. This is suitable to be directly plugged 2961 * into the mac_pcs_get_state() member of the struct phylink_mac_ops 2962 * structure. 2963 */ 2964 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 2965 struct phylink_link_state *state) 2966 { 2967 int bmsr, lpa; 2968 2969 bmsr = mdiodev_read(pcs, MII_BMSR); 2970 lpa = mdiodev_read(pcs, MII_LPA); 2971 if (bmsr < 0 || lpa < 0) { 2972 state->link = false; 2973 return; 2974 } 2975 2976 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa); 2977 } 2978 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 2979 2980 /** 2981 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 2982 * advertisement 2983 * @interface: the PHY interface mode being configured 2984 * @advertising: the ethtool advertisement mask 2985 * 2986 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 2987 * clause 37 negotiation and/or SGMII control. 2988 * 2989 * Encode the clause 37 PCS advertisement as specified by @interface and 2990 * @advertising. 2991 * 2992 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 2993 */ 2994 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 2995 const unsigned long *advertising) 2996 { 2997 u16 adv; 2998 2999 switch (interface) { 3000 case PHY_INTERFACE_MODE_1000BASEX: 3001 case PHY_INTERFACE_MODE_2500BASEX: 3002 adv = ADVERTISE_1000XFULL; 3003 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 3004 advertising)) 3005 adv |= ADVERTISE_1000XPAUSE; 3006 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 3007 advertising)) 3008 adv |= ADVERTISE_1000XPSE_ASYM; 3009 return adv; 3010 case PHY_INTERFACE_MODE_SGMII: 3011 case PHY_INTERFACE_MODE_QSGMII: 3012 return 0x0001; 3013 default: 3014 /* Nothing to do for other modes */ 3015 return -EINVAL; 3016 } 3017 } 3018 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 3019 3020 /** 3021 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 3022 * @pcs: a pointer to a &struct mdio_device. 3023 * @mode: link autonegotiation mode 3024 * @interface: the PHY interface mode being configured 3025 * @advertising: the ethtool advertisement mask 3026 * 3027 * Configure a Clause 22 PCS PHY with the appropriate negotiation 3028 * parameters for the @mode, @interface and @advertising parameters. 3029 * Returns negative error number on failure, zero if the advertisement 3030 * has not changed, or positive if there is a change. 3031 */ 3032 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, unsigned int mode, 3033 phy_interface_t interface, 3034 const unsigned long *advertising) 3035 { 3036 bool changed = 0; 3037 u16 bmcr; 3038 int ret, adv; 3039 3040 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 3041 if (adv >= 0) { 3042 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 3043 MII_ADVERTISE, 0xffff, adv); 3044 if (ret < 0) 3045 return ret; 3046 changed = ret; 3047 } 3048 3049 /* Ensure ISOLATE bit is disabled */ 3050 if (mode == MLO_AN_INBAND && 3051 (interface == PHY_INTERFACE_MODE_SGMII || 3052 interface == PHY_INTERFACE_MODE_QSGMII || 3053 linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, advertising))) 3054 bmcr = BMCR_ANENABLE; 3055 else 3056 bmcr = 0; 3057 3058 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 3059 if (ret < 0) 3060 return ret; 3061 3062 return changed; 3063 } 3064 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 3065 3066 /** 3067 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 3068 * @pcs: a pointer to a &struct mdio_device. 3069 * 3070 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3071 * clause 37 negotiation. 3072 * 3073 * Restart the clause 37 negotiation with the link partner. This is 3074 * suitable to be directly plugged into the mac_pcs_get_state() member 3075 * of the struct phylink_mac_ops structure. 3076 */ 3077 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 3078 { 3079 int val = mdiodev_read(pcs, MII_BMCR); 3080 3081 if (val >= 0) { 3082 val |= BMCR_ANRESTART; 3083 3084 mdiodev_write(pcs, MII_BMCR, val); 3085 } 3086 } 3087 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 3088 3089 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 3090 struct phylink_link_state *state) 3091 { 3092 struct mii_bus *bus = pcs->bus; 3093 int addr = pcs->addr; 3094 int stat; 3095 3096 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 3097 if (stat < 0) { 3098 state->link = false; 3099 return; 3100 } 3101 3102 state->link = !!(stat & MDIO_STAT1_LSTATUS); 3103 if (!state->link) 3104 return; 3105 3106 switch (state->interface) { 3107 case PHY_INTERFACE_MODE_10GBASER: 3108 state->speed = SPEED_10000; 3109 state->duplex = DUPLEX_FULL; 3110 break; 3111 3112 default: 3113 break; 3114 } 3115 } 3116 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 3117 3118 MODULE_LICENSE("GPL v2"); 3119