1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "sfp.h" 24 #include "swphy.h" 25 26 #define SUPPORTED_INTERFACES \ 27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 29 #define ADVERTISED_INTERFACES \ 30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 32 33 enum { 34 PHYLINK_DISABLE_STOPPED, 35 PHYLINK_DISABLE_LINK, 36 PHYLINK_DISABLE_MAC_WOL, 37 }; 38 39 /** 40 * struct phylink - internal data type for phylink 41 */ 42 struct phylink { 43 /* private: */ 44 struct net_device *netdev; 45 const struct phylink_mac_ops *mac_ops; 46 struct phylink_config *config; 47 struct phylink_pcs *pcs; 48 struct device *dev; 49 unsigned int old_link_state:1; 50 51 unsigned long phylink_disable_state; /* bitmask of disables */ 52 struct phy_device *phydev; 53 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 54 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 55 u8 cur_link_an_mode; 56 u8 link_port; /* The current non-phy ethtool port */ 57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 58 59 /* The link configuration settings */ 60 struct phylink_link_state link_config; 61 62 /* The current settings */ 63 phy_interface_t cur_interface; 64 65 struct gpio_desc *link_gpio; 66 unsigned int link_irq; 67 struct timer_list link_poll; 68 void (*get_fixed_state)(struct net_device *dev, 69 struct phylink_link_state *s); 70 71 struct mutex state_mutex; 72 struct phylink_link_state phy_state; 73 struct work_struct resolve; 74 75 bool mac_link_dropped; 76 bool using_mac_select_pcs; 77 78 struct sfp_bus *sfp_bus; 79 bool sfp_may_have_phy; 80 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 81 u8 sfp_port; 82 }; 83 84 #define phylink_printk(level, pl, fmt, ...) \ 85 do { \ 86 if ((pl)->config->type == PHYLINK_NETDEV) \ 87 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 88 else if ((pl)->config->type == PHYLINK_DEV) \ 89 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 90 } while (0) 91 92 #define phylink_err(pl, fmt, ...) \ 93 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 94 #define phylink_warn(pl, fmt, ...) \ 95 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 96 #define phylink_info(pl, fmt, ...) \ 97 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 98 #if defined(CONFIG_DYNAMIC_DEBUG) 99 #define phylink_dbg(pl, fmt, ...) \ 100 do { \ 101 if ((pl)->config->type == PHYLINK_NETDEV) \ 102 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 103 else if ((pl)->config->type == PHYLINK_DEV) \ 104 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 105 } while (0) 106 #elif defined(DEBUG) 107 #define phylink_dbg(pl, fmt, ...) \ 108 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 109 #else 110 #define phylink_dbg(pl, fmt, ...) \ 111 ({ \ 112 if (0) \ 113 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 114 }) 115 #endif 116 117 /** 118 * phylink_set_port_modes() - set the port type modes in the ethtool mask 119 * @mask: ethtool link mode mask 120 * 121 * Sets all the port type modes in the ethtool mask. MAC drivers should 122 * use this in their 'validate' callback. 123 */ 124 void phylink_set_port_modes(unsigned long *mask) 125 { 126 phylink_set(mask, TP); 127 phylink_set(mask, AUI); 128 phylink_set(mask, MII); 129 phylink_set(mask, FIBRE); 130 phylink_set(mask, BNC); 131 phylink_set(mask, Backplane); 132 } 133 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 134 135 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 136 { 137 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 138 139 phylink_set_port_modes(tmp); 140 phylink_set(tmp, Autoneg); 141 phylink_set(tmp, Pause); 142 phylink_set(tmp, Asym_Pause); 143 144 return linkmode_subset(linkmode, tmp); 145 } 146 147 static const char *phylink_an_mode_str(unsigned int mode) 148 { 149 static const char *modestr[] = { 150 [MLO_AN_PHY] = "phy", 151 [MLO_AN_FIXED] = "fixed", 152 [MLO_AN_INBAND] = "inband", 153 }; 154 155 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 156 } 157 158 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 159 unsigned long caps) 160 { 161 if (caps & MAC_SYM_PAUSE) 162 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 163 164 if (caps & MAC_ASYM_PAUSE) 165 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 166 167 if (caps & MAC_10HD) 168 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes); 169 170 if (caps & MAC_10FD) { 171 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes); 172 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes); 173 } 174 175 if (caps & MAC_100HD) { 176 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes); 177 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes); 178 } 179 180 if (caps & MAC_100FD) { 181 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes); 182 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes); 183 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes); 184 } 185 186 if (caps & MAC_1000HD) 187 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes); 188 189 if (caps & MAC_1000FD) { 190 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes); 191 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes); 192 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes); 193 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes); 194 } 195 196 if (caps & MAC_2500FD) { 197 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes); 198 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes); 199 } 200 201 if (caps & MAC_5000FD) 202 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes); 203 204 if (caps & MAC_10000FD) { 205 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes); 206 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes); 207 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes); 208 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes); 209 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes); 210 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes); 211 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes); 212 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes); 213 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes); 214 } 215 216 if (caps & MAC_25000FD) { 217 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes); 218 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes); 219 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes); 220 } 221 222 if (caps & MAC_40000FD) { 223 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes); 224 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes); 225 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes); 226 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes); 227 } 228 229 if (caps & MAC_50000FD) { 230 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes); 231 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes); 232 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes); 233 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes); 234 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes); 235 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes); 236 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 237 linkmodes); 238 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes); 239 } 240 241 if (caps & MAC_56000FD) { 242 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes); 243 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes); 244 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes); 245 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes); 246 } 247 248 if (caps & MAC_100000FD) { 249 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes); 250 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes); 251 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes); 252 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 253 linkmodes); 254 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes); 255 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes); 256 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes); 257 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 258 linkmodes); 259 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes); 260 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes); 261 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes); 262 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 263 linkmodes); 264 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes); 265 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes); 266 } 267 268 if (caps & MAC_200000FD) { 269 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes); 270 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes); 271 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 272 linkmodes); 273 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes); 274 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes); 275 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes); 276 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes); 277 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 278 linkmodes); 279 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes); 280 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes); 281 } 282 283 if (caps & MAC_400000FD) { 284 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes); 285 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes); 286 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 287 linkmodes); 288 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes); 289 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes); 290 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes); 291 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes); 292 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 293 linkmodes); 294 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes); 295 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes); 296 } 297 } 298 299 /** 300 * phylink_get_linkmodes() - get acceptable link modes 301 * @linkmodes: ethtool linkmode mask (must be already initialised) 302 * @interface: phy interface mode defined by &typedef phy_interface_t 303 * @mac_capabilities: bitmask of MAC capabilities 304 * 305 * Set all possible pause, speed and duplex linkmodes in @linkmodes that 306 * are supported by the @interface mode and @mac_capabilities. @linkmodes 307 * must have been initialised previously. 308 */ 309 void phylink_get_linkmodes(unsigned long *linkmodes, phy_interface_t interface, 310 unsigned long mac_capabilities) 311 { 312 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 313 314 switch (interface) { 315 case PHY_INTERFACE_MODE_USXGMII: 316 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD; 317 fallthrough; 318 319 case PHY_INTERFACE_MODE_RGMII_TXID: 320 case PHY_INTERFACE_MODE_RGMII_RXID: 321 case PHY_INTERFACE_MODE_RGMII_ID: 322 case PHY_INTERFACE_MODE_RGMII: 323 case PHY_INTERFACE_MODE_QSGMII: 324 case PHY_INTERFACE_MODE_QUSGMII: 325 case PHY_INTERFACE_MODE_SGMII: 326 case PHY_INTERFACE_MODE_GMII: 327 caps |= MAC_1000HD | MAC_1000FD; 328 fallthrough; 329 330 case PHY_INTERFACE_MODE_REVRMII: 331 case PHY_INTERFACE_MODE_RMII: 332 case PHY_INTERFACE_MODE_SMII: 333 case PHY_INTERFACE_MODE_REVMII: 334 case PHY_INTERFACE_MODE_MII: 335 caps |= MAC_10HD | MAC_10FD; 336 fallthrough; 337 338 case PHY_INTERFACE_MODE_100BASEX: 339 caps |= MAC_100HD | MAC_100FD; 340 break; 341 342 case PHY_INTERFACE_MODE_TBI: 343 case PHY_INTERFACE_MODE_MOCA: 344 case PHY_INTERFACE_MODE_RTBI: 345 case PHY_INTERFACE_MODE_1000BASEX: 346 caps |= MAC_1000HD; 347 fallthrough; 348 case PHY_INTERFACE_MODE_1000BASEKX: 349 case PHY_INTERFACE_MODE_TRGMII: 350 caps |= MAC_1000FD; 351 break; 352 353 case PHY_INTERFACE_MODE_2500BASEX: 354 caps |= MAC_2500FD; 355 break; 356 357 case PHY_INTERFACE_MODE_5GBASER: 358 caps |= MAC_5000FD; 359 break; 360 361 case PHY_INTERFACE_MODE_XGMII: 362 case PHY_INTERFACE_MODE_RXAUI: 363 case PHY_INTERFACE_MODE_XAUI: 364 case PHY_INTERFACE_MODE_10GBASER: 365 case PHY_INTERFACE_MODE_10GKR: 366 caps |= MAC_10000FD; 367 break; 368 369 case PHY_INTERFACE_MODE_25GBASER: 370 caps |= MAC_25000FD; 371 break; 372 373 case PHY_INTERFACE_MODE_XLGMII: 374 caps |= MAC_40000FD; 375 break; 376 377 case PHY_INTERFACE_MODE_INTERNAL: 378 caps |= ~0; 379 break; 380 381 case PHY_INTERFACE_MODE_NA: 382 case PHY_INTERFACE_MODE_MAX: 383 break; 384 } 385 386 phylink_caps_to_linkmodes(linkmodes, caps & mac_capabilities); 387 } 388 EXPORT_SYMBOL_GPL(phylink_get_linkmodes); 389 390 /** 391 * phylink_generic_validate() - generic validate() callback implementation 392 * @config: a pointer to a &struct phylink_config. 393 * @supported: ethtool bitmask for supported link modes. 394 * @state: a pointer to a &struct phylink_link_state. 395 * 396 * Generic implementation of the validate() callback that MAC drivers can 397 * use when they pass the range of supported interfaces and MAC capabilities. 398 * This makes use of phylink_get_linkmodes(). 399 */ 400 void phylink_generic_validate(struct phylink_config *config, 401 unsigned long *supported, 402 struct phylink_link_state *state) 403 { 404 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 405 406 phylink_set_port_modes(mask); 407 phylink_set(mask, Autoneg); 408 phylink_get_linkmodes(mask, state->interface, config->mac_capabilities); 409 410 linkmode_and(supported, supported, mask); 411 linkmode_and(state->advertising, state->advertising, mask); 412 } 413 EXPORT_SYMBOL_GPL(phylink_generic_validate); 414 415 static int phylink_validate_mac_and_pcs(struct phylink *pl, 416 unsigned long *supported, 417 struct phylink_link_state *state) 418 { 419 struct phylink_pcs *pcs; 420 int ret; 421 422 /* Get the PCS for this interface mode */ 423 if (pl->using_mac_select_pcs) { 424 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 425 if (IS_ERR(pcs)) 426 return PTR_ERR(pcs); 427 } else { 428 pcs = pl->pcs; 429 } 430 431 if (pcs) { 432 /* The PCS, if present, must be setup before phylink_create() 433 * has been called. If the ops is not initialised, print an 434 * error and backtrace rather than oopsing the kernel. 435 */ 436 if (!pcs->ops) { 437 phylink_err(pl, "interface %s: uninitialised PCS\n", 438 phy_modes(state->interface)); 439 dump_stack(); 440 return -EINVAL; 441 } 442 443 /* Validate the link parameters with the PCS */ 444 if (pcs->ops->pcs_validate) { 445 ret = pcs->ops->pcs_validate(pcs, supported, state); 446 if (ret < 0 || phylink_is_empty_linkmode(supported)) 447 return -EINVAL; 448 449 /* Ensure the advertising mask is a subset of the 450 * supported mask. 451 */ 452 linkmode_and(state->advertising, state->advertising, 453 supported); 454 } 455 } 456 457 /* Then validate the link parameters with the MAC */ 458 pl->mac_ops->validate(pl->config, supported, state); 459 460 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 461 } 462 463 static int phylink_validate_any(struct phylink *pl, unsigned long *supported, 464 struct phylink_link_state *state) 465 { 466 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 467 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 468 __ETHTOOL_DECLARE_LINK_MODE_MASK(s); 469 struct phylink_link_state t; 470 int intf; 471 472 for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) { 473 if (test_bit(intf, pl->config->supported_interfaces)) { 474 linkmode_copy(s, supported); 475 476 t = *state; 477 t.interface = intf; 478 if (!phylink_validate_mac_and_pcs(pl, s, &t)) { 479 linkmode_or(all_s, all_s, s); 480 linkmode_or(all_adv, all_adv, t.advertising); 481 } 482 } 483 } 484 485 linkmode_copy(supported, all_s); 486 linkmode_copy(state->advertising, all_adv); 487 488 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 489 } 490 491 static int phylink_validate(struct phylink *pl, unsigned long *supported, 492 struct phylink_link_state *state) 493 { 494 if (!phy_interface_empty(pl->config->supported_interfaces)) { 495 if (state->interface == PHY_INTERFACE_MODE_NA) 496 return phylink_validate_any(pl, supported, state); 497 498 if (!test_bit(state->interface, 499 pl->config->supported_interfaces)) 500 return -EINVAL; 501 } 502 503 return phylink_validate_mac_and_pcs(pl, supported, state); 504 } 505 506 static int phylink_parse_fixedlink(struct phylink *pl, 507 struct fwnode_handle *fwnode) 508 { 509 struct fwnode_handle *fixed_node; 510 const struct phy_setting *s; 511 struct gpio_desc *desc; 512 u32 speed; 513 int ret; 514 515 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 516 if (fixed_node) { 517 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 518 519 pl->link_config.speed = speed; 520 pl->link_config.duplex = DUPLEX_HALF; 521 522 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 523 pl->link_config.duplex = DUPLEX_FULL; 524 525 /* We treat the "pause" and "asym-pause" terminology as 526 * defining the link partner's ability. 527 */ 528 if (fwnode_property_read_bool(fixed_node, "pause")) 529 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 530 pl->link_config.lp_advertising); 531 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 532 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 533 pl->link_config.lp_advertising); 534 535 if (ret == 0) { 536 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 537 GPIOD_IN, "?"); 538 539 if (!IS_ERR(desc)) 540 pl->link_gpio = desc; 541 else if (desc == ERR_PTR(-EPROBE_DEFER)) 542 ret = -EPROBE_DEFER; 543 } 544 fwnode_handle_put(fixed_node); 545 546 if (ret) 547 return ret; 548 } else { 549 u32 prop[5]; 550 551 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 552 NULL, 0); 553 if (ret != ARRAY_SIZE(prop)) { 554 phylink_err(pl, "broken fixed-link?\n"); 555 return -EINVAL; 556 } 557 558 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 559 prop, ARRAY_SIZE(prop)); 560 if (!ret) { 561 pl->link_config.duplex = prop[1] ? 562 DUPLEX_FULL : DUPLEX_HALF; 563 pl->link_config.speed = prop[2]; 564 if (prop[3]) 565 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 566 pl->link_config.lp_advertising); 567 if (prop[4]) 568 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 569 pl->link_config.lp_advertising); 570 } 571 } 572 573 if (pl->link_config.speed > SPEED_1000 && 574 pl->link_config.duplex != DUPLEX_FULL) 575 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 576 pl->link_config.speed); 577 578 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 579 linkmode_copy(pl->link_config.advertising, pl->supported); 580 phylink_validate(pl, pl->supported, &pl->link_config); 581 582 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, 583 pl->supported, true); 584 linkmode_zero(pl->supported); 585 phylink_set(pl->supported, MII); 586 phylink_set(pl->supported, Pause); 587 phylink_set(pl->supported, Asym_Pause); 588 phylink_set(pl->supported, Autoneg); 589 if (s) { 590 __set_bit(s->bit, pl->supported); 591 __set_bit(s->bit, pl->link_config.lp_advertising); 592 } else { 593 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 594 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 595 pl->link_config.speed); 596 } 597 598 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 599 pl->supported); 600 601 pl->link_config.link = 1; 602 pl->link_config.an_complete = 1; 603 604 return 0; 605 } 606 607 static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode) 608 { 609 struct fwnode_handle *dn; 610 const char *managed; 611 612 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 613 if (dn || fwnode_property_present(fwnode, "fixed-link")) 614 pl->cfg_link_an_mode = MLO_AN_FIXED; 615 fwnode_handle_put(dn); 616 617 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 618 strcmp(managed, "in-band-status") == 0) || 619 pl->config->ovr_an_inband) { 620 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 621 phylink_err(pl, 622 "can't use both fixed-link and in-band-status\n"); 623 return -EINVAL; 624 } 625 626 linkmode_zero(pl->supported); 627 phylink_set(pl->supported, MII); 628 phylink_set(pl->supported, Autoneg); 629 phylink_set(pl->supported, Asym_Pause); 630 phylink_set(pl->supported, Pause); 631 pl->link_config.an_enabled = true; 632 pl->cfg_link_an_mode = MLO_AN_INBAND; 633 634 switch (pl->link_config.interface) { 635 case PHY_INTERFACE_MODE_SGMII: 636 case PHY_INTERFACE_MODE_QSGMII: 637 case PHY_INTERFACE_MODE_QUSGMII: 638 case PHY_INTERFACE_MODE_RGMII: 639 case PHY_INTERFACE_MODE_RGMII_ID: 640 case PHY_INTERFACE_MODE_RGMII_RXID: 641 case PHY_INTERFACE_MODE_RGMII_TXID: 642 case PHY_INTERFACE_MODE_RTBI: 643 phylink_set(pl->supported, 10baseT_Half); 644 phylink_set(pl->supported, 10baseT_Full); 645 phylink_set(pl->supported, 100baseT_Half); 646 phylink_set(pl->supported, 100baseT_Full); 647 phylink_set(pl->supported, 1000baseT_Half); 648 phylink_set(pl->supported, 1000baseT_Full); 649 break; 650 651 case PHY_INTERFACE_MODE_1000BASEX: 652 phylink_set(pl->supported, 1000baseX_Full); 653 break; 654 655 case PHY_INTERFACE_MODE_2500BASEX: 656 phylink_set(pl->supported, 2500baseX_Full); 657 break; 658 659 case PHY_INTERFACE_MODE_5GBASER: 660 phylink_set(pl->supported, 5000baseT_Full); 661 break; 662 663 case PHY_INTERFACE_MODE_25GBASER: 664 phylink_set(pl->supported, 25000baseCR_Full); 665 phylink_set(pl->supported, 25000baseKR_Full); 666 phylink_set(pl->supported, 25000baseSR_Full); 667 fallthrough; 668 case PHY_INTERFACE_MODE_USXGMII: 669 case PHY_INTERFACE_MODE_10GKR: 670 case PHY_INTERFACE_MODE_10GBASER: 671 phylink_set(pl->supported, 10baseT_Half); 672 phylink_set(pl->supported, 10baseT_Full); 673 phylink_set(pl->supported, 100baseT_Half); 674 phylink_set(pl->supported, 100baseT_Full); 675 phylink_set(pl->supported, 1000baseT_Half); 676 phylink_set(pl->supported, 1000baseT_Full); 677 phylink_set(pl->supported, 1000baseX_Full); 678 phylink_set(pl->supported, 1000baseKX_Full); 679 phylink_set(pl->supported, 2500baseT_Full); 680 phylink_set(pl->supported, 2500baseX_Full); 681 phylink_set(pl->supported, 5000baseT_Full); 682 phylink_set(pl->supported, 10000baseT_Full); 683 phylink_set(pl->supported, 10000baseKR_Full); 684 phylink_set(pl->supported, 10000baseKX4_Full); 685 phylink_set(pl->supported, 10000baseCR_Full); 686 phylink_set(pl->supported, 10000baseSR_Full); 687 phylink_set(pl->supported, 10000baseLR_Full); 688 phylink_set(pl->supported, 10000baseLRM_Full); 689 phylink_set(pl->supported, 10000baseER_Full); 690 break; 691 692 case PHY_INTERFACE_MODE_XLGMII: 693 phylink_set(pl->supported, 25000baseCR_Full); 694 phylink_set(pl->supported, 25000baseKR_Full); 695 phylink_set(pl->supported, 25000baseSR_Full); 696 phylink_set(pl->supported, 40000baseKR4_Full); 697 phylink_set(pl->supported, 40000baseCR4_Full); 698 phylink_set(pl->supported, 40000baseSR4_Full); 699 phylink_set(pl->supported, 40000baseLR4_Full); 700 phylink_set(pl->supported, 50000baseCR2_Full); 701 phylink_set(pl->supported, 50000baseKR2_Full); 702 phylink_set(pl->supported, 50000baseSR2_Full); 703 phylink_set(pl->supported, 50000baseKR_Full); 704 phylink_set(pl->supported, 50000baseSR_Full); 705 phylink_set(pl->supported, 50000baseCR_Full); 706 phylink_set(pl->supported, 50000baseLR_ER_FR_Full); 707 phylink_set(pl->supported, 50000baseDR_Full); 708 phylink_set(pl->supported, 100000baseKR4_Full); 709 phylink_set(pl->supported, 100000baseSR4_Full); 710 phylink_set(pl->supported, 100000baseCR4_Full); 711 phylink_set(pl->supported, 100000baseLR4_ER4_Full); 712 phylink_set(pl->supported, 100000baseKR2_Full); 713 phylink_set(pl->supported, 100000baseSR2_Full); 714 phylink_set(pl->supported, 100000baseCR2_Full); 715 phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full); 716 phylink_set(pl->supported, 100000baseDR2_Full); 717 break; 718 719 default: 720 phylink_err(pl, 721 "incorrect link mode %s for in-band status\n", 722 phy_modes(pl->link_config.interface)); 723 return -EINVAL; 724 } 725 726 linkmode_copy(pl->link_config.advertising, pl->supported); 727 728 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 729 phylink_err(pl, 730 "failed to validate link configuration for in-band status\n"); 731 return -EINVAL; 732 } 733 734 /* Check if MAC/PCS also supports Autoneg. */ 735 pl->link_config.an_enabled = phylink_test(pl->supported, Autoneg); 736 } 737 738 return 0; 739 } 740 741 static void phylink_apply_manual_flow(struct phylink *pl, 742 struct phylink_link_state *state) 743 { 744 /* If autoneg is disabled, pause AN is also disabled */ 745 if (!state->an_enabled) 746 state->pause &= ~MLO_PAUSE_AN; 747 748 /* Manual configuration of pause modes */ 749 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 750 state->pause = pl->link_config.pause; 751 } 752 753 static void phylink_resolve_flow(struct phylink_link_state *state) 754 { 755 bool tx_pause, rx_pause; 756 757 state->pause = MLO_PAUSE_NONE; 758 if (state->duplex == DUPLEX_FULL) { 759 linkmode_resolve_pause(state->advertising, 760 state->lp_advertising, 761 &tx_pause, &rx_pause); 762 if (tx_pause) 763 state->pause |= MLO_PAUSE_TX; 764 if (rx_pause) 765 state->pause |= MLO_PAUSE_RX; 766 } 767 } 768 769 static void phylink_pcs_poll_stop(struct phylink *pl) 770 { 771 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 772 del_timer(&pl->link_poll); 773 } 774 775 static void phylink_pcs_poll_start(struct phylink *pl) 776 { 777 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 778 mod_timer(&pl->link_poll, jiffies + HZ); 779 } 780 781 static void phylink_mac_config(struct phylink *pl, 782 const struct phylink_link_state *state) 783 { 784 phylink_dbg(pl, 785 "%s: mode=%s/%s/%s/%s adv=%*pb pause=%02x link=%u an=%u\n", 786 __func__, phylink_an_mode_str(pl->cur_link_an_mode), 787 phy_modes(state->interface), 788 phy_speed_to_str(state->speed), 789 phy_duplex_to_str(state->duplex), 790 __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising, 791 state->pause, state->link, state->an_enabled); 792 793 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, state); 794 } 795 796 static void phylink_mac_pcs_an_restart(struct phylink *pl) 797 { 798 if (pl->link_config.an_enabled && 799 phy_interface_mode_is_8023z(pl->link_config.interface) && 800 phylink_autoneg_inband(pl->cur_link_an_mode)) { 801 if (pl->pcs) 802 pl->pcs->ops->pcs_an_restart(pl->pcs); 803 else if (pl->config->legacy_pre_march2020) 804 pl->mac_ops->mac_an_restart(pl->config); 805 } 806 } 807 808 static void phylink_major_config(struct phylink *pl, bool restart, 809 const struct phylink_link_state *state) 810 { 811 struct phylink_pcs *pcs = NULL; 812 bool pcs_changed = false; 813 int err; 814 815 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); 816 817 if (pl->using_mac_select_pcs) { 818 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 819 if (IS_ERR(pcs)) { 820 phylink_err(pl, 821 "mac_select_pcs unexpectedly failed: %pe\n", 822 pcs); 823 return; 824 } 825 826 pcs_changed = pcs && pl->pcs != pcs; 827 } 828 829 phylink_pcs_poll_stop(pl); 830 831 if (pl->mac_ops->mac_prepare) { 832 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode, 833 state->interface); 834 if (err < 0) { 835 phylink_err(pl, "mac_prepare failed: %pe\n", 836 ERR_PTR(err)); 837 return; 838 } 839 } 840 841 /* If we have a new PCS, switch to the new PCS after preparing the MAC 842 * for the change. 843 */ 844 if (pcs_changed) 845 pl->pcs = pcs; 846 847 phylink_mac_config(pl, state); 848 849 if (pl->pcs) { 850 err = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode, 851 state->interface, 852 state->advertising, 853 !!(pl->link_config.pause & 854 MLO_PAUSE_AN)); 855 if (err < 0) 856 phylink_err(pl, "pcs_config failed: %pe\n", 857 ERR_PTR(err)); 858 if (err > 0) 859 restart = true; 860 } 861 if (restart) 862 phylink_mac_pcs_an_restart(pl); 863 864 if (pl->mac_ops->mac_finish) { 865 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode, 866 state->interface); 867 if (err < 0) 868 phylink_err(pl, "mac_finish failed: %pe\n", 869 ERR_PTR(err)); 870 } 871 872 phylink_pcs_poll_start(pl); 873 } 874 875 /* 876 * Reconfigure for a change of inband advertisement. 877 * If we have a separate PCS, we only need to call its pcs_config() method, 878 * and then restart AN if it indicates something changed. Otherwise, we do 879 * the full MAC reconfiguration. 880 */ 881 static int phylink_change_inband_advert(struct phylink *pl) 882 { 883 int ret; 884 885 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 886 return 0; 887 888 if (!pl->pcs && pl->config->legacy_pre_march2020) { 889 /* Legacy method */ 890 phylink_mac_config(pl, &pl->link_config); 891 phylink_mac_pcs_an_restart(pl); 892 return 0; 893 } 894 895 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 896 phylink_an_mode_str(pl->cur_link_an_mode), 897 phy_modes(pl->link_config.interface), 898 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 899 pl->link_config.pause); 900 901 /* Modern PCS-based method; update the advert at the PCS, and 902 * restart negotiation if the pcs_config() helper indicates that 903 * the programmed advertisement has changed. 904 */ 905 ret = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode, 906 pl->link_config.interface, 907 pl->link_config.advertising, 908 !!(pl->link_config.pause & 909 MLO_PAUSE_AN)); 910 if (ret < 0) 911 return ret; 912 913 if (ret > 0) 914 phylink_mac_pcs_an_restart(pl); 915 916 return 0; 917 } 918 919 static void phylink_mac_pcs_get_state(struct phylink *pl, 920 struct phylink_link_state *state) 921 { 922 linkmode_copy(state->advertising, pl->link_config.advertising); 923 linkmode_zero(state->lp_advertising); 924 state->interface = pl->link_config.interface; 925 state->an_enabled = pl->link_config.an_enabled; 926 if (state->an_enabled) { 927 state->speed = SPEED_UNKNOWN; 928 state->duplex = DUPLEX_UNKNOWN; 929 state->pause = MLO_PAUSE_NONE; 930 } else { 931 state->speed = pl->link_config.speed; 932 state->duplex = pl->link_config.duplex; 933 state->pause = pl->link_config.pause; 934 } 935 state->an_complete = 0; 936 state->link = 1; 937 938 if (pl->pcs) 939 pl->pcs->ops->pcs_get_state(pl->pcs, state); 940 else if (pl->mac_ops->mac_pcs_get_state && 941 pl->config->legacy_pre_march2020) 942 pl->mac_ops->mac_pcs_get_state(pl->config, state); 943 else 944 state->link = 0; 945 } 946 947 /* The fixed state is... fixed except for the link state, 948 * which may be determined by a GPIO or a callback. 949 */ 950 static void phylink_get_fixed_state(struct phylink *pl, 951 struct phylink_link_state *state) 952 { 953 *state = pl->link_config; 954 if (pl->config->get_fixed_state) 955 pl->config->get_fixed_state(pl->config, state); 956 else if (pl->link_gpio) 957 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 958 959 phylink_resolve_flow(state); 960 } 961 962 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 963 { 964 struct phylink_link_state link_state; 965 966 switch (pl->cur_link_an_mode) { 967 case MLO_AN_PHY: 968 link_state = pl->phy_state; 969 break; 970 971 case MLO_AN_FIXED: 972 phylink_get_fixed_state(pl, &link_state); 973 break; 974 975 case MLO_AN_INBAND: 976 link_state = pl->link_config; 977 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 978 link_state.pause = MLO_PAUSE_NONE; 979 break; 980 981 default: /* can't happen */ 982 return; 983 } 984 985 link_state.link = false; 986 987 phylink_apply_manual_flow(pl, &link_state); 988 phylink_major_config(pl, force_restart, &link_state); 989 } 990 991 static const char *phylink_pause_to_str(int pause) 992 { 993 switch (pause & MLO_PAUSE_TXRX_MASK) { 994 case MLO_PAUSE_TX | MLO_PAUSE_RX: 995 return "rx/tx"; 996 case MLO_PAUSE_TX: 997 return "tx"; 998 case MLO_PAUSE_RX: 999 return "rx"; 1000 default: 1001 return "off"; 1002 } 1003 } 1004 1005 static void phylink_link_up(struct phylink *pl, 1006 struct phylink_link_state link_state) 1007 { 1008 struct net_device *ndev = pl->netdev; 1009 1010 pl->cur_interface = link_state.interface; 1011 1012 if (pl->pcs && pl->pcs->ops->pcs_link_up) 1013 pl->pcs->ops->pcs_link_up(pl->pcs, pl->cur_link_an_mode, 1014 pl->cur_interface, 1015 link_state.speed, link_state.duplex); 1016 1017 pl->mac_ops->mac_link_up(pl->config, pl->phydev, 1018 pl->cur_link_an_mode, pl->cur_interface, 1019 link_state.speed, link_state.duplex, 1020 !!(link_state.pause & MLO_PAUSE_TX), 1021 !!(link_state.pause & MLO_PAUSE_RX)); 1022 1023 if (ndev) 1024 netif_carrier_on(ndev); 1025 1026 phylink_info(pl, 1027 "Link is Up - %s/%s - flow control %s\n", 1028 phy_speed_to_str(link_state.speed), 1029 phy_duplex_to_str(link_state.duplex), 1030 phylink_pause_to_str(link_state.pause)); 1031 } 1032 1033 static void phylink_link_down(struct phylink *pl) 1034 { 1035 struct net_device *ndev = pl->netdev; 1036 1037 if (ndev) 1038 netif_carrier_off(ndev); 1039 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode, 1040 pl->cur_interface); 1041 phylink_info(pl, "Link is Down\n"); 1042 } 1043 1044 static void phylink_resolve(struct work_struct *w) 1045 { 1046 struct phylink *pl = container_of(w, struct phylink, resolve); 1047 struct phylink_link_state link_state; 1048 struct net_device *ndev = pl->netdev; 1049 bool mac_config = false; 1050 bool retrigger = false; 1051 bool cur_link_state; 1052 1053 mutex_lock(&pl->state_mutex); 1054 if (pl->netdev) 1055 cur_link_state = netif_carrier_ok(ndev); 1056 else 1057 cur_link_state = pl->old_link_state; 1058 1059 if (pl->phylink_disable_state) { 1060 pl->mac_link_dropped = false; 1061 link_state.link = false; 1062 } else if (pl->mac_link_dropped) { 1063 link_state.link = false; 1064 retrigger = true; 1065 } else { 1066 switch (pl->cur_link_an_mode) { 1067 case MLO_AN_PHY: 1068 link_state = pl->phy_state; 1069 phylink_apply_manual_flow(pl, &link_state); 1070 mac_config = link_state.link; 1071 break; 1072 1073 case MLO_AN_FIXED: 1074 phylink_get_fixed_state(pl, &link_state); 1075 mac_config = link_state.link; 1076 break; 1077 1078 case MLO_AN_INBAND: 1079 phylink_mac_pcs_get_state(pl, &link_state); 1080 1081 /* The PCS may have a latching link-fail indicator. 1082 * If the link was up, bring the link down and 1083 * re-trigger the resolve. Otherwise, re-read the 1084 * PCS state to get the current status of the link. 1085 */ 1086 if (!link_state.link) { 1087 if (cur_link_state) 1088 retrigger = true; 1089 else 1090 phylink_mac_pcs_get_state(pl, 1091 &link_state); 1092 } 1093 1094 /* If we have a phy, the "up" state is the union of 1095 * both the PHY and the MAC 1096 */ 1097 if (pl->phydev) 1098 link_state.link &= pl->phy_state.link; 1099 1100 /* Only update if the PHY link is up */ 1101 if (pl->phydev && pl->phy_state.link) { 1102 /* If the interface has changed, force a 1103 * link down event if the link isn't already 1104 * down, and re-resolve. 1105 */ 1106 if (link_state.interface != 1107 pl->phy_state.interface) { 1108 retrigger = true; 1109 link_state.link = false; 1110 } 1111 link_state.interface = pl->phy_state.interface; 1112 1113 /* If we have a PHY, we need to update with 1114 * the PHY flow control bits. 1115 */ 1116 link_state.pause = pl->phy_state.pause; 1117 mac_config = true; 1118 } 1119 phylink_apply_manual_flow(pl, &link_state); 1120 break; 1121 } 1122 } 1123 1124 if (mac_config) { 1125 if (link_state.interface != pl->link_config.interface) { 1126 /* The interface has changed, force the link down and 1127 * then reconfigure. 1128 */ 1129 if (cur_link_state) { 1130 phylink_link_down(pl); 1131 cur_link_state = false; 1132 } 1133 phylink_major_config(pl, false, &link_state); 1134 pl->link_config.interface = link_state.interface; 1135 } else if (!pl->pcs && pl->config->legacy_pre_march2020) { 1136 /* The interface remains unchanged, only the speed, 1137 * duplex or pause settings have changed. Call the 1138 * old mac_config() method to configure the MAC/PCS 1139 * only if we do not have a legacy MAC driver. 1140 */ 1141 phylink_mac_config(pl, &link_state); 1142 } 1143 } 1144 1145 if (link_state.link != cur_link_state) { 1146 pl->old_link_state = link_state.link; 1147 if (!link_state.link) 1148 phylink_link_down(pl); 1149 else 1150 phylink_link_up(pl, link_state); 1151 } 1152 if (!link_state.link && retrigger) { 1153 pl->mac_link_dropped = false; 1154 queue_work(system_power_efficient_wq, &pl->resolve); 1155 } 1156 mutex_unlock(&pl->state_mutex); 1157 } 1158 1159 static void phylink_run_resolve(struct phylink *pl) 1160 { 1161 if (!pl->phylink_disable_state) 1162 queue_work(system_power_efficient_wq, &pl->resolve); 1163 } 1164 1165 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1166 { 1167 unsigned long state = pl->phylink_disable_state; 1168 1169 set_bit(bit, &pl->phylink_disable_state); 1170 if (state == 0) { 1171 queue_work(system_power_efficient_wq, &pl->resolve); 1172 flush_work(&pl->resolve); 1173 } 1174 } 1175 1176 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1177 { 1178 clear_bit(bit, &pl->phylink_disable_state); 1179 phylink_run_resolve(pl); 1180 } 1181 1182 static void phylink_fixed_poll(struct timer_list *t) 1183 { 1184 struct phylink *pl = container_of(t, struct phylink, link_poll); 1185 1186 mod_timer(t, jiffies + HZ); 1187 1188 phylink_run_resolve(pl); 1189 } 1190 1191 static const struct sfp_upstream_ops sfp_phylink_ops; 1192 1193 static int phylink_register_sfp(struct phylink *pl, 1194 struct fwnode_handle *fwnode) 1195 { 1196 struct sfp_bus *bus; 1197 int ret; 1198 1199 if (!fwnode) 1200 return 0; 1201 1202 bus = sfp_bus_find_fwnode(fwnode); 1203 if (IS_ERR(bus)) { 1204 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1205 return PTR_ERR(bus); 1206 } 1207 1208 pl->sfp_bus = bus; 1209 1210 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1211 sfp_bus_put(bus); 1212 1213 return ret; 1214 } 1215 1216 /** 1217 * phylink_create() - create a phylink instance 1218 * @config: a pointer to the target &struct phylink_config 1219 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1220 * interface 1221 * @iface: the desired link mode defined by &typedef phy_interface_t 1222 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1223 * 1224 * Create a new phylink instance, and parse the link parameters found in @np. 1225 * This will parse in-band modes, fixed-link or SFP configuration. 1226 * 1227 * Note: the rtnl lock must not be held when calling this function. 1228 * 1229 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1230 * must use IS_ERR() to check for errors from this function. 1231 */ 1232 struct phylink *phylink_create(struct phylink_config *config, 1233 struct fwnode_handle *fwnode, 1234 phy_interface_t iface, 1235 const struct phylink_mac_ops *mac_ops) 1236 { 1237 bool using_mac_select_pcs = false; 1238 struct phylink *pl; 1239 int ret; 1240 1241 if (mac_ops->mac_select_pcs && 1242 mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) != 1243 ERR_PTR(-EOPNOTSUPP)) 1244 using_mac_select_pcs = true; 1245 1246 /* Validate the supplied configuration */ 1247 if (using_mac_select_pcs && 1248 phy_interface_empty(config->supported_interfaces)) { 1249 dev_err(config->dev, 1250 "phylink: error: empty supported_interfaces but mac_select_pcs() method present\n"); 1251 return ERR_PTR(-EINVAL); 1252 } 1253 1254 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1255 if (!pl) 1256 return ERR_PTR(-ENOMEM); 1257 1258 mutex_init(&pl->state_mutex); 1259 INIT_WORK(&pl->resolve, phylink_resolve); 1260 1261 pl->config = config; 1262 if (config->type == PHYLINK_NETDEV) { 1263 pl->netdev = to_net_dev(config->dev); 1264 } else if (config->type == PHYLINK_DEV) { 1265 pl->dev = config->dev; 1266 } else { 1267 kfree(pl); 1268 return ERR_PTR(-EINVAL); 1269 } 1270 1271 pl->using_mac_select_pcs = using_mac_select_pcs; 1272 pl->phy_state.interface = iface; 1273 pl->link_interface = iface; 1274 if (iface == PHY_INTERFACE_MODE_MOCA) 1275 pl->link_port = PORT_BNC; 1276 else 1277 pl->link_port = PORT_MII; 1278 pl->link_config.interface = iface; 1279 pl->link_config.pause = MLO_PAUSE_AN; 1280 pl->link_config.speed = SPEED_UNKNOWN; 1281 pl->link_config.duplex = DUPLEX_UNKNOWN; 1282 pl->link_config.an_enabled = true; 1283 pl->mac_ops = mac_ops; 1284 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1285 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1286 1287 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 1288 linkmode_copy(pl->link_config.advertising, pl->supported); 1289 phylink_validate(pl, pl->supported, &pl->link_config); 1290 1291 ret = phylink_parse_mode(pl, fwnode); 1292 if (ret < 0) { 1293 kfree(pl); 1294 return ERR_PTR(ret); 1295 } 1296 1297 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1298 ret = phylink_parse_fixedlink(pl, fwnode); 1299 if (ret < 0) { 1300 kfree(pl); 1301 return ERR_PTR(ret); 1302 } 1303 } 1304 1305 pl->cur_link_an_mode = pl->cfg_link_an_mode; 1306 1307 ret = phylink_register_sfp(pl, fwnode); 1308 if (ret < 0) { 1309 kfree(pl); 1310 return ERR_PTR(ret); 1311 } 1312 1313 return pl; 1314 } 1315 EXPORT_SYMBOL_GPL(phylink_create); 1316 1317 /** 1318 * phylink_destroy() - cleanup and destroy the phylink instance 1319 * @pl: a pointer to a &struct phylink returned from phylink_create() 1320 * 1321 * Destroy a phylink instance. Any PHY that has been attached must have been 1322 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1323 * 1324 * Note: the rtnl lock must not be held when calling this function. 1325 */ 1326 void phylink_destroy(struct phylink *pl) 1327 { 1328 sfp_bus_del_upstream(pl->sfp_bus); 1329 if (pl->link_gpio) 1330 gpiod_put(pl->link_gpio); 1331 1332 cancel_work_sync(&pl->resolve); 1333 kfree(pl); 1334 } 1335 EXPORT_SYMBOL_GPL(phylink_destroy); 1336 1337 static void phylink_phy_change(struct phy_device *phydev, bool up) 1338 { 1339 struct phylink *pl = phydev->phylink; 1340 bool tx_pause, rx_pause; 1341 1342 phy_get_pause(phydev, &tx_pause, &rx_pause); 1343 1344 mutex_lock(&pl->state_mutex); 1345 pl->phy_state.speed = phydev->speed; 1346 pl->phy_state.duplex = phydev->duplex; 1347 pl->phy_state.pause = MLO_PAUSE_NONE; 1348 if (tx_pause) 1349 pl->phy_state.pause |= MLO_PAUSE_TX; 1350 if (rx_pause) 1351 pl->phy_state.pause |= MLO_PAUSE_RX; 1352 pl->phy_state.interface = phydev->interface; 1353 pl->phy_state.link = up; 1354 mutex_unlock(&pl->state_mutex); 1355 1356 phylink_run_resolve(pl); 1357 1358 phylink_dbg(pl, "phy link %s %s/%s/%s/%s\n", up ? "up" : "down", 1359 phy_modes(phydev->interface), 1360 phy_speed_to_str(phydev->speed), 1361 phy_duplex_to_str(phydev->duplex), 1362 phylink_pause_to_str(pl->phy_state.pause)); 1363 } 1364 1365 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 1366 phy_interface_t interface) 1367 { 1368 struct phylink_link_state config; 1369 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 1370 char *irq_str; 1371 int ret; 1372 1373 /* 1374 * This is the new way of dealing with flow control for PHYs, 1375 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 1376 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 1377 * using our validate call to the MAC, we rely upon the MAC 1378 * clearing the bits from both supported and advertising fields. 1379 */ 1380 phy_support_asym_pause(phy); 1381 1382 memset(&config, 0, sizeof(config)); 1383 linkmode_copy(supported, phy->supported); 1384 linkmode_copy(config.advertising, phy->advertising); 1385 1386 /* Clause 45 PHYs switch their Serdes lane between several different 1387 * modes, normally 10GBASE-R, SGMII. Some use 2500BASE-X for 2.5G 1388 * speeds. We really need to know which interface modes the PHY and 1389 * MAC supports to properly work out which linkmodes can be supported. 1390 */ 1391 if (phy->is_c45 && 1392 interface != PHY_INTERFACE_MODE_RXAUI && 1393 interface != PHY_INTERFACE_MODE_XAUI && 1394 interface != PHY_INTERFACE_MODE_USXGMII) 1395 config.interface = PHY_INTERFACE_MODE_NA; 1396 else 1397 config.interface = interface; 1398 1399 ret = phylink_validate(pl, supported, &config); 1400 if (ret) { 1401 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 1402 phy_modes(config.interface), 1403 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 1404 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 1405 ERR_PTR(ret)); 1406 return ret; 1407 } 1408 1409 phy->phylink = pl; 1410 phy->phy_link_change = phylink_phy_change; 1411 1412 irq_str = phy_attached_info_irq(phy); 1413 phylink_info(pl, 1414 "PHY [%s] driver [%s] (irq=%s)\n", 1415 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 1416 kfree(irq_str); 1417 1418 mutex_lock(&phy->lock); 1419 mutex_lock(&pl->state_mutex); 1420 pl->phydev = phy; 1421 pl->phy_state.interface = interface; 1422 pl->phy_state.pause = MLO_PAUSE_NONE; 1423 pl->phy_state.speed = SPEED_UNKNOWN; 1424 pl->phy_state.duplex = DUPLEX_UNKNOWN; 1425 linkmode_copy(pl->supported, supported); 1426 linkmode_copy(pl->link_config.advertising, config.advertising); 1427 1428 /* Restrict the phy advertisement according to the MAC support. */ 1429 linkmode_copy(phy->advertising, config.advertising); 1430 mutex_unlock(&pl->state_mutex); 1431 mutex_unlock(&phy->lock); 1432 1433 phylink_dbg(pl, 1434 "phy: %s setting supported %*pb advertising %*pb\n", 1435 phy_modes(interface), 1436 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 1437 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 1438 1439 if (phy_interrupt_is_valid(phy)) 1440 phy_request_interrupt(phy); 1441 1442 return 0; 1443 } 1444 1445 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 1446 phy_interface_t interface) 1447 { 1448 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 1449 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1450 phy_interface_mode_is_8023z(interface)))) 1451 return -EINVAL; 1452 1453 if (pl->phydev) 1454 return -EBUSY; 1455 1456 return phy_attach_direct(pl->netdev, phy, 0, interface); 1457 } 1458 1459 /** 1460 * phylink_connect_phy() - connect a PHY to the phylink instance 1461 * @pl: a pointer to a &struct phylink returned from phylink_create() 1462 * @phy: a pointer to a &struct phy_device. 1463 * 1464 * Connect @phy to the phylink instance specified by @pl by calling 1465 * phy_attach_direct(). Configure the @phy according to the MAC driver's 1466 * capabilities, start the PHYLIB state machine and enable any interrupts 1467 * that the PHY supports. 1468 * 1469 * This updates the phylink's ethtool supported and advertising link mode 1470 * masks. 1471 * 1472 * Returns 0 on success or a negative errno. 1473 */ 1474 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 1475 { 1476 int ret; 1477 1478 /* Use PHY device/driver interface */ 1479 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1480 pl->link_interface = phy->interface; 1481 pl->link_config.interface = pl->link_interface; 1482 } 1483 1484 ret = phylink_attach_phy(pl, phy, pl->link_interface); 1485 if (ret < 0) 1486 return ret; 1487 1488 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 1489 if (ret) 1490 phy_detach(phy); 1491 1492 return ret; 1493 } 1494 EXPORT_SYMBOL_GPL(phylink_connect_phy); 1495 1496 /** 1497 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 1498 * @pl: a pointer to a &struct phylink returned from phylink_create() 1499 * @dn: a pointer to a &struct device_node. 1500 * @flags: PHY-specific flags to communicate to the PHY device driver 1501 * 1502 * Connect the phy specified in the device node @dn to the phylink instance 1503 * specified by @pl. Actions specified in phylink_connect_phy() will be 1504 * performed. 1505 * 1506 * Returns 0 on success or a negative errno. 1507 */ 1508 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 1509 u32 flags) 1510 { 1511 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 1512 } 1513 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 1514 1515 /** 1516 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 1517 * @pl: a pointer to a &struct phylink returned from phylink_create() 1518 * @fwnode: a pointer to a &struct fwnode_handle. 1519 * @flags: PHY-specific flags to communicate to the PHY device driver 1520 * 1521 * Connect the phy specified @fwnode to the phylink instance specified 1522 * by @pl. 1523 * 1524 * Returns 0 on success or a negative errno. 1525 */ 1526 int phylink_fwnode_phy_connect(struct phylink *pl, 1527 struct fwnode_handle *fwnode, 1528 u32 flags) 1529 { 1530 struct fwnode_handle *phy_fwnode; 1531 struct phy_device *phy_dev; 1532 int ret; 1533 1534 /* Fixed links and 802.3z are handled without needing a PHY */ 1535 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1536 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1537 phy_interface_mode_is_8023z(pl->link_interface))) 1538 return 0; 1539 1540 phy_fwnode = fwnode_get_phy_node(fwnode); 1541 if (IS_ERR(phy_fwnode)) { 1542 if (pl->cfg_link_an_mode == MLO_AN_PHY) 1543 return -ENODEV; 1544 return 0; 1545 } 1546 1547 phy_dev = fwnode_phy_find_device(phy_fwnode); 1548 /* We're done with the phy_node handle */ 1549 fwnode_handle_put(phy_fwnode); 1550 if (!phy_dev) 1551 return -ENODEV; 1552 1553 /* Use PHY device/driver interface */ 1554 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1555 pl->link_interface = phy_dev->interface; 1556 pl->link_config.interface = pl->link_interface; 1557 } 1558 1559 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 1560 pl->link_interface); 1561 if (ret) { 1562 phy_device_free(phy_dev); 1563 return ret; 1564 } 1565 1566 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 1567 if (ret) 1568 phy_detach(phy_dev); 1569 1570 return ret; 1571 } 1572 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 1573 1574 /** 1575 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 1576 * instance. 1577 * @pl: a pointer to a &struct phylink returned from phylink_create() 1578 * 1579 * Disconnect any current PHY from the phylink instance described by @pl. 1580 */ 1581 void phylink_disconnect_phy(struct phylink *pl) 1582 { 1583 struct phy_device *phy; 1584 1585 ASSERT_RTNL(); 1586 1587 phy = pl->phydev; 1588 if (phy) { 1589 mutex_lock(&phy->lock); 1590 mutex_lock(&pl->state_mutex); 1591 pl->phydev = NULL; 1592 mutex_unlock(&pl->state_mutex); 1593 mutex_unlock(&phy->lock); 1594 flush_work(&pl->resolve); 1595 1596 phy_disconnect(phy); 1597 } 1598 } 1599 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 1600 1601 /** 1602 * phylink_mac_change() - notify phylink of a change in MAC state 1603 * @pl: a pointer to a &struct phylink returned from phylink_create() 1604 * @up: indicates whether the link is currently up. 1605 * 1606 * The MAC driver should call this driver when the state of its link 1607 * changes (eg, link failure, new negotiation results, etc.) 1608 */ 1609 void phylink_mac_change(struct phylink *pl, bool up) 1610 { 1611 if (!up) 1612 pl->mac_link_dropped = true; 1613 phylink_run_resolve(pl); 1614 phylink_dbg(pl, "mac link %s\n", up ? "up" : "down"); 1615 } 1616 EXPORT_SYMBOL_GPL(phylink_mac_change); 1617 1618 static irqreturn_t phylink_link_handler(int irq, void *data) 1619 { 1620 struct phylink *pl = data; 1621 1622 phylink_run_resolve(pl); 1623 1624 return IRQ_HANDLED; 1625 } 1626 1627 /** 1628 * phylink_start() - start a phylink instance 1629 * @pl: a pointer to a &struct phylink returned from phylink_create() 1630 * 1631 * Start the phylink instance specified by @pl, configuring the MAC for the 1632 * desired link mode(s) and negotiation style. This should be called from the 1633 * network device driver's &struct net_device_ops ndo_open() method. 1634 */ 1635 void phylink_start(struct phylink *pl) 1636 { 1637 bool poll = false; 1638 1639 ASSERT_RTNL(); 1640 1641 phylink_info(pl, "configuring for %s/%s link mode\n", 1642 phylink_an_mode_str(pl->cur_link_an_mode), 1643 phy_modes(pl->link_config.interface)); 1644 1645 /* Always set the carrier off */ 1646 if (pl->netdev) 1647 netif_carrier_off(pl->netdev); 1648 1649 /* Apply the link configuration to the MAC when starting. This allows 1650 * a fixed-link to start with the correct parameters, and also 1651 * ensures that we set the appropriate advertisement for Serdes links. 1652 * 1653 * Restart autonegotiation if using 802.3z to ensure that the link 1654 * parameters are properly negotiated. This is necessary for DSA 1655 * switches using 802.3z negotiation to ensure they see our modes. 1656 */ 1657 phylink_mac_initial_config(pl, true); 1658 1659 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 1660 1661 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 1662 int irq = gpiod_to_irq(pl->link_gpio); 1663 1664 if (irq > 0) { 1665 if (!request_irq(irq, phylink_link_handler, 1666 IRQF_TRIGGER_RISING | 1667 IRQF_TRIGGER_FALLING, 1668 "netdev link", pl)) 1669 pl->link_irq = irq; 1670 else 1671 irq = 0; 1672 } 1673 if (irq <= 0) 1674 poll = true; 1675 } 1676 1677 switch (pl->cfg_link_an_mode) { 1678 case MLO_AN_FIXED: 1679 poll |= pl->config->poll_fixed_state; 1680 break; 1681 case MLO_AN_INBAND: 1682 if (pl->pcs) 1683 poll |= pl->pcs->poll; 1684 break; 1685 } 1686 if (poll) 1687 mod_timer(&pl->link_poll, jiffies + HZ); 1688 if (pl->phydev) 1689 phy_start(pl->phydev); 1690 if (pl->sfp_bus) 1691 sfp_upstream_start(pl->sfp_bus); 1692 } 1693 EXPORT_SYMBOL_GPL(phylink_start); 1694 1695 /** 1696 * phylink_stop() - stop a phylink instance 1697 * @pl: a pointer to a &struct phylink returned from phylink_create() 1698 * 1699 * Stop the phylink instance specified by @pl. This should be called from the 1700 * network device driver's &struct net_device_ops ndo_stop() method. The 1701 * network device's carrier state should not be changed prior to calling this 1702 * function. 1703 * 1704 * This will synchronously bring down the link if the link is not already 1705 * down (in other words, it will trigger a mac_link_down() method call.) 1706 */ 1707 void phylink_stop(struct phylink *pl) 1708 { 1709 ASSERT_RTNL(); 1710 1711 if (pl->sfp_bus) 1712 sfp_upstream_stop(pl->sfp_bus); 1713 if (pl->phydev) 1714 phy_stop(pl->phydev); 1715 del_timer_sync(&pl->link_poll); 1716 if (pl->link_irq) { 1717 free_irq(pl->link_irq, pl); 1718 pl->link_irq = 0; 1719 } 1720 1721 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 1722 } 1723 EXPORT_SYMBOL_GPL(phylink_stop); 1724 1725 /** 1726 * phylink_suspend() - handle a network device suspend event 1727 * @pl: a pointer to a &struct phylink returned from phylink_create() 1728 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 1729 * 1730 * Handle a network device suspend event. There are several cases: 1731 * 1732 * - If Wake-on-Lan is not active, we can bring down the link between 1733 * the MAC and PHY by calling phylink_stop(). 1734 * - If Wake-on-Lan is active, and being handled only by the PHY, we 1735 * can also bring down the link between the MAC and PHY. 1736 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 1737 * still needs to receive packets, so we can not bring the link down. 1738 */ 1739 void phylink_suspend(struct phylink *pl, bool mac_wol) 1740 { 1741 ASSERT_RTNL(); 1742 1743 if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) { 1744 /* Wake-on-Lan enabled, MAC handling */ 1745 mutex_lock(&pl->state_mutex); 1746 1747 /* Stop the resolver bringing the link up */ 1748 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 1749 1750 /* Disable the carrier, to prevent transmit timeouts, 1751 * but one would hope all packets have been sent. This 1752 * also means phylink_resolve() will do nothing. 1753 */ 1754 if (pl->netdev) 1755 netif_carrier_off(pl->netdev); 1756 else 1757 pl->old_link_state = false; 1758 1759 /* We do not call mac_link_down() here as we want the 1760 * link to remain up to receive the WoL packets. 1761 */ 1762 mutex_unlock(&pl->state_mutex); 1763 } else { 1764 phylink_stop(pl); 1765 } 1766 } 1767 EXPORT_SYMBOL_GPL(phylink_suspend); 1768 1769 /** 1770 * phylink_resume() - handle a network device resume event 1771 * @pl: a pointer to a &struct phylink returned from phylink_create() 1772 * 1773 * Undo the effects of phylink_suspend(), returning the link to an 1774 * operational state. 1775 */ 1776 void phylink_resume(struct phylink *pl) 1777 { 1778 ASSERT_RTNL(); 1779 1780 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 1781 /* Wake-on-Lan enabled, MAC handling */ 1782 1783 /* Call mac_link_down() so we keep the overall state balanced. 1784 * Do this under the state_mutex lock for consistency. This 1785 * will cause a "Link Down" message to be printed during 1786 * resume, which is harmless - the true link state will be 1787 * printed when we run a resolve. 1788 */ 1789 mutex_lock(&pl->state_mutex); 1790 phylink_link_down(pl); 1791 mutex_unlock(&pl->state_mutex); 1792 1793 /* Re-apply the link parameters so that all the settings get 1794 * restored to the MAC. 1795 */ 1796 phylink_mac_initial_config(pl, true); 1797 1798 /* Re-enable and re-resolve the link parameters */ 1799 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 1800 } else { 1801 phylink_start(pl); 1802 } 1803 } 1804 EXPORT_SYMBOL_GPL(phylink_resume); 1805 1806 /** 1807 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 1808 * @pl: a pointer to a &struct phylink returned from phylink_create() 1809 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 1810 * 1811 * Read the wake on lan parameters from the PHY attached to the phylink 1812 * instance specified by @pl. If no PHY is currently attached, report no 1813 * support for wake on lan. 1814 */ 1815 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 1816 { 1817 ASSERT_RTNL(); 1818 1819 wol->supported = 0; 1820 wol->wolopts = 0; 1821 1822 if (pl->phydev) 1823 phy_ethtool_get_wol(pl->phydev, wol); 1824 } 1825 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 1826 1827 /** 1828 * phylink_ethtool_set_wol() - set wake on lan parameters 1829 * @pl: a pointer to a &struct phylink returned from phylink_create() 1830 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 1831 * 1832 * Set the wake on lan parameters for the PHY attached to the phylink 1833 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 1834 * error. 1835 * 1836 * Returns zero on success or negative errno code. 1837 */ 1838 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 1839 { 1840 int ret = -EOPNOTSUPP; 1841 1842 ASSERT_RTNL(); 1843 1844 if (pl->phydev) 1845 ret = phy_ethtool_set_wol(pl->phydev, wol); 1846 1847 return ret; 1848 } 1849 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 1850 1851 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 1852 { 1853 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 1854 1855 linkmode_zero(mask); 1856 phylink_set_port_modes(mask); 1857 1858 linkmode_and(dst, dst, mask); 1859 linkmode_or(dst, dst, b); 1860 } 1861 1862 static void phylink_get_ksettings(const struct phylink_link_state *state, 1863 struct ethtool_link_ksettings *kset) 1864 { 1865 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 1866 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 1867 kset->base.speed = state->speed; 1868 kset->base.duplex = state->duplex; 1869 kset->base.autoneg = state->an_enabled ? AUTONEG_ENABLE : 1870 AUTONEG_DISABLE; 1871 } 1872 1873 /** 1874 * phylink_ethtool_ksettings_get() - get the current link settings 1875 * @pl: a pointer to a &struct phylink returned from phylink_create() 1876 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 1877 * 1878 * Read the current link settings for the phylink instance specified by @pl. 1879 * This will be the link settings read from the MAC, PHY or fixed link 1880 * settings depending on the current negotiation mode. 1881 */ 1882 int phylink_ethtool_ksettings_get(struct phylink *pl, 1883 struct ethtool_link_ksettings *kset) 1884 { 1885 struct phylink_link_state link_state; 1886 1887 ASSERT_RTNL(); 1888 1889 if (pl->phydev) 1890 phy_ethtool_ksettings_get(pl->phydev, kset); 1891 else 1892 kset->base.port = pl->link_port; 1893 1894 linkmode_copy(kset->link_modes.supported, pl->supported); 1895 1896 switch (pl->cur_link_an_mode) { 1897 case MLO_AN_FIXED: 1898 /* We are using fixed settings. Report these as the 1899 * current link settings - and note that these also 1900 * represent the supported speeds/duplex/pause modes. 1901 */ 1902 phylink_get_fixed_state(pl, &link_state); 1903 phylink_get_ksettings(&link_state, kset); 1904 break; 1905 1906 case MLO_AN_INBAND: 1907 /* If there is a phy attached, then use the reported 1908 * settings from the phy with no modification. 1909 */ 1910 if (pl->phydev) 1911 break; 1912 1913 phylink_mac_pcs_get_state(pl, &link_state); 1914 1915 /* The MAC is reporting the link results from its own PCS 1916 * layer via in-band status. Report these as the current 1917 * link settings. 1918 */ 1919 phylink_get_ksettings(&link_state, kset); 1920 break; 1921 } 1922 1923 return 0; 1924 } 1925 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 1926 1927 /** 1928 * phylink_ethtool_ksettings_set() - set the link settings 1929 * @pl: a pointer to a &struct phylink returned from phylink_create() 1930 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 1931 */ 1932 int phylink_ethtool_ksettings_set(struct phylink *pl, 1933 const struct ethtool_link_ksettings *kset) 1934 { 1935 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 1936 struct phylink_link_state config; 1937 const struct phy_setting *s; 1938 1939 ASSERT_RTNL(); 1940 1941 if (pl->phydev) { 1942 /* We can rely on phylib for this update; we also do not need 1943 * to update the pl->link_config settings: 1944 * - the configuration returned via ksettings_get() will come 1945 * from phylib whenever a PHY is present. 1946 * - link_config.interface will be updated by the PHY calling 1947 * back via phylink_phy_change() and a subsequent resolve. 1948 * - initial link configuration for PHY mode comes from the 1949 * last phy state updated via phylink_phy_change(). 1950 * - other configuration changes (e.g. pause modes) are 1951 * performed directly via phylib. 1952 * - if in in-band mode with a PHY, the link configuration 1953 * is passed on the link from the PHY, and all of 1954 * link_config.{speed,duplex,an_enabled,pause} are not used. 1955 * - the only possible use would be link_config.advertising 1956 * pause modes when in 1000base-X mode with a PHY, but in 1957 * the presence of a PHY, this should not be changed as that 1958 * should be determined from the media side advertisement. 1959 */ 1960 return phy_ethtool_ksettings_set(pl->phydev, kset); 1961 } 1962 1963 config = pl->link_config; 1964 1965 /* Mask out unsupported advertisements */ 1966 linkmode_and(config.advertising, kset->link_modes.advertising, 1967 pl->supported); 1968 1969 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 1970 switch (kset->base.autoneg) { 1971 case AUTONEG_DISABLE: 1972 /* Autonegotiation disabled, select a suitable speed and 1973 * duplex. 1974 */ 1975 s = phy_lookup_setting(kset->base.speed, kset->base.duplex, 1976 pl->supported, false); 1977 if (!s) 1978 return -EINVAL; 1979 1980 /* If we have a fixed link, refuse to change link parameters. 1981 * If the link parameters match, accept them but do nothing. 1982 */ 1983 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 1984 if (s->speed != pl->link_config.speed || 1985 s->duplex != pl->link_config.duplex) 1986 return -EINVAL; 1987 return 0; 1988 } 1989 1990 config.speed = s->speed; 1991 config.duplex = s->duplex; 1992 break; 1993 1994 case AUTONEG_ENABLE: 1995 /* If we have a fixed link, allow autonegotiation (since that 1996 * is our default case) but do not allow the advertisement to 1997 * be changed. If the advertisement matches, simply return. 1998 */ 1999 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2000 if (!linkmode_equal(config.advertising, 2001 pl->link_config.advertising)) 2002 return -EINVAL; 2003 return 0; 2004 } 2005 2006 config.speed = SPEED_UNKNOWN; 2007 config.duplex = DUPLEX_UNKNOWN; 2008 break; 2009 2010 default: 2011 return -EINVAL; 2012 } 2013 2014 /* We have ruled out the case with a PHY attached, and the 2015 * fixed-link cases. All that is left are in-band links. 2016 */ 2017 config.an_enabled = kset->base.autoneg == AUTONEG_ENABLE; 2018 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2019 config.an_enabled); 2020 2021 /* If this link is with an SFP, ensure that changes to advertised modes 2022 * also cause the associated interface to be selected such that the 2023 * link can be configured correctly. 2024 */ 2025 if (pl->sfp_bus) { 2026 config.interface = sfp_select_interface(pl->sfp_bus, 2027 config.advertising); 2028 if (config.interface == PHY_INTERFACE_MODE_NA) { 2029 phylink_err(pl, 2030 "selection of interface failed, advertisement %*pb\n", 2031 __ETHTOOL_LINK_MODE_MASK_NBITS, 2032 config.advertising); 2033 return -EINVAL; 2034 } 2035 2036 /* Revalidate with the selected interface */ 2037 linkmode_copy(support, pl->supported); 2038 if (phylink_validate(pl, support, &config)) { 2039 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2040 phylink_an_mode_str(pl->cur_link_an_mode), 2041 phy_modes(config.interface), 2042 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2043 return -EINVAL; 2044 } 2045 } else { 2046 /* Validate without changing the current supported mask. */ 2047 linkmode_copy(support, pl->supported); 2048 if (phylink_validate(pl, support, &config)) 2049 return -EINVAL; 2050 } 2051 2052 /* If autonegotiation is enabled, we must have an advertisement */ 2053 if (config.an_enabled && phylink_is_empty_linkmode(config.advertising)) 2054 return -EINVAL; 2055 2056 mutex_lock(&pl->state_mutex); 2057 pl->link_config.speed = config.speed; 2058 pl->link_config.duplex = config.duplex; 2059 pl->link_config.an_enabled = config.an_enabled; 2060 2061 if (pl->link_config.interface != config.interface) { 2062 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2063 /* We need to force the link down, then change the interface */ 2064 if (pl->old_link_state) { 2065 phylink_link_down(pl); 2066 pl->old_link_state = false; 2067 } 2068 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2069 &pl->phylink_disable_state)) 2070 phylink_major_config(pl, false, &config); 2071 pl->link_config.interface = config.interface; 2072 linkmode_copy(pl->link_config.advertising, config.advertising); 2073 } else if (!linkmode_equal(pl->link_config.advertising, 2074 config.advertising)) { 2075 linkmode_copy(pl->link_config.advertising, config.advertising); 2076 phylink_change_inband_advert(pl); 2077 } 2078 mutex_unlock(&pl->state_mutex); 2079 2080 return 0; 2081 } 2082 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 2083 2084 /** 2085 * phylink_ethtool_nway_reset() - restart negotiation 2086 * @pl: a pointer to a &struct phylink returned from phylink_create() 2087 * 2088 * Restart negotiation for the phylink instance specified by @pl. This will 2089 * cause any attached phy to restart negotiation with the link partner, and 2090 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 2091 * negotiation. 2092 * 2093 * Returns zero on success, or negative error code. 2094 */ 2095 int phylink_ethtool_nway_reset(struct phylink *pl) 2096 { 2097 int ret = 0; 2098 2099 ASSERT_RTNL(); 2100 2101 if (pl->phydev) 2102 ret = phy_restart_aneg(pl->phydev); 2103 phylink_mac_pcs_an_restart(pl); 2104 2105 return ret; 2106 } 2107 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 2108 2109 /** 2110 * phylink_ethtool_get_pauseparam() - get the current pause parameters 2111 * @pl: a pointer to a &struct phylink returned from phylink_create() 2112 * @pause: a pointer to a &struct ethtool_pauseparam 2113 */ 2114 void phylink_ethtool_get_pauseparam(struct phylink *pl, 2115 struct ethtool_pauseparam *pause) 2116 { 2117 ASSERT_RTNL(); 2118 2119 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 2120 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 2121 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 2122 } 2123 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 2124 2125 /** 2126 * phylink_ethtool_set_pauseparam() - set the current pause parameters 2127 * @pl: a pointer to a &struct phylink returned from phylink_create() 2128 * @pause: a pointer to a &struct ethtool_pauseparam 2129 */ 2130 int phylink_ethtool_set_pauseparam(struct phylink *pl, 2131 struct ethtool_pauseparam *pause) 2132 { 2133 struct phylink_link_state *config = &pl->link_config; 2134 bool manual_changed; 2135 int pause_state; 2136 2137 ASSERT_RTNL(); 2138 2139 if (pl->cur_link_an_mode == MLO_AN_FIXED) 2140 return -EOPNOTSUPP; 2141 2142 if (!phylink_test(pl->supported, Pause) && 2143 !phylink_test(pl->supported, Asym_Pause)) 2144 return -EOPNOTSUPP; 2145 2146 if (!phylink_test(pl->supported, Asym_Pause) && 2147 pause->rx_pause != pause->tx_pause) 2148 return -EINVAL; 2149 2150 pause_state = 0; 2151 if (pause->autoneg) 2152 pause_state |= MLO_PAUSE_AN; 2153 if (pause->rx_pause) 2154 pause_state |= MLO_PAUSE_RX; 2155 if (pause->tx_pause) 2156 pause_state |= MLO_PAUSE_TX; 2157 2158 mutex_lock(&pl->state_mutex); 2159 /* 2160 * See the comments for linkmode_set_pause(), wrt the deficiencies 2161 * with the current implementation. A solution to this issue would 2162 * be: 2163 * ethtool Local device 2164 * rx tx Pause AsymDir 2165 * 0 0 0 0 2166 * 1 0 1 1 2167 * 0 1 0 1 2168 * 1 1 1 1 2169 * and then use the ethtool rx/tx enablement status to mask the 2170 * rx/tx pause resolution. 2171 */ 2172 linkmode_set_pause(config->advertising, pause->tx_pause, 2173 pause->rx_pause); 2174 2175 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 2176 (!(pause_state & MLO_PAUSE_AN) && 2177 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 2178 2179 config->pause = pause_state; 2180 2181 /* Update our in-band advertisement, triggering a renegotiation if 2182 * the advertisement changed. 2183 */ 2184 if (!pl->phydev) 2185 phylink_change_inband_advert(pl); 2186 2187 mutex_unlock(&pl->state_mutex); 2188 2189 /* If we have a PHY, a change of the pause frame advertisement will 2190 * cause phylib to renegotiate (if AN is enabled) which will in turn 2191 * call our phylink_phy_change() and trigger a resolve. Note that 2192 * we can't hold our state mutex while calling phy_set_asym_pause(). 2193 */ 2194 if (pl->phydev) 2195 phy_set_asym_pause(pl->phydev, pause->rx_pause, 2196 pause->tx_pause); 2197 2198 /* If the manual pause settings changed, make sure we trigger a 2199 * resolve to update their state; we can not guarantee that the 2200 * link will cycle. 2201 */ 2202 if (manual_changed) { 2203 pl->mac_link_dropped = true; 2204 phylink_run_resolve(pl); 2205 } 2206 2207 return 0; 2208 } 2209 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 2210 2211 /** 2212 * phylink_get_eee_err() - read the energy efficient ethernet error 2213 * counter 2214 * @pl: a pointer to a &struct phylink returned from phylink_create(). 2215 * 2216 * Read the Energy Efficient Ethernet error counter from the PHY associated 2217 * with the phylink instance specified by @pl. 2218 * 2219 * Returns positive error counter value, or negative error code. 2220 */ 2221 int phylink_get_eee_err(struct phylink *pl) 2222 { 2223 int ret = 0; 2224 2225 ASSERT_RTNL(); 2226 2227 if (pl->phydev) 2228 ret = phy_get_eee_err(pl->phydev); 2229 2230 return ret; 2231 } 2232 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 2233 2234 /** 2235 * phylink_init_eee() - init and check the EEE features 2236 * @pl: a pointer to a &struct phylink returned from phylink_create() 2237 * @clk_stop_enable: allow PHY to stop receive clock 2238 * 2239 * Must be called either with RTNL held or within mac_link_up() 2240 */ 2241 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) 2242 { 2243 int ret = -EOPNOTSUPP; 2244 2245 if (pl->phydev) 2246 ret = phy_init_eee(pl->phydev, clk_stop_enable); 2247 2248 return ret; 2249 } 2250 EXPORT_SYMBOL_GPL(phylink_init_eee); 2251 2252 /** 2253 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 2254 * @pl: a pointer to a &struct phylink returned from phylink_create() 2255 * @eee: a pointer to a &struct ethtool_eee for the read parameters 2256 */ 2257 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee) 2258 { 2259 int ret = -EOPNOTSUPP; 2260 2261 ASSERT_RTNL(); 2262 2263 if (pl->phydev) 2264 ret = phy_ethtool_get_eee(pl->phydev, eee); 2265 2266 return ret; 2267 } 2268 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 2269 2270 /** 2271 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 2272 * @pl: a pointer to a &struct phylink returned from phylink_create() 2273 * @eee: a pointer to a &struct ethtool_eee for the desired parameters 2274 */ 2275 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee) 2276 { 2277 int ret = -EOPNOTSUPP; 2278 2279 ASSERT_RTNL(); 2280 2281 if (pl->phydev) 2282 ret = phy_ethtool_set_eee(pl->phydev, eee); 2283 2284 return ret; 2285 } 2286 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 2287 2288 /* This emulates MII registers for a fixed-mode phy operating as per the 2289 * passed in state. "aneg" defines if we report negotiation is possible. 2290 * 2291 * FIXME: should deal with negotiation state too. 2292 */ 2293 static int phylink_mii_emul_read(unsigned int reg, 2294 struct phylink_link_state *state) 2295 { 2296 struct fixed_phy_status fs; 2297 unsigned long *lpa = state->lp_advertising; 2298 int val; 2299 2300 fs.link = state->link; 2301 fs.speed = state->speed; 2302 fs.duplex = state->duplex; 2303 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 2304 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 2305 2306 val = swphy_read_reg(reg, &fs); 2307 if (reg == MII_BMSR) { 2308 if (!state->an_complete) 2309 val &= ~BMSR_ANEGCOMPLETE; 2310 } 2311 return val; 2312 } 2313 2314 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 2315 unsigned int reg) 2316 { 2317 struct phy_device *phydev = pl->phydev; 2318 int prtad, devad; 2319 2320 if (mdio_phy_id_is_c45(phy_id)) { 2321 prtad = mdio_phy_id_prtad(phy_id); 2322 devad = mdio_phy_id_devad(phy_id); 2323 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2324 reg); 2325 } 2326 2327 if (phydev->is_c45) { 2328 switch (reg) { 2329 case MII_BMCR: 2330 case MII_BMSR: 2331 case MII_PHYSID1: 2332 case MII_PHYSID2: 2333 devad = __ffs(phydev->c45_ids.mmds_present); 2334 break; 2335 case MII_ADVERTISE: 2336 case MII_LPA: 2337 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2338 return -EINVAL; 2339 devad = MDIO_MMD_AN; 2340 if (reg == MII_ADVERTISE) 2341 reg = MDIO_AN_ADVERTISE; 2342 else 2343 reg = MDIO_AN_LPA; 2344 break; 2345 default: 2346 return -EINVAL; 2347 } 2348 prtad = phy_id; 2349 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2350 reg); 2351 } 2352 2353 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 2354 } 2355 2356 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 2357 unsigned int reg, unsigned int val) 2358 { 2359 struct phy_device *phydev = pl->phydev; 2360 int prtad, devad; 2361 2362 if (mdio_phy_id_is_c45(phy_id)) { 2363 prtad = mdio_phy_id_prtad(phy_id); 2364 devad = mdio_phy_id_devad(phy_id); 2365 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 2366 reg, val); 2367 } 2368 2369 if (phydev->is_c45) { 2370 switch (reg) { 2371 case MII_BMCR: 2372 case MII_BMSR: 2373 case MII_PHYSID1: 2374 case MII_PHYSID2: 2375 devad = __ffs(phydev->c45_ids.mmds_present); 2376 break; 2377 case MII_ADVERTISE: 2378 case MII_LPA: 2379 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2380 return -EINVAL; 2381 devad = MDIO_MMD_AN; 2382 if (reg == MII_ADVERTISE) 2383 reg = MDIO_AN_ADVERTISE; 2384 else 2385 reg = MDIO_AN_LPA; 2386 break; 2387 default: 2388 return -EINVAL; 2389 } 2390 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 2391 reg, val); 2392 } 2393 2394 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 2395 } 2396 2397 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 2398 unsigned int reg) 2399 { 2400 struct phylink_link_state state; 2401 int val = 0xffff; 2402 2403 switch (pl->cur_link_an_mode) { 2404 case MLO_AN_FIXED: 2405 if (phy_id == 0) { 2406 phylink_get_fixed_state(pl, &state); 2407 val = phylink_mii_emul_read(reg, &state); 2408 } 2409 break; 2410 2411 case MLO_AN_PHY: 2412 return -EOPNOTSUPP; 2413 2414 case MLO_AN_INBAND: 2415 if (phy_id == 0) { 2416 phylink_mac_pcs_get_state(pl, &state); 2417 val = phylink_mii_emul_read(reg, &state); 2418 } 2419 break; 2420 } 2421 2422 return val & 0xffff; 2423 } 2424 2425 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 2426 unsigned int reg, unsigned int val) 2427 { 2428 switch (pl->cur_link_an_mode) { 2429 case MLO_AN_FIXED: 2430 break; 2431 2432 case MLO_AN_PHY: 2433 return -EOPNOTSUPP; 2434 2435 case MLO_AN_INBAND: 2436 break; 2437 } 2438 2439 return 0; 2440 } 2441 2442 /** 2443 * phylink_mii_ioctl() - generic mii ioctl interface 2444 * @pl: a pointer to a &struct phylink returned from phylink_create() 2445 * @ifr: a pointer to a &struct ifreq for socket ioctls 2446 * @cmd: ioctl cmd to execute 2447 * 2448 * Perform the specified MII ioctl on the PHY attached to the phylink instance 2449 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 2450 * 2451 * Returns: zero on success or negative error code. 2452 * 2453 * %SIOCGMIIPHY: 2454 * read register from the current PHY. 2455 * %SIOCGMIIREG: 2456 * read register from the specified PHY. 2457 * %SIOCSMIIREG: 2458 * set a register on the specified PHY. 2459 */ 2460 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 2461 { 2462 struct mii_ioctl_data *mii = if_mii(ifr); 2463 int ret; 2464 2465 ASSERT_RTNL(); 2466 2467 if (pl->phydev) { 2468 /* PHYs only exist for MLO_AN_PHY and SGMII */ 2469 switch (cmd) { 2470 case SIOCGMIIPHY: 2471 mii->phy_id = pl->phydev->mdio.addr; 2472 fallthrough; 2473 2474 case SIOCGMIIREG: 2475 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 2476 if (ret >= 0) { 2477 mii->val_out = ret; 2478 ret = 0; 2479 } 2480 break; 2481 2482 case SIOCSMIIREG: 2483 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 2484 mii->val_in); 2485 break; 2486 2487 default: 2488 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 2489 break; 2490 } 2491 } else { 2492 switch (cmd) { 2493 case SIOCGMIIPHY: 2494 mii->phy_id = 0; 2495 fallthrough; 2496 2497 case SIOCGMIIREG: 2498 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 2499 if (ret >= 0) { 2500 mii->val_out = ret; 2501 ret = 0; 2502 } 2503 break; 2504 2505 case SIOCSMIIREG: 2506 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 2507 mii->val_in); 2508 break; 2509 2510 default: 2511 ret = -EOPNOTSUPP; 2512 break; 2513 } 2514 } 2515 2516 return ret; 2517 } 2518 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 2519 2520 /** 2521 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 2522 * link partners 2523 * @pl: a pointer to a &struct phylink returned from phylink_create() 2524 * @sync: perform action synchronously 2525 * 2526 * If we have a PHY that is not part of a SFP module, then set the speed 2527 * as described in the phy_speed_down() function. Please see this function 2528 * for a description of the @sync parameter. 2529 * 2530 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 2531 */ 2532 int phylink_speed_down(struct phylink *pl, bool sync) 2533 { 2534 int ret = 0; 2535 2536 ASSERT_RTNL(); 2537 2538 if (!pl->sfp_bus && pl->phydev) 2539 ret = phy_speed_down(pl->phydev, sync); 2540 2541 return ret; 2542 } 2543 EXPORT_SYMBOL_GPL(phylink_speed_down); 2544 2545 /** 2546 * phylink_speed_up() - restore the advertised speeds prior to the call to 2547 * phylink_speed_down() 2548 * @pl: a pointer to a &struct phylink returned from phylink_create() 2549 * 2550 * If we have a PHY that is not part of a SFP module, then restore the 2551 * PHY speeds as per phy_speed_up(). 2552 * 2553 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 2554 */ 2555 int phylink_speed_up(struct phylink *pl) 2556 { 2557 int ret = 0; 2558 2559 ASSERT_RTNL(); 2560 2561 if (!pl->sfp_bus && pl->phydev) 2562 ret = phy_speed_up(pl->phydev); 2563 2564 return ret; 2565 } 2566 EXPORT_SYMBOL_GPL(phylink_speed_up); 2567 2568 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 2569 { 2570 struct phylink *pl = upstream; 2571 2572 pl->netdev->sfp_bus = bus; 2573 } 2574 2575 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 2576 { 2577 struct phylink *pl = upstream; 2578 2579 pl->netdev->sfp_bus = NULL; 2580 } 2581 2582 static int phylink_sfp_config(struct phylink *pl, u8 mode, 2583 const unsigned long *supported, 2584 const unsigned long *advertising) 2585 { 2586 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1); 2587 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2588 struct phylink_link_state config; 2589 phy_interface_t iface; 2590 bool changed; 2591 int ret; 2592 2593 linkmode_copy(support, supported); 2594 2595 memset(&config, 0, sizeof(config)); 2596 linkmode_copy(config.advertising, advertising); 2597 config.interface = PHY_INTERFACE_MODE_NA; 2598 config.speed = SPEED_UNKNOWN; 2599 config.duplex = DUPLEX_UNKNOWN; 2600 config.pause = MLO_PAUSE_AN; 2601 config.an_enabled = pl->link_config.an_enabled; 2602 2603 /* Ignore errors if we're expecting a PHY to attach later */ 2604 ret = phylink_validate(pl, support, &config); 2605 if (ret) { 2606 phylink_err(pl, "validation with support %*pb failed: %pe\n", 2607 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 2608 ERR_PTR(ret)); 2609 return ret; 2610 } 2611 2612 iface = sfp_select_interface(pl->sfp_bus, config.advertising); 2613 if (iface == PHY_INTERFACE_MODE_NA) { 2614 phylink_err(pl, 2615 "selection of interface failed, advertisement %*pb\n", 2616 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising); 2617 return -EINVAL; 2618 } 2619 2620 config.interface = iface; 2621 linkmode_copy(support1, support); 2622 ret = phylink_validate(pl, support1, &config); 2623 if (ret) { 2624 phylink_err(pl, 2625 "validation of %s/%s with support %*pb failed: %pe\n", 2626 phylink_an_mode_str(mode), 2627 phy_modes(config.interface), 2628 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 2629 ERR_PTR(ret)); 2630 return ret; 2631 } 2632 2633 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 2634 phylink_an_mode_str(mode), phy_modes(config.interface), 2635 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2636 2637 if (phy_interface_mode_is_8023z(iface) && pl->phydev) 2638 return -EINVAL; 2639 2640 changed = !linkmode_equal(pl->supported, support) || 2641 !linkmode_equal(pl->link_config.advertising, 2642 config.advertising); 2643 if (changed) { 2644 linkmode_copy(pl->supported, support); 2645 linkmode_copy(pl->link_config.advertising, config.advertising); 2646 } 2647 2648 if (pl->cur_link_an_mode != mode || 2649 pl->link_config.interface != config.interface) { 2650 pl->link_config.interface = config.interface; 2651 pl->cur_link_an_mode = mode; 2652 2653 changed = true; 2654 2655 phylink_info(pl, "switched to %s/%s link mode\n", 2656 phylink_an_mode_str(mode), 2657 phy_modes(config.interface)); 2658 } 2659 2660 pl->link_port = pl->sfp_port; 2661 2662 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 2663 &pl->phylink_disable_state)) 2664 phylink_mac_initial_config(pl, false); 2665 2666 return ret; 2667 } 2668 2669 static int phylink_sfp_module_insert(void *upstream, 2670 const struct sfp_eeprom_id *id) 2671 { 2672 struct phylink *pl = upstream; 2673 unsigned long *support = pl->sfp_support; 2674 2675 ASSERT_RTNL(); 2676 2677 linkmode_zero(support); 2678 sfp_parse_support(pl->sfp_bus, id, support); 2679 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, support); 2680 2681 /* If this module may have a PHY connecting later, defer until later */ 2682 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 2683 if (pl->sfp_may_have_phy) 2684 return 0; 2685 2686 return phylink_sfp_config(pl, MLO_AN_INBAND, support, support); 2687 } 2688 2689 static int phylink_sfp_module_start(void *upstream) 2690 { 2691 struct phylink *pl = upstream; 2692 2693 /* If this SFP module has a PHY, start the PHY now. */ 2694 if (pl->phydev) { 2695 phy_start(pl->phydev); 2696 return 0; 2697 } 2698 2699 /* If the module may have a PHY but we didn't detect one we 2700 * need to configure the MAC here. 2701 */ 2702 if (!pl->sfp_may_have_phy) 2703 return 0; 2704 2705 return phylink_sfp_config(pl, MLO_AN_INBAND, 2706 pl->sfp_support, pl->sfp_support); 2707 } 2708 2709 static void phylink_sfp_module_stop(void *upstream) 2710 { 2711 struct phylink *pl = upstream; 2712 2713 /* If this SFP module has a PHY, stop it. */ 2714 if (pl->phydev) 2715 phy_stop(pl->phydev); 2716 } 2717 2718 static void phylink_sfp_link_down(void *upstream) 2719 { 2720 struct phylink *pl = upstream; 2721 2722 ASSERT_RTNL(); 2723 2724 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 2725 } 2726 2727 static void phylink_sfp_link_up(void *upstream) 2728 { 2729 struct phylink *pl = upstream; 2730 2731 ASSERT_RTNL(); 2732 2733 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 2734 } 2735 2736 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII 2737 * or 802.3z control word, so inband will not work. 2738 */ 2739 static bool phylink_phy_no_inband(struct phy_device *phy) 2740 { 2741 return phy->is_c45 && 2742 (phy->c45_ids.device_ids[1] & 0xfffffff0) == 0xae025150; 2743 } 2744 2745 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 2746 { 2747 struct phylink *pl = upstream; 2748 phy_interface_t interface; 2749 u8 mode; 2750 int ret; 2751 2752 /* 2753 * This is the new way of dealing with flow control for PHYs, 2754 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 2755 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 2756 * using our validate call to the MAC, we rely upon the MAC 2757 * clearing the bits from both supported and advertising fields. 2758 */ 2759 phy_support_asym_pause(phy); 2760 2761 if (phylink_phy_no_inband(phy)) 2762 mode = MLO_AN_PHY; 2763 else 2764 mode = MLO_AN_INBAND; 2765 2766 /* Do the initial configuration */ 2767 ret = phylink_sfp_config(pl, mode, phy->supported, phy->advertising); 2768 if (ret < 0) 2769 return ret; 2770 2771 interface = pl->link_config.interface; 2772 ret = phylink_attach_phy(pl, phy, interface); 2773 if (ret < 0) 2774 return ret; 2775 2776 ret = phylink_bringup_phy(pl, phy, interface); 2777 if (ret) 2778 phy_detach(phy); 2779 2780 return ret; 2781 } 2782 2783 static void phylink_sfp_disconnect_phy(void *upstream) 2784 { 2785 phylink_disconnect_phy(upstream); 2786 } 2787 2788 static const struct sfp_upstream_ops sfp_phylink_ops = { 2789 .attach = phylink_sfp_attach, 2790 .detach = phylink_sfp_detach, 2791 .module_insert = phylink_sfp_module_insert, 2792 .module_start = phylink_sfp_module_start, 2793 .module_stop = phylink_sfp_module_stop, 2794 .link_up = phylink_sfp_link_up, 2795 .link_down = phylink_sfp_link_down, 2796 .connect_phy = phylink_sfp_connect_phy, 2797 .disconnect_phy = phylink_sfp_disconnect_phy, 2798 }; 2799 2800 /* Helpers for MAC drivers */ 2801 2802 static void phylink_decode_c37_word(struct phylink_link_state *state, 2803 uint16_t config_reg, int speed) 2804 { 2805 bool tx_pause, rx_pause; 2806 int fd_bit; 2807 2808 if (speed == SPEED_2500) 2809 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 2810 else 2811 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 2812 2813 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 2814 2815 if (linkmode_test_bit(fd_bit, state->advertising) && 2816 linkmode_test_bit(fd_bit, state->lp_advertising)) { 2817 state->speed = speed; 2818 state->duplex = DUPLEX_FULL; 2819 } else { 2820 /* negotiation failure */ 2821 state->link = false; 2822 } 2823 2824 linkmode_resolve_pause(state->advertising, state->lp_advertising, 2825 &tx_pause, &rx_pause); 2826 2827 if (tx_pause) 2828 state->pause |= MLO_PAUSE_TX; 2829 if (rx_pause) 2830 state->pause |= MLO_PAUSE_RX; 2831 } 2832 2833 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 2834 uint16_t config_reg) 2835 { 2836 if (!(config_reg & LPA_SGMII_LINK)) { 2837 state->link = false; 2838 return; 2839 } 2840 2841 switch (config_reg & LPA_SGMII_SPD_MASK) { 2842 case LPA_SGMII_10: 2843 state->speed = SPEED_10; 2844 break; 2845 case LPA_SGMII_100: 2846 state->speed = SPEED_100; 2847 break; 2848 case LPA_SGMII_1000: 2849 state->speed = SPEED_1000; 2850 break; 2851 default: 2852 state->link = false; 2853 return; 2854 } 2855 if (config_reg & LPA_SGMII_FULL_DUPLEX) 2856 state->duplex = DUPLEX_FULL; 2857 else 2858 state->duplex = DUPLEX_HALF; 2859 } 2860 2861 /** 2862 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 2863 * @state: a pointer to a struct phylink_link_state. 2864 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 2865 * 2866 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 2867 * code word. Decode the USXGMII code word and populate the corresponding fields 2868 * (speed, duplex) into the phylink_link_state structure. 2869 */ 2870 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 2871 uint16_t lpa) 2872 { 2873 switch (lpa & MDIO_USXGMII_SPD_MASK) { 2874 case MDIO_USXGMII_10: 2875 state->speed = SPEED_10; 2876 break; 2877 case MDIO_USXGMII_100: 2878 state->speed = SPEED_100; 2879 break; 2880 case MDIO_USXGMII_1000: 2881 state->speed = SPEED_1000; 2882 break; 2883 case MDIO_USXGMII_2500: 2884 state->speed = SPEED_2500; 2885 break; 2886 case MDIO_USXGMII_5000: 2887 state->speed = SPEED_5000; 2888 break; 2889 case MDIO_USXGMII_10G: 2890 state->speed = SPEED_10000; 2891 break; 2892 default: 2893 state->link = false; 2894 return; 2895 } 2896 2897 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 2898 state->duplex = DUPLEX_FULL; 2899 else 2900 state->duplex = DUPLEX_HALF; 2901 } 2902 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 2903 2904 /** 2905 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 2906 * @state: a pointer to a &struct phylink_link_state. 2907 * @bmsr: The value of the %MII_BMSR register 2908 * @lpa: The value of the %MII_LPA register 2909 * 2910 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 2911 * clause 37 negotiation and/or SGMII control. 2912 * 2913 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 2914 * the phylink @state structure. This is suitable to be used for implementing 2915 * the mac_pcs_get_state() member of the struct phylink_mac_ops structure if 2916 * accessing @bmsr and @lpa cannot be done with MDIO directly. 2917 */ 2918 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 2919 u16 bmsr, u16 lpa) 2920 { 2921 state->link = !!(bmsr & BMSR_LSTATUS); 2922 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 2923 /* If there is no link or autonegotiation is disabled, the LP advertisement 2924 * data is not meaningful, so don't go any further. 2925 */ 2926 if (!state->link || !state->an_enabled) 2927 return; 2928 2929 switch (state->interface) { 2930 case PHY_INTERFACE_MODE_1000BASEX: 2931 phylink_decode_c37_word(state, lpa, SPEED_1000); 2932 break; 2933 2934 case PHY_INTERFACE_MODE_2500BASEX: 2935 phylink_decode_c37_word(state, lpa, SPEED_2500); 2936 break; 2937 2938 case PHY_INTERFACE_MODE_SGMII: 2939 case PHY_INTERFACE_MODE_QSGMII: 2940 case PHY_INTERFACE_MODE_QUSGMII: 2941 phylink_decode_sgmii_word(state, lpa); 2942 break; 2943 2944 default: 2945 state->link = false; 2946 break; 2947 } 2948 } 2949 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 2950 2951 /** 2952 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 2953 * @pcs: a pointer to a &struct mdio_device. 2954 * @state: a pointer to a &struct phylink_link_state. 2955 * 2956 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 2957 * clause 37 negotiation and/or SGMII control. 2958 * 2959 * Read the MAC PCS state from the MII device configured in @config and 2960 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 2961 * the phylink @state structure. This is suitable to be directly plugged 2962 * into the mac_pcs_get_state() member of the struct phylink_mac_ops 2963 * structure. 2964 */ 2965 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 2966 struct phylink_link_state *state) 2967 { 2968 int bmsr, lpa; 2969 2970 bmsr = mdiodev_read(pcs, MII_BMSR); 2971 lpa = mdiodev_read(pcs, MII_LPA); 2972 if (bmsr < 0 || lpa < 0) { 2973 state->link = false; 2974 return; 2975 } 2976 2977 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa); 2978 } 2979 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 2980 2981 /** 2982 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 2983 * advertisement 2984 * @interface: the PHY interface mode being configured 2985 * @advertising: the ethtool advertisement mask 2986 * 2987 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 2988 * clause 37 negotiation and/or SGMII control. 2989 * 2990 * Encode the clause 37 PCS advertisement as specified by @interface and 2991 * @advertising. 2992 * 2993 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 2994 */ 2995 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 2996 const unsigned long *advertising) 2997 { 2998 u16 adv; 2999 3000 switch (interface) { 3001 case PHY_INTERFACE_MODE_1000BASEX: 3002 case PHY_INTERFACE_MODE_2500BASEX: 3003 adv = ADVERTISE_1000XFULL; 3004 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 3005 advertising)) 3006 adv |= ADVERTISE_1000XPAUSE; 3007 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 3008 advertising)) 3009 adv |= ADVERTISE_1000XPSE_ASYM; 3010 return adv; 3011 case PHY_INTERFACE_MODE_SGMII: 3012 case PHY_INTERFACE_MODE_QSGMII: 3013 return 0x0001; 3014 default: 3015 /* Nothing to do for other modes */ 3016 return -EINVAL; 3017 } 3018 } 3019 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 3020 3021 /** 3022 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 3023 * @pcs: a pointer to a &struct mdio_device. 3024 * @mode: link autonegotiation mode 3025 * @interface: the PHY interface mode being configured 3026 * @advertising: the ethtool advertisement mask 3027 * 3028 * Configure a Clause 22 PCS PHY with the appropriate negotiation 3029 * parameters for the @mode, @interface and @advertising parameters. 3030 * Returns negative error number on failure, zero if the advertisement 3031 * has not changed, or positive if there is a change. 3032 */ 3033 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, unsigned int mode, 3034 phy_interface_t interface, 3035 const unsigned long *advertising) 3036 { 3037 bool changed = 0; 3038 u16 bmcr; 3039 int ret, adv; 3040 3041 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 3042 if (adv >= 0) { 3043 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 3044 MII_ADVERTISE, 0xffff, adv); 3045 if (ret < 0) 3046 return ret; 3047 changed = ret; 3048 } 3049 3050 /* Ensure ISOLATE bit is disabled */ 3051 if (mode == MLO_AN_INBAND && 3052 (interface == PHY_INTERFACE_MODE_SGMII || 3053 interface == PHY_INTERFACE_MODE_QSGMII || 3054 linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, advertising))) 3055 bmcr = BMCR_ANENABLE; 3056 else 3057 bmcr = 0; 3058 3059 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 3060 if (ret < 0) 3061 return ret; 3062 3063 return changed; 3064 } 3065 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 3066 3067 /** 3068 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 3069 * @pcs: a pointer to a &struct mdio_device. 3070 * 3071 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3072 * clause 37 negotiation. 3073 * 3074 * Restart the clause 37 negotiation with the link partner. This is 3075 * suitable to be directly plugged into the mac_pcs_get_state() member 3076 * of the struct phylink_mac_ops structure. 3077 */ 3078 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 3079 { 3080 int val = mdiodev_read(pcs, MII_BMCR); 3081 3082 if (val >= 0) { 3083 val |= BMCR_ANRESTART; 3084 3085 mdiodev_write(pcs, MII_BMCR, val); 3086 } 3087 } 3088 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 3089 3090 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 3091 struct phylink_link_state *state) 3092 { 3093 struct mii_bus *bus = pcs->bus; 3094 int addr = pcs->addr; 3095 int stat; 3096 3097 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 3098 if (stat < 0) { 3099 state->link = false; 3100 return; 3101 } 3102 3103 state->link = !!(stat & MDIO_STAT1_LSTATUS); 3104 if (!state->link) 3105 return; 3106 3107 switch (state->interface) { 3108 case PHY_INTERFACE_MODE_10GBASER: 3109 state->speed = SPEED_10000; 3110 state->duplex = DUPLEX_FULL; 3111 break; 3112 3113 default: 3114 break; 3115 } 3116 } 3117 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 3118 3119 MODULE_LICENSE("GPL v2"); 3120