1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Core PHY library, taken from phy.c 4 */ 5 #include <linux/export.h> 6 #include <linux/phy.h> 7 #include <linux/of.h> 8 9 /** 10 * phy_speed_to_str - Return a string representing the PHY link speed 11 * 12 * @speed: Speed of the link 13 */ 14 const char *phy_speed_to_str(int speed) 15 { 16 BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 93, 17 "Enum ethtool_link_mode_bit_indices and phylib are out of sync. " 18 "If a speed or mode has been added please update phy_speed_to_str " 19 "and the PHY settings array.\n"); 20 21 switch (speed) { 22 case SPEED_10: 23 return "10Mbps"; 24 case SPEED_100: 25 return "100Mbps"; 26 case SPEED_1000: 27 return "1Gbps"; 28 case SPEED_2500: 29 return "2.5Gbps"; 30 case SPEED_5000: 31 return "5Gbps"; 32 case SPEED_10000: 33 return "10Gbps"; 34 case SPEED_14000: 35 return "14Gbps"; 36 case SPEED_20000: 37 return "20Gbps"; 38 case SPEED_25000: 39 return "25Gbps"; 40 case SPEED_40000: 41 return "40Gbps"; 42 case SPEED_50000: 43 return "50Gbps"; 44 case SPEED_56000: 45 return "56Gbps"; 46 case SPEED_100000: 47 return "100Gbps"; 48 case SPEED_200000: 49 return "200Gbps"; 50 case SPEED_400000: 51 return "400Gbps"; 52 case SPEED_UNKNOWN: 53 return "Unknown"; 54 default: 55 return "Unsupported (update phy-core.c)"; 56 } 57 } 58 EXPORT_SYMBOL_GPL(phy_speed_to_str); 59 60 /** 61 * phy_duplex_to_str - Return string describing the duplex 62 * 63 * @duplex: Duplex setting to describe 64 */ 65 const char *phy_duplex_to_str(unsigned int duplex) 66 { 67 if (duplex == DUPLEX_HALF) 68 return "Half"; 69 if (duplex == DUPLEX_FULL) 70 return "Full"; 71 if (duplex == DUPLEX_UNKNOWN) 72 return "Unknown"; 73 return "Unsupported (update phy-core.c)"; 74 } 75 EXPORT_SYMBOL_GPL(phy_duplex_to_str); 76 77 /** 78 * phy_interface_num_ports - Return the number of links that can be carried by 79 * a given MAC-PHY physical link. Returns 0 if this is 80 * unknown, the number of links else. 81 * 82 * @interface: The interface mode we want to get the number of ports 83 */ 84 int phy_interface_num_ports(phy_interface_t interface) 85 { 86 switch (interface) { 87 case PHY_INTERFACE_MODE_NA: 88 return 0; 89 case PHY_INTERFACE_MODE_INTERNAL: 90 case PHY_INTERFACE_MODE_MII: 91 case PHY_INTERFACE_MODE_GMII: 92 case PHY_INTERFACE_MODE_TBI: 93 case PHY_INTERFACE_MODE_REVMII: 94 case PHY_INTERFACE_MODE_RMII: 95 case PHY_INTERFACE_MODE_REVRMII: 96 case PHY_INTERFACE_MODE_RGMII: 97 case PHY_INTERFACE_MODE_RGMII_ID: 98 case PHY_INTERFACE_MODE_RGMII_RXID: 99 case PHY_INTERFACE_MODE_RGMII_TXID: 100 case PHY_INTERFACE_MODE_RTBI: 101 case PHY_INTERFACE_MODE_XGMII: 102 case PHY_INTERFACE_MODE_XLGMII: 103 case PHY_INTERFACE_MODE_MOCA: 104 case PHY_INTERFACE_MODE_TRGMII: 105 case PHY_INTERFACE_MODE_USXGMII: 106 case PHY_INTERFACE_MODE_SGMII: 107 case PHY_INTERFACE_MODE_SMII: 108 case PHY_INTERFACE_MODE_1000BASEX: 109 case PHY_INTERFACE_MODE_2500BASEX: 110 case PHY_INTERFACE_MODE_5GBASER: 111 case PHY_INTERFACE_MODE_10GBASER: 112 case PHY_INTERFACE_MODE_25GBASER: 113 case PHY_INTERFACE_MODE_10GKR: 114 case PHY_INTERFACE_MODE_100BASEX: 115 case PHY_INTERFACE_MODE_RXAUI: 116 case PHY_INTERFACE_MODE_XAUI: 117 return 1; 118 case PHY_INTERFACE_MODE_QSGMII: 119 case PHY_INTERFACE_MODE_QUSGMII: 120 return 4; 121 case PHY_INTERFACE_MODE_MAX: 122 WARN_ONCE(1, "PHY_INTERFACE_MODE_MAX isn't a valid interface mode"); 123 return 0; 124 } 125 return 0; 126 } 127 EXPORT_SYMBOL_GPL(phy_interface_num_ports); 128 129 /* A mapping of all SUPPORTED settings to speed/duplex. This table 130 * must be grouped by speed and sorted in descending match priority 131 * - iow, descending speed. 132 */ 133 134 #define PHY_SETTING(s, d, b) { .speed = SPEED_ ## s, .duplex = DUPLEX_ ## d, \ 135 .bit = ETHTOOL_LINK_MODE_ ## b ## _BIT} 136 137 static const struct phy_setting settings[] = { 138 /* 400G */ 139 PHY_SETTING( 400000, FULL, 400000baseCR8_Full ), 140 PHY_SETTING( 400000, FULL, 400000baseKR8_Full ), 141 PHY_SETTING( 400000, FULL, 400000baseLR8_ER8_FR8_Full ), 142 PHY_SETTING( 400000, FULL, 400000baseDR8_Full ), 143 PHY_SETTING( 400000, FULL, 400000baseSR8_Full ), 144 PHY_SETTING( 400000, FULL, 400000baseCR4_Full ), 145 PHY_SETTING( 400000, FULL, 400000baseKR4_Full ), 146 PHY_SETTING( 400000, FULL, 400000baseLR4_ER4_FR4_Full ), 147 PHY_SETTING( 400000, FULL, 400000baseDR4_Full ), 148 PHY_SETTING( 400000, FULL, 400000baseSR4_Full ), 149 /* 200G */ 150 PHY_SETTING( 200000, FULL, 200000baseCR4_Full ), 151 PHY_SETTING( 200000, FULL, 200000baseKR4_Full ), 152 PHY_SETTING( 200000, FULL, 200000baseLR4_ER4_FR4_Full ), 153 PHY_SETTING( 200000, FULL, 200000baseDR4_Full ), 154 PHY_SETTING( 200000, FULL, 200000baseSR4_Full ), 155 PHY_SETTING( 200000, FULL, 200000baseCR2_Full ), 156 PHY_SETTING( 200000, FULL, 200000baseKR2_Full ), 157 PHY_SETTING( 200000, FULL, 200000baseLR2_ER2_FR2_Full ), 158 PHY_SETTING( 200000, FULL, 200000baseDR2_Full ), 159 PHY_SETTING( 200000, FULL, 200000baseSR2_Full ), 160 /* 100G */ 161 PHY_SETTING( 100000, FULL, 100000baseCR4_Full ), 162 PHY_SETTING( 100000, FULL, 100000baseKR4_Full ), 163 PHY_SETTING( 100000, FULL, 100000baseLR4_ER4_Full ), 164 PHY_SETTING( 100000, FULL, 100000baseSR4_Full ), 165 PHY_SETTING( 100000, FULL, 100000baseCR2_Full ), 166 PHY_SETTING( 100000, FULL, 100000baseKR2_Full ), 167 PHY_SETTING( 100000, FULL, 100000baseLR2_ER2_FR2_Full ), 168 PHY_SETTING( 100000, FULL, 100000baseDR2_Full ), 169 PHY_SETTING( 100000, FULL, 100000baseSR2_Full ), 170 PHY_SETTING( 100000, FULL, 100000baseCR_Full ), 171 PHY_SETTING( 100000, FULL, 100000baseKR_Full ), 172 PHY_SETTING( 100000, FULL, 100000baseLR_ER_FR_Full ), 173 PHY_SETTING( 100000, FULL, 100000baseDR_Full ), 174 PHY_SETTING( 100000, FULL, 100000baseSR_Full ), 175 /* 56G */ 176 PHY_SETTING( 56000, FULL, 56000baseCR4_Full ), 177 PHY_SETTING( 56000, FULL, 56000baseKR4_Full ), 178 PHY_SETTING( 56000, FULL, 56000baseLR4_Full ), 179 PHY_SETTING( 56000, FULL, 56000baseSR4_Full ), 180 /* 50G */ 181 PHY_SETTING( 50000, FULL, 50000baseCR2_Full ), 182 PHY_SETTING( 50000, FULL, 50000baseKR2_Full ), 183 PHY_SETTING( 50000, FULL, 50000baseSR2_Full ), 184 PHY_SETTING( 50000, FULL, 50000baseCR_Full ), 185 PHY_SETTING( 50000, FULL, 50000baseKR_Full ), 186 PHY_SETTING( 50000, FULL, 50000baseLR_ER_FR_Full ), 187 PHY_SETTING( 50000, FULL, 50000baseDR_Full ), 188 PHY_SETTING( 50000, FULL, 50000baseSR_Full ), 189 /* 40G */ 190 PHY_SETTING( 40000, FULL, 40000baseCR4_Full ), 191 PHY_SETTING( 40000, FULL, 40000baseKR4_Full ), 192 PHY_SETTING( 40000, FULL, 40000baseLR4_Full ), 193 PHY_SETTING( 40000, FULL, 40000baseSR4_Full ), 194 /* 25G */ 195 PHY_SETTING( 25000, FULL, 25000baseCR_Full ), 196 PHY_SETTING( 25000, FULL, 25000baseKR_Full ), 197 PHY_SETTING( 25000, FULL, 25000baseSR_Full ), 198 /* 20G */ 199 PHY_SETTING( 20000, FULL, 20000baseKR2_Full ), 200 PHY_SETTING( 20000, FULL, 20000baseMLD2_Full ), 201 /* 10G */ 202 PHY_SETTING( 10000, FULL, 10000baseCR_Full ), 203 PHY_SETTING( 10000, FULL, 10000baseER_Full ), 204 PHY_SETTING( 10000, FULL, 10000baseKR_Full ), 205 PHY_SETTING( 10000, FULL, 10000baseKX4_Full ), 206 PHY_SETTING( 10000, FULL, 10000baseLR_Full ), 207 PHY_SETTING( 10000, FULL, 10000baseLRM_Full ), 208 PHY_SETTING( 10000, FULL, 10000baseR_FEC ), 209 PHY_SETTING( 10000, FULL, 10000baseSR_Full ), 210 PHY_SETTING( 10000, FULL, 10000baseT_Full ), 211 /* 5G */ 212 PHY_SETTING( 5000, FULL, 5000baseT_Full ), 213 /* 2.5G */ 214 PHY_SETTING( 2500, FULL, 2500baseT_Full ), 215 PHY_SETTING( 2500, FULL, 2500baseX_Full ), 216 /* 1G */ 217 PHY_SETTING( 1000, FULL, 1000baseT_Full ), 218 PHY_SETTING( 1000, HALF, 1000baseT_Half ), 219 PHY_SETTING( 1000, FULL, 1000baseT1_Full ), 220 PHY_SETTING( 1000, FULL, 1000baseX_Full ), 221 PHY_SETTING( 1000, FULL, 1000baseKX_Full ), 222 /* 100M */ 223 PHY_SETTING( 100, FULL, 100baseT_Full ), 224 PHY_SETTING( 100, FULL, 100baseT1_Full ), 225 PHY_SETTING( 100, HALF, 100baseT_Half ), 226 PHY_SETTING( 100, HALF, 100baseFX_Half ), 227 PHY_SETTING( 100, FULL, 100baseFX_Full ), 228 /* 10M */ 229 PHY_SETTING( 10, FULL, 10baseT_Full ), 230 PHY_SETTING( 10, HALF, 10baseT_Half ), 231 PHY_SETTING( 10, FULL, 10baseT1L_Full ), 232 }; 233 #undef PHY_SETTING 234 235 /** 236 * phy_lookup_setting - lookup a PHY setting 237 * @speed: speed to match 238 * @duplex: duplex to match 239 * @mask: allowed link modes 240 * @exact: an exact match is required 241 * 242 * Search the settings array for a setting that matches the speed and 243 * duplex, and which is supported. 244 * 245 * If @exact is unset, either an exact match or %NULL for no match will 246 * be returned. 247 * 248 * If @exact is set, an exact match, the fastest supported setting at 249 * or below the specified speed, the slowest supported setting, or if 250 * they all fail, %NULL will be returned. 251 */ 252 const struct phy_setting * 253 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, bool exact) 254 { 255 const struct phy_setting *p, *match = NULL, *last = NULL; 256 int i; 257 258 for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) { 259 if (p->bit < __ETHTOOL_LINK_MODE_MASK_NBITS && 260 test_bit(p->bit, mask)) { 261 last = p; 262 if (p->speed == speed && p->duplex == duplex) { 263 /* Exact match for speed and duplex */ 264 match = p; 265 break; 266 } else if (!exact) { 267 if (!match && p->speed <= speed) 268 /* Candidate */ 269 match = p; 270 271 if (p->speed < speed) 272 break; 273 } 274 } 275 } 276 277 if (!match && !exact) 278 match = last; 279 280 return match; 281 } 282 EXPORT_SYMBOL_GPL(phy_lookup_setting); 283 284 size_t phy_speeds(unsigned int *speeds, size_t size, 285 unsigned long *mask) 286 { 287 size_t count; 288 int i; 289 290 for (i = 0, count = 0; i < ARRAY_SIZE(settings) && count < size; i++) 291 if (settings[i].bit < __ETHTOOL_LINK_MODE_MASK_NBITS && 292 test_bit(settings[i].bit, mask) && 293 (count == 0 || speeds[count - 1] != settings[i].speed)) 294 speeds[count++] = settings[i].speed; 295 296 return count; 297 } 298 299 static void __set_linkmode_max_speed(u32 max_speed, unsigned long *addr) 300 { 301 const struct phy_setting *p; 302 int i; 303 304 for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) { 305 if (p->speed > max_speed) 306 linkmode_clear_bit(p->bit, addr); 307 else 308 break; 309 } 310 } 311 312 static void __set_phy_supported(struct phy_device *phydev, u32 max_speed) 313 { 314 __set_linkmode_max_speed(max_speed, phydev->supported); 315 } 316 317 /** 318 * phy_set_max_speed - Set the maximum speed the PHY should support 319 * 320 * @phydev: The phy_device struct 321 * @max_speed: Maximum speed 322 * 323 * The PHY might be more capable than the MAC. For example a Fast Ethernet 324 * is connected to a 1G PHY. This function allows the MAC to indicate its 325 * maximum speed, and so limit what the PHY will advertise. 326 */ 327 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed) 328 { 329 __set_phy_supported(phydev, max_speed); 330 331 phy_advertise_supported(phydev); 332 } 333 EXPORT_SYMBOL(phy_set_max_speed); 334 335 void of_set_phy_supported(struct phy_device *phydev) 336 { 337 struct device_node *node = phydev->mdio.dev.of_node; 338 u32 max_speed; 339 340 if (!IS_ENABLED(CONFIG_OF_MDIO)) 341 return; 342 343 if (!node) 344 return; 345 346 if (!of_property_read_u32(node, "max-speed", &max_speed)) 347 __set_phy_supported(phydev, max_speed); 348 } 349 350 void of_set_phy_eee_broken(struct phy_device *phydev) 351 { 352 struct device_node *node = phydev->mdio.dev.of_node; 353 u32 broken = 0; 354 355 if (!IS_ENABLED(CONFIG_OF_MDIO)) 356 return; 357 358 if (!node) 359 return; 360 361 if (of_property_read_bool(node, "eee-broken-100tx")) 362 broken |= MDIO_EEE_100TX; 363 if (of_property_read_bool(node, "eee-broken-1000t")) 364 broken |= MDIO_EEE_1000T; 365 if (of_property_read_bool(node, "eee-broken-10gt")) 366 broken |= MDIO_EEE_10GT; 367 if (of_property_read_bool(node, "eee-broken-1000kx")) 368 broken |= MDIO_EEE_1000KX; 369 if (of_property_read_bool(node, "eee-broken-10gkx4")) 370 broken |= MDIO_EEE_10GKX4; 371 if (of_property_read_bool(node, "eee-broken-10gkr")) 372 broken |= MDIO_EEE_10GKR; 373 374 phydev->eee_broken_modes = broken; 375 } 376 377 /** 378 * phy_resolve_aneg_pause - Determine pause autoneg results 379 * 380 * @phydev: The phy_device struct 381 * 382 * Once autoneg has completed the local pause settings can be 383 * resolved. Determine if pause and asymmetric pause should be used 384 * by the MAC. 385 */ 386 387 void phy_resolve_aneg_pause(struct phy_device *phydev) 388 { 389 if (phydev->duplex == DUPLEX_FULL) { 390 phydev->pause = linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 391 phydev->lp_advertising); 392 phydev->asym_pause = linkmode_test_bit( 393 ETHTOOL_LINK_MODE_Asym_Pause_BIT, 394 phydev->lp_advertising); 395 } 396 } 397 EXPORT_SYMBOL_GPL(phy_resolve_aneg_pause); 398 399 /** 400 * phy_resolve_aneg_linkmode - resolve the advertisements into PHY settings 401 * @phydev: The phy_device struct 402 * 403 * Resolve our and the link partner advertisements into their corresponding 404 * speed and duplex. If full duplex was negotiated, extract the pause mode 405 * from the link partner mask. 406 */ 407 void phy_resolve_aneg_linkmode(struct phy_device *phydev) 408 { 409 __ETHTOOL_DECLARE_LINK_MODE_MASK(common); 410 int i; 411 412 linkmode_and(common, phydev->lp_advertising, phydev->advertising); 413 414 for (i = 0; i < ARRAY_SIZE(settings); i++) 415 if (test_bit(settings[i].bit, common)) { 416 phydev->speed = settings[i].speed; 417 phydev->duplex = settings[i].duplex; 418 break; 419 } 420 421 phy_resolve_aneg_pause(phydev); 422 } 423 EXPORT_SYMBOL_GPL(phy_resolve_aneg_linkmode); 424 425 /** 426 * phy_check_downshift - check whether downshift occurred 427 * @phydev: The phy_device struct 428 * 429 * Check whether a downshift to a lower speed occurred. If this should be the 430 * case warn the user. 431 * Prerequisite for detecting downshift is that PHY driver implements the 432 * read_status callback and sets phydev->speed to the actual link speed. 433 */ 434 void phy_check_downshift(struct phy_device *phydev) 435 { 436 __ETHTOOL_DECLARE_LINK_MODE_MASK(common); 437 int i, speed = SPEED_UNKNOWN; 438 439 phydev->downshifted_rate = 0; 440 441 if (phydev->autoneg == AUTONEG_DISABLE || 442 phydev->speed == SPEED_UNKNOWN) 443 return; 444 445 linkmode_and(common, phydev->lp_advertising, phydev->advertising); 446 447 for (i = 0; i < ARRAY_SIZE(settings); i++) 448 if (test_bit(settings[i].bit, common)) { 449 speed = settings[i].speed; 450 break; 451 } 452 453 if (speed == SPEED_UNKNOWN || phydev->speed >= speed) 454 return; 455 456 phydev_warn(phydev, "Downshift occurred from negotiated speed %s to actual speed %s, check cabling!\n", 457 phy_speed_to_str(speed), phy_speed_to_str(phydev->speed)); 458 459 phydev->downshifted_rate = 1; 460 } 461 EXPORT_SYMBOL_GPL(phy_check_downshift); 462 463 static int phy_resolve_min_speed(struct phy_device *phydev, bool fdx_only) 464 { 465 __ETHTOOL_DECLARE_LINK_MODE_MASK(common); 466 int i = ARRAY_SIZE(settings); 467 468 linkmode_and(common, phydev->lp_advertising, phydev->advertising); 469 470 while (--i >= 0) { 471 if (test_bit(settings[i].bit, common)) { 472 if (fdx_only && settings[i].duplex != DUPLEX_FULL) 473 continue; 474 return settings[i].speed; 475 } 476 } 477 478 return SPEED_UNKNOWN; 479 } 480 481 int phy_speed_down_core(struct phy_device *phydev) 482 { 483 int min_common_speed = phy_resolve_min_speed(phydev, true); 484 485 if (min_common_speed == SPEED_UNKNOWN) 486 return -EINVAL; 487 488 __set_linkmode_max_speed(min_common_speed, phydev->advertising); 489 490 return 0; 491 } 492 493 static void mmd_phy_indirect(struct mii_bus *bus, int phy_addr, int devad, 494 u16 regnum) 495 { 496 /* Write the desired MMD Devad */ 497 __mdiobus_write(bus, phy_addr, MII_MMD_CTRL, devad); 498 499 /* Write the desired MMD register address */ 500 __mdiobus_write(bus, phy_addr, MII_MMD_DATA, regnum); 501 502 /* Select the Function : DATA with no post increment */ 503 __mdiobus_write(bus, phy_addr, MII_MMD_CTRL, 504 devad | MII_MMD_CTRL_NOINCR); 505 } 506 507 /** 508 * __phy_read_mmd - Convenience function for reading a register 509 * from an MMD on a given PHY. 510 * @phydev: The phy_device struct 511 * @devad: The MMD to read from (0..31) 512 * @regnum: The register on the MMD to read (0..65535) 513 * 514 * Same rules as for __phy_read(); 515 */ 516 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) 517 { 518 int val; 519 520 if (regnum > (u16)~0 || devad > 32) 521 return -EINVAL; 522 523 if (phydev->drv && phydev->drv->read_mmd) { 524 val = phydev->drv->read_mmd(phydev, devad, regnum); 525 } else if (phydev->is_c45) { 526 val = __mdiobus_c45_read(phydev->mdio.bus, phydev->mdio.addr, 527 devad, regnum); 528 } else { 529 struct mii_bus *bus = phydev->mdio.bus; 530 int phy_addr = phydev->mdio.addr; 531 532 mmd_phy_indirect(bus, phy_addr, devad, regnum); 533 534 /* Read the content of the MMD's selected register */ 535 val = __mdiobus_read(bus, phy_addr, MII_MMD_DATA); 536 } 537 return val; 538 } 539 EXPORT_SYMBOL(__phy_read_mmd); 540 541 /** 542 * phy_read_mmd - Convenience function for reading a register 543 * from an MMD on a given PHY. 544 * @phydev: The phy_device struct 545 * @devad: The MMD to read from 546 * @regnum: The register on the MMD to read 547 * 548 * Same rules as for phy_read(); 549 */ 550 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) 551 { 552 int ret; 553 554 phy_lock_mdio_bus(phydev); 555 ret = __phy_read_mmd(phydev, devad, regnum); 556 phy_unlock_mdio_bus(phydev); 557 558 return ret; 559 } 560 EXPORT_SYMBOL(phy_read_mmd); 561 562 /** 563 * __phy_write_mmd - Convenience function for writing a register 564 * on an MMD on a given PHY. 565 * @phydev: The phy_device struct 566 * @devad: The MMD to read from 567 * @regnum: The register on the MMD to read 568 * @val: value to write to @regnum 569 * 570 * Same rules as for __phy_write(); 571 */ 572 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val) 573 { 574 int ret; 575 576 if (regnum > (u16)~0 || devad > 32) 577 return -EINVAL; 578 579 if (phydev->drv && phydev->drv->write_mmd) { 580 ret = phydev->drv->write_mmd(phydev, devad, regnum, val); 581 } else if (phydev->is_c45) { 582 ret = __mdiobus_c45_write(phydev->mdio.bus, phydev->mdio.addr, 583 devad, regnum, val); 584 } else { 585 struct mii_bus *bus = phydev->mdio.bus; 586 int phy_addr = phydev->mdio.addr; 587 588 mmd_phy_indirect(bus, phy_addr, devad, regnum); 589 590 /* Write the data into MMD's selected register */ 591 __mdiobus_write(bus, phy_addr, MII_MMD_DATA, val); 592 593 ret = 0; 594 } 595 return ret; 596 } 597 EXPORT_SYMBOL(__phy_write_mmd); 598 599 /** 600 * phy_write_mmd - Convenience function for writing a register 601 * on an MMD on a given PHY. 602 * @phydev: The phy_device struct 603 * @devad: The MMD to read from 604 * @regnum: The register on the MMD to read 605 * @val: value to write to @regnum 606 * 607 * Same rules as for phy_write(); 608 */ 609 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val) 610 { 611 int ret; 612 613 phy_lock_mdio_bus(phydev); 614 ret = __phy_write_mmd(phydev, devad, regnum, val); 615 phy_unlock_mdio_bus(phydev); 616 617 return ret; 618 } 619 EXPORT_SYMBOL(phy_write_mmd); 620 621 /** 622 * phy_modify_changed - Function for modifying a PHY register 623 * @phydev: the phy_device struct 624 * @regnum: register number to modify 625 * @mask: bit mask of bits to clear 626 * @set: new value of bits set in mask to write to @regnum 627 * 628 * NOTE: MUST NOT be called from interrupt context, 629 * because the bus read/write functions may wait for an interrupt 630 * to conclude the operation. 631 * 632 * Returns negative errno, 0 if there was no change, and 1 in case of change 633 */ 634 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, u16 set) 635 { 636 int ret; 637 638 phy_lock_mdio_bus(phydev); 639 ret = __phy_modify_changed(phydev, regnum, mask, set); 640 phy_unlock_mdio_bus(phydev); 641 642 return ret; 643 } 644 EXPORT_SYMBOL_GPL(phy_modify_changed); 645 646 /** 647 * __phy_modify - Convenience function for modifying a PHY register 648 * @phydev: the phy_device struct 649 * @regnum: register number to modify 650 * @mask: bit mask of bits to clear 651 * @set: new value of bits set in mask to write to @regnum 652 * 653 * NOTE: MUST NOT be called from interrupt context, 654 * because the bus read/write functions may wait for an interrupt 655 * to conclude the operation. 656 */ 657 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set) 658 { 659 int ret; 660 661 ret = __phy_modify_changed(phydev, regnum, mask, set); 662 663 return ret < 0 ? ret : 0; 664 } 665 EXPORT_SYMBOL_GPL(__phy_modify); 666 667 /** 668 * phy_modify - Convenience function for modifying a given PHY register 669 * @phydev: the phy_device struct 670 * @regnum: register number to write 671 * @mask: bit mask of bits to clear 672 * @set: new value of bits set in mask to write to @regnum 673 * 674 * NOTE: MUST NOT be called from interrupt context, 675 * because the bus read/write functions may wait for an interrupt 676 * to conclude the operation. 677 */ 678 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set) 679 { 680 int ret; 681 682 phy_lock_mdio_bus(phydev); 683 ret = __phy_modify(phydev, regnum, mask, set); 684 phy_unlock_mdio_bus(phydev); 685 686 return ret; 687 } 688 EXPORT_SYMBOL_GPL(phy_modify); 689 690 /** 691 * __phy_modify_mmd_changed - Function for modifying a register on MMD 692 * @phydev: the phy_device struct 693 * @devad: the MMD containing register to modify 694 * @regnum: register number to modify 695 * @mask: bit mask of bits to clear 696 * @set: new value of bits set in mask to write to @regnum 697 * 698 * Unlocked helper function which allows a MMD register to be modified as 699 * new register value = (old register value & ~mask) | set 700 * 701 * Returns negative errno, 0 if there was no change, and 1 in case of change 702 */ 703 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 704 u16 mask, u16 set) 705 { 706 int new, ret; 707 708 ret = __phy_read_mmd(phydev, devad, regnum); 709 if (ret < 0) 710 return ret; 711 712 new = (ret & ~mask) | set; 713 if (new == ret) 714 return 0; 715 716 ret = __phy_write_mmd(phydev, devad, regnum, new); 717 718 return ret < 0 ? ret : 1; 719 } 720 EXPORT_SYMBOL_GPL(__phy_modify_mmd_changed); 721 722 /** 723 * phy_modify_mmd_changed - Function for modifying a register on MMD 724 * @phydev: the phy_device struct 725 * @devad: the MMD containing register to modify 726 * @regnum: register number to modify 727 * @mask: bit mask of bits to clear 728 * @set: new value of bits set in mask to write to @regnum 729 * 730 * NOTE: MUST NOT be called from interrupt context, 731 * because the bus read/write functions may wait for an interrupt 732 * to conclude the operation. 733 * 734 * Returns negative errno, 0 if there was no change, and 1 in case of change 735 */ 736 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 737 u16 mask, u16 set) 738 { 739 int ret; 740 741 phy_lock_mdio_bus(phydev); 742 ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set); 743 phy_unlock_mdio_bus(phydev); 744 745 return ret; 746 } 747 EXPORT_SYMBOL_GPL(phy_modify_mmd_changed); 748 749 /** 750 * __phy_modify_mmd - Convenience function for modifying a register on MMD 751 * @phydev: the phy_device struct 752 * @devad: the MMD containing register to modify 753 * @regnum: register number to modify 754 * @mask: bit mask of bits to clear 755 * @set: new value of bits set in mask to write to @regnum 756 * 757 * NOTE: MUST NOT be called from interrupt context, 758 * because the bus read/write functions may wait for an interrupt 759 * to conclude the operation. 760 */ 761 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 762 u16 mask, u16 set) 763 { 764 int ret; 765 766 ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set); 767 768 return ret < 0 ? ret : 0; 769 } 770 EXPORT_SYMBOL_GPL(__phy_modify_mmd); 771 772 /** 773 * phy_modify_mmd - Convenience function for modifying a register on MMD 774 * @phydev: the phy_device struct 775 * @devad: the MMD containing register to modify 776 * @regnum: register number to modify 777 * @mask: bit mask of bits to clear 778 * @set: new value of bits set in mask to write to @regnum 779 * 780 * NOTE: MUST NOT be called from interrupt context, 781 * because the bus read/write functions may wait for an interrupt 782 * to conclude the operation. 783 */ 784 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 785 u16 mask, u16 set) 786 { 787 int ret; 788 789 phy_lock_mdio_bus(phydev); 790 ret = __phy_modify_mmd(phydev, devad, regnum, mask, set); 791 phy_unlock_mdio_bus(phydev); 792 793 return ret; 794 } 795 EXPORT_SYMBOL_GPL(phy_modify_mmd); 796 797 static int __phy_read_page(struct phy_device *phydev) 798 { 799 if (WARN_ONCE(!phydev->drv->read_page, "read_page callback not available, PHY driver not loaded?\n")) 800 return -EOPNOTSUPP; 801 802 return phydev->drv->read_page(phydev); 803 } 804 805 static int __phy_write_page(struct phy_device *phydev, int page) 806 { 807 if (WARN_ONCE(!phydev->drv->write_page, "write_page callback not available, PHY driver not loaded?\n")) 808 return -EOPNOTSUPP; 809 810 return phydev->drv->write_page(phydev, page); 811 } 812 813 /** 814 * phy_save_page() - take the bus lock and save the current page 815 * @phydev: a pointer to a &struct phy_device 816 * 817 * Take the MDIO bus lock, and return the current page number. On error, 818 * returns a negative errno. phy_restore_page() must always be called 819 * after this, irrespective of success or failure of this call. 820 */ 821 int phy_save_page(struct phy_device *phydev) 822 { 823 phy_lock_mdio_bus(phydev); 824 return __phy_read_page(phydev); 825 } 826 EXPORT_SYMBOL_GPL(phy_save_page); 827 828 /** 829 * phy_select_page() - take the bus lock, save the current page, and set a page 830 * @phydev: a pointer to a &struct phy_device 831 * @page: desired page 832 * 833 * Take the MDIO bus lock to protect against concurrent access, save the 834 * current PHY page, and set the current page. On error, returns a 835 * negative errno, otherwise returns the previous page number. 836 * phy_restore_page() must always be called after this, irrespective 837 * of success or failure of this call. 838 */ 839 int phy_select_page(struct phy_device *phydev, int page) 840 { 841 int ret, oldpage; 842 843 oldpage = ret = phy_save_page(phydev); 844 if (ret < 0) 845 return ret; 846 847 if (oldpage != page) { 848 ret = __phy_write_page(phydev, page); 849 if (ret < 0) 850 return ret; 851 } 852 853 return oldpage; 854 } 855 EXPORT_SYMBOL_GPL(phy_select_page); 856 857 /** 858 * phy_restore_page() - restore the page register and release the bus lock 859 * @phydev: a pointer to a &struct phy_device 860 * @oldpage: the old page, return value from phy_save_page() or phy_select_page() 861 * @ret: operation's return code 862 * 863 * Release the MDIO bus lock, restoring @oldpage if it is a valid page. 864 * This function propagates the earliest error code from the group of 865 * operations. 866 * 867 * Returns: 868 * @oldpage if it was a negative value, otherwise 869 * @ret if it was a negative errno value, otherwise 870 * phy_write_page()'s negative value if it were in error, otherwise 871 * @ret. 872 */ 873 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret) 874 { 875 int r; 876 877 if (oldpage >= 0) { 878 r = __phy_write_page(phydev, oldpage); 879 880 /* Propagate the operation return code if the page write 881 * was successful. 882 */ 883 if (ret >= 0 && r < 0) 884 ret = r; 885 } else { 886 /* Propagate the phy page selection error code */ 887 ret = oldpage; 888 } 889 890 phy_unlock_mdio_bus(phydev); 891 892 return ret; 893 } 894 EXPORT_SYMBOL_GPL(phy_restore_page); 895 896 /** 897 * phy_read_paged() - Convenience function for reading a paged register 898 * @phydev: a pointer to a &struct phy_device 899 * @page: the page for the phy 900 * @regnum: register number 901 * 902 * Same rules as for phy_read(). 903 */ 904 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum) 905 { 906 int ret = 0, oldpage; 907 908 oldpage = phy_select_page(phydev, page); 909 if (oldpage >= 0) 910 ret = __phy_read(phydev, regnum); 911 912 return phy_restore_page(phydev, oldpage, ret); 913 } 914 EXPORT_SYMBOL(phy_read_paged); 915 916 /** 917 * phy_write_paged() - Convenience function for writing a paged register 918 * @phydev: a pointer to a &struct phy_device 919 * @page: the page for the phy 920 * @regnum: register number 921 * @val: value to write 922 * 923 * Same rules as for phy_write(). 924 */ 925 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val) 926 { 927 int ret = 0, oldpage; 928 929 oldpage = phy_select_page(phydev, page); 930 if (oldpage >= 0) 931 ret = __phy_write(phydev, regnum, val); 932 933 return phy_restore_page(phydev, oldpage, ret); 934 } 935 EXPORT_SYMBOL(phy_write_paged); 936 937 /** 938 * phy_modify_paged_changed() - Function for modifying a paged register 939 * @phydev: a pointer to a &struct phy_device 940 * @page: the page for the phy 941 * @regnum: register number 942 * @mask: bit mask of bits to clear 943 * @set: bit mask of bits to set 944 * 945 * Returns negative errno, 0 if there was no change, and 1 in case of change 946 */ 947 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 948 u16 mask, u16 set) 949 { 950 int ret = 0, oldpage; 951 952 oldpage = phy_select_page(phydev, page); 953 if (oldpage >= 0) 954 ret = __phy_modify_changed(phydev, regnum, mask, set); 955 956 return phy_restore_page(phydev, oldpage, ret); 957 } 958 EXPORT_SYMBOL(phy_modify_paged_changed); 959 960 /** 961 * phy_modify_paged() - Convenience function for modifying a paged register 962 * @phydev: a pointer to a &struct phy_device 963 * @page: the page for the phy 964 * @regnum: register number 965 * @mask: bit mask of bits to clear 966 * @set: bit mask of bits to set 967 * 968 * Same rules as for phy_read() and phy_write(). 969 */ 970 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 971 u16 mask, u16 set) 972 { 973 int ret = phy_modify_paged_changed(phydev, page, regnum, mask, set); 974 975 return ret < 0 ? ret : 0; 976 } 977 EXPORT_SYMBOL(phy_modify_paged); 978