xref: /openbmc/linux/drivers/net/phy/phy-core.c (revision d5771670)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Core PHY library, taken from phy.c
4  */
5 #include <linux/export.h>
6 #include <linux/phy.h>
7 #include <linux/of.h>
8 
9 /**
10  * phy_speed_to_str - Return a string representing the PHY link speed
11  *
12  * @speed: Speed of the link
13  */
14 const char *phy_speed_to_str(int speed)
15 {
16 	BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 92,
17 		"Enum ethtool_link_mode_bit_indices and phylib are out of sync. "
18 		"If a speed or mode has been added please update phy_speed_to_str "
19 		"and the PHY settings array.\n");
20 
21 	switch (speed) {
22 	case SPEED_10:
23 		return "10Mbps";
24 	case SPEED_100:
25 		return "100Mbps";
26 	case SPEED_1000:
27 		return "1Gbps";
28 	case SPEED_2500:
29 		return "2.5Gbps";
30 	case SPEED_5000:
31 		return "5Gbps";
32 	case SPEED_10000:
33 		return "10Gbps";
34 	case SPEED_14000:
35 		return "14Gbps";
36 	case SPEED_20000:
37 		return "20Gbps";
38 	case SPEED_25000:
39 		return "25Gbps";
40 	case SPEED_40000:
41 		return "40Gbps";
42 	case SPEED_50000:
43 		return "50Gbps";
44 	case SPEED_56000:
45 		return "56Gbps";
46 	case SPEED_100000:
47 		return "100Gbps";
48 	case SPEED_200000:
49 		return "200Gbps";
50 	case SPEED_400000:
51 		return "400Gbps";
52 	case SPEED_UNKNOWN:
53 		return "Unknown";
54 	default:
55 		return "Unsupported (update phy-core.c)";
56 	}
57 }
58 EXPORT_SYMBOL_GPL(phy_speed_to_str);
59 
60 /**
61  * phy_duplex_to_str - Return string describing the duplex
62  *
63  * @duplex: Duplex setting to describe
64  */
65 const char *phy_duplex_to_str(unsigned int duplex)
66 {
67 	if (duplex == DUPLEX_HALF)
68 		return "Half";
69 	if (duplex == DUPLEX_FULL)
70 		return "Full";
71 	if (duplex == DUPLEX_UNKNOWN)
72 		return "Unknown";
73 	return "Unsupported (update phy-core.c)";
74 }
75 EXPORT_SYMBOL_GPL(phy_duplex_to_str);
76 
77 /* A mapping of all SUPPORTED settings to speed/duplex.  This table
78  * must be grouped by speed and sorted in descending match priority
79  * - iow, descending speed.
80  */
81 
82 #define PHY_SETTING(s, d, b) { .speed = SPEED_ ## s, .duplex = DUPLEX_ ## d, \
83 			       .bit = ETHTOOL_LINK_MODE_ ## b ## _BIT}
84 
85 static const struct phy_setting settings[] = {
86 	/* 400G */
87 	PHY_SETTING( 400000, FULL, 400000baseCR8_Full		),
88 	PHY_SETTING( 400000, FULL, 400000baseKR8_Full		),
89 	PHY_SETTING( 400000, FULL, 400000baseLR8_ER8_FR8_Full	),
90 	PHY_SETTING( 400000, FULL, 400000baseDR8_Full		),
91 	PHY_SETTING( 400000, FULL, 400000baseSR8_Full		),
92 	PHY_SETTING( 400000, FULL, 400000baseCR4_Full		),
93 	PHY_SETTING( 400000, FULL, 400000baseKR4_Full		),
94 	PHY_SETTING( 400000, FULL, 400000baseLR4_ER4_FR4_Full	),
95 	PHY_SETTING( 400000, FULL, 400000baseDR4_Full		),
96 	PHY_SETTING( 400000, FULL, 400000baseSR4_Full		),
97 	/* 200G */
98 	PHY_SETTING( 200000, FULL, 200000baseCR4_Full		),
99 	PHY_SETTING( 200000, FULL, 200000baseKR4_Full		),
100 	PHY_SETTING( 200000, FULL, 200000baseLR4_ER4_FR4_Full	),
101 	PHY_SETTING( 200000, FULL, 200000baseDR4_Full		),
102 	PHY_SETTING( 200000, FULL, 200000baseSR4_Full		),
103 	PHY_SETTING( 200000, FULL, 200000baseCR2_Full		),
104 	PHY_SETTING( 200000, FULL, 200000baseKR2_Full		),
105 	PHY_SETTING( 200000, FULL, 200000baseLR2_ER2_FR2_Full	),
106 	PHY_SETTING( 200000, FULL, 200000baseDR2_Full		),
107 	PHY_SETTING( 200000, FULL, 200000baseSR2_Full		),
108 	/* 100G */
109 	PHY_SETTING( 100000, FULL, 100000baseCR4_Full		),
110 	PHY_SETTING( 100000, FULL, 100000baseKR4_Full		),
111 	PHY_SETTING( 100000, FULL, 100000baseLR4_ER4_Full	),
112 	PHY_SETTING( 100000, FULL, 100000baseSR4_Full		),
113 	PHY_SETTING( 100000, FULL, 100000baseCR2_Full		),
114 	PHY_SETTING( 100000, FULL, 100000baseKR2_Full		),
115 	PHY_SETTING( 100000, FULL, 100000baseLR2_ER2_FR2_Full	),
116 	PHY_SETTING( 100000, FULL, 100000baseDR2_Full		),
117 	PHY_SETTING( 100000, FULL, 100000baseSR2_Full		),
118 	PHY_SETTING( 100000, FULL, 100000baseCR_Full		),
119 	PHY_SETTING( 100000, FULL, 100000baseKR_Full		),
120 	PHY_SETTING( 100000, FULL, 100000baseLR_ER_FR_Full	),
121 	PHY_SETTING( 100000, FULL, 100000baseDR_Full		),
122 	PHY_SETTING( 100000, FULL, 100000baseSR_Full		),
123 	/* 56G */
124 	PHY_SETTING(  56000, FULL,  56000baseCR4_Full	  	),
125 	PHY_SETTING(  56000, FULL,  56000baseKR4_Full	  	),
126 	PHY_SETTING(  56000, FULL,  56000baseLR4_Full	  	),
127 	PHY_SETTING(  56000, FULL,  56000baseSR4_Full	  	),
128 	/* 50G */
129 	PHY_SETTING(  50000, FULL,  50000baseCR2_Full		),
130 	PHY_SETTING(  50000, FULL,  50000baseKR2_Full		),
131 	PHY_SETTING(  50000, FULL,  50000baseSR2_Full		),
132 	PHY_SETTING(  50000, FULL,  50000baseCR_Full		),
133 	PHY_SETTING(  50000, FULL,  50000baseKR_Full		),
134 	PHY_SETTING(  50000, FULL,  50000baseLR_ER_FR_Full	),
135 	PHY_SETTING(  50000, FULL,  50000baseDR_Full		),
136 	PHY_SETTING(  50000, FULL,  50000baseSR_Full		),
137 	/* 40G */
138 	PHY_SETTING(  40000, FULL,  40000baseCR4_Full		),
139 	PHY_SETTING(  40000, FULL,  40000baseKR4_Full		),
140 	PHY_SETTING(  40000, FULL,  40000baseLR4_Full		),
141 	PHY_SETTING(  40000, FULL,  40000baseSR4_Full		),
142 	/* 25G */
143 	PHY_SETTING(  25000, FULL,  25000baseCR_Full		),
144 	PHY_SETTING(  25000, FULL,  25000baseKR_Full		),
145 	PHY_SETTING(  25000, FULL,  25000baseSR_Full		),
146 	/* 20G */
147 	PHY_SETTING(  20000, FULL,  20000baseKR2_Full		),
148 	PHY_SETTING(  20000, FULL,  20000baseMLD2_Full		),
149 	/* 10G */
150 	PHY_SETTING(  10000, FULL,  10000baseCR_Full		),
151 	PHY_SETTING(  10000, FULL,  10000baseER_Full		),
152 	PHY_SETTING(  10000, FULL,  10000baseKR_Full		),
153 	PHY_SETTING(  10000, FULL,  10000baseKX4_Full		),
154 	PHY_SETTING(  10000, FULL,  10000baseLR_Full		),
155 	PHY_SETTING(  10000, FULL,  10000baseLRM_Full		),
156 	PHY_SETTING(  10000, FULL,  10000baseR_FEC		),
157 	PHY_SETTING(  10000, FULL,  10000baseSR_Full		),
158 	PHY_SETTING(  10000, FULL,  10000baseT_Full		),
159 	/* 5G */
160 	PHY_SETTING(   5000, FULL,   5000baseT_Full		),
161 	/* 2.5G */
162 	PHY_SETTING(   2500, FULL,   2500baseT_Full		),
163 	PHY_SETTING(   2500, FULL,   2500baseX_Full		),
164 	/* 1G */
165 	PHY_SETTING(   1000, FULL,   1000baseT_Full		),
166 	PHY_SETTING(   1000, HALF,   1000baseT_Half		),
167 	PHY_SETTING(   1000, FULL,   1000baseT1_Full		),
168 	PHY_SETTING(   1000, FULL,   1000baseX_Full		),
169 	PHY_SETTING(   1000, FULL,   1000baseKX_Full		),
170 	/* 100M */
171 	PHY_SETTING(    100, FULL,    100baseT_Full		),
172 	PHY_SETTING(    100, FULL,    100baseT1_Full		),
173 	PHY_SETTING(    100, HALF,    100baseT_Half		),
174 	PHY_SETTING(    100, HALF,    100baseFX_Half		),
175 	PHY_SETTING(    100, FULL,    100baseFX_Full		),
176 	/* 10M */
177 	PHY_SETTING(     10, FULL,     10baseT_Full		),
178 	PHY_SETTING(     10, HALF,     10baseT_Half		),
179 };
180 #undef PHY_SETTING
181 
182 /**
183  * phy_lookup_setting - lookup a PHY setting
184  * @speed: speed to match
185  * @duplex: duplex to match
186  * @mask: allowed link modes
187  * @exact: an exact match is required
188  *
189  * Search the settings array for a setting that matches the speed and
190  * duplex, and which is supported.
191  *
192  * If @exact is unset, either an exact match or %NULL for no match will
193  * be returned.
194  *
195  * If @exact is set, an exact match, the fastest supported setting at
196  * or below the specified speed, the slowest supported setting, or if
197  * they all fail, %NULL will be returned.
198  */
199 const struct phy_setting *
200 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, bool exact)
201 {
202 	const struct phy_setting *p, *match = NULL, *last = NULL;
203 	int i;
204 
205 	for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) {
206 		if (p->bit < __ETHTOOL_LINK_MODE_MASK_NBITS &&
207 		    test_bit(p->bit, mask)) {
208 			last = p;
209 			if (p->speed == speed && p->duplex == duplex) {
210 				/* Exact match for speed and duplex */
211 				match = p;
212 				break;
213 			} else if (!exact) {
214 				if (!match && p->speed <= speed)
215 					/* Candidate */
216 					match = p;
217 
218 				if (p->speed < speed)
219 					break;
220 			}
221 		}
222 	}
223 
224 	if (!match && !exact)
225 		match = last;
226 
227 	return match;
228 }
229 EXPORT_SYMBOL_GPL(phy_lookup_setting);
230 
231 size_t phy_speeds(unsigned int *speeds, size_t size,
232 		  unsigned long *mask)
233 {
234 	size_t count;
235 	int i;
236 
237 	for (i = 0, count = 0; i < ARRAY_SIZE(settings) && count < size; i++)
238 		if (settings[i].bit < __ETHTOOL_LINK_MODE_MASK_NBITS &&
239 		    test_bit(settings[i].bit, mask) &&
240 		    (count == 0 || speeds[count - 1] != settings[i].speed))
241 			speeds[count++] = settings[i].speed;
242 
243 	return count;
244 }
245 
246 static void __set_linkmode_max_speed(u32 max_speed, unsigned long *addr)
247 {
248 	const struct phy_setting *p;
249 	int i;
250 
251 	for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) {
252 		if (p->speed > max_speed)
253 			linkmode_clear_bit(p->bit, addr);
254 		else
255 			break;
256 	}
257 }
258 
259 static void __set_phy_supported(struct phy_device *phydev, u32 max_speed)
260 {
261 	__set_linkmode_max_speed(max_speed, phydev->supported);
262 }
263 
264 /**
265  * phy_set_max_speed - Set the maximum speed the PHY should support
266  *
267  * @phydev: The phy_device struct
268  * @max_speed: Maximum speed
269  *
270  * The PHY might be more capable than the MAC. For example a Fast Ethernet
271  * is connected to a 1G PHY. This function allows the MAC to indicate its
272  * maximum speed, and so limit what the PHY will advertise.
273  */
274 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed)
275 {
276 	__set_phy_supported(phydev, max_speed);
277 
278 	phy_advertise_supported(phydev);
279 }
280 EXPORT_SYMBOL(phy_set_max_speed);
281 
282 void of_set_phy_supported(struct phy_device *phydev)
283 {
284 	struct device_node *node = phydev->mdio.dev.of_node;
285 	u32 max_speed;
286 
287 	if (!IS_ENABLED(CONFIG_OF_MDIO))
288 		return;
289 
290 	if (!node)
291 		return;
292 
293 	if (!of_property_read_u32(node, "max-speed", &max_speed))
294 		__set_phy_supported(phydev, max_speed);
295 }
296 
297 void of_set_phy_eee_broken(struct phy_device *phydev)
298 {
299 	struct device_node *node = phydev->mdio.dev.of_node;
300 	u32 broken = 0;
301 
302 	if (!IS_ENABLED(CONFIG_OF_MDIO))
303 		return;
304 
305 	if (!node)
306 		return;
307 
308 	if (of_property_read_bool(node, "eee-broken-100tx"))
309 		broken |= MDIO_EEE_100TX;
310 	if (of_property_read_bool(node, "eee-broken-1000t"))
311 		broken |= MDIO_EEE_1000T;
312 	if (of_property_read_bool(node, "eee-broken-10gt"))
313 		broken |= MDIO_EEE_10GT;
314 	if (of_property_read_bool(node, "eee-broken-1000kx"))
315 		broken |= MDIO_EEE_1000KX;
316 	if (of_property_read_bool(node, "eee-broken-10gkx4"))
317 		broken |= MDIO_EEE_10GKX4;
318 	if (of_property_read_bool(node, "eee-broken-10gkr"))
319 		broken |= MDIO_EEE_10GKR;
320 
321 	phydev->eee_broken_modes = broken;
322 }
323 
324 /**
325  * phy_resolve_aneg_pause - Determine pause autoneg results
326  *
327  * @phydev: The phy_device struct
328  *
329  * Once autoneg has completed the local pause settings can be
330  * resolved.  Determine if pause and asymmetric pause should be used
331  * by the MAC.
332  */
333 
334 void phy_resolve_aneg_pause(struct phy_device *phydev)
335 {
336 	if (phydev->duplex == DUPLEX_FULL) {
337 		phydev->pause = linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
338 						  phydev->lp_advertising);
339 		phydev->asym_pause = linkmode_test_bit(
340 			ETHTOOL_LINK_MODE_Asym_Pause_BIT,
341 			phydev->lp_advertising);
342 	}
343 }
344 EXPORT_SYMBOL_GPL(phy_resolve_aneg_pause);
345 
346 /**
347  * phy_resolve_aneg_linkmode - resolve the advertisements into PHY settings
348  * @phydev: The phy_device struct
349  *
350  * Resolve our and the link partner advertisements into their corresponding
351  * speed and duplex. If full duplex was negotiated, extract the pause mode
352  * from the link partner mask.
353  */
354 void phy_resolve_aneg_linkmode(struct phy_device *phydev)
355 {
356 	__ETHTOOL_DECLARE_LINK_MODE_MASK(common);
357 	int i;
358 
359 	linkmode_and(common, phydev->lp_advertising, phydev->advertising);
360 
361 	for (i = 0; i < ARRAY_SIZE(settings); i++)
362 		if (test_bit(settings[i].bit, common)) {
363 			phydev->speed = settings[i].speed;
364 			phydev->duplex = settings[i].duplex;
365 			break;
366 		}
367 
368 	phy_resolve_aneg_pause(phydev);
369 }
370 EXPORT_SYMBOL_GPL(phy_resolve_aneg_linkmode);
371 
372 /**
373  * phy_check_downshift - check whether downshift occurred
374  * @phydev: The phy_device struct
375  *
376  * Check whether a downshift to a lower speed occurred. If this should be the
377  * case warn the user.
378  * Prerequisite for detecting downshift is that PHY driver implements the
379  * read_status callback and sets phydev->speed to the actual link speed.
380  */
381 void phy_check_downshift(struct phy_device *phydev)
382 {
383 	__ETHTOOL_DECLARE_LINK_MODE_MASK(common);
384 	int i, speed = SPEED_UNKNOWN;
385 
386 	phydev->downshifted_rate = 0;
387 
388 	if (phydev->autoneg == AUTONEG_DISABLE ||
389 	    phydev->speed == SPEED_UNKNOWN)
390 		return;
391 
392 	linkmode_and(common, phydev->lp_advertising, phydev->advertising);
393 
394 	for (i = 0; i < ARRAY_SIZE(settings); i++)
395 		if (test_bit(settings[i].bit, common)) {
396 			speed = settings[i].speed;
397 			break;
398 		}
399 
400 	if (speed == SPEED_UNKNOWN || phydev->speed >= speed)
401 		return;
402 
403 	phydev_warn(phydev, "Downshift occurred from negotiated speed %s to actual speed %s, check cabling!\n",
404 		    phy_speed_to_str(speed), phy_speed_to_str(phydev->speed));
405 
406 	phydev->downshifted_rate = 1;
407 }
408 EXPORT_SYMBOL_GPL(phy_check_downshift);
409 
410 static int phy_resolve_min_speed(struct phy_device *phydev, bool fdx_only)
411 {
412 	__ETHTOOL_DECLARE_LINK_MODE_MASK(common);
413 	int i = ARRAY_SIZE(settings);
414 
415 	linkmode_and(common, phydev->lp_advertising, phydev->advertising);
416 
417 	while (--i >= 0) {
418 		if (test_bit(settings[i].bit, common)) {
419 			if (fdx_only && settings[i].duplex != DUPLEX_FULL)
420 				continue;
421 			return settings[i].speed;
422 		}
423 	}
424 
425 	return SPEED_UNKNOWN;
426 }
427 
428 int phy_speed_down_core(struct phy_device *phydev)
429 {
430 	int min_common_speed = phy_resolve_min_speed(phydev, true);
431 
432 	if (min_common_speed == SPEED_UNKNOWN)
433 		return -EINVAL;
434 
435 	__set_linkmode_max_speed(min_common_speed, phydev->advertising);
436 
437 	return 0;
438 }
439 
440 static void mmd_phy_indirect(struct mii_bus *bus, int phy_addr, int devad,
441 			     u16 regnum)
442 {
443 	/* Write the desired MMD Devad */
444 	__mdiobus_write(bus, phy_addr, MII_MMD_CTRL, devad);
445 
446 	/* Write the desired MMD register address */
447 	__mdiobus_write(bus, phy_addr, MII_MMD_DATA, regnum);
448 
449 	/* Select the Function : DATA with no post increment */
450 	__mdiobus_write(bus, phy_addr, MII_MMD_CTRL,
451 			devad | MII_MMD_CTRL_NOINCR);
452 }
453 
454 /**
455  * __phy_read_mmd - Convenience function for reading a register
456  * from an MMD on a given PHY.
457  * @phydev: The phy_device struct
458  * @devad: The MMD to read from (0..31)
459  * @regnum: The register on the MMD to read (0..65535)
460  *
461  * Same rules as for __phy_read();
462  */
463 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
464 {
465 	int val;
466 
467 	if (regnum > (u16)~0 || devad > 32)
468 		return -EINVAL;
469 
470 	if (phydev->drv && phydev->drv->read_mmd) {
471 		val = phydev->drv->read_mmd(phydev, devad, regnum);
472 	} else if (phydev->is_c45) {
473 		val = __mdiobus_c45_read(phydev->mdio.bus, phydev->mdio.addr,
474 					 devad, regnum);
475 	} else {
476 		struct mii_bus *bus = phydev->mdio.bus;
477 		int phy_addr = phydev->mdio.addr;
478 
479 		mmd_phy_indirect(bus, phy_addr, devad, regnum);
480 
481 		/* Read the content of the MMD's selected register */
482 		val = __mdiobus_read(bus, phy_addr, MII_MMD_DATA);
483 	}
484 	return val;
485 }
486 EXPORT_SYMBOL(__phy_read_mmd);
487 
488 /**
489  * phy_read_mmd - Convenience function for reading a register
490  * from an MMD on a given PHY.
491  * @phydev: The phy_device struct
492  * @devad: The MMD to read from
493  * @regnum: The register on the MMD to read
494  *
495  * Same rules as for phy_read();
496  */
497 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
498 {
499 	int ret;
500 
501 	phy_lock_mdio_bus(phydev);
502 	ret = __phy_read_mmd(phydev, devad, regnum);
503 	phy_unlock_mdio_bus(phydev);
504 
505 	return ret;
506 }
507 EXPORT_SYMBOL(phy_read_mmd);
508 
509 /**
510  * __phy_write_mmd - Convenience function for writing a register
511  * on an MMD on a given PHY.
512  * @phydev: The phy_device struct
513  * @devad: The MMD to read from
514  * @regnum: The register on the MMD to read
515  * @val: value to write to @regnum
516  *
517  * Same rules as for __phy_write();
518  */
519 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)
520 {
521 	int ret;
522 
523 	if (regnum > (u16)~0 || devad > 32)
524 		return -EINVAL;
525 
526 	if (phydev->drv && phydev->drv->write_mmd) {
527 		ret = phydev->drv->write_mmd(phydev, devad, regnum, val);
528 	} else if (phydev->is_c45) {
529 		ret = __mdiobus_c45_write(phydev->mdio.bus, phydev->mdio.addr,
530 					  devad, regnum, val);
531 	} else {
532 		struct mii_bus *bus = phydev->mdio.bus;
533 		int phy_addr = phydev->mdio.addr;
534 
535 		mmd_phy_indirect(bus, phy_addr, devad, regnum);
536 
537 		/* Write the data into MMD's selected register */
538 		__mdiobus_write(bus, phy_addr, MII_MMD_DATA, val);
539 
540 		ret = 0;
541 	}
542 	return ret;
543 }
544 EXPORT_SYMBOL(__phy_write_mmd);
545 
546 /**
547  * phy_write_mmd - Convenience function for writing a register
548  * on an MMD on a given PHY.
549  * @phydev: The phy_device struct
550  * @devad: The MMD to read from
551  * @regnum: The register on the MMD to read
552  * @val: value to write to @regnum
553  *
554  * Same rules as for phy_write();
555  */
556 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)
557 {
558 	int ret;
559 
560 	phy_lock_mdio_bus(phydev);
561 	ret = __phy_write_mmd(phydev, devad, regnum, val);
562 	phy_unlock_mdio_bus(phydev);
563 
564 	return ret;
565 }
566 EXPORT_SYMBOL(phy_write_mmd);
567 
568 /**
569  * phy_modify_changed - Function for modifying a PHY register
570  * @phydev: the phy_device struct
571  * @regnum: register number to modify
572  * @mask: bit mask of bits to clear
573  * @set: new value of bits set in mask to write to @regnum
574  *
575  * NOTE: MUST NOT be called from interrupt context,
576  * because the bus read/write functions may wait for an interrupt
577  * to conclude the operation.
578  *
579  * Returns negative errno, 0 if there was no change, and 1 in case of change
580  */
581 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
582 {
583 	int ret;
584 
585 	phy_lock_mdio_bus(phydev);
586 	ret = __phy_modify_changed(phydev, regnum, mask, set);
587 	phy_unlock_mdio_bus(phydev);
588 
589 	return ret;
590 }
591 EXPORT_SYMBOL_GPL(phy_modify_changed);
592 
593 /**
594  * __phy_modify - Convenience function for modifying a PHY register
595  * @phydev: the phy_device struct
596  * @regnum: register number to modify
597  * @mask: bit mask of bits to clear
598  * @set: new value of bits set in mask to write to @regnum
599  *
600  * NOTE: MUST NOT be called from interrupt context,
601  * because the bus read/write functions may wait for an interrupt
602  * to conclude the operation.
603  */
604 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
605 {
606 	int ret;
607 
608 	ret = __phy_modify_changed(phydev, regnum, mask, set);
609 
610 	return ret < 0 ? ret : 0;
611 }
612 EXPORT_SYMBOL_GPL(__phy_modify);
613 
614 /**
615  * phy_modify - Convenience function for modifying a given PHY register
616  * @phydev: the phy_device struct
617  * @regnum: register number to write
618  * @mask: bit mask of bits to clear
619  * @set: new value of bits set in mask to write to @regnum
620  *
621  * NOTE: MUST NOT be called from interrupt context,
622  * because the bus read/write functions may wait for an interrupt
623  * to conclude the operation.
624  */
625 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
626 {
627 	int ret;
628 
629 	phy_lock_mdio_bus(phydev);
630 	ret = __phy_modify(phydev, regnum, mask, set);
631 	phy_unlock_mdio_bus(phydev);
632 
633 	return ret;
634 }
635 EXPORT_SYMBOL_GPL(phy_modify);
636 
637 /**
638  * __phy_modify_mmd_changed - Function for modifying a register on MMD
639  * @phydev: the phy_device struct
640  * @devad: the MMD containing register to modify
641  * @regnum: register number to modify
642  * @mask: bit mask of bits to clear
643  * @set: new value of bits set in mask to write to @regnum
644  *
645  * Unlocked helper function which allows a MMD register to be modified as
646  * new register value = (old register value & ~mask) | set
647  *
648  * Returns negative errno, 0 if there was no change, and 1 in case of change
649  */
650 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
651 			     u16 mask, u16 set)
652 {
653 	int new, ret;
654 
655 	ret = __phy_read_mmd(phydev, devad, regnum);
656 	if (ret < 0)
657 		return ret;
658 
659 	new = (ret & ~mask) | set;
660 	if (new == ret)
661 		return 0;
662 
663 	ret = __phy_write_mmd(phydev, devad, regnum, new);
664 
665 	return ret < 0 ? ret : 1;
666 }
667 EXPORT_SYMBOL_GPL(__phy_modify_mmd_changed);
668 
669 /**
670  * phy_modify_mmd_changed - Function for modifying a register on MMD
671  * @phydev: the phy_device struct
672  * @devad: the MMD containing register to modify
673  * @regnum: register number to modify
674  * @mask: bit mask of bits to clear
675  * @set: new value of bits set in mask to write to @regnum
676  *
677  * NOTE: MUST NOT be called from interrupt context,
678  * because the bus read/write functions may wait for an interrupt
679  * to conclude the operation.
680  *
681  * Returns negative errno, 0 if there was no change, and 1 in case of change
682  */
683 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
684 			   u16 mask, u16 set)
685 {
686 	int ret;
687 
688 	phy_lock_mdio_bus(phydev);
689 	ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set);
690 	phy_unlock_mdio_bus(phydev);
691 
692 	return ret;
693 }
694 EXPORT_SYMBOL_GPL(phy_modify_mmd_changed);
695 
696 /**
697  * __phy_modify_mmd - Convenience function for modifying a register on MMD
698  * @phydev: the phy_device struct
699  * @devad: the MMD containing register to modify
700  * @regnum: register number to modify
701  * @mask: bit mask of bits to clear
702  * @set: new value of bits set in mask to write to @regnum
703  *
704  * NOTE: MUST NOT be called from interrupt context,
705  * because the bus read/write functions may wait for an interrupt
706  * to conclude the operation.
707  */
708 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
709 		     u16 mask, u16 set)
710 {
711 	int ret;
712 
713 	ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set);
714 
715 	return ret < 0 ? ret : 0;
716 }
717 EXPORT_SYMBOL_GPL(__phy_modify_mmd);
718 
719 /**
720  * phy_modify_mmd - Convenience function for modifying a register on MMD
721  * @phydev: the phy_device struct
722  * @devad: the MMD containing register to modify
723  * @regnum: register number to modify
724  * @mask: bit mask of bits to clear
725  * @set: new value of bits set in mask to write to @regnum
726  *
727  * NOTE: MUST NOT be called from interrupt context,
728  * because the bus read/write functions may wait for an interrupt
729  * to conclude the operation.
730  */
731 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
732 		   u16 mask, u16 set)
733 {
734 	int ret;
735 
736 	phy_lock_mdio_bus(phydev);
737 	ret = __phy_modify_mmd(phydev, devad, regnum, mask, set);
738 	phy_unlock_mdio_bus(phydev);
739 
740 	return ret;
741 }
742 EXPORT_SYMBOL_GPL(phy_modify_mmd);
743 
744 static int __phy_read_page(struct phy_device *phydev)
745 {
746 	if (WARN_ONCE(!phydev->drv->read_page, "read_page callback not available, PHY driver not loaded?\n"))
747 		return -EOPNOTSUPP;
748 
749 	return phydev->drv->read_page(phydev);
750 }
751 
752 static int __phy_write_page(struct phy_device *phydev, int page)
753 {
754 	if (WARN_ONCE(!phydev->drv->write_page, "write_page callback not available, PHY driver not loaded?\n"))
755 		return -EOPNOTSUPP;
756 
757 	return phydev->drv->write_page(phydev, page);
758 }
759 
760 /**
761  * phy_save_page() - take the bus lock and save the current page
762  * @phydev: a pointer to a &struct phy_device
763  *
764  * Take the MDIO bus lock, and return the current page number. On error,
765  * returns a negative errno. phy_restore_page() must always be called
766  * after this, irrespective of success or failure of this call.
767  */
768 int phy_save_page(struct phy_device *phydev)
769 {
770 	phy_lock_mdio_bus(phydev);
771 	return __phy_read_page(phydev);
772 }
773 EXPORT_SYMBOL_GPL(phy_save_page);
774 
775 /**
776  * phy_select_page() - take the bus lock, save the current page, and set a page
777  * @phydev: a pointer to a &struct phy_device
778  * @page: desired page
779  *
780  * Take the MDIO bus lock to protect against concurrent access, save the
781  * current PHY page, and set the current page.  On error, returns a
782  * negative errno, otherwise returns the previous page number.
783  * phy_restore_page() must always be called after this, irrespective
784  * of success or failure of this call.
785  */
786 int phy_select_page(struct phy_device *phydev, int page)
787 {
788 	int ret, oldpage;
789 
790 	oldpage = ret = phy_save_page(phydev);
791 	if (ret < 0)
792 		return ret;
793 
794 	if (oldpage != page) {
795 		ret = __phy_write_page(phydev, page);
796 		if (ret < 0)
797 			return ret;
798 	}
799 
800 	return oldpage;
801 }
802 EXPORT_SYMBOL_GPL(phy_select_page);
803 
804 /**
805  * phy_restore_page() - restore the page register and release the bus lock
806  * @phydev: a pointer to a &struct phy_device
807  * @oldpage: the old page, return value from phy_save_page() or phy_select_page()
808  * @ret: operation's return code
809  *
810  * Release the MDIO bus lock, restoring @oldpage if it is a valid page.
811  * This function propagates the earliest error code from the group of
812  * operations.
813  *
814  * Returns:
815  *   @oldpage if it was a negative value, otherwise
816  *   @ret if it was a negative errno value, otherwise
817  *   phy_write_page()'s negative value if it were in error, otherwise
818  *   @ret.
819  */
820 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret)
821 {
822 	int r;
823 
824 	if (oldpage >= 0) {
825 		r = __phy_write_page(phydev, oldpage);
826 
827 		/* Propagate the operation return code if the page write
828 		 * was successful.
829 		 */
830 		if (ret >= 0 && r < 0)
831 			ret = r;
832 	} else {
833 		/* Propagate the phy page selection error code */
834 		ret = oldpage;
835 	}
836 
837 	phy_unlock_mdio_bus(phydev);
838 
839 	return ret;
840 }
841 EXPORT_SYMBOL_GPL(phy_restore_page);
842 
843 /**
844  * phy_read_paged() - Convenience function for reading a paged register
845  * @phydev: a pointer to a &struct phy_device
846  * @page: the page for the phy
847  * @regnum: register number
848  *
849  * Same rules as for phy_read().
850  */
851 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum)
852 {
853 	int ret = 0, oldpage;
854 
855 	oldpage = phy_select_page(phydev, page);
856 	if (oldpage >= 0)
857 		ret = __phy_read(phydev, regnum);
858 
859 	return phy_restore_page(phydev, oldpage, ret);
860 }
861 EXPORT_SYMBOL(phy_read_paged);
862 
863 /**
864  * phy_write_paged() - Convenience function for writing a paged register
865  * @phydev: a pointer to a &struct phy_device
866  * @page: the page for the phy
867  * @regnum: register number
868  * @val: value to write
869  *
870  * Same rules as for phy_write().
871  */
872 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val)
873 {
874 	int ret = 0, oldpage;
875 
876 	oldpage = phy_select_page(phydev, page);
877 	if (oldpage >= 0)
878 		ret = __phy_write(phydev, regnum, val);
879 
880 	return phy_restore_page(phydev, oldpage, ret);
881 }
882 EXPORT_SYMBOL(phy_write_paged);
883 
884 /**
885  * phy_modify_paged_changed() - Function for modifying a paged register
886  * @phydev: a pointer to a &struct phy_device
887  * @page: the page for the phy
888  * @regnum: register number
889  * @mask: bit mask of bits to clear
890  * @set: bit mask of bits to set
891  *
892  * Returns negative errno, 0 if there was no change, and 1 in case of change
893  */
894 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
895 			     u16 mask, u16 set)
896 {
897 	int ret = 0, oldpage;
898 
899 	oldpage = phy_select_page(phydev, page);
900 	if (oldpage >= 0)
901 		ret = __phy_modify_changed(phydev, regnum, mask, set);
902 
903 	return phy_restore_page(phydev, oldpage, ret);
904 }
905 EXPORT_SYMBOL(phy_modify_paged_changed);
906 
907 /**
908  * phy_modify_paged() - Convenience function for modifying a paged register
909  * @phydev: a pointer to a &struct phy_device
910  * @page: the page for the phy
911  * @regnum: register number
912  * @mask: bit mask of bits to clear
913  * @set: bit mask of bits to set
914  *
915  * Same rules as for phy_read() and phy_write().
916  */
917 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
918 		     u16 mask, u16 set)
919 {
920 	int ret = phy_modify_paged_changed(phydev, page, regnum, mask, set);
921 
922 	return ret < 0 ? ret : 0;
923 }
924 EXPORT_SYMBOL(phy_modify_paged);
925