1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Core PHY library, taken from phy.c 4 */ 5 #include <linux/export.h> 6 #include <linux/phy.h> 7 #include <linux/of.h> 8 9 /** 10 * phy_speed_to_str - Return a string representing the PHY link speed 11 * 12 * @speed: Speed of the link 13 */ 14 const char *phy_speed_to_str(int speed) 15 { 16 BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 102, 17 "Enum ethtool_link_mode_bit_indices and phylib are out of sync. " 18 "If a speed or mode has been added please update phy_speed_to_str " 19 "and the PHY settings array.\n"); 20 21 switch (speed) { 22 case SPEED_10: 23 return "10Mbps"; 24 case SPEED_100: 25 return "100Mbps"; 26 case SPEED_1000: 27 return "1Gbps"; 28 case SPEED_2500: 29 return "2.5Gbps"; 30 case SPEED_5000: 31 return "5Gbps"; 32 case SPEED_10000: 33 return "10Gbps"; 34 case SPEED_14000: 35 return "14Gbps"; 36 case SPEED_20000: 37 return "20Gbps"; 38 case SPEED_25000: 39 return "25Gbps"; 40 case SPEED_40000: 41 return "40Gbps"; 42 case SPEED_50000: 43 return "50Gbps"; 44 case SPEED_56000: 45 return "56Gbps"; 46 case SPEED_100000: 47 return "100Gbps"; 48 case SPEED_200000: 49 return "200Gbps"; 50 case SPEED_400000: 51 return "400Gbps"; 52 case SPEED_800000: 53 return "800Gbps"; 54 case SPEED_UNKNOWN: 55 return "Unknown"; 56 default: 57 return "Unsupported (update phy-core.c)"; 58 } 59 } 60 EXPORT_SYMBOL_GPL(phy_speed_to_str); 61 62 /** 63 * phy_duplex_to_str - Return string describing the duplex 64 * 65 * @duplex: Duplex setting to describe 66 */ 67 const char *phy_duplex_to_str(unsigned int duplex) 68 { 69 if (duplex == DUPLEX_HALF) 70 return "Half"; 71 if (duplex == DUPLEX_FULL) 72 return "Full"; 73 if (duplex == DUPLEX_UNKNOWN) 74 return "Unknown"; 75 return "Unsupported (update phy-core.c)"; 76 } 77 EXPORT_SYMBOL_GPL(phy_duplex_to_str); 78 79 /** 80 * phy_rate_matching_to_str - Return a string describing the rate matching 81 * 82 * @rate_matching: Type of rate matching to describe 83 */ 84 const char *phy_rate_matching_to_str(int rate_matching) 85 { 86 switch (rate_matching) { 87 case RATE_MATCH_NONE: 88 return "none"; 89 case RATE_MATCH_PAUSE: 90 return "pause"; 91 case RATE_MATCH_CRS: 92 return "crs"; 93 case RATE_MATCH_OPEN_LOOP: 94 return "open-loop"; 95 } 96 return "Unsupported (update phy-core.c)"; 97 } 98 EXPORT_SYMBOL_GPL(phy_rate_matching_to_str); 99 100 /** 101 * phy_interface_num_ports - Return the number of links that can be carried by 102 * a given MAC-PHY physical link. Returns 0 if this is 103 * unknown, the number of links else. 104 * 105 * @interface: The interface mode we want to get the number of ports 106 */ 107 int phy_interface_num_ports(phy_interface_t interface) 108 { 109 switch (interface) { 110 case PHY_INTERFACE_MODE_NA: 111 return 0; 112 case PHY_INTERFACE_MODE_INTERNAL: 113 case PHY_INTERFACE_MODE_MII: 114 case PHY_INTERFACE_MODE_GMII: 115 case PHY_INTERFACE_MODE_TBI: 116 case PHY_INTERFACE_MODE_REVMII: 117 case PHY_INTERFACE_MODE_RMII: 118 case PHY_INTERFACE_MODE_REVRMII: 119 case PHY_INTERFACE_MODE_RGMII: 120 case PHY_INTERFACE_MODE_RGMII_ID: 121 case PHY_INTERFACE_MODE_RGMII_RXID: 122 case PHY_INTERFACE_MODE_RGMII_TXID: 123 case PHY_INTERFACE_MODE_RTBI: 124 case PHY_INTERFACE_MODE_XGMII: 125 case PHY_INTERFACE_MODE_XLGMII: 126 case PHY_INTERFACE_MODE_MOCA: 127 case PHY_INTERFACE_MODE_TRGMII: 128 case PHY_INTERFACE_MODE_USXGMII: 129 case PHY_INTERFACE_MODE_SGMII: 130 case PHY_INTERFACE_MODE_SMII: 131 case PHY_INTERFACE_MODE_1000BASEX: 132 case PHY_INTERFACE_MODE_2500BASEX: 133 case PHY_INTERFACE_MODE_5GBASER: 134 case PHY_INTERFACE_MODE_10GBASER: 135 case PHY_INTERFACE_MODE_25GBASER: 136 case PHY_INTERFACE_MODE_10GKR: 137 case PHY_INTERFACE_MODE_100BASEX: 138 case PHY_INTERFACE_MODE_RXAUI: 139 case PHY_INTERFACE_MODE_XAUI: 140 case PHY_INTERFACE_MODE_1000BASEKX: 141 return 1; 142 case PHY_INTERFACE_MODE_QSGMII: 143 case PHY_INTERFACE_MODE_QUSGMII: 144 return 4; 145 case PHY_INTERFACE_MODE_MAX: 146 WARN_ONCE(1, "PHY_INTERFACE_MODE_MAX isn't a valid interface mode"); 147 return 0; 148 } 149 return 0; 150 } 151 EXPORT_SYMBOL_GPL(phy_interface_num_ports); 152 153 /* A mapping of all SUPPORTED settings to speed/duplex. This table 154 * must be grouped by speed and sorted in descending match priority 155 * - iow, descending speed. 156 */ 157 158 #define PHY_SETTING(s, d, b) { .speed = SPEED_ ## s, .duplex = DUPLEX_ ## d, \ 159 .bit = ETHTOOL_LINK_MODE_ ## b ## _BIT} 160 161 static const struct phy_setting settings[] = { 162 /* 800G */ 163 PHY_SETTING( 800000, FULL, 800000baseCR8_Full ), 164 PHY_SETTING( 800000, FULL, 800000baseKR8_Full ), 165 PHY_SETTING( 800000, FULL, 800000baseDR8_Full ), 166 PHY_SETTING( 800000, FULL, 800000baseDR8_2_Full ), 167 PHY_SETTING( 800000, FULL, 800000baseSR8_Full ), 168 PHY_SETTING( 800000, FULL, 800000baseVR8_Full ), 169 /* 400G */ 170 PHY_SETTING( 400000, FULL, 400000baseCR8_Full ), 171 PHY_SETTING( 400000, FULL, 400000baseKR8_Full ), 172 PHY_SETTING( 400000, FULL, 400000baseLR8_ER8_FR8_Full ), 173 PHY_SETTING( 400000, FULL, 400000baseDR8_Full ), 174 PHY_SETTING( 400000, FULL, 400000baseSR8_Full ), 175 PHY_SETTING( 400000, FULL, 400000baseCR4_Full ), 176 PHY_SETTING( 400000, FULL, 400000baseKR4_Full ), 177 PHY_SETTING( 400000, FULL, 400000baseLR4_ER4_FR4_Full ), 178 PHY_SETTING( 400000, FULL, 400000baseDR4_Full ), 179 PHY_SETTING( 400000, FULL, 400000baseSR4_Full ), 180 /* 200G */ 181 PHY_SETTING( 200000, FULL, 200000baseCR4_Full ), 182 PHY_SETTING( 200000, FULL, 200000baseKR4_Full ), 183 PHY_SETTING( 200000, FULL, 200000baseLR4_ER4_FR4_Full ), 184 PHY_SETTING( 200000, FULL, 200000baseDR4_Full ), 185 PHY_SETTING( 200000, FULL, 200000baseSR4_Full ), 186 PHY_SETTING( 200000, FULL, 200000baseCR2_Full ), 187 PHY_SETTING( 200000, FULL, 200000baseKR2_Full ), 188 PHY_SETTING( 200000, FULL, 200000baseLR2_ER2_FR2_Full ), 189 PHY_SETTING( 200000, FULL, 200000baseDR2_Full ), 190 PHY_SETTING( 200000, FULL, 200000baseSR2_Full ), 191 /* 100G */ 192 PHY_SETTING( 100000, FULL, 100000baseCR4_Full ), 193 PHY_SETTING( 100000, FULL, 100000baseKR4_Full ), 194 PHY_SETTING( 100000, FULL, 100000baseLR4_ER4_Full ), 195 PHY_SETTING( 100000, FULL, 100000baseSR4_Full ), 196 PHY_SETTING( 100000, FULL, 100000baseCR2_Full ), 197 PHY_SETTING( 100000, FULL, 100000baseKR2_Full ), 198 PHY_SETTING( 100000, FULL, 100000baseLR2_ER2_FR2_Full ), 199 PHY_SETTING( 100000, FULL, 100000baseDR2_Full ), 200 PHY_SETTING( 100000, FULL, 100000baseSR2_Full ), 201 PHY_SETTING( 100000, FULL, 100000baseCR_Full ), 202 PHY_SETTING( 100000, FULL, 100000baseKR_Full ), 203 PHY_SETTING( 100000, FULL, 100000baseLR_ER_FR_Full ), 204 PHY_SETTING( 100000, FULL, 100000baseDR_Full ), 205 PHY_SETTING( 100000, FULL, 100000baseSR_Full ), 206 /* 56G */ 207 PHY_SETTING( 56000, FULL, 56000baseCR4_Full ), 208 PHY_SETTING( 56000, FULL, 56000baseKR4_Full ), 209 PHY_SETTING( 56000, FULL, 56000baseLR4_Full ), 210 PHY_SETTING( 56000, FULL, 56000baseSR4_Full ), 211 /* 50G */ 212 PHY_SETTING( 50000, FULL, 50000baseCR2_Full ), 213 PHY_SETTING( 50000, FULL, 50000baseKR2_Full ), 214 PHY_SETTING( 50000, FULL, 50000baseSR2_Full ), 215 PHY_SETTING( 50000, FULL, 50000baseCR_Full ), 216 PHY_SETTING( 50000, FULL, 50000baseKR_Full ), 217 PHY_SETTING( 50000, FULL, 50000baseLR_ER_FR_Full ), 218 PHY_SETTING( 50000, FULL, 50000baseDR_Full ), 219 PHY_SETTING( 50000, FULL, 50000baseSR_Full ), 220 /* 40G */ 221 PHY_SETTING( 40000, FULL, 40000baseCR4_Full ), 222 PHY_SETTING( 40000, FULL, 40000baseKR4_Full ), 223 PHY_SETTING( 40000, FULL, 40000baseLR4_Full ), 224 PHY_SETTING( 40000, FULL, 40000baseSR4_Full ), 225 /* 25G */ 226 PHY_SETTING( 25000, FULL, 25000baseCR_Full ), 227 PHY_SETTING( 25000, FULL, 25000baseKR_Full ), 228 PHY_SETTING( 25000, FULL, 25000baseSR_Full ), 229 /* 20G */ 230 PHY_SETTING( 20000, FULL, 20000baseKR2_Full ), 231 PHY_SETTING( 20000, FULL, 20000baseMLD2_Full ), 232 /* 10G */ 233 PHY_SETTING( 10000, FULL, 10000baseCR_Full ), 234 PHY_SETTING( 10000, FULL, 10000baseER_Full ), 235 PHY_SETTING( 10000, FULL, 10000baseKR_Full ), 236 PHY_SETTING( 10000, FULL, 10000baseKX4_Full ), 237 PHY_SETTING( 10000, FULL, 10000baseLR_Full ), 238 PHY_SETTING( 10000, FULL, 10000baseLRM_Full ), 239 PHY_SETTING( 10000, FULL, 10000baseR_FEC ), 240 PHY_SETTING( 10000, FULL, 10000baseSR_Full ), 241 PHY_SETTING( 10000, FULL, 10000baseT_Full ), 242 /* 5G */ 243 PHY_SETTING( 5000, FULL, 5000baseT_Full ), 244 /* 2.5G */ 245 PHY_SETTING( 2500, FULL, 2500baseT_Full ), 246 PHY_SETTING( 2500, FULL, 2500baseX_Full ), 247 /* 1G */ 248 PHY_SETTING( 1000, FULL, 1000baseT_Full ), 249 PHY_SETTING( 1000, HALF, 1000baseT_Half ), 250 PHY_SETTING( 1000, FULL, 1000baseT1_Full ), 251 PHY_SETTING( 1000, FULL, 1000baseX_Full ), 252 PHY_SETTING( 1000, FULL, 1000baseKX_Full ), 253 /* 100M */ 254 PHY_SETTING( 100, FULL, 100baseT_Full ), 255 PHY_SETTING( 100, FULL, 100baseT1_Full ), 256 PHY_SETTING( 100, HALF, 100baseT_Half ), 257 PHY_SETTING( 100, HALF, 100baseFX_Half ), 258 PHY_SETTING( 100, FULL, 100baseFX_Full ), 259 /* 10M */ 260 PHY_SETTING( 10, FULL, 10baseT_Full ), 261 PHY_SETTING( 10, HALF, 10baseT_Half ), 262 PHY_SETTING( 10, FULL, 10baseT1L_Full ), 263 PHY_SETTING( 10, FULL, 10baseT1S_Full ), 264 PHY_SETTING( 10, HALF, 10baseT1S_Half ), 265 PHY_SETTING( 10, HALF, 10baseT1S_P2MP_Half ), 266 }; 267 #undef PHY_SETTING 268 269 /** 270 * phy_lookup_setting - lookup a PHY setting 271 * @speed: speed to match 272 * @duplex: duplex to match 273 * @mask: allowed link modes 274 * @exact: an exact match is required 275 * 276 * Search the settings array for a setting that matches the speed and 277 * duplex, and which is supported. 278 * 279 * If @exact is unset, either an exact match or %NULL for no match will 280 * be returned. 281 * 282 * If @exact is set, an exact match, the fastest supported setting at 283 * or below the specified speed, the slowest supported setting, or if 284 * they all fail, %NULL will be returned. 285 */ 286 const struct phy_setting * 287 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, bool exact) 288 { 289 const struct phy_setting *p, *match = NULL, *last = NULL; 290 int i; 291 292 for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) { 293 if (p->bit < __ETHTOOL_LINK_MODE_MASK_NBITS && 294 test_bit(p->bit, mask)) { 295 last = p; 296 if (p->speed == speed && p->duplex == duplex) { 297 /* Exact match for speed and duplex */ 298 match = p; 299 break; 300 } else if (!exact) { 301 if (!match && p->speed <= speed) 302 /* Candidate */ 303 match = p; 304 305 if (p->speed < speed) 306 break; 307 } 308 } 309 } 310 311 if (!match && !exact) 312 match = last; 313 314 return match; 315 } 316 EXPORT_SYMBOL_GPL(phy_lookup_setting); 317 318 size_t phy_speeds(unsigned int *speeds, size_t size, 319 unsigned long *mask) 320 { 321 size_t count; 322 int i; 323 324 for (i = 0, count = 0; i < ARRAY_SIZE(settings) && count < size; i++) 325 if (settings[i].bit < __ETHTOOL_LINK_MODE_MASK_NBITS && 326 test_bit(settings[i].bit, mask) && 327 (count == 0 || speeds[count - 1] != settings[i].speed)) 328 speeds[count++] = settings[i].speed; 329 330 return count; 331 } 332 333 static void __set_linkmode_max_speed(u32 max_speed, unsigned long *addr) 334 { 335 const struct phy_setting *p; 336 int i; 337 338 for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) { 339 if (p->speed > max_speed) 340 linkmode_clear_bit(p->bit, addr); 341 else 342 break; 343 } 344 } 345 346 static void __set_phy_supported(struct phy_device *phydev, u32 max_speed) 347 { 348 __set_linkmode_max_speed(max_speed, phydev->supported); 349 } 350 351 /** 352 * phy_set_max_speed - Set the maximum speed the PHY should support 353 * 354 * @phydev: The phy_device struct 355 * @max_speed: Maximum speed 356 * 357 * The PHY might be more capable than the MAC. For example a Fast Ethernet 358 * is connected to a 1G PHY. This function allows the MAC to indicate its 359 * maximum speed, and so limit what the PHY will advertise. 360 */ 361 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed) 362 { 363 __set_phy_supported(phydev, max_speed); 364 365 phy_advertise_supported(phydev); 366 } 367 EXPORT_SYMBOL(phy_set_max_speed); 368 369 void of_set_phy_supported(struct phy_device *phydev) 370 { 371 struct device_node *node = phydev->mdio.dev.of_node; 372 u32 max_speed; 373 374 if (!IS_ENABLED(CONFIG_OF_MDIO)) 375 return; 376 377 if (!node) 378 return; 379 380 if (!of_property_read_u32(node, "max-speed", &max_speed)) 381 __set_phy_supported(phydev, max_speed); 382 } 383 384 void of_set_phy_eee_broken(struct phy_device *phydev) 385 { 386 struct device_node *node = phydev->mdio.dev.of_node; 387 u32 broken = 0; 388 389 if (!IS_ENABLED(CONFIG_OF_MDIO)) 390 return; 391 392 if (!node) 393 return; 394 395 if (of_property_read_bool(node, "eee-broken-100tx")) 396 broken |= MDIO_EEE_100TX; 397 if (of_property_read_bool(node, "eee-broken-1000t")) 398 broken |= MDIO_EEE_1000T; 399 if (of_property_read_bool(node, "eee-broken-10gt")) 400 broken |= MDIO_EEE_10GT; 401 if (of_property_read_bool(node, "eee-broken-1000kx")) 402 broken |= MDIO_EEE_1000KX; 403 if (of_property_read_bool(node, "eee-broken-10gkx4")) 404 broken |= MDIO_EEE_10GKX4; 405 if (of_property_read_bool(node, "eee-broken-10gkr")) 406 broken |= MDIO_EEE_10GKR; 407 408 phydev->eee_broken_modes = broken; 409 } 410 411 /** 412 * phy_resolve_aneg_pause - Determine pause autoneg results 413 * 414 * @phydev: The phy_device struct 415 * 416 * Once autoneg has completed the local pause settings can be 417 * resolved. Determine if pause and asymmetric pause should be used 418 * by the MAC. 419 */ 420 421 void phy_resolve_aneg_pause(struct phy_device *phydev) 422 { 423 if (phydev->duplex == DUPLEX_FULL) { 424 phydev->pause = linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 425 phydev->lp_advertising); 426 phydev->asym_pause = linkmode_test_bit( 427 ETHTOOL_LINK_MODE_Asym_Pause_BIT, 428 phydev->lp_advertising); 429 } 430 } 431 EXPORT_SYMBOL_GPL(phy_resolve_aneg_pause); 432 433 /** 434 * phy_resolve_aneg_linkmode - resolve the advertisements into PHY settings 435 * @phydev: The phy_device struct 436 * 437 * Resolve our and the link partner advertisements into their corresponding 438 * speed and duplex. If full duplex was negotiated, extract the pause mode 439 * from the link partner mask. 440 */ 441 void phy_resolve_aneg_linkmode(struct phy_device *phydev) 442 { 443 __ETHTOOL_DECLARE_LINK_MODE_MASK(common); 444 int i; 445 446 linkmode_and(common, phydev->lp_advertising, phydev->advertising); 447 448 for (i = 0; i < ARRAY_SIZE(settings); i++) 449 if (test_bit(settings[i].bit, common)) { 450 phydev->speed = settings[i].speed; 451 phydev->duplex = settings[i].duplex; 452 break; 453 } 454 455 phy_resolve_aneg_pause(phydev); 456 } 457 EXPORT_SYMBOL_GPL(phy_resolve_aneg_linkmode); 458 459 /** 460 * phy_check_downshift - check whether downshift occurred 461 * @phydev: The phy_device struct 462 * 463 * Check whether a downshift to a lower speed occurred. If this should be the 464 * case warn the user. 465 * Prerequisite for detecting downshift is that PHY driver implements the 466 * read_status callback and sets phydev->speed to the actual link speed. 467 */ 468 void phy_check_downshift(struct phy_device *phydev) 469 { 470 __ETHTOOL_DECLARE_LINK_MODE_MASK(common); 471 int i, speed = SPEED_UNKNOWN; 472 473 phydev->downshifted_rate = 0; 474 475 if (phydev->autoneg == AUTONEG_DISABLE || 476 phydev->speed == SPEED_UNKNOWN) 477 return; 478 479 linkmode_and(common, phydev->lp_advertising, phydev->advertising); 480 481 for (i = 0; i < ARRAY_SIZE(settings); i++) 482 if (test_bit(settings[i].bit, common)) { 483 speed = settings[i].speed; 484 break; 485 } 486 487 if (speed == SPEED_UNKNOWN || phydev->speed >= speed) 488 return; 489 490 phydev_warn(phydev, "Downshift occurred from negotiated speed %s to actual speed %s, check cabling!\n", 491 phy_speed_to_str(speed), phy_speed_to_str(phydev->speed)); 492 493 phydev->downshifted_rate = 1; 494 } 495 EXPORT_SYMBOL_GPL(phy_check_downshift); 496 497 static int phy_resolve_min_speed(struct phy_device *phydev, bool fdx_only) 498 { 499 __ETHTOOL_DECLARE_LINK_MODE_MASK(common); 500 int i = ARRAY_SIZE(settings); 501 502 linkmode_and(common, phydev->lp_advertising, phydev->advertising); 503 504 while (--i >= 0) { 505 if (test_bit(settings[i].bit, common)) { 506 if (fdx_only && settings[i].duplex != DUPLEX_FULL) 507 continue; 508 return settings[i].speed; 509 } 510 } 511 512 return SPEED_UNKNOWN; 513 } 514 515 int phy_speed_down_core(struct phy_device *phydev) 516 { 517 int min_common_speed = phy_resolve_min_speed(phydev, true); 518 519 if (min_common_speed == SPEED_UNKNOWN) 520 return -EINVAL; 521 522 __set_linkmode_max_speed(min_common_speed, phydev->advertising); 523 524 return 0; 525 } 526 527 static void mmd_phy_indirect(struct mii_bus *bus, int phy_addr, int devad, 528 u16 regnum) 529 { 530 /* Write the desired MMD Devad */ 531 __mdiobus_write(bus, phy_addr, MII_MMD_CTRL, devad); 532 533 /* Write the desired MMD register address */ 534 __mdiobus_write(bus, phy_addr, MII_MMD_DATA, regnum); 535 536 /* Select the Function : DATA with no post increment */ 537 __mdiobus_write(bus, phy_addr, MII_MMD_CTRL, 538 devad | MII_MMD_CTRL_NOINCR); 539 } 540 541 /** 542 * __phy_read_mmd - Convenience function for reading a register 543 * from an MMD on a given PHY. 544 * @phydev: The phy_device struct 545 * @devad: The MMD to read from (0..31) 546 * @regnum: The register on the MMD to read (0..65535) 547 * 548 * Same rules as for __phy_read(); 549 */ 550 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) 551 { 552 int val; 553 554 if (regnum > (u16)~0 || devad > 32) 555 return -EINVAL; 556 557 if (phydev->drv && phydev->drv->read_mmd) { 558 val = phydev->drv->read_mmd(phydev, devad, regnum); 559 } else if (phydev->is_c45) { 560 val = __mdiobus_c45_read(phydev->mdio.bus, phydev->mdio.addr, 561 devad, regnum); 562 } else { 563 struct mii_bus *bus = phydev->mdio.bus; 564 int phy_addr = phydev->mdio.addr; 565 566 mmd_phy_indirect(bus, phy_addr, devad, regnum); 567 568 /* Read the content of the MMD's selected register */ 569 val = __mdiobus_read(bus, phy_addr, MII_MMD_DATA); 570 } 571 return val; 572 } 573 EXPORT_SYMBOL(__phy_read_mmd); 574 575 /** 576 * phy_read_mmd - Convenience function for reading a register 577 * from an MMD on a given PHY. 578 * @phydev: The phy_device struct 579 * @devad: The MMD to read from 580 * @regnum: The register on the MMD to read 581 * 582 * Same rules as for phy_read(); 583 */ 584 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) 585 { 586 int ret; 587 588 phy_lock_mdio_bus(phydev); 589 ret = __phy_read_mmd(phydev, devad, regnum); 590 phy_unlock_mdio_bus(phydev); 591 592 return ret; 593 } 594 EXPORT_SYMBOL(phy_read_mmd); 595 596 /** 597 * __phy_write_mmd - Convenience function for writing a register 598 * on an MMD on a given PHY. 599 * @phydev: The phy_device struct 600 * @devad: The MMD to read from 601 * @regnum: The register on the MMD to read 602 * @val: value to write to @regnum 603 * 604 * Same rules as for __phy_write(); 605 */ 606 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val) 607 { 608 int ret; 609 610 if (regnum > (u16)~0 || devad > 32) 611 return -EINVAL; 612 613 if (phydev->drv && phydev->drv->write_mmd) { 614 ret = phydev->drv->write_mmd(phydev, devad, regnum, val); 615 } else if (phydev->is_c45) { 616 ret = __mdiobus_c45_write(phydev->mdio.bus, phydev->mdio.addr, 617 devad, regnum, val); 618 } else { 619 struct mii_bus *bus = phydev->mdio.bus; 620 int phy_addr = phydev->mdio.addr; 621 622 mmd_phy_indirect(bus, phy_addr, devad, regnum); 623 624 /* Write the data into MMD's selected register */ 625 __mdiobus_write(bus, phy_addr, MII_MMD_DATA, val); 626 627 ret = 0; 628 } 629 return ret; 630 } 631 EXPORT_SYMBOL(__phy_write_mmd); 632 633 /** 634 * phy_write_mmd - Convenience function for writing a register 635 * on an MMD on a given PHY. 636 * @phydev: The phy_device struct 637 * @devad: The MMD to read from 638 * @regnum: The register on the MMD to read 639 * @val: value to write to @regnum 640 * 641 * Same rules as for phy_write(); 642 */ 643 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val) 644 { 645 int ret; 646 647 phy_lock_mdio_bus(phydev); 648 ret = __phy_write_mmd(phydev, devad, regnum, val); 649 phy_unlock_mdio_bus(phydev); 650 651 return ret; 652 } 653 EXPORT_SYMBOL(phy_write_mmd); 654 655 /** 656 * phy_modify_changed - Function for modifying a PHY register 657 * @phydev: the phy_device struct 658 * @regnum: register number to modify 659 * @mask: bit mask of bits to clear 660 * @set: new value of bits set in mask to write to @regnum 661 * 662 * NOTE: MUST NOT be called from interrupt context, 663 * because the bus read/write functions may wait for an interrupt 664 * to conclude the operation. 665 * 666 * Returns negative errno, 0 if there was no change, and 1 in case of change 667 */ 668 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, u16 set) 669 { 670 int ret; 671 672 phy_lock_mdio_bus(phydev); 673 ret = __phy_modify_changed(phydev, regnum, mask, set); 674 phy_unlock_mdio_bus(phydev); 675 676 return ret; 677 } 678 EXPORT_SYMBOL_GPL(phy_modify_changed); 679 680 /** 681 * __phy_modify - Convenience function for modifying a PHY register 682 * @phydev: the phy_device struct 683 * @regnum: register number to modify 684 * @mask: bit mask of bits to clear 685 * @set: new value of bits set in mask to write to @regnum 686 * 687 * NOTE: MUST NOT be called from interrupt context, 688 * because the bus read/write functions may wait for an interrupt 689 * to conclude the operation. 690 */ 691 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set) 692 { 693 int ret; 694 695 ret = __phy_modify_changed(phydev, regnum, mask, set); 696 697 return ret < 0 ? ret : 0; 698 } 699 EXPORT_SYMBOL_GPL(__phy_modify); 700 701 /** 702 * phy_modify - Convenience function for modifying a given PHY register 703 * @phydev: the phy_device struct 704 * @regnum: register number to write 705 * @mask: bit mask of bits to clear 706 * @set: new value of bits set in mask to write to @regnum 707 * 708 * NOTE: MUST NOT be called from interrupt context, 709 * because the bus read/write functions may wait for an interrupt 710 * to conclude the operation. 711 */ 712 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set) 713 { 714 int ret; 715 716 phy_lock_mdio_bus(phydev); 717 ret = __phy_modify(phydev, regnum, mask, set); 718 phy_unlock_mdio_bus(phydev); 719 720 return ret; 721 } 722 EXPORT_SYMBOL_GPL(phy_modify); 723 724 /** 725 * __phy_modify_mmd_changed - Function for modifying a register on MMD 726 * @phydev: the phy_device struct 727 * @devad: the MMD containing register to modify 728 * @regnum: register number to modify 729 * @mask: bit mask of bits to clear 730 * @set: new value of bits set in mask to write to @regnum 731 * 732 * Unlocked helper function which allows a MMD register to be modified as 733 * new register value = (old register value & ~mask) | set 734 * 735 * Returns negative errno, 0 if there was no change, and 1 in case of change 736 */ 737 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 738 u16 mask, u16 set) 739 { 740 int new, ret; 741 742 ret = __phy_read_mmd(phydev, devad, regnum); 743 if (ret < 0) 744 return ret; 745 746 new = (ret & ~mask) | set; 747 if (new == ret) 748 return 0; 749 750 ret = __phy_write_mmd(phydev, devad, regnum, new); 751 752 return ret < 0 ? ret : 1; 753 } 754 EXPORT_SYMBOL_GPL(__phy_modify_mmd_changed); 755 756 /** 757 * phy_modify_mmd_changed - Function for modifying a register on MMD 758 * @phydev: the phy_device struct 759 * @devad: the MMD containing register to modify 760 * @regnum: register number to modify 761 * @mask: bit mask of bits to clear 762 * @set: new value of bits set in mask to write to @regnum 763 * 764 * NOTE: MUST NOT be called from interrupt context, 765 * because the bus read/write functions may wait for an interrupt 766 * to conclude the operation. 767 * 768 * Returns negative errno, 0 if there was no change, and 1 in case of change 769 */ 770 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 771 u16 mask, u16 set) 772 { 773 int ret; 774 775 phy_lock_mdio_bus(phydev); 776 ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set); 777 phy_unlock_mdio_bus(phydev); 778 779 return ret; 780 } 781 EXPORT_SYMBOL_GPL(phy_modify_mmd_changed); 782 783 /** 784 * __phy_modify_mmd - Convenience function for modifying a register on MMD 785 * @phydev: the phy_device struct 786 * @devad: the MMD containing register to modify 787 * @regnum: register number to modify 788 * @mask: bit mask of bits to clear 789 * @set: new value of bits set in mask to write to @regnum 790 * 791 * NOTE: MUST NOT be called from interrupt context, 792 * because the bus read/write functions may wait for an interrupt 793 * to conclude the operation. 794 */ 795 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 796 u16 mask, u16 set) 797 { 798 int ret; 799 800 ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set); 801 802 return ret < 0 ? ret : 0; 803 } 804 EXPORT_SYMBOL_GPL(__phy_modify_mmd); 805 806 /** 807 * phy_modify_mmd - Convenience function for modifying a register on MMD 808 * @phydev: the phy_device struct 809 * @devad: the MMD containing register to modify 810 * @regnum: register number to modify 811 * @mask: bit mask of bits to clear 812 * @set: new value of bits set in mask to write to @regnum 813 * 814 * NOTE: MUST NOT be called from interrupt context, 815 * because the bus read/write functions may wait for an interrupt 816 * to conclude the operation. 817 */ 818 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 819 u16 mask, u16 set) 820 { 821 int ret; 822 823 phy_lock_mdio_bus(phydev); 824 ret = __phy_modify_mmd(phydev, devad, regnum, mask, set); 825 phy_unlock_mdio_bus(phydev); 826 827 return ret; 828 } 829 EXPORT_SYMBOL_GPL(phy_modify_mmd); 830 831 static int __phy_read_page(struct phy_device *phydev) 832 { 833 if (WARN_ONCE(!phydev->drv->read_page, "read_page callback not available, PHY driver not loaded?\n")) 834 return -EOPNOTSUPP; 835 836 return phydev->drv->read_page(phydev); 837 } 838 839 static int __phy_write_page(struct phy_device *phydev, int page) 840 { 841 if (WARN_ONCE(!phydev->drv->write_page, "write_page callback not available, PHY driver not loaded?\n")) 842 return -EOPNOTSUPP; 843 844 return phydev->drv->write_page(phydev, page); 845 } 846 847 /** 848 * phy_save_page() - take the bus lock and save the current page 849 * @phydev: a pointer to a &struct phy_device 850 * 851 * Take the MDIO bus lock, and return the current page number. On error, 852 * returns a negative errno. phy_restore_page() must always be called 853 * after this, irrespective of success or failure of this call. 854 */ 855 int phy_save_page(struct phy_device *phydev) 856 { 857 phy_lock_mdio_bus(phydev); 858 return __phy_read_page(phydev); 859 } 860 EXPORT_SYMBOL_GPL(phy_save_page); 861 862 /** 863 * phy_select_page() - take the bus lock, save the current page, and set a page 864 * @phydev: a pointer to a &struct phy_device 865 * @page: desired page 866 * 867 * Take the MDIO bus lock to protect against concurrent access, save the 868 * current PHY page, and set the current page. On error, returns a 869 * negative errno, otherwise returns the previous page number. 870 * phy_restore_page() must always be called after this, irrespective 871 * of success or failure of this call. 872 */ 873 int phy_select_page(struct phy_device *phydev, int page) 874 { 875 int ret, oldpage; 876 877 oldpage = ret = phy_save_page(phydev); 878 if (ret < 0) 879 return ret; 880 881 if (oldpage != page) { 882 ret = __phy_write_page(phydev, page); 883 if (ret < 0) 884 return ret; 885 } 886 887 return oldpage; 888 } 889 EXPORT_SYMBOL_GPL(phy_select_page); 890 891 /** 892 * phy_restore_page() - restore the page register and release the bus lock 893 * @phydev: a pointer to a &struct phy_device 894 * @oldpage: the old page, return value from phy_save_page() or phy_select_page() 895 * @ret: operation's return code 896 * 897 * Release the MDIO bus lock, restoring @oldpage if it is a valid page. 898 * This function propagates the earliest error code from the group of 899 * operations. 900 * 901 * Returns: 902 * @oldpage if it was a negative value, otherwise 903 * @ret if it was a negative errno value, otherwise 904 * phy_write_page()'s negative value if it were in error, otherwise 905 * @ret. 906 */ 907 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret) 908 { 909 int r; 910 911 if (oldpage >= 0) { 912 r = __phy_write_page(phydev, oldpage); 913 914 /* Propagate the operation return code if the page write 915 * was successful. 916 */ 917 if (ret >= 0 && r < 0) 918 ret = r; 919 } else { 920 /* Propagate the phy page selection error code */ 921 ret = oldpage; 922 } 923 924 phy_unlock_mdio_bus(phydev); 925 926 return ret; 927 } 928 EXPORT_SYMBOL_GPL(phy_restore_page); 929 930 /** 931 * phy_read_paged() - Convenience function for reading a paged register 932 * @phydev: a pointer to a &struct phy_device 933 * @page: the page for the phy 934 * @regnum: register number 935 * 936 * Same rules as for phy_read(). 937 */ 938 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum) 939 { 940 int ret = 0, oldpage; 941 942 oldpage = phy_select_page(phydev, page); 943 if (oldpage >= 0) 944 ret = __phy_read(phydev, regnum); 945 946 return phy_restore_page(phydev, oldpage, ret); 947 } 948 EXPORT_SYMBOL(phy_read_paged); 949 950 /** 951 * phy_write_paged() - Convenience function for writing a paged register 952 * @phydev: a pointer to a &struct phy_device 953 * @page: the page for the phy 954 * @regnum: register number 955 * @val: value to write 956 * 957 * Same rules as for phy_write(). 958 */ 959 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val) 960 { 961 int ret = 0, oldpage; 962 963 oldpage = phy_select_page(phydev, page); 964 if (oldpage >= 0) 965 ret = __phy_write(phydev, regnum, val); 966 967 return phy_restore_page(phydev, oldpage, ret); 968 } 969 EXPORT_SYMBOL(phy_write_paged); 970 971 /** 972 * phy_modify_paged_changed() - Function for modifying a paged register 973 * @phydev: a pointer to a &struct phy_device 974 * @page: the page for the phy 975 * @regnum: register number 976 * @mask: bit mask of bits to clear 977 * @set: bit mask of bits to set 978 * 979 * Returns negative errno, 0 if there was no change, and 1 in case of change 980 */ 981 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 982 u16 mask, u16 set) 983 { 984 int ret = 0, oldpage; 985 986 oldpage = phy_select_page(phydev, page); 987 if (oldpage >= 0) 988 ret = __phy_modify_changed(phydev, regnum, mask, set); 989 990 return phy_restore_page(phydev, oldpage, ret); 991 } 992 EXPORT_SYMBOL(phy_modify_paged_changed); 993 994 /** 995 * phy_modify_paged() - Convenience function for modifying a paged register 996 * @phydev: a pointer to a &struct phy_device 997 * @page: the page for the phy 998 * @regnum: register number 999 * @mask: bit mask of bits to clear 1000 * @set: bit mask of bits to set 1001 * 1002 * Same rules as for phy_read() and phy_write(). 1003 */ 1004 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1005 u16 mask, u16 set) 1006 { 1007 int ret = phy_modify_paged_changed(phydev, page, regnum, mask, set); 1008 1009 return ret < 0 ? ret : 0; 1010 } 1011 EXPORT_SYMBOL(phy_modify_paged); 1012