1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Core PHY library, taken from phy.c 4 */ 5 #include <linux/export.h> 6 #include <linux/phy.h> 7 #include <linux/of.h> 8 9 /** 10 * phy_speed_to_str - Return a string representing the PHY link speed 11 * 12 * @speed: Speed of the link 13 */ 14 const char *phy_speed_to_str(int speed) 15 { 16 BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 93, 17 "Enum ethtool_link_mode_bit_indices and phylib are out of sync. " 18 "If a speed or mode has been added please update phy_speed_to_str " 19 "and the PHY settings array.\n"); 20 21 switch (speed) { 22 case SPEED_10: 23 return "10Mbps"; 24 case SPEED_100: 25 return "100Mbps"; 26 case SPEED_1000: 27 return "1Gbps"; 28 case SPEED_2500: 29 return "2.5Gbps"; 30 case SPEED_5000: 31 return "5Gbps"; 32 case SPEED_10000: 33 return "10Gbps"; 34 case SPEED_14000: 35 return "14Gbps"; 36 case SPEED_20000: 37 return "20Gbps"; 38 case SPEED_25000: 39 return "25Gbps"; 40 case SPEED_40000: 41 return "40Gbps"; 42 case SPEED_50000: 43 return "50Gbps"; 44 case SPEED_56000: 45 return "56Gbps"; 46 case SPEED_100000: 47 return "100Gbps"; 48 case SPEED_200000: 49 return "200Gbps"; 50 case SPEED_400000: 51 return "400Gbps"; 52 case SPEED_UNKNOWN: 53 return "Unknown"; 54 default: 55 return "Unsupported (update phy-core.c)"; 56 } 57 } 58 EXPORT_SYMBOL_GPL(phy_speed_to_str); 59 60 /** 61 * phy_duplex_to_str - Return string describing the duplex 62 * 63 * @duplex: Duplex setting to describe 64 */ 65 const char *phy_duplex_to_str(unsigned int duplex) 66 { 67 if (duplex == DUPLEX_HALF) 68 return "Half"; 69 if (duplex == DUPLEX_FULL) 70 return "Full"; 71 if (duplex == DUPLEX_UNKNOWN) 72 return "Unknown"; 73 return "Unsupported (update phy-core.c)"; 74 } 75 EXPORT_SYMBOL_GPL(phy_duplex_to_str); 76 77 /** 78 * phy_rate_matching_to_str - Return a string describing the rate matching 79 * 80 * @rate_matching: Type of rate matching to describe 81 */ 82 const char *phy_rate_matching_to_str(int rate_matching) 83 { 84 switch (rate_matching) { 85 case RATE_MATCH_NONE: 86 return "none"; 87 case RATE_MATCH_PAUSE: 88 return "pause"; 89 case RATE_MATCH_CRS: 90 return "crs"; 91 case RATE_MATCH_OPEN_LOOP: 92 return "open-loop"; 93 } 94 return "Unsupported (update phy-core.c)"; 95 } 96 EXPORT_SYMBOL_GPL(phy_rate_matching_to_str); 97 98 /** 99 * phy_interface_num_ports - Return the number of links that can be carried by 100 * a given MAC-PHY physical link. Returns 0 if this is 101 * unknown, the number of links else. 102 * 103 * @interface: The interface mode we want to get the number of ports 104 */ 105 int phy_interface_num_ports(phy_interface_t interface) 106 { 107 switch (interface) { 108 case PHY_INTERFACE_MODE_NA: 109 return 0; 110 case PHY_INTERFACE_MODE_INTERNAL: 111 case PHY_INTERFACE_MODE_MII: 112 case PHY_INTERFACE_MODE_GMII: 113 case PHY_INTERFACE_MODE_TBI: 114 case PHY_INTERFACE_MODE_REVMII: 115 case PHY_INTERFACE_MODE_RMII: 116 case PHY_INTERFACE_MODE_REVRMII: 117 case PHY_INTERFACE_MODE_RGMII: 118 case PHY_INTERFACE_MODE_RGMII_ID: 119 case PHY_INTERFACE_MODE_RGMII_RXID: 120 case PHY_INTERFACE_MODE_RGMII_TXID: 121 case PHY_INTERFACE_MODE_RTBI: 122 case PHY_INTERFACE_MODE_XGMII: 123 case PHY_INTERFACE_MODE_XLGMII: 124 case PHY_INTERFACE_MODE_MOCA: 125 case PHY_INTERFACE_MODE_TRGMII: 126 case PHY_INTERFACE_MODE_USXGMII: 127 case PHY_INTERFACE_MODE_SGMII: 128 case PHY_INTERFACE_MODE_SMII: 129 case PHY_INTERFACE_MODE_1000BASEX: 130 case PHY_INTERFACE_MODE_2500BASEX: 131 case PHY_INTERFACE_MODE_5GBASER: 132 case PHY_INTERFACE_MODE_10GBASER: 133 case PHY_INTERFACE_MODE_25GBASER: 134 case PHY_INTERFACE_MODE_10GKR: 135 case PHY_INTERFACE_MODE_100BASEX: 136 case PHY_INTERFACE_MODE_RXAUI: 137 case PHY_INTERFACE_MODE_XAUI: 138 case PHY_INTERFACE_MODE_1000BASEKX: 139 return 1; 140 case PHY_INTERFACE_MODE_QSGMII: 141 case PHY_INTERFACE_MODE_QUSGMII: 142 return 4; 143 case PHY_INTERFACE_MODE_MAX: 144 WARN_ONCE(1, "PHY_INTERFACE_MODE_MAX isn't a valid interface mode"); 145 return 0; 146 } 147 return 0; 148 } 149 EXPORT_SYMBOL_GPL(phy_interface_num_ports); 150 151 /* A mapping of all SUPPORTED settings to speed/duplex. This table 152 * must be grouped by speed and sorted in descending match priority 153 * - iow, descending speed. 154 */ 155 156 #define PHY_SETTING(s, d, b) { .speed = SPEED_ ## s, .duplex = DUPLEX_ ## d, \ 157 .bit = ETHTOOL_LINK_MODE_ ## b ## _BIT} 158 159 static const struct phy_setting settings[] = { 160 /* 400G */ 161 PHY_SETTING( 400000, FULL, 400000baseCR8_Full ), 162 PHY_SETTING( 400000, FULL, 400000baseKR8_Full ), 163 PHY_SETTING( 400000, FULL, 400000baseLR8_ER8_FR8_Full ), 164 PHY_SETTING( 400000, FULL, 400000baseDR8_Full ), 165 PHY_SETTING( 400000, FULL, 400000baseSR8_Full ), 166 PHY_SETTING( 400000, FULL, 400000baseCR4_Full ), 167 PHY_SETTING( 400000, FULL, 400000baseKR4_Full ), 168 PHY_SETTING( 400000, FULL, 400000baseLR4_ER4_FR4_Full ), 169 PHY_SETTING( 400000, FULL, 400000baseDR4_Full ), 170 PHY_SETTING( 400000, FULL, 400000baseSR4_Full ), 171 /* 200G */ 172 PHY_SETTING( 200000, FULL, 200000baseCR4_Full ), 173 PHY_SETTING( 200000, FULL, 200000baseKR4_Full ), 174 PHY_SETTING( 200000, FULL, 200000baseLR4_ER4_FR4_Full ), 175 PHY_SETTING( 200000, FULL, 200000baseDR4_Full ), 176 PHY_SETTING( 200000, FULL, 200000baseSR4_Full ), 177 PHY_SETTING( 200000, FULL, 200000baseCR2_Full ), 178 PHY_SETTING( 200000, FULL, 200000baseKR2_Full ), 179 PHY_SETTING( 200000, FULL, 200000baseLR2_ER2_FR2_Full ), 180 PHY_SETTING( 200000, FULL, 200000baseDR2_Full ), 181 PHY_SETTING( 200000, FULL, 200000baseSR2_Full ), 182 /* 100G */ 183 PHY_SETTING( 100000, FULL, 100000baseCR4_Full ), 184 PHY_SETTING( 100000, FULL, 100000baseKR4_Full ), 185 PHY_SETTING( 100000, FULL, 100000baseLR4_ER4_Full ), 186 PHY_SETTING( 100000, FULL, 100000baseSR4_Full ), 187 PHY_SETTING( 100000, FULL, 100000baseCR2_Full ), 188 PHY_SETTING( 100000, FULL, 100000baseKR2_Full ), 189 PHY_SETTING( 100000, FULL, 100000baseLR2_ER2_FR2_Full ), 190 PHY_SETTING( 100000, FULL, 100000baseDR2_Full ), 191 PHY_SETTING( 100000, FULL, 100000baseSR2_Full ), 192 PHY_SETTING( 100000, FULL, 100000baseCR_Full ), 193 PHY_SETTING( 100000, FULL, 100000baseKR_Full ), 194 PHY_SETTING( 100000, FULL, 100000baseLR_ER_FR_Full ), 195 PHY_SETTING( 100000, FULL, 100000baseDR_Full ), 196 PHY_SETTING( 100000, FULL, 100000baseSR_Full ), 197 /* 56G */ 198 PHY_SETTING( 56000, FULL, 56000baseCR4_Full ), 199 PHY_SETTING( 56000, FULL, 56000baseKR4_Full ), 200 PHY_SETTING( 56000, FULL, 56000baseLR4_Full ), 201 PHY_SETTING( 56000, FULL, 56000baseSR4_Full ), 202 /* 50G */ 203 PHY_SETTING( 50000, FULL, 50000baseCR2_Full ), 204 PHY_SETTING( 50000, FULL, 50000baseKR2_Full ), 205 PHY_SETTING( 50000, FULL, 50000baseSR2_Full ), 206 PHY_SETTING( 50000, FULL, 50000baseCR_Full ), 207 PHY_SETTING( 50000, FULL, 50000baseKR_Full ), 208 PHY_SETTING( 50000, FULL, 50000baseLR_ER_FR_Full ), 209 PHY_SETTING( 50000, FULL, 50000baseDR_Full ), 210 PHY_SETTING( 50000, FULL, 50000baseSR_Full ), 211 /* 40G */ 212 PHY_SETTING( 40000, FULL, 40000baseCR4_Full ), 213 PHY_SETTING( 40000, FULL, 40000baseKR4_Full ), 214 PHY_SETTING( 40000, FULL, 40000baseLR4_Full ), 215 PHY_SETTING( 40000, FULL, 40000baseSR4_Full ), 216 /* 25G */ 217 PHY_SETTING( 25000, FULL, 25000baseCR_Full ), 218 PHY_SETTING( 25000, FULL, 25000baseKR_Full ), 219 PHY_SETTING( 25000, FULL, 25000baseSR_Full ), 220 /* 20G */ 221 PHY_SETTING( 20000, FULL, 20000baseKR2_Full ), 222 PHY_SETTING( 20000, FULL, 20000baseMLD2_Full ), 223 /* 10G */ 224 PHY_SETTING( 10000, FULL, 10000baseCR_Full ), 225 PHY_SETTING( 10000, FULL, 10000baseER_Full ), 226 PHY_SETTING( 10000, FULL, 10000baseKR_Full ), 227 PHY_SETTING( 10000, FULL, 10000baseKX4_Full ), 228 PHY_SETTING( 10000, FULL, 10000baseLR_Full ), 229 PHY_SETTING( 10000, FULL, 10000baseLRM_Full ), 230 PHY_SETTING( 10000, FULL, 10000baseR_FEC ), 231 PHY_SETTING( 10000, FULL, 10000baseSR_Full ), 232 PHY_SETTING( 10000, FULL, 10000baseT_Full ), 233 /* 5G */ 234 PHY_SETTING( 5000, FULL, 5000baseT_Full ), 235 /* 2.5G */ 236 PHY_SETTING( 2500, FULL, 2500baseT_Full ), 237 PHY_SETTING( 2500, FULL, 2500baseX_Full ), 238 /* 1G */ 239 PHY_SETTING( 1000, FULL, 1000baseT_Full ), 240 PHY_SETTING( 1000, HALF, 1000baseT_Half ), 241 PHY_SETTING( 1000, FULL, 1000baseT1_Full ), 242 PHY_SETTING( 1000, FULL, 1000baseX_Full ), 243 PHY_SETTING( 1000, FULL, 1000baseKX_Full ), 244 /* 100M */ 245 PHY_SETTING( 100, FULL, 100baseT_Full ), 246 PHY_SETTING( 100, FULL, 100baseT1_Full ), 247 PHY_SETTING( 100, HALF, 100baseT_Half ), 248 PHY_SETTING( 100, HALF, 100baseFX_Half ), 249 PHY_SETTING( 100, FULL, 100baseFX_Full ), 250 /* 10M */ 251 PHY_SETTING( 10, FULL, 10baseT_Full ), 252 PHY_SETTING( 10, HALF, 10baseT_Half ), 253 PHY_SETTING( 10, FULL, 10baseT1L_Full ), 254 }; 255 #undef PHY_SETTING 256 257 /** 258 * phy_lookup_setting - lookup a PHY setting 259 * @speed: speed to match 260 * @duplex: duplex to match 261 * @mask: allowed link modes 262 * @exact: an exact match is required 263 * 264 * Search the settings array for a setting that matches the speed and 265 * duplex, and which is supported. 266 * 267 * If @exact is unset, either an exact match or %NULL for no match will 268 * be returned. 269 * 270 * If @exact is set, an exact match, the fastest supported setting at 271 * or below the specified speed, the slowest supported setting, or if 272 * they all fail, %NULL will be returned. 273 */ 274 const struct phy_setting * 275 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, bool exact) 276 { 277 const struct phy_setting *p, *match = NULL, *last = NULL; 278 int i; 279 280 for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) { 281 if (p->bit < __ETHTOOL_LINK_MODE_MASK_NBITS && 282 test_bit(p->bit, mask)) { 283 last = p; 284 if (p->speed == speed && p->duplex == duplex) { 285 /* Exact match for speed and duplex */ 286 match = p; 287 break; 288 } else if (!exact) { 289 if (!match && p->speed <= speed) 290 /* Candidate */ 291 match = p; 292 293 if (p->speed < speed) 294 break; 295 } 296 } 297 } 298 299 if (!match && !exact) 300 match = last; 301 302 return match; 303 } 304 EXPORT_SYMBOL_GPL(phy_lookup_setting); 305 306 size_t phy_speeds(unsigned int *speeds, size_t size, 307 unsigned long *mask) 308 { 309 size_t count; 310 int i; 311 312 for (i = 0, count = 0; i < ARRAY_SIZE(settings) && count < size; i++) 313 if (settings[i].bit < __ETHTOOL_LINK_MODE_MASK_NBITS && 314 test_bit(settings[i].bit, mask) && 315 (count == 0 || speeds[count - 1] != settings[i].speed)) 316 speeds[count++] = settings[i].speed; 317 318 return count; 319 } 320 321 static void __set_linkmode_max_speed(u32 max_speed, unsigned long *addr) 322 { 323 const struct phy_setting *p; 324 int i; 325 326 for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) { 327 if (p->speed > max_speed) 328 linkmode_clear_bit(p->bit, addr); 329 else 330 break; 331 } 332 } 333 334 static void __set_phy_supported(struct phy_device *phydev, u32 max_speed) 335 { 336 __set_linkmode_max_speed(max_speed, phydev->supported); 337 } 338 339 /** 340 * phy_set_max_speed - Set the maximum speed the PHY should support 341 * 342 * @phydev: The phy_device struct 343 * @max_speed: Maximum speed 344 * 345 * The PHY might be more capable than the MAC. For example a Fast Ethernet 346 * is connected to a 1G PHY. This function allows the MAC to indicate its 347 * maximum speed, and so limit what the PHY will advertise. 348 */ 349 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed) 350 { 351 __set_phy_supported(phydev, max_speed); 352 353 phy_advertise_supported(phydev); 354 } 355 EXPORT_SYMBOL(phy_set_max_speed); 356 357 void of_set_phy_supported(struct phy_device *phydev) 358 { 359 struct device_node *node = phydev->mdio.dev.of_node; 360 u32 max_speed; 361 362 if (!IS_ENABLED(CONFIG_OF_MDIO)) 363 return; 364 365 if (!node) 366 return; 367 368 if (!of_property_read_u32(node, "max-speed", &max_speed)) 369 __set_phy_supported(phydev, max_speed); 370 } 371 372 void of_set_phy_eee_broken(struct phy_device *phydev) 373 { 374 struct device_node *node = phydev->mdio.dev.of_node; 375 u32 broken = 0; 376 377 if (!IS_ENABLED(CONFIG_OF_MDIO)) 378 return; 379 380 if (!node) 381 return; 382 383 if (of_property_read_bool(node, "eee-broken-100tx")) 384 broken |= MDIO_EEE_100TX; 385 if (of_property_read_bool(node, "eee-broken-1000t")) 386 broken |= MDIO_EEE_1000T; 387 if (of_property_read_bool(node, "eee-broken-10gt")) 388 broken |= MDIO_EEE_10GT; 389 if (of_property_read_bool(node, "eee-broken-1000kx")) 390 broken |= MDIO_EEE_1000KX; 391 if (of_property_read_bool(node, "eee-broken-10gkx4")) 392 broken |= MDIO_EEE_10GKX4; 393 if (of_property_read_bool(node, "eee-broken-10gkr")) 394 broken |= MDIO_EEE_10GKR; 395 396 phydev->eee_broken_modes = broken; 397 } 398 399 /** 400 * phy_resolve_aneg_pause - Determine pause autoneg results 401 * 402 * @phydev: The phy_device struct 403 * 404 * Once autoneg has completed the local pause settings can be 405 * resolved. Determine if pause and asymmetric pause should be used 406 * by the MAC. 407 */ 408 409 void phy_resolve_aneg_pause(struct phy_device *phydev) 410 { 411 if (phydev->duplex == DUPLEX_FULL) { 412 phydev->pause = linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 413 phydev->lp_advertising); 414 phydev->asym_pause = linkmode_test_bit( 415 ETHTOOL_LINK_MODE_Asym_Pause_BIT, 416 phydev->lp_advertising); 417 } 418 } 419 EXPORT_SYMBOL_GPL(phy_resolve_aneg_pause); 420 421 /** 422 * phy_resolve_aneg_linkmode - resolve the advertisements into PHY settings 423 * @phydev: The phy_device struct 424 * 425 * Resolve our and the link partner advertisements into their corresponding 426 * speed and duplex. If full duplex was negotiated, extract the pause mode 427 * from the link partner mask. 428 */ 429 void phy_resolve_aneg_linkmode(struct phy_device *phydev) 430 { 431 __ETHTOOL_DECLARE_LINK_MODE_MASK(common); 432 int i; 433 434 linkmode_and(common, phydev->lp_advertising, phydev->advertising); 435 436 for (i = 0; i < ARRAY_SIZE(settings); i++) 437 if (test_bit(settings[i].bit, common)) { 438 phydev->speed = settings[i].speed; 439 phydev->duplex = settings[i].duplex; 440 break; 441 } 442 443 phy_resolve_aneg_pause(phydev); 444 } 445 EXPORT_SYMBOL_GPL(phy_resolve_aneg_linkmode); 446 447 /** 448 * phy_check_downshift - check whether downshift occurred 449 * @phydev: The phy_device struct 450 * 451 * Check whether a downshift to a lower speed occurred. If this should be the 452 * case warn the user. 453 * Prerequisite for detecting downshift is that PHY driver implements the 454 * read_status callback and sets phydev->speed to the actual link speed. 455 */ 456 void phy_check_downshift(struct phy_device *phydev) 457 { 458 __ETHTOOL_DECLARE_LINK_MODE_MASK(common); 459 int i, speed = SPEED_UNKNOWN; 460 461 phydev->downshifted_rate = 0; 462 463 if (phydev->autoneg == AUTONEG_DISABLE || 464 phydev->speed == SPEED_UNKNOWN) 465 return; 466 467 linkmode_and(common, phydev->lp_advertising, phydev->advertising); 468 469 for (i = 0; i < ARRAY_SIZE(settings); i++) 470 if (test_bit(settings[i].bit, common)) { 471 speed = settings[i].speed; 472 break; 473 } 474 475 if (speed == SPEED_UNKNOWN || phydev->speed >= speed) 476 return; 477 478 phydev_warn(phydev, "Downshift occurred from negotiated speed %s to actual speed %s, check cabling!\n", 479 phy_speed_to_str(speed), phy_speed_to_str(phydev->speed)); 480 481 phydev->downshifted_rate = 1; 482 } 483 EXPORT_SYMBOL_GPL(phy_check_downshift); 484 485 static int phy_resolve_min_speed(struct phy_device *phydev, bool fdx_only) 486 { 487 __ETHTOOL_DECLARE_LINK_MODE_MASK(common); 488 int i = ARRAY_SIZE(settings); 489 490 linkmode_and(common, phydev->lp_advertising, phydev->advertising); 491 492 while (--i >= 0) { 493 if (test_bit(settings[i].bit, common)) { 494 if (fdx_only && settings[i].duplex != DUPLEX_FULL) 495 continue; 496 return settings[i].speed; 497 } 498 } 499 500 return SPEED_UNKNOWN; 501 } 502 503 int phy_speed_down_core(struct phy_device *phydev) 504 { 505 int min_common_speed = phy_resolve_min_speed(phydev, true); 506 507 if (min_common_speed == SPEED_UNKNOWN) 508 return -EINVAL; 509 510 __set_linkmode_max_speed(min_common_speed, phydev->advertising); 511 512 return 0; 513 } 514 515 static void mmd_phy_indirect(struct mii_bus *bus, int phy_addr, int devad, 516 u16 regnum) 517 { 518 /* Write the desired MMD Devad */ 519 __mdiobus_write(bus, phy_addr, MII_MMD_CTRL, devad); 520 521 /* Write the desired MMD register address */ 522 __mdiobus_write(bus, phy_addr, MII_MMD_DATA, regnum); 523 524 /* Select the Function : DATA with no post increment */ 525 __mdiobus_write(bus, phy_addr, MII_MMD_CTRL, 526 devad | MII_MMD_CTRL_NOINCR); 527 } 528 529 /** 530 * __phy_read_mmd - Convenience function for reading a register 531 * from an MMD on a given PHY. 532 * @phydev: The phy_device struct 533 * @devad: The MMD to read from (0..31) 534 * @regnum: The register on the MMD to read (0..65535) 535 * 536 * Same rules as for __phy_read(); 537 */ 538 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) 539 { 540 int val; 541 542 if (regnum > (u16)~0 || devad > 32) 543 return -EINVAL; 544 545 if (phydev->drv && phydev->drv->read_mmd) { 546 val = phydev->drv->read_mmd(phydev, devad, regnum); 547 } else if (phydev->is_c45) { 548 val = __mdiobus_c45_read(phydev->mdio.bus, phydev->mdio.addr, 549 devad, regnum); 550 } else { 551 struct mii_bus *bus = phydev->mdio.bus; 552 int phy_addr = phydev->mdio.addr; 553 554 mmd_phy_indirect(bus, phy_addr, devad, regnum); 555 556 /* Read the content of the MMD's selected register */ 557 val = __mdiobus_read(bus, phy_addr, MII_MMD_DATA); 558 } 559 return val; 560 } 561 EXPORT_SYMBOL(__phy_read_mmd); 562 563 /** 564 * phy_read_mmd - Convenience function for reading a register 565 * from an MMD on a given PHY. 566 * @phydev: The phy_device struct 567 * @devad: The MMD to read from 568 * @regnum: The register on the MMD to read 569 * 570 * Same rules as for phy_read(); 571 */ 572 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) 573 { 574 int ret; 575 576 phy_lock_mdio_bus(phydev); 577 ret = __phy_read_mmd(phydev, devad, regnum); 578 phy_unlock_mdio_bus(phydev); 579 580 return ret; 581 } 582 EXPORT_SYMBOL(phy_read_mmd); 583 584 /** 585 * __phy_write_mmd - Convenience function for writing a register 586 * on an MMD on a given PHY. 587 * @phydev: The phy_device struct 588 * @devad: The MMD to read from 589 * @regnum: The register on the MMD to read 590 * @val: value to write to @regnum 591 * 592 * Same rules as for __phy_write(); 593 */ 594 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val) 595 { 596 int ret; 597 598 if (regnum > (u16)~0 || devad > 32) 599 return -EINVAL; 600 601 if (phydev->drv && phydev->drv->write_mmd) { 602 ret = phydev->drv->write_mmd(phydev, devad, regnum, val); 603 } else if (phydev->is_c45) { 604 ret = __mdiobus_c45_write(phydev->mdio.bus, phydev->mdio.addr, 605 devad, regnum, val); 606 } else { 607 struct mii_bus *bus = phydev->mdio.bus; 608 int phy_addr = phydev->mdio.addr; 609 610 mmd_phy_indirect(bus, phy_addr, devad, regnum); 611 612 /* Write the data into MMD's selected register */ 613 __mdiobus_write(bus, phy_addr, MII_MMD_DATA, val); 614 615 ret = 0; 616 } 617 return ret; 618 } 619 EXPORT_SYMBOL(__phy_write_mmd); 620 621 /** 622 * phy_write_mmd - Convenience function for writing a register 623 * on an MMD on a given PHY. 624 * @phydev: The phy_device struct 625 * @devad: The MMD to read from 626 * @regnum: The register on the MMD to read 627 * @val: value to write to @regnum 628 * 629 * Same rules as for phy_write(); 630 */ 631 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val) 632 { 633 int ret; 634 635 phy_lock_mdio_bus(phydev); 636 ret = __phy_write_mmd(phydev, devad, regnum, val); 637 phy_unlock_mdio_bus(phydev); 638 639 return ret; 640 } 641 EXPORT_SYMBOL(phy_write_mmd); 642 643 /** 644 * phy_modify_changed - Function for modifying a PHY register 645 * @phydev: the phy_device struct 646 * @regnum: register number to modify 647 * @mask: bit mask of bits to clear 648 * @set: new value of bits set in mask to write to @regnum 649 * 650 * NOTE: MUST NOT be called from interrupt context, 651 * because the bus read/write functions may wait for an interrupt 652 * to conclude the operation. 653 * 654 * Returns negative errno, 0 if there was no change, and 1 in case of change 655 */ 656 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, u16 set) 657 { 658 int ret; 659 660 phy_lock_mdio_bus(phydev); 661 ret = __phy_modify_changed(phydev, regnum, mask, set); 662 phy_unlock_mdio_bus(phydev); 663 664 return ret; 665 } 666 EXPORT_SYMBOL_GPL(phy_modify_changed); 667 668 /** 669 * __phy_modify - Convenience function for modifying a PHY register 670 * @phydev: the phy_device struct 671 * @regnum: register number to modify 672 * @mask: bit mask of bits to clear 673 * @set: new value of bits set in mask to write to @regnum 674 * 675 * NOTE: MUST NOT be called from interrupt context, 676 * because the bus read/write functions may wait for an interrupt 677 * to conclude the operation. 678 */ 679 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set) 680 { 681 int ret; 682 683 ret = __phy_modify_changed(phydev, regnum, mask, set); 684 685 return ret < 0 ? ret : 0; 686 } 687 EXPORT_SYMBOL_GPL(__phy_modify); 688 689 /** 690 * phy_modify - Convenience function for modifying a given PHY register 691 * @phydev: the phy_device struct 692 * @regnum: register number to write 693 * @mask: bit mask of bits to clear 694 * @set: new value of bits set in mask to write to @regnum 695 * 696 * NOTE: MUST NOT be called from interrupt context, 697 * because the bus read/write functions may wait for an interrupt 698 * to conclude the operation. 699 */ 700 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set) 701 { 702 int ret; 703 704 phy_lock_mdio_bus(phydev); 705 ret = __phy_modify(phydev, regnum, mask, set); 706 phy_unlock_mdio_bus(phydev); 707 708 return ret; 709 } 710 EXPORT_SYMBOL_GPL(phy_modify); 711 712 /** 713 * __phy_modify_mmd_changed - Function for modifying a register on MMD 714 * @phydev: the phy_device struct 715 * @devad: the MMD containing register to modify 716 * @regnum: register number to modify 717 * @mask: bit mask of bits to clear 718 * @set: new value of bits set in mask to write to @regnum 719 * 720 * Unlocked helper function which allows a MMD register to be modified as 721 * new register value = (old register value & ~mask) | set 722 * 723 * Returns negative errno, 0 if there was no change, and 1 in case of change 724 */ 725 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 726 u16 mask, u16 set) 727 { 728 int new, ret; 729 730 ret = __phy_read_mmd(phydev, devad, regnum); 731 if (ret < 0) 732 return ret; 733 734 new = (ret & ~mask) | set; 735 if (new == ret) 736 return 0; 737 738 ret = __phy_write_mmd(phydev, devad, regnum, new); 739 740 return ret < 0 ? ret : 1; 741 } 742 EXPORT_SYMBOL_GPL(__phy_modify_mmd_changed); 743 744 /** 745 * phy_modify_mmd_changed - Function for modifying a register on MMD 746 * @phydev: the phy_device struct 747 * @devad: the MMD containing register to modify 748 * @regnum: register number to modify 749 * @mask: bit mask of bits to clear 750 * @set: new value of bits set in mask to write to @regnum 751 * 752 * NOTE: MUST NOT be called from interrupt context, 753 * because the bus read/write functions may wait for an interrupt 754 * to conclude the operation. 755 * 756 * Returns negative errno, 0 if there was no change, and 1 in case of change 757 */ 758 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 759 u16 mask, u16 set) 760 { 761 int ret; 762 763 phy_lock_mdio_bus(phydev); 764 ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set); 765 phy_unlock_mdio_bus(phydev); 766 767 return ret; 768 } 769 EXPORT_SYMBOL_GPL(phy_modify_mmd_changed); 770 771 /** 772 * __phy_modify_mmd - Convenience function for modifying a register on MMD 773 * @phydev: the phy_device struct 774 * @devad: the MMD containing register to modify 775 * @regnum: register number to modify 776 * @mask: bit mask of bits to clear 777 * @set: new value of bits set in mask to write to @regnum 778 * 779 * NOTE: MUST NOT be called from interrupt context, 780 * because the bus read/write functions may wait for an interrupt 781 * to conclude the operation. 782 */ 783 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 784 u16 mask, u16 set) 785 { 786 int ret; 787 788 ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set); 789 790 return ret < 0 ? ret : 0; 791 } 792 EXPORT_SYMBOL_GPL(__phy_modify_mmd); 793 794 /** 795 * phy_modify_mmd - Convenience function for modifying a register on MMD 796 * @phydev: the phy_device struct 797 * @devad: the MMD containing register to modify 798 * @regnum: register number to modify 799 * @mask: bit mask of bits to clear 800 * @set: new value of bits set in mask to write to @regnum 801 * 802 * NOTE: MUST NOT be called from interrupt context, 803 * because the bus read/write functions may wait for an interrupt 804 * to conclude the operation. 805 */ 806 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 807 u16 mask, u16 set) 808 { 809 int ret; 810 811 phy_lock_mdio_bus(phydev); 812 ret = __phy_modify_mmd(phydev, devad, regnum, mask, set); 813 phy_unlock_mdio_bus(phydev); 814 815 return ret; 816 } 817 EXPORT_SYMBOL_GPL(phy_modify_mmd); 818 819 static int __phy_read_page(struct phy_device *phydev) 820 { 821 if (WARN_ONCE(!phydev->drv->read_page, "read_page callback not available, PHY driver not loaded?\n")) 822 return -EOPNOTSUPP; 823 824 return phydev->drv->read_page(phydev); 825 } 826 827 static int __phy_write_page(struct phy_device *phydev, int page) 828 { 829 if (WARN_ONCE(!phydev->drv->write_page, "write_page callback not available, PHY driver not loaded?\n")) 830 return -EOPNOTSUPP; 831 832 return phydev->drv->write_page(phydev, page); 833 } 834 835 /** 836 * phy_save_page() - take the bus lock and save the current page 837 * @phydev: a pointer to a &struct phy_device 838 * 839 * Take the MDIO bus lock, and return the current page number. On error, 840 * returns a negative errno. phy_restore_page() must always be called 841 * after this, irrespective of success or failure of this call. 842 */ 843 int phy_save_page(struct phy_device *phydev) 844 { 845 phy_lock_mdio_bus(phydev); 846 return __phy_read_page(phydev); 847 } 848 EXPORT_SYMBOL_GPL(phy_save_page); 849 850 /** 851 * phy_select_page() - take the bus lock, save the current page, and set a page 852 * @phydev: a pointer to a &struct phy_device 853 * @page: desired page 854 * 855 * Take the MDIO bus lock to protect against concurrent access, save the 856 * current PHY page, and set the current page. On error, returns a 857 * negative errno, otherwise returns the previous page number. 858 * phy_restore_page() must always be called after this, irrespective 859 * of success or failure of this call. 860 */ 861 int phy_select_page(struct phy_device *phydev, int page) 862 { 863 int ret, oldpage; 864 865 oldpage = ret = phy_save_page(phydev); 866 if (ret < 0) 867 return ret; 868 869 if (oldpage != page) { 870 ret = __phy_write_page(phydev, page); 871 if (ret < 0) 872 return ret; 873 } 874 875 return oldpage; 876 } 877 EXPORT_SYMBOL_GPL(phy_select_page); 878 879 /** 880 * phy_restore_page() - restore the page register and release the bus lock 881 * @phydev: a pointer to a &struct phy_device 882 * @oldpage: the old page, return value from phy_save_page() or phy_select_page() 883 * @ret: operation's return code 884 * 885 * Release the MDIO bus lock, restoring @oldpage if it is a valid page. 886 * This function propagates the earliest error code from the group of 887 * operations. 888 * 889 * Returns: 890 * @oldpage if it was a negative value, otherwise 891 * @ret if it was a negative errno value, otherwise 892 * phy_write_page()'s negative value if it were in error, otherwise 893 * @ret. 894 */ 895 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret) 896 { 897 int r; 898 899 if (oldpage >= 0) { 900 r = __phy_write_page(phydev, oldpage); 901 902 /* Propagate the operation return code if the page write 903 * was successful. 904 */ 905 if (ret >= 0 && r < 0) 906 ret = r; 907 } else { 908 /* Propagate the phy page selection error code */ 909 ret = oldpage; 910 } 911 912 phy_unlock_mdio_bus(phydev); 913 914 return ret; 915 } 916 EXPORT_SYMBOL_GPL(phy_restore_page); 917 918 /** 919 * phy_read_paged() - Convenience function for reading a paged register 920 * @phydev: a pointer to a &struct phy_device 921 * @page: the page for the phy 922 * @regnum: register number 923 * 924 * Same rules as for phy_read(). 925 */ 926 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum) 927 { 928 int ret = 0, oldpage; 929 930 oldpage = phy_select_page(phydev, page); 931 if (oldpage >= 0) 932 ret = __phy_read(phydev, regnum); 933 934 return phy_restore_page(phydev, oldpage, ret); 935 } 936 EXPORT_SYMBOL(phy_read_paged); 937 938 /** 939 * phy_write_paged() - Convenience function for writing a paged register 940 * @phydev: a pointer to a &struct phy_device 941 * @page: the page for the phy 942 * @regnum: register number 943 * @val: value to write 944 * 945 * Same rules as for phy_write(). 946 */ 947 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val) 948 { 949 int ret = 0, oldpage; 950 951 oldpage = phy_select_page(phydev, page); 952 if (oldpage >= 0) 953 ret = __phy_write(phydev, regnum, val); 954 955 return phy_restore_page(phydev, oldpage, ret); 956 } 957 EXPORT_SYMBOL(phy_write_paged); 958 959 /** 960 * phy_modify_paged_changed() - Function for modifying a paged register 961 * @phydev: a pointer to a &struct phy_device 962 * @page: the page for the phy 963 * @regnum: register number 964 * @mask: bit mask of bits to clear 965 * @set: bit mask of bits to set 966 * 967 * Returns negative errno, 0 if there was no change, and 1 in case of change 968 */ 969 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 970 u16 mask, u16 set) 971 { 972 int ret = 0, oldpage; 973 974 oldpage = phy_select_page(phydev, page); 975 if (oldpage >= 0) 976 ret = __phy_modify_changed(phydev, regnum, mask, set); 977 978 return phy_restore_page(phydev, oldpage, ret); 979 } 980 EXPORT_SYMBOL(phy_modify_paged_changed); 981 982 /** 983 * phy_modify_paged() - Convenience function for modifying a paged register 984 * @phydev: a pointer to a &struct phy_device 985 * @page: the page for the phy 986 * @regnum: register number 987 * @mask: bit mask of bits to clear 988 * @set: bit mask of bits to set 989 * 990 * Same rules as for phy_read() and phy_write(). 991 */ 992 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 993 u16 mask, u16 set) 994 { 995 int ret = phy_modify_paged_changed(phydev, page, regnum, mask, set); 996 997 return ret < 0 ? ret : 0; 998 } 999 EXPORT_SYMBOL(phy_modify_paged); 1000