xref: /openbmc/linux/drivers/net/phy/phy-core.c (revision 53a2a90d)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Core PHY library, taken from phy.c
4  */
5 #include <linux/export.h>
6 #include <linux/phy.h>
7 #include <linux/of.h>
8 
9 /**
10  * phy_speed_to_str - Return a string representing the PHY link speed
11  *
12  * @speed: Speed of the link
13  */
14 const char *phy_speed_to_str(int speed)
15 {
16 	BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 93,
17 		"Enum ethtool_link_mode_bit_indices and phylib are out of sync. "
18 		"If a speed or mode has been added please update phy_speed_to_str "
19 		"and the PHY settings array.\n");
20 
21 	switch (speed) {
22 	case SPEED_10:
23 		return "10Mbps";
24 	case SPEED_100:
25 		return "100Mbps";
26 	case SPEED_1000:
27 		return "1Gbps";
28 	case SPEED_2500:
29 		return "2.5Gbps";
30 	case SPEED_5000:
31 		return "5Gbps";
32 	case SPEED_10000:
33 		return "10Gbps";
34 	case SPEED_14000:
35 		return "14Gbps";
36 	case SPEED_20000:
37 		return "20Gbps";
38 	case SPEED_25000:
39 		return "25Gbps";
40 	case SPEED_40000:
41 		return "40Gbps";
42 	case SPEED_50000:
43 		return "50Gbps";
44 	case SPEED_56000:
45 		return "56Gbps";
46 	case SPEED_100000:
47 		return "100Gbps";
48 	case SPEED_200000:
49 		return "200Gbps";
50 	case SPEED_400000:
51 		return "400Gbps";
52 	case SPEED_UNKNOWN:
53 		return "Unknown";
54 	default:
55 		return "Unsupported (update phy-core.c)";
56 	}
57 }
58 EXPORT_SYMBOL_GPL(phy_speed_to_str);
59 
60 /**
61  * phy_duplex_to_str - Return string describing the duplex
62  *
63  * @duplex: Duplex setting to describe
64  */
65 const char *phy_duplex_to_str(unsigned int duplex)
66 {
67 	if (duplex == DUPLEX_HALF)
68 		return "Half";
69 	if (duplex == DUPLEX_FULL)
70 		return "Full";
71 	if (duplex == DUPLEX_UNKNOWN)
72 		return "Unknown";
73 	return "Unsupported (update phy-core.c)";
74 }
75 EXPORT_SYMBOL_GPL(phy_duplex_to_str);
76 
77 /* A mapping of all SUPPORTED settings to speed/duplex.  This table
78  * must be grouped by speed and sorted in descending match priority
79  * - iow, descending speed.
80  */
81 
82 #define PHY_SETTING(s, d, b) { .speed = SPEED_ ## s, .duplex = DUPLEX_ ## d, \
83 			       .bit = ETHTOOL_LINK_MODE_ ## b ## _BIT}
84 
85 static const struct phy_setting settings[] = {
86 	/* 400G */
87 	PHY_SETTING( 400000, FULL, 400000baseCR8_Full		),
88 	PHY_SETTING( 400000, FULL, 400000baseKR8_Full		),
89 	PHY_SETTING( 400000, FULL, 400000baseLR8_ER8_FR8_Full	),
90 	PHY_SETTING( 400000, FULL, 400000baseDR8_Full		),
91 	PHY_SETTING( 400000, FULL, 400000baseSR8_Full		),
92 	PHY_SETTING( 400000, FULL, 400000baseCR4_Full		),
93 	PHY_SETTING( 400000, FULL, 400000baseKR4_Full		),
94 	PHY_SETTING( 400000, FULL, 400000baseLR4_ER4_FR4_Full	),
95 	PHY_SETTING( 400000, FULL, 400000baseDR4_Full		),
96 	PHY_SETTING( 400000, FULL, 400000baseSR4_Full		),
97 	/* 200G */
98 	PHY_SETTING( 200000, FULL, 200000baseCR4_Full		),
99 	PHY_SETTING( 200000, FULL, 200000baseKR4_Full		),
100 	PHY_SETTING( 200000, FULL, 200000baseLR4_ER4_FR4_Full	),
101 	PHY_SETTING( 200000, FULL, 200000baseDR4_Full		),
102 	PHY_SETTING( 200000, FULL, 200000baseSR4_Full		),
103 	PHY_SETTING( 200000, FULL, 200000baseCR2_Full		),
104 	PHY_SETTING( 200000, FULL, 200000baseKR2_Full		),
105 	PHY_SETTING( 200000, FULL, 200000baseLR2_ER2_FR2_Full	),
106 	PHY_SETTING( 200000, FULL, 200000baseDR2_Full		),
107 	PHY_SETTING( 200000, FULL, 200000baseSR2_Full		),
108 	/* 100G */
109 	PHY_SETTING( 100000, FULL, 100000baseCR4_Full		),
110 	PHY_SETTING( 100000, FULL, 100000baseKR4_Full		),
111 	PHY_SETTING( 100000, FULL, 100000baseLR4_ER4_Full	),
112 	PHY_SETTING( 100000, FULL, 100000baseSR4_Full		),
113 	PHY_SETTING( 100000, FULL, 100000baseCR2_Full		),
114 	PHY_SETTING( 100000, FULL, 100000baseKR2_Full		),
115 	PHY_SETTING( 100000, FULL, 100000baseLR2_ER2_FR2_Full	),
116 	PHY_SETTING( 100000, FULL, 100000baseDR2_Full		),
117 	PHY_SETTING( 100000, FULL, 100000baseSR2_Full		),
118 	PHY_SETTING( 100000, FULL, 100000baseCR_Full		),
119 	PHY_SETTING( 100000, FULL, 100000baseKR_Full		),
120 	PHY_SETTING( 100000, FULL, 100000baseLR_ER_FR_Full	),
121 	PHY_SETTING( 100000, FULL, 100000baseDR_Full		),
122 	PHY_SETTING( 100000, FULL, 100000baseSR_Full		),
123 	/* 56G */
124 	PHY_SETTING(  56000, FULL,  56000baseCR4_Full	  	),
125 	PHY_SETTING(  56000, FULL,  56000baseKR4_Full	  	),
126 	PHY_SETTING(  56000, FULL,  56000baseLR4_Full	  	),
127 	PHY_SETTING(  56000, FULL,  56000baseSR4_Full	  	),
128 	/* 50G */
129 	PHY_SETTING(  50000, FULL,  50000baseCR2_Full		),
130 	PHY_SETTING(  50000, FULL,  50000baseKR2_Full		),
131 	PHY_SETTING(  50000, FULL,  50000baseSR2_Full		),
132 	PHY_SETTING(  50000, FULL,  50000baseCR_Full		),
133 	PHY_SETTING(  50000, FULL,  50000baseKR_Full		),
134 	PHY_SETTING(  50000, FULL,  50000baseLR_ER_FR_Full	),
135 	PHY_SETTING(  50000, FULL,  50000baseDR_Full		),
136 	PHY_SETTING(  50000, FULL,  50000baseSR_Full		),
137 	/* 40G */
138 	PHY_SETTING(  40000, FULL,  40000baseCR4_Full		),
139 	PHY_SETTING(  40000, FULL,  40000baseKR4_Full		),
140 	PHY_SETTING(  40000, FULL,  40000baseLR4_Full		),
141 	PHY_SETTING(  40000, FULL,  40000baseSR4_Full		),
142 	/* 25G */
143 	PHY_SETTING(  25000, FULL,  25000baseCR_Full		),
144 	PHY_SETTING(  25000, FULL,  25000baseKR_Full		),
145 	PHY_SETTING(  25000, FULL,  25000baseSR_Full		),
146 	/* 20G */
147 	PHY_SETTING(  20000, FULL,  20000baseKR2_Full		),
148 	PHY_SETTING(  20000, FULL,  20000baseMLD2_Full		),
149 	/* 10G */
150 	PHY_SETTING(  10000, FULL,  10000baseCR_Full		),
151 	PHY_SETTING(  10000, FULL,  10000baseER_Full		),
152 	PHY_SETTING(  10000, FULL,  10000baseKR_Full		),
153 	PHY_SETTING(  10000, FULL,  10000baseKX4_Full		),
154 	PHY_SETTING(  10000, FULL,  10000baseLR_Full		),
155 	PHY_SETTING(  10000, FULL,  10000baseLRM_Full		),
156 	PHY_SETTING(  10000, FULL,  10000baseR_FEC		),
157 	PHY_SETTING(  10000, FULL,  10000baseSR_Full		),
158 	PHY_SETTING(  10000, FULL,  10000baseT_Full		),
159 	/* 5G */
160 	PHY_SETTING(   5000, FULL,   5000baseT_Full		),
161 	/* 2.5G */
162 	PHY_SETTING(   2500, FULL,   2500baseT_Full		),
163 	PHY_SETTING(   2500, FULL,   2500baseX_Full		),
164 	/* 1G */
165 	PHY_SETTING(   1000, FULL,   1000baseT_Full		),
166 	PHY_SETTING(   1000, HALF,   1000baseT_Half		),
167 	PHY_SETTING(   1000, FULL,   1000baseT1_Full		),
168 	PHY_SETTING(   1000, FULL,   1000baseX_Full		),
169 	PHY_SETTING(   1000, FULL,   1000baseKX_Full		),
170 	/* 100M */
171 	PHY_SETTING(    100, FULL,    100baseT_Full		),
172 	PHY_SETTING(    100, FULL,    100baseT1_Full		),
173 	PHY_SETTING(    100, HALF,    100baseT_Half		),
174 	PHY_SETTING(    100, HALF,    100baseFX_Half		),
175 	PHY_SETTING(    100, FULL,    100baseFX_Full		),
176 	/* 10M */
177 	PHY_SETTING(     10, FULL,     10baseT_Full		),
178 	PHY_SETTING(     10, HALF,     10baseT_Half		),
179 	PHY_SETTING(     10, FULL,     10baseT1L_Full		),
180 };
181 #undef PHY_SETTING
182 
183 /**
184  * phy_lookup_setting - lookup a PHY setting
185  * @speed: speed to match
186  * @duplex: duplex to match
187  * @mask: allowed link modes
188  * @exact: an exact match is required
189  *
190  * Search the settings array for a setting that matches the speed and
191  * duplex, and which is supported.
192  *
193  * If @exact is unset, either an exact match or %NULL for no match will
194  * be returned.
195  *
196  * If @exact is set, an exact match, the fastest supported setting at
197  * or below the specified speed, the slowest supported setting, or if
198  * they all fail, %NULL will be returned.
199  */
200 const struct phy_setting *
201 phy_lookup_setting(int speed, int duplex, const unsigned long *mask, bool exact)
202 {
203 	const struct phy_setting *p, *match = NULL, *last = NULL;
204 	int i;
205 
206 	for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) {
207 		if (p->bit < __ETHTOOL_LINK_MODE_MASK_NBITS &&
208 		    test_bit(p->bit, mask)) {
209 			last = p;
210 			if (p->speed == speed && p->duplex == duplex) {
211 				/* Exact match for speed and duplex */
212 				match = p;
213 				break;
214 			} else if (!exact) {
215 				if (!match && p->speed <= speed)
216 					/* Candidate */
217 					match = p;
218 
219 				if (p->speed < speed)
220 					break;
221 			}
222 		}
223 	}
224 
225 	if (!match && !exact)
226 		match = last;
227 
228 	return match;
229 }
230 EXPORT_SYMBOL_GPL(phy_lookup_setting);
231 
232 size_t phy_speeds(unsigned int *speeds, size_t size,
233 		  unsigned long *mask)
234 {
235 	size_t count;
236 	int i;
237 
238 	for (i = 0, count = 0; i < ARRAY_SIZE(settings) && count < size; i++)
239 		if (settings[i].bit < __ETHTOOL_LINK_MODE_MASK_NBITS &&
240 		    test_bit(settings[i].bit, mask) &&
241 		    (count == 0 || speeds[count - 1] != settings[i].speed))
242 			speeds[count++] = settings[i].speed;
243 
244 	return count;
245 }
246 
247 static void __set_linkmode_max_speed(u32 max_speed, unsigned long *addr)
248 {
249 	const struct phy_setting *p;
250 	int i;
251 
252 	for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) {
253 		if (p->speed > max_speed)
254 			linkmode_clear_bit(p->bit, addr);
255 		else
256 			break;
257 	}
258 }
259 
260 static void __set_phy_supported(struct phy_device *phydev, u32 max_speed)
261 {
262 	__set_linkmode_max_speed(max_speed, phydev->supported);
263 }
264 
265 /**
266  * phy_set_max_speed - Set the maximum speed the PHY should support
267  *
268  * @phydev: The phy_device struct
269  * @max_speed: Maximum speed
270  *
271  * The PHY might be more capable than the MAC. For example a Fast Ethernet
272  * is connected to a 1G PHY. This function allows the MAC to indicate its
273  * maximum speed, and so limit what the PHY will advertise.
274  */
275 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed)
276 {
277 	__set_phy_supported(phydev, max_speed);
278 
279 	phy_advertise_supported(phydev);
280 }
281 EXPORT_SYMBOL(phy_set_max_speed);
282 
283 void of_set_phy_supported(struct phy_device *phydev)
284 {
285 	struct device_node *node = phydev->mdio.dev.of_node;
286 	u32 max_speed;
287 
288 	if (!IS_ENABLED(CONFIG_OF_MDIO))
289 		return;
290 
291 	if (!node)
292 		return;
293 
294 	if (!of_property_read_u32(node, "max-speed", &max_speed))
295 		__set_phy_supported(phydev, max_speed);
296 }
297 
298 void of_set_phy_eee_broken(struct phy_device *phydev)
299 {
300 	struct device_node *node = phydev->mdio.dev.of_node;
301 	u32 broken = 0;
302 
303 	if (!IS_ENABLED(CONFIG_OF_MDIO))
304 		return;
305 
306 	if (!node)
307 		return;
308 
309 	if (of_property_read_bool(node, "eee-broken-100tx"))
310 		broken |= MDIO_EEE_100TX;
311 	if (of_property_read_bool(node, "eee-broken-1000t"))
312 		broken |= MDIO_EEE_1000T;
313 	if (of_property_read_bool(node, "eee-broken-10gt"))
314 		broken |= MDIO_EEE_10GT;
315 	if (of_property_read_bool(node, "eee-broken-1000kx"))
316 		broken |= MDIO_EEE_1000KX;
317 	if (of_property_read_bool(node, "eee-broken-10gkx4"))
318 		broken |= MDIO_EEE_10GKX4;
319 	if (of_property_read_bool(node, "eee-broken-10gkr"))
320 		broken |= MDIO_EEE_10GKR;
321 
322 	phydev->eee_broken_modes = broken;
323 }
324 
325 /**
326  * phy_resolve_aneg_pause - Determine pause autoneg results
327  *
328  * @phydev: The phy_device struct
329  *
330  * Once autoneg has completed the local pause settings can be
331  * resolved.  Determine if pause and asymmetric pause should be used
332  * by the MAC.
333  */
334 
335 void phy_resolve_aneg_pause(struct phy_device *phydev)
336 {
337 	if (phydev->duplex == DUPLEX_FULL) {
338 		phydev->pause = linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
339 						  phydev->lp_advertising);
340 		phydev->asym_pause = linkmode_test_bit(
341 			ETHTOOL_LINK_MODE_Asym_Pause_BIT,
342 			phydev->lp_advertising);
343 	}
344 }
345 EXPORT_SYMBOL_GPL(phy_resolve_aneg_pause);
346 
347 /**
348  * phy_resolve_aneg_linkmode - resolve the advertisements into PHY settings
349  * @phydev: The phy_device struct
350  *
351  * Resolve our and the link partner advertisements into their corresponding
352  * speed and duplex. If full duplex was negotiated, extract the pause mode
353  * from the link partner mask.
354  */
355 void phy_resolve_aneg_linkmode(struct phy_device *phydev)
356 {
357 	__ETHTOOL_DECLARE_LINK_MODE_MASK(common);
358 	int i;
359 
360 	linkmode_and(common, phydev->lp_advertising, phydev->advertising);
361 
362 	for (i = 0; i < ARRAY_SIZE(settings); i++)
363 		if (test_bit(settings[i].bit, common)) {
364 			phydev->speed = settings[i].speed;
365 			phydev->duplex = settings[i].duplex;
366 			break;
367 		}
368 
369 	phy_resolve_aneg_pause(phydev);
370 }
371 EXPORT_SYMBOL_GPL(phy_resolve_aneg_linkmode);
372 
373 /**
374  * phy_check_downshift - check whether downshift occurred
375  * @phydev: The phy_device struct
376  *
377  * Check whether a downshift to a lower speed occurred. If this should be the
378  * case warn the user.
379  * Prerequisite for detecting downshift is that PHY driver implements the
380  * read_status callback and sets phydev->speed to the actual link speed.
381  */
382 void phy_check_downshift(struct phy_device *phydev)
383 {
384 	__ETHTOOL_DECLARE_LINK_MODE_MASK(common);
385 	int i, speed = SPEED_UNKNOWN;
386 
387 	phydev->downshifted_rate = 0;
388 
389 	if (phydev->autoneg == AUTONEG_DISABLE ||
390 	    phydev->speed == SPEED_UNKNOWN)
391 		return;
392 
393 	linkmode_and(common, phydev->lp_advertising, phydev->advertising);
394 
395 	for (i = 0; i < ARRAY_SIZE(settings); i++)
396 		if (test_bit(settings[i].bit, common)) {
397 			speed = settings[i].speed;
398 			break;
399 		}
400 
401 	if (speed == SPEED_UNKNOWN || phydev->speed >= speed)
402 		return;
403 
404 	phydev_warn(phydev, "Downshift occurred from negotiated speed %s to actual speed %s, check cabling!\n",
405 		    phy_speed_to_str(speed), phy_speed_to_str(phydev->speed));
406 
407 	phydev->downshifted_rate = 1;
408 }
409 EXPORT_SYMBOL_GPL(phy_check_downshift);
410 
411 static int phy_resolve_min_speed(struct phy_device *phydev, bool fdx_only)
412 {
413 	__ETHTOOL_DECLARE_LINK_MODE_MASK(common);
414 	int i = ARRAY_SIZE(settings);
415 
416 	linkmode_and(common, phydev->lp_advertising, phydev->advertising);
417 
418 	while (--i >= 0) {
419 		if (test_bit(settings[i].bit, common)) {
420 			if (fdx_only && settings[i].duplex != DUPLEX_FULL)
421 				continue;
422 			return settings[i].speed;
423 		}
424 	}
425 
426 	return SPEED_UNKNOWN;
427 }
428 
429 int phy_speed_down_core(struct phy_device *phydev)
430 {
431 	int min_common_speed = phy_resolve_min_speed(phydev, true);
432 
433 	if (min_common_speed == SPEED_UNKNOWN)
434 		return -EINVAL;
435 
436 	__set_linkmode_max_speed(min_common_speed, phydev->advertising);
437 
438 	return 0;
439 }
440 
441 static void mmd_phy_indirect(struct mii_bus *bus, int phy_addr, int devad,
442 			     u16 regnum)
443 {
444 	/* Write the desired MMD Devad */
445 	__mdiobus_write(bus, phy_addr, MII_MMD_CTRL, devad);
446 
447 	/* Write the desired MMD register address */
448 	__mdiobus_write(bus, phy_addr, MII_MMD_DATA, regnum);
449 
450 	/* Select the Function : DATA with no post increment */
451 	__mdiobus_write(bus, phy_addr, MII_MMD_CTRL,
452 			devad | MII_MMD_CTRL_NOINCR);
453 }
454 
455 /**
456  * __phy_read_mmd - Convenience function for reading a register
457  * from an MMD on a given PHY.
458  * @phydev: The phy_device struct
459  * @devad: The MMD to read from (0..31)
460  * @regnum: The register on the MMD to read (0..65535)
461  *
462  * Same rules as for __phy_read();
463  */
464 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
465 {
466 	int val;
467 
468 	if (regnum > (u16)~0 || devad > 32)
469 		return -EINVAL;
470 
471 	if (phydev->drv && phydev->drv->read_mmd) {
472 		val = phydev->drv->read_mmd(phydev, devad, regnum);
473 	} else if (phydev->is_c45) {
474 		val = __mdiobus_c45_read(phydev->mdio.bus, phydev->mdio.addr,
475 					 devad, regnum);
476 	} else {
477 		struct mii_bus *bus = phydev->mdio.bus;
478 		int phy_addr = phydev->mdio.addr;
479 
480 		mmd_phy_indirect(bus, phy_addr, devad, regnum);
481 
482 		/* Read the content of the MMD's selected register */
483 		val = __mdiobus_read(bus, phy_addr, MII_MMD_DATA);
484 	}
485 	return val;
486 }
487 EXPORT_SYMBOL(__phy_read_mmd);
488 
489 /**
490  * phy_read_mmd - Convenience function for reading a register
491  * from an MMD on a given PHY.
492  * @phydev: The phy_device struct
493  * @devad: The MMD to read from
494  * @regnum: The register on the MMD to read
495  *
496  * Same rules as for phy_read();
497  */
498 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
499 {
500 	int ret;
501 
502 	phy_lock_mdio_bus(phydev);
503 	ret = __phy_read_mmd(phydev, devad, regnum);
504 	phy_unlock_mdio_bus(phydev);
505 
506 	return ret;
507 }
508 EXPORT_SYMBOL(phy_read_mmd);
509 
510 /**
511  * __phy_write_mmd - Convenience function for writing a register
512  * on an MMD on a given PHY.
513  * @phydev: The phy_device struct
514  * @devad: The MMD to read from
515  * @regnum: The register on the MMD to read
516  * @val: value to write to @regnum
517  *
518  * Same rules as for __phy_write();
519  */
520 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)
521 {
522 	int ret;
523 
524 	if (regnum > (u16)~0 || devad > 32)
525 		return -EINVAL;
526 
527 	if (phydev->drv && phydev->drv->write_mmd) {
528 		ret = phydev->drv->write_mmd(phydev, devad, regnum, val);
529 	} else if (phydev->is_c45) {
530 		ret = __mdiobus_c45_write(phydev->mdio.bus, phydev->mdio.addr,
531 					  devad, regnum, val);
532 	} else {
533 		struct mii_bus *bus = phydev->mdio.bus;
534 		int phy_addr = phydev->mdio.addr;
535 
536 		mmd_phy_indirect(bus, phy_addr, devad, regnum);
537 
538 		/* Write the data into MMD's selected register */
539 		__mdiobus_write(bus, phy_addr, MII_MMD_DATA, val);
540 
541 		ret = 0;
542 	}
543 	return ret;
544 }
545 EXPORT_SYMBOL(__phy_write_mmd);
546 
547 /**
548  * phy_write_mmd - Convenience function for writing a register
549  * on an MMD on a given PHY.
550  * @phydev: The phy_device struct
551  * @devad: The MMD to read from
552  * @regnum: The register on the MMD to read
553  * @val: value to write to @regnum
554  *
555  * Same rules as for phy_write();
556  */
557 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)
558 {
559 	int ret;
560 
561 	phy_lock_mdio_bus(phydev);
562 	ret = __phy_write_mmd(phydev, devad, regnum, val);
563 	phy_unlock_mdio_bus(phydev);
564 
565 	return ret;
566 }
567 EXPORT_SYMBOL(phy_write_mmd);
568 
569 /**
570  * phy_modify_changed - Function for modifying a PHY register
571  * @phydev: the phy_device struct
572  * @regnum: register number to modify
573  * @mask: bit mask of bits to clear
574  * @set: new value of bits set in mask to write to @regnum
575  *
576  * NOTE: MUST NOT be called from interrupt context,
577  * because the bus read/write functions may wait for an interrupt
578  * to conclude the operation.
579  *
580  * Returns negative errno, 0 if there was no change, and 1 in case of change
581  */
582 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
583 {
584 	int ret;
585 
586 	phy_lock_mdio_bus(phydev);
587 	ret = __phy_modify_changed(phydev, regnum, mask, set);
588 	phy_unlock_mdio_bus(phydev);
589 
590 	return ret;
591 }
592 EXPORT_SYMBOL_GPL(phy_modify_changed);
593 
594 /**
595  * __phy_modify - Convenience function for modifying a PHY register
596  * @phydev: the phy_device struct
597  * @regnum: register number to modify
598  * @mask: bit mask of bits to clear
599  * @set: new value of bits set in mask to write to @regnum
600  *
601  * NOTE: MUST NOT be called from interrupt context,
602  * because the bus read/write functions may wait for an interrupt
603  * to conclude the operation.
604  */
605 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
606 {
607 	int ret;
608 
609 	ret = __phy_modify_changed(phydev, regnum, mask, set);
610 
611 	return ret < 0 ? ret : 0;
612 }
613 EXPORT_SYMBOL_GPL(__phy_modify);
614 
615 /**
616  * phy_modify - Convenience function for modifying a given PHY register
617  * @phydev: the phy_device struct
618  * @regnum: register number to write
619  * @mask: bit mask of bits to clear
620  * @set: new value of bits set in mask to write to @regnum
621  *
622  * NOTE: MUST NOT be called from interrupt context,
623  * because the bus read/write functions may wait for an interrupt
624  * to conclude the operation.
625  */
626 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
627 {
628 	int ret;
629 
630 	phy_lock_mdio_bus(phydev);
631 	ret = __phy_modify(phydev, regnum, mask, set);
632 	phy_unlock_mdio_bus(phydev);
633 
634 	return ret;
635 }
636 EXPORT_SYMBOL_GPL(phy_modify);
637 
638 /**
639  * __phy_modify_mmd_changed - Function for modifying a register on MMD
640  * @phydev: the phy_device struct
641  * @devad: the MMD containing register to modify
642  * @regnum: register number to modify
643  * @mask: bit mask of bits to clear
644  * @set: new value of bits set in mask to write to @regnum
645  *
646  * Unlocked helper function which allows a MMD register to be modified as
647  * new register value = (old register value & ~mask) | set
648  *
649  * Returns negative errno, 0 if there was no change, and 1 in case of change
650  */
651 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
652 			     u16 mask, u16 set)
653 {
654 	int new, ret;
655 
656 	ret = __phy_read_mmd(phydev, devad, regnum);
657 	if (ret < 0)
658 		return ret;
659 
660 	new = (ret & ~mask) | set;
661 	if (new == ret)
662 		return 0;
663 
664 	ret = __phy_write_mmd(phydev, devad, regnum, new);
665 
666 	return ret < 0 ? ret : 1;
667 }
668 EXPORT_SYMBOL_GPL(__phy_modify_mmd_changed);
669 
670 /**
671  * phy_modify_mmd_changed - Function for modifying a register on MMD
672  * @phydev: the phy_device struct
673  * @devad: the MMD containing register to modify
674  * @regnum: register number to modify
675  * @mask: bit mask of bits to clear
676  * @set: new value of bits set in mask to write to @regnum
677  *
678  * NOTE: MUST NOT be called from interrupt context,
679  * because the bus read/write functions may wait for an interrupt
680  * to conclude the operation.
681  *
682  * Returns negative errno, 0 if there was no change, and 1 in case of change
683  */
684 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
685 			   u16 mask, u16 set)
686 {
687 	int ret;
688 
689 	phy_lock_mdio_bus(phydev);
690 	ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set);
691 	phy_unlock_mdio_bus(phydev);
692 
693 	return ret;
694 }
695 EXPORT_SYMBOL_GPL(phy_modify_mmd_changed);
696 
697 /**
698  * __phy_modify_mmd - Convenience function for modifying a register on MMD
699  * @phydev: the phy_device struct
700  * @devad: the MMD containing register to modify
701  * @regnum: register number to modify
702  * @mask: bit mask of bits to clear
703  * @set: new value of bits set in mask to write to @regnum
704  *
705  * NOTE: MUST NOT be called from interrupt context,
706  * because the bus read/write functions may wait for an interrupt
707  * to conclude the operation.
708  */
709 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
710 		     u16 mask, u16 set)
711 {
712 	int ret;
713 
714 	ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set);
715 
716 	return ret < 0 ? ret : 0;
717 }
718 EXPORT_SYMBOL_GPL(__phy_modify_mmd);
719 
720 /**
721  * phy_modify_mmd - Convenience function for modifying a register on MMD
722  * @phydev: the phy_device struct
723  * @devad: the MMD containing register to modify
724  * @regnum: register number to modify
725  * @mask: bit mask of bits to clear
726  * @set: new value of bits set in mask to write to @regnum
727  *
728  * NOTE: MUST NOT be called from interrupt context,
729  * because the bus read/write functions may wait for an interrupt
730  * to conclude the operation.
731  */
732 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
733 		   u16 mask, u16 set)
734 {
735 	int ret;
736 
737 	phy_lock_mdio_bus(phydev);
738 	ret = __phy_modify_mmd(phydev, devad, regnum, mask, set);
739 	phy_unlock_mdio_bus(phydev);
740 
741 	return ret;
742 }
743 EXPORT_SYMBOL_GPL(phy_modify_mmd);
744 
745 static int __phy_read_page(struct phy_device *phydev)
746 {
747 	if (WARN_ONCE(!phydev->drv->read_page, "read_page callback not available, PHY driver not loaded?\n"))
748 		return -EOPNOTSUPP;
749 
750 	return phydev->drv->read_page(phydev);
751 }
752 
753 static int __phy_write_page(struct phy_device *phydev, int page)
754 {
755 	if (WARN_ONCE(!phydev->drv->write_page, "write_page callback not available, PHY driver not loaded?\n"))
756 		return -EOPNOTSUPP;
757 
758 	return phydev->drv->write_page(phydev, page);
759 }
760 
761 /**
762  * phy_save_page() - take the bus lock and save the current page
763  * @phydev: a pointer to a &struct phy_device
764  *
765  * Take the MDIO bus lock, and return the current page number. On error,
766  * returns a negative errno. phy_restore_page() must always be called
767  * after this, irrespective of success or failure of this call.
768  */
769 int phy_save_page(struct phy_device *phydev)
770 {
771 	phy_lock_mdio_bus(phydev);
772 	return __phy_read_page(phydev);
773 }
774 EXPORT_SYMBOL_GPL(phy_save_page);
775 
776 /**
777  * phy_select_page() - take the bus lock, save the current page, and set a page
778  * @phydev: a pointer to a &struct phy_device
779  * @page: desired page
780  *
781  * Take the MDIO bus lock to protect against concurrent access, save the
782  * current PHY page, and set the current page.  On error, returns a
783  * negative errno, otherwise returns the previous page number.
784  * phy_restore_page() must always be called after this, irrespective
785  * of success or failure of this call.
786  */
787 int phy_select_page(struct phy_device *phydev, int page)
788 {
789 	int ret, oldpage;
790 
791 	oldpage = ret = phy_save_page(phydev);
792 	if (ret < 0)
793 		return ret;
794 
795 	if (oldpage != page) {
796 		ret = __phy_write_page(phydev, page);
797 		if (ret < 0)
798 			return ret;
799 	}
800 
801 	return oldpage;
802 }
803 EXPORT_SYMBOL_GPL(phy_select_page);
804 
805 /**
806  * phy_restore_page() - restore the page register and release the bus lock
807  * @phydev: a pointer to a &struct phy_device
808  * @oldpage: the old page, return value from phy_save_page() or phy_select_page()
809  * @ret: operation's return code
810  *
811  * Release the MDIO bus lock, restoring @oldpage if it is a valid page.
812  * This function propagates the earliest error code from the group of
813  * operations.
814  *
815  * Returns:
816  *   @oldpage if it was a negative value, otherwise
817  *   @ret if it was a negative errno value, otherwise
818  *   phy_write_page()'s negative value if it were in error, otherwise
819  *   @ret.
820  */
821 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret)
822 {
823 	int r;
824 
825 	if (oldpage >= 0) {
826 		r = __phy_write_page(phydev, oldpage);
827 
828 		/* Propagate the operation return code if the page write
829 		 * was successful.
830 		 */
831 		if (ret >= 0 && r < 0)
832 			ret = r;
833 	} else {
834 		/* Propagate the phy page selection error code */
835 		ret = oldpage;
836 	}
837 
838 	phy_unlock_mdio_bus(phydev);
839 
840 	return ret;
841 }
842 EXPORT_SYMBOL_GPL(phy_restore_page);
843 
844 /**
845  * phy_read_paged() - Convenience function for reading a paged register
846  * @phydev: a pointer to a &struct phy_device
847  * @page: the page for the phy
848  * @regnum: register number
849  *
850  * Same rules as for phy_read().
851  */
852 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum)
853 {
854 	int ret = 0, oldpage;
855 
856 	oldpage = phy_select_page(phydev, page);
857 	if (oldpage >= 0)
858 		ret = __phy_read(phydev, regnum);
859 
860 	return phy_restore_page(phydev, oldpage, ret);
861 }
862 EXPORT_SYMBOL(phy_read_paged);
863 
864 /**
865  * phy_write_paged() - Convenience function for writing a paged register
866  * @phydev: a pointer to a &struct phy_device
867  * @page: the page for the phy
868  * @regnum: register number
869  * @val: value to write
870  *
871  * Same rules as for phy_write().
872  */
873 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val)
874 {
875 	int ret = 0, oldpage;
876 
877 	oldpage = phy_select_page(phydev, page);
878 	if (oldpage >= 0)
879 		ret = __phy_write(phydev, regnum, val);
880 
881 	return phy_restore_page(phydev, oldpage, ret);
882 }
883 EXPORT_SYMBOL(phy_write_paged);
884 
885 /**
886  * phy_modify_paged_changed() - Function for modifying a paged register
887  * @phydev: a pointer to a &struct phy_device
888  * @page: the page for the phy
889  * @regnum: register number
890  * @mask: bit mask of bits to clear
891  * @set: bit mask of bits to set
892  *
893  * Returns negative errno, 0 if there was no change, and 1 in case of change
894  */
895 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
896 			     u16 mask, u16 set)
897 {
898 	int ret = 0, oldpage;
899 
900 	oldpage = phy_select_page(phydev, page);
901 	if (oldpage >= 0)
902 		ret = __phy_modify_changed(phydev, regnum, mask, set);
903 
904 	return phy_restore_page(phydev, oldpage, ret);
905 }
906 EXPORT_SYMBOL(phy_modify_paged_changed);
907 
908 /**
909  * phy_modify_paged() - Convenience function for modifying a paged register
910  * @phydev: a pointer to a &struct phy_device
911  * @page: the page for the phy
912  * @regnum: register number
913  * @mask: bit mask of bits to clear
914  * @set: bit mask of bits to set
915  *
916  * Same rules as for phy_read() and phy_write().
917  */
918 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
919 		     u16 mask, u16 set)
920 {
921 	int ret = phy_modify_paged_changed(phydev, page, regnum, mask, set);
922 
923 	return ret < 0 ? ret : 0;
924 }
925 EXPORT_SYMBOL(phy_modify_paged);
926